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12013-06-25 Nick Clifton <nickc@redhat.com>
2
3 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
4 the PC in indirect addressing on 430xv2 parts.
5 (msp430_operands): Add version test to hardware bug encoding
6 restrictions.
7
477330fc
RM
82013-06-24 Roland McGrath <mcgrathr@google.com>
9
d996d970
RM
10 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
11 so it skips whitespace before it.
12 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
13
477330fc
RM
14 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
15 (arm_reg_parse_multi): Skip whitespace first.
16 (parse_reg_list): Likewise.
17 (parse_vfp_reg_list): Likewise.
18 (s_arm_unwind_save_mmxwcg): Likewise.
19
24382199
NC
202013-06-24 Nick Clifton <nickc@redhat.com>
21
22 PR gas/15623
23 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
24
c3678916
RS
252013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
26
27 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
28
42429eac
RS
292013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
30
31 * config/tc-mips.c: Assert that offsetT and valueT are at least
32 8 bytes in size.
33 (GPR_SMIN, GPR_SMAX): New macros.
34 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
35
f3ded42a
RS
362013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
37
38 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
39 conditions. Remove any code deselected by them.
40 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
41
e8044f35
RS
422013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
43
44 * NEWS: Note removal of ECOFF support.
45 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
46 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
47 (MULTI_CFILES): Remove config/e-mipsecoff.c.
48 * Makefile.in: Regenerate.
49 * configure.in: Remove MIPS ECOFF references.
50 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
51 Delete cases.
52 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
53 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
54 (mips-*-*): ...this single case.
55 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
56 MIPS emulations to be e-mipself*.
57 * configure: Regenerate.
58 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
59 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
60 (mips-*-sysv*): Remove coff and ecoff cases.
61 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
62 * ecoff.c: Remove reference to MIPS ECOFF.
63 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
64 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
65 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
66 (mips_hi_fixup): Tweak comment.
67 (append_insn): Require a howto.
68 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
69
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702013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
71
72 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
73 Use "CPU" instead of "cpu".
74 * doc/c-mips.texi: Likewise.
75 (MIPS Opts): Rename to MIPS Options.
76 (MIPS option stack): Rename to MIPS Option Stack.
77 (MIPS ASE instruction generation overrides): Rename to
78 MIPS ASE Instruction Generation Overrides (for now).
79 (MIPS floating-point): Rename to MIPS Floating-Point.
80
fc16f8cc
RS
812013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
82
83 * doc/c-mips.texi (MIPS Macros): New section.
84 (MIPS Object): Replace with...
85 (MIPS Small Data): ...this new section.
86
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RS
872013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
88
89 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
90 Capitalize name. Use @kindex instead of @cindex for .set entries.
91
a1b86ab7
RS
922013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
93
94 * doc/c-mips.texi (MIPS Stabs): Remove section.
95
c6278170
RS
962013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
99 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
100 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
101 (ISA_SUPPORTS_VIRT64_ASE): Delete.
102 (mips_ase): New structure.
103 (mips_ases): New table.
104 (FP64_ASES): New macro.
105 (mips_ase_groups): New array.
106 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
107 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
108 functions.
109 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
110 (md_parse_option): Use mips_ases and mips_set_ase instead of
111 separate case statements for each ASE option.
112 (mips_after_parse_args): Use FP64_ASES. Use
113 mips_check_isa_supports_ases to check the ASEs against
114 other options.
115 (s_mipsset): Use mips_ases and mips_set_ase instead of
116 separate if statements for each ASE option. Use
117 mips_check_isa_supports_ases, even when a non-ASE option
118 is specified.
119
63a4bc21
KT
1202013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
121
122 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
123
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1242013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
125
126 * config/tc-mips.c (md_shortopts, options, md_longopts)
127 (md_longopts_size): Move earlier in file.
128
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RS
1292013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
130
131 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
132 with a single "ase" bitmask.
133 (mips_opts): Update accordingly.
134 (file_ase, file_ase_explicit): New variables.
135 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
136 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
137 (ISA_HAS_ROR): Adjust for mips_set_options change.
138 (is_opcode_valid): Take the base ase mask directly from mips_opts.
139 (mips_ip): Adjust for mips_set_options change.
140 (md_parse_option): Likewise. Update file_ase_explicit.
141 (mips_after_parse_args): Adjust for mips_set_options change.
142 Use bitmask operations to select the default ASEs. Set file_ase
143 rather than individual per-ASE variables.
144 (s_mipsset): Adjust for mips_set_options change.
145 (mips_elf_final_processing): Test file_ase rather than
146 file_ase_mdmx. Remove commented-out code.
147
d16afab6
RS
1482013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
149
150 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
151 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
152 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
153 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
154 (mips_after_parse_args): Use the new "ase" field to choose
155 the default ASEs.
156 (mips_cpu_info_table): Move ASEs from the "flags" field to the
157 "ase" field.
158
e83a675f
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1592013-06-18 Richard Earnshaw <rearnsha@arm.com>
160
161 * config/tc-arm.c (symbol_preemptible): New function.
162 (relax_branch): Use it.
163
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CM
1642013-06-17 Catherine Moore <clm@codesourcery.com>
165 Maciej W. Rozycki <macro@codesourcery.com>
166 Chao-Ying Fu <fu@mips.com>
167
168 * config/tc-mips.c (mips_set_options): Add ase_eva.
169 (mips_set_options mips_opts): Add ase_eva.
170 (file_ase_eva): Declare.
171 (ISA_SUPPORTS_EVA_ASE): Define.
172 (IS_SEXT_9BIT_NUM): Define.
173 (MIPS_CPU_ASE_EVA): Define.
174 (is_opcode_valid): Add support for ase_eva.
175 (macro_build): Likewise.
176 (macro): Likewise.
177 (validate_mips_insn): Likewise.
178 (validate_micromips_insn): Likewise.
179 (mips_ip): Likewise.
180 (options): Add OPTION_EVA and OPTION_NO_EVA.
181 (md_longopts): Add -meva and -mno-eva.
182 (md_parse_option): Process new options.
183 (mips_after_parse_args): Check for valid EVA combinations.
184 (s_mipsset): Likewise.
185
e410add4
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1862013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
187
188 * dwarf2dbg.h (dwarf2_move_insn): Declare.
189 * dwarf2dbg.c (line_subseg): Add pmove_tail.
190 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
191 (dwarf2_gen_line_info_1): Update call accordingly.
192 (dwarf2_move_insn): New function.
193 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
194
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RS
1952013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
196
197 Revert:
198
199 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
200
201 PR gas/13024
202 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
203 (dwarf2_gen_line_info_1): Delete.
204 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
205 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
206 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
207 (dwarf2_directive_loc): Push previous .locs instead of generating
208 them immediately.
209
f122319e
CF
2102013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
211
212 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
213 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
214
909c7f9c
NC
2152013-06-13 Nick Clifton <nickc@redhat.com>
216
217 PR gas/15602
218 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
219 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
220 function. Generates an error if the adjusted offset is out of a
221 16-bit range.
222
5d5755a7
SL
2232013-06-12 Sandra Loosemore <sandra@codesourcery.com>
224
225 * config/tc-nios2.c (md_apply_fix): Mask constant
226 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
227
3bf0dbfb
MR
2282013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
229
230 * config/tc-mips.c (append_insn): Don't do branch relaxation for
231 MIPS-3D instructions either.
232 (md_convert_frag): Update the COPx branch mask accordingly.
233
234 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
235 option.
236 * doc/as.texinfo (Overview): Add --relax-branch and
237 --no-relax-branch.
238 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
239 --no-relax-branch.
240
9daf7bab
SL
2412013-06-09 Sandra Loosemore <sandra@codesourcery.com>
242
243 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
244 omitted.
245
d301a56b
RS
2462013-06-08 Catherine Moore <clm@codesourcery.com>
247
248 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
249 (is_opcode_valid_16): Pass ase value to opcode_is_member.
250 (append_insn): Change INSN_xxxx to ASE_xxxx.
251
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DC
2522013-06-01 George Thomas <george.thomas@atmel.com>
253
254 * gas/config/tc-avr.c: Change ISA for devices with USB support to
255 AVR_ISA_XMEGAU
256
f60cf82f
L
2572013-05-31 H.J. Lu <hongjiu.lu@intel.com>
258
259 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
260 for ELF.
261
a3f278e2
CM
2622013-05-31 Paul Brook <paul@codesourcery.com>
263
264 gas/
265 * config/tc-mips.c (s_ehword): New.
266
067ec077
CM
2672013-05-30 Paul Brook <paul@codesourcery.com>
268
269 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
270
d6101ac2
MR
2712013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
272
273 * write.c (resolve_reloc_expr_symbols): On REL targets don't
274 convert relocs who have no relocatable field either. Rephrase
275 the conditional so that the PC-relative check is only applied
276 for REL targets.
277
f19ccbda
MR
2782013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
279
280 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
281 calculation.
282
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YZ
2832013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
284
285 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 286 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
287 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
288 (md_apply_fix): Likewise.
289 (aarch64_force_relocation): Likewise.
290
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KT
2912013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
292
293 * config/tc-arm.c (it_fsm_post_encode): Improve
294 warning messages about deprecated IT block formats.
295
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MS
2962013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
297
298 * config/tc-aarch64.c (md_apply_fix): Move value range checking
299 inside fx_done condition.
300
c77c0862
RS
3012013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
302
303 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
304
c0637f3a
PB
3052013-05-20 Peter Bergner <bergner@vnet.ibm.com>
306
307 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
308 and clean up warning when using PRINT_OPCODE_TABLE.
309
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AM
3102013-05-20 Alan Modra <amodra@gmail.com>
311
312 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
313 and data fixups performing shift/high adjust/sign extension on
314 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
315 when writing data fixups rather than recalculating size.
316
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JBG
3172013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
318
319 * doc/c-msp430.texi: Fix typo.
320
9f6e76f4
TG
3212013-05-16 Tristan Gingold <gingold@adacore.com>
322
323 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
324 are also TOC symbols.
325
638d3803
NC
3262013-05-16 Nick Clifton <nickc@redhat.com>
327
328 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
329 Add -mcpu command to specify core type.
997b26e8 330 * doc/c-msp430.texi: Update documentation.
638d3803 331
b015e599
AP
3322013-05-09 Andrew Pinski <apinski@cavium.com>
333
334 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
335 (mips_opts): Update for the new field.
336 (file_ase_virt): New variable.
337 (ISA_SUPPORTS_VIRT_ASE): New macro.
338 (ISA_SUPPORTS_VIRT64_ASE): New macro.
339 (MIPS_CPU_ASE_VIRT): New define.
340 (is_opcode_valid): Handle ase_virt.
341 (macro_build): Handle "+J".
342 (validate_mips_insn): Likewise.
343 (mips_ip): Likewise.
344 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
345 (md_longopts): Add mvirt and mnovirt
346 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
347 (mips_after_parse_args): Handle ase_virt field.
348 (s_mipsset): Handle "virt" and "novirt".
349 (mips_elf_final_processing): Add a comment about virt ASE might need
350 a new flag.
351 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
352 * doc/c-mips.texi: Document -mvirt and -mno-virt.
353 Document ".set virt" and ".set novirt".
354
da8094d7
AM
3552013-05-09 Alan Modra <amodra@gmail.com>
356
357 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
358 control of operand flag bits.
359
c5f8c205
AM
3602013-05-07 Alan Modra <amodra@gmail.com>
361
362 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
363 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
364 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
365 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
366 (md_apply_fix): Set fx_no_overflow for assorted relocations.
367 Shift and sign-extend fieldval for use by some VLE reloc
368 operand->insert functions.
369
b47468a6
CM
3702013-05-06 Paul Brook <paul@codesourcery.com>
371 Catherine Moore <clm@codesourcery.com>
372
c5f8c205
AM
373 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
374 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
375 (md_apply_fix): Likewise.
376 (tc_gen_reloc): Likewise.
377
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CM
3782013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
379
380 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
381 (mips_fix_adjustable): Adjust pc-relative check to use
382 limited_pc_reloc_p.
383
754e2bb9
RS
3842013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
385
386 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
387 (s_mips_stab): Do not restrict to stabn only.
388
13761a11
NC
3892013-05-02 Nick Clifton <nickc@redhat.com>
390
391 * config/tc-msp430.c: Add support for the MSP430X architecture.
392 Add code to insert a NOP instruction after any instruction that
393 might change the interrupt state.
394 Add support for the LARGE memory model.
395 Add code to initialise the .MSP430.attributes section.
396 * config/tc-msp430.h: Add support for the MSP430X architecture.
397 * doc/c-msp430.texi: Document the new -mL and -mN command line
398 options.
399 * NEWS: Mention support for the MSP430X architecture.
400
df26367c
MR
4012013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
402
403 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
404 alpha*-*-linux*ecoff*.
405
f02d8318
CF
4062013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
407
408 * config/tc-mips.c (mips_ip): Add sizelo.
409 For "+C", "+G", and "+H", set sizelo and compare against it.
410
b40bf0a2
NC
4112013-04-29 Nick Clifton <nickc@redhat.com>
412
413 * as.c (Options): Add -gdwarf-sections.
414 (parse_args): Likewise.
415 * as.h (flag_dwarf_sections): Declare.
416 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
417 (process_entries): When -gdwarf-sections is enabled generate
418 fragmentary .debug_line sections.
419 (out_debug_line): Set the section for the .debug_line section end
420 symbol.
421 * doc/as.texinfo: Document -gdwarf-sections.
422 * NEWS: Mention -gdwarf-sections.
423
8eeccb77 4242013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
425
426 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
427 according to the target parameter. Don't call s_segm since s_segm
428 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
429 initialized yet.
430 (md_begin): Call s_segm according to target parameter from command
431 line.
432
49926cd0
AM
4332013-04-25 Alan Modra <amodra@gmail.com>
434
435 * configure.in: Allow little-endian linux.
436 * configure: Regenerate.
437
e3031850
SL
4382013-04-24 Sandra Loosemore <sandra@codesourcery.com>
439
440 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
441 "fstatus" control register to "eccinj".
442
cb948fc0
KT
4432013-04-19 Kai Tietz <ktietz@redhat.com>
444
445 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
446
4455e9ad
JB
4472013-04-15 Julian Brown <julian@codesourcery.com>
448
449 * expr.c (add_to_result, subtract_from_result): Make global.
450 * expr.h (add_to_result, subtract_from_result): Add prototypes.
451 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
452 subtract_from_result to handle extra bit of precision for .sleb128
453 directive operands.
454
956a6ba3
JB
4552013-04-10 Julian Brown <julian@codesourcery.com>
456
457 * read.c (convert_to_bignum): Add sign parameter. Use it
458 instead of X_unsigned to determine sign of resulting bignum.
459 (emit_expr): Pass extra argument to convert_to_bignum.
460 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
461 X_extrabit to convert_to_bignum.
462 (parse_bitfield_cons): Set X_extrabit.
463 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
464 Initialise X_extrabit field as appropriate.
465 (add_to_result): New.
466 (subtract_from_result): New.
467 (expr): Use above.
468 * expr.h (expressionS): Add X_extrabit field.
469
eb9f3f00
JB
4702013-04-10 Jan Beulich <jbeulich@suse.com>
471
472 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
473 register being PC when is_t or writeback, and use distinct
474 diagnostic for the latter case.
475
ccb84d65
JB
4762013-04-10 Jan Beulich <jbeulich@suse.com>
477
478 * gas/config/tc-arm.c (parse_operands): Re-write
479 po_barrier_or_imm().
480 (do_barrier): Remove bogus constraint().
481 (do_t_barrier): Remove.
482
4d13caa0
NC
4832013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
484
485 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
486 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
487 ATmega2564RFR2
488 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
489
16d02dc9
JB
4902013-04-09 Jan Beulich <jbeulich@suse.com>
491
492 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
493 Use local variable Rt in more places.
494 (do_vmsr): Accept all control registers.
495
05ac0ffb
JB
4962013-04-09 Jan Beulich <jbeulich@suse.com>
497
498 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
499 if there was none specified for moves between scalar and core
500 register.
501
2d51fb74
JB
5022013-04-09 Jan Beulich <jbeulich@suse.com>
503
504 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
505 NEON_ALL_LANES case.
506
94dcf8bf
JB
5072013-04-08 Jan Beulich <jbeulich@suse.com>
508
509 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
510 PC-relative VSTR.
511
1472d06f
JB
5122013-04-08 Jan Beulich <jbeulich@suse.com>
513
514 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
515 entry to sp_fiq.
516
0c76cae8
AM
5172013-04-03 Alan Modra <amodra@gmail.com>
518
519 * doc/as.texinfo: Add support to generate man options for h8300.
520 * doc/c-h8300.texi: Likewise.
521
92eb40d9
RR
5222013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
523
524 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
525 Cortex-A57.
526
51dcdd4d
NC
5272013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
528
529 PR binutils/15068
530 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
531
c5d685bf
NC
5322013-03-26 Nick Clifton <nickc@redhat.com>
533
9b978282
NC
534 PR gas/15295
535 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
536 start of the file each time.
537
c5d685bf
NC
538 PR gas/15178
539 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
540 FreeBSD targets.
541
9699c833
TG
5422013-03-26 Douglas B Rupp <rupp@gnat.com>
543
544 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
545 after fixup.
546
4755303e
WN
5472013-03-21 Will Newton <will.newton@linaro.org>
548
549 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
550 pc-relative str instructions in Thumb mode.
551
81f5558e
NC
5522013-03-21 Michael Schewe <michael.schewe@gmx.net>
553
554 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
555 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
556 R_H8_DISP32A16.
557 * config/tc-h8300.h: Remove duplicated defines.
558
71863e73
NC
5592013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
560
561 PR gas/15282
562 * tc-avr.c (mcu_has_3_byte_pc): New function.
563 (tc_cfi_frame_initial_instructions): Call it to find return
564 address size.
565
795b8e6b
NC
5662013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
567
568 PR gas/15095
569 * config/tc-tic6x.c (tic6x_try_encode): Handle
570 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
571 encode register pair numbers when required.
572
ba86b375
WN
5732013-03-15 Will Newton <will.newton@linaro.org>
574
575 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
576 in vstr in Thumb mode for pre-ARMv7 cores.
577
9e6f3811
AS
5782013-03-14 Andreas Schwab <schwab@suse.de>
579
580 * doc/c-arc.texi (ARC Directives): Revert last change and use
581 @itemize instead of @table.
582 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
583
b10bf8c5
NC
5842013-03-14 Nick Clifton <nickc@redhat.com>
585
586 PR gas/15273
587 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
588 NULL message, instead just check ARM_CPU_IS_ANY directly.
589
ba724cfc
NC
5902013-03-14 Nick Clifton <nickc@redhat.com>
591
592 PR gas/15212
9e6f3811 593 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
594 for table format.
595 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
596 to the @item directives.
597 (ARM-Neon-Alignment): Move to correct place in the document.
598 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
599 formatting.
600 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
601 @smallexample.
602
531a94fd
SL
6032013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
604
605 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
606 case. Add default BAD_CASE to switch.
607
dad60f8e
SL
6082013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
609
610 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
611 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
612
dd5181d5
KT
6132013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
614
615 * config/tc-arm.c (crc_ext_armv8): New feature set.
616 (UNPRED_REG): New macro.
617 (do_crc32_1): New function.
618 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
619 do_crc32ch, do_crc32cw): Likewise.
620 (TUEc): New macro.
621 (insns): Add entries for crc32 mnemonics.
622 (arm_extensions): Add entry for crc.
623
8e723a10
CLT
6242013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
625
626 * write.h (struct fix): Add fx_dot_frag field.
627 (dot_frag): Declare.
628 * write.c (dot_frag): New variable.
629 (fix_new_internal): Set fx_dot_frag field with dot_frag.
630 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
631 * expr.c (expr): Save value of frag_now in dot_frag when setting
632 dot_value.
633 * read.c (emit_expr): Likewise. Delete comments.
634
be05d201
L
6352013-03-07 H.J. Lu <hongjiu.lu@intel.com>
636
637 * config/tc-i386.c (flag_code_names): Removed.
638 (i386_index_check): Rewrote.
639
62b0d0d5
YZ
6402013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
641
642 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
643 add comment.
644 (aarch64_double_precision_fmovable): New function.
645 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
646 function; handle hexadecimal representation of IEEE754 encoding.
647 (parse_operands): Update the call to parse_aarch64_imm_float.
648
165de32a
L
6492013-02-28 H.J. Lu <hongjiu.lu@intel.com>
650
651 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
652 (check_hle): Updated.
653 (md_assemble): Likewise.
654 (parse_insn): Likewise.
655
d5de92cf
L
6562013-02-28 H.J. Lu <hongjiu.lu@intel.com>
657
658 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 659 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
660 (parse_insn): Remove expecting_string_instruction. Set
661 i.rep_prefix.
662
e60bb1dd
YZ
6632013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
664
665 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
666
aeebdd9b
YZ
6672013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
668
669 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
670 for system registers.
671
4107ae22
DD
6722013-02-27 DJ Delorie <dj@redhat.com>
673
674 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
675 (rl78_op): Handle %code().
676 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
677 (tc_gen_reloc): Likwise; convert to a computed reloc.
678 (md_apply_fix): Likewise.
679
151fa98f
NC
6802013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
681
682 * config/rl78-parse.y: Fix encoding of DIVWU insn.
683
70a8bc5b 6842013-02-25 Terry Guo <terry.guo@arm.com>
685
686 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
687 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
688 list of accepted CPUs.
689
5c111e37
L
6902013-02-19 H.J. Lu <hongjiu.lu@intel.com>
691
692 PR gas/15159
693 * config/tc-i386.c (cpu_arch): Add ".smap".
694
695 * doc/c-i386.texi: Document smap.
696
8a75745d
MR
6972013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
698
699 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
700 mips_assembling_insn appropriately.
701 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
702
79850f26
MR
7032013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
704
cf29fc61 705 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
706 extraneous braces.
707
4c261dff
NC
7082013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
709
5c111e37 710 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 711
ea33f281
NC
7122013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
713
714 * configure.tgt: Add nios2-*-rtems*.
715
a1ccaec9
YZ
7162013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
717
718 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
719 NULL.
720
0aa27725
RS
7212013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
722
723 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
724 (macro): Use it. Assert that trunc.w.s is not used for r5900.
725
da4339ed
NC
7262013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
727
728 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
729 core.
730
36591ba1 7312013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 732 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
733
734 Based on patches from Altera Corporation.
735
736 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
737 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
738 * Makefile.in: Regenerated.
739 * configure.tgt: Add case for nios2*-linux*.
740 * config/obj-elf.c: Conditionally include elf/nios2.h.
741 * config/tc-nios2.c: New file.
742 * config/tc-nios2.h: New file.
743 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
744 * doc/Makefile.in: Regenerated.
745 * doc/all.texi: Set NIOSII.
746 * doc/as.texinfo (Overview): Add Nios II options.
747 (Machine Dependencies): Include c-nios2.texi.
748 * doc/c-nios2.texi: New file.
749 * NEWS: Note Altera Nios II support.
750
94d4433a
AM
7512013-02-06 Alan Modra <amodra@gmail.com>
752
753 PR gas/14255
754 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
755 Don't skip fixups with fx_subsy non-NULL.
756 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
757 with fx_subsy non-NULL.
758
ace9af6f
L
7592013-02-04 H.J. Lu <hongjiu.lu@intel.com>
760
761 * doc/c-metag.texi: Add "@c man" markers.
762
89d67ed9
AM
7632013-02-04 Alan Modra <amodra@gmail.com>
764
765 * write.c (fixup_segment): Return void. Delete seg_reloc_count
766 related code.
767 (TC_ADJUST_RELOC_COUNT): Delete.
768 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
769
89072bd6
AM
7702013-02-04 Alan Modra <amodra@gmail.com>
771
772 * po/POTFILES.in: Regenerate.
773
f9b2d544
NC
7742013-01-30 Markos Chandras <markos.chandras@imgtec.com>
775
776 * config/tc-metag.c: Make SWAP instruction less permissive with
777 its operands.
778
392ca752
DD
7792013-01-29 DJ Delorie <dj@redhat.com>
780
781 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
782 relocs in .word/.etc statements.
783
427d0db6
RM
7842013-01-29 Roland McGrath <mcgrathr@google.com>
785
786 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
787 immediate value for 8-bit offset" error so it shows line info.
788
4faf939a
JM
7892013-01-24 Joseph Myers <joseph@codesourcery.com>
790
791 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
792 for 64-bit output.
793
78c8d46c
NC
7942013-01-24 Nick Clifton <nickc@redhat.com>
795
796 * config/tc-v850.c: Add support for e3v5 architecture.
797 * doc/c-v850.texi: Mention new support.
798
fb5b7503
NC
7992013-01-23 Nick Clifton <nickc@redhat.com>
800
801 PR gas/15039
802 * config/tc-avr.c: Include dwarf2dbg.h.
803
8ce3d284
L
8042013-01-18 H.J. Lu <hongjiu.lu@intel.com>
805
806 * config/tc-i386.c (reloc): Support size relocation only for ELF.
807 (tc_i386_fix_adjustable): Likewise.
808 (lex_got): Likewise.
809 (tc_gen_reloc): Likewise.
810
f5555712
YZ
8112013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
812
813 * config/tc-aarch64.c (output_operand_error_record): Change to output
814 the out-of-range error message as value-expected message if there is
815 only one single value in the expected range.
816 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
817 LSL #0 as a programmer-friendly feature.
818
8fd4256d
L
8192013-01-16 H.J. Lu <hongjiu.lu@intel.com>
820
821 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
822 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
823 BFD_RELOC_64_SIZE relocations.
824 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
825 for it.
826 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
827 relocations against local symbols.
828
a5840dce
AM
8292013-01-16 Alan Modra <amodra@gmail.com>
830
831 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
832 finding some sort of toc syntax error, and break to avoid
833 compiler uninit warning.
834
af89796a
L
8352013-01-15 H.J. Lu <hongjiu.lu@intel.com>
836
837 PR gas/15019
838 * config/tc-i386.c (lex_got): Increment length by 1 if the
839 relocation token is removed.
840
dd42f060
NC
8412013-01-15 Nick Clifton <nickc@redhat.com>
842
843 * config/tc-v850.c (md_assemble): Allow signed values for
844 V850E_IMMEDIATE.
845
464e3686
SK
8462013-01-11 Sean Keys <skeys@ipdatasys.com>
847
848 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 849 git to cvs.
464e3686 850
5817ffd1
PB
8512013-01-10 Peter Bergner <bergner@vnet.ibm.com>
852
853 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
854 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
855 * config/tc-ppc.c (md_show_usage): Likewise.
856 (ppc_handle_align): Handle power8's group ending nop.
857
f4b1f6a9
SK
8582013-01-10 Sean Keys <skeys@ipdatasys.com>
859
860 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 861 that the assember exits after the opcodes have been printed.
f4b1f6a9 862
34bca508
L
8632013-01-10 H.J. Lu <hongjiu.lu@intel.com>
864
865 * app.c: Remove trailing white spaces.
866 * as.c: Likewise.
867 * as.h: Likewise.
868 * cond.c: Likewise.
869 * dw2gencfi.c: Likewise.
870 * dwarf2dbg.h: Likewise.
871 * ecoff.c: Likewise.
872 * input-file.c: Likewise.
873 * itbl-lex.h: Likewise.
874 * output-file.c: Likewise.
875 * read.c: Likewise.
876 * sb.c: Likewise.
877 * subsegs.c: Likewise.
878 * symbols.c: Likewise.
879 * write.c: Likewise.
880 * config/tc-i386.c: Likewise.
881 * doc/Makefile.am: Likewise.
882 * doc/Makefile.in: Likewise.
883 * doc/c-aarch64.texi: Likewise.
884 * doc/c-alpha.texi: Likewise.
885 * doc/c-arc.texi: Likewise.
886 * doc/c-arm.texi: Likewise.
887 * doc/c-avr.texi: Likewise.
888 * doc/c-bfin.texi: Likewise.
889 * doc/c-cr16.texi: Likewise.
890 * doc/c-d10v.texi: Likewise.
891 * doc/c-d30v.texi: Likewise.
892 * doc/c-h8300.texi: Likewise.
893 * doc/c-hppa.texi: Likewise.
894 * doc/c-i370.texi: Likewise.
895 * doc/c-i386.texi: Likewise.
896 * doc/c-i860.texi: Likewise.
897 * doc/c-m32c.texi: Likewise.
898 * doc/c-m32r.texi: Likewise.
899 * doc/c-m68hc11.texi: Likewise.
900 * doc/c-m68k.texi: Likewise.
901 * doc/c-microblaze.texi: Likewise.
902 * doc/c-mips.texi: Likewise.
903 * doc/c-msp430.texi: Likewise.
904 * doc/c-mt.texi: Likewise.
905 * doc/c-s390.texi: Likewise.
906 * doc/c-score.texi: Likewise.
907 * doc/c-sh.texi: Likewise.
908 * doc/c-sh64.texi: Likewise.
909 * doc/c-tic54x.texi: Likewise.
910 * doc/c-tic6x.texi: Likewise.
911 * doc/c-v850.texi: Likewise.
912 * doc/c-xc16x.texi: Likewise.
913 * doc/c-xgate.texi: Likewise.
914 * doc/c-xtensa.texi: Likewise.
915 * doc/c-z80.texi: Likewise.
916 * doc/internals.texi: Likewise.
917
4c665b71
RM
9182013-01-10 Roland McGrath <mcgrathr@google.com>
919
920 * hash.c (hash_new_sized): Make it global.
921 * hash.h: Declare it.
922 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
923 pass a small size.
924
a3c62988
NC
9252013-01-10 Will Newton <will.newton@imgtec.com>
926
927 * Makefile.am: Add Meta.
928 * Makefile.in: Regenerate.
929 * config/tc-metag.c: New file.
930 * config/tc-metag.h: New file.
931 * configure.tgt: Add Meta.
932 * doc/Makefile.am: Add Meta.
933 * doc/Makefile.in: Regenerate.
934 * doc/all.texi: Add Meta.
935 * doc/as.texiinfo: Document Meta options.
936 * doc/c-metag.texi: New file.
937
b37df7c4
SE
9382013-01-09 Steve Ellcey <sellcey@mips.com>
939
940 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
941 calls.
942 * config/tc-mips.c (internalError): Remove, replace with abort.
943
a3251895
YZ
9442013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
945
946 * config/tc-aarch64.c (parse_operands): Change to compare the result
947 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
948
8ab8155f
NC
9492013-01-07 Nick Clifton <nickc@redhat.com>
950
951 PR gas/14887
952 * config/tc-arm.c (skip_past_char): Skip whitespace before the
953 anticipated character.
954 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
955 here as it is no longer needed.
956
a4ac1c42
AS
9572013-01-06 Andreas Schwab <schwab@linux-m68k.org>
958
959 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
960 * doc/c-score.texi (SCORE-Opts): Likewise.
961 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
962
e407c74b
NC
9632013-01-04 Juergen Urban <JuergenUrban@gmx.de>
964
965 * config/tc-mips.c: Add support for MIPS r5900.
966 Add M_LQ_AB and M_SQ_AB to support large values for instructions
967 lq and sq.
968 (can_swap_branch_p, get_append_method): Detect some conditional
969 short loops to fix a bug on the r5900 by NOP in the branch delay
970 slot.
971 (M_MUL): Support 3 operands in multu on r5900.
972 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
973 (s_mipsset): Force 32 bit floating point on r5900.
974 (mips_ip): Check parameter range of instructions mfps and mtps on
975 r5900.
976 * configure.in: Detect CPU type when target string contains r5900
977 (e.g. mips64r5900el-linux-gnu).
978
62658407
L
9792013-01-02 H.J. Lu <hongjiu.lu@intel.com>
980
981 * as.c (parse_args): Update copyright year to 2013.
982
95830fd1
YZ
9832013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
984
985 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
986 and "cortex57".
987
517bb291 9882013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 989
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990 PR gas/14987
991 * config/tc-arm.c (parse_address_main): Skip whitespace before a
992 closing bracket.
d709e4e6 993
517bb291 994For older changes see ChangeLog-2012
08d56133 995\f
517bb291 996Copyright (C) 2013 Free Software Foundation, Inc.
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997
998Copying and distribution of this file, with or without modification,
999are permitted in any medium without royalty provided the copyright
1000notice and this notice are preserved.
1001
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1002Local Variables:
1003mode: change-log
1004left-margin: 8
1005fill-column: 74
1006version-control: never
1007End: