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GDB kills itself instead of interrupting inferior
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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a0046408
L		 12013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
2
3 * config/tc-i386.c (cpu_arch): Add .sha.
4 * doc/c-i386.texi: Document sha/.sha.
5
7e8b059b
L		 62013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
7 Kirill Yukhin <kirill.yukhin@intel.com>
8 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
9
10 * config/tc-i386.c (BND_PREFIX): New.
11 (struct _i386_insn): Add new field bnd_prefix.
12 (add_bnd_prefix): New.
13 (cpu_arch): Add MPX.
14 (i386_operand_type): Add regbnd.
15 (md_assemble): Handle BND prefixes.
16 (parse_insn): Likewise.
17 (output_branch): Likewise.
18 (output_jump): Likewise.
19 (build_modrm_byte): Handle regbnd.
20 (OPTION_MADD_BND_PREFIX): New.
21 (md_longopts): Add entry for 'madd-bnd-prefix'.
22 (md_parse_option): Handle madd-bnd-prefix option.
23 (md_show_usage): Add description for madd-bnd-prefix
24 option.
25 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
26
7fa9fcb6
TG		 272013-07-24 Tristan Gingold <gingold@adacore.com>
28
29 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
30 xcoff targets.
31
614eb277
AK		 322013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
33
34 * config/tc-s390.c (s390_machine): Don't force the .machine
35 argument to lower case.
36
e673710a
KT		 372013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38
39 * config/tc-arm.c (s_arm_arch_extension): Improve error message
40 for invalid extension.
41
69091a2c
YZ		 422013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
43
44 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
45 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
46 (aarch64_abi): New variable.
47 (ilp32_p): Change to be a macro.
48 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
49 (struct aarch64_option_abi_value_table): New struct.
50 (aarch64_abis): New table.
51 (aarch64_parse_abi): New function.
52 (aarch64_long_opts): Add entry for -mabi=.
53 * doc/as.texinfo (Target AArch64 options): Document -mabi.
54 * doc/c-aarch64.texi: Likewise.
55
faf786e6
NC		 562013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
57
58 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
59 unsigned comparison.
60
f0c00282
NC		 612013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
62
63 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
64 RX610.
65 * config/rx-parse.y: (rx_check_float_support): Add function to
66 check floating point operation support for target RX100 and
67 RX200.
68 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
69 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
70 RX200, RX600, and RX610
71
8c997c27
NC		 722013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
73
74 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
75
8be59acb
NC		 762013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
77
78 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
79 * doc/c-avr.texi: Likewise.
80
4a06e5a2
RS		 812013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
82
83 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
84 error with older GCCs.
85 (mips16_macro_build): Dereference args.
86
a92713e6
RS		 872013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
88
89 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
90 New functions, split out from...
91 (reg_lookup): ...here. Remove itbl support.
92 (reglist_lookup): Delete.
93 (mips_operand_token_type): New enum.
94 (mips_operand_token): New structure.
95 (mips_operand_tokens): New variable.
96 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
97 (mips_parse_arguments): New functions.
98 (md_begin): Initialize mips_operand_tokens.
99 (mips_arg_info): Add a token field. Remove optional_reg field.
100 (match_char, match_expression): New functions.
101 (match_const_int): Use match_expression. Remove "s" argument
102 and return a boolean result. Remove O_register handling.
103 (match_regno, match_reg, match_reg_range): New functions.
104 (match_int_operand, match_mapped_int_operand, match_msb_operand)
105 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
106 (match_addiusp_operand, match_clo_clz_dest_operand)
107 (match_lwm_swm_list_operand, match_entry_exit_operand)
108 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
109 (match_tied_reg_operand): Remove "s" argument and return a boolean
110 result. Match tokens rather than text. Update calls to
111 match_const_int. Rely on match_regno to call check_regno.
112 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
113 "arg" argument. Return a boolean result.
114 (parse_float_constant): Replace with...
115 (match_float_constant): ...this new function.
116 (match_operand): Remove "s" argument and return a boolean result.
117 Update calls to subfunctions.
118 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
119 rather than string-parsing routines. Update handling of optional
120 registers for token scheme.
121
89565f1b
RS		 1222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
123
124 * config/tc-mips.c (parse_float_constant): Split out from...
125 (mips_ip): ...here.
126
3c14a432
RS		 1272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
130 Delete.
131
364215c8
RS		 1322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
135 (match_entry_exit_operand): New function.
136 (match_save_restore_list_operand): Likewise.
137 (match_operand): Use them.
138 (check_absolute_expr): Delete.
139 (mips16_ip): Rewrite main parsing loop to use mips_operands.
140
9e12b7a2
RS		 1412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c: Enable functions commented out in previous patch.
144 (SKIP_SPACE_TABS): Move further up file.
145 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
146 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
147 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
148 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
149 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
150 (micromips_imm_b_map, micromips_imm_c_map): Delete.
151 (mips_lookup_reg_pair): Delete.
152 (macro): Use report_bad_range and report_bad_field.
153 (mips_immed, expr_const_in_range): Delete.
154 (mips_ip): Rewrite main parsing loop to use new functions.
155
a1d78564
RS		 1562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
159 Change return type to bfd_boolean.
160 (report_bad_range, report_bad_field): New functions.
161 (mips_arg_info): New structure.
162 (match_const_int, convert_reg_type, check_regno, match_int_operand)
163 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
164 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
165 (match_addiusp_operand, match_clo_clz_dest_operand)
166 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
167 (match_pc_operand, match_tied_reg_operand, match_operand)
168 (check_completed_insn): New functions, commented out for now.
169
e077a1c8
RS		 1702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
171
172 * config/tc-mips.c (insn_insert_operand): New function.
173 (macro_build, mips16_macro_build): Put null character check
174 in the for loop and convert continues to breaks. Use operand
175 structures to handle constant operands.
176
ab902481
RS		 1772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
178
179 * config/tc-mips.c (validate_mips_insn): Move further up file.
180 Add insn_bits and decode_operand arguments. Use the mips_operand
181 fields to work out which bits an operand occupies. Detect double
182 definitions.
183 (validate_micromips_insn): Move further up file. Call into
184 validate_mips_insn.
185
2f8b73cc
RS		 1862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
187
188 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
189
c8276761
RS		 1902013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
191
192 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
193 and "~".
194 (macro): Update accordingly.
195
77bd4346
RS		 1962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
197
198 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
199 (imm_reloc): Delete.
200 (md_assemble): Remove imm_reloc handling.
201 (mips_ip): Update commentary. Use offset_expr and offset_reloc
202 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
203 Use a temporary array rather than imm_reloc when parsing
204 constant expressions. Remove imm_reloc initialization.
205 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
206 for the relaxable field. Use a relax_char variable to track the
207 type of this field. Remove imm_reloc initialization.
208
cc537e56
RS		 2092013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
210
211 * config/tc-mips.c (mips16_ip): Handle "I".
212
ba92f887
MR		 2132013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
214
215 * config/tc-mips.c (mips_flag_nan2008): New variable.
216 (options): Add OPTION_NAN enum value.
217 (md_longopts): Handle it.
218 (md_parse_option): Likewise.
219 (s_nan): New function.
220 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
221 (md_show_usage): Add -mnan.
222
223 * doc/as.texinfo (Overview): Add -mnan.
224 * doc/c-mips.texi (MIPS Opts): Document -mnan.
225 (MIPS NaN Encodings): New node. Document .nan directive.
226 (MIPS-Dependent): List the new node.
227
c1094734
TG		 2282013-07-09 Tristan Gingold <gingold@adacore.com>
229
230 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
231
0cbbe1b8
RS		 2322013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
233
234 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
235 for 'A' and assume that the constant has been elided if the result
236 is an O_register.
237
f2ae14a1
RS		 2382013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
239
240 * config/tc-mips.c (gprel16_reloc_p): New function.
241 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
242 BFD_RELOC_UNUSED.
243 (offset_high_part, small_offset_p): New functions.
244 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
245 register load and store macros, handle the 16-bit offset case first.
246 If a 16-bit offset is not suitable for the instruction we're
247 generating, load it into the temporary register using
248 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
249 M_L_DAB code once the address has been constructed. For double load
250 and store macros, again handle the 16-bit offset case first.
251 If the second register cannot be accessed from the same high
252 part as the first, load it into AT using ADDRESS_ADDI_INSN.
253 Fix the handling of LD in cases where the first register is the
254 same as the base. Also handle the case where the offset is
255 not 16 bits and the second register cannot be accessed from the
256 same high part as the first. For unaligned loads and stores,
257 fuse the offbits == 12 and old "ab" handling. Apply this handling
258 whenever the second offset needs a different high part from the first.
259 Construct the offset using ADDRESS_ADDI_INSN where possible,
260 for offbits == 16 as well as offbits == 12. Use offset_reloc
261 when constructing the individual loads and stores.
262 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
263 and offset_reloc before matching against a particular opcode.
264 Handle elided 'A' constants. Allow 'A' constants to use
265 relocation operators.
266
5c324c16
RS		 2672013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
268
269 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
270 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
271 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
272
23e69e47
RS		 2732013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
276 Require the msb to be <= 31 for "+s". Check that the size is <= 31
277 for both "+s" and "+S".
278
27c5c572
RS		 2792013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
280
281 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
282 (mips_ip, mips16_ip): Handle "+i".
283
e76ff5ab
RS		 2842013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
285
286 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
287 (micromips_to_32_reg_h_map): Rename to...
288 (micromips_to_32_reg_h_map1): ...this.
289 (micromips_to_32_reg_i_map): Rename to...
290 (micromips_to_32_reg_h_map2): ...this.
291 (mips_lookup_reg_pair): New function.
292 (gpr_write_mask, macro): Adjust after above renaming.
293 (validate_micromips_insn): Remove "mi" handling.
294 (mips_ip): Likewise. Parse both registers in a pair for "mh".
295
fa7616a4
RS		 2962013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
297
298 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
299 (mips_ip): Remove "+D" and "+T" handling.
300
fb798c50
AK		 3012013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
302
303 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
304 relocs.
305
2c0a3565
MS		 3062013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
307
4aa2c5e2
MS		 308 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
309
3102013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
311
2c0a3565
MS		 312 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
313 (aarch64_force_relocation): Likewise.
314
f40da81b
AM		 3152013-07-02 Alan Modra <amodra@gmail.com>
316
317 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
318
81566a9b
MR		 3192013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
320
321 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
322 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
323 Replace @sc{mips16} with literal `MIPS16'.
324 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
325
a6bb11b2
YZ		 3262013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
327
328 * config/tc-aarch64.c (reloc_table): Replace
329 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
330 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
331 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
332 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
333 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
334 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
335 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
336 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
337 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
338 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
339 (aarch64_force_relocation): Likewise.
340
cec5225b
YZ		 3412013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
342
343 * config/tc-aarch64.c (ilp32_p): New static variable.
344 (elf64_aarch64_target_format): Return the target according to the
345 value of 'ilp32_p'.
346 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
347 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
348 (aarch64_dwarf2_addr_size): New function.
349 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
350 (DWARF2_ADDR_SIZE): New define.
351
e335d9cb
RS		 3522013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
353
354 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
355
18870af7
RS		 3562013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
357
358 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
359
833794fc
MR		 3602013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
361
362 * config/tc-mips.c (mips_set_options): Add insn32 member.
363 (mips_opts): Initialize it.
364 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
365 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
366 (md_longopts): Add "minsn32" and "mno-insn32" options.
367 (is_size_valid): Handle insn32 mode.
368 (md_assemble): Pass instruction string down to macro.
369 (brk_fmt): Add second dimension and insn32 mode initializers.
370 (mfhl_fmt): Likewise.
371 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
372 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
373 (macro_build_jalr, move_register): Handle insn32 mode.
374 (macro_build_branch_rs): Likewise.
375 (macro): Handle insn32 mode.
376 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
377 (mips_ip): Handle insn32 mode.
378 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
379 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
380 (mips_handle_align): Handle insn32 mode.
381 (md_show_usage): Add -minsn32 and -mno-insn32.
382
383 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
384 -mno-insn32 options.
385 (-minsn32, -mno-insn32): New options.
386 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
387 options.
388 (MIPS assembly options): New node. Document .set insn32 and
389 .set noinsn32.
390 (MIPS-Dependent): List the new node.
391
d1706f38
NC		 3922013-06-25 Nick Clifton <nickc@redhat.com>
393
394 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
395 the PC in indirect addressing on 430xv2 parts.
396 (msp430_operands): Add version test to hardware bug encoding
397 restrictions.
398
477330fc
RM		 3992013-06-24 Roland McGrath <mcgrathr@google.com>
400
d996d970
RM		 401 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
402 so it skips whitespace before it.
403 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
404
477330fc
RM		 405 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
406 (arm_reg_parse_multi): Skip whitespace first.
407 (parse_reg_list): Likewise.
408 (parse_vfp_reg_list): Likewise.
409 (s_arm_unwind_save_mmxwcg): Likewise.
410
24382199
NC		 4112013-06-24 Nick Clifton <nickc@redhat.com>
412
413 PR gas/15623
414 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
415
c3678916
RS		 4162013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
417
418 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
419
42429eac
RS		 4202013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
421
422 * config/tc-mips.c: Assert that offsetT and valueT are at least
423 8 bytes in size.
424 (GPR_SMIN, GPR_SMAX): New macros.
425 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
426
f3ded42a
RS		 4272013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
428
429 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
430 conditions. Remove any code deselected by them.
431 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
432
e8044f35
RS		 4332013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
434
435 * NEWS: Note removal of ECOFF support.
436 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
437 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
438 (MULTI_CFILES): Remove config/e-mipsecoff.c.
439 * Makefile.in: Regenerate.
440 * configure.in: Remove MIPS ECOFF references.
441 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
442 Delete cases.
443 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
444 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
445 (mips-*-*): ...this single case.
446 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
447 MIPS emulations to be e-mipself*.
448 * configure: Regenerate.
449 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
450 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
451 (mips-*-sysv*): Remove coff and ecoff cases.
452 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
453 * ecoff.c: Remove reference to MIPS ECOFF.
454 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
455 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
456 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
457 (mips_hi_fixup): Tweak comment.
458 (append_insn): Require a howto.
459 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
460
98508b2a
RS		 4612013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
462
463 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
464 Use "CPU" instead of "cpu".
465 * doc/c-mips.texi: Likewise.
466 (MIPS Opts): Rename to MIPS Options.
467 (MIPS option stack): Rename to MIPS Option Stack.
468 (MIPS ASE instruction generation overrides): Rename to
469 MIPS ASE Instruction Generation Overrides (for now).
470 (MIPS floating-point): Rename to MIPS Floating-Point.
471
fc16f8cc
RS		 4722013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
473
474 * doc/c-mips.texi (MIPS Macros): New section.
475 (MIPS Object): Replace with...
476 (MIPS Small Data): ...this new section.
477
5a7560b5
RS		 4782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
481 Capitalize name. Use @kindex instead of @cindex for .set entries.
482
a1b86ab7
RS		 4832013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
484
485 * doc/c-mips.texi (MIPS Stabs): Remove section.
486
c6278170
RS		 4872013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
488
489 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
490 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
491 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
492 (ISA_SUPPORTS_VIRT64_ASE): Delete.
493 (mips_ase): New structure.
494 (mips_ases): New table.
495 (FP64_ASES): New macro.
496 (mips_ase_groups): New array.
497 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
498 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
499 functions.
500 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
501 (md_parse_option): Use mips_ases and mips_set_ase instead of
502 separate case statements for each ASE option.
503 (mips_after_parse_args): Use FP64_ASES. Use
504 mips_check_isa_supports_ases to check the ASEs against
505 other options.
506 (s_mipsset): Use mips_ases and mips_set_ase instead of
507 separate if statements for each ASE option. Use
508 mips_check_isa_supports_ases, even when a non-ASE option
509 is specified.
510
63a4bc21
KT		 5112013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
512
513 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
514
c31f3936
RS		 5152013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
516
517 * config/tc-mips.c (md_shortopts, options, md_longopts)
518 (md_longopts_size): Move earlier in file.
519
846ef2d0
RS		 5202013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
521
522 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
523 with a single "ase" bitmask.
524 (mips_opts): Update accordingly.
525 (file_ase, file_ase_explicit): New variables.
526 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
527 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
528 (ISA_HAS_ROR): Adjust for mips_set_options change.
529 (is_opcode_valid): Take the base ase mask directly from mips_opts.
530 (mips_ip): Adjust for mips_set_options change.
531 (md_parse_option): Likewise. Update file_ase_explicit.
532 (mips_after_parse_args): Adjust for mips_set_options change.
533 Use bitmask operations to select the default ASEs. Set file_ase
534 rather than individual per-ASE variables.
535 (s_mipsset): Adjust for mips_set_options change.
536 (mips_elf_final_processing): Test file_ase rather than
537 file_ase_mdmx. Remove commented-out code.
538
d16afab6
RS		 5392013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
540
541 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
542 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
543 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
544 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
545 (mips_after_parse_args): Use the new "ase" field to choose
546 the default ASEs.
547 (mips_cpu_info_table): Move ASEs from the "flags" field to the
548 "ase" field.
549
e83a675f
RE		 5502013-06-18 Richard Earnshaw <rearnsha@arm.com>
551
552 * config/tc-arm.c (symbol_preemptible): New function.
553 (relax_branch): Use it.
554
7f3c4072
CM		 5552013-06-17 Catherine Moore <clm@codesourcery.com>
556 Maciej W. Rozycki <macro@codesourcery.com>
557 Chao-Ying Fu <fu@mips.com>
558
559 * config/tc-mips.c (mips_set_options): Add ase_eva.
560 (mips_set_options mips_opts): Add ase_eva.
561 (file_ase_eva): Declare.
562 (ISA_SUPPORTS_EVA_ASE): Define.
563 (IS_SEXT_9BIT_NUM): Define.
564 (MIPS_CPU_ASE_EVA): Define.
565 (is_opcode_valid): Add support for ase_eva.
566 (macro_build): Likewise.
567 (macro): Likewise.
568 (validate_mips_insn): Likewise.
569 (validate_micromips_insn): Likewise.
570 (mips_ip): Likewise.
571 (options): Add OPTION_EVA and OPTION_NO_EVA.
572 (md_longopts): Add -meva and -mno-eva.
573 (md_parse_option): Process new options.
574 (mips_after_parse_args): Check for valid EVA combinations.
575 (s_mipsset): Likewise.
576
e410add4
RS		 5772013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
578
579 * dwarf2dbg.h (dwarf2_move_insn): Declare.
580 * dwarf2dbg.c (line_subseg): Add pmove_tail.
581 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
582 (dwarf2_gen_line_info_1): Update call accordingly.
583 (dwarf2_move_insn): New function.
584 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
585
6a50d470
RS		 5862013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
587
588 Revert:
589
590 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
591
592 PR gas/13024
593 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
594 (dwarf2_gen_line_info_1): Delete.
595 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
596 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
597 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
598 (dwarf2_directive_loc): Push previous .locs instead of generating
599 them immediately.
600
f122319e
CF		 6012013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
602
603 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
604 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
605
909c7f9c
NC		 6062013-06-13 Nick Clifton <nickc@redhat.com>
607
608 PR gas/15602
609 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
610 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
611 function. Generates an error if the adjusted offset is out of a
612 16-bit range.
613
5d5755a7
SL		 6142013-06-12 Sandra Loosemore <sandra@codesourcery.com>
615
616 * config/tc-nios2.c (md_apply_fix): Mask constant
617 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
618
3bf0dbfb
MR		 6192013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
620
621 * config/tc-mips.c (append_insn): Don't do branch relaxation for
622 MIPS-3D instructions either.
623 (md_convert_frag): Update the COPx branch mask accordingly.
624
625 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
626 option.
627 * doc/as.texinfo (Overview): Add --relax-branch and
628 --no-relax-branch.
629 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
630 --no-relax-branch.
631
9daf7bab
SL		 6322013-06-09 Sandra Loosemore <sandra@codesourcery.com>
633
634 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
635 omitted.
636
d301a56b
RS		 6372013-06-08 Catherine Moore <clm@codesourcery.com>
638
639 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
640 (is_opcode_valid_16): Pass ase value to opcode_is_member.
641 (append_insn): Change INSN_xxxx to ASE_xxxx.
642
7bab7634
DC		 6432013-06-01 George Thomas <george.thomas@atmel.com>
644
645 * gas/config/tc-avr.c: Change ISA for devices with USB support to
646 AVR_ISA_XMEGAU
647
f60cf82f
L		 6482013-05-31 H.J. Lu <hongjiu.lu@intel.com>
649
650 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
651 for ELF.
652
a3f278e2
CM		 6532013-05-31 Paul Brook <paul@codesourcery.com>
654
655 gas/
656 * config/tc-mips.c (s_ehword): New.
657
067ec077
CM		 6582013-05-30 Paul Brook <paul@codesourcery.com>
659
660 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
661
d6101ac2
MR		 6622013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
663
664 * write.c (resolve_reloc_expr_symbols): On REL targets don't
665 convert relocs who have no relocatable field either. Rephrase
666 the conditional so that the PC-relative check is only applied
667 for REL targets.
668
f19ccbda
MR		 6692013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
670
671 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
672 calculation.
673
418009c2
YZ		 6742013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
675
676 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 677 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 678 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
679 (md_apply_fix): Likewise.
680 (aarch64_force_relocation): Likewise.
681
0a8897c7
KT		 6822013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
683
684 * config/tc-arm.c (it_fsm_post_encode): Improve
685 warning messages about deprecated IT block formats.
686
89d2a2a3
MS		 6872013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
688
689 * config/tc-aarch64.c (md_apply_fix): Move value range checking
690 inside fx_done condition.
691
c77c0862
RS		 6922013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
693
694 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
695
c0637f3a
PB		 6962013-05-20 Peter Bergner <bergner@vnet.ibm.com>
697
698 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
699 and clean up warning when using PRINT_OPCODE_TABLE.
700
5656a981
AM		 7012013-05-20 Alan Modra <amodra@gmail.com>
702
703 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
704 and data fixups performing shift/high adjust/sign extension on
705 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
706 when writing data fixups rather than recalculating size.
707
997b26e8
JBG		 7082013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
709
710 * doc/c-msp430.texi: Fix typo.
711
9f6e76f4
TG		 7122013-05-16 Tristan Gingold <gingold@adacore.com>
713
714 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
715 are also TOC symbols.
716
638d3803
NC		 7172013-05-16 Nick Clifton <nickc@redhat.com>
718
719 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
720 Add -mcpu command to specify core type.
997b26e8 721 * doc/c-msp430.texi: Update documentation.
638d3803 722
b015e599
AP		 7232013-05-09 Andrew Pinski <apinski@cavium.com>
724
725 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
726 (mips_opts): Update for the new field.
727 (file_ase_virt): New variable.
728 (ISA_SUPPORTS_VIRT_ASE): New macro.
729 (ISA_SUPPORTS_VIRT64_ASE): New macro.
730 (MIPS_CPU_ASE_VIRT): New define.
731 (is_opcode_valid): Handle ase_virt.
732 (macro_build): Handle "+J".
733 (validate_mips_insn): Likewise.
734 (mips_ip): Likewise.
735 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
736 (md_longopts): Add mvirt and mnovirt
737 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
738 (mips_after_parse_args): Handle ase_virt field.
739 (s_mipsset): Handle "virt" and "novirt".
740 (mips_elf_final_processing): Add a comment about virt ASE might need
741 a new flag.
742 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
743 * doc/c-mips.texi: Document -mvirt and -mno-virt.
744 Document ".set virt" and ".set novirt".
745
da8094d7
AM		 7462013-05-09 Alan Modra <amodra@gmail.com>
747
748 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
749 control of operand flag bits.
750
c5f8c205
AM		 7512013-05-07 Alan Modra <amodra@gmail.com>
752
753 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
754 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
755 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
756 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
757 (md_apply_fix): Set fx_no_overflow for assorted relocations.
758 Shift and sign-extend fieldval for use by some VLE reloc
759 operand->insert functions.
760
b47468a6
CM		 7612013-05-06 Paul Brook <paul@codesourcery.com>
762 Catherine Moore <clm@codesourcery.com>
763
c5f8c205
AM		 764 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
765 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 766 (md_apply_fix): Likewise.
767 (tc_gen_reloc): Likewise.
768
2de39019
CM		 7692013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
770
771 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
772 (mips_fix_adjustable): Adjust pc-relative check to use
773 limited_pc_reloc_p.
774
754e2bb9
RS		 7752013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
776
777 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
778 (s_mips_stab): Do not restrict to stabn only.
779
13761a11
NC		 7802013-05-02 Nick Clifton <nickc@redhat.com>
781
782 * config/tc-msp430.c: Add support for the MSP430X architecture.
783 Add code to insert a NOP instruction after any instruction that
784 might change the interrupt state.
785 Add support for the LARGE memory model.
786 Add code to initialise the .MSP430.attributes section.
787 * config/tc-msp430.h: Add support for the MSP430X architecture.
788 * doc/c-msp430.texi: Document the new -mL and -mN command line
789 options.
790 * NEWS: Mention support for the MSP430X architecture.
791
df26367c
MR		 7922013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
793
794 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
795 alpha*-*-linux*ecoff*.
796
f02d8318
CF		 7972013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
798
799 * config/tc-mips.c (mips_ip): Add sizelo.
800 For "+C", "+G", and "+H", set sizelo and compare against it.
801
b40bf0a2
NC		 8022013-04-29 Nick Clifton <nickc@redhat.com>
803
804 * as.c (Options): Add -gdwarf-sections.
805 (parse_args): Likewise.
806 * as.h (flag_dwarf_sections): Declare.
807 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
808 (process_entries): When -gdwarf-sections is enabled generate
809 fragmentary .debug_line sections.
810 (out_debug_line): Set the section for the .debug_line section end
811 symbol.
812 * doc/as.texinfo: Document -gdwarf-sections.
813 * NEWS: Mention -gdwarf-sections.
814
8eeccb77 8152013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 816
817 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
818 according to the target parameter. Don't call s_segm since s_segm
819 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
820 initialized yet.
821 (md_begin): Call s_segm according to target parameter from command
822 line.
823
49926cd0
AM		 8242013-04-25 Alan Modra <amodra@gmail.com>
825
826 * configure.in: Allow little-endian linux.
827 * configure: Regenerate.
828
e3031850
SL		 8292013-04-24 Sandra Loosemore <sandra@codesourcery.com>
830
831 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
832 "fstatus" control register to "eccinj".
833
cb948fc0
KT		 8342013-04-19 Kai Tietz <ktietz@redhat.com>
835
836 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
837
4455e9ad
JB		 8382013-04-15 Julian Brown <julian@codesourcery.com>
839
840 * expr.c (add_to_result, subtract_from_result): Make global.
841 * expr.h (add_to_result, subtract_from_result): Add prototypes.
842 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
843 subtract_from_result to handle extra bit of precision for .sleb128
844 directive operands.
845
956a6ba3
JB		 8462013-04-10 Julian Brown <julian@codesourcery.com>
847
848 * read.c (convert_to_bignum): Add sign parameter. Use it
849 instead of X_unsigned to determine sign of resulting bignum.
850 (emit_expr): Pass extra argument to convert_to_bignum.
851 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
852 X_extrabit to convert_to_bignum.
853 (parse_bitfield_cons): Set X_extrabit.
854 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
855 Initialise X_extrabit field as appropriate.
856 (add_to_result): New.
857 (subtract_from_result): New.
858 (expr): Use above.
859 * expr.h (expressionS): Add X_extrabit field.
860
eb9f3f00
JB		 8612013-04-10 Jan Beulich <jbeulich@suse.com>
862
863 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
864 register being PC when is_t or writeback, and use distinct
865 diagnostic for the latter case.
866
ccb84d65
JB		 8672013-04-10 Jan Beulich <jbeulich@suse.com>
868
869 * gas/config/tc-arm.c (parse_operands): Re-write
870 po_barrier_or_imm().
871 (do_barrier): Remove bogus constraint().
872 (do_t_barrier): Remove.
873
4d13caa0
NC		 8742013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
875
876 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
877 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
878 ATmega2564RFR2
879 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
880
16d02dc9
JB		 8812013-04-09 Jan Beulich <jbeulich@suse.com>
882
883 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
884 Use local variable Rt in more places.
885 (do_vmsr): Accept all control registers.
886
05ac0ffb
JB		 8872013-04-09 Jan Beulich <jbeulich@suse.com>
888
889 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
890 if there was none specified for moves between scalar and core
891 register.
892
2d51fb74
JB		 8932013-04-09 Jan Beulich <jbeulich@suse.com>
894
895 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
896 NEON_ALL_LANES case.
897
94dcf8bf
JB		 8982013-04-08 Jan Beulich <jbeulich@suse.com>
899
900 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
901 PC-relative VSTR.
902
1472d06f
JB		 9032013-04-08 Jan Beulich <jbeulich@suse.com>
904
905 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
906 entry to sp_fiq.
907
0c76cae8
AM		 9082013-04-03 Alan Modra <amodra@gmail.com>
909
910 * doc/as.texinfo: Add support to generate man options for h8300.
911 * doc/c-h8300.texi: Likewise.
912
92eb40d9
RR		 9132013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
914
915 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
916 Cortex-A57.
917
51dcdd4d
NC		 9182013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
919
920 PR binutils/15068
921 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
922
c5d685bf
NC		 9232013-03-26 Nick Clifton <nickc@redhat.com>
924
9b978282
NC		 925 PR gas/15295
926 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
927 start of the file each time.
928
c5d685bf
NC		 929 PR gas/15178
930 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
931 FreeBSD targets.
932
9699c833
TG		 9332013-03-26 Douglas B Rupp <rupp@gnat.com>
934
935 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
936 after fixup.
937
4755303e
WN		 9382013-03-21 Will Newton <will.newton@linaro.org>
939
940 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
941 pc-relative str instructions in Thumb mode.
942
81f5558e
NC		 9432013-03-21 Michael Schewe <michael.schewe@gmx.net>
944
945 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
946 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
947 R_H8_DISP32A16.
948 * config/tc-h8300.h: Remove duplicated defines.
949
71863e73
NC		 9502013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
951
952 PR gas/15282
953 * tc-avr.c (mcu_has_3_byte_pc): New function.
954 (tc_cfi_frame_initial_instructions): Call it to find return
955 address size.
956
795b8e6b
NC		 9572013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
958
959 PR gas/15095
960 * config/tc-tic6x.c (tic6x_try_encode): Handle
961 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
962 encode register pair numbers when required.
963
ba86b375
WN		 9642013-03-15 Will Newton <will.newton@linaro.org>
965
966 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
967 in vstr in Thumb mode for pre-ARMv7 cores.
968
9e6f3811
AS		 9692013-03-14 Andreas Schwab <schwab@suse.de>
970
971 * doc/c-arc.texi (ARC Directives): Revert last change and use
972 @itemize instead of @table.
973 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
974
b10bf8c5
NC		 9752013-03-14 Nick Clifton <nickc@redhat.com>
976
977 PR gas/15273
978 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
979 NULL message, instead just check ARM_CPU_IS_ANY directly.
980
ba724cfc
NC		 9812013-03-14 Nick Clifton <nickc@redhat.com>
982
983 PR gas/15212
9e6f3811 984 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 985 for table format.
986 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
987 to the @item directives.
988 (ARM-Neon-Alignment): Move to correct place in the document.
989 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
990 formatting.
991 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
992 @smallexample.
993
531a94fd
SL		 9942013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
995
996 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
997 case. Add default BAD_CASE to switch.
998
dad60f8e
SL		 9992013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1000
1001 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1002 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1003
dd5181d5
KT		 10042013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1005
1006 * config/tc-arm.c (crc_ext_armv8): New feature set.
1007 (UNPRED_REG): New macro.
1008 (do_crc32_1): New function.
1009 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1010 do_crc32ch, do_crc32cw): Likewise.
1011 (TUEc): New macro.
1012 (insns): Add entries for crc32 mnemonics.
1013 (arm_extensions): Add entry for crc.
1014
8e723a10
CLT		 10152013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1016
1017 * write.h (struct fix): Add fx_dot_frag field.
1018 (dot_frag): Declare.
1019 * write.c (dot_frag): New variable.
1020 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1021 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1022 * expr.c (expr): Save value of frag_now in dot_frag when setting
1023 dot_value.
1024 * read.c (emit_expr): Likewise. Delete comments.
1025
be05d201
L		 10262013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1027
1028 * config/tc-i386.c (flag_code_names): Removed.
1029 (i386_index_check): Rewrote.
1030
62b0d0d5
YZ		 10312013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1032
1033 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1034 add comment.
1035 (aarch64_double_precision_fmovable): New function.
1036 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1037 function; handle hexadecimal representation of IEEE754 encoding.
1038 (parse_operands): Update the call to parse_aarch64_imm_float.
1039
165de32a
L		 10402013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1041
1042 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1043 (check_hle): Updated.
1044 (md_assemble): Likewise.
1045 (parse_insn): Likewise.
1046
d5de92cf
L		 10472013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1048
1049 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1050 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1051 (parse_insn): Remove expecting_string_instruction. Set
1052 i.rep_prefix.
1053
e60bb1dd
YZ		 10542013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1055
1056 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1057
aeebdd9b
YZ		 10582013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1059
1060 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1061 for system registers.
1062
4107ae22
DD		 10632013-02-27 DJ Delorie <dj@redhat.com>
1064
1065 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1066 (rl78_op): Handle %code().
1067 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1068 (tc_gen_reloc): Likwise; convert to a computed reloc.
1069 (md_apply_fix): Likewise.
1070
151fa98f
NC		 10712013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1072
1073 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1074
70a8bc5b 10752013-02-25 Terry Guo <terry.guo@arm.com>
1076
1077 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1078 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1079 list of accepted CPUs.
1080
5c111e37
L		 10812013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1082
1083 PR gas/15159
1084 * config/tc-i386.c (cpu_arch): Add ".smap".
1085
1086 * doc/c-i386.texi: Document smap.
1087
8a75745d
MR		 10882013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1089
1090 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1091 mips_assembling_insn appropriately.
1092 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1093
79850f26
MR		 10942013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1095
cf29fc61 1096 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1097 extraneous braces.
1098
4c261dff
NC		 10992013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1100
5c111e37 1101 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1102
ea33f281
NC		 11032013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1104
1105 * configure.tgt: Add nios2-*-rtems*.
1106
a1ccaec9
YZ		 11072013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1108
1109 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1110 NULL.
1111
0aa27725
RS		 11122013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1113
1114 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1115 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1116
da4339ed
NC		 11172013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1118
1119 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1120 core.
1121
36591ba1 11222013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1123 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1124
1125 Based on patches from Altera Corporation.
1126
1127 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1128 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1129 * Makefile.in: Regenerated.
1130 * configure.tgt: Add case for nios2*-linux*.
1131 * config/obj-elf.c: Conditionally include elf/nios2.h.
1132 * config/tc-nios2.c: New file.
1133 * config/tc-nios2.h: New file.
1134 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1135 * doc/Makefile.in: Regenerated.
1136 * doc/all.texi: Set NIOSII.
1137 * doc/as.texinfo (Overview): Add Nios II options.
1138 (Machine Dependencies): Include c-nios2.texi.
1139 * doc/c-nios2.texi: New file.
1140 * NEWS: Note Altera Nios II support.
1141
94d4433a
AM		 11422013-02-06 Alan Modra <amodra@gmail.com>
1143
1144 PR gas/14255
1145 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1146 Don't skip fixups with fx_subsy non-NULL.
1147 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1148 with fx_subsy non-NULL.
1149
ace9af6f
L		 11502013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1151
1152 * doc/c-metag.texi: Add "@c man" markers.
1153
89d67ed9
AM		 11542013-02-04 Alan Modra <amodra@gmail.com>
1155
1156 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1157 related code.
1158 (TC_ADJUST_RELOC_COUNT): Delete.
1159 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1160
89072bd6
AM		 11612013-02-04 Alan Modra <amodra@gmail.com>
1162
1163 * po/POTFILES.in: Regenerate.
1164
f9b2d544
NC		 11652013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1166
1167 * config/tc-metag.c: Make SWAP instruction less permissive with
1168 its operands.
1169
392ca752
DD		 11702013-01-29 DJ Delorie <dj@redhat.com>
1171
1172 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1173 relocs in .word/.etc statements.
1174
427d0db6
RM		 11752013-01-29 Roland McGrath <mcgrathr@google.com>
1176
1177 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1178 immediate value for 8-bit offset" error so it shows line info.
1179
4faf939a
JM		 11802013-01-24 Joseph Myers <joseph@codesourcery.com>
1181
1182 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1183 for 64-bit output.
1184
78c8d46c
NC		 11852013-01-24 Nick Clifton <nickc@redhat.com>
1186
1187 * config/tc-v850.c: Add support for e3v5 architecture.
1188 * doc/c-v850.texi: Mention new support.
1189
fb5b7503
NC		 11902013-01-23 Nick Clifton <nickc@redhat.com>
1191
1192 PR gas/15039
1193 * config/tc-avr.c: Include dwarf2dbg.h.
1194
8ce3d284
L		 11952013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1196
1197 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1198 (tc_i386_fix_adjustable): Likewise.
1199 (lex_got): Likewise.
1200 (tc_gen_reloc): Likewise.
1201
f5555712
YZ		 12022013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1203
1204 * config/tc-aarch64.c (output_operand_error_record): Change to output
1205 the out-of-range error message as value-expected message if there is
1206 only one single value in the expected range.
1207 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1208 LSL #0 as a programmer-friendly feature.
1209
8fd4256d
L		 12102013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1211
1212 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1213 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1214 BFD_RELOC_64_SIZE relocations.
1215 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1216 for it.
1217 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1218 relocations against local symbols.
1219
a5840dce
AM		 12202013-01-16 Alan Modra <amodra@gmail.com>
1221
1222 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1223 finding some sort of toc syntax error, and break to avoid
1224 compiler uninit warning.
1225
af89796a
L		 12262013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1227
1228 PR gas/15019
1229 * config/tc-i386.c (lex_got): Increment length by 1 if the
1230 relocation token is removed.
1231
dd42f060
NC		 12322013-01-15 Nick Clifton <nickc@redhat.com>
1233
1234 * config/tc-v850.c (md_assemble): Allow signed values for
1235 V850E_IMMEDIATE.
1236
464e3686
SK		 12372013-01-11 Sean Keys <skeys@ipdatasys.com>
1238
1239 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1240 git to cvs.
464e3686 1241
5817ffd1
PB		 12422013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1243
1244 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1245 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1246 * config/tc-ppc.c (md_show_usage): Likewise.
1247 (ppc_handle_align): Handle power8's group ending nop.
1248
f4b1f6a9
SK		 12492013-01-10 Sean Keys <skeys@ipdatasys.com>
1250
1251 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1252 that the assember exits after the opcodes have been printed.
f4b1f6a9 1253
34bca508
L		 12542013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1255
1256 * app.c: Remove trailing white spaces.
1257 * as.c: Likewise.
1258 * as.h: Likewise.
1259 * cond.c: Likewise.
1260 * dw2gencfi.c: Likewise.
1261 * dwarf2dbg.h: Likewise.
1262 * ecoff.c: Likewise.
1263 * input-file.c: Likewise.
1264 * itbl-lex.h: Likewise.
1265 * output-file.c: Likewise.
1266 * read.c: Likewise.
1267 * sb.c: Likewise.
1268 * subsegs.c: Likewise.
1269 * symbols.c: Likewise.
1270 * write.c: Likewise.
1271 * config/tc-i386.c: Likewise.
1272 * doc/Makefile.am: Likewise.
1273 * doc/Makefile.in: Likewise.
1274 * doc/c-aarch64.texi: Likewise.
1275 * doc/c-alpha.texi: Likewise.
1276 * doc/c-arc.texi: Likewise.
1277 * doc/c-arm.texi: Likewise.
1278 * doc/c-avr.texi: Likewise.
1279 * doc/c-bfin.texi: Likewise.
1280 * doc/c-cr16.texi: Likewise.
1281 * doc/c-d10v.texi: Likewise.
1282 * doc/c-d30v.texi: Likewise.
1283 * doc/c-h8300.texi: Likewise.
1284 * doc/c-hppa.texi: Likewise.
1285 * doc/c-i370.texi: Likewise.
1286 * doc/c-i386.texi: Likewise.
1287 * doc/c-i860.texi: Likewise.
1288 * doc/c-m32c.texi: Likewise.
1289 * doc/c-m32r.texi: Likewise.
1290 * doc/c-m68hc11.texi: Likewise.
1291 * doc/c-m68k.texi: Likewise.
1292 * doc/c-microblaze.texi: Likewise.
1293 * doc/c-mips.texi: Likewise.
1294 * doc/c-msp430.texi: Likewise.
1295 * doc/c-mt.texi: Likewise.
1296 * doc/c-s390.texi: Likewise.
1297 * doc/c-score.texi: Likewise.
1298 * doc/c-sh.texi: Likewise.
1299 * doc/c-sh64.texi: Likewise.
1300 * doc/c-tic54x.texi: Likewise.
1301 * doc/c-tic6x.texi: Likewise.
1302 * doc/c-v850.texi: Likewise.
1303 * doc/c-xc16x.texi: Likewise.
1304 * doc/c-xgate.texi: Likewise.
1305 * doc/c-xtensa.texi: Likewise.
1306 * doc/c-z80.texi: Likewise.
1307 * doc/internals.texi: Likewise.
1308
4c665b71
RM		 13092013-01-10 Roland McGrath <mcgrathr@google.com>
1310
1311 * hash.c (hash_new_sized): Make it global.
1312 * hash.h: Declare it.
1313 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1314 pass a small size.
1315
a3c62988
NC		 13162013-01-10 Will Newton <will.newton@imgtec.com>
1317
1318 * Makefile.am: Add Meta.
1319 * Makefile.in: Regenerate.
1320 * config/tc-metag.c: New file.
1321 * config/tc-metag.h: New file.
1322 * configure.tgt: Add Meta.
1323 * doc/Makefile.am: Add Meta.
1324 * doc/Makefile.in: Regenerate.
1325 * doc/all.texi: Add Meta.
1326 * doc/as.texiinfo: Document Meta options.
1327 * doc/c-metag.texi: New file.
1328
b37df7c4
SE		 13292013-01-09 Steve Ellcey <sellcey@mips.com>
1330
1331 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1332 calls.
1333 * config/tc-mips.c (internalError): Remove, replace with abort.
1334
a3251895
YZ		 13352013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1336
1337 * config/tc-aarch64.c (parse_operands): Change to compare the result
1338 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1339
8ab8155f
NC		 13402013-01-07 Nick Clifton <nickc@redhat.com>
1341
1342 PR gas/14887
1343 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1344 anticipated character.
1345 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1346 here as it is no longer needed.
1347
a4ac1c42
AS		 13482013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1349
1350 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1351 * doc/c-score.texi (SCORE-Opts): Likewise.
1352 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1353
e407c74b
NC		 13542013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1355
1356 * config/tc-mips.c: Add support for MIPS r5900.
1357 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1358 lq and sq.
1359 (can_swap_branch_p, get_append_method): Detect some conditional
1360 short loops to fix a bug on the r5900 by NOP in the branch delay
1361 slot.
1362 (M_MUL): Support 3 operands in multu on r5900.
1363 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1364 (s_mipsset): Force 32 bit floating point on r5900.
1365 (mips_ip): Check parameter range of instructions mfps and mtps on
1366 r5900.
1367 * configure.in: Detect CPU type when target string contains r5900
1368 (e.g. mips64r5900el-linux-gnu).
1369
62658407
L		 13702013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1371
1372 * as.c (parse_args): Update copyright year to 2013.
1373
95830fd1
YZ		 13742013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1375
1376 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1377 and "cortex57".
1378
517bb291 13792013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1380
517bb291
NC		 1381 PR gas/14987
1382 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1383 closing bracket.
d709e4e6 1384
517bb291 1385For older changes see ChangeLog-2012
08d56133 1386\f
517bb291 1387Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1388
1389Copying and distribution of this file, with or without modification,
1390are permitted in any medium without royalty provided the copyright
1391notice and this notice are preserved.
1392
08d56133
NC		 1393Local Variables:
1394mode: change-log
1395left-margin: 8
1396fill-column: 74
1397version-control: never
1398End:
A mirror of the official binutils-gdb repository