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c5d685bf
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12013-03-26 Nick Clifton <nickc@redhat.com>
2
9b978282
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3 PR gas/15295
4 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
5 start of the file each time.
6
c5d685bf
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7 PR gas/15178
8 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
9 FreeBSD targets.
10
9699c833
TG
112013-03-26 Douglas B Rupp <rupp@gnat.com>
12
13 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
14 after fixup.
15
4755303e
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162013-03-21 Will Newton <will.newton@linaro.org>
17
18 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
19 pc-relative str instructions in Thumb mode.
20
81f5558e
NC
212013-03-21 Michael Schewe <michael.schewe@gmx.net>
22
23 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
24 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
25 R_H8_DISP32A16.
26 * config/tc-h8300.h: Remove duplicated defines.
27
71863e73
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282013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
29
30 PR gas/15282
31 * tc-avr.c (mcu_has_3_byte_pc): New function.
32 (tc_cfi_frame_initial_instructions): Call it to find return
33 address size.
34
795b8e6b
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352013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
36
37 PR gas/15095
38 * config/tc-tic6x.c (tic6x_try_encode): Handle
39 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
40 encode register pair numbers when required.
41
ba86b375
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422013-03-15 Will Newton <will.newton@linaro.org>
43
44 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
45 in vstr in Thumb mode for pre-ARMv7 cores.
46
9e6f3811
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472013-03-14 Andreas Schwab <schwab@suse.de>
48
49 * doc/c-arc.texi (ARC Directives): Revert last change and use
50 @itemize instead of @table.
51 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
52
b10bf8c5
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532013-03-14 Nick Clifton <nickc@redhat.com>
54
55 PR gas/15273
56 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
57 NULL message, instead just check ARM_CPU_IS_ANY directly.
58
ba724cfc
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592013-03-14 Nick Clifton <nickc@redhat.com>
60
61 PR gas/15212
9e6f3811 62 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
63 for table format.
64 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
65 to the @item directives.
66 (ARM-Neon-Alignment): Move to correct place in the document.
67 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
68 formatting.
69 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
70 @smallexample.
71
531a94fd
SL
722013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
73
74 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
75 case. Add default BAD_CASE to switch.
76
dad60f8e
SL
772013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
78
79 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
80 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
81
dd5181d5
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822013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
83
84 * config/tc-arm.c (crc_ext_armv8): New feature set.
85 (UNPRED_REG): New macro.
86 (do_crc32_1): New function.
87 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
88 do_crc32ch, do_crc32cw): Likewise.
89 (TUEc): New macro.
90 (insns): Add entries for crc32 mnemonics.
91 (arm_extensions): Add entry for crc.
92
8e723a10
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932013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
94
95 * write.h (struct fix): Add fx_dot_frag field.
96 (dot_frag): Declare.
97 * write.c (dot_frag): New variable.
98 (fix_new_internal): Set fx_dot_frag field with dot_frag.
99 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
100 * expr.c (expr): Save value of frag_now in dot_frag when setting
101 dot_value.
102 * read.c (emit_expr): Likewise. Delete comments.
103
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1042013-03-07 H.J. Lu <hongjiu.lu@intel.com>
105
106 * config/tc-i386.c (flag_code_names): Removed.
107 (i386_index_check): Rewrote.
108
62b0d0d5
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1092013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
110
111 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
112 add comment.
113 (aarch64_double_precision_fmovable): New function.
114 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
115 function; handle hexadecimal representation of IEEE754 encoding.
116 (parse_operands): Update the call to parse_aarch64_imm_float.
117
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1182013-02-28 H.J. Lu <hongjiu.lu@intel.com>
119
120 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
121 (check_hle): Updated.
122 (md_assemble): Likewise.
123 (parse_insn): Likewise.
124
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1252013-02-28 H.J. Lu <hongjiu.lu@intel.com>
126
127 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 128 (md_assemble): Check if REP prefix is OK.
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129 (parse_insn): Remove expecting_string_instruction. Set
130 i.rep_prefix.
131
e60bb1dd
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1322013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
133
134 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
135
aeebdd9b
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1362013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
137
138 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
139 for system registers.
140
4107ae22
DD
1412013-02-27 DJ Delorie <dj@redhat.com>
142
143 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
144 (rl78_op): Handle %code().
145 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
146 (tc_gen_reloc): Likwise; convert to a computed reloc.
147 (md_apply_fix): Likewise.
148
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1492013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
150
151 * config/rl78-parse.y: Fix encoding of DIVWU insn.
152
70a8bc5b 1532013-02-25 Terry Guo <terry.guo@arm.com>
154
155 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
156 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
157 list of accepted CPUs.
158
5c111e37
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1592013-02-19 H.J. Lu <hongjiu.lu@intel.com>
160
161 PR gas/15159
162 * config/tc-i386.c (cpu_arch): Add ".smap".
163
164 * doc/c-i386.texi: Document smap.
165
8a75745d
MR
1662013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
167
168 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
169 mips_assembling_insn appropriately.
170 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
171
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1722013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
173
cf29fc61 174 * config/tc-mips.c (append_insn): Correct indentation, remove
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175 extraneous braces.
176
4c261dff
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1772013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
178
5c111e37 179 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 180
ea33f281
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1812013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
182
183 * configure.tgt: Add nios2-*-rtems*.
184
a1ccaec9
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1852013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
186
187 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
188 NULL.
189
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1902013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
191
192 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
193 (macro): Use it. Assert that trunc.w.s is not used for r5900.
194
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1952013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
196
197 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
198 core.
199
36591ba1 2002013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 201 Andrew Jenner <andrew@codesourcery.com>
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202
203 Based on patches from Altera Corporation.
204
205 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
206 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
207 * Makefile.in: Regenerated.
208 * configure.tgt: Add case for nios2*-linux*.
209 * config/obj-elf.c: Conditionally include elf/nios2.h.
210 * config/tc-nios2.c: New file.
211 * config/tc-nios2.h: New file.
212 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
213 * doc/Makefile.in: Regenerated.
214 * doc/all.texi: Set NIOSII.
215 * doc/as.texinfo (Overview): Add Nios II options.
216 (Machine Dependencies): Include c-nios2.texi.
217 * doc/c-nios2.texi: New file.
218 * NEWS: Note Altera Nios II support.
219
94d4433a
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2202013-02-06 Alan Modra <amodra@gmail.com>
221
222 PR gas/14255
223 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
224 Don't skip fixups with fx_subsy non-NULL.
225 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
226 with fx_subsy non-NULL.
227
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2282013-02-04 H.J. Lu <hongjiu.lu@intel.com>
229
230 * doc/c-metag.texi: Add "@c man" markers.
231
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2322013-02-04 Alan Modra <amodra@gmail.com>
233
234 * write.c (fixup_segment): Return void. Delete seg_reloc_count
235 related code.
236 (TC_ADJUST_RELOC_COUNT): Delete.
237 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
238
89072bd6
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2392013-02-04 Alan Modra <amodra@gmail.com>
240
241 * po/POTFILES.in: Regenerate.
242
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2432013-01-30 Markos Chandras <markos.chandras@imgtec.com>
244
245 * config/tc-metag.c: Make SWAP instruction less permissive with
246 its operands.
247
392ca752
DD
2482013-01-29 DJ Delorie <dj@redhat.com>
249
250 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
251 relocs in .word/.etc statements.
252
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RM
2532013-01-29 Roland McGrath <mcgrathr@google.com>
254
255 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
256 immediate value for 8-bit offset" error so it shows line info.
257
4faf939a
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2582013-01-24 Joseph Myers <joseph@codesourcery.com>
259
260 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
261 for 64-bit output.
262
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2632013-01-24 Nick Clifton <nickc@redhat.com>
264
265 * config/tc-v850.c: Add support for e3v5 architecture.
266 * doc/c-v850.texi: Mention new support.
267
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2682013-01-23 Nick Clifton <nickc@redhat.com>
269
270 PR gas/15039
271 * config/tc-avr.c: Include dwarf2dbg.h.
272
8ce3d284
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2732013-01-18 H.J. Lu <hongjiu.lu@intel.com>
274
275 * config/tc-i386.c (reloc): Support size relocation only for ELF.
276 (tc_i386_fix_adjustable): Likewise.
277 (lex_got): Likewise.
278 (tc_gen_reloc): Likewise.
279
f5555712
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2802013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
281
282 * config/tc-aarch64.c (output_operand_error_record): Change to output
283 the out-of-range error message as value-expected message if there is
284 only one single value in the expected range.
285 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
286 LSL #0 as a programmer-friendly feature.
287
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2882013-01-16 H.J. Lu <hongjiu.lu@intel.com>
289
290 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
291 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
292 BFD_RELOC_64_SIZE relocations.
293 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
294 for it.
295 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
296 relocations against local symbols.
297
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2982013-01-16 Alan Modra <amodra@gmail.com>
299
300 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
301 finding some sort of toc syntax error, and break to avoid
302 compiler uninit warning.
303
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3042013-01-15 H.J. Lu <hongjiu.lu@intel.com>
305
306 PR gas/15019
307 * config/tc-i386.c (lex_got): Increment length by 1 if the
308 relocation token is removed.
309
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3102013-01-15 Nick Clifton <nickc@redhat.com>
311
312 * config/tc-v850.c (md_assemble): Allow signed values for
313 V850E_IMMEDIATE.
314
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3152013-01-11 Sean Keys <skeys@ipdatasys.com>
316
317 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 318 git to cvs.
464e3686 319
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3202013-01-10 Peter Bergner <bergner@vnet.ibm.com>
321
322 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
323 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
324 * config/tc-ppc.c (md_show_usage): Likewise.
325 (ppc_handle_align): Handle power8's group ending nop.
326
f4b1f6a9
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3272013-01-10 Sean Keys <skeys@ipdatasys.com>
328
329 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 330 that the assember exits after the opcodes have been printed.
f4b1f6a9 331
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3322013-01-10 H.J. Lu <hongjiu.lu@intel.com>
333
334 * app.c: Remove trailing white spaces.
335 * as.c: Likewise.
336 * as.h: Likewise.
337 * cond.c: Likewise.
338 * dw2gencfi.c: Likewise.
339 * dwarf2dbg.h: Likewise.
340 * ecoff.c: Likewise.
341 * input-file.c: Likewise.
342 * itbl-lex.h: Likewise.
343 * output-file.c: Likewise.
344 * read.c: Likewise.
345 * sb.c: Likewise.
346 * subsegs.c: Likewise.
347 * symbols.c: Likewise.
348 * write.c: Likewise.
349 * config/tc-i386.c: Likewise.
350 * doc/Makefile.am: Likewise.
351 * doc/Makefile.in: Likewise.
352 * doc/c-aarch64.texi: Likewise.
353 * doc/c-alpha.texi: Likewise.
354 * doc/c-arc.texi: Likewise.
355 * doc/c-arm.texi: Likewise.
356 * doc/c-avr.texi: Likewise.
357 * doc/c-bfin.texi: Likewise.
358 * doc/c-cr16.texi: Likewise.
359 * doc/c-d10v.texi: Likewise.
360 * doc/c-d30v.texi: Likewise.
361 * doc/c-h8300.texi: Likewise.
362 * doc/c-hppa.texi: Likewise.
363 * doc/c-i370.texi: Likewise.
364 * doc/c-i386.texi: Likewise.
365 * doc/c-i860.texi: Likewise.
366 * doc/c-m32c.texi: Likewise.
367 * doc/c-m32r.texi: Likewise.
368 * doc/c-m68hc11.texi: Likewise.
369 * doc/c-m68k.texi: Likewise.
370 * doc/c-microblaze.texi: Likewise.
371 * doc/c-mips.texi: Likewise.
372 * doc/c-msp430.texi: Likewise.
373 * doc/c-mt.texi: Likewise.
374 * doc/c-s390.texi: Likewise.
375 * doc/c-score.texi: Likewise.
376 * doc/c-sh.texi: Likewise.
377 * doc/c-sh64.texi: Likewise.
378 * doc/c-tic54x.texi: Likewise.
379 * doc/c-tic6x.texi: Likewise.
380 * doc/c-v850.texi: Likewise.
381 * doc/c-xc16x.texi: Likewise.
382 * doc/c-xgate.texi: Likewise.
383 * doc/c-xtensa.texi: Likewise.
384 * doc/c-z80.texi: Likewise.
385 * doc/internals.texi: Likewise.
386
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3872013-01-10 Roland McGrath <mcgrathr@google.com>
388
389 * hash.c (hash_new_sized): Make it global.
390 * hash.h: Declare it.
391 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
392 pass a small size.
393
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3942013-01-10 Will Newton <will.newton@imgtec.com>
395
396 * Makefile.am: Add Meta.
397 * Makefile.in: Regenerate.
398 * config/tc-metag.c: New file.
399 * config/tc-metag.h: New file.
400 * configure.tgt: Add Meta.
401 * doc/Makefile.am: Add Meta.
402 * doc/Makefile.in: Regenerate.
403 * doc/all.texi: Add Meta.
404 * doc/as.texiinfo: Document Meta options.
405 * doc/c-metag.texi: New file.
406
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4072013-01-09 Steve Ellcey <sellcey@mips.com>
408
409 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
410 calls.
411 * config/tc-mips.c (internalError): Remove, replace with abort.
412
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4132013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
414
415 * config/tc-aarch64.c (parse_operands): Change to compare the result
416 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
417
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4182013-01-07 Nick Clifton <nickc@redhat.com>
419
420 PR gas/14887
421 * config/tc-arm.c (skip_past_char): Skip whitespace before the
422 anticipated character.
423 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
424 here as it is no longer needed.
425
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AS
4262013-01-06 Andreas Schwab <schwab@linux-m68k.org>
427
428 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
429 * doc/c-score.texi (SCORE-Opts): Likewise.
430 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
431
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4322013-01-04 Juergen Urban <JuergenUrban@gmx.de>
433
434 * config/tc-mips.c: Add support for MIPS r5900.
435 Add M_LQ_AB and M_SQ_AB to support large values for instructions
436 lq and sq.
437 (can_swap_branch_p, get_append_method): Detect some conditional
438 short loops to fix a bug on the r5900 by NOP in the branch delay
439 slot.
440 (M_MUL): Support 3 operands in multu on r5900.
441 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
442 (s_mipsset): Force 32 bit floating point on r5900.
443 (mips_ip): Check parameter range of instructions mfps and mtps on
444 r5900.
445 * configure.in: Detect CPU type when target string contains r5900
446 (e.g. mips64r5900el-linux-gnu).
447
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4482013-01-02 H.J. Lu <hongjiu.lu@intel.com>
449
450 * as.c (parse_args): Update copyright year to 2013.
451
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4522013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
453
454 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
455 and "cortex57".
456
517bb291 4572013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 458
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459 PR gas/14987
460 * config/tc-arm.c (parse_address_main): Skip whitespace before a
461 closing bracket.
d709e4e6 462
517bb291 463For older changes see ChangeLog-2012
08d56133 464\f
517bb291 465Copyright (C) 2013 Free Software Foundation, Inc.
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466
467Copying and distribution of this file, with or without modification,
468are permitted in any medium without royalty provided the copyright
469notice and this notice are preserved.
470
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471Local Variables:
472mode: change-log
473left-margin: 8
474fill-column: 74
475version-control: never
476End: