]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
gas/
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
77bd4346
RS
12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
4 (imm_reloc): Delete.
5 (md_assemble): Remove imm_reloc handling.
6 (mips_ip): Update commentary. Use offset_expr and offset_reloc
7 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
8 Use a temporary array rather than imm_reloc when parsing
9 constant expressions. Remove imm_reloc initialization.
10 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
11 for the relaxable field. Use a relax_char variable to track the
12 type of this field. Remove imm_reloc initialization.
13
cc537e56
RS
142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
15
16 * config/tc-mips.c (mips16_ip): Handle "I".
17
ba92f887
MR
182013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
19
20 * config/tc-mips.c (mips_flag_nan2008): New variable.
21 (options): Add OPTION_NAN enum value.
22 (md_longopts): Handle it.
23 (md_parse_option): Likewise.
24 (s_nan): New function.
25 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
26 (md_show_usage): Add -mnan.
27
28 * doc/as.texinfo (Overview): Add -mnan.
29 * doc/c-mips.texi (MIPS Opts): Document -mnan.
30 (MIPS NaN Encodings): New node. Document .nan directive.
31 (MIPS-Dependent): List the new node.
32
c1094734
TG
332013-07-09 Tristan Gingold <gingold@adacore.com>
34
35 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
36
0cbbe1b8
RS
372013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
38
39 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
40 for 'A' and assume that the constant has been elided if the result
41 is an O_register.
42
f2ae14a1
RS
432013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
44
45 * config/tc-mips.c (gprel16_reloc_p): New function.
46 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
47 BFD_RELOC_UNUSED.
48 (offset_high_part, small_offset_p): New functions.
49 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
50 register load and store macros, handle the 16-bit offset case first.
51 If a 16-bit offset is not suitable for the instruction we're
52 generating, load it into the temporary register using
53 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
54 M_L_DAB code once the address has been constructed. For double load
55 and store macros, again handle the 16-bit offset case first.
56 If the second register cannot be accessed from the same high
57 part as the first, load it into AT using ADDRESS_ADDI_INSN.
58 Fix the handling of LD in cases where the first register is the
59 same as the base. Also handle the case where the offset is
60 not 16 bits and the second register cannot be accessed from the
61 same high part as the first. For unaligned loads and stores,
62 fuse the offbits == 12 and old "ab" handling. Apply this handling
63 whenever the second offset needs a different high part from the first.
64 Construct the offset using ADDRESS_ADDI_INSN where possible,
65 for offbits == 16 as well as offbits == 12. Use offset_reloc
66 when constructing the individual loads and stores.
67 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
68 and offset_reloc before matching against a particular opcode.
69 Handle elided 'A' constants. Allow 'A' constants to use
70 relocation operators.
71
5c324c16
RS
722013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
75 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
76 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
77
23e69e47
RS
782013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
79
80 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
81 Require the msb to be <= 31 for "+s". Check that the size is <= 31
82 for both "+s" and "+S".
83
27c5c572
RS
842013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
85
86 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
87 (mips_ip, mips16_ip): Handle "+i".
88
e76ff5ab
RS
892013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
90
91 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
92 (micromips_to_32_reg_h_map): Rename to...
93 (micromips_to_32_reg_h_map1): ...this.
94 (micromips_to_32_reg_i_map): Rename to...
95 (micromips_to_32_reg_h_map2): ...this.
96 (mips_lookup_reg_pair): New function.
97 (gpr_write_mask, macro): Adjust after above renaming.
98 (validate_micromips_insn): Remove "mi" handling.
99 (mips_ip): Likewise. Parse both registers in a pair for "mh".
100
fa7616a4
RS
1012013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
102
103 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
104 (mips_ip): Remove "+D" and "+T" handling.
105
fb798c50
AK
1062013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
107
108 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
109 relocs.
110
2c0a3565
MS
1112013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
112
4aa2c5e2
MS
113 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
114
1152013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
116
2c0a3565
MS
117 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
118 (aarch64_force_relocation): Likewise.
119
f40da81b
AM
1202013-07-02 Alan Modra <amodra@gmail.com>
121
122 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
123
81566a9b
MR
1242013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
125
126 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
127 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
128 Replace @sc{mips16} with literal `MIPS16'.
129 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
130
a6bb11b2
YZ
1312013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
132
133 * config/tc-aarch64.c (reloc_table): Replace
134 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
135 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
136 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
137 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
138 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
139 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
140 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
141 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
142 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
143 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
144 (aarch64_force_relocation): Likewise.
145
cec5225b
YZ
1462013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
147
148 * config/tc-aarch64.c (ilp32_p): New static variable.
149 (elf64_aarch64_target_format): Return the target according to the
150 value of 'ilp32_p'.
151 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
152 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
153 (aarch64_dwarf2_addr_size): New function.
154 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
155 (DWARF2_ADDR_SIZE): New define.
156
e335d9cb
RS
1572013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
158
159 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
160
18870af7
RS
1612013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
164
833794fc
MR
1652013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
166
167 * config/tc-mips.c (mips_set_options): Add insn32 member.
168 (mips_opts): Initialize it.
169 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
170 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
171 (md_longopts): Add "minsn32" and "mno-insn32" options.
172 (is_size_valid): Handle insn32 mode.
173 (md_assemble): Pass instruction string down to macro.
174 (brk_fmt): Add second dimension and insn32 mode initializers.
175 (mfhl_fmt): Likewise.
176 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
177 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
178 (macro_build_jalr, move_register): Handle insn32 mode.
179 (macro_build_branch_rs): Likewise.
180 (macro): Handle insn32 mode.
181 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
182 (mips_ip): Handle insn32 mode.
183 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
184 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
185 (mips_handle_align): Handle insn32 mode.
186 (md_show_usage): Add -minsn32 and -mno-insn32.
187
188 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
189 -mno-insn32 options.
190 (-minsn32, -mno-insn32): New options.
191 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
192 options.
193 (MIPS assembly options): New node. Document .set insn32 and
194 .set noinsn32.
195 (MIPS-Dependent): List the new node.
196
d1706f38
NC
1972013-06-25 Nick Clifton <nickc@redhat.com>
198
199 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
200 the PC in indirect addressing on 430xv2 parts.
201 (msp430_operands): Add version test to hardware bug encoding
202 restrictions.
203
477330fc
RM
2042013-06-24 Roland McGrath <mcgrathr@google.com>
205
d996d970
RM
206 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
207 so it skips whitespace before it.
208 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
209
477330fc
RM
210 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
211 (arm_reg_parse_multi): Skip whitespace first.
212 (parse_reg_list): Likewise.
213 (parse_vfp_reg_list): Likewise.
214 (s_arm_unwind_save_mmxwcg): Likewise.
215
24382199
NC
2162013-06-24 Nick Clifton <nickc@redhat.com>
217
218 PR gas/15623
219 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
220
c3678916
RS
2212013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
222
223 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
224
42429eac
RS
2252013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
226
227 * config/tc-mips.c: Assert that offsetT and valueT are at least
228 8 bytes in size.
229 (GPR_SMIN, GPR_SMAX): New macros.
230 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
231
f3ded42a
RS
2322013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
233
234 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
235 conditions. Remove any code deselected by them.
236 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
237
e8044f35
RS
2382013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
239
240 * NEWS: Note removal of ECOFF support.
241 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
242 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
243 (MULTI_CFILES): Remove config/e-mipsecoff.c.
244 * Makefile.in: Regenerate.
245 * configure.in: Remove MIPS ECOFF references.
246 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
247 Delete cases.
248 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
249 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
250 (mips-*-*): ...this single case.
251 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
252 MIPS emulations to be e-mipself*.
253 * configure: Regenerate.
254 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
255 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
256 (mips-*-sysv*): Remove coff and ecoff cases.
257 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
258 * ecoff.c: Remove reference to MIPS ECOFF.
259 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
260 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
261 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
262 (mips_hi_fixup): Tweak comment.
263 (append_insn): Require a howto.
264 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
265
98508b2a
RS
2662013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
267
268 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
269 Use "CPU" instead of "cpu".
270 * doc/c-mips.texi: Likewise.
271 (MIPS Opts): Rename to MIPS Options.
272 (MIPS option stack): Rename to MIPS Option Stack.
273 (MIPS ASE instruction generation overrides): Rename to
274 MIPS ASE Instruction Generation Overrides (for now).
275 (MIPS floating-point): Rename to MIPS Floating-Point.
276
fc16f8cc
RS
2772013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * doc/c-mips.texi (MIPS Macros): New section.
280 (MIPS Object): Replace with...
281 (MIPS Small Data): ...this new section.
282
5a7560b5
RS
2832013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
284
285 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
286 Capitalize name. Use @kindex instead of @cindex for .set entries.
287
a1b86ab7
RS
2882013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
289
290 * doc/c-mips.texi (MIPS Stabs): Remove section.
291
c6278170
RS
2922013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
295 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
296 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
297 (ISA_SUPPORTS_VIRT64_ASE): Delete.
298 (mips_ase): New structure.
299 (mips_ases): New table.
300 (FP64_ASES): New macro.
301 (mips_ase_groups): New array.
302 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
303 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
304 functions.
305 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
306 (md_parse_option): Use mips_ases and mips_set_ase instead of
307 separate case statements for each ASE option.
308 (mips_after_parse_args): Use FP64_ASES. Use
309 mips_check_isa_supports_ases to check the ASEs against
310 other options.
311 (s_mipsset): Use mips_ases and mips_set_ase instead of
312 separate if statements for each ASE option. Use
313 mips_check_isa_supports_ases, even when a non-ASE option
314 is specified.
315
63a4bc21
KT
3162013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
317
318 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
319
c31f3936
RS
3202013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
321
322 * config/tc-mips.c (md_shortopts, options, md_longopts)
323 (md_longopts_size): Move earlier in file.
324
846ef2d0
RS
3252013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
326
327 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
328 with a single "ase" bitmask.
329 (mips_opts): Update accordingly.
330 (file_ase, file_ase_explicit): New variables.
331 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
332 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
333 (ISA_HAS_ROR): Adjust for mips_set_options change.
334 (is_opcode_valid): Take the base ase mask directly from mips_opts.
335 (mips_ip): Adjust for mips_set_options change.
336 (md_parse_option): Likewise. Update file_ase_explicit.
337 (mips_after_parse_args): Adjust for mips_set_options change.
338 Use bitmask operations to select the default ASEs. Set file_ase
339 rather than individual per-ASE variables.
340 (s_mipsset): Adjust for mips_set_options change.
341 (mips_elf_final_processing): Test file_ase rather than
342 file_ase_mdmx. Remove commented-out code.
343
d16afab6
RS
3442013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
345
346 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
347 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
348 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
349 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
350 (mips_after_parse_args): Use the new "ase" field to choose
351 the default ASEs.
352 (mips_cpu_info_table): Move ASEs from the "flags" field to the
353 "ase" field.
354
e83a675f
RE
3552013-06-18 Richard Earnshaw <rearnsha@arm.com>
356
357 * config/tc-arm.c (symbol_preemptible): New function.
358 (relax_branch): Use it.
359
7f3c4072
CM
3602013-06-17 Catherine Moore <clm@codesourcery.com>
361 Maciej W. Rozycki <macro@codesourcery.com>
362 Chao-Ying Fu <fu@mips.com>
363
364 * config/tc-mips.c (mips_set_options): Add ase_eva.
365 (mips_set_options mips_opts): Add ase_eva.
366 (file_ase_eva): Declare.
367 (ISA_SUPPORTS_EVA_ASE): Define.
368 (IS_SEXT_9BIT_NUM): Define.
369 (MIPS_CPU_ASE_EVA): Define.
370 (is_opcode_valid): Add support for ase_eva.
371 (macro_build): Likewise.
372 (macro): Likewise.
373 (validate_mips_insn): Likewise.
374 (validate_micromips_insn): Likewise.
375 (mips_ip): Likewise.
376 (options): Add OPTION_EVA and OPTION_NO_EVA.
377 (md_longopts): Add -meva and -mno-eva.
378 (md_parse_option): Process new options.
379 (mips_after_parse_args): Check for valid EVA combinations.
380 (s_mipsset): Likewise.
381
e410add4
RS
3822013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
383
384 * dwarf2dbg.h (dwarf2_move_insn): Declare.
385 * dwarf2dbg.c (line_subseg): Add pmove_tail.
386 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
387 (dwarf2_gen_line_info_1): Update call accordingly.
388 (dwarf2_move_insn): New function.
389 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
390
6a50d470
RS
3912013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
392
393 Revert:
394
395 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
396
397 PR gas/13024
398 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
399 (dwarf2_gen_line_info_1): Delete.
400 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
401 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
402 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
403 (dwarf2_directive_loc): Push previous .locs instead of generating
404 them immediately.
405
f122319e
CF
4062013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
407
408 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
409 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
410
909c7f9c
NC
4112013-06-13 Nick Clifton <nickc@redhat.com>
412
413 PR gas/15602
414 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
415 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
416 function. Generates an error if the adjusted offset is out of a
417 16-bit range.
418
5d5755a7
SL
4192013-06-12 Sandra Loosemore <sandra@codesourcery.com>
420
421 * config/tc-nios2.c (md_apply_fix): Mask constant
422 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
423
3bf0dbfb
MR
4242013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
425
426 * config/tc-mips.c (append_insn): Don't do branch relaxation for
427 MIPS-3D instructions either.
428 (md_convert_frag): Update the COPx branch mask accordingly.
429
430 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
431 option.
432 * doc/as.texinfo (Overview): Add --relax-branch and
433 --no-relax-branch.
434 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
435 --no-relax-branch.
436
9daf7bab
SL
4372013-06-09 Sandra Loosemore <sandra@codesourcery.com>
438
439 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
440 omitted.
441
d301a56b
RS
4422013-06-08 Catherine Moore <clm@codesourcery.com>
443
444 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
445 (is_opcode_valid_16): Pass ase value to opcode_is_member.
446 (append_insn): Change INSN_xxxx to ASE_xxxx.
447
7bab7634
DC
4482013-06-01 George Thomas <george.thomas@atmel.com>
449
450 * gas/config/tc-avr.c: Change ISA for devices with USB support to
451 AVR_ISA_XMEGAU
452
f60cf82f
L
4532013-05-31 H.J. Lu <hongjiu.lu@intel.com>
454
455 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
456 for ELF.
457
a3f278e2
CM
4582013-05-31 Paul Brook <paul@codesourcery.com>
459
460 gas/
461 * config/tc-mips.c (s_ehword): New.
462
067ec077
CM
4632013-05-30 Paul Brook <paul@codesourcery.com>
464
465 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
466
d6101ac2
MR
4672013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
468
469 * write.c (resolve_reloc_expr_symbols): On REL targets don't
470 convert relocs who have no relocatable field either. Rephrase
471 the conditional so that the PC-relative check is only applied
472 for REL targets.
473
f19ccbda
MR
4742013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
475
476 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
477 calculation.
478
418009c2
YZ
4792013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
480
481 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 482 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
483 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
484 (md_apply_fix): Likewise.
485 (aarch64_force_relocation): Likewise.
486
0a8897c7
KT
4872013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
488
489 * config/tc-arm.c (it_fsm_post_encode): Improve
490 warning messages about deprecated IT block formats.
491
89d2a2a3
MS
4922013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
493
494 * config/tc-aarch64.c (md_apply_fix): Move value range checking
495 inside fx_done condition.
496
c77c0862
RS
4972013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
498
499 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
500
c0637f3a
PB
5012013-05-20 Peter Bergner <bergner@vnet.ibm.com>
502
503 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
504 and clean up warning when using PRINT_OPCODE_TABLE.
505
5656a981
AM
5062013-05-20 Alan Modra <amodra@gmail.com>
507
508 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
509 and data fixups performing shift/high adjust/sign extension on
510 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
511 when writing data fixups rather than recalculating size.
512
997b26e8
JBG
5132013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
514
515 * doc/c-msp430.texi: Fix typo.
516
9f6e76f4
TG
5172013-05-16 Tristan Gingold <gingold@adacore.com>
518
519 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
520 are also TOC symbols.
521
638d3803
NC
5222013-05-16 Nick Clifton <nickc@redhat.com>
523
524 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
525 Add -mcpu command to specify core type.
997b26e8 526 * doc/c-msp430.texi: Update documentation.
638d3803 527
b015e599
AP
5282013-05-09 Andrew Pinski <apinski@cavium.com>
529
530 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
531 (mips_opts): Update for the new field.
532 (file_ase_virt): New variable.
533 (ISA_SUPPORTS_VIRT_ASE): New macro.
534 (ISA_SUPPORTS_VIRT64_ASE): New macro.
535 (MIPS_CPU_ASE_VIRT): New define.
536 (is_opcode_valid): Handle ase_virt.
537 (macro_build): Handle "+J".
538 (validate_mips_insn): Likewise.
539 (mips_ip): Likewise.
540 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
541 (md_longopts): Add mvirt and mnovirt
542 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
543 (mips_after_parse_args): Handle ase_virt field.
544 (s_mipsset): Handle "virt" and "novirt".
545 (mips_elf_final_processing): Add a comment about virt ASE might need
546 a new flag.
547 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
548 * doc/c-mips.texi: Document -mvirt and -mno-virt.
549 Document ".set virt" and ".set novirt".
550
da8094d7
AM
5512013-05-09 Alan Modra <amodra@gmail.com>
552
553 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
554 control of operand flag bits.
555
c5f8c205
AM
5562013-05-07 Alan Modra <amodra@gmail.com>
557
558 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
559 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
560 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
561 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
562 (md_apply_fix): Set fx_no_overflow for assorted relocations.
563 Shift and sign-extend fieldval for use by some VLE reloc
564 operand->insert functions.
565
b47468a6
CM
5662013-05-06 Paul Brook <paul@codesourcery.com>
567 Catherine Moore <clm@codesourcery.com>
568
c5f8c205
AM
569 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
570 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
571 (md_apply_fix): Likewise.
572 (tc_gen_reloc): Likewise.
573
2de39019
CM
5742013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
577 (mips_fix_adjustable): Adjust pc-relative check to use
578 limited_pc_reloc_p.
579
754e2bb9
RS
5802013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
581
582 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
583 (s_mips_stab): Do not restrict to stabn only.
584
13761a11
NC
5852013-05-02 Nick Clifton <nickc@redhat.com>
586
587 * config/tc-msp430.c: Add support for the MSP430X architecture.
588 Add code to insert a NOP instruction after any instruction that
589 might change the interrupt state.
590 Add support for the LARGE memory model.
591 Add code to initialise the .MSP430.attributes section.
592 * config/tc-msp430.h: Add support for the MSP430X architecture.
593 * doc/c-msp430.texi: Document the new -mL and -mN command line
594 options.
595 * NEWS: Mention support for the MSP430X architecture.
596
df26367c
MR
5972013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
598
599 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
600 alpha*-*-linux*ecoff*.
601
f02d8318
CF
6022013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
603
604 * config/tc-mips.c (mips_ip): Add sizelo.
605 For "+C", "+G", and "+H", set sizelo and compare against it.
606
b40bf0a2
NC
6072013-04-29 Nick Clifton <nickc@redhat.com>
608
609 * as.c (Options): Add -gdwarf-sections.
610 (parse_args): Likewise.
611 * as.h (flag_dwarf_sections): Declare.
612 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
613 (process_entries): When -gdwarf-sections is enabled generate
614 fragmentary .debug_line sections.
615 (out_debug_line): Set the section for the .debug_line section end
616 symbol.
617 * doc/as.texinfo: Document -gdwarf-sections.
618 * NEWS: Mention -gdwarf-sections.
619
8eeccb77 6202013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
621
622 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
623 according to the target parameter. Don't call s_segm since s_segm
624 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
625 initialized yet.
626 (md_begin): Call s_segm according to target parameter from command
627 line.
628
49926cd0
AM
6292013-04-25 Alan Modra <amodra@gmail.com>
630
631 * configure.in: Allow little-endian linux.
632 * configure: Regenerate.
633
e3031850
SL
6342013-04-24 Sandra Loosemore <sandra@codesourcery.com>
635
636 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
637 "fstatus" control register to "eccinj".
638
cb948fc0
KT
6392013-04-19 Kai Tietz <ktietz@redhat.com>
640
641 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
642
4455e9ad
JB
6432013-04-15 Julian Brown <julian@codesourcery.com>
644
645 * expr.c (add_to_result, subtract_from_result): Make global.
646 * expr.h (add_to_result, subtract_from_result): Add prototypes.
647 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
648 subtract_from_result to handle extra bit of precision for .sleb128
649 directive operands.
650
956a6ba3
JB
6512013-04-10 Julian Brown <julian@codesourcery.com>
652
653 * read.c (convert_to_bignum): Add sign parameter. Use it
654 instead of X_unsigned to determine sign of resulting bignum.
655 (emit_expr): Pass extra argument to convert_to_bignum.
656 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
657 X_extrabit to convert_to_bignum.
658 (parse_bitfield_cons): Set X_extrabit.
659 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
660 Initialise X_extrabit field as appropriate.
661 (add_to_result): New.
662 (subtract_from_result): New.
663 (expr): Use above.
664 * expr.h (expressionS): Add X_extrabit field.
665
eb9f3f00
JB
6662013-04-10 Jan Beulich <jbeulich@suse.com>
667
668 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
669 register being PC when is_t or writeback, and use distinct
670 diagnostic for the latter case.
671
ccb84d65
JB
6722013-04-10 Jan Beulich <jbeulich@suse.com>
673
674 * gas/config/tc-arm.c (parse_operands): Re-write
675 po_barrier_or_imm().
676 (do_barrier): Remove bogus constraint().
677 (do_t_barrier): Remove.
678
4d13caa0
NC
6792013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
680
681 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
682 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
683 ATmega2564RFR2
684 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
685
16d02dc9
JB
6862013-04-09 Jan Beulich <jbeulich@suse.com>
687
688 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
689 Use local variable Rt in more places.
690 (do_vmsr): Accept all control registers.
691
05ac0ffb
JB
6922013-04-09 Jan Beulich <jbeulich@suse.com>
693
694 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
695 if there was none specified for moves between scalar and core
696 register.
697
2d51fb74
JB
6982013-04-09 Jan Beulich <jbeulich@suse.com>
699
700 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
701 NEON_ALL_LANES case.
702
94dcf8bf
JB
7032013-04-08 Jan Beulich <jbeulich@suse.com>
704
705 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
706 PC-relative VSTR.
707
1472d06f
JB
7082013-04-08 Jan Beulich <jbeulich@suse.com>
709
710 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
711 entry to sp_fiq.
712
0c76cae8
AM
7132013-04-03 Alan Modra <amodra@gmail.com>
714
715 * doc/as.texinfo: Add support to generate man options for h8300.
716 * doc/c-h8300.texi: Likewise.
717
92eb40d9
RR
7182013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
719
720 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
721 Cortex-A57.
722
51dcdd4d
NC
7232013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
724
725 PR binutils/15068
726 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
727
c5d685bf
NC
7282013-03-26 Nick Clifton <nickc@redhat.com>
729
9b978282
NC
730 PR gas/15295
731 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
732 start of the file each time.
733
c5d685bf
NC
734 PR gas/15178
735 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
736 FreeBSD targets.
737
9699c833
TG
7382013-03-26 Douglas B Rupp <rupp@gnat.com>
739
740 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
741 after fixup.
742
4755303e
WN
7432013-03-21 Will Newton <will.newton@linaro.org>
744
745 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
746 pc-relative str instructions in Thumb mode.
747
81f5558e
NC
7482013-03-21 Michael Schewe <michael.schewe@gmx.net>
749
750 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
751 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
752 R_H8_DISP32A16.
753 * config/tc-h8300.h: Remove duplicated defines.
754
71863e73
NC
7552013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
756
757 PR gas/15282
758 * tc-avr.c (mcu_has_3_byte_pc): New function.
759 (tc_cfi_frame_initial_instructions): Call it to find return
760 address size.
761
795b8e6b
NC
7622013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
763
764 PR gas/15095
765 * config/tc-tic6x.c (tic6x_try_encode): Handle
766 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
767 encode register pair numbers when required.
768
ba86b375
WN
7692013-03-15 Will Newton <will.newton@linaro.org>
770
771 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
772 in vstr in Thumb mode for pre-ARMv7 cores.
773
9e6f3811
AS
7742013-03-14 Andreas Schwab <schwab@suse.de>
775
776 * doc/c-arc.texi (ARC Directives): Revert last change and use
777 @itemize instead of @table.
778 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
779
b10bf8c5
NC
7802013-03-14 Nick Clifton <nickc@redhat.com>
781
782 PR gas/15273
783 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
784 NULL message, instead just check ARM_CPU_IS_ANY directly.
785
ba724cfc
NC
7862013-03-14 Nick Clifton <nickc@redhat.com>
787
788 PR gas/15212
9e6f3811 789 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
790 for table format.
791 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
792 to the @item directives.
793 (ARM-Neon-Alignment): Move to correct place in the document.
794 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
795 formatting.
796 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
797 @smallexample.
798
531a94fd
SL
7992013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
800
801 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
802 case. Add default BAD_CASE to switch.
803
dad60f8e
SL
8042013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
805
806 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
807 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
808
dd5181d5
KT
8092013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
810
811 * config/tc-arm.c (crc_ext_armv8): New feature set.
812 (UNPRED_REG): New macro.
813 (do_crc32_1): New function.
814 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
815 do_crc32ch, do_crc32cw): Likewise.
816 (TUEc): New macro.
817 (insns): Add entries for crc32 mnemonics.
818 (arm_extensions): Add entry for crc.
819
8e723a10
CLT
8202013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
821
822 * write.h (struct fix): Add fx_dot_frag field.
823 (dot_frag): Declare.
824 * write.c (dot_frag): New variable.
825 (fix_new_internal): Set fx_dot_frag field with dot_frag.
826 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
827 * expr.c (expr): Save value of frag_now in dot_frag when setting
828 dot_value.
829 * read.c (emit_expr): Likewise. Delete comments.
830
be05d201
L
8312013-03-07 H.J. Lu <hongjiu.lu@intel.com>
832
833 * config/tc-i386.c (flag_code_names): Removed.
834 (i386_index_check): Rewrote.
835
62b0d0d5
YZ
8362013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
837
838 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
839 add comment.
840 (aarch64_double_precision_fmovable): New function.
841 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
842 function; handle hexadecimal representation of IEEE754 encoding.
843 (parse_operands): Update the call to parse_aarch64_imm_float.
844
165de32a
L
8452013-02-28 H.J. Lu <hongjiu.lu@intel.com>
846
847 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
848 (check_hle): Updated.
849 (md_assemble): Likewise.
850 (parse_insn): Likewise.
851
d5de92cf
L
8522013-02-28 H.J. Lu <hongjiu.lu@intel.com>
853
854 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 855 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
856 (parse_insn): Remove expecting_string_instruction. Set
857 i.rep_prefix.
858
e60bb1dd
YZ
8592013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
860
861 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
862
aeebdd9b
YZ
8632013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
864
865 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
866 for system registers.
867
4107ae22
DD
8682013-02-27 DJ Delorie <dj@redhat.com>
869
870 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
871 (rl78_op): Handle %code().
872 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
873 (tc_gen_reloc): Likwise; convert to a computed reloc.
874 (md_apply_fix): Likewise.
875
151fa98f
NC
8762013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
877
878 * config/rl78-parse.y: Fix encoding of DIVWU insn.
879
70a8bc5b 8802013-02-25 Terry Guo <terry.guo@arm.com>
881
882 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
883 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
884 list of accepted CPUs.
885
5c111e37
L
8862013-02-19 H.J. Lu <hongjiu.lu@intel.com>
887
888 PR gas/15159
889 * config/tc-i386.c (cpu_arch): Add ".smap".
890
891 * doc/c-i386.texi: Document smap.
892
8a75745d
MR
8932013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
894
895 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
896 mips_assembling_insn appropriately.
897 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
898
79850f26
MR
8992013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
900
cf29fc61 901 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
902 extraneous braces.
903
4c261dff
NC
9042013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
905
5c111e37 906 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 907
ea33f281
NC
9082013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
909
910 * configure.tgt: Add nios2-*-rtems*.
911
a1ccaec9
YZ
9122013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
913
914 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
915 NULL.
916
0aa27725
RS
9172013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
918
919 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
920 (macro): Use it. Assert that trunc.w.s is not used for r5900.
921
da4339ed
NC
9222013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
923
924 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
925 core.
926
36591ba1 9272013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 928 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
929
930 Based on patches from Altera Corporation.
931
932 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
933 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
934 * Makefile.in: Regenerated.
935 * configure.tgt: Add case for nios2*-linux*.
936 * config/obj-elf.c: Conditionally include elf/nios2.h.
937 * config/tc-nios2.c: New file.
938 * config/tc-nios2.h: New file.
939 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
940 * doc/Makefile.in: Regenerated.
941 * doc/all.texi: Set NIOSII.
942 * doc/as.texinfo (Overview): Add Nios II options.
943 (Machine Dependencies): Include c-nios2.texi.
944 * doc/c-nios2.texi: New file.
945 * NEWS: Note Altera Nios II support.
946
94d4433a
AM
9472013-02-06 Alan Modra <amodra@gmail.com>
948
949 PR gas/14255
950 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
951 Don't skip fixups with fx_subsy non-NULL.
952 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
953 with fx_subsy non-NULL.
954
ace9af6f
L
9552013-02-04 H.J. Lu <hongjiu.lu@intel.com>
956
957 * doc/c-metag.texi: Add "@c man" markers.
958
89d67ed9
AM
9592013-02-04 Alan Modra <amodra@gmail.com>
960
961 * write.c (fixup_segment): Return void. Delete seg_reloc_count
962 related code.
963 (TC_ADJUST_RELOC_COUNT): Delete.
964 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
965
89072bd6
AM
9662013-02-04 Alan Modra <amodra@gmail.com>
967
968 * po/POTFILES.in: Regenerate.
969
f9b2d544
NC
9702013-01-30 Markos Chandras <markos.chandras@imgtec.com>
971
972 * config/tc-metag.c: Make SWAP instruction less permissive with
973 its operands.
974
392ca752
DD
9752013-01-29 DJ Delorie <dj@redhat.com>
976
977 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
978 relocs in .word/.etc statements.
979
427d0db6
RM
9802013-01-29 Roland McGrath <mcgrathr@google.com>
981
982 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
983 immediate value for 8-bit offset" error so it shows line info.
984
4faf939a
JM
9852013-01-24 Joseph Myers <joseph@codesourcery.com>
986
987 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
988 for 64-bit output.
989
78c8d46c
NC
9902013-01-24 Nick Clifton <nickc@redhat.com>
991
992 * config/tc-v850.c: Add support for e3v5 architecture.
993 * doc/c-v850.texi: Mention new support.
994
fb5b7503
NC
9952013-01-23 Nick Clifton <nickc@redhat.com>
996
997 PR gas/15039
998 * config/tc-avr.c: Include dwarf2dbg.h.
999
8ce3d284
L
10002013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1001
1002 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1003 (tc_i386_fix_adjustable): Likewise.
1004 (lex_got): Likewise.
1005 (tc_gen_reloc): Likewise.
1006
f5555712
YZ
10072013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1008
1009 * config/tc-aarch64.c (output_operand_error_record): Change to output
1010 the out-of-range error message as value-expected message if there is
1011 only one single value in the expected range.
1012 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1013 LSL #0 as a programmer-friendly feature.
1014
8fd4256d
L
10152013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1016
1017 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1018 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1019 BFD_RELOC_64_SIZE relocations.
1020 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1021 for it.
1022 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1023 relocations against local symbols.
1024
a5840dce
AM
10252013-01-16 Alan Modra <amodra@gmail.com>
1026
1027 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1028 finding some sort of toc syntax error, and break to avoid
1029 compiler uninit warning.
1030
af89796a
L
10312013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1032
1033 PR gas/15019
1034 * config/tc-i386.c (lex_got): Increment length by 1 if the
1035 relocation token is removed.
1036
dd42f060
NC
10372013-01-15 Nick Clifton <nickc@redhat.com>
1038
1039 * config/tc-v850.c (md_assemble): Allow signed values for
1040 V850E_IMMEDIATE.
1041
464e3686
SK
10422013-01-11 Sean Keys <skeys@ipdatasys.com>
1043
1044 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1045 git to cvs.
464e3686 1046
5817ffd1
PB
10472013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1048
1049 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1050 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1051 * config/tc-ppc.c (md_show_usage): Likewise.
1052 (ppc_handle_align): Handle power8's group ending nop.
1053
f4b1f6a9
SK
10542013-01-10 Sean Keys <skeys@ipdatasys.com>
1055
1056 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1057 that the assember exits after the opcodes have been printed.
f4b1f6a9 1058
34bca508
L
10592013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1060
1061 * app.c: Remove trailing white spaces.
1062 * as.c: Likewise.
1063 * as.h: Likewise.
1064 * cond.c: Likewise.
1065 * dw2gencfi.c: Likewise.
1066 * dwarf2dbg.h: Likewise.
1067 * ecoff.c: Likewise.
1068 * input-file.c: Likewise.
1069 * itbl-lex.h: Likewise.
1070 * output-file.c: Likewise.
1071 * read.c: Likewise.
1072 * sb.c: Likewise.
1073 * subsegs.c: Likewise.
1074 * symbols.c: Likewise.
1075 * write.c: Likewise.
1076 * config/tc-i386.c: Likewise.
1077 * doc/Makefile.am: Likewise.
1078 * doc/Makefile.in: Likewise.
1079 * doc/c-aarch64.texi: Likewise.
1080 * doc/c-alpha.texi: Likewise.
1081 * doc/c-arc.texi: Likewise.
1082 * doc/c-arm.texi: Likewise.
1083 * doc/c-avr.texi: Likewise.
1084 * doc/c-bfin.texi: Likewise.
1085 * doc/c-cr16.texi: Likewise.
1086 * doc/c-d10v.texi: Likewise.
1087 * doc/c-d30v.texi: Likewise.
1088 * doc/c-h8300.texi: Likewise.
1089 * doc/c-hppa.texi: Likewise.
1090 * doc/c-i370.texi: Likewise.
1091 * doc/c-i386.texi: Likewise.
1092 * doc/c-i860.texi: Likewise.
1093 * doc/c-m32c.texi: Likewise.
1094 * doc/c-m32r.texi: Likewise.
1095 * doc/c-m68hc11.texi: Likewise.
1096 * doc/c-m68k.texi: Likewise.
1097 * doc/c-microblaze.texi: Likewise.
1098 * doc/c-mips.texi: Likewise.
1099 * doc/c-msp430.texi: Likewise.
1100 * doc/c-mt.texi: Likewise.
1101 * doc/c-s390.texi: Likewise.
1102 * doc/c-score.texi: Likewise.
1103 * doc/c-sh.texi: Likewise.
1104 * doc/c-sh64.texi: Likewise.
1105 * doc/c-tic54x.texi: Likewise.
1106 * doc/c-tic6x.texi: Likewise.
1107 * doc/c-v850.texi: Likewise.
1108 * doc/c-xc16x.texi: Likewise.
1109 * doc/c-xgate.texi: Likewise.
1110 * doc/c-xtensa.texi: Likewise.
1111 * doc/c-z80.texi: Likewise.
1112 * doc/internals.texi: Likewise.
1113
4c665b71
RM
11142013-01-10 Roland McGrath <mcgrathr@google.com>
1115
1116 * hash.c (hash_new_sized): Make it global.
1117 * hash.h: Declare it.
1118 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1119 pass a small size.
1120
a3c62988
NC
11212013-01-10 Will Newton <will.newton@imgtec.com>
1122
1123 * Makefile.am: Add Meta.
1124 * Makefile.in: Regenerate.
1125 * config/tc-metag.c: New file.
1126 * config/tc-metag.h: New file.
1127 * configure.tgt: Add Meta.
1128 * doc/Makefile.am: Add Meta.
1129 * doc/Makefile.in: Regenerate.
1130 * doc/all.texi: Add Meta.
1131 * doc/as.texiinfo: Document Meta options.
1132 * doc/c-metag.texi: New file.
1133
b37df7c4
SE
11342013-01-09 Steve Ellcey <sellcey@mips.com>
1135
1136 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1137 calls.
1138 * config/tc-mips.c (internalError): Remove, replace with abort.
1139
a3251895
YZ
11402013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1141
1142 * config/tc-aarch64.c (parse_operands): Change to compare the result
1143 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1144
8ab8155f
NC
11452013-01-07 Nick Clifton <nickc@redhat.com>
1146
1147 PR gas/14887
1148 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1149 anticipated character.
1150 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1151 here as it is no longer needed.
1152
a4ac1c42
AS
11532013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1154
1155 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1156 * doc/c-score.texi (SCORE-Opts): Likewise.
1157 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1158
e407c74b
NC
11592013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1160
1161 * config/tc-mips.c: Add support for MIPS r5900.
1162 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1163 lq and sq.
1164 (can_swap_branch_p, get_append_method): Detect some conditional
1165 short loops to fix a bug on the r5900 by NOP in the branch delay
1166 slot.
1167 (M_MUL): Support 3 operands in multu on r5900.
1168 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1169 (s_mipsset): Force 32 bit floating point on r5900.
1170 (mips_ip): Check parameter range of instructions mfps and mtps on
1171 r5900.
1172 * configure.in: Detect CPU type when target string contains r5900
1173 (e.g. mips64r5900el-linux-gnu).
1174
62658407
L
11752013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1176
1177 * as.c (parse_args): Update copyright year to 2013.
1178
95830fd1
YZ
11792013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1180
1181 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1182 and "cortex57".
1183
517bb291 11842013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1185
517bb291
NC
1186 PR gas/14987
1187 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1188 closing bracket.
d709e4e6 1189
517bb291 1190For older changes see ChangeLog-2012
08d56133 1191\f
517bb291 1192Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1193
1194Copying and distribution of this file, with or without modification,
1195are permitted in any medium without royalty provided the copyright
1196notice and this notice are preserved.
1197
08d56133
NC
1198Local Variables:
1199mode: change-log
1200left-margin: 8
1201fill-column: 74
1202version-control: never
1203End: