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12013-10-08 Jan Beulich <jbeulich@suse.com>
2
3 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
4 LR/PC check.
5
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62013-10-08 Nick Clifton <nickc@redhat.com>
7
8 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
9 for "<foo>a". Issue error messages for unrecognised or corrrupt
10 size extensions.
11
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122013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13
14 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
15 possible.
16
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172013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
18
19 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
20 * doc/c-i386.texi: Add -march=bdver4 option.
21
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222013-09-20 Alan Modra <amodra@gmail.com>
23
24 * configure: Regenerate.
25
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262013-09-18 Tristan Gingold <gingold@adacore.com>
27
28 * NEWS: Add marker for 2.24.
29
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302013-09-18 Nick Clifton <nickc@redhat.com>
31
32 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
33 (move_data): New variable.
34 (md_parse_option): Parse -md.
35 (msp430_section): New function. Catch references to the .bss or
36 .data sections and generate a special symbol for use by the libcrt
37 library.
38 (md_pseudo_table): Intercept .section directives.
39 (md_longopt): Add -md
40 (md_show_usage): Likewise.
41 (msp430_operands): Generate a warning message if a NOP is inserted
42 into the instruction stream.
43 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
44
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452013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
46
47 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 48 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 49
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502013-09-16 Will Newton <will.newton@linaro.org>
51
52 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
53 disallowing element size 64 with interleave other than 1.
54
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552013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
56
57 * config/tc-mips.c (match_insn): Set error when $31 is used for
58 bltzal* and bgezal*.
59
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602013-09-04 Tristan Gingold <gingold@adacore.com>
61
62 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
63 symbols.
64
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652013-09-04 Roland McGrath <mcgrathr@google.com>
66
67 PR gas/15914
68 * config/tc-arm.c (T16_32_TAB): Add _udf.
69 (do_t_udf): New function.
70 (insns): Add "udf".
71
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722013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
73
74 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
75 assembler errors at correct position.
76
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772013-08-23 Yuri Chornoivan <yurchor@ukr.net>
78
79 PR binutils/15834
80 * config/tc-ia64.c: Fix typos.
81 * config/tc-sparc.c: Likewise.
82 * config/tc-z80.c: Likewise.
83 * doc/c-i386.texi: Likewise.
84 * doc/c-m32r.texi: Likewise.
85
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862013-08-23 Will Newton <will.newton@linaro.org>
87
9aff4b7a 88 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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89 for pre-indexed addressing modes.
90
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912013-08-21 Alan Modra <amodra@gmail.com>
92
93 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
94 range check label number for use with fb_low_counter array.
95
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962013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
99 (mips_parse_argument_token, validate_micromips_insn, md_begin)
100 (check_regno, match_float_constant, check_completed_insn, append_insn)
101 (match_insn, match_mips16_insn, match_insns, macro_start)
102 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
103 (mips16_ip, mips_set_option_string, md_parse_option)
104 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
105 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
106 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
107 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
108 Start error messages with a lower-case letter. Do not end error
109 messages with a period. Wrap long messages to 80 character-lines.
110 Use "cannot" instead of "can't" and "can not".
111
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1122013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
113
114 * config/tc-mips.c (imm_expr): Expand comment.
115 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
116 when populated.
117
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1182013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
119
120 * config/tc-mips.c (imm2_expr): Delete.
121 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
122
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1232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
126 (macro): Remove M_DEXT and M_DINS handling.
127
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1282013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
129
130 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
131 lax_max with lax_match.
132 (match_int_operand): Update accordingly. Don't report an error
133 for !lax_match-only cases.
134 (match_insn): Replace more_alts with lax_match and use it to
135 initialize the mips_arg_info field. Add a complete_p parameter.
136 Handle implicit VU0 suffixes here.
137 (match_invalid_for_isa, match_insns, match_mips16_insns): New
138 functions.
139 (mips_ip, mips16_ip): Use them.
140
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1412013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c (match_expression): Report uses of registers here.
144 Add a "must be an immediate expression" error. Handle elided offsets
145 here rather than...
146 (match_int_operand): ...here.
147
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1482013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
149
150 * config/tc-mips.c (mips_arg_info): Remove soft_match.
151 (match_out_of_range, match_not_constant): New functions.
152 (match_const_int): Remove fallback parameter and check for soft_match.
153 Use match_not_constant.
154 (match_mapped_int_operand, match_addiusp_operand)
155 (match_perf_reg_operand, match_save_restore_list_operand)
156 (match_mdmx_imm_reg_operand): Update accordingly. Use
157 match_out_of_range and set_insn_error* instead of as_bad.
158 (match_int_operand): Likewise. Use match_not_constant in the
159 !allows_nonconst case.
160 (match_float_constant): Report invalid float constants.
161 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
162 match_float_constant to check for invalid constants. Fail the
163 match if match_const_int or match_float_constant return false.
164 (mips_ip): Update accordingly.
165 (mips16_ip): Likewise. Undo null termination of instruction name
166 once lookup is complete.
167
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1682013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
169
170 * config/tc-mips.c (mips_insn_error_format): New enum.
171 (mips_insn_error): New struct.
172 (insn_error): Change to a mips_insn_error.
173 (clear_insn_error, set_insn_error_format, set_insn_error)
174 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
175 functions.
176 (mips_parse_argument_token, md_assemble, match_insn)
177 (match_mips16_insn): Use them instead of manipulating insn_error
178 directly.
179 (mips_ip, mips16_ip): Likewise. Simplify control flow.
180
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1812013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
182
183 * config/tc-mips.c (normalize_constant_expr): Move further up file.
184 (normalize_address_expr): Likewise.
185 (match_insn, match_mips16_insn): New functions, split out from...
186 (mips_ip, mips16_ip): ...here.
187
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1882013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
191 OP_OPTIONAL_REG.
192 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
193 for optional operands.
194
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1952013-08-16 Alan Modra <amodra@gmail.com>
196
197 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
198 modifiers generally.
199
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2002013-08-16 Alan Modra <amodra@gmail.com>
201
202 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
203
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2042013-08-14 David Edelsohn <dje.gcc@gmail.com>
205
206 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
207 argument as alignment.
208
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2092013-08-09 Nick Clifton <nickc@redhat.com>
210
211 * config/tc-rl78.c (elf_flags): New variable.
212 (enum options): Add OPTION_G10.
213 (md_longopts): Add mg10.
214 (md_parse_option): Parse -mg10.
215 (rl78_elf_final_processing): New function.
216 * config/tc-rl78.c (tc_final_processing): Define.
217 * doc/c-rl78.texi: Document -mg10 option.
218
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2192013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
220
221 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
222 suffixes to be elided too.
223 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
224 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
225 to be omitted too.
226
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2272013-08-05 John Tytgat <john@bass-software.com>
228
229 * po/POTFILES.in: Regenerate.
230
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2312013-08-05 Eric Botcazou <ebotcazou@adacore.com>
232 Konrad Eisele <konrad@gaisler.com>
233
234 * config/tc-sparc.c (sparc_arch_types): Add leon.
235 (sparc_arch): Move sparc4 around and add leon.
236 (sparc_target_format): Document -Aleon.
237 * doc/c-sparc.texi: Likewise.
238
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2392013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
242
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2432013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
244 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
247 (RWARN): Bump to 0x8000000.
248 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
249 (RTYPE_R5900_ACC): New register types.
250 (RTYPE_MASK): Include them.
251 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
252 macros.
253 (reg_names): Include them.
254 (mips_parse_register_1): New function, split out from...
255 (mips_parse_register): ...here. Add a channels_ptr parameter.
256 Look for VU0 channel suffixes when nonnull.
257 (reg_lookup): Update the call to mips_parse_register.
258 (mips_parse_vu0_channels): New function.
259 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
260 (mips_operand_token): Add a "channels" field to the union.
261 Extend the comment above "ch" to OT_DOUBLE_CHAR.
262 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
263 (mips_parse_argument_token): Handle channel suffixes here too.
264 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
265 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
266 Handle '#' formats.
267 (md_begin): Register $vfN and $vfI registers.
268 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
269 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
270 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
271 (match_vu0_suffix_operand): New function.
272 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
273 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
274 (mips_lookup_insn): New function.
275 (mips_ip): Use it. Allow "+K" operands to be elided at the end
276 of an instruction. Handle '#' sequences.
277
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2782013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
279
280 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
281 values and use it instead of sreg, treg, xreg, etc.
282
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2832013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
284
285 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
286 and mips_int_operand_max.
287 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
288 Delete.
289 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
290 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
291 instead of mips16_immed_operand.
292
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2932013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
294
295 * config/tc-mips.c (mips16_macro): Don't use move_register.
296 (mips16_ip): Allow macros to use 'p'.
297
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2982013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (MAX_OPERANDS): New macro.
301 (mips_operand_array): New structure.
302 (mips_operands, mips16_operands, micromips_operands): New arrays.
303 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
304 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
305 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
306 (micromips_to_32_reg_q_map): Delete.
307 (insn_operands, insn_opno, insn_extract_operand): New functions.
308 (validate_mips_insn): Take a mips_operand_array as argument and
309 use it to build up a list of operands. Extend to handle INSN_MACRO
310 and MIPS16.
311 (validate_mips16_insn): New function.
312 (validate_micromips_insn): Take a mips_operand_array as argument.
313 Handle INSN_MACRO.
314 (md_begin): Initialize mips_operands, mips16_operands and
315 micromips_operands. Call validate_mips_insn and
316 validate_micromips_insn for macro instructions too.
317 Call validate_mips16_insn for MIPS16 instructions.
318 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
319 New functions.
320 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
321 them. Handle INSN_UDI.
322 (get_append_method): Use gpr_read_mask.
323
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3242013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
325
326 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
327 flags for MIPS16 and non-MIPS16 instructions.
328 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
329 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
330 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
331 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
332 and non-MIPS16 instructions. Fix formatting.
333
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3342013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
335
336 * config/tc-mips.c (reg_needs_delay): Move later in file.
337 Use gpr_write_mask.
338 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
339
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3402013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
341 Alexander Ivchenko <alexander.ivchenko@intel.com>
342 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
343 Sergey Lega <sergey.s.lega@intel.com>
344 Anna Tikhonova <anna.tikhonova@intel.com>
345 Ilya Tocar <ilya.tocar@intel.com>
346 Andrey Turetskiy <andrey.turetskiy@intel.com>
347 Ilya Verbin <ilya.verbin@intel.com>
348 Kirill Yukhin <kirill.yukhin@intel.com>
349 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
350
351 * config/tc-i386-intel.c (O_zmmword_ptr): New.
352 (i386_types): Add zmmword.
353 (i386_intel_simplify_register): Allow regzmm.
354 (i386_intel_simplify): Handle zmmwords.
355 (i386_intel_operand): Handle RC/SAE, vector operations and
356 zmmwords.
357 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
358 (struct RC_Operation): New.
359 (struct Mask_Operation): New.
360 (struct Broadcast_Operation): New.
361 (vex_prefix): Size of bytes increased to 4 to support EVEX
362 encoding.
363 (enum i386_error): Add new error codes: unsupported_broadcast,
364 broadcast_not_on_src_operand, broadcast_needed,
365 unsupported_masking, mask_not_on_destination, no_default_mask,
366 unsupported_rc_sae, rc_sae_operand_not_last_imm,
367 invalid_register_operand, try_vector_disp8.
368 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
369 rounding, broadcast, memshift.
370 (struct RC_name): New.
371 (RC_NamesTable): New.
372 (evexlig): New.
373 (evexwig): New.
374 (extra_symbol_chars): Add '{'.
375 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
376 (i386_operand_type): Add regzmm, regmask and vec_disp8.
377 (match_mem_size): Handle zmmwords.
378 (operand_type_match): Handle zmm-registers.
379 (mode_from_disp_size): Handle vec_disp8.
380 (fits_in_vec_disp8): New.
381 (md_begin): Handle {} properly.
382 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
383 (build_vex_prefix): Handle vrex.
384 (build_evex_prefix): New.
385 (process_immext): Adjust to properly handle EVEX.
386 (md_assemble): Add EVEX encoding support.
387 (swap_2_operands): Correctly handle operands with masking,
388 broadcasting or RC/SAE.
389 (check_VecOperands): Support EVEX features.
390 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
391 (match_template): Support regzmm and handle new error codes.
392 (process_suffix): Handle zmmwords and zmm-registers.
393 (check_byte_reg): Extend to zmm-registers.
394 (process_operands): Extend to zmm-registers.
395 (build_modrm_byte): Handle EVEX.
396 (output_insn): Adjust to properly handle EVEX case.
397 (disp_size): Handle vec_disp8.
398 (output_disp): Support compressed disp8*N evex feature.
399 (output_imm): Handle RC/SAE immediates properly.
400 (check_VecOperations): New.
401 (i386_immediate): Handle EVEX features.
402 (i386_index_check): Handle zmmwords and zmm-registers.
403 (RC_SAE_immediate): New.
404 (i386_att_operand): Handle EVEX features.
405 (parse_real_register): Add a check for ZMM/Mask registers.
406 (OPTION_MEVEXLIG): New.
407 (OPTION_MEVEXWIG): New.
408 (md_longopts): Add mevexlig and mevexwig.
409 (md_parse_option): Handle mevexlig and mevexwig options.
410 (md_show_usage): Add description for mevexlig and mevexwig.
411 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
412 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
413
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4142013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
415
416 * config/tc-i386.c (cpu_arch): Add .sha.
417 * doc/c-i386.texi: Document sha/.sha.
418
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4192013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
420 Kirill Yukhin <kirill.yukhin@intel.com>
421 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
422
423 * config/tc-i386.c (BND_PREFIX): New.
424 (struct _i386_insn): Add new field bnd_prefix.
425 (add_bnd_prefix): New.
426 (cpu_arch): Add MPX.
427 (i386_operand_type): Add regbnd.
428 (md_assemble): Handle BND prefixes.
429 (parse_insn): Likewise.
430 (output_branch): Likewise.
431 (output_jump): Likewise.
432 (build_modrm_byte): Handle regbnd.
433 (OPTION_MADD_BND_PREFIX): New.
434 (md_longopts): Add entry for 'madd-bnd-prefix'.
435 (md_parse_option): Handle madd-bnd-prefix option.
436 (md_show_usage): Add description for madd-bnd-prefix
437 option.
438 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
439
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4402013-07-24 Tristan Gingold <gingold@adacore.com>
441
442 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
443 xcoff targets.
444
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4452013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
446
447 * config/tc-s390.c (s390_machine): Don't force the .machine
448 argument to lower case.
449
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4502013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
451
452 * config/tc-arm.c (s_arm_arch_extension): Improve error message
453 for invalid extension.
454
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4552013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
456
457 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
458 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
459 (aarch64_abi): New variable.
460 (ilp32_p): Change to be a macro.
461 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
462 (struct aarch64_option_abi_value_table): New struct.
463 (aarch64_abis): New table.
464 (aarch64_parse_abi): New function.
465 (aarch64_long_opts): Add entry for -mabi=.
466 * doc/as.texinfo (Target AArch64 options): Document -mabi.
467 * doc/c-aarch64.texi: Likewise.
468
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NC
4692013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
470
471 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
472 unsigned comparison.
473
f0c00282
NC
4742013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
475
cbe02d4f 476 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 477 RX610.
cbe02d4f 478 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
479 check floating point operation support for target RX100 and
480 RX200.
cbe02d4f
AM
481 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
482 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
483 RX200, RX600, and RX610
f0c00282 484
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NC
4852013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
486
487 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
488
8be59acb
NC
4892013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
490
491 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
492 * doc/c-avr.texi: Likewise.
493
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RS
4942013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
495
496 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
497 error with older GCCs.
498 (mips16_macro_build): Dereference args.
499
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RS
5002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
501
502 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
503 New functions, split out from...
504 (reg_lookup): ...here. Remove itbl support.
505 (reglist_lookup): Delete.
506 (mips_operand_token_type): New enum.
507 (mips_operand_token): New structure.
508 (mips_operand_tokens): New variable.
509 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
510 (mips_parse_arguments): New functions.
511 (md_begin): Initialize mips_operand_tokens.
512 (mips_arg_info): Add a token field. Remove optional_reg field.
513 (match_char, match_expression): New functions.
514 (match_const_int): Use match_expression. Remove "s" argument
515 and return a boolean result. Remove O_register handling.
516 (match_regno, match_reg, match_reg_range): New functions.
517 (match_int_operand, match_mapped_int_operand, match_msb_operand)
518 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
519 (match_addiusp_operand, match_clo_clz_dest_operand)
520 (match_lwm_swm_list_operand, match_entry_exit_operand)
521 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
522 (match_tied_reg_operand): Remove "s" argument and return a boolean
523 result. Match tokens rather than text. Update calls to
524 match_const_int. Rely on match_regno to call check_regno.
525 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
526 "arg" argument. Return a boolean result.
527 (parse_float_constant): Replace with...
528 (match_float_constant): ...this new function.
529 (match_operand): Remove "s" argument and return a boolean result.
530 Update calls to subfunctions.
531 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
532 rather than string-parsing routines. Update handling of optional
533 registers for token scheme.
534
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5352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
536
537 * config/tc-mips.c (parse_float_constant): Split out from...
538 (mips_ip): ...here.
539
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RS
5402013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
541
542 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
543 Delete.
544
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RS
5452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
546
547 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
548 (match_entry_exit_operand): New function.
549 (match_save_restore_list_operand): Likewise.
550 (match_operand): Use them.
551 (check_absolute_expr): Delete.
552 (mips16_ip): Rewrite main parsing loop to use mips_operands.
553
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5542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
555
556 * config/tc-mips.c: Enable functions commented out in previous patch.
557 (SKIP_SPACE_TABS): Move further up file.
558 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
559 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
560 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
561 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
562 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
563 (micromips_imm_b_map, micromips_imm_c_map): Delete.
564 (mips_lookup_reg_pair): Delete.
565 (macro): Use report_bad_range and report_bad_field.
566 (mips_immed, expr_const_in_range): Delete.
567 (mips_ip): Rewrite main parsing loop to use new functions.
568
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5692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
572 Change return type to bfd_boolean.
573 (report_bad_range, report_bad_field): New functions.
574 (mips_arg_info): New structure.
575 (match_const_int, convert_reg_type, check_regno, match_int_operand)
576 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
577 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
578 (match_addiusp_operand, match_clo_clz_dest_operand)
579 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
580 (match_pc_operand, match_tied_reg_operand, match_operand)
581 (check_completed_insn): New functions, commented out for now.
582
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RS
5832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
584
585 * config/tc-mips.c (insn_insert_operand): New function.
586 (macro_build, mips16_macro_build): Put null character check
587 in the for loop and convert continues to breaks. Use operand
588 structures to handle constant operands.
589
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5902013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
591
592 * config/tc-mips.c (validate_mips_insn): Move further up file.
593 Add insn_bits and decode_operand arguments. Use the mips_operand
594 fields to work out which bits an operand occupies. Detect double
595 definitions.
596 (validate_micromips_insn): Move further up file. Call into
597 validate_mips_insn.
598
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5992013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
600
601 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
602
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RS
6032013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
604
605 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
606 and "~".
607 (macro): Update accordingly.
608
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RS
6092013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
610
611 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
612 (imm_reloc): Delete.
613 (md_assemble): Remove imm_reloc handling.
614 (mips_ip): Update commentary. Use offset_expr and offset_reloc
615 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
616 Use a temporary array rather than imm_reloc when parsing
617 constant expressions. Remove imm_reloc initialization.
618 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
619 for the relaxable field. Use a relax_char variable to track the
620 type of this field. Remove imm_reloc initialization.
621
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6222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
623
624 * config/tc-mips.c (mips16_ip): Handle "I".
625
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MR
6262013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
627
628 * config/tc-mips.c (mips_flag_nan2008): New variable.
629 (options): Add OPTION_NAN enum value.
630 (md_longopts): Handle it.
631 (md_parse_option): Likewise.
632 (s_nan): New function.
633 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
634 (md_show_usage): Add -mnan.
635
636 * doc/as.texinfo (Overview): Add -mnan.
637 * doc/c-mips.texi (MIPS Opts): Document -mnan.
638 (MIPS NaN Encodings): New node. Document .nan directive.
639 (MIPS-Dependent): List the new node.
640
c1094734
TG
6412013-07-09 Tristan Gingold <gingold@adacore.com>
642
643 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
644
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RS
6452013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
646
647 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
648 for 'A' and assume that the constant has been elided if the result
649 is an O_register.
650
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RS
6512013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
652
653 * config/tc-mips.c (gprel16_reloc_p): New function.
654 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
655 BFD_RELOC_UNUSED.
656 (offset_high_part, small_offset_p): New functions.
657 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
658 register load and store macros, handle the 16-bit offset case first.
659 If a 16-bit offset is not suitable for the instruction we're
660 generating, load it into the temporary register using
661 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
662 M_L_DAB code once the address has been constructed. For double load
663 and store macros, again handle the 16-bit offset case first.
664 If the second register cannot be accessed from the same high
665 part as the first, load it into AT using ADDRESS_ADDI_INSN.
666 Fix the handling of LD in cases where the first register is the
667 same as the base. Also handle the case where the offset is
668 not 16 bits and the second register cannot be accessed from the
669 same high part as the first. For unaligned loads and stores,
670 fuse the offbits == 12 and old "ab" handling. Apply this handling
671 whenever the second offset needs a different high part from the first.
672 Construct the offset using ADDRESS_ADDI_INSN where possible,
673 for offbits == 16 as well as offbits == 12. Use offset_reloc
674 when constructing the individual loads and stores.
675 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
676 and offset_reloc before matching against a particular opcode.
677 Handle elided 'A' constants. Allow 'A' constants to use
678 relocation operators.
679
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RS
6802013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
683 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
684 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
685
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RS
6862013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
687
688 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
689 Require the msb to be <= 31 for "+s". Check that the size is <= 31
690 for both "+s" and "+S".
691
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RS
6922013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
693
694 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
695 (mips_ip, mips16_ip): Handle "+i".
696
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RS
6972013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
698
699 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
700 (micromips_to_32_reg_h_map): Rename to...
701 (micromips_to_32_reg_h_map1): ...this.
702 (micromips_to_32_reg_i_map): Rename to...
703 (micromips_to_32_reg_h_map2): ...this.
704 (mips_lookup_reg_pair): New function.
705 (gpr_write_mask, macro): Adjust after above renaming.
706 (validate_micromips_insn): Remove "mi" handling.
707 (mips_ip): Likewise. Parse both registers in a pair for "mh".
708
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7092013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
710
711 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
712 (mips_ip): Remove "+D" and "+T" handling.
713
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AK
7142013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
715
716 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
717 relocs.
718
2c0a3565
MS
7192013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
720
4aa2c5e2
MS
721 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
722
7232013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
724
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MS
725 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
726 (aarch64_force_relocation): Likewise.
727
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AM
7282013-07-02 Alan Modra <amodra@gmail.com>
729
730 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
731
81566a9b
MR
7322013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
733
734 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
735 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
736 Replace @sc{mips16} with literal `MIPS16'.
737 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
738
a6bb11b2
YZ
7392013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
740
741 * config/tc-aarch64.c (reloc_table): Replace
742 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
743 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
744 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
745 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
746 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
747 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
748 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
749 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
750 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
751 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
752 (aarch64_force_relocation): Likewise.
753
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YZ
7542013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
755
756 * config/tc-aarch64.c (ilp32_p): New static variable.
757 (elf64_aarch64_target_format): Return the target according to the
758 value of 'ilp32_p'.
759 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
760 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
761 (aarch64_dwarf2_addr_size): New function.
762 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
763 (DWARF2_ADDR_SIZE): New define.
764
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7652013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
766
767 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
768
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RS
7692013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
770
771 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
772
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MR
7732013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
774
775 * config/tc-mips.c (mips_set_options): Add insn32 member.
776 (mips_opts): Initialize it.
777 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
778 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
779 (md_longopts): Add "minsn32" and "mno-insn32" options.
780 (is_size_valid): Handle insn32 mode.
781 (md_assemble): Pass instruction string down to macro.
782 (brk_fmt): Add second dimension and insn32 mode initializers.
783 (mfhl_fmt): Likewise.
784 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
785 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
786 (macro_build_jalr, move_register): Handle insn32 mode.
787 (macro_build_branch_rs): Likewise.
788 (macro): Handle insn32 mode.
789 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
790 (mips_ip): Handle insn32 mode.
791 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
792 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
793 (mips_handle_align): Handle insn32 mode.
794 (md_show_usage): Add -minsn32 and -mno-insn32.
795
796 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
797 -mno-insn32 options.
798 (-minsn32, -mno-insn32): New options.
799 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
800 options.
801 (MIPS assembly options): New node. Document .set insn32 and
802 .set noinsn32.
803 (MIPS-Dependent): List the new node.
804
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NC
8052013-06-25 Nick Clifton <nickc@redhat.com>
806
807 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
808 the PC in indirect addressing on 430xv2 parts.
809 (msp430_operands): Add version test to hardware bug encoding
810 restrictions.
811
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RM
8122013-06-24 Roland McGrath <mcgrathr@google.com>
813
d996d970
RM
814 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
815 so it skips whitespace before it.
816 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
817
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RM
818 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
819 (arm_reg_parse_multi): Skip whitespace first.
820 (parse_reg_list): Likewise.
821 (parse_vfp_reg_list): Likewise.
822 (s_arm_unwind_save_mmxwcg): Likewise.
823
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NC
8242013-06-24 Nick Clifton <nickc@redhat.com>
825
826 PR gas/15623
827 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
828
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RS
8292013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
830
831 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
832
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RS
8332013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
834
835 * config/tc-mips.c: Assert that offsetT and valueT are at least
836 8 bytes in size.
837 (GPR_SMIN, GPR_SMAX): New macros.
838 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
839
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RS
8402013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
841
842 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
843 conditions. Remove any code deselected by them.
844 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
845
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RS
8462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
847
848 * NEWS: Note removal of ECOFF support.
849 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
850 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
851 (MULTI_CFILES): Remove config/e-mipsecoff.c.
852 * Makefile.in: Regenerate.
853 * configure.in: Remove MIPS ECOFF references.
854 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
855 Delete cases.
856 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
857 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
858 (mips-*-*): ...this single case.
859 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
860 MIPS emulations to be e-mipself*.
861 * configure: Regenerate.
862 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
863 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
864 (mips-*-sysv*): Remove coff and ecoff cases.
865 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
866 * ecoff.c: Remove reference to MIPS ECOFF.
867 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
868 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
869 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
870 (mips_hi_fixup): Tweak comment.
871 (append_insn): Require a howto.
872 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
873
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RS
8742013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
875
876 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
877 Use "CPU" instead of "cpu".
878 * doc/c-mips.texi: Likewise.
879 (MIPS Opts): Rename to MIPS Options.
880 (MIPS option stack): Rename to MIPS Option Stack.
881 (MIPS ASE instruction generation overrides): Rename to
882 MIPS ASE Instruction Generation Overrides (for now).
883 (MIPS floating-point): Rename to MIPS Floating-Point.
884
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8852013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
886
887 * doc/c-mips.texi (MIPS Macros): New section.
888 (MIPS Object): Replace with...
889 (MIPS Small Data): ...this new section.
890
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RS
8912013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
892
893 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
894 Capitalize name. Use @kindex instead of @cindex for .set entries.
895
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RS
8962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
897
898 * doc/c-mips.texi (MIPS Stabs): Remove section.
899
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RS
9002013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
901
902 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
903 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
904 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
905 (ISA_SUPPORTS_VIRT64_ASE): Delete.
906 (mips_ase): New structure.
907 (mips_ases): New table.
908 (FP64_ASES): New macro.
909 (mips_ase_groups): New array.
910 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
911 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
912 functions.
913 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
914 (md_parse_option): Use mips_ases and mips_set_ase instead of
915 separate case statements for each ASE option.
916 (mips_after_parse_args): Use FP64_ASES. Use
917 mips_check_isa_supports_ases to check the ASEs against
918 other options.
919 (s_mipsset): Use mips_ases and mips_set_ase instead of
920 separate if statements for each ASE option. Use
921 mips_check_isa_supports_ases, even when a non-ASE option
922 is specified.
923
63a4bc21
KT
9242013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
925
926 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
927
c31f3936
RS
9282013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
929
930 * config/tc-mips.c (md_shortopts, options, md_longopts)
931 (md_longopts_size): Move earlier in file.
932
846ef2d0
RS
9332013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
934
935 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
936 with a single "ase" bitmask.
937 (mips_opts): Update accordingly.
938 (file_ase, file_ase_explicit): New variables.
939 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
940 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
941 (ISA_HAS_ROR): Adjust for mips_set_options change.
942 (is_opcode_valid): Take the base ase mask directly from mips_opts.
943 (mips_ip): Adjust for mips_set_options change.
944 (md_parse_option): Likewise. Update file_ase_explicit.
945 (mips_after_parse_args): Adjust for mips_set_options change.
946 Use bitmask operations to select the default ASEs. Set file_ase
947 rather than individual per-ASE variables.
948 (s_mipsset): Adjust for mips_set_options change.
949 (mips_elf_final_processing): Test file_ase rather than
950 file_ase_mdmx. Remove commented-out code.
951
d16afab6
RS
9522013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
953
954 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
955 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
956 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
957 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
958 (mips_after_parse_args): Use the new "ase" field to choose
959 the default ASEs.
960 (mips_cpu_info_table): Move ASEs from the "flags" field to the
961 "ase" field.
962
e83a675f
RE
9632013-06-18 Richard Earnshaw <rearnsha@arm.com>
964
965 * config/tc-arm.c (symbol_preemptible): New function.
966 (relax_branch): Use it.
967
7f3c4072
CM
9682013-06-17 Catherine Moore <clm@codesourcery.com>
969 Maciej W. Rozycki <macro@codesourcery.com>
970 Chao-Ying Fu <fu@mips.com>
971
972 * config/tc-mips.c (mips_set_options): Add ase_eva.
973 (mips_set_options mips_opts): Add ase_eva.
974 (file_ase_eva): Declare.
975 (ISA_SUPPORTS_EVA_ASE): Define.
976 (IS_SEXT_9BIT_NUM): Define.
977 (MIPS_CPU_ASE_EVA): Define.
978 (is_opcode_valid): Add support for ase_eva.
979 (macro_build): Likewise.
980 (macro): Likewise.
981 (validate_mips_insn): Likewise.
982 (validate_micromips_insn): Likewise.
983 (mips_ip): Likewise.
984 (options): Add OPTION_EVA and OPTION_NO_EVA.
985 (md_longopts): Add -meva and -mno-eva.
986 (md_parse_option): Process new options.
987 (mips_after_parse_args): Check for valid EVA combinations.
988 (s_mipsset): Likewise.
989
e410add4
RS
9902013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
991
992 * dwarf2dbg.h (dwarf2_move_insn): Declare.
993 * dwarf2dbg.c (line_subseg): Add pmove_tail.
994 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
995 (dwarf2_gen_line_info_1): Update call accordingly.
996 (dwarf2_move_insn): New function.
997 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
998
6a50d470
RS
9992013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1000
1001 Revert:
1002
1003 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1004
1005 PR gas/13024
1006 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1007 (dwarf2_gen_line_info_1): Delete.
1008 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1009 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1010 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1011 (dwarf2_directive_loc): Push previous .locs instead of generating
1012 them immediately.
1013
f122319e
CF
10142013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1015
1016 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1017 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1018
909c7f9c
NC
10192013-06-13 Nick Clifton <nickc@redhat.com>
1020
1021 PR gas/15602
1022 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1023 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1024 function. Generates an error if the adjusted offset is out of a
1025 16-bit range.
1026
5d5755a7
SL
10272013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1028
1029 * config/tc-nios2.c (md_apply_fix): Mask constant
1030 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1031
3bf0dbfb
MR
10322013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1033
1034 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1035 MIPS-3D instructions either.
1036 (md_convert_frag): Update the COPx branch mask accordingly.
1037
1038 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1039 option.
1040 * doc/as.texinfo (Overview): Add --relax-branch and
1041 --no-relax-branch.
1042 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1043 --no-relax-branch.
1044
9daf7bab
SL
10452013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1046
1047 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1048 omitted.
1049
d301a56b
RS
10502013-06-08 Catherine Moore <clm@codesourcery.com>
1051
1052 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1053 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1054 (append_insn): Change INSN_xxxx to ASE_xxxx.
1055
7bab7634
DC
10562013-06-01 George Thomas <george.thomas@atmel.com>
1057
cbe02d4f 1058 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1059 AVR_ISA_XMEGAU
1060
f60cf82f
L
10612013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1062
1063 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1064 for ELF.
1065
a3f278e2
CM
10662013-05-31 Paul Brook <paul@codesourcery.com>
1067
a3f278e2
CM
1068 * config/tc-mips.c (s_ehword): New.
1069
067ec077
CM
10702013-05-30 Paul Brook <paul@codesourcery.com>
1071
1072 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1073
d6101ac2
MR
10742013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1075
1076 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1077 convert relocs who have no relocatable field either. Rephrase
1078 the conditional so that the PC-relative check is only applied
1079 for REL targets.
1080
f19ccbda
MR
10812013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1082
1083 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1084 calculation.
1085
418009c2
YZ
10862013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1087
1088 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1089 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1090 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1091 (md_apply_fix): Likewise.
1092 (aarch64_force_relocation): Likewise.
1093
0a8897c7
KT
10942013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1095
1096 * config/tc-arm.c (it_fsm_post_encode): Improve
1097 warning messages about deprecated IT block formats.
1098
89d2a2a3
MS
10992013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1100
1101 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1102 inside fx_done condition.
1103
c77c0862
RS
11042013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1105
1106 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1107
c0637f3a
PB
11082013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1109
1110 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1111 and clean up warning when using PRINT_OPCODE_TABLE.
1112
5656a981
AM
11132013-05-20 Alan Modra <amodra@gmail.com>
1114
1115 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1116 and data fixups performing shift/high adjust/sign extension on
1117 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1118 when writing data fixups rather than recalculating size.
1119
997b26e8
JBG
11202013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1121
1122 * doc/c-msp430.texi: Fix typo.
1123
9f6e76f4
TG
11242013-05-16 Tristan Gingold <gingold@adacore.com>
1125
1126 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1127 are also TOC symbols.
1128
638d3803
NC
11292013-05-16 Nick Clifton <nickc@redhat.com>
1130
1131 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1132 Add -mcpu command to specify core type.
997b26e8 1133 * doc/c-msp430.texi: Update documentation.
638d3803 1134
b015e599
AP
11352013-05-09 Andrew Pinski <apinski@cavium.com>
1136
1137 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1138 (mips_opts): Update for the new field.
1139 (file_ase_virt): New variable.
1140 (ISA_SUPPORTS_VIRT_ASE): New macro.
1141 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1142 (MIPS_CPU_ASE_VIRT): New define.
1143 (is_opcode_valid): Handle ase_virt.
1144 (macro_build): Handle "+J".
1145 (validate_mips_insn): Likewise.
1146 (mips_ip): Likewise.
1147 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1148 (md_longopts): Add mvirt and mnovirt
1149 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1150 (mips_after_parse_args): Handle ase_virt field.
1151 (s_mipsset): Handle "virt" and "novirt".
1152 (mips_elf_final_processing): Add a comment about virt ASE might need
1153 a new flag.
1154 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1155 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1156 Document ".set virt" and ".set novirt".
1157
da8094d7
AM
11582013-05-09 Alan Modra <amodra@gmail.com>
1159
1160 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1161 control of operand flag bits.
1162
c5f8c205
AM
11632013-05-07 Alan Modra <amodra@gmail.com>
1164
1165 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1166 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1167 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1168 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1169 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1170 Shift and sign-extend fieldval for use by some VLE reloc
1171 operand->insert functions.
1172
b47468a6
CM
11732013-05-06 Paul Brook <paul@codesourcery.com>
1174 Catherine Moore <clm@codesourcery.com>
1175
c5f8c205
AM
1176 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1177 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1178 (md_apply_fix): Likewise.
1179 (tc_gen_reloc): Likewise.
1180
2de39019
CM
11812013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1182
1183 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1184 (mips_fix_adjustable): Adjust pc-relative check to use
1185 limited_pc_reloc_p.
1186
754e2bb9
RS
11872013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1188
1189 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1190 (s_mips_stab): Do not restrict to stabn only.
1191
13761a11
NC
11922013-05-02 Nick Clifton <nickc@redhat.com>
1193
1194 * config/tc-msp430.c: Add support for the MSP430X architecture.
1195 Add code to insert a NOP instruction after any instruction that
1196 might change the interrupt state.
1197 Add support for the LARGE memory model.
1198 Add code to initialise the .MSP430.attributes section.
1199 * config/tc-msp430.h: Add support for the MSP430X architecture.
1200 * doc/c-msp430.texi: Document the new -mL and -mN command line
1201 options.
1202 * NEWS: Mention support for the MSP430X architecture.
1203
df26367c
MR
12042013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1205
1206 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1207 alpha*-*-linux*ecoff*.
1208
f02d8318
CF
12092013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1210
1211 * config/tc-mips.c (mips_ip): Add sizelo.
1212 For "+C", "+G", and "+H", set sizelo and compare against it.
1213
b40bf0a2
NC
12142013-04-29 Nick Clifton <nickc@redhat.com>
1215
1216 * as.c (Options): Add -gdwarf-sections.
1217 (parse_args): Likewise.
1218 * as.h (flag_dwarf_sections): Declare.
1219 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1220 (process_entries): When -gdwarf-sections is enabled generate
1221 fragmentary .debug_line sections.
1222 (out_debug_line): Set the section for the .debug_line section end
1223 symbol.
1224 * doc/as.texinfo: Document -gdwarf-sections.
1225 * NEWS: Mention -gdwarf-sections.
1226
8eeccb77 12272013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1228
1229 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1230 according to the target parameter. Don't call s_segm since s_segm
1231 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1232 initialized yet.
1233 (md_begin): Call s_segm according to target parameter from command
1234 line.
1235
49926cd0
AM
12362013-04-25 Alan Modra <amodra@gmail.com>
1237
1238 * configure.in: Allow little-endian linux.
1239 * configure: Regenerate.
1240
e3031850
SL
12412013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1242
1243 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1244 "fstatus" control register to "eccinj".
1245
cb948fc0
KT
12462013-04-19 Kai Tietz <ktietz@redhat.com>
1247
1248 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1249
4455e9ad
JB
12502013-04-15 Julian Brown <julian@codesourcery.com>
1251
1252 * expr.c (add_to_result, subtract_from_result): Make global.
1253 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1254 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1255 subtract_from_result to handle extra bit of precision for .sleb128
1256 directive operands.
1257
956a6ba3
JB
12582013-04-10 Julian Brown <julian@codesourcery.com>
1259
1260 * read.c (convert_to_bignum): Add sign parameter. Use it
1261 instead of X_unsigned to determine sign of resulting bignum.
1262 (emit_expr): Pass extra argument to convert_to_bignum.
1263 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1264 X_extrabit to convert_to_bignum.
1265 (parse_bitfield_cons): Set X_extrabit.
1266 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1267 Initialise X_extrabit field as appropriate.
1268 (add_to_result): New.
1269 (subtract_from_result): New.
1270 (expr): Use above.
1271 * expr.h (expressionS): Add X_extrabit field.
1272
eb9f3f00
JB
12732013-04-10 Jan Beulich <jbeulich@suse.com>
1274
1275 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1276 register being PC when is_t or writeback, and use distinct
1277 diagnostic for the latter case.
1278
ccb84d65
JB
12792013-04-10 Jan Beulich <jbeulich@suse.com>
1280
1281 * gas/config/tc-arm.c (parse_operands): Re-write
1282 po_barrier_or_imm().
1283 (do_barrier): Remove bogus constraint().
1284 (do_t_barrier): Remove.
1285
4d13caa0
NC
12862013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1287
1288 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1289 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1290 ATmega2564RFR2
1291 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1292
16d02dc9
JB
12932013-04-09 Jan Beulich <jbeulich@suse.com>
1294
1295 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1296 Use local variable Rt in more places.
1297 (do_vmsr): Accept all control registers.
1298
05ac0ffb
JB
12992013-04-09 Jan Beulich <jbeulich@suse.com>
1300
1301 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1302 if there was none specified for moves between scalar and core
1303 register.
1304
2d51fb74
JB
13052013-04-09 Jan Beulich <jbeulich@suse.com>
1306
1307 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1308 NEON_ALL_LANES case.
1309
94dcf8bf
JB
13102013-04-08 Jan Beulich <jbeulich@suse.com>
1311
1312 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1313 PC-relative VSTR.
1314
1472d06f
JB
13152013-04-08 Jan Beulich <jbeulich@suse.com>
1316
1317 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1318 entry to sp_fiq.
1319
0c76cae8
AM
13202013-04-03 Alan Modra <amodra@gmail.com>
1321
1322 * doc/as.texinfo: Add support to generate man options for h8300.
1323 * doc/c-h8300.texi: Likewise.
1324
92eb40d9
RR
13252013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1326
1327 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1328 Cortex-A57.
1329
51dcdd4d
NC
13302013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1331
1332 PR binutils/15068
1333 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1334
c5d685bf
NC
13352013-03-26 Nick Clifton <nickc@redhat.com>
1336
9b978282
NC
1337 PR gas/15295
1338 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1339 start of the file each time.
1340
c5d685bf
NC
1341 PR gas/15178
1342 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1343 FreeBSD targets.
1344
9699c833
TG
13452013-03-26 Douglas B Rupp <rupp@gnat.com>
1346
1347 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1348 after fixup.
1349
4755303e
WN
13502013-03-21 Will Newton <will.newton@linaro.org>
1351
1352 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1353 pc-relative str instructions in Thumb mode.
1354
81f5558e
NC
13552013-03-21 Michael Schewe <michael.schewe@gmx.net>
1356
1357 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1358 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1359 R_H8_DISP32A16.
1360 * config/tc-h8300.h: Remove duplicated defines.
1361
71863e73
NC
13622013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1363
1364 PR gas/15282
1365 * tc-avr.c (mcu_has_3_byte_pc): New function.
1366 (tc_cfi_frame_initial_instructions): Call it to find return
1367 address size.
1368
795b8e6b
NC
13692013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1370
1371 PR gas/15095
1372 * config/tc-tic6x.c (tic6x_try_encode): Handle
1373 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1374 encode register pair numbers when required.
1375
ba86b375
WN
13762013-03-15 Will Newton <will.newton@linaro.org>
1377
1378 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1379 in vstr in Thumb mode for pre-ARMv7 cores.
1380
9e6f3811
AS
13812013-03-14 Andreas Schwab <schwab@suse.de>
1382
1383 * doc/c-arc.texi (ARC Directives): Revert last change and use
1384 @itemize instead of @table.
1385 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1386
b10bf8c5
NC
13872013-03-14 Nick Clifton <nickc@redhat.com>
1388
1389 PR gas/15273
1390 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1391 NULL message, instead just check ARM_CPU_IS_ANY directly.
1392
ba724cfc
NC
13932013-03-14 Nick Clifton <nickc@redhat.com>
1394
1395 PR gas/15212
9e6f3811 1396 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1397 for table format.
1398 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1399 to the @item directives.
1400 (ARM-Neon-Alignment): Move to correct place in the document.
1401 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1402 formatting.
1403 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1404 @smallexample.
1405
531a94fd
SL
14062013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1407
1408 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1409 case. Add default BAD_CASE to switch.
1410
dad60f8e
SL
14112013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1412
1413 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1414 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1415
dd5181d5
KT
14162013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1417
1418 * config/tc-arm.c (crc_ext_armv8): New feature set.
1419 (UNPRED_REG): New macro.
1420 (do_crc32_1): New function.
1421 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1422 do_crc32ch, do_crc32cw): Likewise.
1423 (TUEc): New macro.
1424 (insns): Add entries for crc32 mnemonics.
1425 (arm_extensions): Add entry for crc.
1426
8e723a10
CLT
14272013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1428
1429 * write.h (struct fix): Add fx_dot_frag field.
1430 (dot_frag): Declare.
1431 * write.c (dot_frag): New variable.
1432 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1433 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1434 * expr.c (expr): Save value of frag_now in dot_frag when setting
1435 dot_value.
1436 * read.c (emit_expr): Likewise. Delete comments.
1437
be05d201
L
14382013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1439
1440 * config/tc-i386.c (flag_code_names): Removed.
1441 (i386_index_check): Rewrote.
1442
62b0d0d5
YZ
14432013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1444
1445 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1446 add comment.
1447 (aarch64_double_precision_fmovable): New function.
1448 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1449 function; handle hexadecimal representation of IEEE754 encoding.
1450 (parse_operands): Update the call to parse_aarch64_imm_float.
1451
165de32a
L
14522013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1453
1454 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1455 (check_hle): Updated.
1456 (md_assemble): Likewise.
1457 (parse_insn): Likewise.
1458
d5de92cf
L
14592013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1460
1461 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1462 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1463 (parse_insn): Remove expecting_string_instruction. Set
1464 i.rep_prefix.
1465
e60bb1dd
YZ
14662013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1467
1468 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1469
aeebdd9b
YZ
14702013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1471
1472 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1473 for system registers.
1474
4107ae22
DD
14752013-02-27 DJ Delorie <dj@redhat.com>
1476
1477 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1478 (rl78_op): Handle %code().
1479 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1480 (tc_gen_reloc): Likwise; convert to a computed reloc.
1481 (md_apply_fix): Likewise.
1482
151fa98f
NC
14832013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1484
1485 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1486
70a8bc5b 14872013-02-25 Terry Guo <terry.guo@arm.com>
1488
1489 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1490 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1491 list of accepted CPUs.
1492
5c111e37
L
14932013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1494
1495 PR gas/15159
1496 * config/tc-i386.c (cpu_arch): Add ".smap".
1497
1498 * doc/c-i386.texi: Document smap.
1499
8a75745d
MR
15002013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1501
1502 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1503 mips_assembling_insn appropriately.
1504 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1505
79850f26
MR
15062013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1507
cf29fc61 1508 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1509 extraneous braces.
1510
4c261dff
NC
15112013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1512
5c111e37 1513 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1514
ea33f281
NC
15152013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1516
1517 * configure.tgt: Add nios2-*-rtems*.
1518
a1ccaec9
YZ
15192013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1520
1521 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1522 NULL.
1523
0aa27725
RS
15242013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1525
1526 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1527 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1528
da4339ed
NC
15292013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1530
1531 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1532 core.
1533
36591ba1 15342013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1535 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1536
1537 Based on patches from Altera Corporation.
1538
1539 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1540 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1541 * Makefile.in: Regenerated.
1542 * configure.tgt: Add case for nios2*-linux*.
1543 * config/obj-elf.c: Conditionally include elf/nios2.h.
1544 * config/tc-nios2.c: New file.
1545 * config/tc-nios2.h: New file.
1546 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1547 * doc/Makefile.in: Regenerated.
1548 * doc/all.texi: Set NIOSII.
1549 * doc/as.texinfo (Overview): Add Nios II options.
1550 (Machine Dependencies): Include c-nios2.texi.
1551 * doc/c-nios2.texi: New file.
1552 * NEWS: Note Altera Nios II support.
1553
94d4433a
AM
15542013-02-06 Alan Modra <amodra@gmail.com>
1555
1556 PR gas/14255
1557 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1558 Don't skip fixups with fx_subsy non-NULL.
1559 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1560 with fx_subsy non-NULL.
1561
ace9af6f
L
15622013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1563
1564 * doc/c-metag.texi: Add "@c man" markers.
1565
89d67ed9
AM
15662013-02-04 Alan Modra <amodra@gmail.com>
1567
1568 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1569 related code.
1570 (TC_ADJUST_RELOC_COUNT): Delete.
1571 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1572
89072bd6
AM
15732013-02-04 Alan Modra <amodra@gmail.com>
1574
1575 * po/POTFILES.in: Regenerate.
1576
f9b2d544
NC
15772013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1578
1579 * config/tc-metag.c: Make SWAP instruction less permissive with
1580 its operands.
1581
392ca752
DD
15822013-01-29 DJ Delorie <dj@redhat.com>
1583
1584 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1585 relocs in .word/.etc statements.
1586
427d0db6
RM
15872013-01-29 Roland McGrath <mcgrathr@google.com>
1588
1589 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1590 immediate value for 8-bit offset" error so it shows line info.
1591
4faf939a
JM
15922013-01-24 Joseph Myers <joseph@codesourcery.com>
1593
1594 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1595 for 64-bit output.
1596
78c8d46c
NC
15972013-01-24 Nick Clifton <nickc@redhat.com>
1598
1599 * config/tc-v850.c: Add support for e3v5 architecture.
1600 * doc/c-v850.texi: Mention new support.
1601
fb5b7503
NC
16022013-01-23 Nick Clifton <nickc@redhat.com>
1603
1604 PR gas/15039
1605 * config/tc-avr.c: Include dwarf2dbg.h.
1606
8ce3d284
L
16072013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1608
1609 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1610 (tc_i386_fix_adjustable): Likewise.
1611 (lex_got): Likewise.
1612 (tc_gen_reloc): Likewise.
1613
f5555712
YZ
16142013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1615
1616 * config/tc-aarch64.c (output_operand_error_record): Change to output
1617 the out-of-range error message as value-expected message if there is
1618 only one single value in the expected range.
1619 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1620 LSL #0 as a programmer-friendly feature.
1621
8fd4256d
L
16222013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1623
1624 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1625 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1626 BFD_RELOC_64_SIZE relocations.
1627 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1628 for it.
1629 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1630 relocations against local symbols.
1631
a5840dce
AM
16322013-01-16 Alan Modra <amodra@gmail.com>
1633
1634 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1635 finding some sort of toc syntax error, and break to avoid
1636 compiler uninit warning.
1637
af89796a
L
16382013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1639
1640 PR gas/15019
1641 * config/tc-i386.c (lex_got): Increment length by 1 if the
1642 relocation token is removed.
1643
dd42f060
NC
16442013-01-15 Nick Clifton <nickc@redhat.com>
1645
1646 * config/tc-v850.c (md_assemble): Allow signed values for
1647 V850E_IMMEDIATE.
1648
464e3686
SK
16492013-01-11 Sean Keys <skeys@ipdatasys.com>
1650
1651 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1652 git to cvs.
464e3686 1653
5817ffd1
PB
16542013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1655
1656 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1657 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1658 * config/tc-ppc.c (md_show_usage): Likewise.
1659 (ppc_handle_align): Handle power8's group ending nop.
1660
f4b1f6a9
SK
16612013-01-10 Sean Keys <skeys@ipdatasys.com>
1662
1663 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1664 that the assember exits after the opcodes have been printed.
f4b1f6a9 1665
34bca508
L
16662013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1667
1668 * app.c: Remove trailing white spaces.
1669 * as.c: Likewise.
1670 * as.h: Likewise.
1671 * cond.c: Likewise.
1672 * dw2gencfi.c: Likewise.
1673 * dwarf2dbg.h: Likewise.
1674 * ecoff.c: Likewise.
1675 * input-file.c: Likewise.
1676 * itbl-lex.h: Likewise.
1677 * output-file.c: Likewise.
1678 * read.c: Likewise.
1679 * sb.c: Likewise.
1680 * subsegs.c: Likewise.
1681 * symbols.c: Likewise.
1682 * write.c: Likewise.
1683 * config/tc-i386.c: Likewise.
1684 * doc/Makefile.am: Likewise.
1685 * doc/Makefile.in: Likewise.
1686 * doc/c-aarch64.texi: Likewise.
1687 * doc/c-alpha.texi: Likewise.
1688 * doc/c-arc.texi: Likewise.
1689 * doc/c-arm.texi: Likewise.
1690 * doc/c-avr.texi: Likewise.
1691 * doc/c-bfin.texi: Likewise.
1692 * doc/c-cr16.texi: Likewise.
1693 * doc/c-d10v.texi: Likewise.
1694 * doc/c-d30v.texi: Likewise.
1695 * doc/c-h8300.texi: Likewise.
1696 * doc/c-hppa.texi: Likewise.
1697 * doc/c-i370.texi: Likewise.
1698 * doc/c-i386.texi: Likewise.
1699 * doc/c-i860.texi: Likewise.
1700 * doc/c-m32c.texi: Likewise.
1701 * doc/c-m32r.texi: Likewise.
1702 * doc/c-m68hc11.texi: Likewise.
1703 * doc/c-m68k.texi: Likewise.
1704 * doc/c-microblaze.texi: Likewise.
1705 * doc/c-mips.texi: Likewise.
1706 * doc/c-msp430.texi: Likewise.
1707 * doc/c-mt.texi: Likewise.
1708 * doc/c-s390.texi: Likewise.
1709 * doc/c-score.texi: Likewise.
1710 * doc/c-sh.texi: Likewise.
1711 * doc/c-sh64.texi: Likewise.
1712 * doc/c-tic54x.texi: Likewise.
1713 * doc/c-tic6x.texi: Likewise.
1714 * doc/c-v850.texi: Likewise.
1715 * doc/c-xc16x.texi: Likewise.
1716 * doc/c-xgate.texi: Likewise.
1717 * doc/c-xtensa.texi: Likewise.
1718 * doc/c-z80.texi: Likewise.
1719 * doc/internals.texi: Likewise.
1720
4c665b71
RM
17212013-01-10 Roland McGrath <mcgrathr@google.com>
1722
1723 * hash.c (hash_new_sized): Make it global.
1724 * hash.h: Declare it.
1725 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1726 pass a small size.
1727
a3c62988
NC
17282013-01-10 Will Newton <will.newton@imgtec.com>
1729
1730 * Makefile.am: Add Meta.
1731 * Makefile.in: Regenerate.
1732 * config/tc-metag.c: New file.
1733 * config/tc-metag.h: New file.
1734 * configure.tgt: Add Meta.
1735 * doc/Makefile.am: Add Meta.
1736 * doc/Makefile.in: Regenerate.
1737 * doc/all.texi: Add Meta.
1738 * doc/as.texiinfo: Document Meta options.
1739 * doc/c-metag.texi: New file.
1740
b37df7c4
SE
17412013-01-09 Steve Ellcey <sellcey@mips.com>
1742
1743 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1744 calls.
1745 * config/tc-mips.c (internalError): Remove, replace with abort.
1746
a3251895
YZ
17472013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1748
1749 * config/tc-aarch64.c (parse_operands): Change to compare the result
1750 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1751
8ab8155f
NC
17522013-01-07 Nick Clifton <nickc@redhat.com>
1753
1754 PR gas/14887
1755 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1756 anticipated character.
1757 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1758 here as it is no longer needed.
1759
a4ac1c42
AS
17602013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1761
1762 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1763 * doc/c-score.texi (SCORE-Opts): Likewise.
1764 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1765
e407c74b
NC
17662013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1767
1768 * config/tc-mips.c: Add support for MIPS r5900.
1769 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1770 lq and sq.
1771 (can_swap_branch_p, get_append_method): Detect some conditional
1772 short loops to fix a bug on the r5900 by NOP in the branch delay
1773 slot.
1774 (M_MUL): Support 3 operands in multu on r5900.
1775 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1776 (s_mipsset): Force 32 bit floating point on r5900.
1777 (mips_ip): Check parameter range of instructions mfps and mtps on
1778 r5900.
1779 * configure.in: Detect CPU type when target string contains r5900
1780 (e.g. mips64r5900el-linux-gnu).
1781
62658407
L
17822013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1783
1784 * as.c (parse_args): Update copyright year to 2013.
1785
95830fd1
YZ
17862013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1787
1788 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1789 and "cortex57".
1790
517bb291 17912013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1792
517bb291
NC
1793 PR gas/14987
1794 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1795 closing bracket.
d709e4e6 1796
517bb291 1797For older changes see ChangeLog-2012
08d56133 1798\f
517bb291 1799Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1800
1801Copying and distribution of this file, with or without modification,
1802are permitted in any medium without royalty provided the copyright
1803notice and this notice are preserved.
1804
08d56133
NC
1805Local Variables:
1806mode: change-log
1807left-margin: 8
1808fill-column: 74
1809version-control: never
1810End: