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ba92f887
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12013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * config/tc-mips.c (mips_flag_nan2008): New variable.
4 (options): Add OPTION_NAN enum value.
5 (md_longopts): Handle it.
6 (md_parse_option): Likewise.
7 (s_nan): New function.
8 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
9 (md_show_usage): Add -mnan.
10
11 * doc/as.texinfo (Overview): Add -mnan.
12 * doc/c-mips.texi (MIPS Opts): Document -mnan.
13 (MIPS NaN Encodings): New node. Document .nan directive.
14 (MIPS-Dependent): List the new node.
15
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162013-07-09 Tristan Gingold <gingold@adacore.com>
17
18 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
19
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202013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
21
22 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
23 for 'A' and assume that the constant has been elided if the result
24 is an O_register.
25
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262013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
27
28 * config/tc-mips.c (gprel16_reloc_p): New function.
29 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
30 BFD_RELOC_UNUSED.
31 (offset_high_part, small_offset_p): New functions.
32 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
33 register load and store macros, handle the 16-bit offset case first.
34 If a 16-bit offset is not suitable for the instruction we're
35 generating, load it into the temporary register using
36 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
37 M_L_DAB code once the address has been constructed. For double load
38 and store macros, again handle the 16-bit offset case first.
39 If the second register cannot be accessed from the same high
40 part as the first, load it into AT using ADDRESS_ADDI_INSN.
41 Fix the handling of LD in cases where the first register is the
42 same as the base. Also handle the case where the offset is
43 not 16 bits and the second register cannot be accessed from the
44 same high part as the first. For unaligned loads and stores,
45 fuse the offbits == 12 and old "ab" handling. Apply this handling
46 whenever the second offset needs a different high part from the first.
47 Construct the offset using ADDRESS_ADDI_INSN where possible,
48 for offbits == 16 as well as offbits == 12. Use offset_reloc
49 when constructing the individual loads and stores.
50 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
51 and offset_reloc before matching against a particular opcode.
52 Handle elided 'A' constants. Allow 'A' constants to use
53 relocation operators.
54
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552013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
56
57 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
58 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
59 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
60
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612013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
64 Require the msb to be <= 31 for "+s". Check that the size is <= 31
65 for both "+s" and "+S".
66
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672013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
68
69 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
70 (mips_ip, mips16_ip): Handle "+i".
71
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722013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
75 (micromips_to_32_reg_h_map): Rename to...
76 (micromips_to_32_reg_h_map1): ...this.
77 (micromips_to_32_reg_i_map): Rename to...
78 (micromips_to_32_reg_h_map2): ...this.
79 (mips_lookup_reg_pair): New function.
80 (gpr_write_mask, macro): Adjust after above renaming.
81 (validate_micromips_insn): Remove "mi" handling.
82 (mips_ip): Likewise. Parse both registers in a pair for "mh".
83
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842013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
85
86 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
87 (mips_ip): Remove "+D" and "+T" handling.
88
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892013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
90
91 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
92 relocs.
93
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942013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
95
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96 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
97
982013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
99
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100 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
101 (aarch64_force_relocation): Likewise.
102
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1032013-07-02 Alan Modra <amodra@gmail.com>
104
105 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
106
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1072013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
108
109 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
110 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
111 Replace @sc{mips16} with literal `MIPS16'.
112 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
113
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1142013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
115
116 * config/tc-aarch64.c (reloc_table): Replace
117 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
118 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
119 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
120 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
121 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
122 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
123 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
124 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
125 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
126 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
127 (aarch64_force_relocation): Likewise.
128
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1292013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
130
131 * config/tc-aarch64.c (ilp32_p): New static variable.
132 (elf64_aarch64_target_format): Return the target according to the
133 value of 'ilp32_p'.
134 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
135 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
136 (aarch64_dwarf2_addr_size): New function.
137 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
138 (DWARF2_ADDR_SIZE): New define.
139
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1402013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
141
142 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
143
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1442013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
145
146 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
147
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1482013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
149
150 * config/tc-mips.c (mips_set_options): Add insn32 member.
151 (mips_opts): Initialize it.
152 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
153 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
154 (md_longopts): Add "minsn32" and "mno-insn32" options.
155 (is_size_valid): Handle insn32 mode.
156 (md_assemble): Pass instruction string down to macro.
157 (brk_fmt): Add second dimension and insn32 mode initializers.
158 (mfhl_fmt): Likewise.
159 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
160 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
161 (macro_build_jalr, move_register): Handle insn32 mode.
162 (macro_build_branch_rs): Likewise.
163 (macro): Handle insn32 mode.
164 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
165 (mips_ip): Handle insn32 mode.
166 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
167 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
168 (mips_handle_align): Handle insn32 mode.
169 (md_show_usage): Add -minsn32 and -mno-insn32.
170
171 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
172 -mno-insn32 options.
173 (-minsn32, -mno-insn32): New options.
174 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
175 options.
176 (MIPS assembly options): New node. Document .set insn32 and
177 .set noinsn32.
178 (MIPS-Dependent): List the new node.
179
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1802013-06-25 Nick Clifton <nickc@redhat.com>
181
182 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
183 the PC in indirect addressing on 430xv2 parts.
184 (msp430_operands): Add version test to hardware bug encoding
185 restrictions.
186
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1872013-06-24 Roland McGrath <mcgrathr@google.com>
188
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189 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
190 so it skips whitespace before it.
191 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
192
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193 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
194 (arm_reg_parse_multi): Skip whitespace first.
195 (parse_reg_list): Likewise.
196 (parse_vfp_reg_list): Likewise.
197 (s_arm_unwind_save_mmxwcg): Likewise.
198
24382199
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1992013-06-24 Nick Clifton <nickc@redhat.com>
200
201 PR gas/15623
202 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
203
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2042013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
205
206 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
207
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2082013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c: Assert that offsetT and valueT are at least
211 8 bytes in size.
212 (GPR_SMIN, GPR_SMAX): New macros.
213 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
214
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2152013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
216
217 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
218 conditions. Remove any code deselected by them.
219 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
220
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2212013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
222
223 * NEWS: Note removal of ECOFF support.
224 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
225 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
226 (MULTI_CFILES): Remove config/e-mipsecoff.c.
227 * Makefile.in: Regenerate.
228 * configure.in: Remove MIPS ECOFF references.
229 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
230 Delete cases.
231 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
232 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
233 (mips-*-*): ...this single case.
234 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
235 MIPS emulations to be e-mipself*.
236 * configure: Regenerate.
237 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
238 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
239 (mips-*-sysv*): Remove coff and ecoff cases.
240 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
241 * ecoff.c: Remove reference to MIPS ECOFF.
242 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
243 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
244 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
245 (mips_hi_fixup): Tweak comment.
246 (append_insn): Require a howto.
247 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
248
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2492013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
252 Use "CPU" instead of "cpu".
253 * doc/c-mips.texi: Likewise.
254 (MIPS Opts): Rename to MIPS Options.
255 (MIPS option stack): Rename to MIPS Option Stack.
256 (MIPS ASE instruction generation overrides): Rename to
257 MIPS ASE Instruction Generation Overrides (for now).
258 (MIPS floating-point): Rename to MIPS Floating-Point.
259
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2602013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
261
262 * doc/c-mips.texi (MIPS Macros): New section.
263 (MIPS Object): Replace with...
264 (MIPS Small Data): ...this new section.
265
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2662013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
267
268 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
269 Capitalize name. Use @kindex instead of @cindex for .set entries.
270
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2712013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
272
273 * doc/c-mips.texi (MIPS Stabs): Remove section.
274
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2752013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
276
277 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
278 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
279 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
280 (ISA_SUPPORTS_VIRT64_ASE): Delete.
281 (mips_ase): New structure.
282 (mips_ases): New table.
283 (FP64_ASES): New macro.
284 (mips_ase_groups): New array.
285 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
286 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
287 functions.
288 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
289 (md_parse_option): Use mips_ases and mips_set_ase instead of
290 separate case statements for each ASE option.
291 (mips_after_parse_args): Use FP64_ASES. Use
292 mips_check_isa_supports_ases to check the ASEs against
293 other options.
294 (s_mipsset): Use mips_ases and mips_set_ase instead of
295 separate if statements for each ASE option. Use
296 mips_check_isa_supports_ases, even when a non-ASE option
297 is specified.
298
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2992013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
300
301 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
302
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3032013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
304
305 * config/tc-mips.c (md_shortopts, options, md_longopts)
306 (md_longopts_size): Move earlier in file.
307
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3082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
309
310 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
311 with a single "ase" bitmask.
312 (mips_opts): Update accordingly.
313 (file_ase, file_ase_explicit): New variables.
314 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
315 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
316 (ISA_HAS_ROR): Adjust for mips_set_options change.
317 (is_opcode_valid): Take the base ase mask directly from mips_opts.
318 (mips_ip): Adjust for mips_set_options change.
319 (md_parse_option): Likewise. Update file_ase_explicit.
320 (mips_after_parse_args): Adjust for mips_set_options change.
321 Use bitmask operations to select the default ASEs. Set file_ase
322 rather than individual per-ASE variables.
323 (s_mipsset): Adjust for mips_set_options change.
324 (mips_elf_final_processing): Test file_ase rather than
325 file_ase_mdmx. Remove commented-out code.
326
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3272013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
328
329 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
330 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
331 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
332 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
333 (mips_after_parse_args): Use the new "ase" field to choose
334 the default ASEs.
335 (mips_cpu_info_table): Move ASEs from the "flags" field to the
336 "ase" field.
337
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3382013-06-18 Richard Earnshaw <rearnsha@arm.com>
339
340 * config/tc-arm.c (symbol_preemptible): New function.
341 (relax_branch): Use it.
342
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3432013-06-17 Catherine Moore <clm@codesourcery.com>
344 Maciej W. Rozycki <macro@codesourcery.com>
345 Chao-Ying Fu <fu@mips.com>
346
347 * config/tc-mips.c (mips_set_options): Add ase_eva.
348 (mips_set_options mips_opts): Add ase_eva.
349 (file_ase_eva): Declare.
350 (ISA_SUPPORTS_EVA_ASE): Define.
351 (IS_SEXT_9BIT_NUM): Define.
352 (MIPS_CPU_ASE_EVA): Define.
353 (is_opcode_valid): Add support for ase_eva.
354 (macro_build): Likewise.
355 (macro): Likewise.
356 (validate_mips_insn): Likewise.
357 (validate_micromips_insn): Likewise.
358 (mips_ip): Likewise.
359 (options): Add OPTION_EVA and OPTION_NO_EVA.
360 (md_longopts): Add -meva and -mno-eva.
361 (md_parse_option): Process new options.
362 (mips_after_parse_args): Check for valid EVA combinations.
363 (s_mipsset): Likewise.
364
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3652013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
366
367 * dwarf2dbg.h (dwarf2_move_insn): Declare.
368 * dwarf2dbg.c (line_subseg): Add pmove_tail.
369 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
370 (dwarf2_gen_line_info_1): Update call accordingly.
371 (dwarf2_move_insn): New function.
372 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
373
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3742013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
375
376 Revert:
377
378 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
379
380 PR gas/13024
381 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
382 (dwarf2_gen_line_info_1): Delete.
383 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
384 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
385 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
386 (dwarf2_directive_loc): Push previous .locs instead of generating
387 them immediately.
388
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3892013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
390
391 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
392 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
393
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3942013-06-13 Nick Clifton <nickc@redhat.com>
395
396 PR gas/15602
397 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
398 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
399 function. Generates an error if the adjusted offset is out of a
400 16-bit range.
401
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4022013-06-12 Sandra Loosemore <sandra@codesourcery.com>
403
404 * config/tc-nios2.c (md_apply_fix): Mask constant
405 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
406
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4072013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
408
409 * config/tc-mips.c (append_insn): Don't do branch relaxation for
410 MIPS-3D instructions either.
411 (md_convert_frag): Update the COPx branch mask accordingly.
412
413 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
414 option.
415 * doc/as.texinfo (Overview): Add --relax-branch and
416 --no-relax-branch.
417 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
418 --no-relax-branch.
419
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4202013-06-09 Sandra Loosemore <sandra@codesourcery.com>
421
422 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
423 omitted.
424
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4252013-06-08 Catherine Moore <clm@codesourcery.com>
426
427 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
428 (is_opcode_valid_16): Pass ase value to opcode_is_member.
429 (append_insn): Change INSN_xxxx to ASE_xxxx.
430
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4312013-06-01 George Thomas <george.thomas@atmel.com>
432
433 * gas/config/tc-avr.c: Change ISA for devices with USB support to
434 AVR_ISA_XMEGAU
435
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4362013-05-31 H.J. Lu <hongjiu.lu@intel.com>
437
438 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
439 for ELF.
440
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4412013-05-31 Paul Brook <paul@codesourcery.com>
442
443 gas/
444 * config/tc-mips.c (s_ehword): New.
445
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4462013-05-30 Paul Brook <paul@codesourcery.com>
447
448 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
449
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4502013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
451
452 * write.c (resolve_reloc_expr_symbols): On REL targets don't
453 convert relocs who have no relocatable field either. Rephrase
454 the conditional so that the PC-relative check is only applied
455 for REL targets.
456
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4572013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
458
459 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
460 calculation.
461
418009c2
YZ
4622013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
463
464 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 465 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
466 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
467 (md_apply_fix): Likewise.
468 (aarch64_force_relocation): Likewise.
469
0a8897c7
KT
4702013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
471
472 * config/tc-arm.c (it_fsm_post_encode): Improve
473 warning messages about deprecated IT block formats.
474
89d2a2a3
MS
4752013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
476
477 * config/tc-aarch64.c (md_apply_fix): Move value range checking
478 inside fx_done condition.
479
c77c0862
RS
4802013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
481
482 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
483
c0637f3a
PB
4842013-05-20 Peter Bergner <bergner@vnet.ibm.com>
485
486 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
487 and clean up warning when using PRINT_OPCODE_TABLE.
488
5656a981
AM
4892013-05-20 Alan Modra <amodra@gmail.com>
490
491 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
492 and data fixups performing shift/high adjust/sign extension on
493 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
494 when writing data fixups rather than recalculating size.
495
997b26e8
JBG
4962013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
497
498 * doc/c-msp430.texi: Fix typo.
499
9f6e76f4
TG
5002013-05-16 Tristan Gingold <gingold@adacore.com>
501
502 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
503 are also TOC symbols.
504
638d3803
NC
5052013-05-16 Nick Clifton <nickc@redhat.com>
506
507 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
508 Add -mcpu command to specify core type.
997b26e8 509 * doc/c-msp430.texi: Update documentation.
638d3803 510
b015e599
AP
5112013-05-09 Andrew Pinski <apinski@cavium.com>
512
513 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
514 (mips_opts): Update for the new field.
515 (file_ase_virt): New variable.
516 (ISA_SUPPORTS_VIRT_ASE): New macro.
517 (ISA_SUPPORTS_VIRT64_ASE): New macro.
518 (MIPS_CPU_ASE_VIRT): New define.
519 (is_opcode_valid): Handle ase_virt.
520 (macro_build): Handle "+J".
521 (validate_mips_insn): Likewise.
522 (mips_ip): Likewise.
523 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
524 (md_longopts): Add mvirt and mnovirt
525 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
526 (mips_after_parse_args): Handle ase_virt field.
527 (s_mipsset): Handle "virt" and "novirt".
528 (mips_elf_final_processing): Add a comment about virt ASE might need
529 a new flag.
530 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
531 * doc/c-mips.texi: Document -mvirt and -mno-virt.
532 Document ".set virt" and ".set novirt".
533
da8094d7
AM
5342013-05-09 Alan Modra <amodra@gmail.com>
535
536 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
537 control of operand flag bits.
538
c5f8c205
AM
5392013-05-07 Alan Modra <amodra@gmail.com>
540
541 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
542 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
543 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
544 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
545 (md_apply_fix): Set fx_no_overflow for assorted relocations.
546 Shift and sign-extend fieldval for use by some VLE reloc
547 operand->insert functions.
548
b47468a6
CM
5492013-05-06 Paul Brook <paul@codesourcery.com>
550 Catherine Moore <clm@codesourcery.com>
551
c5f8c205
AM
552 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
553 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
554 (md_apply_fix): Likewise.
555 (tc_gen_reloc): Likewise.
556
2de39019
CM
5572013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
558
559 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
560 (mips_fix_adjustable): Adjust pc-relative check to use
561 limited_pc_reloc_p.
562
754e2bb9
RS
5632013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
564
565 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
566 (s_mips_stab): Do not restrict to stabn only.
567
13761a11
NC
5682013-05-02 Nick Clifton <nickc@redhat.com>
569
570 * config/tc-msp430.c: Add support for the MSP430X architecture.
571 Add code to insert a NOP instruction after any instruction that
572 might change the interrupt state.
573 Add support for the LARGE memory model.
574 Add code to initialise the .MSP430.attributes section.
575 * config/tc-msp430.h: Add support for the MSP430X architecture.
576 * doc/c-msp430.texi: Document the new -mL and -mN command line
577 options.
578 * NEWS: Mention support for the MSP430X architecture.
579
df26367c
MR
5802013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
581
582 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
583 alpha*-*-linux*ecoff*.
584
f02d8318
CF
5852013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
586
587 * config/tc-mips.c (mips_ip): Add sizelo.
588 For "+C", "+G", and "+H", set sizelo and compare against it.
589
b40bf0a2
NC
5902013-04-29 Nick Clifton <nickc@redhat.com>
591
592 * as.c (Options): Add -gdwarf-sections.
593 (parse_args): Likewise.
594 * as.h (flag_dwarf_sections): Declare.
595 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
596 (process_entries): When -gdwarf-sections is enabled generate
597 fragmentary .debug_line sections.
598 (out_debug_line): Set the section for the .debug_line section end
599 symbol.
600 * doc/as.texinfo: Document -gdwarf-sections.
601 * NEWS: Mention -gdwarf-sections.
602
8eeccb77 6032013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
604
605 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
606 according to the target parameter. Don't call s_segm since s_segm
607 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
608 initialized yet.
609 (md_begin): Call s_segm according to target parameter from command
610 line.
611
49926cd0
AM
6122013-04-25 Alan Modra <amodra@gmail.com>
613
614 * configure.in: Allow little-endian linux.
615 * configure: Regenerate.
616
e3031850
SL
6172013-04-24 Sandra Loosemore <sandra@codesourcery.com>
618
619 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
620 "fstatus" control register to "eccinj".
621
cb948fc0
KT
6222013-04-19 Kai Tietz <ktietz@redhat.com>
623
624 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
625
4455e9ad
JB
6262013-04-15 Julian Brown <julian@codesourcery.com>
627
628 * expr.c (add_to_result, subtract_from_result): Make global.
629 * expr.h (add_to_result, subtract_from_result): Add prototypes.
630 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
631 subtract_from_result to handle extra bit of precision for .sleb128
632 directive operands.
633
956a6ba3
JB
6342013-04-10 Julian Brown <julian@codesourcery.com>
635
636 * read.c (convert_to_bignum): Add sign parameter. Use it
637 instead of X_unsigned to determine sign of resulting bignum.
638 (emit_expr): Pass extra argument to convert_to_bignum.
639 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
640 X_extrabit to convert_to_bignum.
641 (parse_bitfield_cons): Set X_extrabit.
642 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
643 Initialise X_extrabit field as appropriate.
644 (add_to_result): New.
645 (subtract_from_result): New.
646 (expr): Use above.
647 * expr.h (expressionS): Add X_extrabit field.
648
eb9f3f00
JB
6492013-04-10 Jan Beulich <jbeulich@suse.com>
650
651 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
652 register being PC when is_t or writeback, and use distinct
653 diagnostic for the latter case.
654
ccb84d65
JB
6552013-04-10 Jan Beulich <jbeulich@suse.com>
656
657 * gas/config/tc-arm.c (parse_operands): Re-write
658 po_barrier_or_imm().
659 (do_barrier): Remove bogus constraint().
660 (do_t_barrier): Remove.
661
4d13caa0
NC
6622013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
663
664 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
665 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
666 ATmega2564RFR2
667 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
668
16d02dc9
JB
6692013-04-09 Jan Beulich <jbeulich@suse.com>
670
671 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
672 Use local variable Rt in more places.
673 (do_vmsr): Accept all control registers.
674
05ac0ffb
JB
6752013-04-09 Jan Beulich <jbeulich@suse.com>
676
677 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
678 if there was none specified for moves between scalar and core
679 register.
680
2d51fb74
JB
6812013-04-09 Jan Beulich <jbeulich@suse.com>
682
683 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
684 NEON_ALL_LANES case.
685
94dcf8bf
JB
6862013-04-08 Jan Beulich <jbeulich@suse.com>
687
688 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
689 PC-relative VSTR.
690
1472d06f
JB
6912013-04-08 Jan Beulich <jbeulich@suse.com>
692
693 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
694 entry to sp_fiq.
695
0c76cae8
AM
6962013-04-03 Alan Modra <amodra@gmail.com>
697
698 * doc/as.texinfo: Add support to generate man options for h8300.
699 * doc/c-h8300.texi: Likewise.
700
92eb40d9
RR
7012013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
702
703 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
704 Cortex-A57.
705
51dcdd4d
NC
7062013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
707
708 PR binutils/15068
709 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
710
c5d685bf
NC
7112013-03-26 Nick Clifton <nickc@redhat.com>
712
9b978282
NC
713 PR gas/15295
714 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
715 start of the file each time.
716
c5d685bf
NC
717 PR gas/15178
718 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
719 FreeBSD targets.
720
9699c833
TG
7212013-03-26 Douglas B Rupp <rupp@gnat.com>
722
723 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
724 after fixup.
725
4755303e
WN
7262013-03-21 Will Newton <will.newton@linaro.org>
727
728 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
729 pc-relative str instructions in Thumb mode.
730
81f5558e
NC
7312013-03-21 Michael Schewe <michael.schewe@gmx.net>
732
733 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
734 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
735 R_H8_DISP32A16.
736 * config/tc-h8300.h: Remove duplicated defines.
737
71863e73
NC
7382013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
739
740 PR gas/15282
741 * tc-avr.c (mcu_has_3_byte_pc): New function.
742 (tc_cfi_frame_initial_instructions): Call it to find return
743 address size.
744
795b8e6b
NC
7452013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
746
747 PR gas/15095
748 * config/tc-tic6x.c (tic6x_try_encode): Handle
749 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
750 encode register pair numbers when required.
751
ba86b375
WN
7522013-03-15 Will Newton <will.newton@linaro.org>
753
754 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
755 in vstr in Thumb mode for pre-ARMv7 cores.
756
9e6f3811
AS
7572013-03-14 Andreas Schwab <schwab@suse.de>
758
759 * doc/c-arc.texi (ARC Directives): Revert last change and use
760 @itemize instead of @table.
761 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
762
b10bf8c5
NC
7632013-03-14 Nick Clifton <nickc@redhat.com>
764
765 PR gas/15273
766 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
767 NULL message, instead just check ARM_CPU_IS_ANY directly.
768
ba724cfc
NC
7692013-03-14 Nick Clifton <nickc@redhat.com>
770
771 PR gas/15212
9e6f3811 772 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
773 for table format.
774 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
775 to the @item directives.
776 (ARM-Neon-Alignment): Move to correct place in the document.
777 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
778 formatting.
779 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
780 @smallexample.
781
531a94fd
SL
7822013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
783
784 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
785 case. Add default BAD_CASE to switch.
786
dad60f8e
SL
7872013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
788
789 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
790 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
791
dd5181d5
KT
7922013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
793
794 * config/tc-arm.c (crc_ext_armv8): New feature set.
795 (UNPRED_REG): New macro.
796 (do_crc32_1): New function.
797 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
798 do_crc32ch, do_crc32cw): Likewise.
799 (TUEc): New macro.
800 (insns): Add entries for crc32 mnemonics.
801 (arm_extensions): Add entry for crc.
802
8e723a10
CLT
8032013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
804
805 * write.h (struct fix): Add fx_dot_frag field.
806 (dot_frag): Declare.
807 * write.c (dot_frag): New variable.
808 (fix_new_internal): Set fx_dot_frag field with dot_frag.
809 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
810 * expr.c (expr): Save value of frag_now in dot_frag when setting
811 dot_value.
812 * read.c (emit_expr): Likewise. Delete comments.
813
be05d201
L
8142013-03-07 H.J. Lu <hongjiu.lu@intel.com>
815
816 * config/tc-i386.c (flag_code_names): Removed.
817 (i386_index_check): Rewrote.
818
62b0d0d5
YZ
8192013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
820
821 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
822 add comment.
823 (aarch64_double_precision_fmovable): New function.
824 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
825 function; handle hexadecimal representation of IEEE754 encoding.
826 (parse_operands): Update the call to parse_aarch64_imm_float.
827
165de32a
L
8282013-02-28 H.J. Lu <hongjiu.lu@intel.com>
829
830 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
831 (check_hle): Updated.
832 (md_assemble): Likewise.
833 (parse_insn): Likewise.
834
d5de92cf
L
8352013-02-28 H.J. Lu <hongjiu.lu@intel.com>
836
837 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 838 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
839 (parse_insn): Remove expecting_string_instruction. Set
840 i.rep_prefix.
841
e60bb1dd
YZ
8422013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
843
844 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
845
aeebdd9b
YZ
8462013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
847
848 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
849 for system registers.
850
4107ae22
DD
8512013-02-27 DJ Delorie <dj@redhat.com>
852
853 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
854 (rl78_op): Handle %code().
855 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
856 (tc_gen_reloc): Likwise; convert to a computed reloc.
857 (md_apply_fix): Likewise.
858
151fa98f
NC
8592013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
860
861 * config/rl78-parse.y: Fix encoding of DIVWU insn.
862
70a8bc5b 8632013-02-25 Terry Guo <terry.guo@arm.com>
864
865 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
866 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
867 list of accepted CPUs.
868
5c111e37
L
8692013-02-19 H.J. Lu <hongjiu.lu@intel.com>
870
871 PR gas/15159
872 * config/tc-i386.c (cpu_arch): Add ".smap".
873
874 * doc/c-i386.texi: Document smap.
875
8a75745d
MR
8762013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
877
878 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
879 mips_assembling_insn appropriately.
880 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
881
79850f26
MR
8822013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
883
cf29fc61 884 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
885 extraneous braces.
886
4c261dff
NC
8872013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
888
5c111e37 889 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 890
ea33f281
NC
8912013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
892
893 * configure.tgt: Add nios2-*-rtems*.
894
a1ccaec9
YZ
8952013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
896
897 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
898 NULL.
899
0aa27725
RS
9002013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
901
902 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
903 (macro): Use it. Assert that trunc.w.s is not used for r5900.
904
da4339ed
NC
9052013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
906
907 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
908 core.
909
36591ba1 9102013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 911 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
912
913 Based on patches from Altera Corporation.
914
915 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
916 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
917 * Makefile.in: Regenerated.
918 * configure.tgt: Add case for nios2*-linux*.
919 * config/obj-elf.c: Conditionally include elf/nios2.h.
920 * config/tc-nios2.c: New file.
921 * config/tc-nios2.h: New file.
922 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
923 * doc/Makefile.in: Regenerated.
924 * doc/all.texi: Set NIOSII.
925 * doc/as.texinfo (Overview): Add Nios II options.
926 (Machine Dependencies): Include c-nios2.texi.
927 * doc/c-nios2.texi: New file.
928 * NEWS: Note Altera Nios II support.
929
94d4433a
AM
9302013-02-06 Alan Modra <amodra@gmail.com>
931
932 PR gas/14255
933 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
934 Don't skip fixups with fx_subsy non-NULL.
935 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
936 with fx_subsy non-NULL.
937
ace9af6f
L
9382013-02-04 H.J. Lu <hongjiu.lu@intel.com>
939
940 * doc/c-metag.texi: Add "@c man" markers.
941
89d67ed9
AM
9422013-02-04 Alan Modra <amodra@gmail.com>
943
944 * write.c (fixup_segment): Return void. Delete seg_reloc_count
945 related code.
946 (TC_ADJUST_RELOC_COUNT): Delete.
947 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
948
89072bd6
AM
9492013-02-04 Alan Modra <amodra@gmail.com>
950
951 * po/POTFILES.in: Regenerate.
952
f9b2d544
NC
9532013-01-30 Markos Chandras <markos.chandras@imgtec.com>
954
955 * config/tc-metag.c: Make SWAP instruction less permissive with
956 its operands.
957
392ca752
DD
9582013-01-29 DJ Delorie <dj@redhat.com>
959
960 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
961 relocs in .word/.etc statements.
962
427d0db6
RM
9632013-01-29 Roland McGrath <mcgrathr@google.com>
964
965 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
966 immediate value for 8-bit offset" error so it shows line info.
967
4faf939a
JM
9682013-01-24 Joseph Myers <joseph@codesourcery.com>
969
970 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
971 for 64-bit output.
972
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NC
9732013-01-24 Nick Clifton <nickc@redhat.com>
974
975 * config/tc-v850.c: Add support for e3v5 architecture.
976 * doc/c-v850.texi: Mention new support.
977
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NC
9782013-01-23 Nick Clifton <nickc@redhat.com>
979
980 PR gas/15039
981 * config/tc-avr.c: Include dwarf2dbg.h.
982
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L
9832013-01-18 H.J. Lu <hongjiu.lu@intel.com>
984
985 * config/tc-i386.c (reloc): Support size relocation only for ELF.
986 (tc_i386_fix_adjustable): Likewise.
987 (lex_got): Likewise.
988 (tc_gen_reloc): Likewise.
989
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9902013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
991
992 * config/tc-aarch64.c (output_operand_error_record): Change to output
993 the out-of-range error message as value-expected message if there is
994 only one single value in the expected range.
995 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
996 LSL #0 as a programmer-friendly feature.
997
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9982013-01-16 H.J. Lu <hongjiu.lu@intel.com>
999
1000 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1001 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1002 BFD_RELOC_64_SIZE relocations.
1003 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1004 for it.
1005 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1006 relocations against local symbols.
1007
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AM
10082013-01-16 Alan Modra <amodra@gmail.com>
1009
1010 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1011 finding some sort of toc syntax error, and break to avoid
1012 compiler uninit warning.
1013
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L
10142013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1015
1016 PR gas/15019
1017 * config/tc-i386.c (lex_got): Increment length by 1 if the
1018 relocation token is removed.
1019
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NC
10202013-01-15 Nick Clifton <nickc@redhat.com>
1021
1022 * config/tc-v850.c (md_assemble): Allow signed values for
1023 V850E_IMMEDIATE.
1024
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SK
10252013-01-11 Sean Keys <skeys@ipdatasys.com>
1026
1027 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1028 git to cvs.
464e3686 1029
5817ffd1
PB
10302013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1031
1032 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1033 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1034 * config/tc-ppc.c (md_show_usage): Likewise.
1035 (ppc_handle_align): Handle power8's group ending nop.
1036
f4b1f6a9
SK
10372013-01-10 Sean Keys <skeys@ipdatasys.com>
1038
1039 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1040 that the assember exits after the opcodes have been printed.
f4b1f6a9 1041
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10422013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1043
1044 * app.c: Remove trailing white spaces.
1045 * as.c: Likewise.
1046 * as.h: Likewise.
1047 * cond.c: Likewise.
1048 * dw2gencfi.c: Likewise.
1049 * dwarf2dbg.h: Likewise.
1050 * ecoff.c: Likewise.
1051 * input-file.c: Likewise.
1052 * itbl-lex.h: Likewise.
1053 * output-file.c: Likewise.
1054 * read.c: Likewise.
1055 * sb.c: Likewise.
1056 * subsegs.c: Likewise.
1057 * symbols.c: Likewise.
1058 * write.c: Likewise.
1059 * config/tc-i386.c: Likewise.
1060 * doc/Makefile.am: Likewise.
1061 * doc/Makefile.in: Likewise.
1062 * doc/c-aarch64.texi: Likewise.
1063 * doc/c-alpha.texi: Likewise.
1064 * doc/c-arc.texi: Likewise.
1065 * doc/c-arm.texi: Likewise.
1066 * doc/c-avr.texi: Likewise.
1067 * doc/c-bfin.texi: Likewise.
1068 * doc/c-cr16.texi: Likewise.
1069 * doc/c-d10v.texi: Likewise.
1070 * doc/c-d30v.texi: Likewise.
1071 * doc/c-h8300.texi: Likewise.
1072 * doc/c-hppa.texi: Likewise.
1073 * doc/c-i370.texi: Likewise.
1074 * doc/c-i386.texi: Likewise.
1075 * doc/c-i860.texi: Likewise.
1076 * doc/c-m32c.texi: Likewise.
1077 * doc/c-m32r.texi: Likewise.
1078 * doc/c-m68hc11.texi: Likewise.
1079 * doc/c-m68k.texi: Likewise.
1080 * doc/c-microblaze.texi: Likewise.
1081 * doc/c-mips.texi: Likewise.
1082 * doc/c-msp430.texi: Likewise.
1083 * doc/c-mt.texi: Likewise.
1084 * doc/c-s390.texi: Likewise.
1085 * doc/c-score.texi: Likewise.
1086 * doc/c-sh.texi: Likewise.
1087 * doc/c-sh64.texi: Likewise.
1088 * doc/c-tic54x.texi: Likewise.
1089 * doc/c-tic6x.texi: Likewise.
1090 * doc/c-v850.texi: Likewise.
1091 * doc/c-xc16x.texi: Likewise.
1092 * doc/c-xgate.texi: Likewise.
1093 * doc/c-xtensa.texi: Likewise.
1094 * doc/c-z80.texi: Likewise.
1095 * doc/internals.texi: Likewise.
1096
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RM
10972013-01-10 Roland McGrath <mcgrathr@google.com>
1098
1099 * hash.c (hash_new_sized): Make it global.
1100 * hash.h: Declare it.
1101 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1102 pass a small size.
1103
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NC
11042013-01-10 Will Newton <will.newton@imgtec.com>
1105
1106 * Makefile.am: Add Meta.
1107 * Makefile.in: Regenerate.
1108 * config/tc-metag.c: New file.
1109 * config/tc-metag.h: New file.
1110 * configure.tgt: Add Meta.
1111 * doc/Makefile.am: Add Meta.
1112 * doc/Makefile.in: Regenerate.
1113 * doc/all.texi: Add Meta.
1114 * doc/as.texiinfo: Document Meta options.
1115 * doc/c-metag.texi: New file.
1116
b37df7c4
SE
11172013-01-09 Steve Ellcey <sellcey@mips.com>
1118
1119 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1120 calls.
1121 * config/tc-mips.c (internalError): Remove, replace with abort.
1122
a3251895
YZ
11232013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1124
1125 * config/tc-aarch64.c (parse_operands): Change to compare the result
1126 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1127
8ab8155f
NC
11282013-01-07 Nick Clifton <nickc@redhat.com>
1129
1130 PR gas/14887
1131 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1132 anticipated character.
1133 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1134 here as it is no longer needed.
1135
a4ac1c42
AS
11362013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1137
1138 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1139 * doc/c-score.texi (SCORE-Opts): Likewise.
1140 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1141
e407c74b
NC
11422013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1143
1144 * config/tc-mips.c: Add support for MIPS r5900.
1145 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1146 lq and sq.
1147 (can_swap_branch_p, get_append_method): Detect some conditional
1148 short loops to fix a bug on the r5900 by NOP in the branch delay
1149 slot.
1150 (M_MUL): Support 3 operands in multu on r5900.
1151 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1152 (s_mipsset): Force 32 bit floating point on r5900.
1153 (mips_ip): Check parameter range of instructions mfps and mtps on
1154 r5900.
1155 * configure.in: Detect CPU type when target string contains r5900
1156 (e.g. mips64r5900el-linux-gnu).
1157
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11582013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1159
1160 * as.c (parse_args): Update copyright year to 2013.
1161
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YZ
11622013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1163
1164 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1165 and "cortex57".
1166
517bb291 11672013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1168
517bb291
NC
1169 PR gas/14987
1170 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1171 closing bracket.
d709e4e6 1172
517bb291 1173For older changes see ChangeLog-2012
08d56133 1174\f
517bb291 1175Copyright (C) 2013 Free Software Foundation, Inc.
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1176
1177Copying and distribution of this file, with or without modification,
1178are permitted in any medium without royalty provided the copyright
1179notice and this notice are preserved.
1180
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1181Local Variables:
1182mode: change-log
1183left-margin: 8
1184fill-column: 74
1185version-control: never
1186End: