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[AArch64] Tidy up switch statements in elfnn-aarch64.c
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
f40da81b
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12013-07-02 Alan Modra <amodra@gmail.com>
2
3 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
4
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52013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
6
7 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
8 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
9 Replace @sc{mips16} with literal `MIPS16'.
10 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
11
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122013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
13
14 * config/tc-aarch64.c (reloc_table): Replace
15 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
16 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
17 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
18 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
19 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
20 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
21 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
22 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
23 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
24 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
25 (aarch64_force_relocation): Likewise.
26
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272013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
28
29 * config/tc-aarch64.c (ilp32_p): New static variable.
30 (elf64_aarch64_target_format): Return the target according to the
31 value of 'ilp32_p'.
32 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
33 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
34 (aarch64_dwarf2_addr_size): New function.
35 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
36 (DWARF2_ADDR_SIZE): New define.
37
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382013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
39
40 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
41
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422013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
43
44 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
45
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462013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
47
48 * config/tc-mips.c (mips_set_options): Add insn32 member.
49 (mips_opts): Initialize it.
50 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
51 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
52 (md_longopts): Add "minsn32" and "mno-insn32" options.
53 (is_size_valid): Handle insn32 mode.
54 (md_assemble): Pass instruction string down to macro.
55 (brk_fmt): Add second dimension and insn32 mode initializers.
56 (mfhl_fmt): Likewise.
57 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
58 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
59 (macro_build_jalr, move_register): Handle insn32 mode.
60 (macro_build_branch_rs): Likewise.
61 (macro): Handle insn32 mode.
62 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
63 (mips_ip): Handle insn32 mode.
64 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
65 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
66 (mips_handle_align): Handle insn32 mode.
67 (md_show_usage): Add -minsn32 and -mno-insn32.
68
69 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
70 -mno-insn32 options.
71 (-minsn32, -mno-insn32): New options.
72 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
73 options.
74 (MIPS assembly options): New node. Document .set insn32 and
75 .set noinsn32.
76 (MIPS-Dependent): List the new node.
77
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782013-06-25 Nick Clifton <nickc@redhat.com>
79
80 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
81 the PC in indirect addressing on 430xv2 parts.
82 (msp430_operands): Add version test to hardware bug encoding
83 restrictions.
84
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852013-06-24 Roland McGrath <mcgrathr@google.com>
86
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87 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
88 so it skips whitespace before it.
89 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
90
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91 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
92 (arm_reg_parse_multi): Skip whitespace first.
93 (parse_reg_list): Likewise.
94 (parse_vfp_reg_list): Likewise.
95 (s_arm_unwind_save_mmxwcg): Likewise.
96
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972013-06-24 Nick Clifton <nickc@redhat.com>
98
99 PR gas/15623
100 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
101
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1022013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
105
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1062013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
107
108 * config/tc-mips.c: Assert that offsetT and valueT are at least
109 8 bytes in size.
110 (GPR_SMIN, GPR_SMAX): New macros.
111 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
112
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1132013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
114
115 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
116 conditions. Remove any code deselected by them.
117 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
118
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1192013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
120
121 * NEWS: Note removal of ECOFF support.
122 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
123 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
124 (MULTI_CFILES): Remove config/e-mipsecoff.c.
125 * Makefile.in: Regenerate.
126 * configure.in: Remove MIPS ECOFF references.
127 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
128 Delete cases.
129 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
130 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
131 (mips-*-*): ...this single case.
132 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
133 MIPS emulations to be e-mipself*.
134 * configure: Regenerate.
135 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
136 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
137 (mips-*-sysv*): Remove coff and ecoff cases.
138 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
139 * ecoff.c: Remove reference to MIPS ECOFF.
140 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
141 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
142 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
143 (mips_hi_fixup): Tweak comment.
144 (append_insn): Require a howto.
145 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
146
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1472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
150 Use "CPU" instead of "cpu".
151 * doc/c-mips.texi: Likewise.
152 (MIPS Opts): Rename to MIPS Options.
153 (MIPS option stack): Rename to MIPS Option Stack.
154 (MIPS ASE instruction generation overrides): Rename to
155 MIPS ASE Instruction Generation Overrides (for now).
156 (MIPS floating-point): Rename to MIPS Floating-Point.
157
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1582013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
159
160 * doc/c-mips.texi (MIPS Macros): New section.
161 (MIPS Object): Replace with...
162 (MIPS Small Data): ...this new section.
163
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1642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
165
166 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
167 Capitalize name. Use @kindex instead of @cindex for .set entries.
168
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1692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
170
171 * doc/c-mips.texi (MIPS Stabs): Remove section.
172
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1732013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
174
175 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
176 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
177 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
178 (ISA_SUPPORTS_VIRT64_ASE): Delete.
179 (mips_ase): New structure.
180 (mips_ases): New table.
181 (FP64_ASES): New macro.
182 (mips_ase_groups): New array.
183 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
184 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
185 functions.
186 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
187 (md_parse_option): Use mips_ases and mips_set_ase instead of
188 separate case statements for each ASE option.
189 (mips_after_parse_args): Use FP64_ASES. Use
190 mips_check_isa_supports_ases to check the ASEs against
191 other options.
192 (s_mipsset): Use mips_ases and mips_set_ase instead of
193 separate if statements for each ASE option. Use
194 mips_check_isa_supports_ases, even when a non-ASE option
195 is specified.
196
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1972013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
198
199 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
200
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2012013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
202
203 * config/tc-mips.c (md_shortopts, options, md_longopts)
204 (md_longopts_size): Move earlier in file.
205
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2062013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
207
208 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
209 with a single "ase" bitmask.
210 (mips_opts): Update accordingly.
211 (file_ase, file_ase_explicit): New variables.
212 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
213 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
214 (ISA_HAS_ROR): Adjust for mips_set_options change.
215 (is_opcode_valid): Take the base ase mask directly from mips_opts.
216 (mips_ip): Adjust for mips_set_options change.
217 (md_parse_option): Likewise. Update file_ase_explicit.
218 (mips_after_parse_args): Adjust for mips_set_options change.
219 Use bitmask operations to select the default ASEs. Set file_ase
220 rather than individual per-ASE variables.
221 (s_mipsset): Adjust for mips_set_options change.
222 (mips_elf_final_processing): Test file_ase rather than
223 file_ase_mdmx. Remove commented-out code.
224
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2252013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
226
227 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
228 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
229 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
230 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
231 (mips_after_parse_args): Use the new "ase" field to choose
232 the default ASEs.
233 (mips_cpu_info_table): Move ASEs from the "flags" field to the
234 "ase" field.
235
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2362013-06-18 Richard Earnshaw <rearnsha@arm.com>
237
238 * config/tc-arm.c (symbol_preemptible): New function.
239 (relax_branch): Use it.
240
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CM
2412013-06-17 Catherine Moore <clm@codesourcery.com>
242 Maciej W. Rozycki <macro@codesourcery.com>
243 Chao-Ying Fu <fu@mips.com>
244
245 * config/tc-mips.c (mips_set_options): Add ase_eva.
246 (mips_set_options mips_opts): Add ase_eva.
247 (file_ase_eva): Declare.
248 (ISA_SUPPORTS_EVA_ASE): Define.
249 (IS_SEXT_9BIT_NUM): Define.
250 (MIPS_CPU_ASE_EVA): Define.
251 (is_opcode_valid): Add support for ase_eva.
252 (macro_build): Likewise.
253 (macro): Likewise.
254 (validate_mips_insn): Likewise.
255 (validate_micromips_insn): Likewise.
256 (mips_ip): Likewise.
257 (options): Add OPTION_EVA and OPTION_NO_EVA.
258 (md_longopts): Add -meva and -mno-eva.
259 (md_parse_option): Process new options.
260 (mips_after_parse_args): Check for valid EVA combinations.
261 (s_mipsset): Likewise.
262
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2632013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
264
265 * dwarf2dbg.h (dwarf2_move_insn): Declare.
266 * dwarf2dbg.c (line_subseg): Add pmove_tail.
267 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
268 (dwarf2_gen_line_info_1): Update call accordingly.
269 (dwarf2_move_insn): New function.
270 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
271
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2722013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
273
274 Revert:
275
276 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
277
278 PR gas/13024
279 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
280 (dwarf2_gen_line_info_1): Delete.
281 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
282 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
283 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
284 (dwarf2_directive_loc): Push previous .locs instead of generating
285 them immediately.
286
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2872013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
288
289 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
290 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
291
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2922013-06-13 Nick Clifton <nickc@redhat.com>
293
294 PR gas/15602
295 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
296 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
297 function. Generates an error if the adjusted offset is out of a
298 16-bit range.
299
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3002013-06-12 Sandra Loosemore <sandra@codesourcery.com>
301
302 * config/tc-nios2.c (md_apply_fix): Mask constant
303 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
304
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3052013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
306
307 * config/tc-mips.c (append_insn): Don't do branch relaxation for
308 MIPS-3D instructions either.
309 (md_convert_frag): Update the COPx branch mask accordingly.
310
311 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
312 option.
313 * doc/as.texinfo (Overview): Add --relax-branch and
314 --no-relax-branch.
315 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
316 --no-relax-branch.
317
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3182013-06-09 Sandra Loosemore <sandra@codesourcery.com>
319
320 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
321 omitted.
322
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3232013-06-08 Catherine Moore <clm@codesourcery.com>
324
325 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
326 (is_opcode_valid_16): Pass ase value to opcode_is_member.
327 (append_insn): Change INSN_xxxx to ASE_xxxx.
328
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3292013-06-01 George Thomas <george.thomas@atmel.com>
330
331 * gas/config/tc-avr.c: Change ISA for devices with USB support to
332 AVR_ISA_XMEGAU
333
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3342013-05-31 H.J. Lu <hongjiu.lu@intel.com>
335
336 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
337 for ELF.
338
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3392013-05-31 Paul Brook <paul@codesourcery.com>
340
341 gas/
342 * config/tc-mips.c (s_ehword): New.
343
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CM
3442013-05-30 Paul Brook <paul@codesourcery.com>
345
346 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
347
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3482013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
349
350 * write.c (resolve_reloc_expr_symbols): On REL targets don't
351 convert relocs who have no relocatable field either. Rephrase
352 the conditional so that the PC-relative check is only applied
353 for REL targets.
354
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MR
3552013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
356
357 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
358 calculation.
359
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3602013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
361
362 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 363 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
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YZ
364 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
365 (md_apply_fix): Likewise.
366 (aarch64_force_relocation): Likewise.
367
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3682013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
369
370 * config/tc-arm.c (it_fsm_post_encode): Improve
371 warning messages about deprecated IT block formats.
372
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3732013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
374
375 * config/tc-aarch64.c (md_apply_fix): Move value range checking
376 inside fx_done condition.
377
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3782013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
379
380 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
381
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3822013-05-20 Peter Bergner <bergner@vnet.ibm.com>
383
384 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
385 and clean up warning when using PRINT_OPCODE_TABLE.
386
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AM
3872013-05-20 Alan Modra <amodra@gmail.com>
388
389 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
390 and data fixups performing shift/high adjust/sign extension on
391 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
392 when writing data fixups rather than recalculating size.
393
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3942013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
395
396 * doc/c-msp430.texi: Fix typo.
397
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3982013-05-16 Tristan Gingold <gingold@adacore.com>
399
400 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
401 are also TOC symbols.
402
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4032013-05-16 Nick Clifton <nickc@redhat.com>
404
405 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
406 Add -mcpu command to specify core type.
997b26e8 407 * doc/c-msp430.texi: Update documentation.
638d3803 408
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AP
4092013-05-09 Andrew Pinski <apinski@cavium.com>
410
411 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
412 (mips_opts): Update for the new field.
413 (file_ase_virt): New variable.
414 (ISA_SUPPORTS_VIRT_ASE): New macro.
415 (ISA_SUPPORTS_VIRT64_ASE): New macro.
416 (MIPS_CPU_ASE_VIRT): New define.
417 (is_opcode_valid): Handle ase_virt.
418 (macro_build): Handle "+J".
419 (validate_mips_insn): Likewise.
420 (mips_ip): Likewise.
421 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
422 (md_longopts): Add mvirt and mnovirt
423 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
424 (mips_after_parse_args): Handle ase_virt field.
425 (s_mipsset): Handle "virt" and "novirt".
426 (mips_elf_final_processing): Add a comment about virt ASE might need
427 a new flag.
428 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
429 * doc/c-mips.texi: Document -mvirt and -mno-virt.
430 Document ".set virt" and ".set novirt".
431
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4322013-05-09 Alan Modra <amodra@gmail.com>
433
434 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
435 control of operand flag bits.
436
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AM
4372013-05-07 Alan Modra <amodra@gmail.com>
438
439 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
440 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
441 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
442 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
443 (md_apply_fix): Set fx_no_overflow for assorted relocations.
444 Shift and sign-extend fieldval for use by some VLE reloc
445 operand->insert functions.
446
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4472013-05-06 Paul Brook <paul@codesourcery.com>
448 Catherine Moore <clm@codesourcery.com>
449
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AM
450 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
451 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
452 (md_apply_fix): Likewise.
453 (tc_gen_reloc): Likewise.
454
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4552013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
456
457 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
458 (mips_fix_adjustable): Adjust pc-relative check to use
459 limited_pc_reloc_p.
460
754e2bb9
RS
4612013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
462
463 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
464 (s_mips_stab): Do not restrict to stabn only.
465
13761a11
NC
4662013-05-02 Nick Clifton <nickc@redhat.com>
467
468 * config/tc-msp430.c: Add support for the MSP430X architecture.
469 Add code to insert a NOP instruction after any instruction that
470 might change the interrupt state.
471 Add support for the LARGE memory model.
472 Add code to initialise the .MSP430.attributes section.
473 * config/tc-msp430.h: Add support for the MSP430X architecture.
474 * doc/c-msp430.texi: Document the new -mL and -mN command line
475 options.
476 * NEWS: Mention support for the MSP430X architecture.
477
df26367c
MR
4782013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
479
480 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
481 alpha*-*-linux*ecoff*.
482
f02d8318
CF
4832013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
484
485 * config/tc-mips.c (mips_ip): Add sizelo.
486 For "+C", "+G", and "+H", set sizelo and compare against it.
487
b40bf0a2
NC
4882013-04-29 Nick Clifton <nickc@redhat.com>
489
490 * as.c (Options): Add -gdwarf-sections.
491 (parse_args): Likewise.
492 * as.h (flag_dwarf_sections): Declare.
493 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
494 (process_entries): When -gdwarf-sections is enabled generate
495 fragmentary .debug_line sections.
496 (out_debug_line): Set the section for the .debug_line section end
497 symbol.
498 * doc/as.texinfo: Document -gdwarf-sections.
499 * NEWS: Mention -gdwarf-sections.
500
8eeccb77 5012013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
502
503 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
504 according to the target parameter. Don't call s_segm since s_segm
505 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
506 initialized yet.
507 (md_begin): Call s_segm according to target parameter from command
508 line.
509
49926cd0
AM
5102013-04-25 Alan Modra <amodra@gmail.com>
511
512 * configure.in: Allow little-endian linux.
513 * configure: Regenerate.
514
e3031850
SL
5152013-04-24 Sandra Loosemore <sandra@codesourcery.com>
516
517 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
518 "fstatus" control register to "eccinj".
519
cb948fc0
KT
5202013-04-19 Kai Tietz <ktietz@redhat.com>
521
522 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
523
4455e9ad
JB
5242013-04-15 Julian Brown <julian@codesourcery.com>
525
526 * expr.c (add_to_result, subtract_from_result): Make global.
527 * expr.h (add_to_result, subtract_from_result): Add prototypes.
528 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
529 subtract_from_result to handle extra bit of precision for .sleb128
530 directive operands.
531
956a6ba3
JB
5322013-04-10 Julian Brown <julian@codesourcery.com>
533
534 * read.c (convert_to_bignum): Add sign parameter. Use it
535 instead of X_unsigned to determine sign of resulting bignum.
536 (emit_expr): Pass extra argument to convert_to_bignum.
537 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
538 X_extrabit to convert_to_bignum.
539 (parse_bitfield_cons): Set X_extrabit.
540 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
541 Initialise X_extrabit field as appropriate.
542 (add_to_result): New.
543 (subtract_from_result): New.
544 (expr): Use above.
545 * expr.h (expressionS): Add X_extrabit field.
546
eb9f3f00
JB
5472013-04-10 Jan Beulich <jbeulich@suse.com>
548
549 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
550 register being PC when is_t or writeback, and use distinct
551 diagnostic for the latter case.
552
ccb84d65
JB
5532013-04-10 Jan Beulich <jbeulich@suse.com>
554
555 * gas/config/tc-arm.c (parse_operands): Re-write
556 po_barrier_or_imm().
557 (do_barrier): Remove bogus constraint().
558 (do_t_barrier): Remove.
559
4d13caa0
NC
5602013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
561
562 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
563 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
564 ATmega2564RFR2
565 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
566
16d02dc9
JB
5672013-04-09 Jan Beulich <jbeulich@suse.com>
568
569 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
570 Use local variable Rt in more places.
571 (do_vmsr): Accept all control registers.
572
05ac0ffb
JB
5732013-04-09 Jan Beulich <jbeulich@suse.com>
574
575 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
576 if there was none specified for moves between scalar and core
577 register.
578
2d51fb74
JB
5792013-04-09 Jan Beulich <jbeulich@suse.com>
580
581 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
582 NEON_ALL_LANES case.
583
94dcf8bf
JB
5842013-04-08 Jan Beulich <jbeulich@suse.com>
585
586 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
587 PC-relative VSTR.
588
1472d06f
JB
5892013-04-08 Jan Beulich <jbeulich@suse.com>
590
591 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
592 entry to sp_fiq.
593
0c76cae8
AM
5942013-04-03 Alan Modra <amodra@gmail.com>
595
596 * doc/as.texinfo: Add support to generate man options for h8300.
597 * doc/c-h8300.texi: Likewise.
598
92eb40d9
RR
5992013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
600
601 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
602 Cortex-A57.
603
51dcdd4d
NC
6042013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
605
606 PR binutils/15068
607 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
608
c5d685bf
NC
6092013-03-26 Nick Clifton <nickc@redhat.com>
610
9b978282
NC
611 PR gas/15295
612 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
613 start of the file each time.
614
c5d685bf
NC
615 PR gas/15178
616 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
617 FreeBSD targets.
618
9699c833
TG
6192013-03-26 Douglas B Rupp <rupp@gnat.com>
620
621 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
622 after fixup.
623
4755303e
WN
6242013-03-21 Will Newton <will.newton@linaro.org>
625
626 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
627 pc-relative str instructions in Thumb mode.
628
81f5558e
NC
6292013-03-21 Michael Schewe <michael.schewe@gmx.net>
630
631 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
632 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
633 R_H8_DISP32A16.
634 * config/tc-h8300.h: Remove duplicated defines.
635
71863e73
NC
6362013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
637
638 PR gas/15282
639 * tc-avr.c (mcu_has_3_byte_pc): New function.
640 (tc_cfi_frame_initial_instructions): Call it to find return
641 address size.
642
795b8e6b
NC
6432013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
644
645 PR gas/15095
646 * config/tc-tic6x.c (tic6x_try_encode): Handle
647 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
648 encode register pair numbers when required.
649
ba86b375
WN
6502013-03-15 Will Newton <will.newton@linaro.org>
651
652 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
653 in vstr in Thumb mode for pre-ARMv7 cores.
654
9e6f3811
AS
6552013-03-14 Andreas Schwab <schwab@suse.de>
656
657 * doc/c-arc.texi (ARC Directives): Revert last change and use
658 @itemize instead of @table.
659 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
660
b10bf8c5
NC
6612013-03-14 Nick Clifton <nickc@redhat.com>
662
663 PR gas/15273
664 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
665 NULL message, instead just check ARM_CPU_IS_ANY directly.
666
ba724cfc
NC
6672013-03-14 Nick Clifton <nickc@redhat.com>
668
669 PR gas/15212
9e6f3811 670 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
671 for table format.
672 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
673 to the @item directives.
674 (ARM-Neon-Alignment): Move to correct place in the document.
675 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
676 formatting.
677 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
678 @smallexample.
679
531a94fd
SL
6802013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
681
682 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
683 case. Add default BAD_CASE to switch.
684
dad60f8e
SL
6852013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
686
687 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
688 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
689
dd5181d5
KT
6902013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
691
692 * config/tc-arm.c (crc_ext_armv8): New feature set.
693 (UNPRED_REG): New macro.
694 (do_crc32_1): New function.
695 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
696 do_crc32ch, do_crc32cw): Likewise.
697 (TUEc): New macro.
698 (insns): Add entries for crc32 mnemonics.
699 (arm_extensions): Add entry for crc.
700
8e723a10
CLT
7012013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
702
703 * write.h (struct fix): Add fx_dot_frag field.
704 (dot_frag): Declare.
705 * write.c (dot_frag): New variable.
706 (fix_new_internal): Set fx_dot_frag field with dot_frag.
707 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
708 * expr.c (expr): Save value of frag_now in dot_frag when setting
709 dot_value.
710 * read.c (emit_expr): Likewise. Delete comments.
711
be05d201
L
7122013-03-07 H.J. Lu <hongjiu.lu@intel.com>
713
714 * config/tc-i386.c (flag_code_names): Removed.
715 (i386_index_check): Rewrote.
716
62b0d0d5
YZ
7172013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
718
719 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
720 add comment.
721 (aarch64_double_precision_fmovable): New function.
722 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
723 function; handle hexadecimal representation of IEEE754 encoding.
724 (parse_operands): Update the call to parse_aarch64_imm_float.
725
165de32a
L
7262013-02-28 H.J. Lu <hongjiu.lu@intel.com>
727
728 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
729 (check_hle): Updated.
730 (md_assemble): Likewise.
731 (parse_insn): Likewise.
732
d5de92cf
L
7332013-02-28 H.J. Lu <hongjiu.lu@intel.com>
734
735 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 736 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
737 (parse_insn): Remove expecting_string_instruction. Set
738 i.rep_prefix.
739
e60bb1dd
YZ
7402013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
741
742 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
743
aeebdd9b
YZ
7442013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
745
746 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
747 for system registers.
748
4107ae22
DD
7492013-02-27 DJ Delorie <dj@redhat.com>
750
751 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
752 (rl78_op): Handle %code().
753 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
754 (tc_gen_reloc): Likwise; convert to a computed reloc.
755 (md_apply_fix): Likewise.
756
151fa98f
NC
7572013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
758
759 * config/rl78-parse.y: Fix encoding of DIVWU insn.
760
70a8bc5b 7612013-02-25 Terry Guo <terry.guo@arm.com>
762
763 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
764 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
765 list of accepted CPUs.
766
5c111e37
L
7672013-02-19 H.J. Lu <hongjiu.lu@intel.com>
768
769 PR gas/15159
770 * config/tc-i386.c (cpu_arch): Add ".smap".
771
772 * doc/c-i386.texi: Document smap.
773
8a75745d
MR
7742013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
775
776 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
777 mips_assembling_insn appropriately.
778 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
779
79850f26
MR
7802013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
781
cf29fc61 782 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
783 extraneous braces.
784
4c261dff
NC
7852013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
786
5c111e37 787 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 788
ea33f281
NC
7892013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
790
791 * configure.tgt: Add nios2-*-rtems*.
792
a1ccaec9
YZ
7932013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
794
795 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
796 NULL.
797
0aa27725
RS
7982013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
799
800 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
801 (macro): Use it. Assert that trunc.w.s is not used for r5900.
802
da4339ed
NC
8032013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
804
805 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
806 core.
807
36591ba1 8082013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 809 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
810
811 Based on patches from Altera Corporation.
812
813 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
814 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
815 * Makefile.in: Regenerated.
816 * configure.tgt: Add case for nios2*-linux*.
817 * config/obj-elf.c: Conditionally include elf/nios2.h.
818 * config/tc-nios2.c: New file.
819 * config/tc-nios2.h: New file.
820 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
821 * doc/Makefile.in: Regenerated.
822 * doc/all.texi: Set NIOSII.
823 * doc/as.texinfo (Overview): Add Nios II options.
824 (Machine Dependencies): Include c-nios2.texi.
825 * doc/c-nios2.texi: New file.
826 * NEWS: Note Altera Nios II support.
827
94d4433a
AM
8282013-02-06 Alan Modra <amodra@gmail.com>
829
830 PR gas/14255
831 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
832 Don't skip fixups with fx_subsy non-NULL.
833 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
834 with fx_subsy non-NULL.
835
ace9af6f
L
8362013-02-04 H.J. Lu <hongjiu.lu@intel.com>
837
838 * doc/c-metag.texi: Add "@c man" markers.
839
89d67ed9
AM
8402013-02-04 Alan Modra <amodra@gmail.com>
841
842 * write.c (fixup_segment): Return void. Delete seg_reloc_count
843 related code.
844 (TC_ADJUST_RELOC_COUNT): Delete.
845 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
846
89072bd6
AM
8472013-02-04 Alan Modra <amodra@gmail.com>
848
849 * po/POTFILES.in: Regenerate.
850
f9b2d544
NC
8512013-01-30 Markos Chandras <markos.chandras@imgtec.com>
852
853 * config/tc-metag.c: Make SWAP instruction less permissive with
854 its operands.
855
392ca752
DD
8562013-01-29 DJ Delorie <dj@redhat.com>
857
858 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
859 relocs in .word/.etc statements.
860
427d0db6
RM
8612013-01-29 Roland McGrath <mcgrathr@google.com>
862
863 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
864 immediate value for 8-bit offset" error so it shows line info.
865
4faf939a
JM
8662013-01-24 Joseph Myers <joseph@codesourcery.com>
867
868 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
869 for 64-bit output.
870
78c8d46c
NC
8712013-01-24 Nick Clifton <nickc@redhat.com>
872
873 * config/tc-v850.c: Add support for e3v5 architecture.
874 * doc/c-v850.texi: Mention new support.
875
fb5b7503
NC
8762013-01-23 Nick Clifton <nickc@redhat.com>
877
878 PR gas/15039
879 * config/tc-avr.c: Include dwarf2dbg.h.
880
8ce3d284
L
8812013-01-18 H.J. Lu <hongjiu.lu@intel.com>
882
883 * config/tc-i386.c (reloc): Support size relocation only for ELF.
884 (tc_i386_fix_adjustable): Likewise.
885 (lex_got): Likewise.
886 (tc_gen_reloc): Likewise.
887
f5555712
YZ
8882013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
889
890 * config/tc-aarch64.c (output_operand_error_record): Change to output
891 the out-of-range error message as value-expected message if there is
892 only one single value in the expected range.
893 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
894 LSL #0 as a programmer-friendly feature.
895
8fd4256d
L
8962013-01-16 H.J. Lu <hongjiu.lu@intel.com>
897
898 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
899 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
900 BFD_RELOC_64_SIZE relocations.
901 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
902 for it.
903 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
904 relocations against local symbols.
905
a5840dce
AM
9062013-01-16 Alan Modra <amodra@gmail.com>
907
908 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
909 finding some sort of toc syntax error, and break to avoid
910 compiler uninit warning.
911
af89796a
L
9122013-01-15 H.J. Lu <hongjiu.lu@intel.com>
913
914 PR gas/15019
915 * config/tc-i386.c (lex_got): Increment length by 1 if the
916 relocation token is removed.
917
dd42f060
NC
9182013-01-15 Nick Clifton <nickc@redhat.com>
919
920 * config/tc-v850.c (md_assemble): Allow signed values for
921 V850E_IMMEDIATE.
922
464e3686
SK
9232013-01-11 Sean Keys <skeys@ipdatasys.com>
924
925 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 926 git to cvs.
464e3686 927
5817ffd1
PB
9282013-01-10 Peter Bergner <bergner@vnet.ibm.com>
929
930 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
931 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
932 * config/tc-ppc.c (md_show_usage): Likewise.
933 (ppc_handle_align): Handle power8's group ending nop.
934
f4b1f6a9
SK
9352013-01-10 Sean Keys <skeys@ipdatasys.com>
936
937 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 938 that the assember exits after the opcodes have been printed.
f4b1f6a9 939
34bca508
L
9402013-01-10 H.J. Lu <hongjiu.lu@intel.com>
941
942 * app.c: Remove trailing white spaces.
943 * as.c: Likewise.
944 * as.h: Likewise.
945 * cond.c: Likewise.
946 * dw2gencfi.c: Likewise.
947 * dwarf2dbg.h: Likewise.
948 * ecoff.c: Likewise.
949 * input-file.c: Likewise.
950 * itbl-lex.h: Likewise.
951 * output-file.c: Likewise.
952 * read.c: Likewise.
953 * sb.c: Likewise.
954 * subsegs.c: Likewise.
955 * symbols.c: Likewise.
956 * write.c: Likewise.
957 * config/tc-i386.c: Likewise.
958 * doc/Makefile.am: Likewise.
959 * doc/Makefile.in: Likewise.
960 * doc/c-aarch64.texi: Likewise.
961 * doc/c-alpha.texi: Likewise.
962 * doc/c-arc.texi: Likewise.
963 * doc/c-arm.texi: Likewise.
964 * doc/c-avr.texi: Likewise.
965 * doc/c-bfin.texi: Likewise.
966 * doc/c-cr16.texi: Likewise.
967 * doc/c-d10v.texi: Likewise.
968 * doc/c-d30v.texi: Likewise.
969 * doc/c-h8300.texi: Likewise.
970 * doc/c-hppa.texi: Likewise.
971 * doc/c-i370.texi: Likewise.
972 * doc/c-i386.texi: Likewise.
973 * doc/c-i860.texi: Likewise.
974 * doc/c-m32c.texi: Likewise.
975 * doc/c-m32r.texi: Likewise.
976 * doc/c-m68hc11.texi: Likewise.
977 * doc/c-m68k.texi: Likewise.
978 * doc/c-microblaze.texi: Likewise.
979 * doc/c-mips.texi: Likewise.
980 * doc/c-msp430.texi: Likewise.
981 * doc/c-mt.texi: Likewise.
982 * doc/c-s390.texi: Likewise.
983 * doc/c-score.texi: Likewise.
984 * doc/c-sh.texi: Likewise.
985 * doc/c-sh64.texi: Likewise.
986 * doc/c-tic54x.texi: Likewise.
987 * doc/c-tic6x.texi: Likewise.
988 * doc/c-v850.texi: Likewise.
989 * doc/c-xc16x.texi: Likewise.
990 * doc/c-xgate.texi: Likewise.
991 * doc/c-xtensa.texi: Likewise.
992 * doc/c-z80.texi: Likewise.
993 * doc/internals.texi: Likewise.
994
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RM
9952013-01-10 Roland McGrath <mcgrathr@google.com>
996
997 * hash.c (hash_new_sized): Make it global.
998 * hash.h: Declare it.
999 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1000 pass a small size.
1001
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NC
10022013-01-10 Will Newton <will.newton@imgtec.com>
1003
1004 * Makefile.am: Add Meta.
1005 * Makefile.in: Regenerate.
1006 * config/tc-metag.c: New file.
1007 * config/tc-metag.h: New file.
1008 * configure.tgt: Add Meta.
1009 * doc/Makefile.am: Add Meta.
1010 * doc/Makefile.in: Regenerate.
1011 * doc/all.texi: Add Meta.
1012 * doc/as.texiinfo: Document Meta options.
1013 * doc/c-metag.texi: New file.
1014
b37df7c4
SE
10152013-01-09 Steve Ellcey <sellcey@mips.com>
1016
1017 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1018 calls.
1019 * config/tc-mips.c (internalError): Remove, replace with abort.
1020
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YZ
10212013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1022
1023 * config/tc-aarch64.c (parse_operands): Change to compare the result
1024 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1025
8ab8155f
NC
10262013-01-07 Nick Clifton <nickc@redhat.com>
1027
1028 PR gas/14887
1029 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1030 anticipated character.
1031 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1032 here as it is no longer needed.
1033
a4ac1c42
AS
10342013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1035
1036 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1037 * doc/c-score.texi (SCORE-Opts): Likewise.
1038 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1039
e407c74b
NC
10402013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1041
1042 * config/tc-mips.c: Add support for MIPS r5900.
1043 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1044 lq and sq.
1045 (can_swap_branch_p, get_append_method): Detect some conditional
1046 short loops to fix a bug on the r5900 by NOP in the branch delay
1047 slot.
1048 (M_MUL): Support 3 operands in multu on r5900.
1049 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1050 (s_mipsset): Force 32 bit floating point on r5900.
1051 (mips_ip): Check parameter range of instructions mfps and mtps on
1052 r5900.
1053 * configure.in: Detect CPU type when target string contains r5900
1054 (e.g. mips64r5900el-linux-gnu).
1055
62658407
L
10562013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1057
1058 * as.c (parse_args): Update copyright year to 2013.
1059
95830fd1
YZ
10602013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1061
1062 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1063 and "cortex57".
1064
517bb291 10652013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1066
517bb291
NC
1067 PR gas/14987
1068 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1069 closing bracket.
d709e4e6 1070
517bb291 1071For older changes see ChangeLog-2012
08d56133 1072\f
517bb291 1073Copyright (C) 2013 Free Software Foundation, Inc.
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1074
1075Copying and distribution of this file, with or without modification,
1076are permitted in any medium without royalty provided the copyright
1077notice and this notice are preserved.
1078
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1079Local Variables:
1080mode: change-log
1081left-margin: 8
1082fill-column: 74
1083version-control: never
1084End: