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fb798c50
AK		 12013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
2
3 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
4 relocs.
5
2c0a3565
MS		 62013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
7
4aa2c5e2
MS		 8 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
9
102013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
11
2c0a3565
MS		 12 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
13 (aarch64_force_relocation): Likewise.
14
f40da81b
AM		 152013-07-02 Alan Modra <amodra@gmail.com>
16
17 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
18
81566a9b
MR		 192013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
20
21 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
22 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
23 Replace @sc{mips16} with literal `MIPS16'.
24 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
25
a6bb11b2
YZ		 262013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
27
28 * config/tc-aarch64.c (reloc_table): Replace
29 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
30 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
31 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
32 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
33 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
34 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
35 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
36 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
37 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
38 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
39 (aarch64_force_relocation): Likewise.
40
cec5225b
YZ		 412013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
42
43 * config/tc-aarch64.c (ilp32_p): New static variable.
44 (elf64_aarch64_target_format): Return the target according to the
45 value of 'ilp32_p'.
46 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
47 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
48 (aarch64_dwarf2_addr_size): New function.
49 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
50 (DWARF2_ADDR_SIZE): New define.
51
e335d9cb
RS		 522013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
55
18870af7
RS		 562013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
57
58 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
59
833794fc
MR		 602013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
61
62 * config/tc-mips.c (mips_set_options): Add insn32 member.
63 (mips_opts): Initialize it.
64 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
65 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
66 (md_longopts): Add "minsn32" and "mno-insn32" options.
67 (is_size_valid): Handle insn32 mode.
68 (md_assemble): Pass instruction string down to macro.
69 (brk_fmt): Add second dimension and insn32 mode initializers.
70 (mfhl_fmt): Likewise.
71 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
72 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
73 (macro_build_jalr, move_register): Handle insn32 mode.
74 (macro_build_branch_rs): Likewise.
75 (macro): Handle insn32 mode.
76 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
77 (mips_ip): Handle insn32 mode.
78 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
79 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
80 (mips_handle_align): Handle insn32 mode.
81 (md_show_usage): Add -minsn32 and -mno-insn32.
82
83 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
84 -mno-insn32 options.
85 (-minsn32, -mno-insn32): New options.
86 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
87 options.
88 (MIPS assembly options): New node. Document .set insn32 and
89 .set noinsn32.
90 (MIPS-Dependent): List the new node.
91
d1706f38
NC		 922013-06-25 Nick Clifton <nickc@redhat.com>
93
94 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
95 the PC in indirect addressing on 430xv2 parts.
96 (msp430_operands): Add version test to hardware bug encoding
97 restrictions.
98
477330fc
RM		 992013-06-24 Roland McGrath <mcgrathr@google.com>
100
d996d970
RM		 101 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
102 so it skips whitespace before it.
103 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
104
477330fc
RM		 105 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
106 (arm_reg_parse_multi): Skip whitespace first.
107 (parse_reg_list): Likewise.
108 (parse_vfp_reg_list): Likewise.
109 (s_arm_unwind_save_mmxwcg): Likewise.
110
24382199
NC		 1112013-06-24 Nick Clifton <nickc@redhat.com>
112
113 PR gas/15623
114 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
115
c3678916
RS		 1162013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
117
118 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
119
42429eac
RS		 1202013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
121
122 * config/tc-mips.c: Assert that offsetT and valueT are at least
123 8 bytes in size.
124 (GPR_SMIN, GPR_SMAX): New macros.
125 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
126
f3ded42a
RS		 1272013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
130 conditions. Remove any code deselected by them.
131 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
132
e8044f35
RS		 1332013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
134
135 * NEWS: Note removal of ECOFF support.
136 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
137 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
138 (MULTI_CFILES): Remove config/e-mipsecoff.c.
139 * Makefile.in: Regenerate.
140 * configure.in: Remove MIPS ECOFF references.
141 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
142 Delete cases.
143 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
144 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
145 (mips-*-*): ...this single case.
146 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
147 MIPS emulations to be e-mipself*.
148 * configure: Regenerate.
149 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
150 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
151 (mips-*-sysv*): Remove coff and ecoff cases.
152 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
153 * ecoff.c: Remove reference to MIPS ECOFF.
154 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
155 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
156 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
157 (mips_hi_fixup): Tweak comment.
158 (append_insn): Require a howto.
159 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
160
98508b2a
RS		 1612013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
164 Use "CPU" instead of "cpu".
165 * doc/c-mips.texi: Likewise.
166 (MIPS Opts): Rename to MIPS Options.
167 (MIPS option stack): Rename to MIPS Option Stack.
168 (MIPS ASE instruction generation overrides): Rename to
169 MIPS ASE Instruction Generation Overrides (for now).
170 (MIPS floating-point): Rename to MIPS Floating-Point.
171
fc16f8cc
RS		 1722013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
173
174 * doc/c-mips.texi (MIPS Macros): New section.
175 (MIPS Object): Replace with...
176 (MIPS Small Data): ...this new section.
177
5a7560b5
RS		 1782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
179
180 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
181 Capitalize name. Use @kindex instead of @cindex for .set entries.
182
a1b86ab7
RS		 1832013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * doc/c-mips.texi (MIPS Stabs): Remove section.
186
c6278170
RS		 1872013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
188
189 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
190 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
191 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
192 (ISA_SUPPORTS_VIRT64_ASE): Delete.
193 (mips_ase): New structure.
194 (mips_ases): New table.
195 (FP64_ASES): New macro.
196 (mips_ase_groups): New array.
197 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
198 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
199 functions.
200 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
201 (md_parse_option): Use mips_ases and mips_set_ase instead of
202 separate case statements for each ASE option.
203 (mips_after_parse_args): Use FP64_ASES. Use
204 mips_check_isa_supports_ases to check the ASEs against
205 other options.
206 (s_mipsset): Use mips_ases and mips_set_ase instead of
207 separate if statements for each ASE option. Use
208 mips_check_isa_supports_ases, even when a non-ASE option
209 is specified.
210
63a4bc21
KT		 2112013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
212
213 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
214
c31f3936
RS		 2152013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
216
217 * config/tc-mips.c (md_shortopts, options, md_longopts)
218 (md_longopts_size): Move earlier in file.
219
846ef2d0
RS		 2202013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
221
222 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
223 with a single "ase" bitmask.
224 (mips_opts): Update accordingly.
225 (file_ase, file_ase_explicit): New variables.
226 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
227 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
228 (ISA_HAS_ROR): Adjust for mips_set_options change.
229 (is_opcode_valid): Take the base ase mask directly from mips_opts.
230 (mips_ip): Adjust for mips_set_options change.
231 (md_parse_option): Likewise. Update file_ase_explicit.
232 (mips_after_parse_args): Adjust for mips_set_options change.
233 Use bitmask operations to select the default ASEs. Set file_ase
234 rather than individual per-ASE variables.
235 (s_mipsset): Adjust for mips_set_options change.
236 (mips_elf_final_processing): Test file_ase rather than
237 file_ase_mdmx. Remove commented-out code.
238
d16afab6
RS		 2392013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
242 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
243 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
244 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
245 (mips_after_parse_args): Use the new "ase" field to choose
246 the default ASEs.
247 (mips_cpu_info_table): Move ASEs from the "flags" field to the
248 "ase" field.
249
e83a675f
RE		 2502013-06-18 Richard Earnshaw <rearnsha@arm.com>
251
252 * config/tc-arm.c (symbol_preemptible): New function.
253 (relax_branch): Use it.
254
7f3c4072
CM		 2552013-06-17 Catherine Moore <clm@codesourcery.com>
256 Maciej W. Rozycki <macro@codesourcery.com>
257 Chao-Ying Fu <fu@mips.com>
258
259 * config/tc-mips.c (mips_set_options): Add ase_eva.
260 (mips_set_options mips_opts): Add ase_eva.
261 (file_ase_eva): Declare.
262 (ISA_SUPPORTS_EVA_ASE): Define.
263 (IS_SEXT_9BIT_NUM): Define.
264 (MIPS_CPU_ASE_EVA): Define.
265 (is_opcode_valid): Add support for ase_eva.
266 (macro_build): Likewise.
267 (macro): Likewise.
268 (validate_mips_insn): Likewise.
269 (validate_micromips_insn): Likewise.
270 (mips_ip): Likewise.
271 (options): Add OPTION_EVA and OPTION_NO_EVA.
272 (md_longopts): Add -meva and -mno-eva.
273 (md_parse_option): Process new options.
274 (mips_after_parse_args): Check for valid EVA combinations.
275 (s_mipsset): Likewise.
276
e410add4
RS		 2772013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
278
279 * dwarf2dbg.h (dwarf2_move_insn): Declare.
280 * dwarf2dbg.c (line_subseg): Add pmove_tail.
281 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
282 (dwarf2_gen_line_info_1): Update call accordingly.
283 (dwarf2_move_insn): New function.
284 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
285
6a50d470
RS		 2862013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
287
288 Revert:
289
290 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
291
292 PR gas/13024
293 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
294 (dwarf2_gen_line_info_1): Delete.
295 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
296 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
297 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
298 (dwarf2_directive_loc): Push previous .locs instead of generating
299 them immediately.
300
f122319e
CF		 3012013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
302
303 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
304 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
305
909c7f9c
NC		 3062013-06-13 Nick Clifton <nickc@redhat.com>
307
308 PR gas/15602
309 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
310 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
311 function. Generates an error if the adjusted offset is out of a
312 16-bit range.
313
5d5755a7
SL		 3142013-06-12 Sandra Loosemore <sandra@codesourcery.com>
315
316 * config/tc-nios2.c (md_apply_fix): Mask constant
317 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
318
3bf0dbfb
MR		 3192013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
320
321 * config/tc-mips.c (append_insn): Don't do branch relaxation for
322 MIPS-3D instructions either.
323 (md_convert_frag): Update the COPx branch mask accordingly.
324
325 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
326 option.
327 * doc/as.texinfo (Overview): Add --relax-branch and
328 --no-relax-branch.
329 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
330 --no-relax-branch.
331
9daf7bab
SL		 3322013-06-09 Sandra Loosemore <sandra@codesourcery.com>
333
334 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
335 omitted.
336
d301a56b
RS		 3372013-06-08 Catherine Moore <clm@codesourcery.com>
338
339 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
340 (is_opcode_valid_16): Pass ase value to opcode_is_member.
341 (append_insn): Change INSN_xxxx to ASE_xxxx.
342
7bab7634
DC		 3432013-06-01 George Thomas <george.thomas@atmel.com>
344
345 * gas/config/tc-avr.c: Change ISA for devices with USB support to
346 AVR_ISA_XMEGAU
347
f60cf82f
L		 3482013-05-31 H.J. Lu <hongjiu.lu@intel.com>
349
350 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
351 for ELF.
352
a3f278e2
CM		 3532013-05-31 Paul Brook <paul@codesourcery.com>
354
355 gas/
356 * config/tc-mips.c (s_ehword): New.
357
067ec077
CM		 3582013-05-30 Paul Brook <paul@codesourcery.com>
359
360 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
361
d6101ac2
MR		 3622013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
363
364 * write.c (resolve_reloc_expr_symbols): On REL targets don't
365 convert relocs who have no relocatable field either. Rephrase
366 the conditional so that the PC-relative check is only applied
367 for REL targets.
368
f19ccbda
MR		 3692013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
370
371 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
372 calculation.
373
418009c2
YZ		 3742013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
375
376 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 377 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 378 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
379 (md_apply_fix): Likewise.
380 (aarch64_force_relocation): Likewise.
381
0a8897c7
KT		 3822013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
383
384 * config/tc-arm.c (it_fsm_post_encode): Improve
385 warning messages about deprecated IT block formats.
386
89d2a2a3
MS		 3872013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
388
389 * config/tc-aarch64.c (md_apply_fix): Move value range checking
390 inside fx_done condition.
391
c77c0862
RS		 3922013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
393
394 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
395
c0637f3a
PB		 3962013-05-20 Peter Bergner <bergner@vnet.ibm.com>
397
398 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
399 and clean up warning when using PRINT_OPCODE_TABLE.
400
5656a981
AM		 4012013-05-20 Alan Modra <amodra@gmail.com>
402
403 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
404 and data fixups performing shift/high adjust/sign extension on
405 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
406 when writing data fixups rather than recalculating size.
407
997b26e8
JBG		 4082013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
409
410 * doc/c-msp430.texi: Fix typo.
411
9f6e76f4
TG		 4122013-05-16 Tristan Gingold <gingold@adacore.com>
413
414 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
415 are also TOC symbols.
416
638d3803
NC		 4172013-05-16 Nick Clifton <nickc@redhat.com>
418
419 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
420 Add -mcpu command to specify core type.
997b26e8 421 * doc/c-msp430.texi: Update documentation.
638d3803 422
b015e599
AP		 4232013-05-09 Andrew Pinski <apinski@cavium.com>
424
425 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
426 (mips_opts): Update for the new field.
427 (file_ase_virt): New variable.
428 (ISA_SUPPORTS_VIRT_ASE): New macro.
429 (ISA_SUPPORTS_VIRT64_ASE): New macro.
430 (MIPS_CPU_ASE_VIRT): New define.
431 (is_opcode_valid): Handle ase_virt.
432 (macro_build): Handle "+J".
433 (validate_mips_insn): Likewise.
434 (mips_ip): Likewise.
435 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
436 (md_longopts): Add mvirt and mnovirt
437 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
438 (mips_after_parse_args): Handle ase_virt field.
439 (s_mipsset): Handle "virt" and "novirt".
440 (mips_elf_final_processing): Add a comment about virt ASE might need
441 a new flag.
442 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
443 * doc/c-mips.texi: Document -mvirt and -mno-virt.
444 Document ".set virt" and ".set novirt".
445
da8094d7
AM		 4462013-05-09 Alan Modra <amodra@gmail.com>
447
448 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
449 control of operand flag bits.
450
c5f8c205
AM		 4512013-05-07 Alan Modra <amodra@gmail.com>
452
453 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
454 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
455 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
456 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
457 (md_apply_fix): Set fx_no_overflow for assorted relocations.
458 Shift and sign-extend fieldval for use by some VLE reloc
459 operand->insert functions.
460
b47468a6
CM		 4612013-05-06 Paul Brook <paul@codesourcery.com>
462 Catherine Moore <clm@codesourcery.com>
463
c5f8c205
AM		 464 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
465 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 466 (md_apply_fix): Likewise.
467 (tc_gen_reloc): Likewise.
468
2de39019
CM		 4692013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
470
471 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
472 (mips_fix_adjustable): Adjust pc-relative check to use
473 limited_pc_reloc_p.
474
754e2bb9
RS		 4752013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
476
477 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
478 (s_mips_stab): Do not restrict to stabn only.
479
13761a11
NC		 4802013-05-02 Nick Clifton <nickc@redhat.com>
481
482 * config/tc-msp430.c: Add support for the MSP430X architecture.
483 Add code to insert a NOP instruction after any instruction that
484 might change the interrupt state.
485 Add support for the LARGE memory model.
486 Add code to initialise the .MSP430.attributes section.
487 * config/tc-msp430.h: Add support for the MSP430X architecture.
488 * doc/c-msp430.texi: Document the new -mL and -mN command line
489 options.
490 * NEWS: Mention support for the MSP430X architecture.
491
df26367c
MR		 4922013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
493
494 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
495 alpha*-*-linux*ecoff*.
496
f02d8318
CF		 4972013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
498
499 * config/tc-mips.c (mips_ip): Add sizelo.
500 For "+C", "+G", and "+H", set sizelo and compare against it.
501
b40bf0a2
NC		 5022013-04-29 Nick Clifton <nickc@redhat.com>
503
504 * as.c (Options): Add -gdwarf-sections.
505 (parse_args): Likewise.
506 * as.h (flag_dwarf_sections): Declare.
507 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
508 (process_entries): When -gdwarf-sections is enabled generate
509 fragmentary .debug_line sections.
510 (out_debug_line): Set the section for the .debug_line section end
511 symbol.
512 * doc/as.texinfo: Document -gdwarf-sections.
513 * NEWS: Mention -gdwarf-sections.
514
8eeccb77 5152013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 516
517 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
518 according to the target parameter. Don't call s_segm since s_segm
519 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
520 initialized yet.
521 (md_begin): Call s_segm according to target parameter from command
522 line.
523
49926cd0
AM		 5242013-04-25 Alan Modra <amodra@gmail.com>
525
526 * configure.in: Allow little-endian linux.
527 * configure: Regenerate.
528
e3031850
SL		 5292013-04-24 Sandra Loosemore <sandra@codesourcery.com>
530
531 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
532 "fstatus" control register to "eccinj".
533
cb948fc0
KT		 5342013-04-19 Kai Tietz <ktietz@redhat.com>
535
536 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
537
4455e9ad
JB		 5382013-04-15 Julian Brown <julian@codesourcery.com>
539
540 * expr.c (add_to_result, subtract_from_result): Make global.
541 * expr.h (add_to_result, subtract_from_result): Add prototypes.
542 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
543 subtract_from_result to handle extra bit of precision for .sleb128
544 directive operands.
545
956a6ba3
JB		 5462013-04-10 Julian Brown <julian@codesourcery.com>
547
548 * read.c (convert_to_bignum): Add sign parameter. Use it
549 instead of X_unsigned to determine sign of resulting bignum.
550 (emit_expr): Pass extra argument to convert_to_bignum.
551 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
552 X_extrabit to convert_to_bignum.
553 (parse_bitfield_cons): Set X_extrabit.
554 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
555 Initialise X_extrabit field as appropriate.
556 (add_to_result): New.
557 (subtract_from_result): New.
558 (expr): Use above.
559 * expr.h (expressionS): Add X_extrabit field.
560
eb9f3f00
JB		 5612013-04-10 Jan Beulich <jbeulich@suse.com>
562
563 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
564 register being PC when is_t or writeback, and use distinct
565 diagnostic for the latter case.
566
ccb84d65
JB		 5672013-04-10 Jan Beulich <jbeulich@suse.com>
568
569 * gas/config/tc-arm.c (parse_operands): Re-write
570 po_barrier_or_imm().
571 (do_barrier): Remove bogus constraint().
572 (do_t_barrier): Remove.
573
4d13caa0
NC		 5742013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
575
576 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
577 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
578 ATmega2564RFR2
579 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
580
16d02dc9
JB		 5812013-04-09 Jan Beulich <jbeulich@suse.com>
582
583 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
584 Use local variable Rt in more places.
585 (do_vmsr): Accept all control registers.
586
05ac0ffb
JB		 5872013-04-09 Jan Beulich <jbeulich@suse.com>
588
589 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
590 if there was none specified for moves between scalar and core
591 register.
592
2d51fb74
JB		 5932013-04-09 Jan Beulich <jbeulich@suse.com>
594
595 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
596 NEON_ALL_LANES case.
597
94dcf8bf
JB		 5982013-04-08 Jan Beulich <jbeulich@suse.com>
599
600 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
601 PC-relative VSTR.
602
1472d06f
JB		 6032013-04-08 Jan Beulich <jbeulich@suse.com>
604
605 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
606 entry to sp_fiq.
607
0c76cae8
AM		 6082013-04-03 Alan Modra <amodra@gmail.com>
609
610 * doc/as.texinfo: Add support to generate man options for h8300.
611 * doc/c-h8300.texi: Likewise.
612
92eb40d9
RR		 6132013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
614
615 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
616 Cortex-A57.
617
51dcdd4d
NC		 6182013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
619
620 PR binutils/15068
621 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
622
c5d685bf
NC		 6232013-03-26 Nick Clifton <nickc@redhat.com>
624
9b978282
NC		 625 PR gas/15295
626 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
627 start of the file each time.
628
c5d685bf
NC		 629 PR gas/15178
630 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
631 FreeBSD targets.
632
9699c833
TG		 6332013-03-26 Douglas B Rupp <rupp@gnat.com>
634
635 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
636 after fixup.
637
4755303e
WN		 6382013-03-21 Will Newton <will.newton@linaro.org>
639
640 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
641 pc-relative str instructions in Thumb mode.
642
81f5558e
NC		 6432013-03-21 Michael Schewe <michael.schewe@gmx.net>
644
645 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
646 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
647 R_H8_DISP32A16.
648 * config/tc-h8300.h: Remove duplicated defines.
649
71863e73
NC		 6502013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
651
652 PR gas/15282
653 * tc-avr.c (mcu_has_3_byte_pc): New function.
654 (tc_cfi_frame_initial_instructions): Call it to find return
655 address size.
656
795b8e6b
NC		 6572013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
658
659 PR gas/15095
660 * config/tc-tic6x.c (tic6x_try_encode): Handle
661 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
662 encode register pair numbers when required.
663
ba86b375
WN		 6642013-03-15 Will Newton <will.newton@linaro.org>
665
666 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
667 in vstr in Thumb mode for pre-ARMv7 cores.
668
9e6f3811
AS		 6692013-03-14 Andreas Schwab <schwab@suse.de>
670
671 * doc/c-arc.texi (ARC Directives): Revert last change and use
672 @itemize instead of @table.
673 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
674
b10bf8c5
NC		 6752013-03-14 Nick Clifton <nickc@redhat.com>
676
677 PR gas/15273
678 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
679 NULL message, instead just check ARM_CPU_IS_ANY directly.
680
ba724cfc
NC		 6812013-03-14 Nick Clifton <nickc@redhat.com>
682
683 PR gas/15212
9e6f3811 684 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 685 for table format.
686 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
687 to the @item directives.
688 (ARM-Neon-Alignment): Move to correct place in the document.
689 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
690 formatting.
691 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
692 @smallexample.
693
531a94fd
SL		 6942013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
695
696 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
697 case. Add default BAD_CASE to switch.
698
dad60f8e
SL		 6992013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
700
701 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
702 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
703
dd5181d5
KT		 7042013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
705
706 * config/tc-arm.c (crc_ext_armv8): New feature set.
707 (UNPRED_REG): New macro.
708 (do_crc32_1): New function.
709 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
710 do_crc32ch, do_crc32cw): Likewise.
711 (TUEc): New macro.
712 (insns): Add entries for crc32 mnemonics.
713 (arm_extensions): Add entry for crc.
714
8e723a10
CLT		 7152013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
716
717 * write.h (struct fix): Add fx_dot_frag field.
718 (dot_frag): Declare.
719 * write.c (dot_frag): New variable.
720 (fix_new_internal): Set fx_dot_frag field with dot_frag.
721 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
722 * expr.c (expr): Save value of frag_now in dot_frag when setting
723 dot_value.
724 * read.c (emit_expr): Likewise. Delete comments.
725
be05d201
L		 7262013-03-07 H.J. Lu <hongjiu.lu@intel.com>
727
728 * config/tc-i386.c (flag_code_names): Removed.
729 (i386_index_check): Rewrote.
730
62b0d0d5
YZ		 7312013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
732
733 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
734 add comment.
735 (aarch64_double_precision_fmovable): New function.
736 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
737 function; handle hexadecimal representation of IEEE754 encoding.
738 (parse_operands): Update the call to parse_aarch64_imm_float.
739
165de32a
L		 7402013-02-28 H.J. Lu <hongjiu.lu@intel.com>
741
742 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
743 (check_hle): Updated.
744 (md_assemble): Likewise.
745 (parse_insn): Likewise.
746
d5de92cf
L		 7472013-02-28 H.J. Lu <hongjiu.lu@intel.com>
748
749 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 750 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 751 (parse_insn): Remove expecting_string_instruction. Set
752 i.rep_prefix.
753
e60bb1dd
YZ		 7542013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
755
756 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
757
aeebdd9b
YZ		 7582013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
759
760 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
761 for system registers.
762
4107ae22
DD		 7632013-02-27 DJ Delorie <dj@redhat.com>
764
765 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
766 (rl78_op): Handle %code().
767 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
768 (tc_gen_reloc): Likwise; convert to a computed reloc.
769 (md_apply_fix): Likewise.
770
151fa98f
NC		 7712013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
772
773 * config/rl78-parse.y: Fix encoding of DIVWU insn.
774
70a8bc5b 7752013-02-25 Terry Guo <terry.guo@arm.com>
776
777 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
778 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
779 list of accepted CPUs.
780
5c111e37
L		 7812013-02-19 H.J. Lu <hongjiu.lu@intel.com>
782
783 PR gas/15159
784 * config/tc-i386.c (cpu_arch): Add ".smap".
785
786 * doc/c-i386.texi: Document smap.
787
8a75745d
MR		 7882013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
789
790 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
791 mips_assembling_insn appropriately.
792 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
793
79850f26
MR		 7942013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
795
cf29fc61 796 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 797 extraneous braces.
798
4c261dff
NC		 7992013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
800
5c111e37 801 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 802
ea33f281
NC		 8032013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
804
805 * configure.tgt: Add nios2-*-rtems*.
806
a1ccaec9
YZ		 8072013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
808
809 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
810 NULL.
811
0aa27725
RS		 8122013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
813
814 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
815 (macro): Use it. Assert that trunc.w.s is not used for r5900.
816
da4339ed
NC		 8172013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
818
819 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
820 core.
821
36591ba1 8222013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 823 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 824
825 Based on patches from Altera Corporation.
826
827 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
828 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
829 * Makefile.in: Regenerated.
830 * configure.tgt: Add case for nios2*-linux*.
831 * config/obj-elf.c: Conditionally include elf/nios2.h.
832 * config/tc-nios2.c: New file.
833 * config/tc-nios2.h: New file.
834 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
835 * doc/Makefile.in: Regenerated.
836 * doc/all.texi: Set NIOSII.
837 * doc/as.texinfo (Overview): Add Nios II options.
838 (Machine Dependencies): Include c-nios2.texi.
839 * doc/c-nios2.texi: New file.
840 * NEWS: Note Altera Nios II support.
841
94d4433a
AM		 8422013-02-06 Alan Modra <amodra@gmail.com>
843
844 PR gas/14255
845 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
846 Don't skip fixups with fx_subsy non-NULL.
847 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
848 with fx_subsy non-NULL.
849
ace9af6f
L		 8502013-02-04 H.J. Lu <hongjiu.lu@intel.com>
851
852 * doc/c-metag.texi: Add "@c man" markers.
853
89d67ed9
AM		 8542013-02-04 Alan Modra <amodra@gmail.com>
855
856 * write.c (fixup_segment): Return void. Delete seg_reloc_count
857 related code.
858 (TC_ADJUST_RELOC_COUNT): Delete.
859 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
860
89072bd6
AM		 8612013-02-04 Alan Modra <amodra@gmail.com>
862
863 * po/POTFILES.in: Regenerate.
864
f9b2d544
NC		 8652013-01-30 Markos Chandras <markos.chandras@imgtec.com>
866
867 * config/tc-metag.c: Make SWAP instruction less permissive with
868 its operands.
869
392ca752
DD		 8702013-01-29 DJ Delorie <dj@redhat.com>
871
872 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
873 relocs in .word/.etc statements.
874
427d0db6
RM		 8752013-01-29 Roland McGrath <mcgrathr@google.com>
876
877 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
878 immediate value for 8-bit offset" error so it shows line info.
879
4faf939a
JM		 8802013-01-24 Joseph Myers <joseph@codesourcery.com>
881
882 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
883 for 64-bit output.
884
78c8d46c
NC		 8852013-01-24 Nick Clifton <nickc@redhat.com>
886
887 * config/tc-v850.c: Add support for e3v5 architecture.
888 * doc/c-v850.texi: Mention new support.
889
fb5b7503
NC		 8902013-01-23 Nick Clifton <nickc@redhat.com>
891
892 PR gas/15039
893 * config/tc-avr.c: Include dwarf2dbg.h.
894
8ce3d284
L		 8952013-01-18 H.J. Lu <hongjiu.lu@intel.com>
896
897 * config/tc-i386.c (reloc): Support size relocation only for ELF.
898 (tc_i386_fix_adjustable): Likewise.
899 (lex_got): Likewise.
900 (tc_gen_reloc): Likewise.
901
f5555712
YZ		 9022013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
903
904 * config/tc-aarch64.c (output_operand_error_record): Change to output
905 the out-of-range error message as value-expected message if there is
906 only one single value in the expected range.
907 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
908 LSL #0 as a programmer-friendly feature.
909
8fd4256d
L		 9102013-01-16 H.J. Lu <hongjiu.lu@intel.com>
911
912 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
913 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
914 BFD_RELOC_64_SIZE relocations.
915 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
916 for it.
917 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
918 relocations against local symbols.
919
a5840dce
AM		 9202013-01-16 Alan Modra <amodra@gmail.com>
921
922 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
923 finding some sort of toc syntax error, and break to avoid
924 compiler uninit warning.
925
af89796a
L		 9262013-01-15 H.J. Lu <hongjiu.lu@intel.com>
927
928 PR gas/15019
929 * config/tc-i386.c (lex_got): Increment length by 1 if the
930 relocation token is removed.
931
dd42f060
NC		 9322013-01-15 Nick Clifton <nickc@redhat.com>
933
934 * config/tc-v850.c (md_assemble): Allow signed values for
935 V850E_IMMEDIATE.
936
464e3686
SK		 9372013-01-11 Sean Keys <skeys@ipdatasys.com>
938
939 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 940 git to cvs.
464e3686 941
5817ffd1
PB		 9422013-01-10 Peter Bergner <bergner@vnet.ibm.com>
943
944 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
945 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
946 * config/tc-ppc.c (md_show_usage): Likewise.
947 (ppc_handle_align): Handle power8's group ending nop.
948
f4b1f6a9
SK		 9492013-01-10 Sean Keys <skeys@ipdatasys.com>
950
951 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 952 that the assember exits after the opcodes have been printed.
f4b1f6a9 953
34bca508
L		 9542013-01-10 H.J. Lu <hongjiu.lu@intel.com>
955
956 * app.c: Remove trailing white spaces.
957 * as.c: Likewise.
958 * as.h: Likewise.
959 * cond.c: Likewise.
960 * dw2gencfi.c: Likewise.
961 * dwarf2dbg.h: Likewise.
962 * ecoff.c: Likewise.
963 * input-file.c: Likewise.
964 * itbl-lex.h: Likewise.
965 * output-file.c: Likewise.
966 * read.c: Likewise.
967 * sb.c: Likewise.
968 * subsegs.c: Likewise.
969 * symbols.c: Likewise.
970 * write.c: Likewise.
971 * config/tc-i386.c: Likewise.
972 * doc/Makefile.am: Likewise.
973 * doc/Makefile.in: Likewise.
974 * doc/c-aarch64.texi: Likewise.
975 * doc/c-alpha.texi: Likewise.
976 * doc/c-arc.texi: Likewise.
977 * doc/c-arm.texi: Likewise.
978 * doc/c-avr.texi: Likewise.
979 * doc/c-bfin.texi: Likewise.
980 * doc/c-cr16.texi: Likewise.
981 * doc/c-d10v.texi: Likewise.
982 * doc/c-d30v.texi: Likewise.
983 * doc/c-h8300.texi: Likewise.
984 * doc/c-hppa.texi: Likewise.
985 * doc/c-i370.texi: Likewise.
986 * doc/c-i386.texi: Likewise.
987 * doc/c-i860.texi: Likewise.
988 * doc/c-m32c.texi: Likewise.
989 * doc/c-m32r.texi: Likewise.
990 * doc/c-m68hc11.texi: Likewise.
991 * doc/c-m68k.texi: Likewise.
992 * doc/c-microblaze.texi: Likewise.
993 * doc/c-mips.texi: Likewise.
994 * doc/c-msp430.texi: Likewise.
995 * doc/c-mt.texi: Likewise.
996 * doc/c-s390.texi: Likewise.
997 * doc/c-score.texi: Likewise.
998 * doc/c-sh.texi: Likewise.
999 * doc/c-sh64.texi: Likewise.
1000 * doc/c-tic54x.texi: Likewise.
1001 * doc/c-tic6x.texi: Likewise.
1002 * doc/c-v850.texi: Likewise.
1003 * doc/c-xc16x.texi: Likewise.
1004 * doc/c-xgate.texi: Likewise.
1005 * doc/c-xtensa.texi: Likewise.
1006 * doc/c-z80.texi: Likewise.
1007 * doc/internals.texi: Likewise.
1008
4c665b71
RM		 10092013-01-10 Roland McGrath <mcgrathr@google.com>
1010
1011 * hash.c (hash_new_sized): Make it global.
1012 * hash.h: Declare it.
1013 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1014 pass a small size.
1015
a3c62988
NC		 10162013-01-10 Will Newton <will.newton@imgtec.com>
1017
1018 * Makefile.am: Add Meta.
1019 * Makefile.in: Regenerate.
1020 * config/tc-metag.c: New file.
1021 * config/tc-metag.h: New file.
1022 * configure.tgt: Add Meta.
1023 * doc/Makefile.am: Add Meta.
1024 * doc/Makefile.in: Regenerate.
1025 * doc/all.texi: Add Meta.
1026 * doc/as.texiinfo: Document Meta options.
1027 * doc/c-metag.texi: New file.
1028
b37df7c4
SE		 10292013-01-09 Steve Ellcey <sellcey@mips.com>
1030
1031 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1032 calls.
1033 * config/tc-mips.c (internalError): Remove, replace with abort.
1034
a3251895
YZ		 10352013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1036
1037 * config/tc-aarch64.c (parse_operands): Change to compare the result
1038 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1039
8ab8155f
NC		 10402013-01-07 Nick Clifton <nickc@redhat.com>
1041
1042 PR gas/14887
1043 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1044 anticipated character.
1045 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1046 here as it is no longer needed.
1047
a4ac1c42
AS		 10482013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1049
1050 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1051 * doc/c-score.texi (SCORE-Opts): Likewise.
1052 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1053
e407c74b
NC		 10542013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1055
1056 * config/tc-mips.c: Add support for MIPS r5900.
1057 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1058 lq and sq.
1059 (can_swap_branch_p, get_append_method): Detect some conditional
1060 short loops to fix a bug on the r5900 by NOP in the branch delay
1061 slot.
1062 (M_MUL): Support 3 operands in multu on r5900.
1063 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1064 (s_mipsset): Force 32 bit floating point on r5900.
1065 (mips_ip): Check parameter range of instructions mfps and mtps on
1066 r5900.
1067 * configure.in: Detect CPU type when target string contains r5900
1068 (e.g. mips64r5900el-linux-gnu).
1069
62658407
L		 10702013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1071
1072 * as.c (parse_args): Update copyright year to 2013.
1073
95830fd1
YZ		 10742013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1075
1076 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1077 and "cortex57".
1078
517bb291 10792013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1080
517bb291
NC		 1081 PR gas/14987
1082 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1083 closing bracket.
d709e4e6 1084
517bb291 1085For older changes see ChangeLog-2012
08d56133 1086\f
517bb291 1087Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1088
1089Copying and distribution of this file, with or without modification,
1090are permitted in any medium without royalty provided the copyright
1091notice and this notice are preserved.
1092
08d56133
NC		 1093Local Variables:
1094mode: change-log
1095left-margin: 8
1096fill-column: 74
1097version-control: never
1098End:
A mirror of the official binutils-gdb repository