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[AArch64, ILP32] 1/6 Rename elf64-aarch64.c to elfnn-aarch64.c
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
e335d9cb
RS
12013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
4
18870af7
RS
52013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
6
7 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
8
833794fc
MR
92013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
10
11 * config/tc-mips.c (mips_set_options): Add insn32 member.
12 (mips_opts): Initialize it.
13 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
14 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
15 (md_longopts): Add "minsn32" and "mno-insn32" options.
16 (is_size_valid): Handle insn32 mode.
17 (md_assemble): Pass instruction string down to macro.
18 (brk_fmt): Add second dimension and insn32 mode initializers.
19 (mfhl_fmt): Likewise.
20 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
21 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
22 (macro_build_jalr, move_register): Handle insn32 mode.
23 (macro_build_branch_rs): Likewise.
24 (macro): Handle insn32 mode.
25 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
26 (mips_ip): Handle insn32 mode.
27 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
28 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
29 (mips_handle_align): Handle insn32 mode.
30 (md_show_usage): Add -minsn32 and -mno-insn32.
31
32 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
33 -mno-insn32 options.
34 (-minsn32, -mno-insn32): New options.
35 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
36 options.
37 (MIPS assembly options): New node. Document .set insn32 and
38 .set noinsn32.
39 (MIPS-Dependent): List the new node.
40
d1706f38
NC
412013-06-25 Nick Clifton <nickc@redhat.com>
42
43 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
44 the PC in indirect addressing on 430xv2 parts.
45 (msp430_operands): Add version test to hardware bug encoding
46 restrictions.
47
477330fc
RM
482013-06-24 Roland McGrath <mcgrathr@google.com>
49
d996d970
RM
50 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
51 so it skips whitespace before it.
52 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
53
477330fc
RM
54 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
55 (arm_reg_parse_multi): Skip whitespace first.
56 (parse_reg_list): Likewise.
57 (parse_vfp_reg_list): Likewise.
58 (s_arm_unwind_save_mmxwcg): Likewise.
59
24382199
NC
602013-06-24 Nick Clifton <nickc@redhat.com>
61
62 PR gas/15623
63 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
64
c3678916
RS
652013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
66
67 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
68
42429eac
RS
692013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
70
71 * config/tc-mips.c: Assert that offsetT and valueT are at least
72 8 bytes in size.
73 (GPR_SMIN, GPR_SMAX): New macros.
74 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
75
f3ded42a
RS
762013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
77
78 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
79 conditions. Remove any code deselected by them.
80 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
81
e8044f35
RS
822013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
83
84 * NEWS: Note removal of ECOFF support.
85 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
86 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
87 (MULTI_CFILES): Remove config/e-mipsecoff.c.
88 * Makefile.in: Regenerate.
89 * configure.in: Remove MIPS ECOFF references.
90 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
91 Delete cases.
92 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
93 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
94 (mips-*-*): ...this single case.
95 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
96 MIPS emulations to be e-mipself*.
97 * configure: Regenerate.
98 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
99 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
100 (mips-*-sysv*): Remove coff and ecoff cases.
101 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
102 * ecoff.c: Remove reference to MIPS ECOFF.
103 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
104 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
105 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
106 (mips_hi_fixup): Tweak comment.
107 (append_insn): Require a howto.
108 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
109
98508b2a
RS
1102013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
111
112 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
113 Use "CPU" instead of "cpu".
114 * doc/c-mips.texi: Likewise.
115 (MIPS Opts): Rename to MIPS Options.
116 (MIPS option stack): Rename to MIPS Option Stack.
117 (MIPS ASE instruction generation overrides): Rename to
118 MIPS ASE Instruction Generation Overrides (for now).
119 (MIPS floating-point): Rename to MIPS Floating-Point.
120
fc16f8cc
RS
1212013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
122
123 * doc/c-mips.texi (MIPS Macros): New section.
124 (MIPS Object): Replace with...
125 (MIPS Small Data): ...this new section.
126
5a7560b5
RS
1272013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
130 Capitalize name. Use @kindex instead of @cindex for .set entries.
131
a1b86ab7
RS
1322013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * doc/c-mips.texi (MIPS Stabs): Remove section.
135
c6278170
RS
1362013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
139 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
140 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
141 (ISA_SUPPORTS_VIRT64_ASE): Delete.
142 (mips_ase): New structure.
143 (mips_ases): New table.
144 (FP64_ASES): New macro.
145 (mips_ase_groups): New array.
146 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
147 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
148 functions.
149 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
150 (md_parse_option): Use mips_ases and mips_set_ase instead of
151 separate case statements for each ASE option.
152 (mips_after_parse_args): Use FP64_ASES. Use
153 mips_check_isa_supports_ases to check the ASEs against
154 other options.
155 (s_mipsset): Use mips_ases and mips_set_ase instead of
156 separate if statements for each ASE option. Use
157 mips_check_isa_supports_ases, even when a non-ASE option
158 is specified.
159
63a4bc21
KT
1602013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
161
162 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
163
c31f3936
RS
1642013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
165
166 * config/tc-mips.c (md_shortopts, options, md_longopts)
167 (md_longopts_size): Move earlier in file.
168
846ef2d0
RS
1692013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
170
171 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
172 with a single "ase" bitmask.
173 (mips_opts): Update accordingly.
174 (file_ase, file_ase_explicit): New variables.
175 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
176 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
177 (ISA_HAS_ROR): Adjust for mips_set_options change.
178 (is_opcode_valid): Take the base ase mask directly from mips_opts.
179 (mips_ip): Adjust for mips_set_options change.
180 (md_parse_option): Likewise. Update file_ase_explicit.
181 (mips_after_parse_args): Adjust for mips_set_options change.
182 Use bitmask operations to select the default ASEs. Set file_ase
183 rather than individual per-ASE variables.
184 (s_mipsset): Adjust for mips_set_options change.
185 (mips_elf_final_processing): Test file_ase rather than
186 file_ase_mdmx. Remove commented-out code.
187
d16afab6
RS
1882013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
191 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
192 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
193 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
194 (mips_after_parse_args): Use the new "ase" field to choose
195 the default ASEs.
196 (mips_cpu_info_table): Move ASEs from the "flags" field to the
197 "ase" field.
198
e83a675f
RE
1992013-06-18 Richard Earnshaw <rearnsha@arm.com>
200
201 * config/tc-arm.c (symbol_preemptible): New function.
202 (relax_branch): Use it.
203
7f3c4072
CM
2042013-06-17 Catherine Moore <clm@codesourcery.com>
205 Maciej W. Rozycki <macro@codesourcery.com>
206 Chao-Ying Fu <fu@mips.com>
207
208 * config/tc-mips.c (mips_set_options): Add ase_eva.
209 (mips_set_options mips_opts): Add ase_eva.
210 (file_ase_eva): Declare.
211 (ISA_SUPPORTS_EVA_ASE): Define.
212 (IS_SEXT_9BIT_NUM): Define.
213 (MIPS_CPU_ASE_EVA): Define.
214 (is_opcode_valid): Add support for ase_eva.
215 (macro_build): Likewise.
216 (macro): Likewise.
217 (validate_mips_insn): Likewise.
218 (validate_micromips_insn): Likewise.
219 (mips_ip): Likewise.
220 (options): Add OPTION_EVA and OPTION_NO_EVA.
221 (md_longopts): Add -meva and -mno-eva.
222 (md_parse_option): Process new options.
223 (mips_after_parse_args): Check for valid EVA combinations.
224 (s_mipsset): Likewise.
225
e410add4
RS
2262013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
227
228 * dwarf2dbg.h (dwarf2_move_insn): Declare.
229 * dwarf2dbg.c (line_subseg): Add pmove_tail.
230 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
231 (dwarf2_gen_line_info_1): Update call accordingly.
232 (dwarf2_move_insn): New function.
233 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
234
6a50d470
RS
2352013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
236
237 Revert:
238
239 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
240
241 PR gas/13024
242 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
243 (dwarf2_gen_line_info_1): Delete.
244 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
245 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
246 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
247 (dwarf2_directive_loc): Push previous .locs instead of generating
248 them immediately.
249
f122319e
CF
2502013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
251
252 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
253 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
254
909c7f9c
NC
2552013-06-13 Nick Clifton <nickc@redhat.com>
256
257 PR gas/15602
258 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
259 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
260 function. Generates an error if the adjusted offset is out of a
261 16-bit range.
262
5d5755a7
SL
2632013-06-12 Sandra Loosemore <sandra@codesourcery.com>
264
265 * config/tc-nios2.c (md_apply_fix): Mask constant
266 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
267
3bf0dbfb
MR
2682013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
269
270 * config/tc-mips.c (append_insn): Don't do branch relaxation for
271 MIPS-3D instructions either.
272 (md_convert_frag): Update the COPx branch mask accordingly.
273
274 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
275 option.
276 * doc/as.texinfo (Overview): Add --relax-branch and
277 --no-relax-branch.
278 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
279 --no-relax-branch.
280
9daf7bab
SL
2812013-06-09 Sandra Loosemore <sandra@codesourcery.com>
282
283 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
284 omitted.
285
d301a56b
RS
2862013-06-08 Catherine Moore <clm@codesourcery.com>
287
288 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
289 (is_opcode_valid_16): Pass ase value to opcode_is_member.
290 (append_insn): Change INSN_xxxx to ASE_xxxx.
291
7bab7634
DC
2922013-06-01 George Thomas <george.thomas@atmel.com>
293
294 * gas/config/tc-avr.c: Change ISA for devices with USB support to
295 AVR_ISA_XMEGAU
296
f60cf82f
L
2972013-05-31 H.J. Lu <hongjiu.lu@intel.com>
298
299 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
300 for ELF.
301
a3f278e2
CM
3022013-05-31 Paul Brook <paul@codesourcery.com>
303
304 gas/
305 * config/tc-mips.c (s_ehword): New.
306
067ec077
CM
3072013-05-30 Paul Brook <paul@codesourcery.com>
308
309 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
310
d6101ac2
MR
3112013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
312
313 * write.c (resolve_reloc_expr_symbols): On REL targets don't
314 convert relocs who have no relocatable field either. Rephrase
315 the conditional so that the PC-relative check is only applied
316 for REL targets.
317
f19ccbda
MR
3182013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
319
320 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
321 calculation.
322
418009c2
YZ
3232013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
324
325 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 326 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
327 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
328 (md_apply_fix): Likewise.
329 (aarch64_force_relocation): Likewise.
330
0a8897c7
KT
3312013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
332
333 * config/tc-arm.c (it_fsm_post_encode): Improve
334 warning messages about deprecated IT block formats.
335
89d2a2a3
MS
3362013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
337
338 * config/tc-aarch64.c (md_apply_fix): Move value range checking
339 inside fx_done condition.
340
c77c0862
RS
3412013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
342
343 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
344
c0637f3a
PB
3452013-05-20 Peter Bergner <bergner@vnet.ibm.com>
346
347 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
348 and clean up warning when using PRINT_OPCODE_TABLE.
349
5656a981
AM
3502013-05-20 Alan Modra <amodra@gmail.com>
351
352 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
353 and data fixups performing shift/high adjust/sign extension on
354 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
355 when writing data fixups rather than recalculating size.
356
997b26e8
JBG
3572013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
358
359 * doc/c-msp430.texi: Fix typo.
360
9f6e76f4
TG
3612013-05-16 Tristan Gingold <gingold@adacore.com>
362
363 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
364 are also TOC symbols.
365
638d3803
NC
3662013-05-16 Nick Clifton <nickc@redhat.com>
367
368 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
369 Add -mcpu command to specify core type.
997b26e8 370 * doc/c-msp430.texi: Update documentation.
638d3803 371
b015e599
AP
3722013-05-09 Andrew Pinski <apinski@cavium.com>
373
374 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
375 (mips_opts): Update for the new field.
376 (file_ase_virt): New variable.
377 (ISA_SUPPORTS_VIRT_ASE): New macro.
378 (ISA_SUPPORTS_VIRT64_ASE): New macro.
379 (MIPS_CPU_ASE_VIRT): New define.
380 (is_opcode_valid): Handle ase_virt.
381 (macro_build): Handle "+J".
382 (validate_mips_insn): Likewise.
383 (mips_ip): Likewise.
384 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
385 (md_longopts): Add mvirt and mnovirt
386 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
387 (mips_after_parse_args): Handle ase_virt field.
388 (s_mipsset): Handle "virt" and "novirt".
389 (mips_elf_final_processing): Add a comment about virt ASE might need
390 a new flag.
391 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
392 * doc/c-mips.texi: Document -mvirt and -mno-virt.
393 Document ".set virt" and ".set novirt".
394
da8094d7
AM
3952013-05-09 Alan Modra <amodra@gmail.com>
396
397 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
398 control of operand flag bits.
399
c5f8c205
AM
4002013-05-07 Alan Modra <amodra@gmail.com>
401
402 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
403 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
404 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
405 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
406 (md_apply_fix): Set fx_no_overflow for assorted relocations.
407 Shift and sign-extend fieldval for use by some VLE reloc
408 operand->insert functions.
409
b47468a6
CM
4102013-05-06 Paul Brook <paul@codesourcery.com>
411 Catherine Moore <clm@codesourcery.com>
412
c5f8c205
AM
413 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
414 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
415 (md_apply_fix): Likewise.
416 (tc_gen_reloc): Likewise.
417
2de39019
CM
4182013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
419
420 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
421 (mips_fix_adjustable): Adjust pc-relative check to use
422 limited_pc_reloc_p.
423
754e2bb9
RS
4242013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
425
426 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
427 (s_mips_stab): Do not restrict to stabn only.
428
13761a11
NC
4292013-05-02 Nick Clifton <nickc@redhat.com>
430
431 * config/tc-msp430.c: Add support for the MSP430X architecture.
432 Add code to insert a NOP instruction after any instruction that
433 might change the interrupt state.
434 Add support for the LARGE memory model.
435 Add code to initialise the .MSP430.attributes section.
436 * config/tc-msp430.h: Add support for the MSP430X architecture.
437 * doc/c-msp430.texi: Document the new -mL and -mN command line
438 options.
439 * NEWS: Mention support for the MSP430X architecture.
440
df26367c
MR
4412013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
442
443 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
444 alpha*-*-linux*ecoff*.
445
f02d8318
CF
4462013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
447
448 * config/tc-mips.c (mips_ip): Add sizelo.
449 For "+C", "+G", and "+H", set sizelo and compare against it.
450
b40bf0a2
NC
4512013-04-29 Nick Clifton <nickc@redhat.com>
452
453 * as.c (Options): Add -gdwarf-sections.
454 (parse_args): Likewise.
455 * as.h (flag_dwarf_sections): Declare.
456 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
457 (process_entries): When -gdwarf-sections is enabled generate
458 fragmentary .debug_line sections.
459 (out_debug_line): Set the section for the .debug_line section end
460 symbol.
461 * doc/as.texinfo: Document -gdwarf-sections.
462 * NEWS: Mention -gdwarf-sections.
463
8eeccb77 4642013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
465
466 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
467 according to the target parameter. Don't call s_segm since s_segm
468 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
469 initialized yet.
470 (md_begin): Call s_segm according to target parameter from command
471 line.
472
49926cd0
AM
4732013-04-25 Alan Modra <amodra@gmail.com>
474
475 * configure.in: Allow little-endian linux.
476 * configure: Regenerate.
477
e3031850
SL
4782013-04-24 Sandra Loosemore <sandra@codesourcery.com>
479
480 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
481 "fstatus" control register to "eccinj".
482
cb948fc0
KT
4832013-04-19 Kai Tietz <ktietz@redhat.com>
484
485 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
486
4455e9ad
JB
4872013-04-15 Julian Brown <julian@codesourcery.com>
488
489 * expr.c (add_to_result, subtract_from_result): Make global.
490 * expr.h (add_to_result, subtract_from_result): Add prototypes.
491 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
492 subtract_from_result to handle extra bit of precision for .sleb128
493 directive operands.
494
956a6ba3
JB
4952013-04-10 Julian Brown <julian@codesourcery.com>
496
497 * read.c (convert_to_bignum): Add sign parameter. Use it
498 instead of X_unsigned to determine sign of resulting bignum.
499 (emit_expr): Pass extra argument to convert_to_bignum.
500 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
501 X_extrabit to convert_to_bignum.
502 (parse_bitfield_cons): Set X_extrabit.
503 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
504 Initialise X_extrabit field as appropriate.
505 (add_to_result): New.
506 (subtract_from_result): New.
507 (expr): Use above.
508 * expr.h (expressionS): Add X_extrabit field.
509
eb9f3f00
JB
5102013-04-10 Jan Beulich <jbeulich@suse.com>
511
512 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
513 register being PC when is_t or writeback, and use distinct
514 diagnostic for the latter case.
515
ccb84d65
JB
5162013-04-10 Jan Beulich <jbeulich@suse.com>
517
518 * gas/config/tc-arm.c (parse_operands): Re-write
519 po_barrier_or_imm().
520 (do_barrier): Remove bogus constraint().
521 (do_t_barrier): Remove.
522
4d13caa0
NC
5232013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
524
525 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
526 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
527 ATmega2564RFR2
528 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
529
16d02dc9
JB
5302013-04-09 Jan Beulich <jbeulich@suse.com>
531
532 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
533 Use local variable Rt in more places.
534 (do_vmsr): Accept all control registers.
535
05ac0ffb
JB
5362013-04-09 Jan Beulich <jbeulich@suse.com>
537
538 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
539 if there was none specified for moves between scalar and core
540 register.
541
2d51fb74
JB
5422013-04-09 Jan Beulich <jbeulich@suse.com>
543
544 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
545 NEON_ALL_LANES case.
546
94dcf8bf
JB
5472013-04-08 Jan Beulich <jbeulich@suse.com>
548
549 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
550 PC-relative VSTR.
551
1472d06f
JB
5522013-04-08 Jan Beulich <jbeulich@suse.com>
553
554 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
555 entry to sp_fiq.
556
0c76cae8
AM
5572013-04-03 Alan Modra <amodra@gmail.com>
558
559 * doc/as.texinfo: Add support to generate man options for h8300.
560 * doc/c-h8300.texi: Likewise.
561
92eb40d9
RR
5622013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
563
564 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
565 Cortex-A57.
566
51dcdd4d
NC
5672013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
568
569 PR binutils/15068
570 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
571
c5d685bf
NC
5722013-03-26 Nick Clifton <nickc@redhat.com>
573
9b978282
NC
574 PR gas/15295
575 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
576 start of the file each time.
577
c5d685bf
NC
578 PR gas/15178
579 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
580 FreeBSD targets.
581
9699c833
TG
5822013-03-26 Douglas B Rupp <rupp@gnat.com>
583
584 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
585 after fixup.
586
4755303e
WN
5872013-03-21 Will Newton <will.newton@linaro.org>
588
589 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
590 pc-relative str instructions in Thumb mode.
591
81f5558e
NC
5922013-03-21 Michael Schewe <michael.schewe@gmx.net>
593
594 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
595 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
596 R_H8_DISP32A16.
597 * config/tc-h8300.h: Remove duplicated defines.
598
71863e73
NC
5992013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
600
601 PR gas/15282
602 * tc-avr.c (mcu_has_3_byte_pc): New function.
603 (tc_cfi_frame_initial_instructions): Call it to find return
604 address size.
605
795b8e6b
NC
6062013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
607
608 PR gas/15095
609 * config/tc-tic6x.c (tic6x_try_encode): Handle
610 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
611 encode register pair numbers when required.
612
ba86b375
WN
6132013-03-15 Will Newton <will.newton@linaro.org>
614
615 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
616 in vstr in Thumb mode for pre-ARMv7 cores.
617
9e6f3811
AS
6182013-03-14 Andreas Schwab <schwab@suse.de>
619
620 * doc/c-arc.texi (ARC Directives): Revert last change and use
621 @itemize instead of @table.
622 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
623
b10bf8c5
NC
6242013-03-14 Nick Clifton <nickc@redhat.com>
625
626 PR gas/15273
627 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
628 NULL message, instead just check ARM_CPU_IS_ANY directly.
629
ba724cfc
NC
6302013-03-14 Nick Clifton <nickc@redhat.com>
631
632 PR gas/15212
9e6f3811 633 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
634 for table format.
635 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
636 to the @item directives.
637 (ARM-Neon-Alignment): Move to correct place in the document.
638 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
639 formatting.
640 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
641 @smallexample.
642
531a94fd
SL
6432013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
644
645 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
646 case. Add default BAD_CASE to switch.
647
dad60f8e
SL
6482013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
649
650 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
651 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
652
dd5181d5
KT
6532013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
654
655 * config/tc-arm.c (crc_ext_armv8): New feature set.
656 (UNPRED_REG): New macro.
657 (do_crc32_1): New function.
658 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
659 do_crc32ch, do_crc32cw): Likewise.
660 (TUEc): New macro.
661 (insns): Add entries for crc32 mnemonics.
662 (arm_extensions): Add entry for crc.
663
8e723a10
CLT
6642013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
665
666 * write.h (struct fix): Add fx_dot_frag field.
667 (dot_frag): Declare.
668 * write.c (dot_frag): New variable.
669 (fix_new_internal): Set fx_dot_frag field with dot_frag.
670 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
671 * expr.c (expr): Save value of frag_now in dot_frag when setting
672 dot_value.
673 * read.c (emit_expr): Likewise. Delete comments.
674
be05d201
L
6752013-03-07 H.J. Lu <hongjiu.lu@intel.com>
676
677 * config/tc-i386.c (flag_code_names): Removed.
678 (i386_index_check): Rewrote.
679
62b0d0d5
YZ
6802013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
681
682 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
683 add comment.
684 (aarch64_double_precision_fmovable): New function.
685 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
686 function; handle hexadecimal representation of IEEE754 encoding.
687 (parse_operands): Update the call to parse_aarch64_imm_float.
688
165de32a
L
6892013-02-28 H.J. Lu <hongjiu.lu@intel.com>
690
691 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
692 (check_hle): Updated.
693 (md_assemble): Likewise.
694 (parse_insn): Likewise.
695
d5de92cf
L
6962013-02-28 H.J. Lu <hongjiu.lu@intel.com>
697
698 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 699 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
700 (parse_insn): Remove expecting_string_instruction. Set
701 i.rep_prefix.
702
e60bb1dd
YZ
7032013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
704
705 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
706
aeebdd9b
YZ
7072013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
708
709 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
710 for system registers.
711
4107ae22
DD
7122013-02-27 DJ Delorie <dj@redhat.com>
713
714 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
715 (rl78_op): Handle %code().
716 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
717 (tc_gen_reloc): Likwise; convert to a computed reloc.
718 (md_apply_fix): Likewise.
719
151fa98f
NC
7202013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
721
722 * config/rl78-parse.y: Fix encoding of DIVWU insn.
723
70a8bc5b 7242013-02-25 Terry Guo <terry.guo@arm.com>
725
726 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
727 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
728 list of accepted CPUs.
729
5c111e37
L
7302013-02-19 H.J. Lu <hongjiu.lu@intel.com>
731
732 PR gas/15159
733 * config/tc-i386.c (cpu_arch): Add ".smap".
734
735 * doc/c-i386.texi: Document smap.
736
8a75745d
MR
7372013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
738
739 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
740 mips_assembling_insn appropriately.
741 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
742
79850f26
MR
7432013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
744
cf29fc61 745 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
746 extraneous braces.
747
4c261dff
NC
7482013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
749
5c111e37 750 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 751
ea33f281
NC
7522013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
753
754 * configure.tgt: Add nios2-*-rtems*.
755
a1ccaec9
YZ
7562013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
757
758 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
759 NULL.
760
0aa27725
RS
7612013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
762
763 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
764 (macro): Use it. Assert that trunc.w.s is not used for r5900.
765
da4339ed
NC
7662013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
767
768 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
769 core.
770
36591ba1 7712013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 772 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
773
774 Based on patches from Altera Corporation.
775
776 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
777 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
778 * Makefile.in: Regenerated.
779 * configure.tgt: Add case for nios2*-linux*.
780 * config/obj-elf.c: Conditionally include elf/nios2.h.
781 * config/tc-nios2.c: New file.
782 * config/tc-nios2.h: New file.
783 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
784 * doc/Makefile.in: Regenerated.
785 * doc/all.texi: Set NIOSII.
786 * doc/as.texinfo (Overview): Add Nios II options.
787 (Machine Dependencies): Include c-nios2.texi.
788 * doc/c-nios2.texi: New file.
789 * NEWS: Note Altera Nios II support.
790
94d4433a
AM
7912013-02-06 Alan Modra <amodra@gmail.com>
792
793 PR gas/14255
794 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
795 Don't skip fixups with fx_subsy non-NULL.
796 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
797 with fx_subsy non-NULL.
798
ace9af6f
L
7992013-02-04 H.J. Lu <hongjiu.lu@intel.com>
800
801 * doc/c-metag.texi: Add "@c man" markers.
802
89d67ed9
AM
8032013-02-04 Alan Modra <amodra@gmail.com>
804
805 * write.c (fixup_segment): Return void. Delete seg_reloc_count
806 related code.
807 (TC_ADJUST_RELOC_COUNT): Delete.
808 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
809
89072bd6
AM
8102013-02-04 Alan Modra <amodra@gmail.com>
811
812 * po/POTFILES.in: Regenerate.
813
f9b2d544
NC
8142013-01-30 Markos Chandras <markos.chandras@imgtec.com>
815
816 * config/tc-metag.c: Make SWAP instruction less permissive with
817 its operands.
818
392ca752
DD
8192013-01-29 DJ Delorie <dj@redhat.com>
820
821 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
822 relocs in .word/.etc statements.
823
427d0db6
RM
8242013-01-29 Roland McGrath <mcgrathr@google.com>
825
826 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
827 immediate value for 8-bit offset" error so it shows line info.
828
4faf939a
JM
8292013-01-24 Joseph Myers <joseph@codesourcery.com>
830
831 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
832 for 64-bit output.
833
78c8d46c
NC
8342013-01-24 Nick Clifton <nickc@redhat.com>
835
836 * config/tc-v850.c: Add support for e3v5 architecture.
837 * doc/c-v850.texi: Mention new support.
838
fb5b7503
NC
8392013-01-23 Nick Clifton <nickc@redhat.com>
840
841 PR gas/15039
842 * config/tc-avr.c: Include dwarf2dbg.h.
843
8ce3d284
L
8442013-01-18 H.J. Lu <hongjiu.lu@intel.com>
845
846 * config/tc-i386.c (reloc): Support size relocation only for ELF.
847 (tc_i386_fix_adjustable): Likewise.
848 (lex_got): Likewise.
849 (tc_gen_reloc): Likewise.
850
f5555712
YZ
8512013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
852
853 * config/tc-aarch64.c (output_operand_error_record): Change to output
854 the out-of-range error message as value-expected message if there is
855 only one single value in the expected range.
856 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
857 LSL #0 as a programmer-friendly feature.
858
8fd4256d
L
8592013-01-16 H.J. Lu <hongjiu.lu@intel.com>
860
861 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
862 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
863 BFD_RELOC_64_SIZE relocations.
864 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
865 for it.
866 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
867 relocations against local symbols.
868
a5840dce
AM
8692013-01-16 Alan Modra <amodra@gmail.com>
870
871 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
872 finding some sort of toc syntax error, and break to avoid
873 compiler uninit warning.
874
af89796a
L
8752013-01-15 H.J. Lu <hongjiu.lu@intel.com>
876
877 PR gas/15019
878 * config/tc-i386.c (lex_got): Increment length by 1 if the
879 relocation token is removed.
880
dd42f060
NC
8812013-01-15 Nick Clifton <nickc@redhat.com>
882
883 * config/tc-v850.c (md_assemble): Allow signed values for
884 V850E_IMMEDIATE.
885
464e3686
SK
8862013-01-11 Sean Keys <skeys@ipdatasys.com>
887
888 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 889 git to cvs.
464e3686 890
5817ffd1
PB
8912013-01-10 Peter Bergner <bergner@vnet.ibm.com>
892
893 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
894 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
895 * config/tc-ppc.c (md_show_usage): Likewise.
896 (ppc_handle_align): Handle power8's group ending nop.
897
f4b1f6a9
SK
8982013-01-10 Sean Keys <skeys@ipdatasys.com>
899
900 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 901 that the assember exits after the opcodes have been printed.
f4b1f6a9 902
34bca508
L
9032013-01-10 H.J. Lu <hongjiu.lu@intel.com>
904
905 * app.c: Remove trailing white spaces.
906 * as.c: Likewise.
907 * as.h: Likewise.
908 * cond.c: Likewise.
909 * dw2gencfi.c: Likewise.
910 * dwarf2dbg.h: Likewise.
911 * ecoff.c: Likewise.
912 * input-file.c: Likewise.
913 * itbl-lex.h: Likewise.
914 * output-file.c: Likewise.
915 * read.c: Likewise.
916 * sb.c: Likewise.
917 * subsegs.c: Likewise.
918 * symbols.c: Likewise.
919 * write.c: Likewise.
920 * config/tc-i386.c: Likewise.
921 * doc/Makefile.am: Likewise.
922 * doc/Makefile.in: Likewise.
923 * doc/c-aarch64.texi: Likewise.
924 * doc/c-alpha.texi: Likewise.
925 * doc/c-arc.texi: Likewise.
926 * doc/c-arm.texi: Likewise.
927 * doc/c-avr.texi: Likewise.
928 * doc/c-bfin.texi: Likewise.
929 * doc/c-cr16.texi: Likewise.
930 * doc/c-d10v.texi: Likewise.
931 * doc/c-d30v.texi: Likewise.
932 * doc/c-h8300.texi: Likewise.
933 * doc/c-hppa.texi: Likewise.
934 * doc/c-i370.texi: Likewise.
935 * doc/c-i386.texi: Likewise.
936 * doc/c-i860.texi: Likewise.
937 * doc/c-m32c.texi: Likewise.
938 * doc/c-m32r.texi: Likewise.
939 * doc/c-m68hc11.texi: Likewise.
940 * doc/c-m68k.texi: Likewise.
941 * doc/c-microblaze.texi: Likewise.
942 * doc/c-mips.texi: Likewise.
943 * doc/c-msp430.texi: Likewise.
944 * doc/c-mt.texi: Likewise.
945 * doc/c-s390.texi: Likewise.
946 * doc/c-score.texi: Likewise.
947 * doc/c-sh.texi: Likewise.
948 * doc/c-sh64.texi: Likewise.
949 * doc/c-tic54x.texi: Likewise.
950 * doc/c-tic6x.texi: Likewise.
951 * doc/c-v850.texi: Likewise.
952 * doc/c-xc16x.texi: Likewise.
953 * doc/c-xgate.texi: Likewise.
954 * doc/c-xtensa.texi: Likewise.
955 * doc/c-z80.texi: Likewise.
956 * doc/internals.texi: Likewise.
957
4c665b71
RM
9582013-01-10 Roland McGrath <mcgrathr@google.com>
959
960 * hash.c (hash_new_sized): Make it global.
961 * hash.h: Declare it.
962 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
963 pass a small size.
964
a3c62988
NC
9652013-01-10 Will Newton <will.newton@imgtec.com>
966
967 * Makefile.am: Add Meta.
968 * Makefile.in: Regenerate.
969 * config/tc-metag.c: New file.
970 * config/tc-metag.h: New file.
971 * configure.tgt: Add Meta.
972 * doc/Makefile.am: Add Meta.
973 * doc/Makefile.in: Regenerate.
974 * doc/all.texi: Add Meta.
975 * doc/as.texiinfo: Document Meta options.
976 * doc/c-metag.texi: New file.
977
b37df7c4
SE
9782013-01-09 Steve Ellcey <sellcey@mips.com>
979
980 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
981 calls.
982 * config/tc-mips.c (internalError): Remove, replace with abort.
983
a3251895
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9842013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
985
986 * config/tc-aarch64.c (parse_operands): Change to compare the result
987 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
988
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9892013-01-07 Nick Clifton <nickc@redhat.com>
990
991 PR gas/14887
992 * config/tc-arm.c (skip_past_char): Skip whitespace before the
993 anticipated character.
994 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
995 here as it is no longer needed.
996
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9972013-01-06 Andreas Schwab <schwab@linux-m68k.org>
998
999 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1000 * doc/c-score.texi (SCORE-Opts): Likewise.
1001 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1002
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10032013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1004
1005 * config/tc-mips.c: Add support for MIPS r5900.
1006 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1007 lq and sq.
1008 (can_swap_branch_p, get_append_method): Detect some conditional
1009 short loops to fix a bug on the r5900 by NOP in the branch delay
1010 slot.
1011 (M_MUL): Support 3 operands in multu on r5900.
1012 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1013 (s_mipsset): Force 32 bit floating point on r5900.
1014 (mips_ip): Check parameter range of instructions mfps and mtps on
1015 r5900.
1016 * configure.in: Detect CPU type when target string contains r5900
1017 (e.g. mips64r5900el-linux-gnu).
1018
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10192013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1020
1021 * as.c (parse_args): Update copyright year to 2013.
1022
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10232013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1024
1025 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1026 and "cortex57".
1027
517bb291 10282013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1029
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1030 PR gas/14987
1031 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1032 closing bracket.
d709e4e6 1033
517bb291 1034For older changes see ChangeLog-2012
08d56133 1035\f
517bb291 1036Copyright (C) 2013 Free Software Foundation, Inc.
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1037
1038Copying and distribution of this file, with or without modification,
1039are permitted in any medium without royalty provided the copyright
1040notice and this notice are preserved.
1041
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1042Local Variables:
1043mode: change-log
1044left-margin: 8
1045fill-column: 74
1046version-control: never
1047End: