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846ef2d0
RS
12013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
4 with a single "ase" bitmask.
5 (mips_opts): Update accordingly.
6 (file_ase, file_ase_explicit): New variables.
7 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
8 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
9 (ISA_HAS_ROR): Adjust for mips_set_options change.
10 (is_opcode_valid): Take the base ase mask directly from mips_opts.
11 (mips_ip): Adjust for mips_set_options change.
12 (md_parse_option): Likewise. Update file_ase_explicit.
13 (mips_after_parse_args): Adjust for mips_set_options change.
14 Use bitmask operations to select the default ASEs. Set file_ase
15 rather than individual per-ASE variables.
16 (s_mipsset): Adjust for mips_set_options change.
17 (mips_elf_final_processing): Test file_ase rather than
18 file_ase_mdmx. Remove commented-out code.
19
d16afab6
RS
202013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
21
22 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
23 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
24 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
25 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
26 (mips_after_parse_args): Use the new "ase" field to choose
27 the default ASEs.
28 (mips_cpu_info_table): Move ASEs from the "flags" field to the
29 "ase" field.
30
e83a675f
RE
312013-06-18 Richard Earnshaw <rearnsha@arm.com>
32
33 * config/tc-arm.c (symbol_preemptible): New function.
34 (relax_branch): Use it.
35
7f3c4072
CM
362013-06-17 Catherine Moore <clm@codesourcery.com>
37 Maciej W. Rozycki <macro@codesourcery.com>
38 Chao-Ying Fu <fu@mips.com>
39
40 * config/tc-mips.c (mips_set_options): Add ase_eva.
41 (mips_set_options mips_opts): Add ase_eva.
42 (file_ase_eva): Declare.
43 (ISA_SUPPORTS_EVA_ASE): Define.
44 (IS_SEXT_9BIT_NUM): Define.
45 (MIPS_CPU_ASE_EVA): Define.
46 (is_opcode_valid): Add support for ase_eva.
47 (macro_build): Likewise.
48 (macro): Likewise.
49 (validate_mips_insn): Likewise.
50 (validate_micromips_insn): Likewise.
51 (mips_ip): Likewise.
52 (options): Add OPTION_EVA and OPTION_NO_EVA.
53 (md_longopts): Add -meva and -mno-eva.
54 (md_parse_option): Process new options.
55 (mips_after_parse_args): Check for valid EVA combinations.
56 (s_mipsset): Likewise.
57
e410add4
RS
582013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
59
60 * dwarf2dbg.h (dwarf2_move_insn): Declare.
61 * dwarf2dbg.c (line_subseg): Add pmove_tail.
62 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
63 (dwarf2_gen_line_info_1): Update call accordingly.
64 (dwarf2_move_insn): New function.
65 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
66
6a50d470
RS
672013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
68
69 Revert:
70
71 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
72
73 PR gas/13024
74 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
75 (dwarf2_gen_line_info_1): Delete.
76 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
77 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
78 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
79 (dwarf2_directive_loc): Push previous .locs instead of generating
80 them immediately.
81
f122319e
CF
822013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
83
84 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
85 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
86
909c7f9c
NC
872013-06-13 Nick Clifton <nickc@redhat.com>
88
89 PR gas/15602
90 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
91 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
92 function. Generates an error if the adjusted offset is out of a
93 16-bit range.
94
5d5755a7
SL
952013-06-12 Sandra Loosemore <sandra@codesourcery.com>
96
97 * config/tc-nios2.c (md_apply_fix): Mask constant
98 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
99
3bf0dbfb
MR
1002013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
101
102 * config/tc-mips.c (append_insn): Don't do branch relaxation for
103 MIPS-3D instructions either.
104 (md_convert_frag): Update the COPx branch mask accordingly.
105
106 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
107 option.
108 * doc/as.texinfo (Overview): Add --relax-branch and
109 --no-relax-branch.
110 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
111 --no-relax-branch.
112
9daf7bab
SL
1132013-06-09 Sandra Loosemore <sandra@codesourcery.com>
114
115 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
116 omitted.
117
d301a56b
RS
1182013-06-08 Catherine Moore <clm@codesourcery.com>
119
120 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
121 (is_opcode_valid_16): Pass ase value to opcode_is_member.
122 (append_insn): Change INSN_xxxx to ASE_xxxx.
123
7bab7634
DC
1242013-06-01 George Thomas <george.thomas@atmel.com>
125
126 * gas/config/tc-avr.c: Change ISA for devices with USB support to
127 AVR_ISA_XMEGAU
128
f60cf82f
L
1292013-05-31 H.J. Lu <hongjiu.lu@intel.com>
130
131 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
132 for ELF.
133
a3f278e2
CM
1342013-05-31 Paul Brook <paul@codesourcery.com>
135
136 gas/
137 * config/tc-mips.c (s_ehword): New.
138
067ec077
CM
1392013-05-30 Paul Brook <paul@codesourcery.com>
140
141 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
142
d6101ac2
MR
1432013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
144
145 * write.c (resolve_reloc_expr_symbols): On REL targets don't
146 convert relocs who have no relocatable field either. Rephrase
147 the conditional so that the PC-relative check is only applied
148 for REL targets.
149
f19ccbda
MR
1502013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
151
152 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
153 calculation.
154
418009c2
YZ
1552013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
156
157 * config/tc-aarch64.c (reloc_table): Update to use
158 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
159 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
160 (md_apply_fix): Likewise.
161 (aarch64_force_relocation): Likewise.
162
0a8897c7
KT
1632013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
164
165 * config/tc-arm.c (it_fsm_post_encode): Improve
166 warning messages about deprecated IT block formats.
167
89d2a2a3
MS
1682013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
169
170 * config/tc-aarch64.c (md_apply_fix): Move value range checking
171 inside fx_done condition.
172
c77c0862
RS
1732013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
174
175 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
176
c0637f3a
PB
1772013-05-20 Peter Bergner <bergner@vnet.ibm.com>
178
179 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
180 and clean up warning when using PRINT_OPCODE_TABLE.
181
5656a981
AM
1822013-05-20 Alan Modra <amodra@gmail.com>
183
184 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
185 and data fixups performing shift/high adjust/sign extension on
186 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
187 when writing data fixups rather than recalculating size.
188
997b26e8
JBG
1892013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
190
191 * doc/c-msp430.texi: Fix typo.
192
9f6e76f4
TG
1932013-05-16 Tristan Gingold <gingold@adacore.com>
194
195 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
196 are also TOC symbols.
197
638d3803
NC
1982013-05-16 Nick Clifton <nickc@redhat.com>
199
200 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
201 Add -mcpu command to specify core type.
997b26e8 202 * doc/c-msp430.texi: Update documentation.
638d3803 203
b015e599
AP
2042013-05-09 Andrew Pinski <apinski@cavium.com>
205
206 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
207 (mips_opts): Update for the new field.
208 (file_ase_virt): New variable.
209 (ISA_SUPPORTS_VIRT_ASE): New macro.
210 (ISA_SUPPORTS_VIRT64_ASE): New macro.
211 (MIPS_CPU_ASE_VIRT): New define.
212 (is_opcode_valid): Handle ase_virt.
213 (macro_build): Handle "+J".
214 (validate_mips_insn): Likewise.
215 (mips_ip): Likewise.
216 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
217 (md_longopts): Add mvirt and mnovirt
218 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
219 (mips_after_parse_args): Handle ase_virt field.
220 (s_mipsset): Handle "virt" and "novirt".
221 (mips_elf_final_processing): Add a comment about virt ASE might need
222 a new flag.
223 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
224 * doc/c-mips.texi: Document -mvirt and -mno-virt.
225 Document ".set virt" and ".set novirt".
226
da8094d7
AM
2272013-05-09 Alan Modra <amodra@gmail.com>
228
229 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
230 control of operand flag bits.
231
c5f8c205
AM
2322013-05-07 Alan Modra <amodra@gmail.com>
233
234 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
235 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
236 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
237 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
238 (md_apply_fix): Set fx_no_overflow for assorted relocations.
239 Shift and sign-extend fieldval for use by some VLE reloc
240 operand->insert functions.
241
b47468a6
CM
2422013-05-06 Paul Brook <paul@codesourcery.com>
243 Catherine Moore <clm@codesourcery.com>
244
c5f8c205
AM
245 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
246 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
247 (md_apply_fix): Likewise.
248 (tc_gen_reloc): Likewise.
249
2de39019
CM
2502013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
251
252 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
253 (mips_fix_adjustable): Adjust pc-relative check to use
254 limited_pc_reloc_p.
255
754e2bb9
RS
2562013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
257
258 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
259 (s_mips_stab): Do not restrict to stabn only.
260
13761a11
NC
2612013-05-02 Nick Clifton <nickc@redhat.com>
262
263 * config/tc-msp430.c: Add support for the MSP430X architecture.
264 Add code to insert a NOP instruction after any instruction that
265 might change the interrupt state.
266 Add support for the LARGE memory model.
267 Add code to initialise the .MSP430.attributes section.
268 * config/tc-msp430.h: Add support for the MSP430X architecture.
269 * doc/c-msp430.texi: Document the new -mL and -mN command line
270 options.
271 * NEWS: Mention support for the MSP430X architecture.
272
df26367c
MR
2732013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
274
275 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
276 alpha*-*-linux*ecoff*.
277
f02d8318
CF
2782013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
279
280 * config/tc-mips.c (mips_ip): Add sizelo.
281 For "+C", "+G", and "+H", set sizelo and compare against it.
282
b40bf0a2
NC
2832013-04-29 Nick Clifton <nickc@redhat.com>
284
285 * as.c (Options): Add -gdwarf-sections.
286 (parse_args): Likewise.
287 * as.h (flag_dwarf_sections): Declare.
288 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
289 (process_entries): When -gdwarf-sections is enabled generate
290 fragmentary .debug_line sections.
291 (out_debug_line): Set the section for the .debug_line section end
292 symbol.
293 * doc/as.texinfo: Document -gdwarf-sections.
294 * NEWS: Mention -gdwarf-sections.
295
8eeccb77 2962013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
297
298 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
299 according to the target parameter. Don't call s_segm since s_segm
300 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
301 initialized yet.
302 (md_begin): Call s_segm according to target parameter from command
303 line.
304
49926cd0
AM
3052013-04-25 Alan Modra <amodra@gmail.com>
306
307 * configure.in: Allow little-endian linux.
308 * configure: Regenerate.
309
e3031850
SL
3102013-04-24 Sandra Loosemore <sandra@codesourcery.com>
311
312 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
313 "fstatus" control register to "eccinj".
314
cb948fc0
KT
3152013-04-19 Kai Tietz <ktietz@redhat.com>
316
317 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
318
4455e9ad
JB
3192013-04-15 Julian Brown <julian@codesourcery.com>
320
321 * expr.c (add_to_result, subtract_from_result): Make global.
322 * expr.h (add_to_result, subtract_from_result): Add prototypes.
323 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
324 subtract_from_result to handle extra bit of precision for .sleb128
325 directive operands.
326
956a6ba3
JB
3272013-04-10 Julian Brown <julian@codesourcery.com>
328
329 * read.c (convert_to_bignum): Add sign parameter. Use it
330 instead of X_unsigned to determine sign of resulting bignum.
331 (emit_expr): Pass extra argument to convert_to_bignum.
332 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
333 X_extrabit to convert_to_bignum.
334 (parse_bitfield_cons): Set X_extrabit.
335 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
336 Initialise X_extrabit field as appropriate.
337 (add_to_result): New.
338 (subtract_from_result): New.
339 (expr): Use above.
340 * expr.h (expressionS): Add X_extrabit field.
341
eb9f3f00
JB
3422013-04-10 Jan Beulich <jbeulich@suse.com>
343
344 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
345 register being PC when is_t or writeback, and use distinct
346 diagnostic for the latter case.
347
ccb84d65
JB
3482013-04-10 Jan Beulich <jbeulich@suse.com>
349
350 * gas/config/tc-arm.c (parse_operands): Re-write
351 po_barrier_or_imm().
352 (do_barrier): Remove bogus constraint().
353 (do_t_barrier): Remove.
354
4d13caa0
NC
3552013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
356
357 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
358 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
359 ATmega2564RFR2
360 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
361
16d02dc9
JB
3622013-04-09 Jan Beulich <jbeulich@suse.com>
363
364 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
365 Use local variable Rt in more places.
366 (do_vmsr): Accept all control registers.
367
05ac0ffb
JB
3682013-04-09 Jan Beulich <jbeulich@suse.com>
369
370 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
371 if there was none specified for moves between scalar and core
372 register.
373
2d51fb74
JB
3742013-04-09 Jan Beulich <jbeulich@suse.com>
375
376 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
377 NEON_ALL_LANES case.
378
94dcf8bf
JB
3792013-04-08 Jan Beulich <jbeulich@suse.com>
380
381 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
382 PC-relative VSTR.
383
1472d06f
JB
3842013-04-08 Jan Beulich <jbeulich@suse.com>
385
386 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
387 entry to sp_fiq.
388
0c76cae8
AM
3892013-04-03 Alan Modra <amodra@gmail.com>
390
391 * doc/as.texinfo: Add support to generate man options for h8300.
392 * doc/c-h8300.texi: Likewise.
393
92eb40d9
RR
3942013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
395
396 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
397 Cortex-A57.
398
51dcdd4d
NC
3992013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
400
401 PR binutils/15068
402 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
403
c5d685bf
NC
4042013-03-26 Nick Clifton <nickc@redhat.com>
405
9b978282
NC
406 PR gas/15295
407 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
408 start of the file each time.
409
c5d685bf
NC
410 PR gas/15178
411 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
412 FreeBSD targets.
413
9699c833
TG
4142013-03-26 Douglas B Rupp <rupp@gnat.com>
415
416 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
417 after fixup.
418
4755303e
WN
4192013-03-21 Will Newton <will.newton@linaro.org>
420
421 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
422 pc-relative str instructions in Thumb mode.
423
81f5558e
NC
4242013-03-21 Michael Schewe <michael.schewe@gmx.net>
425
426 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
427 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
428 R_H8_DISP32A16.
429 * config/tc-h8300.h: Remove duplicated defines.
430
71863e73
NC
4312013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
432
433 PR gas/15282
434 * tc-avr.c (mcu_has_3_byte_pc): New function.
435 (tc_cfi_frame_initial_instructions): Call it to find return
436 address size.
437
795b8e6b
NC
4382013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
439
440 PR gas/15095
441 * config/tc-tic6x.c (tic6x_try_encode): Handle
442 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
443 encode register pair numbers when required.
444
ba86b375
WN
4452013-03-15 Will Newton <will.newton@linaro.org>
446
447 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
448 in vstr in Thumb mode for pre-ARMv7 cores.
449
9e6f3811
AS
4502013-03-14 Andreas Schwab <schwab@suse.de>
451
452 * doc/c-arc.texi (ARC Directives): Revert last change and use
453 @itemize instead of @table.
454 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
455
b10bf8c5
NC
4562013-03-14 Nick Clifton <nickc@redhat.com>
457
458 PR gas/15273
459 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
460 NULL message, instead just check ARM_CPU_IS_ANY directly.
461
ba724cfc
NC
4622013-03-14 Nick Clifton <nickc@redhat.com>
463
464 PR gas/15212
9e6f3811 465 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
466 for table format.
467 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
468 to the @item directives.
469 (ARM-Neon-Alignment): Move to correct place in the document.
470 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
471 formatting.
472 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
473 @smallexample.
474
531a94fd
SL
4752013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
476
477 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
478 case. Add default BAD_CASE to switch.
479
dad60f8e
SL
4802013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
481
482 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
483 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
484
dd5181d5
KT
4852013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
486
487 * config/tc-arm.c (crc_ext_armv8): New feature set.
488 (UNPRED_REG): New macro.
489 (do_crc32_1): New function.
490 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
491 do_crc32ch, do_crc32cw): Likewise.
492 (TUEc): New macro.
493 (insns): Add entries for crc32 mnemonics.
494 (arm_extensions): Add entry for crc.
495
8e723a10
CLT
4962013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
497
498 * write.h (struct fix): Add fx_dot_frag field.
499 (dot_frag): Declare.
500 * write.c (dot_frag): New variable.
501 (fix_new_internal): Set fx_dot_frag field with dot_frag.
502 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
503 * expr.c (expr): Save value of frag_now in dot_frag when setting
504 dot_value.
505 * read.c (emit_expr): Likewise. Delete comments.
506
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5072013-03-07 H.J. Lu <hongjiu.lu@intel.com>
508
509 * config/tc-i386.c (flag_code_names): Removed.
510 (i386_index_check): Rewrote.
511
62b0d0d5
YZ
5122013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
513
514 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
515 add comment.
516 (aarch64_double_precision_fmovable): New function.
517 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
518 function; handle hexadecimal representation of IEEE754 encoding.
519 (parse_operands): Update the call to parse_aarch64_imm_float.
520
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5212013-02-28 H.J. Lu <hongjiu.lu@intel.com>
522
523 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
524 (check_hle): Updated.
525 (md_assemble): Likewise.
526 (parse_insn): Likewise.
527
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5282013-02-28 H.J. Lu <hongjiu.lu@intel.com>
529
530 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 531 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
532 (parse_insn): Remove expecting_string_instruction. Set
533 i.rep_prefix.
534
e60bb1dd
YZ
5352013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
536
537 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
538
aeebdd9b
YZ
5392013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
540
541 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
542 for system registers.
543
4107ae22
DD
5442013-02-27 DJ Delorie <dj@redhat.com>
545
546 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
547 (rl78_op): Handle %code().
548 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
549 (tc_gen_reloc): Likwise; convert to a computed reloc.
550 (md_apply_fix): Likewise.
551
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5522013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
553
554 * config/rl78-parse.y: Fix encoding of DIVWU insn.
555
70a8bc5b 5562013-02-25 Terry Guo <terry.guo@arm.com>
557
558 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
559 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
560 list of accepted CPUs.
561
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5622013-02-19 H.J. Lu <hongjiu.lu@intel.com>
563
564 PR gas/15159
565 * config/tc-i386.c (cpu_arch): Add ".smap".
566
567 * doc/c-i386.texi: Document smap.
568
8a75745d
MR
5692013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
570
571 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
572 mips_assembling_insn appropriately.
573 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
574
79850f26
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5752013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
576
cf29fc61 577 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
578 extraneous braces.
579
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5802013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
581
5c111e37 582 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 583
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NC
5842013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
585
586 * configure.tgt: Add nios2-*-rtems*.
587
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5882013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
589
590 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
591 NULL.
592
0aa27725
RS
5932013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
594
595 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
596 (macro): Use it. Assert that trunc.w.s is not used for r5900.
597
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5982013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
599
600 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
601 core.
602
36591ba1 6032013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 604 Andrew Jenner <andrew@codesourcery.com>
36591ba1
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605
606 Based on patches from Altera Corporation.
607
608 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
609 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
610 * Makefile.in: Regenerated.
611 * configure.tgt: Add case for nios2*-linux*.
612 * config/obj-elf.c: Conditionally include elf/nios2.h.
613 * config/tc-nios2.c: New file.
614 * config/tc-nios2.h: New file.
615 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
616 * doc/Makefile.in: Regenerated.
617 * doc/all.texi: Set NIOSII.
618 * doc/as.texinfo (Overview): Add Nios II options.
619 (Machine Dependencies): Include c-nios2.texi.
620 * doc/c-nios2.texi: New file.
621 * NEWS: Note Altera Nios II support.
622
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6232013-02-06 Alan Modra <amodra@gmail.com>
624
625 PR gas/14255
626 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
627 Don't skip fixups with fx_subsy non-NULL.
628 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
629 with fx_subsy non-NULL.
630
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6312013-02-04 H.J. Lu <hongjiu.lu@intel.com>
632
633 * doc/c-metag.texi: Add "@c man" markers.
634
89d67ed9
AM
6352013-02-04 Alan Modra <amodra@gmail.com>
636
637 * write.c (fixup_segment): Return void. Delete seg_reloc_count
638 related code.
639 (TC_ADJUST_RELOC_COUNT): Delete.
640 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
641
89072bd6
AM
6422013-02-04 Alan Modra <amodra@gmail.com>
643
644 * po/POTFILES.in: Regenerate.
645
f9b2d544
NC
6462013-01-30 Markos Chandras <markos.chandras@imgtec.com>
647
648 * config/tc-metag.c: Make SWAP instruction less permissive with
649 its operands.
650
392ca752
DD
6512013-01-29 DJ Delorie <dj@redhat.com>
652
653 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
654 relocs in .word/.etc statements.
655
427d0db6
RM
6562013-01-29 Roland McGrath <mcgrathr@google.com>
657
658 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
659 immediate value for 8-bit offset" error so it shows line info.
660
4faf939a
JM
6612013-01-24 Joseph Myers <joseph@codesourcery.com>
662
663 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
664 for 64-bit output.
665
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NC
6662013-01-24 Nick Clifton <nickc@redhat.com>
667
668 * config/tc-v850.c: Add support for e3v5 architecture.
669 * doc/c-v850.texi: Mention new support.
670
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6712013-01-23 Nick Clifton <nickc@redhat.com>
672
673 PR gas/15039
674 * config/tc-avr.c: Include dwarf2dbg.h.
675
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6762013-01-18 H.J. Lu <hongjiu.lu@intel.com>
677
678 * config/tc-i386.c (reloc): Support size relocation only for ELF.
679 (tc_i386_fix_adjustable): Likewise.
680 (lex_got): Likewise.
681 (tc_gen_reloc): Likewise.
682
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6832013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
684
685 * config/tc-aarch64.c (output_operand_error_record): Change to output
686 the out-of-range error message as value-expected message if there is
687 only one single value in the expected range.
688 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
689 LSL #0 as a programmer-friendly feature.
690
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6912013-01-16 H.J. Lu <hongjiu.lu@intel.com>
692
693 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
694 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
695 BFD_RELOC_64_SIZE relocations.
696 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
697 for it.
698 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
699 relocations against local symbols.
700
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AM
7012013-01-16 Alan Modra <amodra@gmail.com>
702
703 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
704 finding some sort of toc syntax error, and break to avoid
705 compiler uninit warning.
706
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7072013-01-15 H.J. Lu <hongjiu.lu@intel.com>
708
709 PR gas/15019
710 * config/tc-i386.c (lex_got): Increment length by 1 if the
711 relocation token is removed.
712
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7132013-01-15 Nick Clifton <nickc@redhat.com>
714
715 * config/tc-v850.c (md_assemble): Allow signed values for
716 V850E_IMMEDIATE.
717
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7182013-01-11 Sean Keys <skeys@ipdatasys.com>
719
720 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 721 git to cvs.
464e3686 722
5817ffd1
PB
7232013-01-10 Peter Bergner <bergner@vnet.ibm.com>
724
725 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
726 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
727 * config/tc-ppc.c (md_show_usage): Likewise.
728 (ppc_handle_align): Handle power8's group ending nop.
729
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SK
7302013-01-10 Sean Keys <skeys@ipdatasys.com>
731
732 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 733 that the assember exits after the opcodes have been printed.
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7352013-01-10 H.J. Lu <hongjiu.lu@intel.com>
736
737 * app.c: Remove trailing white spaces.
738 * as.c: Likewise.
739 * as.h: Likewise.
740 * cond.c: Likewise.
741 * dw2gencfi.c: Likewise.
742 * dwarf2dbg.h: Likewise.
743 * ecoff.c: Likewise.
744 * input-file.c: Likewise.
745 * itbl-lex.h: Likewise.
746 * output-file.c: Likewise.
747 * read.c: Likewise.
748 * sb.c: Likewise.
749 * subsegs.c: Likewise.
750 * symbols.c: Likewise.
751 * write.c: Likewise.
752 * config/tc-i386.c: Likewise.
753 * doc/Makefile.am: Likewise.
754 * doc/Makefile.in: Likewise.
755 * doc/c-aarch64.texi: Likewise.
756 * doc/c-alpha.texi: Likewise.
757 * doc/c-arc.texi: Likewise.
758 * doc/c-arm.texi: Likewise.
759 * doc/c-avr.texi: Likewise.
760 * doc/c-bfin.texi: Likewise.
761 * doc/c-cr16.texi: Likewise.
762 * doc/c-d10v.texi: Likewise.
763 * doc/c-d30v.texi: Likewise.
764 * doc/c-h8300.texi: Likewise.
765 * doc/c-hppa.texi: Likewise.
766 * doc/c-i370.texi: Likewise.
767 * doc/c-i386.texi: Likewise.
768 * doc/c-i860.texi: Likewise.
769 * doc/c-m32c.texi: Likewise.
770 * doc/c-m32r.texi: Likewise.
771 * doc/c-m68hc11.texi: Likewise.
772 * doc/c-m68k.texi: Likewise.
773 * doc/c-microblaze.texi: Likewise.
774 * doc/c-mips.texi: Likewise.
775 * doc/c-msp430.texi: Likewise.
776 * doc/c-mt.texi: Likewise.
777 * doc/c-s390.texi: Likewise.
778 * doc/c-score.texi: Likewise.
779 * doc/c-sh.texi: Likewise.
780 * doc/c-sh64.texi: Likewise.
781 * doc/c-tic54x.texi: Likewise.
782 * doc/c-tic6x.texi: Likewise.
783 * doc/c-v850.texi: Likewise.
784 * doc/c-xc16x.texi: Likewise.
785 * doc/c-xgate.texi: Likewise.
786 * doc/c-xtensa.texi: Likewise.
787 * doc/c-z80.texi: Likewise.
788 * doc/internals.texi: Likewise.
789
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7902013-01-10 Roland McGrath <mcgrathr@google.com>
791
792 * hash.c (hash_new_sized): Make it global.
793 * hash.h: Declare it.
794 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
795 pass a small size.
796
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7972013-01-10 Will Newton <will.newton@imgtec.com>
798
799 * Makefile.am: Add Meta.
800 * Makefile.in: Regenerate.
801 * config/tc-metag.c: New file.
802 * config/tc-metag.h: New file.
803 * configure.tgt: Add Meta.
804 * doc/Makefile.am: Add Meta.
805 * doc/Makefile.in: Regenerate.
806 * doc/all.texi: Add Meta.
807 * doc/as.texiinfo: Document Meta options.
808 * doc/c-metag.texi: New file.
809
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SE
8102013-01-09 Steve Ellcey <sellcey@mips.com>
811
812 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
813 calls.
814 * config/tc-mips.c (internalError): Remove, replace with abort.
815
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8162013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
817
818 * config/tc-aarch64.c (parse_operands): Change to compare the result
819 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
820
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8212013-01-07 Nick Clifton <nickc@redhat.com>
822
823 PR gas/14887
824 * config/tc-arm.c (skip_past_char): Skip whitespace before the
825 anticipated character.
826 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
827 here as it is no longer needed.
828
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AS
8292013-01-06 Andreas Schwab <schwab@linux-m68k.org>
830
831 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
832 * doc/c-score.texi (SCORE-Opts): Likewise.
833 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
834
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8352013-01-04 Juergen Urban <JuergenUrban@gmx.de>
836
837 * config/tc-mips.c: Add support for MIPS r5900.
838 Add M_LQ_AB and M_SQ_AB to support large values for instructions
839 lq and sq.
840 (can_swap_branch_p, get_append_method): Detect some conditional
841 short loops to fix a bug on the r5900 by NOP in the branch delay
842 slot.
843 (M_MUL): Support 3 operands in multu on r5900.
844 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
845 (s_mipsset): Force 32 bit floating point on r5900.
846 (mips_ip): Check parameter range of instructions mfps and mtps on
847 r5900.
848 * configure.in: Detect CPU type when target string contains r5900
849 (e.g. mips64r5900el-linux-gnu).
850
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8512013-01-02 H.J. Lu <hongjiu.lu@intel.com>
852
853 * as.c (parse_args): Update copyright year to 2013.
854
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8552013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
856
857 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
858 and "cortex57".
859
517bb291 8602013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 861
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862 PR gas/14987
863 * config/tc-arm.c (parse_address_main): Skip whitespace before a
864 closing bracket.
d709e4e6 865
517bb291 866For older changes see ChangeLog-2012
08d56133 867\f
517bb291 868Copyright (C) 2013 Free Software Foundation, Inc.
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869
870Copying and distribution of this file, with or without modification,
871are permitted in any medium without royalty provided the copyright
872notice and this notice are preserved.
873
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874Local Variables:
875mode: change-log
876left-margin: 8
877fill-column: 74
878version-control: never
879End: