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12013-08-23 Will Newton <will.newton@linaro.org>
2
3 * config/tc-arm.c (do_neon_ldx_stx): Add extra constraints
4 for pre-indexed addressing modes.
5
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62013-08-21 Alan Modra <amodra@gmail.com>
7
8 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
9 range check label number for use with fb_low_counter array.
10
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112013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
12
13 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
14 (mips_parse_argument_token, validate_micromips_insn, md_begin)
15 (check_regno, match_float_constant, check_completed_insn, append_insn)
16 (match_insn, match_mips16_insn, match_insns, macro_start)
17 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
18 (mips16_ip, mips_set_option_string, md_parse_option)
19 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
20 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
21 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
22 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
23 Start error messages with a lower-case letter. Do not end error
24 messages with a period. Wrap long messages to 80 character-lines.
25 Use "cannot" instead of "can't" and "can not".
26
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272013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
28
29 * config/tc-mips.c (imm_expr): Expand comment.
30 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
31 when populated.
32
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332013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
34
35 * config/tc-mips.c (imm2_expr): Delete.
36 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
37
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382013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
39
40 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
41 (macro): Remove M_DEXT and M_DINS handling.
42
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432013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
44
45 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
46 lax_max with lax_match.
47 (match_int_operand): Update accordingly. Don't report an error
48 for !lax_match-only cases.
49 (match_insn): Replace more_alts with lax_match and use it to
50 initialize the mips_arg_info field. Add a complete_p parameter.
51 Handle implicit VU0 suffixes here.
52 (match_invalid_for_isa, match_insns, match_mips16_insns): New
53 functions.
54 (mips_ip, mips16_ip): Use them.
55
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562013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
57
58 * config/tc-mips.c (match_expression): Report uses of registers here.
59 Add a "must be an immediate expression" error. Handle elided offsets
60 here rather than...
61 (match_int_operand): ...here.
62
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632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
64
65 * config/tc-mips.c (mips_arg_info): Remove soft_match.
66 (match_out_of_range, match_not_constant): New functions.
67 (match_const_int): Remove fallback parameter and check for soft_match.
68 Use match_not_constant.
69 (match_mapped_int_operand, match_addiusp_operand)
70 (match_perf_reg_operand, match_save_restore_list_operand)
71 (match_mdmx_imm_reg_operand): Update accordingly. Use
72 match_out_of_range and set_insn_error* instead of as_bad.
73 (match_int_operand): Likewise. Use match_not_constant in the
74 !allows_nonconst case.
75 (match_float_constant): Report invalid float constants.
76 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
77 match_float_constant to check for invalid constants. Fail the
78 match if match_const_int or match_float_constant return false.
79 (mips_ip): Update accordingly.
80 (mips16_ip): Likewise. Undo null termination of instruction name
81 once lookup is complete.
82
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832013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
84
85 * config/tc-mips.c (mips_insn_error_format): New enum.
86 (mips_insn_error): New struct.
87 (insn_error): Change to a mips_insn_error.
88 (clear_insn_error, set_insn_error_format, set_insn_error)
89 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
90 functions.
91 (mips_parse_argument_token, md_assemble, match_insn)
92 (match_mips16_insn): Use them instead of manipulating insn_error
93 directly.
94 (mips_ip, mips16_ip): Likewise. Simplify control flow.
95
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962013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (normalize_constant_expr): Move further up file.
99 (normalize_address_expr): Likewise.
100 (match_insn, match_mips16_insn): New functions, split out from...
101 (mips_ip, mips16_ip): ...here.
102
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1032013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
104
105 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
106 OP_OPTIONAL_REG.
107 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
108 for optional operands.
109
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1102013-08-16 Alan Modra <amodra@gmail.com>
111
112 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
113 modifiers generally.
114
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1152013-08-16 Alan Modra <amodra@gmail.com>
116
117 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
118
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1192013-08-14 David Edelsohn <dje.gcc@gmail.com>
120
121 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
122 argument as alignment.
123
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1242013-08-09 Nick Clifton <nickc@redhat.com>
125
126 * config/tc-rl78.c (elf_flags): New variable.
127 (enum options): Add OPTION_G10.
128 (md_longopts): Add mg10.
129 (md_parse_option): Parse -mg10.
130 (rl78_elf_final_processing): New function.
131 * config/tc-rl78.c (tc_final_processing): Define.
132 * doc/c-rl78.texi: Document -mg10 option.
133
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1342013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
135
136 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
137 suffixes to be elided too.
138 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
139 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
140 to be omitted too.
141
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1422013-08-05 John Tytgat <john@bass-software.com>
143
144 * po/POTFILES.in: Regenerate.
145
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1462013-08-05 Eric Botcazou <ebotcazou@adacore.com>
147 Konrad Eisele <konrad@gaisler.com>
148
149 * config/tc-sparc.c (sparc_arch_types): Add leon.
150 (sparc_arch): Move sparc4 around and add leon.
151 (sparc_target_format): Document -Aleon.
152 * doc/c-sparc.texi: Likewise.
153
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1542013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
155
156 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
157
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1582013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
159 Richard Sandiford <rdsandiford@googlemail.com>
160
161 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
162 (RWARN): Bump to 0x8000000.
163 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
164 (RTYPE_R5900_ACC): New register types.
165 (RTYPE_MASK): Include them.
166 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
167 macros.
168 (reg_names): Include them.
169 (mips_parse_register_1): New function, split out from...
170 (mips_parse_register): ...here. Add a channels_ptr parameter.
171 Look for VU0 channel suffixes when nonnull.
172 (reg_lookup): Update the call to mips_parse_register.
173 (mips_parse_vu0_channels): New function.
174 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
175 (mips_operand_token): Add a "channels" field to the union.
176 Extend the comment above "ch" to OT_DOUBLE_CHAR.
177 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
178 (mips_parse_argument_token): Handle channel suffixes here too.
179 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
180 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
181 Handle '#' formats.
182 (md_begin): Register $vfN and $vfI registers.
183 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
184 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
185 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
186 (match_vu0_suffix_operand): New function.
187 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
188 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
189 (mips_lookup_insn): New function.
190 (mips_ip): Use it. Allow "+K" operands to be elided at the end
191 of an instruction. Handle '#' sequences.
192
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1932013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
194
195 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
196 values and use it instead of sreg, treg, xreg, etc.
197
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1982013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
199
200 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
201 and mips_int_operand_max.
202 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
203 Delete.
204 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
205 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
206 instead of mips16_immed_operand.
207
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2082013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c (mips16_macro): Don't use move_register.
211 (mips16_ip): Allow macros to use 'p'.
212
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2132013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
214
215 * config/tc-mips.c (MAX_OPERANDS): New macro.
216 (mips_operand_array): New structure.
217 (mips_operands, mips16_operands, micromips_operands): New arrays.
218 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
219 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
220 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
221 (micromips_to_32_reg_q_map): Delete.
222 (insn_operands, insn_opno, insn_extract_operand): New functions.
223 (validate_mips_insn): Take a mips_operand_array as argument and
224 use it to build up a list of operands. Extend to handle INSN_MACRO
225 and MIPS16.
226 (validate_mips16_insn): New function.
227 (validate_micromips_insn): Take a mips_operand_array as argument.
228 Handle INSN_MACRO.
229 (md_begin): Initialize mips_operands, mips16_operands and
230 micromips_operands. Call validate_mips_insn and
231 validate_micromips_insn for macro instructions too.
232 Call validate_mips16_insn for MIPS16 instructions.
233 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
234 New functions.
235 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
236 them. Handle INSN_UDI.
237 (get_append_method): Use gpr_read_mask.
238
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2392013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
242 flags for MIPS16 and non-MIPS16 instructions.
243 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
244 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
245 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
246 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
247 and non-MIPS16 instructions. Fix formatting.
248
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2492013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * config/tc-mips.c (reg_needs_delay): Move later in file.
252 Use gpr_write_mask.
253 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
254
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2552013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
256 Alexander Ivchenko <alexander.ivchenko@intel.com>
257 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
258 Sergey Lega <sergey.s.lega@intel.com>
259 Anna Tikhonova <anna.tikhonova@intel.com>
260 Ilya Tocar <ilya.tocar@intel.com>
261 Andrey Turetskiy <andrey.turetskiy@intel.com>
262 Ilya Verbin <ilya.verbin@intel.com>
263 Kirill Yukhin <kirill.yukhin@intel.com>
264 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
265
266 * config/tc-i386-intel.c (O_zmmword_ptr): New.
267 (i386_types): Add zmmword.
268 (i386_intel_simplify_register): Allow regzmm.
269 (i386_intel_simplify): Handle zmmwords.
270 (i386_intel_operand): Handle RC/SAE, vector operations and
271 zmmwords.
272 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
273 (struct RC_Operation): New.
274 (struct Mask_Operation): New.
275 (struct Broadcast_Operation): New.
276 (vex_prefix): Size of bytes increased to 4 to support EVEX
277 encoding.
278 (enum i386_error): Add new error codes: unsupported_broadcast,
279 broadcast_not_on_src_operand, broadcast_needed,
280 unsupported_masking, mask_not_on_destination, no_default_mask,
281 unsupported_rc_sae, rc_sae_operand_not_last_imm,
282 invalid_register_operand, try_vector_disp8.
283 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
284 rounding, broadcast, memshift.
285 (struct RC_name): New.
286 (RC_NamesTable): New.
287 (evexlig): New.
288 (evexwig): New.
289 (extra_symbol_chars): Add '{'.
290 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
291 (i386_operand_type): Add regzmm, regmask and vec_disp8.
292 (match_mem_size): Handle zmmwords.
293 (operand_type_match): Handle zmm-registers.
294 (mode_from_disp_size): Handle vec_disp8.
295 (fits_in_vec_disp8): New.
296 (md_begin): Handle {} properly.
297 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
298 (build_vex_prefix): Handle vrex.
299 (build_evex_prefix): New.
300 (process_immext): Adjust to properly handle EVEX.
301 (md_assemble): Add EVEX encoding support.
302 (swap_2_operands): Correctly handle operands with masking,
303 broadcasting or RC/SAE.
304 (check_VecOperands): Support EVEX features.
305 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
306 (match_template): Support regzmm and handle new error codes.
307 (process_suffix): Handle zmmwords and zmm-registers.
308 (check_byte_reg): Extend to zmm-registers.
309 (process_operands): Extend to zmm-registers.
310 (build_modrm_byte): Handle EVEX.
311 (output_insn): Adjust to properly handle EVEX case.
312 (disp_size): Handle vec_disp8.
313 (output_disp): Support compressed disp8*N evex feature.
314 (output_imm): Handle RC/SAE immediates properly.
315 (check_VecOperations): New.
316 (i386_immediate): Handle EVEX features.
317 (i386_index_check): Handle zmmwords and zmm-registers.
318 (RC_SAE_immediate): New.
319 (i386_att_operand): Handle EVEX features.
320 (parse_real_register): Add a check for ZMM/Mask registers.
321 (OPTION_MEVEXLIG): New.
322 (OPTION_MEVEXWIG): New.
323 (md_longopts): Add mevexlig and mevexwig.
324 (md_parse_option): Handle mevexlig and mevexwig options.
325 (md_show_usage): Add description for mevexlig and mevexwig.
326 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
327 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
328
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3292013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
330
331 * config/tc-i386.c (cpu_arch): Add .sha.
332 * doc/c-i386.texi: Document sha/.sha.
333
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3342013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
335 Kirill Yukhin <kirill.yukhin@intel.com>
336 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
337
338 * config/tc-i386.c (BND_PREFIX): New.
339 (struct _i386_insn): Add new field bnd_prefix.
340 (add_bnd_prefix): New.
341 (cpu_arch): Add MPX.
342 (i386_operand_type): Add regbnd.
343 (md_assemble): Handle BND prefixes.
344 (parse_insn): Likewise.
345 (output_branch): Likewise.
346 (output_jump): Likewise.
347 (build_modrm_byte): Handle regbnd.
348 (OPTION_MADD_BND_PREFIX): New.
349 (md_longopts): Add entry for 'madd-bnd-prefix'.
350 (md_parse_option): Handle madd-bnd-prefix option.
351 (md_show_usage): Add description for madd-bnd-prefix
352 option.
353 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
354
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3552013-07-24 Tristan Gingold <gingold@adacore.com>
356
357 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
358 xcoff targets.
359
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3602013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
361
362 * config/tc-s390.c (s390_machine): Don't force the .machine
363 argument to lower case.
364
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3652013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
366
367 * config/tc-arm.c (s_arm_arch_extension): Improve error message
368 for invalid extension.
369
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3702013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
371
372 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
373 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
374 (aarch64_abi): New variable.
375 (ilp32_p): Change to be a macro.
376 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
377 (struct aarch64_option_abi_value_table): New struct.
378 (aarch64_abis): New table.
379 (aarch64_parse_abi): New function.
380 (aarch64_long_opts): Add entry for -mabi=.
381 * doc/as.texinfo (Target AArch64 options): Document -mabi.
382 * doc/c-aarch64.texi: Likewise.
383
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3842013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
385
386 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
387 unsigned comparison.
388
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3892013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
390
cbe02d4f 391 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 392 RX610.
cbe02d4f 393 * config/rx-parse.y: (rx_check_float_support): Add function to
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394 check floating point operation support for target RX100 and
395 RX200.
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396 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
397 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
398 RX200, RX600, and RX610
f0c00282 399
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4002013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
401
402 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
403
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4042013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
405
406 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
407 * doc/c-avr.texi: Likewise.
408
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4092013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
410
411 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
412 error with older GCCs.
413 (mips16_macro_build): Dereference args.
414
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4152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
416
417 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
418 New functions, split out from...
419 (reg_lookup): ...here. Remove itbl support.
420 (reglist_lookup): Delete.
421 (mips_operand_token_type): New enum.
422 (mips_operand_token): New structure.
423 (mips_operand_tokens): New variable.
424 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
425 (mips_parse_arguments): New functions.
426 (md_begin): Initialize mips_operand_tokens.
427 (mips_arg_info): Add a token field. Remove optional_reg field.
428 (match_char, match_expression): New functions.
429 (match_const_int): Use match_expression. Remove "s" argument
430 and return a boolean result. Remove O_register handling.
431 (match_regno, match_reg, match_reg_range): New functions.
432 (match_int_operand, match_mapped_int_operand, match_msb_operand)
433 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
434 (match_addiusp_operand, match_clo_clz_dest_operand)
435 (match_lwm_swm_list_operand, match_entry_exit_operand)
436 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
437 (match_tied_reg_operand): Remove "s" argument and return a boolean
438 result. Match tokens rather than text. Update calls to
439 match_const_int. Rely on match_regno to call check_regno.
440 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
441 "arg" argument. Return a boolean result.
442 (parse_float_constant): Replace with...
443 (match_float_constant): ...this new function.
444 (match_operand): Remove "s" argument and return a boolean result.
445 Update calls to subfunctions.
446 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
447 rather than string-parsing routines. Update handling of optional
448 registers for token scheme.
449
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4502013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
451
452 * config/tc-mips.c (parse_float_constant): Split out from...
453 (mips_ip): ...here.
454
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RS
4552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
456
457 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
458 Delete.
459
364215c8
RS
4602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
461
462 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
463 (match_entry_exit_operand): New function.
464 (match_save_restore_list_operand): Likewise.
465 (match_operand): Use them.
466 (check_absolute_expr): Delete.
467 (mips16_ip): Rewrite main parsing loop to use mips_operands.
468
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RS
4692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
470
471 * config/tc-mips.c: Enable functions commented out in previous patch.
472 (SKIP_SPACE_TABS): Move further up file.
473 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
474 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
475 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
476 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
477 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
478 (micromips_imm_b_map, micromips_imm_c_map): Delete.
479 (mips_lookup_reg_pair): Delete.
480 (macro): Use report_bad_range and report_bad_field.
481 (mips_immed, expr_const_in_range): Delete.
482 (mips_ip): Rewrite main parsing loop to use new functions.
483
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RS
4842013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
487 Change return type to bfd_boolean.
488 (report_bad_range, report_bad_field): New functions.
489 (mips_arg_info): New structure.
490 (match_const_int, convert_reg_type, check_regno, match_int_operand)
491 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
492 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
493 (match_addiusp_operand, match_clo_clz_dest_operand)
494 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
495 (match_pc_operand, match_tied_reg_operand, match_operand)
496 (check_completed_insn): New functions, commented out for now.
497
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RS
4982013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
499
500 * config/tc-mips.c (insn_insert_operand): New function.
501 (macro_build, mips16_macro_build): Put null character check
502 in the for loop and convert continues to breaks. Use operand
503 structures to handle constant operands.
504
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RS
5052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
506
507 * config/tc-mips.c (validate_mips_insn): Move further up file.
508 Add insn_bits and decode_operand arguments. Use the mips_operand
509 fields to work out which bits an operand occupies. Detect double
510 definitions.
511 (validate_micromips_insn): Move further up file. Call into
512 validate_mips_insn.
513
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RS
5142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
515
516 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
517
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RS
5182013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
519
520 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
521 and "~".
522 (macro): Update accordingly.
523
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RS
5242013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
525
526 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
527 (imm_reloc): Delete.
528 (md_assemble): Remove imm_reloc handling.
529 (mips_ip): Update commentary. Use offset_expr and offset_reloc
530 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
531 Use a temporary array rather than imm_reloc when parsing
532 constant expressions. Remove imm_reloc initialization.
533 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
534 for the relaxable field. Use a relax_char variable to track the
535 type of this field. Remove imm_reloc initialization.
536
cc537e56
RS
5372013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
538
539 * config/tc-mips.c (mips16_ip): Handle "I".
540
ba92f887
MR
5412013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
542
543 * config/tc-mips.c (mips_flag_nan2008): New variable.
544 (options): Add OPTION_NAN enum value.
545 (md_longopts): Handle it.
546 (md_parse_option): Likewise.
547 (s_nan): New function.
548 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
549 (md_show_usage): Add -mnan.
550
551 * doc/as.texinfo (Overview): Add -mnan.
552 * doc/c-mips.texi (MIPS Opts): Document -mnan.
553 (MIPS NaN Encodings): New node. Document .nan directive.
554 (MIPS-Dependent): List the new node.
555
c1094734
TG
5562013-07-09 Tristan Gingold <gingold@adacore.com>
557
558 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
559
0cbbe1b8
RS
5602013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
561
562 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
563 for 'A' and assume that the constant has been elided if the result
564 is an O_register.
565
f2ae14a1
RS
5662013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
567
568 * config/tc-mips.c (gprel16_reloc_p): New function.
569 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
570 BFD_RELOC_UNUSED.
571 (offset_high_part, small_offset_p): New functions.
572 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
573 register load and store macros, handle the 16-bit offset case first.
574 If a 16-bit offset is not suitable for the instruction we're
575 generating, load it into the temporary register using
576 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
577 M_L_DAB code once the address has been constructed. For double load
578 and store macros, again handle the 16-bit offset case first.
579 If the second register cannot be accessed from the same high
580 part as the first, load it into AT using ADDRESS_ADDI_INSN.
581 Fix the handling of LD in cases where the first register is the
582 same as the base. Also handle the case where the offset is
583 not 16 bits and the second register cannot be accessed from the
584 same high part as the first. For unaligned loads and stores,
585 fuse the offbits == 12 and old "ab" handling. Apply this handling
586 whenever the second offset needs a different high part from the first.
587 Construct the offset using ADDRESS_ADDI_INSN where possible,
588 for offbits == 16 as well as offbits == 12. Use offset_reloc
589 when constructing the individual loads and stores.
590 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
591 and offset_reloc before matching against a particular opcode.
592 Handle elided 'A' constants. Allow 'A' constants to use
593 relocation operators.
594
5c324c16
RS
5952013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
596
597 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
598 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
599 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
600
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RS
6012013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
602
603 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
604 Require the msb to be <= 31 for "+s". Check that the size is <= 31
605 for both "+s" and "+S".
606
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RS
6072013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
608
609 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
610 (mips_ip, mips16_ip): Handle "+i".
611
e76ff5ab
RS
6122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
613
614 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
615 (micromips_to_32_reg_h_map): Rename to...
616 (micromips_to_32_reg_h_map1): ...this.
617 (micromips_to_32_reg_i_map): Rename to...
618 (micromips_to_32_reg_h_map2): ...this.
619 (mips_lookup_reg_pair): New function.
620 (gpr_write_mask, macro): Adjust after above renaming.
621 (validate_micromips_insn): Remove "mi" handling.
622 (mips_ip): Likewise. Parse both registers in a pair for "mh".
623
fa7616a4
RS
6242013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
625
626 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
627 (mips_ip): Remove "+D" and "+T" handling.
628
fb798c50
AK
6292013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
630
631 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
632 relocs.
633
2c0a3565
MS
6342013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
635
4aa2c5e2
MS
636 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
637
6382013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
639
2c0a3565
MS
640 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
641 (aarch64_force_relocation): Likewise.
642
f40da81b
AM
6432013-07-02 Alan Modra <amodra@gmail.com>
644
645 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
646
81566a9b
MR
6472013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
648
649 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
650 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
651 Replace @sc{mips16} with literal `MIPS16'.
652 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
653
a6bb11b2
YZ
6542013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
655
656 * config/tc-aarch64.c (reloc_table): Replace
657 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
658 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
659 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
660 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
661 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
662 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
663 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
664 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
665 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
666 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
667 (aarch64_force_relocation): Likewise.
668
cec5225b
YZ
6692013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
670
671 * config/tc-aarch64.c (ilp32_p): New static variable.
672 (elf64_aarch64_target_format): Return the target according to the
673 value of 'ilp32_p'.
674 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
675 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
676 (aarch64_dwarf2_addr_size): New function.
677 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
678 (DWARF2_ADDR_SIZE): New define.
679
e335d9cb
RS
6802013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
683
18870af7
RS
6842013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
685
686 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
687
833794fc
MR
6882013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
689
690 * config/tc-mips.c (mips_set_options): Add insn32 member.
691 (mips_opts): Initialize it.
692 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
693 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
694 (md_longopts): Add "minsn32" and "mno-insn32" options.
695 (is_size_valid): Handle insn32 mode.
696 (md_assemble): Pass instruction string down to macro.
697 (brk_fmt): Add second dimension and insn32 mode initializers.
698 (mfhl_fmt): Likewise.
699 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
700 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
701 (macro_build_jalr, move_register): Handle insn32 mode.
702 (macro_build_branch_rs): Likewise.
703 (macro): Handle insn32 mode.
704 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
705 (mips_ip): Handle insn32 mode.
706 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
707 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
708 (mips_handle_align): Handle insn32 mode.
709 (md_show_usage): Add -minsn32 and -mno-insn32.
710
711 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
712 -mno-insn32 options.
713 (-minsn32, -mno-insn32): New options.
714 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
715 options.
716 (MIPS assembly options): New node. Document .set insn32 and
717 .set noinsn32.
718 (MIPS-Dependent): List the new node.
719
d1706f38
NC
7202013-06-25 Nick Clifton <nickc@redhat.com>
721
722 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
723 the PC in indirect addressing on 430xv2 parts.
724 (msp430_operands): Add version test to hardware bug encoding
725 restrictions.
726
477330fc
RM
7272013-06-24 Roland McGrath <mcgrathr@google.com>
728
d996d970
RM
729 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
730 so it skips whitespace before it.
731 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
732
477330fc
RM
733 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
734 (arm_reg_parse_multi): Skip whitespace first.
735 (parse_reg_list): Likewise.
736 (parse_vfp_reg_list): Likewise.
737 (s_arm_unwind_save_mmxwcg): Likewise.
738
24382199
NC
7392013-06-24 Nick Clifton <nickc@redhat.com>
740
741 PR gas/15623
742 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
743
c3678916
RS
7442013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
747
42429eac
RS
7482013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
749
750 * config/tc-mips.c: Assert that offsetT and valueT are at least
751 8 bytes in size.
752 (GPR_SMIN, GPR_SMAX): New macros.
753 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
754
f3ded42a
RS
7552013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
756
757 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
758 conditions. Remove any code deselected by them.
759 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
760
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RS
7612013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
762
763 * NEWS: Note removal of ECOFF support.
764 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
765 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
766 (MULTI_CFILES): Remove config/e-mipsecoff.c.
767 * Makefile.in: Regenerate.
768 * configure.in: Remove MIPS ECOFF references.
769 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
770 Delete cases.
771 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
772 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
773 (mips-*-*): ...this single case.
774 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
775 MIPS emulations to be e-mipself*.
776 * configure: Regenerate.
777 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
778 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
779 (mips-*-sysv*): Remove coff and ecoff cases.
780 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
781 * ecoff.c: Remove reference to MIPS ECOFF.
782 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
783 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
784 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
785 (mips_hi_fixup): Tweak comment.
786 (append_insn): Require a howto.
787 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
788
98508b2a
RS
7892013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
790
791 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
792 Use "CPU" instead of "cpu".
793 * doc/c-mips.texi: Likewise.
794 (MIPS Opts): Rename to MIPS Options.
795 (MIPS option stack): Rename to MIPS Option Stack.
796 (MIPS ASE instruction generation overrides): Rename to
797 MIPS ASE Instruction Generation Overrides (for now).
798 (MIPS floating-point): Rename to MIPS Floating-Point.
799
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RS
8002013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
801
802 * doc/c-mips.texi (MIPS Macros): New section.
803 (MIPS Object): Replace with...
804 (MIPS Small Data): ...this new section.
805
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RS
8062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
807
808 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
809 Capitalize name. Use @kindex instead of @cindex for .set entries.
810
a1b86ab7
RS
8112013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
812
813 * doc/c-mips.texi (MIPS Stabs): Remove section.
814
c6278170
RS
8152013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
816
817 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
818 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
819 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
820 (ISA_SUPPORTS_VIRT64_ASE): Delete.
821 (mips_ase): New structure.
822 (mips_ases): New table.
823 (FP64_ASES): New macro.
824 (mips_ase_groups): New array.
825 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
826 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
827 functions.
828 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
829 (md_parse_option): Use mips_ases and mips_set_ase instead of
830 separate case statements for each ASE option.
831 (mips_after_parse_args): Use FP64_ASES. Use
832 mips_check_isa_supports_ases to check the ASEs against
833 other options.
834 (s_mipsset): Use mips_ases and mips_set_ase instead of
835 separate if statements for each ASE option. Use
836 mips_check_isa_supports_ases, even when a non-ASE option
837 is specified.
838
63a4bc21
KT
8392013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
840
841 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
842
c31f3936
RS
8432013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
844
845 * config/tc-mips.c (md_shortopts, options, md_longopts)
846 (md_longopts_size): Move earlier in file.
847
846ef2d0
RS
8482013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
849
850 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
851 with a single "ase" bitmask.
852 (mips_opts): Update accordingly.
853 (file_ase, file_ase_explicit): New variables.
854 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
855 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
856 (ISA_HAS_ROR): Adjust for mips_set_options change.
857 (is_opcode_valid): Take the base ase mask directly from mips_opts.
858 (mips_ip): Adjust for mips_set_options change.
859 (md_parse_option): Likewise. Update file_ase_explicit.
860 (mips_after_parse_args): Adjust for mips_set_options change.
861 Use bitmask operations to select the default ASEs. Set file_ase
862 rather than individual per-ASE variables.
863 (s_mipsset): Adjust for mips_set_options change.
864 (mips_elf_final_processing): Test file_ase rather than
865 file_ase_mdmx. Remove commented-out code.
866
d16afab6
RS
8672013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
868
869 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
870 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
871 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
872 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
873 (mips_after_parse_args): Use the new "ase" field to choose
874 the default ASEs.
875 (mips_cpu_info_table): Move ASEs from the "flags" field to the
876 "ase" field.
877
e83a675f
RE
8782013-06-18 Richard Earnshaw <rearnsha@arm.com>
879
880 * config/tc-arm.c (symbol_preemptible): New function.
881 (relax_branch): Use it.
882
7f3c4072
CM
8832013-06-17 Catherine Moore <clm@codesourcery.com>
884 Maciej W. Rozycki <macro@codesourcery.com>
885 Chao-Ying Fu <fu@mips.com>
886
887 * config/tc-mips.c (mips_set_options): Add ase_eva.
888 (mips_set_options mips_opts): Add ase_eva.
889 (file_ase_eva): Declare.
890 (ISA_SUPPORTS_EVA_ASE): Define.
891 (IS_SEXT_9BIT_NUM): Define.
892 (MIPS_CPU_ASE_EVA): Define.
893 (is_opcode_valid): Add support for ase_eva.
894 (macro_build): Likewise.
895 (macro): Likewise.
896 (validate_mips_insn): Likewise.
897 (validate_micromips_insn): Likewise.
898 (mips_ip): Likewise.
899 (options): Add OPTION_EVA and OPTION_NO_EVA.
900 (md_longopts): Add -meva and -mno-eva.
901 (md_parse_option): Process new options.
902 (mips_after_parse_args): Check for valid EVA combinations.
903 (s_mipsset): Likewise.
904
e410add4
RS
9052013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
906
907 * dwarf2dbg.h (dwarf2_move_insn): Declare.
908 * dwarf2dbg.c (line_subseg): Add pmove_tail.
909 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
910 (dwarf2_gen_line_info_1): Update call accordingly.
911 (dwarf2_move_insn): New function.
912 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
913
6a50d470
RS
9142013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
915
916 Revert:
917
918 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
919
920 PR gas/13024
921 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
922 (dwarf2_gen_line_info_1): Delete.
923 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
924 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
925 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
926 (dwarf2_directive_loc): Push previous .locs instead of generating
927 them immediately.
928
f122319e
CF
9292013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
930
931 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
932 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
933
909c7f9c
NC
9342013-06-13 Nick Clifton <nickc@redhat.com>
935
936 PR gas/15602
937 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
938 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
939 function. Generates an error if the adjusted offset is out of a
940 16-bit range.
941
5d5755a7
SL
9422013-06-12 Sandra Loosemore <sandra@codesourcery.com>
943
944 * config/tc-nios2.c (md_apply_fix): Mask constant
945 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
946
3bf0dbfb
MR
9472013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
948
949 * config/tc-mips.c (append_insn): Don't do branch relaxation for
950 MIPS-3D instructions either.
951 (md_convert_frag): Update the COPx branch mask accordingly.
952
953 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
954 option.
955 * doc/as.texinfo (Overview): Add --relax-branch and
956 --no-relax-branch.
957 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
958 --no-relax-branch.
959
9daf7bab
SL
9602013-06-09 Sandra Loosemore <sandra@codesourcery.com>
961
962 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
963 omitted.
964
d301a56b
RS
9652013-06-08 Catherine Moore <clm@codesourcery.com>
966
967 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
968 (is_opcode_valid_16): Pass ase value to opcode_is_member.
969 (append_insn): Change INSN_xxxx to ASE_xxxx.
970
7bab7634
DC
9712013-06-01 George Thomas <george.thomas@atmel.com>
972
cbe02d4f 973 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
974 AVR_ISA_XMEGAU
975
f60cf82f
L
9762013-05-31 H.J. Lu <hongjiu.lu@intel.com>
977
978 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
979 for ELF.
980
a3f278e2
CM
9812013-05-31 Paul Brook <paul@codesourcery.com>
982
a3f278e2
CM
983 * config/tc-mips.c (s_ehword): New.
984
067ec077
CM
9852013-05-30 Paul Brook <paul@codesourcery.com>
986
987 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
988
d6101ac2
MR
9892013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
990
991 * write.c (resolve_reloc_expr_symbols): On REL targets don't
992 convert relocs who have no relocatable field either. Rephrase
993 the conditional so that the PC-relative check is only applied
994 for REL targets.
995
f19ccbda
MR
9962013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
997
998 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
999 calculation.
1000
418009c2
YZ
10012013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1002
1003 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1004 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1005 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1006 (md_apply_fix): Likewise.
1007 (aarch64_force_relocation): Likewise.
1008
0a8897c7
KT
10092013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1010
1011 * config/tc-arm.c (it_fsm_post_encode): Improve
1012 warning messages about deprecated IT block formats.
1013
89d2a2a3
MS
10142013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1015
1016 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1017 inside fx_done condition.
1018
c77c0862
RS
10192013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1020
1021 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1022
c0637f3a
PB
10232013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1024
1025 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1026 and clean up warning when using PRINT_OPCODE_TABLE.
1027
5656a981
AM
10282013-05-20 Alan Modra <amodra@gmail.com>
1029
1030 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1031 and data fixups performing shift/high adjust/sign extension on
1032 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1033 when writing data fixups rather than recalculating size.
1034
997b26e8
JBG
10352013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1036
1037 * doc/c-msp430.texi: Fix typo.
1038
9f6e76f4
TG
10392013-05-16 Tristan Gingold <gingold@adacore.com>
1040
1041 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1042 are also TOC symbols.
1043
638d3803
NC
10442013-05-16 Nick Clifton <nickc@redhat.com>
1045
1046 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1047 Add -mcpu command to specify core type.
997b26e8 1048 * doc/c-msp430.texi: Update documentation.
638d3803 1049
b015e599
AP
10502013-05-09 Andrew Pinski <apinski@cavium.com>
1051
1052 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1053 (mips_opts): Update for the new field.
1054 (file_ase_virt): New variable.
1055 (ISA_SUPPORTS_VIRT_ASE): New macro.
1056 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1057 (MIPS_CPU_ASE_VIRT): New define.
1058 (is_opcode_valid): Handle ase_virt.
1059 (macro_build): Handle "+J".
1060 (validate_mips_insn): Likewise.
1061 (mips_ip): Likewise.
1062 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1063 (md_longopts): Add mvirt and mnovirt
1064 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1065 (mips_after_parse_args): Handle ase_virt field.
1066 (s_mipsset): Handle "virt" and "novirt".
1067 (mips_elf_final_processing): Add a comment about virt ASE might need
1068 a new flag.
1069 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1070 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1071 Document ".set virt" and ".set novirt".
1072
da8094d7
AM
10732013-05-09 Alan Modra <amodra@gmail.com>
1074
1075 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1076 control of operand flag bits.
1077
c5f8c205
AM
10782013-05-07 Alan Modra <amodra@gmail.com>
1079
1080 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1081 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1082 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1083 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1084 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1085 Shift and sign-extend fieldval for use by some VLE reloc
1086 operand->insert functions.
1087
b47468a6
CM
10882013-05-06 Paul Brook <paul@codesourcery.com>
1089 Catherine Moore <clm@codesourcery.com>
1090
c5f8c205
AM
1091 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1092 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1093 (md_apply_fix): Likewise.
1094 (tc_gen_reloc): Likewise.
1095
2de39019
CM
10962013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1097
1098 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1099 (mips_fix_adjustable): Adjust pc-relative check to use
1100 limited_pc_reloc_p.
1101
754e2bb9
RS
11022013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1103
1104 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1105 (s_mips_stab): Do not restrict to stabn only.
1106
13761a11
NC
11072013-05-02 Nick Clifton <nickc@redhat.com>
1108
1109 * config/tc-msp430.c: Add support for the MSP430X architecture.
1110 Add code to insert a NOP instruction after any instruction that
1111 might change the interrupt state.
1112 Add support for the LARGE memory model.
1113 Add code to initialise the .MSP430.attributes section.
1114 * config/tc-msp430.h: Add support for the MSP430X architecture.
1115 * doc/c-msp430.texi: Document the new -mL and -mN command line
1116 options.
1117 * NEWS: Mention support for the MSP430X architecture.
1118
df26367c
MR
11192013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1120
1121 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1122 alpha*-*-linux*ecoff*.
1123
f02d8318
CF
11242013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1125
1126 * config/tc-mips.c (mips_ip): Add sizelo.
1127 For "+C", "+G", and "+H", set sizelo and compare against it.
1128
b40bf0a2
NC
11292013-04-29 Nick Clifton <nickc@redhat.com>
1130
1131 * as.c (Options): Add -gdwarf-sections.
1132 (parse_args): Likewise.
1133 * as.h (flag_dwarf_sections): Declare.
1134 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1135 (process_entries): When -gdwarf-sections is enabled generate
1136 fragmentary .debug_line sections.
1137 (out_debug_line): Set the section for the .debug_line section end
1138 symbol.
1139 * doc/as.texinfo: Document -gdwarf-sections.
1140 * NEWS: Mention -gdwarf-sections.
1141
8eeccb77 11422013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1143
1144 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1145 according to the target parameter. Don't call s_segm since s_segm
1146 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1147 initialized yet.
1148 (md_begin): Call s_segm according to target parameter from command
1149 line.
1150
49926cd0
AM
11512013-04-25 Alan Modra <amodra@gmail.com>
1152
1153 * configure.in: Allow little-endian linux.
1154 * configure: Regenerate.
1155
e3031850
SL
11562013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1157
1158 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1159 "fstatus" control register to "eccinj".
1160
cb948fc0
KT
11612013-04-19 Kai Tietz <ktietz@redhat.com>
1162
1163 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1164
4455e9ad
JB
11652013-04-15 Julian Brown <julian@codesourcery.com>
1166
1167 * expr.c (add_to_result, subtract_from_result): Make global.
1168 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1169 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1170 subtract_from_result to handle extra bit of precision for .sleb128
1171 directive operands.
1172
956a6ba3
JB
11732013-04-10 Julian Brown <julian@codesourcery.com>
1174
1175 * read.c (convert_to_bignum): Add sign parameter. Use it
1176 instead of X_unsigned to determine sign of resulting bignum.
1177 (emit_expr): Pass extra argument to convert_to_bignum.
1178 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1179 X_extrabit to convert_to_bignum.
1180 (parse_bitfield_cons): Set X_extrabit.
1181 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1182 Initialise X_extrabit field as appropriate.
1183 (add_to_result): New.
1184 (subtract_from_result): New.
1185 (expr): Use above.
1186 * expr.h (expressionS): Add X_extrabit field.
1187
eb9f3f00
JB
11882013-04-10 Jan Beulich <jbeulich@suse.com>
1189
1190 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1191 register being PC when is_t or writeback, and use distinct
1192 diagnostic for the latter case.
1193
ccb84d65
JB
11942013-04-10 Jan Beulich <jbeulich@suse.com>
1195
1196 * gas/config/tc-arm.c (parse_operands): Re-write
1197 po_barrier_or_imm().
1198 (do_barrier): Remove bogus constraint().
1199 (do_t_barrier): Remove.
1200
4d13caa0
NC
12012013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1202
1203 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1204 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1205 ATmega2564RFR2
1206 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1207
16d02dc9
JB
12082013-04-09 Jan Beulich <jbeulich@suse.com>
1209
1210 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1211 Use local variable Rt in more places.
1212 (do_vmsr): Accept all control registers.
1213
05ac0ffb
JB
12142013-04-09 Jan Beulich <jbeulich@suse.com>
1215
1216 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1217 if there was none specified for moves between scalar and core
1218 register.
1219
2d51fb74
JB
12202013-04-09 Jan Beulich <jbeulich@suse.com>
1221
1222 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1223 NEON_ALL_LANES case.
1224
94dcf8bf
JB
12252013-04-08 Jan Beulich <jbeulich@suse.com>
1226
1227 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1228 PC-relative VSTR.
1229
1472d06f
JB
12302013-04-08 Jan Beulich <jbeulich@suse.com>
1231
1232 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1233 entry to sp_fiq.
1234
0c76cae8
AM
12352013-04-03 Alan Modra <amodra@gmail.com>
1236
1237 * doc/as.texinfo: Add support to generate man options for h8300.
1238 * doc/c-h8300.texi: Likewise.
1239
92eb40d9
RR
12402013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1241
1242 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1243 Cortex-A57.
1244
51dcdd4d
NC
12452013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1246
1247 PR binutils/15068
1248 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1249
c5d685bf
NC
12502013-03-26 Nick Clifton <nickc@redhat.com>
1251
9b978282
NC
1252 PR gas/15295
1253 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1254 start of the file each time.
1255
c5d685bf
NC
1256 PR gas/15178
1257 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1258 FreeBSD targets.
1259
9699c833
TG
12602013-03-26 Douglas B Rupp <rupp@gnat.com>
1261
1262 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1263 after fixup.
1264
4755303e
WN
12652013-03-21 Will Newton <will.newton@linaro.org>
1266
1267 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1268 pc-relative str instructions in Thumb mode.
1269
81f5558e
NC
12702013-03-21 Michael Schewe <michael.schewe@gmx.net>
1271
1272 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1273 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1274 R_H8_DISP32A16.
1275 * config/tc-h8300.h: Remove duplicated defines.
1276
71863e73
NC
12772013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1278
1279 PR gas/15282
1280 * tc-avr.c (mcu_has_3_byte_pc): New function.
1281 (tc_cfi_frame_initial_instructions): Call it to find return
1282 address size.
1283
795b8e6b
NC
12842013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1285
1286 PR gas/15095
1287 * config/tc-tic6x.c (tic6x_try_encode): Handle
1288 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1289 encode register pair numbers when required.
1290
ba86b375
WN
12912013-03-15 Will Newton <will.newton@linaro.org>
1292
1293 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1294 in vstr in Thumb mode for pre-ARMv7 cores.
1295
9e6f3811
AS
12962013-03-14 Andreas Schwab <schwab@suse.de>
1297
1298 * doc/c-arc.texi (ARC Directives): Revert last change and use
1299 @itemize instead of @table.
1300 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1301
b10bf8c5
NC
13022013-03-14 Nick Clifton <nickc@redhat.com>
1303
1304 PR gas/15273
1305 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1306 NULL message, instead just check ARM_CPU_IS_ANY directly.
1307
ba724cfc
NC
13082013-03-14 Nick Clifton <nickc@redhat.com>
1309
1310 PR gas/15212
9e6f3811 1311 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1312 for table format.
1313 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1314 to the @item directives.
1315 (ARM-Neon-Alignment): Move to correct place in the document.
1316 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1317 formatting.
1318 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1319 @smallexample.
1320
531a94fd
SL
13212013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1322
1323 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1324 case. Add default BAD_CASE to switch.
1325
dad60f8e
SL
13262013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1327
1328 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1329 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1330
dd5181d5
KT
13312013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1332
1333 * config/tc-arm.c (crc_ext_armv8): New feature set.
1334 (UNPRED_REG): New macro.
1335 (do_crc32_1): New function.
1336 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1337 do_crc32ch, do_crc32cw): Likewise.
1338 (TUEc): New macro.
1339 (insns): Add entries for crc32 mnemonics.
1340 (arm_extensions): Add entry for crc.
1341
8e723a10
CLT
13422013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1343
1344 * write.h (struct fix): Add fx_dot_frag field.
1345 (dot_frag): Declare.
1346 * write.c (dot_frag): New variable.
1347 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1348 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1349 * expr.c (expr): Save value of frag_now in dot_frag when setting
1350 dot_value.
1351 * read.c (emit_expr): Likewise. Delete comments.
1352
be05d201
L
13532013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1354
1355 * config/tc-i386.c (flag_code_names): Removed.
1356 (i386_index_check): Rewrote.
1357
62b0d0d5
YZ
13582013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1359
1360 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1361 add comment.
1362 (aarch64_double_precision_fmovable): New function.
1363 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1364 function; handle hexadecimal representation of IEEE754 encoding.
1365 (parse_operands): Update the call to parse_aarch64_imm_float.
1366
165de32a
L
13672013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1368
1369 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1370 (check_hle): Updated.
1371 (md_assemble): Likewise.
1372 (parse_insn): Likewise.
1373
d5de92cf
L
13742013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1375
1376 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1377 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1378 (parse_insn): Remove expecting_string_instruction. Set
1379 i.rep_prefix.
1380
e60bb1dd
YZ
13812013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1382
1383 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1384
aeebdd9b
YZ
13852013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1386
1387 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1388 for system registers.
1389
4107ae22
DD
13902013-02-27 DJ Delorie <dj@redhat.com>
1391
1392 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1393 (rl78_op): Handle %code().
1394 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1395 (tc_gen_reloc): Likwise; convert to a computed reloc.
1396 (md_apply_fix): Likewise.
1397
151fa98f
NC
13982013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1399
1400 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1401
70a8bc5b 14022013-02-25 Terry Guo <terry.guo@arm.com>
1403
1404 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1405 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1406 list of accepted CPUs.
1407
5c111e37
L
14082013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1409
1410 PR gas/15159
1411 * config/tc-i386.c (cpu_arch): Add ".smap".
1412
1413 * doc/c-i386.texi: Document smap.
1414
8a75745d
MR
14152013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1416
1417 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1418 mips_assembling_insn appropriately.
1419 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1420
79850f26
MR
14212013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1422
cf29fc61 1423 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1424 extraneous braces.
1425
4c261dff
NC
14262013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1427
5c111e37 1428 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1429
ea33f281
NC
14302013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1431
1432 * configure.tgt: Add nios2-*-rtems*.
1433
a1ccaec9
YZ
14342013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1435
1436 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1437 NULL.
1438
0aa27725
RS
14392013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1440
1441 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1442 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1443
da4339ed
NC
14442013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1445
1446 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1447 core.
1448
36591ba1 14492013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1450 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1451
1452 Based on patches from Altera Corporation.
1453
1454 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1455 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1456 * Makefile.in: Regenerated.
1457 * configure.tgt: Add case for nios2*-linux*.
1458 * config/obj-elf.c: Conditionally include elf/nios2.h.
1459 * config/tc-nios2.c: New file.
1460 * config/tc-nios2.h: New file.
1461 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1462 * doc/Makefile.in: Regenerated.
1463 * doc/all.texi: Set NIOSII.
1464 * doc/as.texinfo (Overview): Add Nios II options.
1465 (Machine Dependencies): Include c-nios2.texi.
1466 * doc/c-nios2.texi: New file.
1467 * NEWS: Note Altera Nios II support.
1468
94d4433a
AM
14692013-02-06 Alan Modra <amodra@gmail.com>
1470
1471 PR gas/14255
1472 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1473 Don't skip fixups with fx_subsy non-NULL.
1474 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1475 with fx_subsy non-NULL.
1476
ace9af6f
L
14772013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1478
1479 * doc/c-metag.texi: Add "@c man" markers.
1480
89d67ed9
AM
14812013-02-04 Alan Modra <amodra@gmail.com>
1482
1483 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1484 related code.
1485 (TC_ADJUST_RELOC_COUNT): Delete.
1486 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1487
89072bd6
AM
14882013-02-04 Alan Modra <amodra@gmail.com>
1489
1490 * po/POTFILES.in: Regenerate.
1491
f9b2d544
NC
14922013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1493
1494 * config/tc-metag.c: Make SWAP instruction less permissive with
1495 its operands.
1496
392ca752
DD
14972013-01-29 DJ Delorie <dj@redhat.com>
1498
1499 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1500 relocs in .word/.etc statements.
1501
427d0db6
RM
15022013-01-29 Roland McGrath <mcgrathr@google.com>
1503
1504 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1505 immediate value for 8-bit offset" error so it shows line info.
1506
4faf939a
JM
15072013-01-24 Joseph Myers <joseph@codesourcery.com>
1508
1509 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1510 for 64-bit output.
1511
78c8d46c
NC
15122013-01-24 Nick Clifton <nickc@redhat.com>
1513
1514 * config/tc-v850.c: Add support for e3v5 architecture.
1515 * doc/c-v850.texi: Mention new support.
1516
fb5b7503
NC
15172013-01-23 Nick Clifton <nickc@redhat.com>
1518
1519 PR gas/15039
1520 * config/tc-avr.c: Include dwarf2dbg.h.
1521
8ce3d284
L
15222013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1523
1524 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1525 (tc_i386_fix_adjustable): Likewise.
1526 (lex_got): Likewise.
1527 (tc_gen_reloc): Likewise.
1528
f5555712
YZ
15292013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1530
1531 * config/tc-aarch64.c (output_operand_error_record): Change to output
1532 the out-of-range error message as value-expected message if there is
1533 only one single value in the expected range.
1534 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1535 LSL #0 as a programmer-friendly feature.
1536
8fd4256d
L
15372013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1538
1539 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1540 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1541 BFD_RELOC_64_SIZE relocations.
1542 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1543 for it.
1544 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1545 relocations against local symbols.
1546
a5840dce
AM
15472013-01-16 Alan Modra <amodra@gmail.com>
1548
1549 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1550 finding some sort of toc syntax error, and break to avoid
1551 compiler uninit warning.
1552
af89796a
L
15532013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1554
1555 PR gas/15019
1556 * config/tc-i386.c (lex_got): Increment length by 1 if the
1557 relocation token is removed.
1558
dd42f060
NC
15592013-01-15 Nick Clifton <nickc@redhat.com>
1560
1561 * config/tc-v850.c (md_assemble): Allow signed values for
1562 V850E_IMMEDIATE.
1563
464e3686
SK
15642013-01-11 Sean Keys <skeys@ipdatasys.com>
1565
1566 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1567 git to cvs.
464e3686 1568
5817ffd1
PB
15692013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1570
1571 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1572 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1573 * config/tc-ppc.c (md_show_usage): Likewise.
1574 (ppc_handle_align): Handle power8's group ending nop.
1575
f4b1f6a9
SK
15762013-01-10 Sean Keys <skeys@ipdatasys.com>
1577
1578 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1579 that the assember exits after the opcodes have been printed.
f4b1f6a9 1580
34bca508
L
15812013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1582
1583 * app.c: Remove trailing white spaces.
1584 * as.c: Likewise.
1585 * as.h: Likewise.
1586 * cond.c: Likewise.
1587 * dw2gencfi.c: Likewise.
1588 * dwarf2dbg.h: Likewise.
1589 * ecoff.c: Likewise.
1590 * input-file.c: Likewise.
1591 * itbl-lex.h: Likewise.
1592 * output-file.c: Likewise.
1593 * read.c: Likewise.
1594 * sb.c: Likewise.
1595 * subsegs.c: Likewise.
1596 * symbols.c: Likewise.
1597 * write.c: Likewise.
1598 * config/tc-i386.c: Likewise.
1599 * doc/Makefile.am: Likewise.
1600 * doc/Makefile.in: Likewise.
1601 * doc/c-aarch64.texi: Likewise.
1602 * doc/c-alpha.texi: Likewise.
1603 * doc/c-arc.texi: Likewise.
1604 * doc/c-arm.texi: Likewise.
1605 * doc/c-avr.texi: Likewise.
1606 * doc/c-bfin.texi: Likewise.
1607 * doc/c-cr16.texi: Likewise.
1608 * doc/c-d10v.texi: Likewise.
1609 * doc/c-d30v.texi: Likewise.
1610 * doc/c-h8300.texi: Likewise.
1611 * doc/c-hppa.texi: Likewise.
1612 * doc/c-i370.texi: Likewise.
1613 * doc/c-i386.texi: Likewise.
1614 * doc/c-i860.texi: Likewise.
1615 * doc/c-m32c.texi: Likewise.
1616 * doc/c-m32r.texi: Likewise.
1617 * doc/c-m68hc11.texi: Likewise.
1618 * doc/c-m68k.texi: Likewise.
1619 * doc/c-microblaze.texi: Likewise.
1620 * doc/c-mips.texi: Likewise.
1621 * doc/c-msp430.texi: Likewise.
1622 * doc/c-mt.texi: Likewise.
1623 * doc/c-s390.texi: Likewise.
1624 * doc/c-score.texi: Likewise.
1625 * doc/c-sh.texi: Likewise.
1626 * doc/c-sh64.texi: Likewise.
1627 * doc/c-tic54x.texi: Likewise.
1628 * doc/c-tic6x.texi: Likewise.
1629 * doc/c-v850.texi: Likewise.
1630 * doc/c-xc16x.texi: Likewise.
1631 * doc/c-xgate.texi: Likewise.
1632 * doc/c-xtensa.texi: Likewise.
1633 * doc/c-z80.texi: Likewise.
1634 * doc/internals.texi: Likewise.
1635
4c665b71
RM
16362013-01-10 Roland McGrath <mcgrathr@google.com>
1637
1638 * hash.c (hash_new_sized): Make it global.
1639 * hash.h: Declare it.
1640 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1641 pass a small size.
1642
a3c62988
NC
16432013-01-10 Will Newton <will.newton@imgtec.com>
1644
1645 * Makefile.am: Add Meta.
1646 * Makefile.in: Regenerate.
1647 * config/tc-metag.c: New file.
1648 * config/tc-metag.h: New file.
1649 * configure.tgt: Add Meta.
1650 * doc/Makefile.am: Add Meta.
1651 * doc/Makefile.in: Regenerate.
1652 * doc/all.texi: Add Meta.
1653 * doc/as.texiinfo: Document Meta options.
1654 * doc/c-metag.texi: New file.
1655
b37df7c4
SE
16562013-01-09 Steve Ellcey <sellcey@mips.com>
1657
1658 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1659 calls.
1660 * config/tc-mips.c (internalError): Remove, replace with abort.
1661
a3251895
YZ
16622013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1663
1664 * config/tc-aarch64.c (parse_operands): Change to compare the result
1665 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1666
8ab8155f
NC
16672013-01-07 Nick Clifton <nickc@redhat.com>
1668
1669 PR gas/14887
1670 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1671 anticipated character.
1672 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1673 here as it is no longer needed.
1674
a4ac1c42
AS
16752013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1676
1677 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1678 * doc/c-score.texi (SCORE-Opts): Likewise.
1679 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1680
e407c74b
NC
16812013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1682
1683 * config/tc-mips.c: Add support for MIPS r5900.
1684 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1685 lq and sq.
1686 (can_swap_branch_p, get_append_method): Detect some conditional
1687 short loops to fix a bug on the r5900 by NOP in the branch delay
1688 slot.
1689 (M_MUL): Support 3 operands in multu on r5900.
1690 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1691 (s_mipsset): Force 32 bit floating point on r5900.
1692 (mips_ip): Check parameter range of instructions mfps and mtps on
1693 r5900.
1694 * configure.in: Detect CPU type when target string contains r5900
1695 (e.g. mips64r5900el-linux-gnu).
1696
62658407
L
16972013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1698
1699 * as.c (parse_args): Update copyright year to 2013.
1700
95830fd1
YZ
17012013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1702
1703 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1704 and "cortex57".
1705
517bb291 17062013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1707
517bb291
NC
1708 PR gas/14987
1709 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1710 closing bracket.
d709e4e6 1711
517bb291 1712For older changes see ChangeLog-2012
08d56133 1713\f
517bb291 1714Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1715
1716Copying and distribution of this file, with or without modification,
1717are permitted in any medium without royalty provided the copyright
1718notice and this notice are preserved.
1719
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NC
1720Local Variables:
1721mode: change-log
1722left-margin: 8
1723fill-column: 74
1724version-control: never
1725End: