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f3ded42a
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12013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
4 conditions. Remove any code deselected by them.
5 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
6
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72013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
8
9 * NEWS: Note removal of ECOFF support.
10 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
11 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
12 (MULTI_CFILES): Remove config/e-mipsecoff.c.
13 * Makefile.in: Regenerate.
14 * configure.in: Remove MIPS ECOFF references.
15 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
16 Delete cases.
17 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
18 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
19 (mips-*-*): ...this single case.
20 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
21 MIPS emulations to be e-mipself*.
22 * configure: Regenerate.
23 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
24 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
25 (mips-*-sysv*): Remove coff and ecoff cases.
26 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
27 * ecoff.c: Remove reference to MIPS ECOFF.
28 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
29 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
30 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
31 (mips_hi_fixup): Tweak comment.
32 (append_insn): Require a howto.
33 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
34
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352013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
36
37 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
38 Use "CPU" instead of "cpu".
39 * doc/c-mips.texi: Likewise.
40 (MIPS Opts): Rename to MIPS Options.
41 (MIPS option stack): Rename to MIPS Option Stack.
42 (MIPS ASE instruction generation overrides): Rename to
43 MIPS ASE Instruction Generation Overrides (for now).
44 (MIPS floating-point): Rename to MIPS Floating-Point.
45
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462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
47
48 * doc/c-mips.texi (MIPS Macros): New section.
49 (MIPS Object): Replace with...
50 (MIPS Small Data): ...this new section.
51
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522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
55 Capitalize name. Use @kindex instead of @cindex for .set entries.
56
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572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * doc/c-mips.texi (MIPS Stabs): Remove section.
60
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612013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
64 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
65 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
66 (ISA_SUPPORTS_VIRT64_ASE): Delete.
67 (mips_ase): New structure.
68 (mips_ases): New table.
69 (FP64_ASES): New macro.
70 (mips_ase_groups): New array.
71 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
72 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
73 functions.
74 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
75 (md_parse_option): Use mips_ases and mips_set_ase instead of
76 separate case statements for each ASE option.
77 (mips_after_parse_args): Use FP64_ASES. Use
78 mips_check_isa_supports_ases to check the ASEs against
79 other options.
80 (s_mipsset): Use mips_ases and mips_set_ase instead of
81 separate if statements for each ASE option. Use
82 mips_check_isa_supports_ases, even when a non-ASE option
83 is specified.
84
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852013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
86
87 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
88
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892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
90
91 * config/tc-mips.c (md_shortopts, options, md_longopts)
92 (md_longopts_size): Move earlier in file.
93
846ef2d0
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942013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
95
96 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
97 with a single "ase" bitmask.
98 (mips_opts): Update accordingly.
99 (file_ase, file_ase_explicit): New variables.
100 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
101 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
102 (ISA_HAS_ROR): Adjust for mips_set_options change.
103 (is_opcode_valid): Take the base ase mask directly from mips_opts.
104 (mips_ip): Adjust for mips_set_options change.
105 (md_parse_option): Likewise. Update file_ase_explicit.
106 (mips_after_parse_args): Adjust for mips_set_options change.
107 Use bitmask operations to select the default ASEs. Set file_ase
108 rather than individual per-ASE variables.
109 (s_mipsset): Adjust for mips_set_options change.
110 (mips_elf_final_processing): Test file_ase rather than
111 file_ase_mdmx. Remove commented-out code.
112
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1132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
114
115 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
116 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
117 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
118 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
119 (mips_after_parse_args): Use the new "ase" field to choose
120 the default ASEs.
121 (mips_cpu_info_table): Move ASEs from the "flags" field to the
122 "ase" field.
123
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1242013-06-18 Richard Earnshaw <rearnsha@arm.com>
125
126 * config/tc-arm.c (symbol_preemptible): New function.
127 (relax_branch): Use it.
128
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CM
1292013-06-17 Catherine Moore <clm@codesourcery.com>
130 Maciej W. Rozycki <macro@codesourcery.com>
131 Chao-Ying Fu <fu@mips.com>
132
133 * config/tc-mips.c (mips_set_options): Add ase_eva.
134 (mips_set_options mips_opts): Add ase_eva.
135 (file_ase_eva): Declare.
136 (ISA_SUPPORTS_EVA_ASE): Define.
137 (IS_SEXT_9BIT_NUM): Define.
138 (MIPS_CPU_ASE_EVA): Define.
139 (is_opcode_valid): Add support for ase_eva.
140 (macro_build): Likewise.
141 (macro): Likewise.
142 (validate_mips_insn): Likewise.
143 (validate_micromips_insn): Likewise.
144 (mips_ip): Likewise.
145 (options): Add OPTION_EVA and OPTION_NO_EVA.
146 (md_longopts): Add -meva and -mno-eva.
147 (md_parse_option): Process new options.
148 (mips_after_parse_args): Check for valid EVA combinations.
149 (s_mipsset): Likewise.
150
e410add4
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1512013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
152
153 * dwarf2dbg.h (dwarf2_move_insn): Declare.
154 * dwarf2dbg.c (line_subseg): Add pmove_tail.
155 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
156 (dwarf2_gen_line_info_1): Update call accordingly.
157 (dwarf2_move_insn): New function.
158 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
159
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1602013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
161
162 Revert:
163
164 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
165
166 PR gas/13024
167 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
168 (dwarf2_gen_line_info_1): Delete.
169 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
170 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
171 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
172 (dwarf2_directive_loc): Push previous .locs instead of generating
173 them immediately.
174
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1752013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
176
177 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
178 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
179
909c7f9c
NC
1802013-06-13 Nick Clifton <nickc@redhat.com>
181
182 PR gas/15602
183 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
184 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
185 function. Generates an error if the adjusted offset is out of a
186 16-bit range.
187
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SL
1882013-06-12 Sandra Loosemore <sandra@codesourcery.com>
189
190 * config/tc-nios2.c (md_apply_fix): Mask constant
191 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
192
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MR
1932013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
194
195 * config/tc-mips.c (append_insn): Don't do branch relaxation for
196 MIPS-3D instructions either.
197 (md_convert_frag): Update the COPx branch mask accordingly.
198
199 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
200 option.
201 * doc/as.texinfo (Overview): Add --relax-branch and
202 --no-relax-branch.
203 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
204 --no-relax-branch.
205
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2062013-06-09 Sandra Loosemore <sandra@codesourcery.com>
207
208 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
209 omitted.
210
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2112013-06-08 Catherine Moore <clm@codesourcery.com>
212
213 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
214 (is_opcode_valid_16): Pass ase value to opcode_is_member.
215 (append_insn): Change INSN_xxxx to ASE_xxxx.
216
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2172013-06-01 George Thomas <george.thomas@atmel.com>
218
219 * gas/config/tc-avr.c: Change ISA for devices with USB support to
220 AVR_ISA_XMEGAU
221
f60cf82f
L
2222013-05-31 H.J. Lu <hongjiu.lu@intel.com>
223
224 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
225 for ELF.
226
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CM
2272013-05-31 Paul Brook <paul@codesourcery.com>
228
229 gas/
230 * config/tc-mips.c (s_ehword): New.
231
067ec077
CM
2322013-05-30 Paul Brook <paul@codesourcery.com>
233
234 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
235
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2362013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
237
238 * write.c (resolve_reloc_expr_symbols): On REL targets don't
239 convert relocs who have no relocatable field either. Rephrase
240 the conditional so that the PC-relative check is only applied
241 for REL targets.
242
f19ccbda
MR
2432013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
244
245 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
246 calculation.
247
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2482013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
249
250 * config/tc-aarch64.c (reloc_table): Update to use
251 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
252 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
253 (md_apply_fix): Likewise.
254 (aarch64_force_relocation): Likewise.
255
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KT
2562013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
257
258 * config/tc-arm.c (it_fsm_post_encode): Improve
259 warning messages about deprecated IT block formats.
260
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MS
2612013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
262
263 * config/tc-aarch64.c (md_apply_fix): Move value range checking
264 inside fx_done condition.
265
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2662013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
267
268 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
269
c0637f3a
PB
2702013-05-20 Peter Bergner <bergner@vnet.ibm.com>
271
272 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
273 and clean up warning when using PRINT_OPCODE_TABLE.
274
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AM
2752013-05-20 Alan Modra <amodra@gmail.com>
276
277 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
278 and data fixups performing shift/high adjust/sign extension on
279 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
280 when writing data fixups rather than recalculating size.
281
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JBG
2822013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
283
284 * doc/c-msp430.texi: Fix typo.
285
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TG
2862013-05-16 Tristan Gingold <gingold@adacore.com>
287
288 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
289 are also TOC symbols.
290
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NC
2912013-05-16 Nick Clifton <nickc@redhat.com>
292
293 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
294 Add -mcpu command to specify core type.
997b26e8 295 * doc/c-msp430.texi: Update documentation.
638d3803 296
b015e599
AP
2972013-05-09 Andrew Pinski <apinski@cavium.com>
298
299 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
300 (mips_opts): Update for the new field.
301 (file_ase_virt): New variable.
302 (ISA_SUPPORTS_VIRT_ASE): New macro.
303 (ISA_SUPPORTS_VIRT64_ASE): New macro.
304 (MIPS_CPU_ASE_VIRT): New define.
305 (is_opcode_valid): Handle ase_virt.
306 (macro_build): Handle "+J".
307 (validate_mips_insn): Likewise.
308 (mips_ip): Likewise.
309 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
310 (md_longopts): Add mvirt and mnovirt
311 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
312 (mips_after_parse_args): Handle ase_virt field.
313 (s_mipsset): Handle "virt" and "novirt".
314 (mips_elf_final_processing): Add a comment about virt ASE might need
315 a new flag.
316 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
317 * doc/c-mips.texi: Document -mvirt and -mno-virt.
318 Document ".set virt" and ".set novirt".
319
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AM
3202013-05-09 Alan Modra <amodra@gmail.com>
321
322 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
323 control of operand flag bits.
324
c5f8c205
AM
3252013-05-07 Alan Modra <amodra@gmail.com>
326
327 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
328 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
329 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
330 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
331 (md_apply_fix): Set fx_no_overflow for assorted relocations.
332 Shift and sign-extend fieldval for use by some VLE reloc
333 operand->insert functions.
334
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CM
3352013-05-06 Paul Brook <paul@codesourcery.com>
336 Catherine Moore <clm@codesourcery.com>
337
c5f8c205
AM
338 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
339 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
340 (md_apply_fix): Likewise.
341 (tc_gen_reloc): Likewise.
342
2de39019
CM
3432013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
344
345 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
346 (mips_fix_adjustable): Adjust pc-relative check to use
347 limited_pc_reloc_p.
348
754e2bb9
RS
3492013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
350
351 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
352 (s_mips_stab): Do not restrict to stabn only.
353
13761a11
NC
3542013-05-02 Nick Clifton <nickc@redhat.com>
355
356 * config/tc-msp430.c: Add support for the MSP430X architecture.
357 Add code to insert a NOP instruction after any instruction that
358 might change the interrupt state.
359 Add support for the LARGE memory model.
360 Add code to initialise the .MSP430.attributes section.
361 * config/tc-msp430.h: Add support for the MSP430X architecture.
362 * doc/c-msp430.texi: Document the new -mL and -mN command line
363 options.
364 * NEWS: Mention support for the MSP430X architecture.
365
df26367c
MR
3662013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
367
368 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
369 alpha*-*-linux*ecoff*.
370
f02d8318
CF
3712013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
372
373 * config/tc-mips.c (mips_ip): Add sizelo.
374 For "+C", "+G", and "+H", set sizelo and compare against it.
375
b40bf0a2
NC
3762013-04-29 Nick Clifton <nickc@redhat.com>
377
378 * as.c (Options): Add -gdwarf-sections.
379 (parse_args): Likewise.
380 * as.h (flag_dwarf_sections): Declare.
381 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
382 (process_entries): When -gdwarf-sections is enabled generate
383 fragmentary .debug_line sections.
384 (out_debug_line): Set the section for the .debug_line section end
385 symbol.
386 * doc/as.texinfo: Document -gdwarf-sections.
387 * NEWS: Mention -gdwarf-sections.
388
8eeccb77 3892013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
390
391 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
392 according to the target parameter. Don't call s_segm since s_segm
393 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
394 initialized yet.
395 (md_begin): Call s_segm according to target parameter from command
396 line.
397
49926cd0
AM
3982013-04-25 Alan Modra <amodra@gmail.com>
399
400 * configure.in: Allow little-endian linux.
401 * configure: Regenerate.
402
e3031850
SL
4032013-04-24 Sandra Loosemore <sandra@codesourcery.com>
404
405 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
406 "fstatus" control register to "eccinj".
407
cb948fc0
KT
4082013-04-19 Kai Tietz <ktietz@redhat.com>
409
410 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
411
4455e9ad
JB
4122013-04-15 Julian Brown <julian@codesourcery.com>
413
414 * expr.c (add_to_result, subtract_from_result): Make global.
415 * expr.h (add_to_result, subtract_from_result): Add prototypes.
416 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
417 subtract_from_result to handle extra bit of precision for .sleb128
418 directive operands.
419
956a6ba3
JB
4202013-04-10 Julian Brown <julian@codesourcery.com>
421
422 * read.c (convert_to_bignum): Add sign parameter. Use it
423 instead of X_unsigned to determine sign of resulting bignum.
424 (emit_expr): Pass extra argument to convert_to_bignum.
425 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
426 X_extrabit to convert_to_bignum.
427 (parse_bitfield_cons): Set X_extrabit.
428 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
429 Initialise X_extrabit field as appropriate.
430 (add_to_result): New.
431 (subtract_from_result): New.
432 (expr): Use above.
433 * expr.h (expressionS): Add X_extrabit field.
434
eb9f3f00
JB
4352013-04-10 Jan Beulich <jbeulich@suse.com>
436
437 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
438 register being PC when is_t or writeback, and use distinct
439 diagnostic for the latter case.
440
ccb84d65
JB
4412013-04-10 Jan Beulich <jbeulich@suse.com>
442
443 * gas/config/tc-arm.c (parse_operands): Re-write
444 po_barrier_or_imm().
445 (do_barrier): Remove bogus constraint().
446 (do_t_barrier): Remove.
447
4d13caa0
NC
4482013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
449
450 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
451 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
452 ATmega2564RFR2
453 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
454
16d02dc9
JB
4552013-04-09 Jan Beulich <jbeulich@suse.com>
456
457 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
458 Use local variable Rt in more places.
459 (do_vmsr): Accept all control registers.
460
05ac0ffb
JB
4612013-04-09 Jan Beulich <jbeulich@suse.com>
462
463 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
464 if there was none specified for moves between scalar and core
465 register.
466
2d51fb74
JB
4672013-04-09 Jan Beulich <jbeulich@suse.com>
468
469 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
470 NEON_ALL_LANES case.
471
94dcf8bf
JB
4722013-04-08 Jan Beulich <jbeulich@suse.com>
473
474 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
475 PC-relative VSTR.
476
1472d06f
JB
4772013-04-08 Jan Beulich <jbeulich@suse.com>
478
479 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
480 entry to sp_fiq.
481
0c76cae8
AM
4822013-04-03 Alan Modra <amodra@gmail.com>
483
484 * doc/as.texinfo: Add support to generate man options for h8300.
485 * doc/c-h8300.texi: Likewise.
486
92eb40d9
RR
4872013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
488
489 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
490 Cortex-A57.
491
51dcdd4d
NC
4922013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
493
494 PR binutils/15068
495 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
496
c5d685bf
NC
4972013-03-26 Nick Clifton <nickc@redhat.com>
498
9b978282
NC
499 PR gas/15295
500 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
501 start of the file each time.
502
c5d685bf
NC
503 PR gas/15178
504 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
505 FreeBSD targets.
506
9699c833
TG
5072013-03-26 Douglas B Rupp <rupp@gnat.com>
508
509 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
510 after fixup.
511
4755303e
WN
5122013-03-21 Will Newton <will.newton@linaro.org>
513
514 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
515 pc-relative str instructions in Thumb mode.
516
81f5558e
NC
5172013-03-21 Michael Schewe <michael.schewe@gmx.net>
518
519 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
520 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
521 R_H8_DISP32A16.
522 * config/tc-h8300.h: Remove duplicated defines.
523
71863e73
NC
5242013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
525
526 PR gas/15282
527 * tc-avr.c (mcu_has_3_byte_pc): New function.
528 (tc_cfi_frame_initial_instructions): Call it to find return
529 address size.
530
795b8e6b
NC
5312013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
532
533 PR gas/15095
534 * config/tc-tic6x.c (tic6x_try_encode): Handle
535 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
536 encode register pair numbers when required.
537
ba86b375
WN
5382013-03-15 Will Newton <will.newton@linaro.org>
539
540 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
541 in vstr in Thumb mode for pre-ARMv7 cores.
542
9e6f3811
AS
5432013-03-14 Andreas Schwab <schwab@suse.de>
544
545 * doc/c-arc.texi (ARC Directives): Revert last change and use
546 @itemize instead of @table.
547 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
548
b10bf8c5
NC
5492013-03-14 Nick Clifton <nickc@redhat.com>
550
551 PR gas/15273
552 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
553 NULL message, instead just check ARM_CPU_IS_ANY directly.
554
ba724cfc
NC
5552013-03-14 Nick Clifton <nickc@redhat.com>
556
557 PR gas/15212
9e6f3811 558 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
559 for table format.
560 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
561 to the @item directives.
562 (ARM-Neon-Alignment): Move to correct place in the document.
563 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
564 formatting.
565 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
566 @smallexample.
567
531a94fd
SL
5682013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
569
570 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
571 case. Add default BAD_CASE to switch.
572
dad60f8e
SL
5732013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
574
575 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
576 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
577
dd5181d5
KT
5782013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
579
580 * config/tc-arm.c (crc_ext_armv8): New feature set.
581 (UNPRED_REG): New macro.
582 (do_crc32_1): New function.
583 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
584 do_crc32ch, do_crc32cw): Likewise.
585 (TUEc): New macro.
586 (insns): Add entries for crc32 mnemonics.
587 (arm_extensions): Add entry for crc.
588
8e723a10
CLT
5892013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
590
591 * write.h (struct fix): Add fx_dot_frag field.
592 (dot_frag): Declare.
593 * write.c (dot_frag): New variable.
594 (fix_new_internal): Set fx_dot_frag field with dot_frag.
595 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
596 * expr.c (expr): Save value of frag_now in dot_frag when setting
597 dot_value.
598 * read.c (emit_expr): Likewise. Delete comments.
599
be05d201
L
6002013-03-07 H.J. Lu <hongjiu.lu@intel.com>
601
602 * config/tc-i386.c (flag_code_names): Removed.
603 (i386_index_check): Rewrote.
604
62b0d0d5
YZ
6052013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
606
607 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
608 add comment.
609 (aarch64_double_precision_fmovable): New function.
610 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
611 function; handle hexadecimal representation of IEEE754 encoding.
612 (parse_operands): Update the call to parse_aarch64_imm_float.
613
165de32a
L
6142013-02-28 H.J. Lu <hongjiu.lu@intel.com>
615
616 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
617 (check_hle): Updated.
618 (md_assemble): Likewise.
619 (parse_insn): Likewise.
620
d5de92cf
L
6212013-02-28 H.J. Lu <hongjiu.lu@intel.com>
622
623 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 624 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
625 (parse_insn): Remove expecting_string_instruction. Set
626 i.rep_prefix.
627
e60bb1dd
YZ
6282013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
629
630 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
631
aeebdd9b
YZ
6322013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
633
634 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
635 for system registers.
636
4107ae22
DD
6372013-02-27 DJ Delorie <dj@redhat.com>
638
639 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
640 (rl78_op): Handle %code().
641 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
642 (tc_gen_reloc): Likwise; convert to a computed reloc.
643 (md_apply_fix): Likewise.
644
151fa98f
NC
6452013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
646
647 * config/rl78-parse.y: Fix encoding of DIVWU insn.
648
70a8bc5b 6492013-02-25 Terry Guo <terry.guo@arm.com>
650
651 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
652 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
653 list of accepted CPUs.
654
5c111e37
L
6552013-02-19 H.J. Lu <hongjiu.lu@intel.com>
656
657 PR gas/15159
658 * config/tc-i386.c (cpu_arch): Add ".smap".
659
660 * doc/c-i386.texi: Document smap.
661
8a75745d
MR
6622013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
663
664 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
665 mips_assembling_insn appropriately.
666 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
667
79850f26
MR
6682013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
669
cf29fc61 670 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
671 extraneous braces.
672
4c261dff
NC
6732013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
674
5c111e37 675 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 676
ea33f281
NC
6772013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
678
679 * configure.tgt: Add nios2-*-rtems*.
680
a1ccaec9
YZ
6812013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
682
683 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
684 NULL.
685
0aa27725
RS
6862013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
687
688 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
689 (macro): Use it. Assert that trunc.w.s is not used for r5900.
690
da4339ed
NC
6912013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
692
693 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
694 core.
695
36591ba1 6962013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 697 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
698
699 Based on patches from Altera Corporation.
700
701 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
702 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
703 * Makefile.in: Regenerated.
704 * configure.tgt: Add case for nios2*-linux*.
705 * config/obj-elf.c: Conditionally include elf/nios2.h.
706 * config/tc-nios2.c: New file.
707 * config/tc-nios2.h: New file.
708 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
709 * doc/Makefile.in: Regenerated.
710 * doc/all.texi: Set NIOSII.
711 * doc/as.texinfo (Overview): Add Nios II options.
712 (Machine Dependencies): Include c-nios2.texi.
713 * doc/c-nios2.texi: New file.
714 * NEWS: Note Altera Nios II support.
715
94d4433a
AM
7162013-02-06 Alan Modra <amodra@gmail.com>
717
718 PR gas/14255
719 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
720 Don't skip fixups with fx_subsy non-NULL.
721 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
722 with fx_subsy non-NULL.
723
ace9af6f
L
7242013-02-04 H.J. Lu <hongjiu.lu@intel.com>
725
726 * doc/c-metag.texi: Add "@c man" markers.
727
89d67ed9
AM
7282013-02-04 Alan Modra <amodra@gmail.com>
729
730 * write.c (fixup_segment): Return void. Delete seg_reloc_count
731 related code.
732 (TC_ADJUST_RELOC_COUNT): Delete.
733 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
734
89072bd6
AM
7352013-02-04 Alan Modra <amodra@gmail.com>
736
737 * po/POTFILES.in: Regenerate.
738
f9b2d544
NC
7392013-01-30 Markos Chandras <markos.chandras@imgtec.com>
740
741 * config/tc-metag.c: Make SWAP instruction less permissive with
742 its operands.
743
392ca752
DD
7442013-01-29 DJ Delorie <dj@redhat.com>
745
746 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
747 relocs in .word/.etc statements.
748
427d0db6
RM
7492013-01-29 Roland McGrath <mcgrathr@google.com>
750
751 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
752 immediate value for 8-bit offset" error so it shows line info.
753
4faf939a
JM
7542013-01-24 Joseph Myers <joseph@codesourcery.com>
755
756 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
757 for 64-bit output.
758
78c8d46c
NC
7592013-01-24 Nick Clifton <nickc@redhat.com>
760
761 * config/tc-v850.c: Add support for e3v5 architecture.
762 * doc/c-v850.texi: Mention new support.
763
fb5b7503
NC
7642013-01-23 Nick Clifton <nickc@redhat.com>
765
766 PR gas/15039
767 * config/tc-avr.c: Include dwarf2dbg.h.
768
8ce3d284
L
7692013-01-18 H.J. Lu <hongjiu.lu@intel.com>
770
771 * config/tc-i386.c (reloc): Support size relocation only for ELF.
772 (tc_i386_fix_adjustable): Likewise.
773 (lex_got): Likewise.
774 (tc_gen_reloc): Likewise.
775
f5555712
YZ
7762013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
777
778 * config/tc-aarch64.c (output_operand_error_record): Change to output
779 the out-of-range error message as value-expected message if there is
780 only one single value in the expected range.
781 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
782 LSL #0 as a programmer-friendly feature.
783
8fd4256d
L
7842013-01-16 H.J. Lu <hongjiu.lu@intel.com>
785
786 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
787 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
788 BFD_RELOC_64_SIZE relocations.
789 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
790 for it.
791 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
792 relocations against local symbols.
793
a5840dce
AM
7942013-01-16 Alan Modra <amodra@gmail.com>
795
796 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
797 finding some sort of toc syntax error, and break to avoid
798 compiler uninit warning.
799
af89796a
L
8002013-01-15 H.J. Lu <hongjiu.lu@intel.com>
801
802 PR gas/15019
803 * config/tc-i386.c (lex_got): Increment length by 1 if the
804 relocation token is removed.
805
dd42f060
NC
8062013-01-15 Nick Clifton <nickc@redhat.com>
807
808 * config/tc-v850.c (md_assemble): Allow signed values for
809 V850E_IMMEDIATE.
810
464e3686
SK
8112013-01-11 Sean Keys <skeys@ipdatasys.com>
812
813 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 814 git to cvs.
464e3686 815
5817ffd1
PB
8162013-01-10 Peter Bergner <bergner@vnet.ibm.com>
817
818 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
819 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
820 * config/tc-ppc.c (md_show_usage): Likewise.
821 (ppc_handle_align): Handle power8's group ending nop.
822
f4b1f6a9
SK
8232013-01-10 Sean Keys <skeys@ipdatasys.com>
824
825 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 826 that the assember exits after the opcodes have been printed.
f4b1f6a9 827
34bca508
L
8282013-01-10 H.J. Lu <hongjiu.lu@intel.com>
829
830 * app.c: Remove trailing white spaces.
831 * as.c: Likewise.
832 * as.h: Likewise.
833 * cond.c: Likewise.
834 * dw2gencfi.c: Likewise.
835 * dwarf2dbg.h: Likewise.
836 * ecoff.c: Likewise.
837 * input-file.c: Likewise.
838 * itbl-lex.h: Likewise.
839 * output-file.c: Likewise.
840 * read.c: Likewise.
841 * sb.c: Likewise.
842 * subsegs.c: Likewise.
843 * symbols.c: Likewise.
844 * write.c: Likewise.
845 * config/tc-i386.c: Likewise.
846 * doc/Makefile.am: Likewise.
847 * doc/Makefile.in: Likewise.
848 * doc/c-aarch64.texi: Likewise.
849 * doc/c-alpha.texi: Likewise.
850 * doc/c-arc.texi: Likewise.
851 * doc/c-arm.texi: Likewise.
852 * doc/c-avr.texi: Likewise.
853 * doc/c-bfin.texi: Likewise.
854 * doc/c-cr16.texi: Likewise.
855 * doc/c-d10v.texi: Likewise.
856 * doc/c-d30v.texi: Likewise.
857 * doc/c-h8300.texi: Likewise.
858 * doc/c-hppa.texi: Likewise.
859 * doc/c-i370.texi: Likewise.
860 * doc/c-i386.texi: Likewise.
861 * doc/c-i860.texi: Likewise.
862 * doc/c-m32c.texi: Likewise.
863 * doc/c-m32r.texi: Likewise.
864 * doc/c-m68hc11.texi: Likewise.
865 * doc/c-m68k.texi: Likewise.
866 * doc/c-microblaze.texi: Likewise.
867 * doc/c-mips.texi: Likewise.
868 * doc/c-msp430.texi: Likewise.
869 * doc/c-mt.texi: Likewise.
870 * doc/c-s390.texi: Likewise.
871 * doc/c-score.texi: Likewise.
872 * doc/c-sh.texi: Likewise.
873 * doc/c-sh64.texi: Likewise.
874 * doc/c-tic54x.texi: Likewise.
875 * doc/c-tic6x.texi: Likewise.
876 * doc/c-v850.texi: Likewise.
877 * doc/c-xc16x.texi: Likewise.
878 * doc/c-xgate.texi: Likewise.
879 * doc/c-xtensa.texi: Likewise.
880 * doc/c-z80.texi: Likewise.
881 * doc/internals.texi: Likewise.
882
4c665b71
RM
8832013-01-10 Roland McGrath <mcgrathr@google.com>
884
885 * hash.c (hash_new_sized): Make it global.
886 * hash.h: Declare it.
887 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
888 pass a small size.
889
a3c62988
NC
8902013-01-10 Will Newton <will.newton@imgtec.com>
891
892 * Makefile.am: Add Meta.
893 * Makefile.in: Regenerate.
894 * config/tc-metag.c: New file.
895 * config/tc-metag.h: New file.
896 * configure.tgt: Add Meta.
897 * doc/Makefile.am: Add Meta.
898 * doc/Makefile.in: Regenerate.
899 * doc/all.texi: Add Meta.
900 * doc/as.texiinfo: Document Meta options.
901 * doc/c-metag.texi: New file.
902
b37df7c4
SE
9032013-01-09 Steve Ellcey <sellcey@mips.com>
904
905 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
906 calls.
907 * config/tc-mips.c (internalError): Remove, replace with abort.
908
a3251895
YZ
9092013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
910
911 * config/tc-aarch64.c (parse_operands): Change to compare the result
912 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
913
8ab8155f
NC
9142013-01-07 Nick Clifton <nickc@redhat.com>
915
916 PR gas/14887
917 * config/tc-arm.c (skip_past_char): Skip whitespace before the
918 anticipated character.
919 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
920 here as it is no longer needed.
921
a4ac1c42
AS
9222013-01-06 Andreas Schwab <schwab@linux-m68k.org>
923
924 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
925 * doc/c-score.texi (SCORE-Opts): Likewise.
926 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
927
e407c74b
NC
9282013-01-04 Juergen Urban <JuergenUrban@gmx.de>
929
930 * config/tc-mips.c: Add support for MIPS r5900.
931 Add M_LQ_AB and M_SQ_AB to support large values for instructions
932 lq and sq.
933 (can_swap_branch_p, get_append_method): Detect some conditional
934 short loops to fix a bug on the r5900 by NOP in the branch delay
935 slot.
936 (M_MUL): Support 3 operands in multu on r5900.
937 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
938 (s_mipsset): Force 32 bit floating point on r5900.
939 (mips_ip): Check parameter range of instructions mfps and mtps on
940 r5900.
941 * configure.in: Detect CPU type when target string contains r5900
942 (e.g. mips64r5900el-linux-gnu).
943
62658407
L
9442013-01-02 H.J. Lu <hongjiu.lu@intel.com>
945
946 * as.c (parse_args): Update copyright year to 2013.
947
95830fd1
YZ
9482013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
949
950 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
951 and "cortex57".
952
517bb291 9532013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 954
517bb291
NC
955 PR gas/14987
956 * config/tc-arm.c (parse_address_main): Skip whitespace before a
957 closing bracket.
d709e4e6 958
517bb291 959For older changes see ChangeLog-2012
08d56133 960\f
517bb291 961Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
962
963Copying and distribution of this file, with or without modification,
964are permitted in any medium without royalty provided the copyright
965notice and this notice are preserved.
966
08d56133
NC
967Local Variables:
968mode: change-log
969left-margin: 8
970fill-column: 74
971version-control: never
972End: