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12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (parse_float_constant): Split out from...
4 (mips_ip): ...here.
5
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62013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
9 Delete.
10
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112013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
12
13 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
14 (match_entry_exit_operand): New function.
15 (match_save_restore_list_operand): Likewise.
16 (match_operand): Use them.
17 (check_absolute_expr): Delete.
18 (mips16_ip): Rewrite main parsing loop to use mips_operands.
19
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202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
21
22 * config/tc-mips.c: Enable functions commented out in previous patch.
23 (SKIP_SPACE_TABS): Move further up file.
24 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
25 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
26 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
27 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
28 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
29 (micromips_imm_b_map, micromips_imm_c_map): Delete.
30 (mips_lookup_reg_pair): Delete.
31 (macro): Use report_bad_range and report_bad_field.
32 (mips_immed, expr_const_in_range): Delete.
33 (mips_ip): Rewrite main parsing loop to use new functions.
34
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352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
36
37 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
38 Change return type to bfd_boolean.
39 (report_bad_range, report_bad_field): New functions.
40 (mips_arg_info): New structure.
41 (match_const_int, convert_reg_type, check_regno, match_int_operand)
42 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
43 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
44 (match_addiusp_operand, match_clo_clz_dest_operand)
45 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
46 (match_pc_operand, match_tied_reg_operand, match_operand)
47 (check_completed_insn): New functions, commented out for now.
48
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492013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
50
51 * config/tc-mips.c (insn_insert_operand): New function.
52 (macro_build, mips16_macro_build): Put null character check
53 in the for loop and convert continues to breaks. Use operand
54 structures to handle constant operands.
55
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562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
57
58 * config/tc-mips.c (validate_mips_insn): Move further up file.
59 Add insn_bits and decode_operand arguments. Use the mips_operand
60 fields to work out which bits an operand occupies. Detect double
61 definitions.
62 (validate_micromips_insn): Move further up file. Call into
63 validate_mips_insn.
64
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652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
66
67 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
68
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692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
70
71 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
72 and "~".
73 (macro): Update accordingly.
74
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752013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
76
77 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
78 (imm_reloc): Delete.
79 (md_assemble): Remove imm_reloc handling.
80 (mips_ip): Update commentary. Use offset_expr and offset_reloc
81 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
82 Use a temporary array rather than imm_reloc when parsing
83 constant expressions. Remove imm_reloc initialization.
84 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
85 for the relaxable field. Use a relax_char variable to track the
86 type of this field. Remove imm_reloc initialization.
87
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882013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
89
90 * config/tc-mips.c (mips16_ip): Handle "I".
91
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922013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
93
94 * config/tc-mips.c (mips_flag_nan2008): New variable.
95 (options): Add OPTION_NAN enum value.
96 (md_longopts): Handle it.
97 (md_parse_option): Likewise.
98 (s_nan): New function.
99 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
100 (md_show_usage): Add -mnan.
101
102 * doc/as.texinfo (Overview): Add -mnan.
103 * doc/c-mips.texi (MIPS Opts): Document -mnan.
104 (MIPS NaN Encodings): New node. Document .nan directive.
105 (MIPS-Dependent): List the new node.
106
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1072013-07-09 Tristan Gingold <gingold@adacore.com>
108
109 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
110
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1112013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
114 for 'A' and assume that the constant has been elided if the result
115 is an O_register.
116
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1172013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * config/tc-mips.c (gprel16_reloc_p): New function.
120 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
121 BFD_RELOC_UNUSED.
122 (offset_high_part, small_offset_p): New functions.
123 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
124 register load and store macros, handle the 16-bit offset case first.
125 If a 16-bit offset is not suitable for the instruction we're
126 generating, load it into the temporary register using
127 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
128 M_L_DAB code once the address has been constructed. For double load
129 and store macros, again handle the 16-bit offset case first.
130 If the second register cannot be accessed from the same high
131 part as the first, load it into AT using ADDRESS_ADDI_INSN.
132 Fix the handling of LD in cases where the first register is the
133 same as the base. Also handle the case where the offset is
134 not 16 bits and the second register cannot be accessed from the
135 same high part as the first. For unaligned loads and stores,
136 fuse the offbits == 12 and old "ab" handling. Apply this handling
137 whenever the second offset needs a different high part from the first.
138 Construct the offset using ADDRESS_ADDI_INSN where possible,
139 for offbits == 16 as well as offbits == 12. Use offset_reloc
140 when constructing the individual loads and stores.
141 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
142 and offset_reloc before matching against a particular opcode.
143 Handle elided 'A' constants. Allow 'A' constants to use
144 relocation operators.
145
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1462013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
147
148 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
149 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
150 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
151
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1522013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
155 Require the msb to be <= 31 for "+s". Check that the size is <= 31
156 for both "+s" and "+S".
157
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1582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
159
160 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
161 (mips_ip, mips16_ip): Handle "+i".
162
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1632013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
166 (micromips_to_32_reg_h_map): Rename to...
167 (micromips_to_32_reg_h_map1): ...this.
168 (micromips_to_32_reg_i_map): Rename to...
169 (micromips_to_32_reg_h_map2): ...this.
170 (mips_lookup_reg_pair): New function.
171 (gpr_write_mask, macro): Adjust after above renaming.
172 (validate_micromips_insn): Remove "mi" handling.
173 (mips_ip): Likewise. Parse both registers in a pair for "mh".
174
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1752013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
176
177 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
178 (mips_ip): Remove "+D" and "+T" handling.
179
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1802013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
181
182 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
183 relocs.
184
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1852013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
186
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187 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
188
1892013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
190
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191 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
192 (aarch64_force_relocation): Likewise.
193
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1942013-07-02 Alan Modra <amodra@gmail.com>
195
196 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
197
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1982013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
199
200 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
201 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
202 Replace @sc{mips16} with literal `MIPS16'.
203 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
204
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2052013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
206
207 * config/tc-aarch64.c (reloc_table): Replace
208 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
209 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
210 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
211 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
212 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
213 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
214 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
215 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
216 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
217 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
218 (aarch64_force_relocation): Likewise.
219
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2202013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
221
222 * config/tc-aarch64.c (ilp32_p): New static variable.
223 (elf64_aarch64_target_format): Return the target according to the
224 value of 'ilp32_p'.
225 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
226 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
227 (aarch64_dwarf2_addr_size): New function.
228 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
229 (DWARF2_ADDR_SIZE): New define.
230
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2312013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
232
233 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
234
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2352013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
236
237 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
238
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2392013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
240
241 * config/tc-mips.c (mips_set_options): Add insn32 member.
242 (mips_opts): Initialize it.
243 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
244 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
245 (md_longopts): Add "minsn32" and "mno-insn32" options.
246 (is_size_valid): Handle insn32 mode.
247 (md_assemble): Pass instruction string down to macro.
248 (brk_fmt): Add second dimension and insn32 mode initializers.
249 (mfhl_fmt): Likewise.
250 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
251 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
252 (macro_build_jalr, move_register): Handle insn32 mode.
253 (macro_build_branch_rs): Likewise.
254 (macro): Handle insn32 mode.
255 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
256 (mips_ip): Handle insn32 mode.
257 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
258 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
259 (mips_handle_align): Handle insn32 mode.
260 (md_show_usage): Add -minsn32 and -mno-insn32.
261
262 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
263 -mno-insn32 options.
264 (-minsn32, -mno-insn32): New options.
265 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
266 options.
267 (MIPS assembly options): New node. Document .set insn32 and
268 .set noinsn32.
269 (MIPS-Dependent): List the new node.
270
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2712013-06-25 Nick Clifton <nickc@redhat.com>
272
273 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
274 the PC in indirect addressing on 430xv2 parts.
275 (msp430_operands): Add version test to hardware bug encoding
276 restrictions.
277
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2782013-06-24 Roland McGrath <mcgrathr@google.com>
279
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280 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
281 so it skips whitespace before it.
282 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
283
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284 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
285 (arm_reg_parse_multi): Skip whitespace first.
286 (parse_reg_list): Likewise.
287 (parse_vfp_reg_list): Likewise.
288 (s_arm_unwind_save_mmxwcg): Likewise.
289
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2902013-06-24 Nick Clifton <nickc@redhat.com>
291
292 PR gas/15623
293 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
294
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2952013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
296
297 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
298
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2992013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
300
301 * config/tc-mips.c: Assert that offsetT and valueT are at least
302 8 bytes in size.
303 (GPR_SMIN, GPR_SMAX): New macros.
304 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
305
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3062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
307
308 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
309 conditions. Remove any code deselected by them.
310 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
311
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3122013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
313
314 * NEWS: Note removal of ECOFF support.
315 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
316 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
317 (MULTI_CFILES): Remove config/e-mipsecoff.c.
318 * Makefile.in: Regenerate.
319 * configure.in: Remove MIPS ECOFF references.
320 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
321 Delete cases.
322 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
323 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
324 (mips-*-*): ...this single case.
325 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
326 MIPS emulations to be e-mipself*.
327 * configure: Regenerate.
328 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
329 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
330 (mips-*-sysv*): Remove coff and ecoff cases.
331 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
332 * ecoff.c: Remove reference to MIPS ECOFF.
333 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
334 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
335 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
336 (mips_hi_fixup): Tweak comment.
337 (append_insn): Require a howto.
338 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
339
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3402013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
341
342 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
343 Use "CPU" instead of "cpu".
344 * doc/c-mips.texi: Likewise.
345 (MIPS Opts): Rename to MIPS Options.
346 (MIPS option stack): Rename to MIPS Option Stack.
347 (MIPS ASE instruction generation overrides): Rename to
348 MIPS ASE Instruction Generation Overrides (for now).
349 (MIPS floating-point): Rename to MIPS Floating-Point.
350
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3512013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
352
353 * doc/c-mips.texi (MIPS Macros): New section.
354 (MIPS Object): Replace with...
355 (MIPS Small Data): ...this new section.
356
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3572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
358
359 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
360 Capitalize name. Use @kindex instead of @cindex for .set entries.
361
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3622013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
363
364 * doc/c-mips.texi (MIPS Stabs): Remove section.
365
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3662013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
367
368 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
369 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
370 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
371 (ISA_SUPPORTS_VIRT64_ASE): Delete.
372 (mips_ase): New structure.
373 (mips_ases): New table.
374 (FP64_ASES): New macro.
375 (mips_ase_groups): New array.
376 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
377 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
378 functions.
379 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
380 (md_parse_option): Use mips_ases and mips_set_ase instead of
381 separate case statements for each ASE option.
382 (mips_after_parse_args): Use FP64_ASES. Use
383 mips_check_isa_supports_ases to check the ASEs against
384 other options.
385 (s_mipsset): Use mips_ases and mips_set_ase instead of
386 separate if statements for each ASE option. Use
387 mips_check_isa_supports_ases, even when a non-ASE option
388 is specified.
389
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3902013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
391
392 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
393
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3942013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
395
396 * config/tc-mips.c (md_shortopts, options, md_longopts)
397 (md_longopts_size): Move earlier in file.
398
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3992013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
400
401 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
402 with a single "ase" bitmask.
403 (mips_opts): Update accordingly.
404 (file_ase, file_ase_explicit): New variables.
405 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
406 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
407 (ISA_HAS_ROR): Adjust for mips_set_options change.
408 (is_opcode_valid): Take the base ase mask directly from mips_opts.
409 (mips_ip): Adjust for mips_set_options change.
410 (md_parse_option): Likewise. Update file_ase_explicit.
411 (mips_after_parse_args): Adjust for mips_set_options change.
412 Use bitmask operations to select the default ASEs. Set file_ase
413 rather than individual per-ASE variables.
414 (s_mipsset): Adjust for mips_set_options change.
415 (mips_elf_final_processing): Test file_ase rather than
416 file_ase_mdmx. Remove commented-out code.
417
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4182013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
419
420 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
421 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
422 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
423 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
424 (mips_after_parse_args): Use the new "ase" field to choose
425 the default ASEs.
426 (mips_cpu_info_table): Move ASEs from the "flags" field to the
427 "ase" field.
428
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4292013-06-18 Richard Earnshaw <rearnsha@arm.com>
430
431 * config/tc-arm.c (symbol_preemptible): New function.
432 (relax_branch): Use it.
433
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4342013-06-17 Catherine Moore <clm@codesourcery.com>
435 Maciej W. Rozycki <macro@codesourcery.com>
436 Chao-Ying Fu <fu@mips.com>
437
438 * config/tc-mips.c (mips_set_options): Add ase_eva.
439 (mips_set_options mips_opts): Add ase_eva.
440 (file_ase_eva): Declare.
441 (ISA_SUPPORTS_EVA_ASE): Define.
442 (IS_SEXT_9BIT_NUM): Define.
443 (MIPS_CPU_ASE_EVA): Define.
444 (is_opcode_valid): Add support for ase_eva.
445 (macro_build): Likewise.
446 (macro): Likewise.
447 (validate_mips_insn): Likewise.
448 (validate_micromips_insn): Likewise.
449 (mips_ip): Likewise.
450 (options): Add OPTION_EVA and OPTION_NO_EVA.
451 (md_longopts): Add -meva and -mno-eva.
452 (md_parse_option): Process new options.
453 (mips_after_parse_args): Check for valid EVA combinations.
454 (s_mipsset): Likewise.
455
e410add4
RS
4562013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
457
458 * dwarf2dbg.h (dwarf2_move_insn): Declare.
459 * dwarf2dbg.c (line_subseg): Add pmove_tail.
460 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
461 (dwarf2_gen_line_info_1): Update call accordingly.
462 (dwarf2_move_insn): New function.
463 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
464
6a50d470
RS
4652013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
466
467 Revert:
468
469 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
470
471 PR gas/13024
472 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
473 (dwarf2_gen_line_info_1): Delete.
474 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
475 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
476 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
477 (dwarf2_directive_loc): Push previous .locs instead of generating
478 them immediately.
479
f122319e
CF
4802013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
481
482 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
483 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
484
909c7f9c
NC
4852013-06-13 Nick Clifton <nickc@redhat.com>
486
487 PR gas/15602
488 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
489 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
490 function. Generates an error if the adjusted offset is out of a
491 16-bit range.
492
5d5755a7
SL
4932013-06-12 Sandra Loosemore <sandra@codesourcery.com>
494
495 * config/tc-nios2.c (md_apply_fix): Mask constant
496 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
497
3bf0dbfb
MR
4982013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
499
500 * config/tc-mips.c (append_insn): Don't do branch relaxation for
501 MIPS-3D instructions either.
502 (md_convert_frag): Update the COPx branch mask accordingly.
503
504 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
505 option.
506 * doc/as.texinfo (Overview): Add --relax-branch and
507 --no-relax-branch.
508 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
509 --no-relax-branch.
510
9daf7bab
SL
5112013-06-09 Sandra Loosemore <sandra@codesourcery.com>
512
513 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
514 omitted.
515
d301a56b
RS
5162013-06-08 Catherine Moore <clm@codesourcery.com>
517
518 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
519 (is_opcode_valid_16): Pass ase value to opcode_is_member.
520 (append_insn): Change INSN_xxxx to ASE_xxxx.
521
7bab7634
DC
5222013-06-01 George Thomas <george.thomas@atmel.com>
523
524 * gas/config/tc-avr.c: Change ISA for devices with USB support to
525 AVR_ISA_XMEGAU
526
f60cf82f
L
5272013-05-31 H.J. Lu <hongjiu.lu@intel.com>
528
529 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
530 for ELF.
531
a3f278e2
CM
5322013-05-31 Paul Brook <paul@codesourcery.com>
533
534 gas/
535 * config/tc-mips.c (s_ehword): New.
536
067ec077
CM
5372013-05-30 Paul Brook <paul@codesourcery.com>
538
539 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
540
d6101ac2
MR
5412013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
542
543 * write.c (resolve_reloc_expr_symbols): On REL targets don't
544 convert relocs who have no relocatable field either. Rephrase
545 the conditional so that the PC-relative check is only applied
546 for REL targets.
547
f19ccbda
MR
5482013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
549
550 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
551 calculation.
552
418009c2
YZ
5532013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
554
555 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 556 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
557 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
558 (md_apply_fix): Likewise.
559 (aarch64_force_relocation): Likewise.
560
0a8897c7
KT
5612013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
562
563 * config/tc-arm.c (it_fsm_post_encode): Improve
564 warning messages about deprecated IT block formats.
565
89d2a2a3
MS
5662013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
567
568 * config/tc-aarch64.c (md_apply_fix): Move value range checking
569 inside fx_done condition.
570
c77c0862
RS
5712013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
572
573 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
574
c0637f3a
PB
5752013-05-20 Peter Bergner <bergner@vnet.ibm.com>
576
577 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
578 and clean up warning when using PRINT_OPCODE_TABLE.
579
5656a981
AM
5802013-05-20 Alan Modra <amodra@gmail.com>
581
582 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
583 and data fixups performing shift/high adjust/sign extension on
584 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
585 when writing data fixups rather than recalculating size.
586
997b26e8
JBG
5872013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
588
589 * doc/c-msp430.texi: Fix typo.
590
9f6e76f4
TG
5912013-05-16 Tristan Gingold <gingold@adacore.com>
592
593 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
594 are also TOC symbols.
595
638d3803
NC
5962013-05-16 Nick Clifton <nickc@redhat.com>
597
598 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
599 Add -mcpu command to specify core type.
997b26e8 600 * doc/c-msp430.texi: Update documentation.
638d3803 601
b015e599
AP
6022013-05-09 Andrew Pinski <apinski@cavium.com>
603
604 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
605 (mips_opts): Update for the new field.
606 (file_ase_virt): New variable.
607 (ISA_SUPPORTS_VIRT_ASE): New macro.
608 (ISA_SUPPORTS_VIRT64_ASE): New macro.
609 (MIPS_CPU_ASE_VIRT): New define.
610 (is_opcode_valid): Handle ase_virt.
611 (macro_build): Handle "+J".
612 (validate_mips_insn): Likewise.
613 (mips_ip): Likewise.
614 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
615 (md_longopts): Add mvirt and mnovirt
616 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
617 (mips_after_parse_args): Handle ase_virt field.
618 (s_mipsset): Handle "virt" and "novirt".
619 (mips_elf_final_processing): Add a comment about virt ASE might need
620 a new flag.
621 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
622 * doc/c-mips.texi: Document -mvirt and -mno-virt.
623 Document ".set virt" and ".set novirt".
624
da8094d7
AM
6252013-05-09 Alan Modra <amodra@gmail.com>
626
627 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
628 control of operand flag bits.
629
c5f8c205
AM
6302013-05-07 Alan Modra <amodra@gmail.com>
631
632 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
633 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
634 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
635 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
636 (md_apply_fix): Set fx_no_overflow for assorted relocations.
637 Shift and sign-extend fieldval for use by some VLE reloc
638 operand->insert functions.
639
b47468a6
CM
6402013-05-06 Paul Brook <paul@codesourcery.com>
641 Catherine Moore <clm@codesourcery.com>
642
c5f8c205
AM
643 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
644 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
645 (md_apply_fix): Likewise.
646 (tc_gen_reloc): Likewise.
647
2de39019
CM
6482013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
649
650 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
651 (mips_fix_adjustable): Adjust pc-relative check to use
652 limited_pc_reloc_p.
653
754e2bb9
RS
6542013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
655
656 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
657 (s_mips_stab): Do not restrict to stabn only.
658
13761a11
NC
6592013-05-02 Nick Clifton <nickc@redhat.com>
660
661 * config/tc-msp430.c: Add support for the MSP430X architecture.
662 Add code to insert a NOP instruction after any instruction that
663 might change the interrupt state.
664 Add support for the LARGE memory model.
665 Add code to initialise the .MSP430.attributes section.
666 * config/tc-msp430.h: Add support for the MSP430X architecture.
667 * doc/c-msp430.texi: Document the new -mL and -mN command line
668 options.
669 * NEWS: Mention support for the MSP430X architecture.
670
df26367c
MR
6712013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
672
673 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
674 alpha*-*-linux*ecoff*.
675
f02d8318
CF
6762013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
677
678 * config/tc-mips.c (mips_ip): Add sizelo.
679 For "+C", "+G", and "+H", set sizelo and compare against it.
680
b40bf0a2
NC
6812013-04-29 Nick Clifton <nickc@redhat.com>
682
683 * as.c (Options): Add -gdwarf-sections.
684 (parse_args): Likewise.
685 * as.h (flag_dwarf_sections): Declare.
686 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
687 (process_entries): When -gdwarf-sections is enabled generate
688 fragmentary .debug_line sections.
689 (out_debug_line): Set the section for the .debug_line section end
690 symbol.
691 * doc/as.texinfo: Document -gdwarf-sections.
692 * NEWS: Mention -gdwarf-sections.
693
8eeccb77 6942013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
695
696 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
697 according to the target parameter. Don't call s_segm since s_segm
698 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
699 initialized yet.
700 (md_begin): Call s_segm according to target parameter from command
701 line.
702
49926cd0
AM
7032013-04-25 Alan Modra <amodra@gmail.com>
704
705 * configure.in: Allow little-endian linux.
706 * configure: Regenerate.
707
e3031850
SL
7082013-04-24 Sandra Loosemore <sandra@codesourcery.com>
709
710 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
711 "fstatus" control register to "eccinj".
712
cb948fc0
KT
7132013-04-19 Kai Tietz <ktietz@redhat.com>
714
715 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
716
4455e9ad
JB
7172013-04-15 Julian Brown <julian@codesourcery.com>
718
719 * expr.c (add_to_result, subtract_from_result): Make global.
720 * expr.h (add_to_result, subtract_from_result): Add prototypes.
721 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
722 subtract_from_result to handle extra bit of precision for .sleb128
723 directive operands.
724
956a6ba3
JB
7252013-04-10 Julian Brown <julian@codesourcery.com>
726
727 * read.c (convert_to_bignum): Add sign parameter. Use it
728 instead of X_unsigned to determine sign of resulting bignum.
729 (emit_expr): Pass extra argument to convert_to_bignum.
730 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
731 X_extrabit to convert_to_bignum.
732 (parse_bitfield_cons): Set X_extrabit.
733 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
734 Initialise X_extrabit field as appropriate.
735 (add_to_result): New.
736 (subtract_from_result): New.
737 (expr): Use above.
738 * expr.h (expressionS): Add X_extrabit field.
739
eb9f3f00
JB
7402013-04-10 Jan Beulich <jbeulich@suse.com>
741
742 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
743 register being PC when is_t or writeback, and use distinct
744 diagnostic for the latter case.
745
ccb84d65
JB
7462013-04-10 Jan Beulich <jbeulich@suse.com>
747
748 * gas/config/tc-arm.c (parse_operands): Re-write
749 po_barrier_or_imm().
750 (do_barrier): Remove bogus constraint().
751 (do_t_barrier): Remove.
752
4d13caa0
NC
7532013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
754
755 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
756 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
757 ATmega2564RFR2
758 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
759
16d02dc9
JB
7602013-04-09 Jan Beulich <jbeulich@suse.com>
761
762 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
763 Use local variable Rt in more places.
764 (do_vmsr): Accept all control registers.
765
05ac0ffb
JB
7662013-04-09 Jan Beulich <jbeulich@suse.com>
767
768 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
769 if there was none specified for moves between scalar and core
770 register.
771
2d51fb74
JB
7722013-04-09 Jan Beulich <jbeulich@suse.com>
773
774 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
775 NEON_ALL_LANES case.
776
94dcf8bf
JB
7772013-04-08 Jan Beulich <jbeulich@suse.com>
778
779 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
780 PC-relative VSTR.
781
1472d06f
JB
7822013-04-08 Jan Beulich <jbeulich@suse.com>
783
784 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
785 entry to sp_fiq.
786
0c76cae8
AM
7872013-04-03 Alan Modra <amodra@gmail.com>
788
789 * doc/as.texinfo: Add support to generate man options for h8300.
790 * doc/c-h8300.texi: Likewise.
791
92eb40d9
RR
7922013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
793
794 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
795 Cortex-A57.
796
51dcdd4d
NC
7972013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
798
799 PR binutils/15068
800 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
801
c5d685bf
NC
8022013-03-26 Nick Clifton <nickc@redhat.com>
803
9b978282
NC
804 PR gas/15295
805 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
806 start of the file each time.
807
c5d685bf
NC
808 PR gas/15178
809 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
810 FreeBSD targets.
811
9699c833
TG
8122013-03-26 Douglas B Rupp <rupp@gnat.com>
813
814 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
815 after fixup.
816
4755303e
WN
8172013-03-21 Will Newton <will.newton@linaro.org>
818
819 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
820 pc-relative str instructions in Thumb mode.
821
81f5558e
NC
8222013-03-21 Michael Schewe <michael.schewe@gmx.net>
823
824 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
825 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
826 R_H8_DISP32A16.
827 * config/tc-h8300.h: Remove duplicated defines.
828
71863e73
NC
8292013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
830
831 PR gas/15282
832 * tc-avr.c (mcu_has_3_byte_pc): New function.
833 (tc_cfi_frame_initial_instructions): Call it to find return
834 address size.
835
795b8e6b
NC
8362013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
837
838 PR gas/15095
839 * config/tc-tic6x.c (tic6x_try_encode): Handle
840 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
841 encode register pair numbers when required.
842
ba86b375
WN
8432013-03-15 Will Newton <will.newton@linaro.org>
844
845 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
846 in vstr in Thumb mode for pre-ARMv7 cores.
847
9e6f3811
AS
8482013-03-14 Andreas Schwab <schwab@suse.de>
849
850 * doc/c-arc.texi (ARC Directives): Revert last change and use
851 @itemize instead of @table.
852 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
853
b10bf8c5
NC
8542013-03-14 Nick Clifton <nickc@redhat.com>
855
856 PR gas/15273
857 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
858 NULL message, instead just check ARM_CPU_IS_ANY directly.
859
ba724cfc
NC
8602013-03-14 Nick Clifton <nickc@redhat.com>
861
862 PR gas/15212
9e6f3811 863 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
864 for table format.
865 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
866 to the @item directives.
867 (ARM-Neon-Alignment): Move to correct place in the document.
868 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
869 formatting.
870 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
871 @smallexample.
872
531a94fd
SL
8732013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
874
875 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
876 case. Add default BAD_CASE to switch.
877
dad60f8e
SL
8782013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
879
880 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
881 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
882
dd5181d5
KT
8832013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
884
885 * config/tc-arm.c (crc_ext_armv8): New feature set.
886 (UNPRED_REG): New macro.
887 (do_crc32_1): New function.
888 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
889 do_crc32ch, do_crc32cw): Likewise.
890 (TUEc): New macro.
891 (insns): Add entries for crc32 mnemonics.
892 (arm_extensions): Add entry for crc.
893
8e723a10
CLT
8942013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
895
896 * write.h (struct fix): Add fx_dot_frag field.
897 (dot_frag): Declare.
898 * write.c (dot_frag): New variable.
899 (fix_new_internal): Set fx_dot_frag field with dot_frag.
900 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
901 * expr.c (expr): Save value of frag_now in dot_frag when setting
902 dot_value.
903 * read.c (emit_expr): Likewise. Delete comments.
904
be05d201
L
9052013-03-07 H.J. Lu <hongjiu.lu@intel.com>
906
907 * config/tc-i386.c (flag_code_names): Removed.
908 (i386_index_check): Rewrote.
909
62b0d0d5
YZ
9102013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
911
912 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
913 add comment.
914 (aarch64_double_precision_fmovable): New function.
915 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
916 function; handle hexadecimal representation of IEEE754 encoding.
917 (parse_operands): Update the call to parse_aarch64_imm_float.
918
165de32a
L
9192013-02-28 H.J. Lu <hongjiu.lu@intel.com>
920
921 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
922 (check_hle): Updated.
923 (md_assemble): Likewise.
924 (parse_insn): Likewise.
925
d5de92cf
L
9262013-02-28 H.J. Lu <hongjiu.lu@intel.com>
927
928 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 929 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
930 (parse_insn): Remove expecting_string_instruction. Set
931 i.rep_prefix.
932
e60bb1dd
YZ
9332013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
934
935 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
936
aeebdd9b
YZ
9372013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
938
939 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
940 for system registers.
941
4107ae22
DD
9422013-02-27 DJ Delorie <dj@redhat.com>
943
944 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
945 (rl78_op): Handle %code().
946 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
947 (tc_gen_reloc): Likwise; convert to a computed reloc.
948 (md_apply_fix): Likewise.
949
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NC
9502013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
951
952 * config/rl78-parse.y: Fix encoding of DIVWU insn.
953
70a8bc5b 9542013-02-25 Terry Guo <terry.guo@arm.com>
955
956 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
957 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
958 list of accepted CPUs.
959
5c111e37
L
9602013-02-19 H.J. Lu <hongjiu.lu@intel.com>
961
962 PR gas/15159
963 * config/tc-i386.c (cpu_arch): Add ".smap".
964
965 * doc/c-i386.texi: Document smap.
966
8a75745d
MR
9672013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
968
969 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
970 mips_assembling_insn appropriately.
971 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
972
79850f26
MR
9732013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
974
cf29fc61 975 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
976 extraneous braces.
977
4c261dff
NC
9782013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
979
5c111e37 980 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 981
ea33f281
NC
9822013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
983
984 * configure.tgt: Add nios2-*-rtems*.
985
a1ccaec9
YZ
9862013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
987
988 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
989 NULL.
990
0aa27725
RS
9912013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
992
993 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
994 (macro): Use it. Assert that trunc.w.s is not used for r5900.
995
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NC
9962013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
997
998 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
999 core.
1000
36591ba1 10012013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1002 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1003
1004 Based on patches from Altera Corporation.
1005
1006 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1007 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1008 * Makefile.in: Regenerated.
1009 * configure.tgt: Add case for nios2*-linux*.
1010 * config/obj-elf.c: Conditionally include elf/nios2.h.
1011 * config/tc-nios2.c: New file.
1012 * config/tc-nios2.h: New file.
1013 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1014 * doc/Makefile.in: Regenerated.
1015 * doc/all.texi: Set NIOSII.
1016 * doc/as.texinfo (Overview): Add Nios II options.
1017 (Machine Dependencies): Include c-nios2.texi.
1018 * doc/c-nios2.texi: New file.
1019 * NEWS: Note Altera Nios II support.
1020
94d4433a
AM
10212013-02-06 Alan Modra <amodra@gmail.com>
1022
1023 PR gas/14255
1024 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1025 Don't skip fixups with fx_subsy non-NULL.
1026 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1027 with fx_subsy non-NULL.
1028
ace9af6f
L
10292013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1030
1031 * doc/c-metag.texi: Add "@c man" markers.
1032
89d67ed9
AM
10332013-02-04 Alan Modra <amodra@gmail.com>
1034
1035 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1036 related code.
1037 (TC_ADJUST_RELOC_COUNT): Delete.
1038 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1039
89072bd6
AM
10402013-02-04 Alan Modra <amodra@gmail.com>
1041
1042 * po/POTFILES.in: Regenerate.
1043
f9b2d544
NC
10442013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1045
1046 * config/tc-metag.c: Make SWAP instruction less permissive with
1047 its operands.
1048
392ca752
DD
10492013-01-29 DJ Delorie <dj@redhat.com>
1050
1051 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1052 relocs in .word/.etc statements.
1053
427d0db6
RM
10542013-01-29 Roland McGrath <mcgrathr@google.com>
1055
1056 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1057 immediate value for 8-bit offset" error so it shows line info.
1058
4faf939a
JM
10592013-01-24 Joseph Myers <joseph@codesourcery.com>
1060
1061 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1062 for 64-bit output.
1063
78c8d46c
NC
10642013-01-24 Nick Clifton <nickc@redhat.com>
1065
1066 * config/tc-v850.c: Add support for e3v5 architecture.
1067 * doc/c-v850.texi: Mention new support.
1068
fb5b7503
NC
10692013-01-23 Nick Clifton <nickc@redhat.com>
1070
1071 PR gas/15039
1072 * config/tc-avr.c: Include dwarf2dbg.h.
1073
8ce3d284
L
10742013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1075
1076 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1077 (tc_i386_fix_adjustable): Likewise.
1078 (lex_got): Likewise.
1079 (tc_gen_reloc): Likewise.
1080
f5555712
YZ
10812013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1082
1083 * config/tc-aarch64.c (output_operand_error_record): Change to output
1084 the out-of-range error message as value-expected message if there is
1085 only one single value in the expected range.
1086 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1087 LSL #0 as a programmer-friendly feature.
1088
8fd4256d
L
10892013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1090
1091 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1092 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1093 BFD_RELOC_64_SIZE relocations.
1094 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1095 for it.
1096 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1097 relocations against local symbols.
1098
a5840dce
AM
10992013-01-16 Alan Modra <amodra@gmail.com>
1100
1101 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1102 finding some sort of toc syntax error, and break to avoid
1103 compiler uninit warning.
1104
af89796a
L
11052013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1106
1107 PR gas/15019
1108 * config/tc-i386.c (lex_got): Increment length by 1 if the
1109 relocation token is removed.
1110
dd42f060
NC
11112013-01-15 Nick Clifton <nickc@redhat.com>
1112
1113 * config/tc-v850.c (md_assemble): Allow signed values for
1114 V850E_IMMEDIATE.
1115
464e3686
SK
11162013-01-11 Sean Keys <skeys@ipdatasys.com>
1117
1118 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1119 git to cvs.
464e3686 1120
5817ffd1
PB
11212013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1122
1123 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1124 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1125 * config/tc-ppc.c (md_show_usage): Likewise.
1126 (ppc_handle_align): Handle power8's group ending nop.
1127
f4b1f6a9
SK
11282013-01-10 Sean Keys <skeys@ipdatasys.com>
1129
1130 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1131 that the assember exits after the opcodes have been printed.
f4b1f6a9 1132
34bca508
L
11332013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1134
1135 * app.c: Remove trailing white spaces.
1136 * as.c: Likewise.
1137 * as.h: Likewise.
1138 * cond.c: Likewise.
1139 * dw2gencfi.c: Likewise.
1140 * dwarf2dbg.h: Likewise.
1141 * ecoff.c: Likewise.
1142 * input-file.c: Likewise.
1143 * itbl-lex.h: Likewise.
1144 * output-file.c: Likewise.
1145 * read.c: Likewise.
1146 * sb.c: Likewise.
1147 * subsegs.c: Likewise.
1148 * symbols.c: Likewise.
1149 * write.c: Likewise.
1150 * config/tc-i386.c: Likewise.
1151 * doc/Makefile.am: Likewise.
1152 * doc/Makefile.in: Likewise.
1153 * doc/c-aarch64.texi: Likewise.
1154 * doc/c-alpha.texi: Likewise.
1155 * doc/c-arc.texi: Likewise.
1156 * doc/c-arm.texi: Likewise.
1157 * doc/c-avr.texi: Likewise.
1158 * doc/c-bfin.texi: Likewise.
1159 * doc/c-cr16.texi: Likewise.
1160 * doc/c-d10v.texi: Likewise.
1161 * doc/c-d30v.texi: Likewise.
1162 * doc/c-h8300.texi: Likewise.
1163 * doc/c-hppa.texi: Likewise.
1164 * doc/c-i370.texi: Likewise.
1165 * doc/c-i386.texi: Likewise.
1166 * doc/c-i860.texi: Likewise.
1167 * doc/c-m32c.texi: Likewise.
1168 * doc/c-m32r.texi: Likewise.
1169 * doc/c-m68hc11.texi: Likewise.
1170 * doc/c-m68k.texi: Likewise.
1171 * doc/c-microblaze.texi: Likewise.
1172 * doc/c-mips.texi: Likewise.
1173 * doc/c-msp430.texi: Likewise.
1174 * doc/c-mt.texi: Likewise.
1175 * doc/c-s390.texi: Likewise.
1176 * doc/c-score.texi: Likewise.
1177 * doc/c-sh.texi: Likewise.
1178 * doc/c-sh64.texi: Likewise.
1179 * doc/c-tic54x.texi: Likewise.
1180 * doc/c-tic6x.texi: Likewise.
1181 * doc/c-v850.texi: Likewise.
1182 * doc/c-xc16x.texi: Likewise.
1183 * doc/c-xgate.texi: Likewise.
1184 * doc/c-xtensa.texi: Likewise.
1185 * doc/c-z80.texi: Likewise.
1186 * doc/internals.texi: Likewise.
1187
4c665b71
RM
11882013-01-10 Roland McGrath <mcgrathr@google.com>
1189
1190 * hash.c (hash_new_sized): Make it global.
1191 * hash.h: Declare it.
1192 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1193 pass a small size.
1194
a3c62988
NC
11952013-01-10 Will Newton <will.newton@imgtec.com>
1196
1197 * Makefile.am: Add Meta.
1198 * Makefile.in: Regenerate.
1199 * config/tc-metag.c: New file.
1200 * config/tc-metag.h: New file.
1201 * configure.tgt: Add Meta.
1202 * doc/Makefile.am: Add Meta.
1203 * doc/Makefile.in: Regenerate.
1204 * doc/all.texi: Add Meta.
1205 * doc/as.texiinfo: Document Meta options.
1206 * doc/c-metag.texi: New file.
1207
b37df7c4
SE
12082013-01-09 Steve Ellcey <sellcey@mips.com>
1209
1210 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1211 calls.
1212 * config/tc-mips.c (internalError): Remove, replace with abort.
1213
a3251895
YZ
12142013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1215
1216 * config/tc-aarch64.c (parse_operands): Change to compare the result
1217 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1218
8ab8155f
NC
12192013-01-07 Nick Clifton <nickc@redhat.com>
1220
1221 PR gas/14887
1222 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1223 anticipated character.
1224 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1225 here as it is no longer needed.
1226
a4ac1c42
AS
12272013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1228
1229 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1230 * doc/c-score.texi (SCORE-Opts): Likewise.
1231 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1232
e407c74b
NC
12332013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1234
1235 * config/tc-mips.c: Add support for MIPS r5900.
1236 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1237 lq and sq.
1238 (can_swap_branch_p, get_append_method): Detect some conditional
1239 short loops to fix a bug on the r5900 by NOP in the branch delay
1240 slot.
1241 (M_MUL): Support 3 operands in multu on r5900.
1242 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1243 (s_mipsset): Force 32 bit floating point on r5900.
1244 (mips_ip): Check parameter range of instructions mfps and mtps on
1245 r5900.
1246 * configure.in: Detect CPU type when target string contains r5900
1247 (e.g. mips64r5900el-linux-gnu).
1248
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L
12492013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1250
1251 * as.c (parse_args): Update copyright year to 2013.
1252
95830fd1
YZ
12532013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1254
1255 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1256 and "cortex57".
1257
517bb291 12582013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1259
517bb291
NC
1260 PR gas/14987
1261 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1262 closing bracket.
d709e4e6 1263
517bb291 1264For older changes see ChangeLog-2012
08d56133 1265\f
517bb291 1266Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1267
1268Copying and distribution of this file, with or without modification,
1269are permitted in any medium without royalty provided the copyright
1270notice and this notice are preserved.
1271
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1272Local Variables:
1273mode: change-log
1274left-margin: 8
1275fill-column: 74
1276version-control: never
1277End: