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* config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
2
3 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
4 * doc/c-avr.texi: Likewise.
5
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62013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
9 error with older GCCs.
10 (mips16_macro_build): Dereference args.
11
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122013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
13
14 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
15 New functions, split out from...
16 (reg_lookup): ...here. Remove itbl support.
17 (reglist_lookup): Delete.
18 (mips_operand_token_type): New enum.
19 (mips_operand_token): New structure.
20 (mips_operand_tokens): New variable.
21 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
22 (mips_parse_arguments): New functions.
23 (md_begin): Initialize mips_operand_tokens.
24 (mips_arg_info): Add a token field. Remove optional_reg field.
25 (match_char, match_expression): New functions.
26 (match_const_int): Use match_expression. Remove "s" argument
27 and return a boolean result. Remove O_register handling.
28 (match_regno, match_reg, match_reg_range): New functions.
29 (match_int_operand, match_mapped_int_operand, match_msb_operand)
30 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
31 (match_addiusp_operand, match_clo_clz_dest_operand)
32 (match_lwm_swm_list_operand, match_entry_exit_operand)
33 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
34 (match_tied_reg_operand): Remove "s" argument and return a boolean
35 result. Match tokens rather than text. Update calls to
36 match_const_int. Rely on match_regno to call check_regno.
37 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
38 "arg" argument. Return a boolean result.
39 (parse_float_constant): Replace with...
40 (match_float_constant): ...this new function.
41 (match_operand): Remove "s" argument and return a boolean result.
42 Update calls to subfunctions.
43 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
44 rather than string-parsing routines. Update handling of optional
45 registers for token scheme.
46
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472013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (parse_float_constant): Split out from...
50 (mips_ip): ...here.
51
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522013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
55 Delete.
56
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572013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
60 (match_entry_exit_operand): New function.
61 (match_save_restore_list_operand): Likewise.
62 (match_operand): Use them.
63 (check_absolute_expr): Delete.
64 (mips16_ip): Rewrite main parsing loop to use mips_operands.
65
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662013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
67
68 * config/tc-mips.c: Enable functions commented out in previous patch.
69 (SKIP_SPACE_TABS): Move further up file.
70 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
71 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
72 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
73 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
74 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
75 (micromips_imm_b_map, micromips_imm_c_map): Delete.
76 (mips_lookup_reg_pair): Delete.
77 (macro): Use report_bad_range and report_bad_field.
78 (mips_immed, expr_const_in_range): Delete.
79 (mips_ip): Rewrite main parsing loop to use new functions.
80
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812013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
82
83 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
84 Change return type to bfd_boolean.
85 (report_bad_range, report_bad_field): New functions.
86 (mips_arg_info): New structure.
87 (match_const_int, convert_reg_type, check_regno, match_int_operand)
88 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
89 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
90 (match_addiusp_operand, match_clo_clz_dest_operand)
91 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
92 (match_pc_operand, match_tied_reg_operand, match_operand)
93 (check_completed_insn): New functions, commented out for now.
94
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952013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
96
97 * config/tc-mips.c (insn_insert_operand): New function.
98 (macro_build, mips16_macro_build): Put null character check
99 in the for loop and convert continues to breaks. Use operand
100 structures to handle constant operands.
101
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1022013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * config/tc-mips.c (validate_mips_insn): Move further up file.
105 Add insn_bits and decode_operand arguments. Use the mips_operand
106 fields to work out which bits an operand occupies. Detect double
107 definitions.
108 (validate_micromips_insn): Move further up file. Call into
109 validate_mips_insn.
110
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1112013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
114
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1152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
118 and "~".
119 (macro): Update accordingly.
120
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1212013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
122
123 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
124 (imm_reloc): Delete.
125 (md_assemble): Remove imm_reloc handling.
126 (mips_ip): Update commentary. Use offset_expr and offset_reloc
127 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
128 Use a temporary array rather than imm_reloc when parsing
129 constant expressions. Remove imm_reloc initialization.
130 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
131 for the relaxable field. Use a relax_char variable to track the
132 type of this field. Remove imm_reloc initialization.
133
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1342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
135
136 * config/tc-mips.c (mips16_ip): Handle "I".
137
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1382013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
139
140 * config/tc-mips.c (mips_flag_nan2008): New variable.
141 (options): Add OPTION_NAN enum value.
142 (md_longopts): Handle it.
143 (md_parse_option): Likewise.
144 (s_nan): New function.
145 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
146 (md_show_usage): Add -mnan.
147
148 * doc/as.texinfo (Overview): Add -mnan.
149 * doc/c-mips.texi (MIPS Opts): Document -mnan.
150 (MIPS NaN Encodings): New node. Document .nan directive.
151 (MIPS-Dependent): List the new node.
152
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1532013-07-09 Tristan Gingold <gingold@adacore.com>
154
155 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
156
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1572013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
158
159 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
160 for 'A' and assume that the constant has been elided if the result
161 is an O_register.
162
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1632013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (gprel16_reloc_p): New function.
166 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
167 BFD_RELOC_UNUSED.
168 (offset_high_part, small_offset_p): New functions.
169 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
170 register load and store macros, handle the 16-bit offset case first.
171 If a 16-bit offset is not suitable for the instruction we're
172 generating, load it into the temporary register using
173 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
174 M_L_DAB code once the address has been constructed. For double load
175 and store macros, again handle the 16-bit offset case first.
176 If the second register cannot be accessed from the same high
177 part as the first, load it into AT using ADDRESS_ADDI_INSN.
178 Fix the handling of LD in cases where the first register is the
179 same as the base. Also handle the case where the offset is
180 not 16 bits and the second register cannot be accessed from the
181 same high part as the first. For unaligned loads and stores,
182 fuse the offbits == 12 and old "ab" handling. Apply this handling
183 whenever the second offset needs a different high part from the first.
184 Construct the offset using ADDRESS_ADDI_INSN where possible,
185 for offbits == 16 as well as offbits == 12. Use offset_reloc
186 when constructing the individual loads and stores.
187 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
188 and offset_reloc before matching against a particular opcode.
189 Handle elided 'A' constants. Allow 'A' constants to use
190 relocation operators.
191
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1922013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
193
194 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
195 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
196 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
197
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1982013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
199
200 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
201 Require the msb to be <= 31 for "+s". Check that the size is <= 31
202 for both "+s" and "+S".
203
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2042013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
205
206 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
207 (mips_ip, mips16_ip): Handle "+i".
208
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2092013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
210
211 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
212 (micromips_to_32_reg_h_map): Rename to...
213 (micromips_to_32_reg_h_map1): ...this.
214 (micromips_to_32_reg_i_map): Rename to...
215 (micromips_to_32_reg_h_map2): ...this.
216 (mips_lookup_reg_pair): New function.
217 (gpr_write_mask, macro): Adjust after above renaming.
218 (validate_micromips_insn): Remove "mi" handling.
219 (mips_ip): Likewise. Parse both registers in a pair for "mh".
220
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2212013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
222
223 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
224 (mips_ip): Remove "+D" and "+T" handling.
225
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2262013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
227
228 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
229 relocs.
230
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2312013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
232
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233 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
234
2352013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
236
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237 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
238 (aarch64_force_relocation): Likewise.
239
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2402013-07-02 Alan Modra <amodra@gmail.com>
241
242 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
243
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2442013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
245
246 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
247 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
248 Replace @sc{mips16} with literal `MIPS16'.
249 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
250
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2512013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
252
253 * config/tc-aarch64.c (reloc_table): Replace
254 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
255 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
256 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
257 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
258 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
259 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
260 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
261 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
262 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
263 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
264 (aarch64_force_relocation): Likewise.
265
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2662013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
267
268 * config/tc-aarch64.c (ilp32_p): New static variable.
269 (elf64_aarch64_target_format): Return the target according to the
270 value of 'ilp32_p'.
271 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
272 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
273 (aarch64_dwarf2_addr_size): New function.
274 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
275 (DWARF2_ADDR_SIZE): New define.
276
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2772013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
280
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2812013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
282
283 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
284
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2852013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
286
287 * config/tc-mips.c (mips_set_options): Add insn32 member.
288 (mips_opts): Initialize it.
289 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
290 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
291 (md_longopts): Add "minsn32" and "mno-insn32" options.
292 (is_size_valid): Handle insn32 mode.
293 (md_assemble): Pass instruction string down to macro.
294 (brk_fmt): Add second dimension and insn32 mode initializers.
295 (mfhl_fmt): Likewise.
296 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
297 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
298 (macro_build_jalr, move_register): Handle insn32 mode.
299 (macro_build_branch_rs): Likewise.
300 (macro): Handle insn32 mode.
301 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
302 (mips_ip): Handle insn32 mode.
303 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
304 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
305 (mips_handle_align): Handle insn32 mode.
306 (md_show_usage): Add -minsn32 and -mno-insn32.
307
308 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
309 -mno-insn32 options.
310 (-minsn32, -mno-insn32): New options.
311 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
312 options.
313 (MIPS assembly options): New node. Document .set insn32 and
314 .set noinsn32.
315 (MIPS-Dependent): List the new node.
316
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3172013-06-25 Nick Clifton <nickc@redhat.com>
318
319 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
320 the PC in indirect addressing on 430xv2 parts.
321 (msp430_operands): Add version test to hardware bug encoding
322 restrictions.
323
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3242013-06-24 Roland McGrath <mcgrathr@google.com>
325
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326 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
327 so it skips whitespace before it.
328 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
329
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330 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
331 (arm_reg_parse_multi): Skip whitespace first.
332 (parse_reg_list): Likewise.
333 (parse_vfp_reg_list): Likewise.
334 (s_arm_unwind_save_mmxwcg): Likewise.
335
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3362013-06-24 Nick Clifton <nickc@redhat.com>
337
338 PR gas/15623
339 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
340
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3412013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
344
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3452013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
346
347 * config/tc-mips.c: Assert that offsetT and valueT are at least
348 8 bytes in size.
349 (GPR_SMIN, GPR_SMAX): New macros.
350 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
351
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3522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
353
354 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
355 conditions. Remove any code deselected by them.
356 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
357
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3582013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
359
360 * NEWS: Note removal of ECOFF support.
361 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
362 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
363 (MULTI_CFILES): Remove config/e-mipsecoff.c.
364 * Makefile.in: Regenerate.
365 * configure.in: Remove MIPS ECOFF references.
366 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
367 Delete cases.
368 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
369 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
370 (mips-*-*): ...this single case.
371 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
372 MIPS emulations to be e-mipself*.
373 * configure: Regenerate.
374 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
375 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
376 (mips-*-sysv*): Remove coff and ecoff cases.
377 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
378 * ecoff.c: Remove reference to MIPS ECOFF.
379 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
380 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
381 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
382 (mips_hi_fixup): Tweak comment.
383 (append_insn): Require a howto.
384 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
385
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3862013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
387
388 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
389 Use "CPU" instead of "cpu".
390 * doc/c-mips.texi: Likewise.
391 (MIPS Opts): Rename to MIPS Options.
392 (MIPS option stack): Rename to MIPS Option Stack.
393 (MIPS ASE instruction generation overrides): Rename to
394 MIPS ASE Instruction Generation Overrides (for now).
395 (MIPS floating-point): Rename to MIPS Floating-Point.
396
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3972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
398
399 * doc/c-mips.texi (MIPS Macros): New section.
400 (MIPS Object): Replace with...
401 (MIPS Small Data): ...this new section.
402
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4032013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
404
405 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
406 Capitalize name. Use @kindex instead of @cindex for .set entries.
407
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4082013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
409
410 * doc/c-mips.texi (MIPS Stabs): Remove section.
411
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4122013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
413
414 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
415 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
416 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
417 (ISA_SUPPORTS_VIRT64_ASE): Delete.
418 (mips_ase): New structure.
419 (mips_ases): New table.
420 (FP64_ASES): New macro.
421 (mips_ase_groups): New array.
422 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
423 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
424 functions.
425 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
426 (md_parse_option): Use mips_ases and mips_set_ase instead of
427 separate case statements for each ASE option.
428 (mips_after_parse_args): Use FP64_ASES. Use
429 mips_check_isa_supports_ases to check the ASEs against
430 other options.
431 (s_mipsset): Use mips_ases and mips_set_ase instead of
432 separate if statements for each ASE option. Use
433 mips_check_isa_supports_ases, even when a non-ASE option
434 is specified.
435
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4362013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
437
438 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
439
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4402013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
441
442 * config/tc-mips.c (md_shortopts, options, md_longopts)
443 (md_longopts_size): Move earlier in file.
444
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4452013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
446
447 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
448 with a single "ase" bitmask.
449 (mips_opts): Update accordingly.
450 (file_ase, file_ase_explicit): New variables.
451 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
452 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
453 (ISA_HAS_ROR): Adjust for mips_set_options change.
454 (is_opcode_valid): Take the base ase mask directly from mips_opts.
455 (mips_ip): Adjust for mips_set_options change.
456 (md_parse_option): Likewise. Update file_ase_explicit.
457 (mips_after_parse_args): Adjust for mips_set_options change.
458 Use bitmask operations to select the default ASEs. Set file_ase
459 rather than individual per-ASE variables.
460 (s_mipsset): Adjust for mips_set_options change.
461 (mips_elf_final_processing): Test file_ase rather than
462 file_ase_mdmx. Remove commented-out code.
463
d16afab6
RS
4642013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
465
466 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
467 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
468 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
469 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
470 (mips_after_parse_args): Use the new "ase" field to choose
471 the default ASEs.
472 (mips_cpu_info_table): Move ASEs from the "flags" field to the
473 "ase" field.
474
e83a675f
RE
4752013-06-18 Richard Earnshaw <rearnsha@arm.com>
476
477 * config/tc-arm.c (symbol_preemptible): New function.
478 (relax_branch): Use it.
479
7f3c4072
CM
4802013-06-17 Catherine Moore <clm@codesourcery.com>
481 Maciej W. Rozycki <macro@codesourcery.com>
482 Chao-Ying Fu <fu@mips.com>
483
484 * config/tc-mips.c (mips_set_options): Add ase_eva.
485 (mips_set_options mips_opts): Add ase_eva.
486 (file_ase_eva): Declare.
487 (ISA_SUPPORTS_EVA_ASE): Define.
488 (IS_SEXT_9BIT_NUM): Define.
489 (MIPS_CPU_ASE_EVA): Define.
490 (is_opcode_valid): Add support for ase_eva.
491 (macro_build): Likewise.
492 (macro): Likewise.
493 (validate_mips_insn): Likewise.
494 (validate_micromips_insn): Likewise.
495 (mips_ip): Likewise.
496 (options): Add OPTION_EVA and OPTION_NO_EVA.
497 (md_longopts): Add -meva and -mno-eva.
498 (md_parse_option): Process new options.
499 (mips_after_parse_args): Check for valid EVA combinations.
500 (s_mipsset): Likewise.
501
e410add4
RS
5022013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
503
504 * dwarf2dbg.h (dwarf2_move_insn): Declare.
505 * dwarf2dbg.c (line_subseg): Add pmove_tail.
506 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
507 (dwarf2_gen_line_info_1): Update call accordingly.
508 (dwarf2_move_insn): New function.
509 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
510
6a50d470
RS
5112013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
512
513 Revert:
514
515 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
516
517 PR gas/13024
518 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
519 (dwarf2_gen_line_info_1): Delete.
520 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
521 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
522 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
523 (dwarf2_directive_loc): Push previous .locs instead of generating
524 them immediately.
525
f122319e
CF
5262013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
527
528 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
529 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
530
909c7f9c
NC
5312013-06-13 Nick Clifton <nickc@redhat.com>
532
533 PR gas/15602
534 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
535 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
536 function. Generates an error if the adjusted offset is out of a
537 16-bit range.
538
5d5755a7
SL
5392013-06-12 Sandra Loosemore <sandra@codesourcery.com>
540
541 * config/tc-nios2.c (md_apply_fix): Mask constant
542 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
543
3bf0dbfb
MR
5442013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
545
546 * config/tc-mips.c (append_insn): Don't do branch relaxation for
547 MIPS-3D instructions either.
548 (md_convert_frag): Update the COPx branch mask accordingly.
549
550 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
551 option.
552 * doc/as.texinfo (Overview): Add --relax-branch and
553 --no-relax-branch.
554 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
555 --no-relax-branch.
556
9daf7bab
SL
5572013-06-09 Sandra Loosemore <sandra@codesourcery.com>
558
559 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
560 omitted.
561
d301a56b
RS
5622013-06-08 Catherine Moore <clm@codesourcery.com>
563
564 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
565 (is_opcode_valid_16): Pass ase value to opcode_is_member.
566 (append_insn): Change INSN_xxxx to ASE_xxxx.
567
7bab7634
DC
5682013-06-01 George Thomas <george.thomas@atmel.com>
569
570 * gas/config/tc-avr.c: Change ISA for devices with USB support to
571 AVR_ISA_XMEGAU
572
f60cf82f
L
5732013-05-31 H.J. Lu <hongjiu.lu@intel.com>
574
575 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
576 for ELF.
577
a3f278e2
CM
5782013-05-31 Paul Brook <paul@codesourcery.com>
579
580 gas/
581 * config/tc-mips.c (s_ehword): New.
582
067ec077
CM
5832013-05-30 Paul Brook <paul@codesourcery.com>
584
585 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
586
d6101ac2
MR
5872013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
588
589 * write.c (resolve_reloc_expr_symbols): On REL targets don't
590 convert relocs who have no relocatable field either. Rephrase
591 the conditional so that the PC-relative check is only applied
592 for REL targets.
593
f19ccbda
MR
5942013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
595
596 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
597 calculation.
598
418009c2
YZ
5992013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
600
601 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 602 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
603 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
604 (md_apply_fix): Likewise.
605 (aarch64_force_relocation): Likewise.
606
0a8897c7
KT
6072013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
608
609 * config/tc-arm.c (it_fsm_post_encode): Improve
610 warning messages about deprecated IT block formats.
611
89d2a2a3
MS
6122013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
613
614 * config/tc-aarch64.c (md_apply_fix): Move value range checking
615 inside fx_done condition.
616
c77c0862
RS
6172013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
618
619 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
620
c0637f3a
PB
6212013-05-20 Peter Bergner <bergner@vnet.ibm.com>
622
623 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
624 and clean up warning when using PRINT_OPCODE_TABLE.
625
5656a981
AM
6262013-05-20 Alan Modra <amodra@gmail.com>
627
628 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
629 and data fixups performing shift/high adjust/sign extension on
630 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
631 when writing data fixups rather than recalculating size.
632
997b26e8
JBG
6332013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
634
635 * doc/c-msp430.texi: Fix typo.
636
9f6e76f4
TG
6372013-05-16 Tristan Gingold <gingold@adacore.com>
638
639 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
640 are also TOC symbols.
641
638d3803
NC
6422013-05-16 Nick Clifton <nickc@redhat.com>
643
644 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
645 Add -mcpu command to specify core type.
997b26e8 646 * doc/c-msp430.texi: Update documentation.
638d3803 647
b015e599
AP
6482013-05-09 Andrew Pinski <apinski@cavium.com>
649
650 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
651 (mips_opts): Update for the new field.
652 (file_ase_virt): New variable.
653 (ISA_SUPPORTS_VIRT_ASE): New macro.
654 (ISA_SUPPORTS_VIRT64_ASE): New macro.
655 (MIPS_CPU_ASE_VIRT): New define.
656 (is_opcode_valid): Handle ase_virt.
657 (macro_build): Handle "+J".
658 (validate_mips_insn): Likewise.
659 (mips_ip): Likewise.
660 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
661 (md_longopts): Add mvirt and mnovirt
662 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
663 (mips_after_parse_args): Handle ase_virt field.
664 (s_mipsset): Handle "virt" and "novirt".
665 (mips_elf_final_processing): Add a comment about virt ASE might need
666 a new flag.
667 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
668 * doc/c-mips.texi: Document -mvirt and -mno-virt.
669 Document ".set virt" and ".set novirt".
670
da8094d7
AM
6712013-05-09 Alan Modra <amodra@gmail.com>
672
673 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
674 control of operand flag bits.
675
c5f8c205
AM
6762013-05-07 Alan Modra <amodra@gmail.com>
677
678 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
679 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
680 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
681 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
682 (md_apply_fix): Set fx_no_overflow for assorted relocations.
683 Shift and sign-extend fieldval for use by some VLE reloc
684 operand->insert functions.
685
b47468a6
CM
6862013-05-06 Paul Brook <paul@codesourcery.com>
687 Catherine Moore <clm@codesourcery.com>
688
c5f8c205
AM
689 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
690 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
691 (md_apply_fix): Likewise.
692 (tc_gen_reloc): Likewise.
693
2de39019
CM
6942013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
695
696 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
697 (mips_fix_adjustable): Adjust pc-relative check to use
698 limited_pc_reloc_p.
699
754e2bb9
RS
7002013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
701
702 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
703 (s_mips_stab): Do not restrict to stabn only.
704
13761a11
NC
7052013-05-02 Nick Clifton <nickc@redhat.com>
706
707 * config/tc-msp430.c: Add support for the MSP430X architecture.
708 Add code to insert a NOP instruction after any instruction that
709 might change the interrupt state.
710 Add support for the LARGE memory model.
711 Add code to initialise the .MSP430.attributes section.
712 * config/tc-msp430.h: Add support for the MSP430X architecture.
713 * doc/c-msp430.texi: Document the new -mL and -mN command line
714 options.
715 * NEWS: Mention support for the MSP430X architecture.
716
df26367c
MR
7172013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
718
719 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
720 alpha*-*-linux*ecoff*.
721
f02d8318
CF
7222013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
723
724 * config/tc-mips.c (mips_ip): Add sizelo.
725 For "+C", "+G", and "+H", set sizelo and compare against it.
726
b40bf0a2
NC
7272013-04-29 Nick Clifton <nickc@redhat.com>
728
729 * as.c (Options): Add -gdwarf-sections.
730 (parse_args): Likewise.
731 * as.h (flag_dwarf_sections): Declare.
732 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
733 (process_entries): When -gdwarf-sections is enabled generate
734 fragmentary .debug_line sections.
735 (out_debug_line): Set the section for the .debug_line section end
736 symbol.
737 * doc/as.texinfo: Document -gdwarf-sections.
738 * NEWS: Mention -gdwarf-sections.
739
8eeccb77 7402013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
741
742 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
743 according to the target parameter. Don't call s_segm since s_segm
744 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
745 initialized yet.
746 (md_begin): Call s_segm according to target parameter from command
747 line.
748
49926cd0
AM
7492013-04-25 Alan Modra <amodra@gmail.com>
750
751 * configure.in: Allow little-endian linux.
752 * configure: Regenerate.
753
e3031850
SL
7542013-04-24 Sandra Loosemore <sandra@codesourcery.com>
755
756 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
757 "fstatus" control register to "eccinj".
758
cb948fc0
KT
7592013-04-19 Kai Tietz <ktietz@redhat.com>
760
761 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
762
4455e9ad
JB
7632013-04-15 Julian Brown <julian@codesourcery.com>
764
765 * expr.c (add_to_result, subtract_from_result): Make global.
766 * expr.h (add_to_result, subtract_from_result): Add prototypes.
767 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
768 subtract_from_result to handle extra bit of precision for .sleb128
769 directive operands.
770
956a6ba3
JB
7712013-04-10 Julian Brown <julian@codesourcery.com>
772
773 * read.c (convert_to_bignum): Add sign parameter. Use it
774 instead of X_unsigned to determine sign of resulting bignum.
775 (emit_expr): Pass extra argument to convert_to_bignum.
776 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
777 X_extrabit to convert_to_bignum.
778 (parse_bitfield_cons): Set X_extrabit.
779 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
780 Initialise X_extrabit field as appropriate.
781 (add_to_result): New.
782 (subtract_from_result): New.
783 (expr): Use above.
784 * expr.h (expressionS): Add X_extrabit field.
785
eb9f3f00
JB
7862013-04-10 Jan Beulich <jbeulich@suse.com>
787
788 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
789 register being PC when is_t or writeback, and use distinct
790 diagnostic for the latter case.
791
ccb84d65
JB
7922013-04-10 Jan Beulich <jbeulich@suse.com>
793
794 * gas/config/tc-arm.c (parse_operands): Re-write
795 po_barrier_or_imm().
796 (do_barrier): Remove bogus constraint().
797 (do_t_barrier): Remove.
798
4d13caa0
NC
7992013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
800
801 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
802 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
803 ATmega2564RFR2
804 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
805
16d02dc9
JB
8062013-04-09 Jan Beulich <jbeulich@suse.com>
807
808 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
809 Use local variable Rt in more places.
810 (do_vmsr): Accept all control registers.
811
05ac0ffb
JB
8122013-04-09 Jan Beulich <jbeulich@suse.com>
813
814 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
815 if there was none specified for moves between scalar and core
816 register.
817
2d51fb74
JB
8182013-04-09 Jan Beulich <jbeulich@suse.com>
819
820 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
821 NEON_ALL_LANES case.
822
94dcf8bf
JB
8232013-04-08 Jan Beulich <jbeulich@suse.com>
824
825 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
826 PC-relative VSTR.
827
1472d06f
JB
8282013-04-08 Jan Beulich <jbeulich@suse.com>
829
830 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
831 entry to sp_fiq.
832
0c76cae8
AM
8332013-04-03 Alan Modra <amodra@gmail.com>
834
835 * doc/as.texinfo: Add support to generate man options for h8300.
836 * doc/c-h8300.texi: Likewise.
837
92eb40d9
RR
8382013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
839
840 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
841 Cortex-A57.
842
51dcdd4d
NC
8432013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
844
845 PR binutils/15068
846 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
847
c5d685bf
NC
8482013-03-26 Nick Clifton <nickc@redhat.com>
849
9b978282
NC
850 PR gas/15295
851 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
852 start of the file each time.
853
c5d685bf
NC
854 PR gas/15178
855 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
856 FreeBSD targets.
857
9699c833
TG
8582013-03-26 Douglas B Rupp <rupp@gnat.com>
859
860 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
861 after fixup.
862
4755303e
WN
8632013-03-21 Will Newton <will.newton@linaro.org>
864
865 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
866 pc-relative str instructions in Thumb mode.
867
81f5558e
NC
8682013-03-21 Michael Schewe <michael.schewe@gmx.net>
869
870 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
871 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
872 R_H8_DISP32A16.
873 * config/tc-h8300.h: Remove duplicated defines.
874
71863e73
NC
8752013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
876
877 PR gas/15282
878 * tc-avr.c (mcu_has_3_byte_pc): New function.
879 (tc_cfi_frame_initial_instructions): Call it to find return
880 address size.
881
795b8e6b
NC
8822013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
883
884 PR gas/15095
885 * config/tc-tic6x.c (tic6x_try_encode): Handle
886 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
887 encode register pair numbers when required.
888
ba86b375
WN
8892013-03-15 Will Newton <will.newton@linaro.org>
890
891 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
892 in vstr in Thumb mode for pre-ARMv7 cores.
893
9e6f3811
AS
8942013-03-14 Andreas Schwab <schwab@suse.de>
895
896 * doc/c-arc.texi (ARC Directives): Revert last change and use
897 @itemize instead of @table.
898 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
899
b10bf8c5
NC
9002013-03-14 Nick Clifton <nickc@redhat.com>
901
902 PR gas/15273
903 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
904 NULL message, instead just check ARM_CPU_IS_ANY directly.
905
ba724cfc
NC
9062013-03-14 Nick Clifton <nickc@redhat.com>
907
908 PR gas/15212
9e6f3811 909 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
910 for table format.
911 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
912 to the @item directives.
913 (ARM-Neon-Alignment): Move to correct place in the document.
914 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
915 formatting.
916 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
917 @smallexample.
918
531a94fd
SL
9192013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
920
921 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
922 case. Add default BAD_CASE to switch.
923
dad60f8e
SL
9242013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
925
926 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
927 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
928
dd5181d5
KT
9292013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
930
931 * config/tc-arm.c (crc_ext_armv8): New feature set.
932 (UNPRED_REG): New macro.
933 (do_crc32_1): New function.
934 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
935 do_crc32ch, do_crc32cw): Likewise.
936 (TUEc): New macro.
937 (insns): Add entries for crc32 mnemonics.
938 (arm_extensions): Add entry for crc.
939
8e723a10
CLT
9402013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
941
942 * write.h (struct fix): Add fx_dot_frag field.
943 (dot_frag): Declare.
944 * write.c (dot_frag): New variable.
945 (fix_new_internal): Set fx_dot_frag field with dot_frag.
946 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
947 * expr.c (expr): Save value of frag_now in dot_frag when setting
948 dot_value.
949 * read.c (emit_expr): Likewise. Delete comments.
950
be05d201
L
9512013-03-07 H.J. Lu <hongjiu.lu@intel.com>
952
953 * config/tc-i386.c (flag_code_names): Removed.
954 (i386_index_check): Rewrote.
955
62b0d0d5
YZ
9562013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
957
958 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
959 add comment.
960 (aarch64_double_precision_fmovable): New function.
961 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
962 function; handle hexadecimal representation of IEEE754 encoding.
963 (parse_operands): Update the call to parse_aarch64_imm_float.
964
165de32a
L
9652013-02-28 H.J. Lu <hongjiu.lu@intel.com>
966
967 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
968 (check_hle): Updated.
969 (md_assemble): Likewise.
970 (parse_insn): Likewise.
971
d5de92cf
L
9722013-02-28 H.J. Lu <hongjiu.lu@intel.com>
973
974 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 975 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
976 (parse_insn): Remove expecting_string_instruction. Set
977 i.rep_prefix.
978
e60bb1dd
YZ
9792013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
980
981 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
982
aeebdd9b
YZ
9832013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
984
985 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
986 for system registers.
987
4107ae22
DD
9882013-02-27 DJ Delorie <dj@redhat.com>
989
990 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
991 (rl78_op): Handle %code().
992 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
993 (tc_gen_reloc): Likwise; convert to a computed reloc.
994 (md_apply_fix): Likewise.
995
151fa98f
NC
9962013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
997
998 * config/rl78-parse.y: Fix encoding of DIVWU insn.
999
70a8bc5b 10002013-02-25 Terry Guo <terry.guo@arm.com>
1001
1002 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1003 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1004 list of accepted CPUs.
1005
5c111e37
L
10062013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1007
1008 PR gas/15159
1009 * config/tc-i386.c (cpu_arch): Add ".smap".
1010
1011 * doc/c-i386.texi: Document smap.
1012
8a75745d
MR
10132013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1014
1015 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1016 mips_assembling_insn appropriately.
1017 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1018
79850f26
MR
10192013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1020
cf29fc61 1021 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1022 extraneous braces.
1023
4c261dff
NC
10242013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1025
5c111e37 1026 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1027
ea33f281
NC
10282013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1029
1030 * configure.tgt: Add nios2-*-rtems*.
1031
a1ccaec9
YZ
10322013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1033
1034 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1035 NULL.
1036
0aa27725
RS
10372013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1038
1039 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1040 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1041
da4339ed
NC
10422013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1043
1044 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1045 core.
1046
36591ba1 10472013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1048 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1049
1050 Based on patches from Altera Corporation.
1051
1052 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1053 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1054 * Makefile.in: Regenerated.
1055 * configure.tgt: Add case for nios2*-linux*.
1056 * config/obj-elf.c: Conditionally include elf/nios2.h.
1057 * config/tc-nios2.c: New file.
1058 * config/tc-nios2.h: New file.
1059 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1060 * doc/Makefile.in: Regenerated.
1061 * doc/all.texi: Set NIOSII.
1062 * doc/as.texinfo (Overview): Add Nios II options.
1063 (Machine Dependencies): Include c-nios2.texi.
1064 * doc/c-nios2.texi: New file.
1065 * NEWS: Note Altera Nios II support.
1066
94d4433a
AM
10672013-02-06 Alan Modra <amodra@gmail.com>
1068
1069 PR gas/14255
1070 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1071 Don't skip fixups with fx_subsy non-NULL.
1072 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1073 with fx_subsy non-NULL.
1074
ace9af6f
L
10752013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1076
1077 * doc/c-metag.texi: Add "@c man" markers.
1078
89d67ed9
AM
10792013-02-04 Alan Modra <amodra@gmail.com>
1080
1081 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1082 related code.
1083 (TC_ADJUST_RELOC_COUNT): Delete.
1084 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1085
89072bd6
AM
10862013-02-04 Alan Modra <amodra@gmail.com>
1087
1088 * po/POTFILES.in: Regenerate.
1089
f9b2d544
NC
10902013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1091
1092 * config/tc-metag.c: Make SWAP instruction less permissive with
1093 its operands.
1094
392ca752
DD
10952013-01-29 DJ Delorie <dj@redhat.com>
1096
1097 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1098 relocs in .word/.etc statements.
1099
427d0db6
RM
11002013-01-29 Roland McGrath <mcgrathr@google.com>
1101
1102 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1103 immediate value for 8-bit offset" error so it shows line info.
1104
4faf939a
JM
11052013-01-24 Joseph Myers <joseph@codesourcery.com>
1106
1107 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1108 for 64-bit output.
1109
78c8d46c
NC
11102013-01-24 Nick Clifton <nickc@redhat.com>
1111
1112 * config/tc-v850.c: Add support for e3v5 architecture.
1113 * doc/c-v850.texi: Mention new support.
1114
fb5b7503
NC
11152013-01-23 Nick Clifton <nickc@redhat.com>
1116
1117 PR gas/15039
1118 * config/tc-avr.c: Include dwarf2dbg.h.
1119
8ce3d284
L
11202013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1121
1122 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1123 (tc_i386_fix_adjustable): Likewise.
1124 (lex_got): Likewise.
1125 (tc_gen_reloc): Likewise.
1126
f5555712
YZ
11272013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1128
1129 * config/tc-aarch64.c (output_operand_error_record): Change to output
1130 the out-of-range error message as value-expected message if there is
1131 only one single value in the expected range.
1132 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1133 LSL #0 as a programmer-friendly feature.
1134
8fd4256d
L
11352013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1136
1137 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1138 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1139 BFD_RELOC_64_SIZE relocations.
1140 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1141 for it.
1142 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1143 relocations against local symbols.
1144
a5840dce
AM
11452013-01-16 Alan Modra <amodra@gmail.com>
1146
1147 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1148 finding some sort of toc syntax error, and break to avoid
1149 compiler uninit warning.
1150
af89796a
L
11512013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1152
1153 PR gas/15019
1154 * config/tc-i386.c (lex_got): Increment length by 1 if the
1155 relocation token is removed.
1156
dd42f060
NC
11572013-01-15 Nick Clifton <nickc@redhat.com>
1158
1159 * config/tc-v850.c (md_assemble): Allow signed values for
1160 V850E_IMMEDIATE.
1161
464e3686
SK
11622013-01-11 Sean Keys <skeys@ipdatasys.com>
1163
1164 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1165 git to cvs.
464e3686 1166
5817ffd1
PB
11672013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1168
1169 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1170 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1171 * config/tc-ppc.c (md_show_usage): Likewise.
1172 (ppc_handle_align): Handle power8's group ending nop.
1173
f4b1f6a9
SK
11742013-01-10 Sean Keys <skeys@ipdatasys.com>
1175
1176 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1177 that the assember exits after the opcodes have been printed.
f4b1f6a9 1178
34bca508
L
11792013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1180
1181 * app.c: Remove trailing white spaces.
1182 * as.c: Likewise.
1183 * as.h: Likewise.
1184 * cond.c: Likewise.
1185 * dw2gencfi.c: Likewise.
1186 * dwarf2dbg.h: Likewise.
1187 * ecoff.c: Likewise.
1188 * input-file.c: Likewise.
1189 * itbl-lex.h: Likewise.
1190 * output-file.c: Likewise.
1191 * read.c: Likewise.
1192 * sb.c: Likewise.
1193 * subsegs.c: Likewise.
1194 * symbols.c: Likewise.
1195 * write.c: Likewise.
1196 * config/tc-i386.c: Likewise.
1197 * doc/Makefile.am: Likewise.
1198 * doc/Makefile.in: Likewise.
1199 * doc/c-aarch64.texi: Likewise.
1200 * doc/c-alpha.texi: Likewise.
1201 * doc/c-arc.texi: Likewise.
1202 * doc/c-arm.texi: Likewise.
1203 * doc/c-avr.texi: Likewise.
1204 * doc/c-bfin.texi: Likewise.
1205 * doc/c-cr16.texi: Likewise.
1206 * doc/c-d10v.texi: Likewise.
1207 * doc/c-d30v.texi: Likewise.
1208 * doc/c-h8300.texi: Likewise.
1209 * doc/c-hppa.texi: Likewise.
1210 * doc/c-i370.texi: Likewise.
1211 * doc/c-i386.texi: Likewise.
1212 * doc/c-i860.texi: Likewise.
1213 * doc/c-m32c.texi: Likewise.
1214 * doc/c-m32r.texi: Likewise.
1215 * doc/c-m68hc11.texi: Likewise.
1216 * doc/c-m68k.texi: Likewise.
1217 * doc/c-microblaze.texi: Likewise.
1218 * doc/c-mips.texi: Likewise.
1219 * doc/c-msp430.texi: Likewise.
1220 * doc/c-mt.texi: Likewise.
1221 * doc/c-s390.texi: Likewise.
1222 * doc/c-score.texi: Likewise.
1223 * doc/c-sh.texi: Likewise.
1224 * doc/c-sh64.texi: Likewise.
1225 * doc/c-tic54x.texi: Likewise.
1226 * doc/c-tic6x.texi: Likewise.
1227 * doc/c-v850.texi: Likewise.
1228 * doc/c-xc16x.texi: Likewise.
1229 * doc/c-xgate.texi: Likewise.
1230 * doc/c-xtensa.texi: Likewise.
1231 * doc/c-z80.texi: Likewise.
1232 * doc/internals.texi: Likewise.
1233
4c665b71
RM
12342013-01-10 Roland McGrath <mcgrathr@google.com>
1235
1236 * hash.c (hash_new_sized): Make it global.
1237 * hash.h: Declare it.
1238 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1239 pass a small size.
1240
a3c62988
NC
12412013-01-10 Will Newton <will.newton@imgtec.com>
1242
1243 * Makefile.am: Add Meta.
1244 * Makefile.in: Regenerate.
1245 * config/tc-metag.c: New file.
1246 * config/tc-metag.h: New file.
1247 * configure.tgt: Add Meta.
1248 * doc/Makefile.am: Add Meta.
1249 * doc/Makefile.in: Regenerate.
1250 * doc/all.texi: Add Meta.
1251 * doc/as.texiinfo: Document Meta options.
1252 * doc/c-metag.texi: New file.
1253
b37df7c4
SE
12542013-01-09 Steve Ellcey <sellcey@mips.com>
1255
1256 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1257 calls.
1258 * config/tc-mips.c (internalError): Remove, replace with abort.
1259
a3251895
YZ
12602013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1261
1262 * config/tc-aarch64.c (parse_operands): Change to compare the result
1263 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1264
8ab8155f
NC
12652013-01-07 Nick Clifton <nickc@redhat.com>
1266
1267 PR gas/14887
1268 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1269 anticipated character.
1270 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1271 here as it is no longer needed.
1272
a4ac1c42
AS
12732013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1274
1275 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1276 * doc/c-score.texi (SCORE-Opts): Likewise.
1277 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1278
e407c74b
NC
12792013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1280
1281 * config/tc-mips.c: Add support for MIPS r5900.
1282 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1283 lq and sq.
1284 (can_swap_branch_p, get_append_method): Detect some conditional
1285 short loops to fix a bug on the r5900 by NOP in the branch delay
1286 slot.
1287 (M_MUL): Support 3 operands in multu on r5900.
1288 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1289 (s_mipsset): Force 32 bit floating point on r5900.
1290 (mips_ip): Check parameter range of instructions mfps and mtps on
1291 r5900.
1292 * configure.in: Detect CPU type when target string contains r5900
1293 (e.g. mips64r5900el-linux-gnu).
1294
62658407
L
12952013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1296
1297 * as.c (parse_args): Update copyright year to 2013.
1298
95830fd1
YZ
12992013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1300
1301 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1302 and "cortex57".
1303
517bb291 13042013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1305
517bb291
NC
1306 PR gas/14987
1307 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1308 closing bracket.
d709e4e6 1309
517bb291 1310For older changes see ChangeLog-2012
08d56133 1311\f
517bb291 1312Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1313
1314Copying and distribution of this file, with or without modification,
1315are permitted in any medium without royalty provided the copyright
1316notice and this notice are preserved.
1317
08d56133
NC
1318Local Variables:
1319mode: change-log
1320left-margin: 8
1321fill-column: 74
1322version-control: never
1323End: