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record-btrace: fix assertion when enabling recording after re-run
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CommitLineData
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12013-03-21 Will Newton <will.newton@linaro.org>
2
3 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
4 pc-relative str instructions in Thumb mode.
5
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62013-03-21 Michael Schewe <michael.schewe@gmx.net>
7
8 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
9 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
10 R_H8_DISP32A16.
11 * config/tc-h8300.h: Remove duplicated defines.
12
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132013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
14
15 PR gas/15282
16 * tc-avr.c (mcu_has_3_byte_pc): New function.
17 (tc_cfi_frame_initial_instructions): Call it to find return
18 address size.
19
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202013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
21
22 PR gas/15095
23 * config/tc-tic6x.c (tic6x_try_encode): Handle
24 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
25 encode register pair numbers when required.
26
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272013-03-15 Will Newton <will.newton@linaro.org>
28
29 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
30 in vstr in Thumb mode for pre-ARMv7 cores.
31
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322013-03-14 Andreas Schwab <schwab@suse.de>
33
34 * doc/c-arc.texi (ARC Directives): Revert last change and use
35 @itemize instead of @table.
36 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
37
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382013-03-14 Nick Clifton <nickc@redhat.com>
39
40 PR gas/15273
41 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
42 NULL message, instead just check ARM_CPU_IS_ANY directly.
43
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442013-03-14 Nick Clifton <nickc@redhat.com>
45
46 PR gas/15212
9e6f3811 47 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
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48 for table format.
49 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
50 to the @item directives.
51 (ARM-Neon-Alignment): Move to correct place in the document.
52 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
53 formatting.
54 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
55 @smallexample.
56
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572013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
58
59 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
60 case. Add default BAD_CASE to switch.
61
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622013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
63
64 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
65 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
66
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672013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
68
69 * config/tc-arm.c (crc_ext_armv8): New feature set.
70 (UNPRED_REG): New macro.
71 (do_crc32_1): New function.
72 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
73 do_crc32ch, do_crc32cw): Likewise.
74 (TUEc): New macro.
75 (insns): Add entries for crc32 mnemonics.
76 (arm_extensions): Add entry for crc.
77
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782013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
79
80 * write.h (struct fix): Add fx_dot_frag field.
81 (dot_frag): Declare.
82 * write.c (dot_frag): New variable.
83 (fix_new_internal): Set fx_dot_frag field with dot_frag.
84 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
85 * expr.c (expr): Save value of frag_now in dot_frag when setting
86 dot_value.
87 * read.c (emit_expr): Likewise. Delete comments.
88
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892013-03-07 H.J. Lu <hongjiu.lu@intel.com>
90
91 * config/tc-i386.c (flag_code_names): Removed.
92 (i386_index_check): Rewrote.
93
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942013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
95
96 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
97 add comment.
98 (aarch64_double_precision_fmovable): New function.
99 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
100 function; handle hexadecimal representation of IEEE754 encoding.
101 (parse_operands): Update the call to parse_aarch64_imm_float.
102
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1032013-02-28 H.J. Lu <hongjiu.lu@intel.com>
104
105 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
106 (check_hle): Updated.
107 (md_assemble): Likewise.
108 (parse_insn): Likewise.
109
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1102013-02-28 H.J. Lu <hongjiu.lu@intel.com>
111
112 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 113 (md_assemble): Check if REP prefix is OK.
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114 (parse_insn): Remove expecting_string_instruction. Set
115 i.rep_prefix.
116
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1172013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
118
119 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
120
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1212013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
122
123 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
124 for system registers.
125
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1262013-02-27 DJ Delorie <dj@redhat.com>
127
128 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
129 (rl78_op): Handle %code().
130 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
131 (tc_gen_reloc): Likwise; convert to a computed reloc.
132 (md_apply_fix): Likewise.
133
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1342013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
135
136 * config/rl78-parse.y: Fix encoding of DIVWU insn.
137
70a8bc5b 1382013-02-25 Terry Guo <terry.guo@arm.com>
139
140 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
141 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
142 list of accepted CPUs.
143
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1442013-02-19 H.J. Lu <hongjiu.lu@intel.com>
145
146 PR gas/15159
147 * config/tc-i386.c (cpu_arch): Add ".smap".
148
149 * doc/c-i386.texi: Document smap.
150
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1512013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
152
153 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
154 mips_assembling_insn appropriately.
155 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
156
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1572013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
158
cf29fc61 159 * config/tc-mips.c (append_insn): Correct indentation, remove
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160 extraneous braces.
161
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1622013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
163
5c111e37 164 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 165
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1662013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
167
168 * configure.tgt: Add nios2-*-rtems*.
169
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1702013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
171
172 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
173 NULL.
174
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1752013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
176
177 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
178 (macro): Use it. Assert that trunc.w.s is not used for r5900.
179
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1802013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
181
182 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
183 core.
184
36591ba1 1852013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 186 Andrew Jenner <andrew@codesourcery.com>
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187
188 Based on patches from Altera Corporation.
189
190 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
191 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
192 * Makefile.in: Regenerated.
193 * configure.tgt: Add case for nios2*-linux*.
194 * config/obj-elf.c: Conditionally include elf/nios2.h.
195 * config/tc-nios2.c: New file.
196 * config/tc-nios2.h: New file.
197 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
198 * doc/Makefile.in: Regenerated.
199 * doc/all.texi: Set NIOSII.
200 * doc/as.texinfo (Overview): Add Nios II options.
201 (Machine Dependencies): Include c-nios2.texi.
202 * doc/c-nios2.texi: New file.
203 * NEWS: Note Altera Nios II support.
204
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2052013-02-06 Alan Modra <amodra@gmail.com>
206
207 PR gas/14255
208 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
209 Don't skip fixups with fx_subsy non-NULL.
210 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
211 with fx_subsy non-NULL.
212
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2132013-02-04 H.J. Lu <hongjiu.lu@intel.com>
214
215 * doc/c-metag.texi: Add "@c man" markers.
216
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2172013-02-04 Alan Modra <amodra@gmail.com>
218
219 * write.c (fixup_segment): Return void. Delete seg_reloc_count
220 related code.
221 (TC_ADJUST_RELOC_COUNT): Delete.
222 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
223
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2242013-02-04 Alan Modra <amodra@gmail.com>
225
226 * po/POTFILES.in: Regenerate.
227
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2282013-01-30 Markos Chandras <markos.chandras@imgtec.com>
229
230 * config/tc-metag.c: Make SWAP instruction less permissive with
231 its operands.
232
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2332013-01-29 DJ Delorie <dj@redhat.com>
234
235 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
236 relocs in .word/.etc statements.
237
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2382013-01-29 Roland McGrath <mcgrathr@google.com>
239
240 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
241 immediate value for 8-bit offset" error so it shows line info.
242
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2432013-01-24 Joseph Myers <joseph@codesourcery.com>
244
245 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
246 for 64-bit output.
247
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2482013-01-24 Nick Clifton <nickc@redhat.com>
249
250 * config/tc-v850.c: Add support for e3v5 architecture.
251 * doc/c-v850.texi: Mention new support.
252
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2532013-01-23 Nick Clifton <nickc@redhat.com>
254
255 PR gas/15039
256 * config/tc-avr.c: Include dwarf2dbg.h.
257
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2582013-01-18 H.J. Lu <hongjiu.lu@intel.com>
259
260 * config/tc-i386.c (reloc): Support size relocation only for ELF.
261 (tc_i386_fix_adjustable): Likewise.
262 (lex_got): Likewise.
263 (tc_gen_reloc): Likewise.
264
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2652013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
266
267 * config/tc-aarch64.c (output_operand_error_record): Change to output
268 the out-of-range error message as value-expected message if there is
269 only one single value in the expected range.
270 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
271 LSL #0 as a programmer-friendly feature.
272
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2732013-01-16 H.J. Lu <hongjiu.lu@intel.com>
274
275 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
276 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
277 BFD_RELOC_64_SIZE relocations.
278 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
279 for it.
280 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
281 relocations against local symbols.
282
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2832013-01-16 Alan Modra <amodra@gmail.com>
284
285 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
286 finding some sort of toc syntax error, and break to avoid
287 compiler uninit warning.
288
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2892013-01-15 H.J. Lu <hongjiu.lu@intel.com>
290
291 PR gas/15019
292 * config/tc-i386.c (lex_got): Increment length by 1 if the
293 relocation token is removed.
294
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2952013-01-15 Nick Clifton <nickc@redhat.com>
296
297 * config/tc-v850.c (md_assemble): Allow signed values for
298 V850E_IMMEDIATE.
299
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3002013-01-11 Sean Keys <skeys@ipdatasys.com>
301
302 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 303 git to cvs.
464e3686 304
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3052013-01-10 Peter Bergner <bergner@vnet.ibm.com>
306
307 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
308 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
309 * config/tc-ppc.c (md_show_usage): Likewise.
310 (ppc_handle_align): Handle power8's group ending nop.
311
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3122013-01-10 Sean Keys <skeys@ipdatasys.com>
313
314 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 315 that the assember exits after the opcodes have been printed.
f4b1f6a9 316
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3172013-01-10 H.J. Lu <hongjiu.lu@intel.com>
318
319 * app.c: Remove trailing white spaces.
320 * as.c: Likewise.
321 * as.h: Likewise.
322 * cond.c: Likewise.
323 * dw2gencfi.c: Likewise.
324 * dwarf2dbg.h: Likewise.
325 * ecoff.c: Likewise.
326 * input-file.c: Likewise.
327 * itbl-lex.h: Likewise.
328 * output-file.c: Likewise.
329 * read.c: Likewise.
330 * sb.c: Likewise.
331 * subsegs.c: Likewise.
332 * symbols.c: Likewise.
333 * write.c: Likewise.
334 * config/tc-i386.c: Likewise.
335 * doc/Makefile.am: Likewise.
336 * doc/Makefile.in: Likewise.
337 * doc/c-aarch64.texi: Likewise.
338 * doc/c-alpha.texi: Likewise.
339 * doc/c-arc.texi: Likewise.
340 * doc/c-arm.texi: Likewise.
341 * doc/c-avr.texi: Likewise.
342 * doc/c-bfin.texi: Likewise.
343 * doc/c-cr16.texi: Likewise.
344 * doc/c-d10v.texi: Likewise.
345 * doc/c-d30v.texi: Likewise.
346 * doc/c-h8300.texi: Likewise.
347 * doc/c-hppa.texi: Likewise.
348 * doc/c-i370.texi: Likewise.
349 * doc/c-i386.texi: Likewise.
350 * doc/c-i860.texi: Likewise.
351 * doc/c-m32c.texi: Likewise.
352 * doc/c-m32r.texi: Likewise.
353 * doc/c-m68hc11.texi: Likewise.
354 * doc/c-m68k.texi: Likewise.
355 * doc/c-microblaze.texi: Likewise.
356 * doc/c-mips.texi: Likewise.
357 * doc/c-msp430.texi: Likewise.
358 * doc/c-mt.texi: Likewise.
359 * doc/c-s390.texi: Likewise.
360 * doc/c-score.texi: Likewise.
361 * doc/c-sh.texi: Likewise.
362 * doc/c-sh64.texi: Likewise.
363 * doc/c-tic54x.texi: Likewise.
364 * doc/c-tic6x.texi: Likewise.
365 * doc/c-v850.texi: Likewise.
366 * doc/c-xc16x.texi: Likewise.
367 * doc/c-xgate.texi: Likewise.
368 * doc/c-xtensa.texi: Likewise.
369 * doc/c-z80.texi: Likewise.
370 * doc/internals.texi: Likewise.
371
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3722013-01-10 Roland McGrath <mcgrathr@google.com>
373
374 * hash.c (hash_new_sized): Make it global.
375 * hash.h: Declare it.
376 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
377 pass a small size.
378
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3792013-01-10 Will Newton <will.newton@imgtec.com>
380
381 * Makefile.am: Add Meta.
382 * Makefile.in: Regenerate.
383 * config/tc-metag.c: New file.
384 * config/tc-metag.h: New file.
385 * configure.tgt: Add Meta.
386 * doc/Makefile.am: Add Meta.
387 * doc/Makefile.in: Regenerate.
388 * doc/all.texi: Add Meta.
389 * doc/as.texiinfo: Document Meta options.
390 * doc/c-metag.texi: New file.
391
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3922013-01-09 Steve Ellcey <sellcey@mips.com>
393
394 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
395 calls.
396 * config/tc-mips.c (internalError): Remove, replace with abort.
397
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3982013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
399
400 * config/tc-aarch64.c (parse_operands): Change to compare the result
401 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
402
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4032013-01-07 Nick Clifton <nickc@redhat.com>
404
405 PR gas/14887
406 * config/tc-arm.c (skip_past_char): Skip whitespace before the
407 anticipated character.
408 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
409 here as it is no longer needed.
410
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4112013-01-06 Andreas Schwab <schwab@linux-m68k.org>
412
413 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
414 * doc/c-score.texi (SCORE-Opts): Likewise.
415 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
416
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4172013-01-04 Juergen Urban <JuergenUrban@gmx.de>
418
419 * config/tc-mips.c: Add support for MIPS r5900.
420 Add M_LQ_AB and M_SQ_AB to support large values for instructions
421 lq and sq.
422 (can_swap_branch_p, get_append_method): Detect some conditional
423 short loops to fix a bug on the r5900 by NOP in the branch delay
424 slot.
425 (M_MUL): Support 3 operands in multu on r5900.
426 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
427 (s_mipsset): Force 32 bit floating point on r5900.
428 (mips_ip): Check parameter range of instructions mfps and mtps on
429 r5900.
430 * configure.in: Detect CPU type when target string contains r5900
431 (e.g. mips64r5900el-linux-gnu).
432
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4332013-01-02 H.J. Lu <hongjiu.lu@intel.com>
434
435 * as.c (parse_args): Update copyright year to 2013.
436
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4372013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
438
439 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
440 and "cortex57".
441
517bb291 4422013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 443
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444 PR gas/14987
445 * config/tc-arm.c (parse_address_main): Skip whitespace before a
446 closing bracket.
d709e4e6 447
517bb291 448For older changes see ChangeLog-2012
08d56133 449\f
517bb291 450Copyright (C) 2013 Free Software Foundation, Inc.
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451
452Copying and distribution of this file, with or without modification,
453are permitted in any medium without royalty provided the copyright
454notice and this notice are preserved.
455
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456Local Variables:
457mode: change-log
458left-margin: 8
459fill-column: 74
460version-control: never
461End: