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81566a9b
MR
12013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
4 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
5 Replace @sc{mips16} with literal `MIPS16'.
6 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
7
a6bb11b2
YZ
82013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
9
10 * config/tc-aarch64.c (reloc_table): Replace
11 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
12 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
13 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
14 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
15 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
16 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
17 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
18 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
19 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
20 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
21 (aarch64_force_relocation): Likewise.
22
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YZ
232013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
24
25 * config/tc-aarch64.c (ilp32_p): New static variable.
26 (elf64_aarch64_target_format): Return the target according to the
27 value of 'ilp32_p'.
28 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
29 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
30 (aarch64_dwarf2_addr_size): New function.
31 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
32 (DWARF2_ADDR_SIZE): New define.
33
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342013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
35
36 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
37
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RS
382013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
39
40 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
41
833794fc
MR
422013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
43
44 * config/tc-mips.c (mips_set_options): Add insn32 member.
45 (mips_opts): Initialize it.
46 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
47 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
48 (md_longopts): Add "minsn32" and "mno-insn32" options.
49 (is_size_valid): Handle insn32 mode.
50 (md_assemble): Pass instruction string down to macro.
51 (brk_fmt): Add second dimension and insn32 mode initializers.
52 (mfhl_fmt): Likewise.
53 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
54 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
55 (macro_build_jalr, move_register): Handle insn32 mode.
56 (macro_build_branch_rs): Likewise.
57 (macro): Handle insn32 mode.
58 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
59 (mips_ip): Handle insn32 mode.
60 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
61 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
62 (mips_handle_align): Handle insn32 mode.
63 (md_show_usage): Add -minsn32 and -mno-insn32.
64
65 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
66 -mno-insn32 options.
67 (-minsn32, -mno-insn32): New options.
68 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
69 options.
70 (MIPS assembly options): New node. Document .set insn32 and
71 .set noinsn32.
72 (MIPS-Dependent): List the new node.
73
d1706f38
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742013-06-25 Nick Clifton <nickc@redhat.com>
75
76 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
77 the PC in indirect addressing on 430xv2 parts.
78 (msp430_operands): Add version test to hardware bug encoding
79 restrictions.
80
477330fc
RM
812013-06-24 Roland McGrath <mcgrathr@google.com>
82
d996d970
RM
83 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
84 so it skips whitespace before it.
85 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
86
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RM
87 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
88 (arm_reg_parse_multi): Skip whitespace first.
89 (parse_reg_list): Likewise.
90 (parse_vfp_reg_list): Likewise.
91 (s_arm_unwind_save_mmxwcg): Likewise.
92
24382199
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932013-06-24 Nick Clifton <nickc@redhat.com>
94
95 PR gas/15623
96 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
97
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RS
982013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
99
100 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
101
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RS
1022013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * config/tc-mips.c: Assert that offsetT and valueT are at least
105 8 bytes in size.
106 (GPR_SMIN, GPR_SMAX): New macros.
107 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
108
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1092013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
110
111 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
112 conditions. Remove any code deselected by them.
113 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
114
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1152013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * NEWS: Note removal of ECOFF support.
118 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
119 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
120 (MULTI_CFILES): Remove config/e-mipsecoff.c.
121 * Makefile.in: Regenerate.
122 * configure.in: Remove MIPS ECOFF references.
123 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
124 Delete cases.
125 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
126 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
127 (mips-*-*): ...this single case.
128 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
129 MIPS emulations to be e-mipself*.
130 * configure: Regenerate.
131 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
132 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
133 (mips-*-sysv*): Remove coff and ecoff cases.
134 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
135 * ecoff.c: Remove reference to MIPS ECOFF.
136 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
137 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
138 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
139 (mips_hi_fixup): Tweak comment.
140 (append_insn): Require a howto.
141 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
142
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1432013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
144
145 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
146 Use "CPU" instead of "cpu".
147 * doc/c-mips.texi: Likewise.
148 (MIPS Opts): Rename to MIPS Options.
149 (MIPS option stack): Rename to MIPS Option Stack.
150 (MIPS ASE instruction generation overrides): Rename to
151 MIPS ASE Instruction Generation Overrides (for now).
152 (MIPS floating-point): Rename to MIPS Floating-Point.
153
fc16f8cc
RS
1542013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
155
156 * doc/c-mips.texi (MIPS Macros): New section.
157 (MIPS Object): Replace with...
158 (MIPS Small Data): ...this new section.
159
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RS
1602013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
161
162 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
163 Capitalize name. Use @kindex instead of @cindex for .set entries.
164
a1b86ab7
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1652013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * doc/c-mips.texi (MIPS Stabs): Remove section.
168
c6278170
RS
1692013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
170
171 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
172 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
173 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
174 (ISA_SUPPORTS_VIRT64_ASE): Delete.
175 (mips_ase): New structure.
176 (mips_ases): New table.
177 (FP64_ASES): New macro.
178 (mips_ase_groups): New array.
179 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
180 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
181 functions.
182 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
183 (md_parse_option): Use mips_ases and mips_set_ase instead of
184 separate case statements for each ASE option.
185 (mips_after_parse_args): Use FP64_ASES. Use
186 mips_check_isa_supports_ases to check the ASEs against
187 other options.
188 (s_mipsset): Use mips_ases and mips_set_ase instead of
189 separate if statements for each ASE option. Use
190 mips_check_isa_supports_ases, even when a non-ASE option
191 is specified.
192
63a4bc21
KT
1932013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
194
195 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
196
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1972013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
198
199 * config/tc-mips.c (md_shortopts, options, md_longopts)
200 (md_longopts_size): Move earlier in file.
201
846ef2d0
RS
2022013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
205 with a single "ase" bitmask.
206 (mips_opts): Update accordingly.
207 (file_ase, file_ase_explicit): New variables.
208 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
209 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
210 (ISA_HAS_ROR): Adjust for mips_set_options change.
211 (is_opcode_valid): Take the base ase mask directly from mips_opts.
212 (mips_ip): Adjust for mips_set_options change.
213 (md_parse_option): Likewise. Update file_ase_explicit.
214 (mips_after_parse_args): Adjust for mips_set_options change.
215 Use bitmask operations to select the default ASEs. Set file_ase
216 rather than individual per-ASE variables.
217 (s_mipsset): Adjust for mips_set_options change.
218 (mips_elf_final_processing): Test file_ase rather than
219 file_ase_mdmx. Remove commented-out code.
220
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RS
2212013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
222
223 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
224 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
225 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
226 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
227 (mips_after_parse_args): Use the new "ase" field to choose
228 the default ASEs.
229 (mips_cpu_info_table): Move ASEs from the "flags" field to the
230 "ase" field.
231
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2322013-06-18 Richard Earnshaw <rearnsha@arm.com>
233
234 * config/tc-arm.c (symbol_preemptible): New function.
235 (relax_branch): Use it.
236
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CM
2372013-06-17 Catherine Moore <clm@codesourcery.com>
238 Maciej W. Rozycki <macro@codesourcery.com>
239 Chao-Ying Fu <fu@mips.com>
240
241 * config/tc-mips.c (mips_set_options): Add ase_eva.
242 (mips_set_options mips_opts): Add ase_eva.
243 (file_ase_eva): Declare.
244 (ISA_SUPPORTS_EVA_ASE): Define.
245 (IS_SEXT_9BIT_NUM): Define.
246 (MIPS_CPU_ASE_EVA): Define.
247 (is_opcode_valid): Add support for ase_eva.
248 (macro_build): Likewise.
249 (macro): Likewise.
250 (validate_mips_insn): Likewise.
251 (validate_micromips_insn): Likewise.
252 (mips_ip): Likewise.
253 (options): Add OPTION_EVA and OPTION_NO_EVA.
254 (md_longopts): Add -meva and -mno-eva.
255 (md_parse_option): Process new options.
256 (mips_after_parse_args): Check for valid EVA combinations.
257 (s_mipsset): Likewise.
258
e410add4
RS
2592013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
260
261 * dwarf2dbg.h (dwarf2_move_insn): Declare.
262 * dwarf2dbg.c (line_subseg): Add pmove_tail.
263 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
264 (dwarf2_gen_line_info_1): Update call accordingly.
265 (dwarf2_move_insn): New function.
266 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
267
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2682013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
269
270 Revert:
271
272 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
273
274 PR gas/13024
275 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
276 (dwarf2_gen_line_info_1): Delete.
277 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
278 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
279 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
280 (dwarf2_directive_loc): Push previous .locs instead of generating
281 them immediately.
282
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2832013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
284
285 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
286 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
287
909c7f9c
NC
2882013-06-13 Nick Clifton <nickc@redhat.com>
289
290 PR gas/15602
291 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
292 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
293 function. Generates an error if the adjusted offset is out of a
294 16-bit range.
295
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SL
2962013-06-12 Sandra Loosemore <sandra@codesourcery.com>
297
298 * config/tc-nios2.c (md_apply_fix): Mask constant
299 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
300
3bf0dbfb
MR
3012013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
302
303 * config/tc-mips.c (append_insn): Don't do branch relaxation for
304 MIPS-3D instructions either.
305 (md_convert_frag): Update the COPx branch mask accordingly.
306
307 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
308 option.
309 * doc/as.texinfo (Overview): Add --relax-branch and
310 --no-relax-branch.
311 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
312 --no-relax-branch.
313
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SL
3142013-06-09 Sandra Loosemore <sandra@codesourcery.com>
315
316 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
317 omitted.
318
d301a56b
RS
3192013-06-08 Catherine Moore <clm@codesourcery.com>
320
321 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
322 (is_opcode_valid_16): Pass ase value to opcode_is_member.
323 (append_insn): Change INSN_xxxx to ASE_xxxx.
324
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3252013-06-01 George Thomas <george.thomas@atmel.com>
326
327 * gas/config/tc-avr.c: Change ISA for devices with USB support to
328 AVR_ISA_XMEGAU
329
f60cf82f
L
3302013-05-31 H.J. Lu <hongjiu.lu@intel.com>
331
332 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
333 for ELF.
334
a3f278e2
CM
3352013-05-31 Paul Brook <paul@codesourcery.com>
336
337 gas/
338 * config/tc-mips.c (s_ehword): New.
339
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CM
3402013-05-30 Paul Brook <paul@codesourcery.com>
341
342 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
343
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MR
3442013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
345
346 * write.c (resolve_reloc_expr_symbols): On REL targets don't
347 convert relocs who have no relocatable field either. Rephrase
348 the conditional so that the PC-relative check is only applied
349 for REL targets.
350
f19ccbda
MR
3512013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
352
353 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
354 calculation.
355
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YZ
3562013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
357
358 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 359 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
360 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
361 (md_apply_fix): Likewise.
362 (aarch64_force_relocation): Likewise.
363
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KT
3642013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
365
366 * config/tc-arm.c (it_fsm_post_encode): Improve
367 warning messages about deprecated IT block formats.
368
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MS
3692013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
370
371 * config/tc-aarch64.c (md_apply_fix): Move value range checking
372 inside fx_done condition.
373
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RS
3742013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
375
376 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
377
c0637f3a
PB
3782013-05-20 Peter Bergner <bergner@vnet.ibm.com>
379
380 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
381 and clean up warning when using PRINT_OPCODE_TABLE.
382
5656a981
AM
3832013-05-20 Alan Modra <amodra@gmail.com>
384
385 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
386 and data fixups performing shift/high adjust/sign extension on
387 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
388 when writing data fixups rather than recalculating size.
389
997b26e8
JBG
3902013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
391
392 * doc/c-msp430.texi: Fix typo.
393
9f6e76f4
TG
3942013-05-16 Tristan Gingold <gingold@adacore.com>
395
396 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
397 are also TOC symbols.
398
638d3803
NC
3992013-05-16 Nick Clifton <nickc@redhat.com>
400
401 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
402 Add -mcpu command to specify core type.
997b26e8 403 * doc/c-msp430.texi: Update documentation.
638d3803 404
b015e599
AP
4052013-05-09 Andrew Pinski <apinski@cavium.com>
406
407 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
408 (mips_opts): Update for the new field.
409 (file_ase_virt): New variable.
410 (ISA_SUPPORTS_VIRT_ASE): New macro.
411 (ISA_SUPPORTS_VIRT64_ASE): New macro.
412 (MIPS_CPU_ASE_VIRT): New define.
413 (is_opcode_valid): Handle ase_virt.
414 (macro_build): Handle "+J".
415 (validate_mips_insn): Likewise.
416 (mips_ip): Likewise.
417 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
418 (md_longopts): Add mvirt and mnovirt
419 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
420 (mips_after_parse_args): Handle ase_virt field.
421 (s_mipsset): Handle "virt" and "novirt".
422 (mips_elf_final_processing): Add a comment about virt ASE might need
423 a new flag.
424 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
425 * doc/c-mips.texi: Document -mvirt and -mno-virt.
426 Document ".set virt" and ".set novirt".
427
da8094d7
AM
4282013-05-09 Alan Modra <amodra@gmail.com>
429
430 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
431 control of operand flag bits.
432
c5f8c205
AM
4332013-05-07 Alan Modra <amodra@gmail.com>
434
435 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
436 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
437 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
438 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
439 (md_apply_fix): Set fx_no_overflow for assorted relocations.
440 Shift and sign-extend fieldval for use by some VLE reloc
441 operand->insert functions.
442
b47468a6
CM
4432013-05-06 Paul Brook <paul@codesourcery.com>
444 Catherine Moore <clm@codesourcery.com>
445
c5f8c205
AM
446 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
447 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
448 (md_apply_fix): Likewise.
449 (tc_gen_reloc): Likewise.
450
2de39019
CM
4512013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
452
453 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
454 (mips_fix_adjustable): Adjust pc-relative check to use
455 limited_pc_reloc_p.
456
754e2bb9
RS
4572013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
458
459 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
460 (s_mips_stab): Do not restrict to stabn only.
461
13761a11
NC
4622013-05-02 Nick Clifton <nickc@redhat.com>
463
464 * config/tc-msp430.c: Add support for the MSP430X architecture.
465 Add code to insert a NOP instruction after any instruction that
466 might change the interrupt state.
467 Add support for the LARGE memory model.
468 Add code to initialise the .MSP430.attributes section.
469 * config/tc-msp430.h: Add support for the MSP430X architecture.
470 * doc/c-msp430.texi: Document the new -mL and -mN command line
471 options.
472 * NEWS: Mention support for the MSP430X architecture.
473
df26367c
MR
4742013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
475
476 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
477 alpha*-*-linux*ecoff*.
478
f02d8318
CF
4792013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
480
481 * config/tc-mips.c (mips_ip): Add sizelo.
482 For "+C", "+G", and "+H", set sizelo and compare against it.
483
b40bf0a2
NC
4842013-04-29 Nick Clifton <nickc@redhat.com>
485
486 * as.c (Options): Add -gdwarf-sections.
487 (parse_args): Likewise.
488 * as.h (flag_dwarf_sections): Declare.
489 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
490 (process_entries): When -gdwarf-sections is enabled generate
491 fragmentary .debug_line sections.
492 (out_debug_line): Set the section for the .debug_line section end
493 symbol.
494 * doc/as.texinfo: Document -gdwarf-sections.
495 * NEWS: Mention -gdwarf-sections.
496
8eeccb77 4972013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
498
499 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
500 according to the target parameter. Don't call s_segm since s_segm
501 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
502 initialized yet.
503 (md_begin): Call s_segm according to target parameter from command
504 line.
505
49926cd0
AM
5062013-04-25 Alan Modra <amodra@gmail.com>
507
508 * configure.in: Allow little-endian linux.
509 * configure: Regenerate.
510
e3031850
SL
5112013-04-24 Sandra Loosemore <sandra@codesourcery.com>
512
513 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
514 "fstatus" control register to "eccinj".
515
cb948fc0
KT
5162013-04-19 Kai Tietz <ktietz@redhat.com>
517
518 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
519
4455e9ad
JB
5202013-04-15 Julian Brown <julian@codesourcery.com>
521
522 * expr.c (add_to_result, subtract_from_result): Make global.
523 * expr.h (add_to_result, subtract_from_result): Add prototypes.
524 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
525 subtract_from_result to handle extra bit of precision for .sleb128
526 directive operands.
527
956a6ba3
JB
5282013-04-10 Julian Brown <julian@codesourcery.com>
529
530 * read.c (convert_to_bignum): Add sign parameter. Use it
531 instead of X_unsigned to determine sign of resulting bignum.
532 (emit_expr): Pass extra argument to convert_to_bignum.
533 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
534 X_extrabit to convert_to_bignum.
535 (parse_bitfield_cons): Set X_extrabit.
536 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
537 Initialise X_extrabit field as appropriate.
538 (add_to_result): New.
539 (subtract_from_result): New.
540 (expr): Use above.
541 * expr.h (expressionS): Add X_extrabit field.
542
eb9f3f00
JB
5432013-04-10 Jan Beulich <jbeulich@suse.com>
544
545 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
546 register being PC when is_t or writeback, and use distinct
547 diagnostic for the latter case.
548
ccb84d65
JB
5492013-04-10 Jan Beulich <jbeulich@suse.com>
550
551 * gas/config/tc-arm.c (parse_operands): Re-write
552 po_barrier_or_imm().
553 (do_barrier): Remove bogus constraint().
554 (do_t_barrier): Remove.
555
4d13caa0
NC
5562013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
557
558 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
559 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
560 ATmega2564RFR2
561 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
562
16d02dc9
JB
5632013-04-09 Jan Beulich <jbeulich@suse.com>
564
565 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
566 Use local variable Rt in more places.
567 (do_vmsr): Accept all control registers.
568
05ac0ffb
JB
5692013-04-09 Jan Beulich <jbeulich@suse.com>
570
571 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
572 if there was none specified for moves between scalar and core
573 register.
574
2d51fb74
JB
5752013-04-09 Jan Beulich <jbeulich@suse.com>
576
577 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
578 NEON_ALL_LANES case.
579
94dcf8bf
JB
5802013-04-08 Jan Beulich <jbeulich@suse.com>
581
582 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
583 PC-relative VSTR.
584
1472d06f
JB
5852013-04-08 Jan Beulich <jbeulich@suse.com>
586
587 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
588 entry to sp_fiq.
589
0c76cae8
AM
5902013-04-03 Alan Modra <amodra@gmail.com>
591
592 * doc/as.texinfo: Add support to generate man options for h8300.
593 * doc/c-h8300.texi: Likewise.
594
92eb40d9
RR
5952013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
596
597 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
598 Cortex-A57.
599
51dcdd4d
NC
6002013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
601
602 PR binutils/15068
603 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
604
c5d685bf
NC
6052013-03-26 Nick Clifton <nickc@redhat.com>
606
9b978282
NC
607 PR gas/15295
608 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
609 start of the file each time.
610
c5d685bf
NC
611 PR gas/15178
612 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
613 FreeBSD targets.
614
9699c833
TG
6152013-03-26 Douglas B Rupp <rupp@gnat.com>
616
617 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
618 after fixup.
619
4755303e
WN
6202013-03-21 Will Newton <will.newton@linaro.org>
621
622 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
623 pc-relative str instructions in Thumb mode.
624
81f5558e
NC
6252013-03-21 Michael Schewe <michael.schewe@gmx.net>
626
627 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
628 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
629 R_H8_DISP32A16.
630 * config/tc-h8300.h: Remove duplicated defines.
631
71863e73
NC
6322013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
633
634 PR gas/15282
635 * tc-avr.c (mcu_has_3_byte_pc): New function.
636 (tc_cfi_frame_initial_instructions): Call it to find return
637 address size.
638
795b8e6b
NC
6392013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
640
641 PR gas/15095
642 * config/tc-tic6x.c (tic6x_try_encode): Handle
643 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
644 encode register pair numbers when required.
645
ba86b375
WN
6462013-03-15 Will Newton <will.newton@linaro.org>
647
648 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
649 in vstr in Thumb mode for pre-ARMv7 cores.
650
9e6f3811
AS
6512013-03-14 Andreas Schwab <schwab@suse.de>
652
653 * doc/c-arc.texi (ARC Directives): Revert last change and use
654 @itemize instead of @table.
655 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
656
b10bf8c5
NC
6572013-03-14 Nick Clifton <nickc@redhat.com>
658
659 PR gas/15273
660 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
661 NULL message, instead just check ARM_CPU_IS_ANY directly.
662
ba724cfc
NC
6632013-03-14 Nick Clifton <nickc@redhat.com>
664
665 PR gas/15212
9e6f3811 666 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
667 for table format.
668 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
669 to the @item directives.
670 (ARM-Neon-Alignment): Move to correct place in the document.
671 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
672 formatting.
673 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
674 @smallexample.
675
531a94fd
SL
6762013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
677
678 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
679 case. Add default BAD_CASE to switch.
680
dad60f8e
SL
6812013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
682
683 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
684 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
685
dd5181d5
KT
6862013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
687
688 * config/tc-arm.c (crc_ext_armv8): New feature set.
689 (UNPRED_REG): New macro.
690 (do_crc32_1): New function.
691 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
692 do_crc32ch, do_crc32cw): Likewise.
693 (TUEc): New macro.
694 (insns): Add entries for crc32 mnemonics.
695 (arm_extensions): Add entry for crc.
696
8e723a10
CLT
6972013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
698
699 * write.h (struct fix): Add fx_dot_frag field.
700 (dot_frag): Declare.
701 * write.c (dot_frag): New variable.
702 (fix_new_internal): Set fx_dot_frag field with dot_frag.
703 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
704 * expr.c (expr): Save value of frag_now in dot_frag when setting
705 dot_value.
706 * read.c (emit_expr): Likewise. Delete comments.
707
be05d201
L
7082013-03-07 H.J. Lu <hongjiu.lu@intel.com>
709
710 * config/tc-i386.c (flag_code_names): Removed.
711 (i386_index_check): Rewrote.
712
62b0d0d5
YZ
7132013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
714
715 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
716 add comment.
717 (aarch64_double_precision_fmovable): New function.
718 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
719 function; handle hexadecimal representation of IEEE754 encoding.
720 (parse_operands): Update the call to parse_aarch64_imm_float.
721
165de32a
L
7222013-02-28 H.J. Lu <hongjiu.lu@intel.com>
723
724 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
725 (check_hle): Updated.
726 (md_assemble): Likewise.
727 (parse_insn): Likewise.
728
d5de92cf
L
7292013-02-28 H.J. Lu <hongjiu.lu@intel.com>
730
731 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 732 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
733 (parse_insn): Remove expecting_string_instruction. Set
734 i.rep_prefix.
735
e60bb1dd
YZ
7362013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
737
738 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
739
aeebdd9b
YZ
7402013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
741
742 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
743 for system registers.
744
4107ae22
DD
7452013-02-27 DJ Delorie <dj@redhat.com>
746
747 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
748 (rl78_op): Handle %code().
749 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
750 (tc_gen_reloc): Likwise; convert to a computed reloc.
751 (md_apply_fix): Likewise.
752
151fa98f
NC
7532013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
754
755 * config/rl78-parse.y: Fix encoding of DIVWU insn.
756
70a8bc5b 7572013-02-25 Terry Guo <terry.guo@arm.com>
758
759 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
760 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
761 list of accepted CPUs.
762
5c111e37
L
7632013-02-19 H.J. Lu <hongjiu.lu@intel.com>
764
765 PR gas/15159
766 * config/tc-i386.c (cpu_arch): Add ".smap".
767
768 * doc/c-i386.texi: Document smap.
769
8a75745d
MR
7702013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
771
772 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
773 mips_assembling_insn appropriately.
774 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
775
79850f26
MR
7762013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
777
cf29fc61 778 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
779 extraneous braces.
780
4c261dff
NC
7812013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
782
5c111e37 783 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 784
ea33f281
NC
7852013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
786
787 * configure.tgt: Add nios2-*-rtems*.
788
a1ccaec9
YZ
7892013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
790
791 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
792 NULL.
793
0aa27725
RS
7942013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
795
796 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
797 (macro): Use it. Assert that trunc.w.s is not used for r5900.
798
da4339ed
NC
7992013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
800
801 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
802 core.
803
36591ba1 8042013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 805 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
806
807 Based on patches from Altera Corporation.
808
809 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
810 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
811 * Makefile.in: Regenerated.
812 * configure.tgt: Add case for nios2*-linux*.
813 * config/obj-elf.c: Conditionally include elf/nios2.h.
814 * config/tc-nios2.c: New file.
815 * config/tc-nios2.h: New file.
816 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
817 * doc/Makefile.in: Regenerated.
818 * doc/all.texi: Set NIOSII.
819 * doc/as.texinfo (Overview): Add Nios II options.
820 (Machine Dependencies): Include c-nios2.texi.
821 * doc/c-nios2.texi: New file.
822 * NEWS: Note Altera Nios II support.
823
94d4433a
AM
8242013-02-06 Alan Modra <amodra@gmail.com>
825
826 PR gas/14255
827 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
828 Don't skip fixups with fx_subsy non-NULL.
829 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
830 with fx_subsy non-NULL.
831
ace9af6f
L
8322013-02-04 H.J. Lu <hongjiu.lu@intel.com>
833
834 * doc/c-metag.texi: Add "@c man" markers.
835
89d67ed9
AM
8362013-02-04 Alan Modra <amodra@gmail.com>
837
838 * write.c (fixup_segment): Return void. Delete seg_reloc_count
839 related code.
840 (TC_ADJUST_RELOC_COUNT): Delete.
841 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
842
89072bd6
AM
8432013-02-04 Alan Modra <amodra@gmail.com>
844
845 * po/POTFILES.in: Regenerate.
846
f9b2d544
NC
8472013-01-30 Markos Chandras <markos.chandras@imgtec.com>
848
849 * config/tc-metag.c: Make SWAP instruction less permissive with
850 its operands.
851
392ca752
DD
8522013-01-29 DJ Delorie <dj@redhat.com>
853
854 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
855 relocs in .word/.etc statements.
856
427d0db6
RM
8572013-01-29 Roland McGrath <mcgrathr@google.com>
858
859 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
860 immediate value for 8-bit offset" error so it shows line info.
861
4faf939a
JM
8622013-01-24 Joseph Myers <joseph@codesourcery.com>
863
864 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
865 for 64-bit output.
866
78c8d46c
NC
8672013-01-24 Nick Clifton <nickc@redhat.com>
868
869 * config/tc-v850.c: Add support for e3v5 architecture.
870 * doc/c-v850.texi: Mention new support.
871
fb5b7503
NC
8722013-01-23 Nick Clifton <nickc@redhat.com>
873
874 PR gas/15039
875 * config/tc-avr.c: Include dwarf2dbg.h.
876
8ce3d284
L
8772013-01-18 H.J. Lu <hongjiu.lu@intel.com>
878
879 * config/tc-i386.c (reloc): Support size relocation only for ELF.
880 (tc_i386_fix_adjustable): Likewise.
881 (lex_got): Likewise.
882 (tc_gen_reloc): Likewise.
883
f5555712
YZ
8842013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
885
886 * config/tc-aarch64.c (output_operand_error_record): Change to output
887 the out-of-range error message as value-expected message if there is
888 only one single value in the expected range.
889 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
890 LSL #0 as a programmer-friendly feature.
891
8fd4256d
L
8922013-01-16 H.J. Lu <hongjiu.lu@intel.com>
893
894 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
895 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
896 BFD_RELOC_64_SIZE relocations.
897 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
898 for it.
899 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
900 relocations against local symbols.
901
a5840dce
AM
9022013-01-16 Alan Modra <amodra@gmail.com>
903
904 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
905 finding some sort of toc syntax error, and break to avoid
906 compiler uninit warning.
907
af89796a
L
9082013-01-15 H.J. Lu <hongjiu.lu@intel.com>
909
910 PR gas/15019
911 * config/tc-i386.c (lex_got): Increment length by 1 if the
912 relocation token is removed.
913
dd42f060
NC
9142013-01-15 Nick Clifton <nickc@redhat.com>
915
916 * config/tc-v850.c (md_assemble): Allow signed values for
917 V850E_IMMEDIATE.
918
464e3686
SK
9192013-01-11 Sean Keys <skeys@ipdatasys.com>
920
921 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 922 git to cvs.
464e3686 923
5817ffd1
PB
9242013-01-10 Peter Bergner <bergner@vnet.ibm.com>
925
926 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
927 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
928 * config/tc-ppc.c (md_show_usage): Likewise.
929 (ppc_handle_align): Handle power8's group ending nop.
930
f4b1f6a9
SK
9312013-01-10 Sean Keys <skeys@ipdatasys.com>
932
933 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 934 that the assember exits after the opcodes have been printed.
f4b1f6a9 935
34bca508
L
9362013-01-10 H.J. Lu <hongjiu.lu@intel.com>
937
938 * app.c: Remove trailing white spaces.
939 * as.c: Likewise.
940 * as.h: Likewise.
941 * cond.c: Likewise.
942 * dw2gencfi.c: Likewise.
943 * dwarf2dbg.h: Likewise.
944 * ecoff.c: Likewise.
945 * input-file.c: Likewise.
946 * itbl-lex.h: Likewise.
947 * output-file.c: Likewise.
948 * read.c: Likewise.
949 * sb.c: Likewise.
950 * subsegs.c: Likewise.
951 * symbols.c: Likewise.
952 * write.c: Likewise.
953 * config/tc-i386.c: Likewise.
954 * doc/Makefile.am: Likewise.
955 * doc/Makefile.in: Likewise.
956 * doc/c-aarch64.texi: Likewise.
957 * doc/c-alpha.texi: Likewise.
958 * doc/c-arc.texi: Likewise.
959 * doc/c-arm.texi: Likewise.
960 * doc/c-avr.texi: Likewise.
961 * doc/c-bfin.texi: Likewise.
962 * doc/c-cr16.texi: Likewise.
963 * doc/c-d10v.texi: Likewise.
964 * doc/c-d30v.texi: Likewise.
965 * doc/c-h8300.texi: Likewise.
966 * doc/c-hppa.texi: Likewise.
967 * doc/c-i370.texi: Likewise.
968 * doc/c-i386.texi: Likewise.
969 * doc/c-i860.texi: Likewise.
970 * doc/c-m32c.texi: Likewise.
971 * doc/c-m32r.texi: Likewise.
972 * doc/c-m68hc11.texi: Likewise.
973 * doc/c-m68k.texi: Likewise.
974 * doc/c-microblaze.texi: Likewise.
975 * doc/c-mips.texi: Likewise.
976 * doc/c-msp430.texi: Likewise.
977 * doc/c-mt.texi: Likewise.
978 * doc/c-s390.texi: Likewise.
979 * doc/c-score.texi: Likewise.
980 * doc/c-sh.texi: Likewise.
981 * doc/c-sh64.texi: Likewise.
982 * doc/c-tic54x.texi: Likewise.
983 * doc/c-tic6x.texi: Likewise.
984 * doc/c-v850.texi: Likewise.
985 * doc/c-xc16x.texi: Likewise.
986 * doc/c-xgate.texi: Likewise.
987 * doc/c-xtensa.texi: Likewise.
988 * doc/c-z80.texi: Likewise.
989 * doc/internals.texi: Likewise.
990
4c665b71
RM
9912013-01-10 Roland McGrath <mcgrathr@google.com>
992
993 * hash.c (hash_new_sized): Make it global.
994 * hash.h: Declare it.
995 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
996 pass a small size.
997
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NC
9982013-01-10 Will Newton <will.newton@imgtec.com>
999
1000 * Makefile.am: Add Meta.
1001 * Makefile.in: Regenerate.
1002 * config/tc-metag.c: New file.
1003 * config/tc-metag.h: New file.
1004 * configure.tgt: Add Meta.
1005 * doc/Makefile.am: Add Meta.
1006 * doc/Makefile.in: Regenerate.
1007 * doc/all.texi: Add Meta.
1008 * doc/as.texiinfo: Document Meta options.
1009 * doc/c-metag.texi: New file.
1010
b37df7c4
SE
10112013-01-09 Steve Ellcey <sellcey@mips.com>
1012
1013 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1014 calls.
1015 * config/tc-mips.c (internalError): Remove, replace with abort.
1016
a3251895
YZ
10172013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1018
1019 * config/tc-aarch64.c (parse_operands): Change to compare the result
1020 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1021
8ab8155f
NC
10222013-01-07 Nick Clifton <nickc@redhat.com>
1023
1024 PR gas/14887
1025 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1026 anticipated character.
1027 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1028 here as it is no longer needed.
1029
a4ac1c42
AS
10302013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1031
1032 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1033 * doc/c-score.texi (SCORE-Opts): Likewise.
1034 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1035
e407c74b
NC
10362013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1037
1038 * config/tc-mips.c: Add support for MIPS r5900.
1039 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1040 lq and sq.
1041 (can_swap_branch_p, get_append_method): Detect some conditional
1042 short loops to fix a bug on the r5900 by NOP in the branch delay
1043 slot.
1044 (M_MUL): Support 3 operands in multu on r5900.
1045 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1046 (s_mipsset): Force 32 bit floating point on r5900.
1047 (mips_ip): Check parameter range of instructions mfps and mtps on
1048 r5900.
1049 * configure.in: Detect CPU type when target string contains r5900
1050 (e.g. mips64r5900el-linux-gnu).
1051
62658407
L
10522013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1053
1054 * as.c (parse_args): Update copyright year to 2013.
1055
95830fd1
YZ
10562013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1057
1058 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1059 and "cortex57".
1060
517bb291 10612013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1062
517bb291
NC
1063 PR gas/14987
1064 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1065 closing bracket.
d709e4e6 1066
517bb291 1067For older changes see ChangeLog-2012
08d56133 1068\f
517bb291 1069Copyright (C) 2013 Free Software Foundation, Inc.
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NC
1070
1071Copying and distribution of this file, with or without modification,
1072are permitted in any medium without royalty provided the copyright
1073notice and this notice are preserved.
1074
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1075Local Variables:
1076mode: change-log
1077left-margin: 8
1078fill-column: 74
1079version-control: never
1080End: