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c31f3936
RS
12013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (md_shortopts, options, md_longopts)
4 (md_longopts_size): Move earlier in file.
5
846ef2d0
RS
62013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
9 with a single "ase" bitmask.
10 (mips_opts): Update accordingly.
11 (file_ase, file_ase_explicit): New variables.
12 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
13 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
14 (ISA_HAS_ROR): Adjust for mips_set_options change.
15 (is_opcode_valid): Take the base ase mask directly from mips_opts.
16 (mips_ip): Adjust for mips_set_options change.
17 (md_parse_option): Likewise. Update file_ase_explicit.
18 (mips_after_parse_args): Adjust for mips_set_options change.
19 Use bitmask operations to select the default ASEs. Set file_ase
20 rather than individual per-ASE variables.
21 (s_mipsset): Adjust for mips_set_options change.
22 (mips_elf_final_processing): Test file_ase rather than
23 file_ase_mdmx. Remove commented-out code.
24
d16afab6
RS
252013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
26
27 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
28 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
29 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
30 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
31 (mips_after_parse_args): Use the new "ase" field to choose
32 the default ASEs.
33 (mips_cpu_info_table): Move ASEs from the "flags" field to the
34 "ase" field.
35
e83a675f
RE
362013-06-18 Richard Earnshaw <rearnsha@arm.com>
37
38 * config/tc-arm.c (symbol_preemptible): New function.
39 (relax_branch): Use it.
40
7f3c4072
CM
412013-06-17 Catherine Moore <clm@codesourcery.com>
42 Maciej W. Rozycki <macro@codesourcery.com>
43 Chao-Ying Fu <fu@mips.com>
44
45 * config/tc-mips.c (mips_set_options): Add ase_eva.
46 (mips_set_options mips_opts): Add ase_eva.
47 (file_ase_eva): Declare.
48 (ISA_SUPPORTS_EVA_ASE): Define.
49 (IS_SEXT_9BIT_NUM): Define.
50 (MIPS_CPU_ASE_EVA): Define.
51 (is_opcode_valid): Add support for ase_eva.
52 (macro_build): Likewise.
53 (macro): Likewise.
54 (validate_mips_insn): Likewise.
55 (validate_micromips_insn): Likewise.
56 (mips_ip): Likewise.
57 (options): Add OPTION_EVA and OPTION_NO_EVA.
58 (md_longopts): Add -meva and -mno-eva.
59 (md_parse_option): Process new options.
60 (mips_after_parse_args): Check for valid EVA combinations.
61 (s_mipsset): Likewise.
62
e410add4
RS
632013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
64
65 * dwarf2dbg.h (dwarf2_move_insn): Declare.
66 * dwarf2dbg.c (line_subseg): Add pmove_tail.
67 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
68 (dwarf2_gen_line_info_1): Update call accordingly.
69 (dwarf2_move_insn): New function.
70 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
71
6a50d470
RS
722013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
73
74 Revert:
75
76 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
77
78 PR gas/13024
79 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
80 (dwarf2_gen_line_info_1): Delete.
81 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
82 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
83 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
84 (dwarf2_directive_loc): Push previous .locs instead of generating
85 them immediately.
86
f122319e
CF
872013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
88
89 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
90 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
91
909c7f9c
NC
922013-06-13 Nick Clifton <nickc@redhat.com>
93
94 PR gas/15602
95 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
96 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
97 function. Generates an error if the adjusted offset is out of a
98 16-bit range.
99
5d5755a7
SL
1002013-06-12 Sandra Loosemore <sandra@codesourcery.com>
101
102 * config/tc-nios2.c (md_apply_fix): Mask constant
103 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
104
3bf0dbfb
MR
1052013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
106
107 * config/tc-mips.c (append_insn): Don't do branch relaxation for
108 MIPS-3D instructions either.
109 (md_convert_frag): Update the COPx branch mask accordingly.
110
111 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
112 option.
113 * doc/as.texinfo (Overview): Add --relax-branch and
114 --no-relax-branch.
115 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
116 --no-relax-branch.
117
9daf7bab
SL
1182013-06-09 Sandra Loosemore <sandra@codesourcery.com>
119
120 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
121 omitted.
122
d301a56b
RS
1232013-06-08 Catherine Moore <clm@codesourcery.com>
124
125 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
126 (is_opcode_valid_16): Pass ase value to opcode_is_member.
127 (append_insn): Change INSN_xxxx to ASE_xxxx.
128
7bab7634
DC
1292013-06-01 George Thomas <george.thomas@atmel.com>
130
131 * gas/config/tc-avr.c: Change ISA for devices with USB support to
132 AVR_ISA_XMEGAU
133
f60cf82f
L
1342013-05-31 H.J. Lu <hongjiu.lu@intel.com>
135
136 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
137 for ELF.
138
a3f278e2
CM
1392013-05-31 Paul Brook <paul@codesourcery.com>
140
141 gas/
142 * config/tc-mips.c (s_ehword): New.
143
067ec077
CM
1442013-05-30 Paul Brook <paul@codesourcery.com>
145
146 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
147
d6101ac2
MR
1482013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
149
150 * write.c (resolve_reloc_expr_symbols): On REL targets don't
151 convert relocs who have no relocatable field either. Rephrase
152 the conditional so that the PC-relative check is only applied
153 for REL targets.
154
f19ccbda
MR
1552013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
156
157 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
158 calculation.
159
418009c2
YZ
1602013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
161
162 * config/tc-aarch64.c (reloc_table): Update to use
163 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
164 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
165 (md_apply_fix): Likewise.
166 (aarch64_force_relocation): Likewise.
167
0a8897c7
KT
1682013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
169
170 * config/tc-arm.c (it_fsm_post_encode): Improve
171 warning messages about deprecated IT block formats.
172
89d2a2a3
MS
1732013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
174
175 * config/tc-aarch64.c (md_apply_fix): Move value range checking
176 inside fx_done condition.
177
c77c0862
RS
1782013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
179
180 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
181
c0637f3a
PB
1822013-05-20 Peter Bergner <bergner@vnet.ibm.com>
183
184 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
185 and clean up warning when using PRINT_OPCODE_TABLE.
186
5656a981
AM
1872013-05-20 Alan Modra <amodra@gmail.com>
188
189 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
190 and data fixups performing shift/high adjust/sign extension on
191 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
192 when writing data fixups rather than recalculating size.
193
997b26e8
JBG
1942013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
195
196 * doc/c-msp430.texi: Fix typo.
197
9f6e76f4
TG
1982013-05-16 Tristan Gingold <gingold@adacore.com>
199
200 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
201 are also TOC symbols.
202
638d3803
NC
2032013-05-16 Nick Clifton <nickc@redhat.com>
204
205 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
206 Add -mcpu command to specify core type.
997b26e8 207 * doc/c-msp430.texi: Update documentation.
638d3803 208
b015e599
AP
2092013-05-09 Andrew Pinski <apinski@cavium.com>
210
211 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
212 (mips_opts): Update for the new field.
213 (file_ase_virt): New variable.
214 (ISA_SUPPORTS_VIRT_ASE): New macro.
215 (ISA_SUPPORTS_VIRT64_ASE): New macro.
216 (MIPS_CPU_ASE_VIRT): New define.
217 (is_opcode_valid): Handle ase_virt.
218 (macro_build): Handle "+J".
219 (validate_mips_insn): Likewise.
220 (mips_ip): Likewise.
221 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
222 (md_longopts): Add mvirt and mnovirt
223 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
224 (mips_after_parse_args): Handle ase_virt field.
225 (s_mipsset): Handle "virt" and "novirt".
226 (mips_elf_final_processing): Add a comment about virt ASE might need
227 a new flag.
228 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
229 * doc/c-mips.texi: Document -mvirt and -mno-virt.
230 Document ".set virt" and ".set novirt".
231
da8094d7
AM
2322013-05-09 Alan Modra <amodra@gmail.com>
233
234 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
235 control of operand flag bits.
236
c5f8c205
AM
2372013-05-07 Alan Modra <amodra@gmail.com>
238
239 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
240 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
241 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
242 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
243 (md_apply_fix): Set fx_no_overflow for assorted relocations.
244 Shift and sign-extend fieldval for use by some VLE reloc
245 operand->insert functions.
246
b47468a6
CM
2472013-05-06 Paul Brook <paul@codesourcery.com>
248 Catherine Moore <clm@codesourcery.com>
249
c5f8c205
AM
250 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
251 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
252 (md_apply_fix): Likewise.
253 (tc_gen_reloc): Likewise.
254
2de39019
CM
2552013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
256
257 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
258 (mips_fix_adjustable): Adjust pc-relative check to use
259 limited_pc_reloc_p.
260
754e2bb9
RS
2612013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
262
263 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
264 (s_mips_stab): Do not restrict to stabn only.
265
13761a11
NC
2662013-05-02 Nick Clifton <nickc@redhat.com>
267
268 * config/tc-msp430.c: Add support for the MSP430X architecture.
269 Add code to insert a NOP instruction after any instruction that
270 might change the interrupt state.
271 Add support for the LARGE memory model.
272 Add code to initialise the .MSP430.attributes section.
273 * config/tc-msp430.h: Add support for the MSP430X architecture.
274 * doc/c-msp430.texi: Document the new -mL and -mN command line
275 options.
276 * NEWS: Mention support for the MSP430X architecture.
277
df26367c
MR
2782013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
279
280 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
281 alpha*-*-linux*ecoff*.
282
f02d8318
CF
2832013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
284
285 * config/tc-mips.c (mips_ip): Add sizelo.
286 For "+C", "+G", and "+H", set sizelo and compare against it.
287
b40bf0a2
NC
2882013-04-29 Nick Clifton <nickc@redhat.com>
289
290 * as.c (Options): Add -gdwarf-sections.
291 (parse_args): Likewise.
292 * as.h (flag_dwarf_sections): Declare.
293 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
294 (process_entries): When -gdwarf-sections is enabled generate
295 fragmentary .debug_line sections.
296 (out_debug_line): Set the section for the .debug_line section end
297 symbol.
298 * doc/as.texinfo: Document -gdwarf-sections.
299 * NEWS: Mention -gdwarf-sections.
300
8eeccb77 3012013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
302
303 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
304 according to the target parameter. Don't call s_segm since s_segm
305 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
306 initialized yet.
307 (md_begin): Call s_segm according to target parameter from command
308 line.
309
49926cd0
AM
3102013-04-25 Alan Modra <amodra@gmail.com>
311
312 * configure.in: Allow little-endian linux.
313 * configure: Regenerate.
314
e3031850
SL
3152013-04-24 Sandra Loosemore <sandra@codesourcery.com>
316
317 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
318 "fstatus" control register to "eccinj".
319
cb948fc0
KT
3202013-04-19 Kai Tietz <ktietz@redhat.com>
321
322 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
323
4455e9ad
JB
3242013-04-15 Julian Brown <julian@codesourcery.com>
325
326 * expr.c (add_to_result, subtract_from_result): Make global.
327 * expr.h (add_to_result, subtract_from_result): Add prototypes.
328 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
329 subtract_from_result to handle extra bit of precision for .sleb128
330 directive operands.
331
956a6ba3
JB
3322013-04-10 Julian Brown <julian@codesourcery.com>
333
334 * read.c (convert_to_bignum): Add sign parameter. Use it
335 instead of X_unsigned to determine sign of resulting bignum.
336 (emit_expr): Pass extra argument to convert_to_bignum.
337 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
338 X_extrabit to convert_to_bignum.
339 (parse_bitfield_cons): Set X_extrabit.
340 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
341 Initialise X_extrabit field as appropriate.
342 (add_to_result): New.
343 (subtract_from_result): New.
344 (expr): Use above.
345 * expr.h (expressionS): Add X_extrabit field.
346
eb9f3f00
JB
3472013-04-10 Jan Beulich <jbeulich@suse.com>
348
349 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
350 register being PC when is_t or writeback, and use distinct
351 diagnostic for the latter case.
352
ccb84d65
JB
3532013-04-10 Jan Beulich <jbeulich@suse.com>
354
355 * gas/config/tc-arm.c (parse_operands): Re-write
356 po_barrier_or_imm().
357 (do_barrier): Remove bogus constraint().
358 (do_t_barrier): Remove.
359
4d13caa0
NC
3602013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
361
362 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
363 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
364 ATmega2564RFR2
365 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
366
16d02dc9
JB
3672013-04-09 Jan Beulich <jbeulich@suse.com>
368
369 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
370 Use local variable Rt in more places.
371 (do_vmsr): Accept all control registers.
372
05ac0ffb
JB
3732013-04-09 Jan Beulich <jbeulich@suse.com>
374
375 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
376 if there was none specified for moves between scalar and core
377 register.
378
2d51fb74
JB
3792013-04-09 Jan Beulich <jbeulich@suse.com>
380
381 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
382 NEON_ALL_LANES case.
383
94dcf8bf
JB
3842013-04-08 Jan Beulich <jbeulich@suse.com>
385
386 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
387 PC-relative VSTR.
388
1472d06f
JB
3892013-04-08 Jan Beulich <jbeulich@suse.com>
390
391 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
392 entry to sp_fiq.
393
0c76cae8
AM
3942013-04-03 Alan Modra <amodra@gmail.com>
395
396 * doc/as.texinfo: Add support to generate man options for h8300.
397 * doc/c-h8300.texi: Likewise.
398
92eb40d9
RR
3992013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
400
401 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
402 Cortex-A57.
403
51dcdd4d
NC
4042013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
405
406 PR binutils/15068
407 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
408
c5d685bf
NC
4092013-03-26 Nick Clifton <nickc@redhat.com>
410
9b978282
NC
411 PR gas/15295
412 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
413 start of the file each time.
414
c5d685bf
NC
415 PR gas/15178
416 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
417 FreeBSD targets.
418
9699c833
TG
4192013-03-26 Douglas B Rupp <rupp@gnat.com>
420
421 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
422 after fixup.
423
4755303e
WN
4242013-03-21 Will Newton <will.newton@linaro.org>
425
426 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
427 pc-relative str instructions in Thumb mode.
428
81f5558e
NC
4292013-03-21 Michael Schewe <michael.schewe@gmx.net>
430
431 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
432 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
433 R_H8_DISP32A16.
434 * config/tc-h8300.h: Remove duplicated defines.
435
71863e73
NC
4362013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
437
438 PR gas/15282
439 * tc-avr.c (mcu_has_3_byte_pc): New function.
440 (tc_cfi_frame_initial_instructions): Call it to find return
441 address size.
442
795b8e6b
NC
4432013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
444
445 PR gas/15095
446 * config/tc-tic6x.c (tic6x_try_encode): Handle
447 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
448 encode register pair numbers when required.
449
ba86b375
WN
4502013-03-15 Will Newton <will.newton@linaro.org>
451
452 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
453 in vstr in Thumb mode for pre-ARMv7 cores.
454
9e6f3811
AS
4552013-03-14 Andreas Schwab <schwab@suse.de>
456
457 * doc/c-arc.texi (ARC Directives): Revert last change and use
458 @itemize instead of @table.
459 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
460
b10bf8c5
NC
4612013-03-14 Nick Clifton <nickc@redhat.com>
462
463 PR gas/15273
464 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
465 NULL message, instead just check ARM_CPU_IS_ANY directly.
466
ba724cfc
NC
4672013-03-14 Nick Clifton <nickc@redhat.com>
468
469 PR gas/15212
9e6f3811 470 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
471 for table format.
472 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
473 to the @item directives.
474 (ARM-Neon-Alignment): Move to correct place in the document.
475 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
476 formatting.
477 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
478 @smallexample.
479
531a94fd
SL
4802013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
481
482 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
483 case. Add default BAD_CASE to switch.
484
dad60f8e
SL
4852013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
486
487 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
488 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
489
dd5181d5
KT
4902013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
491
492 * config/tc-arm.c (crc_ext_armv8): New feature set.
493 (UNPRED_REG): New macro.
494 (do_crc32_1): New function.
495 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
496 do_crc32ch, do_crc32cw): Likewise.
497 (TUEc): New macro.
498 (insns): Add entries for crc32 mnemonics.
499 (arm_extensions): Add entry for crc.
500
8e723a10
CLT
5012013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
502
503 * write.h (struct fix): Add fx_dot_frag field.
504 (dot_frag): Declare.
505 * write.c (dot_frag): New variable.
506 (fix_new_internal): Set fx_dot_frag field with dot_frag.
507 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
508 * expr.c (expr): Save value of frag_now in dot_frag when setting
509 dot_value.
510 * read.c (emit_expr): Likewise. Delete comments.
511
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5122013-03-07 H.J. Lu <hongjiu.lu@intel.com>
513
514 * config/tc-i386.c (flag_code_names): Removed.
515 (i386_index_check): Rewrote.
516
62b0d0d5
YZ
5172013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
518
519 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
520 add comment.
521 (aarch64_double_precision_fmovable): New function.
522 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
523 function; handle hexadecimal representation of IEEE754 encoding.
524 (parse_operands): Update the call to parse_aarch64_imm_float.
525
165de32a
L
5262013-02-28 H.J. Lu <hongjiu.lu@intel.com>
527
528 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
529 (check_hle): Updated.
530 (md_assemble): Likewise.
531 (parse_insn): Likewise.
532
d5de92cf
L
5332013-02-28 H.J. Lu <hongjiu.lu@intel.com>
534
535 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 536 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
537 (parse_insn): Remove expecting_string_instruction. Set
538 i.rep_prefix.
539
e60bb1dd
YZ
5402013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
541
542 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
543
aeebdd9b
YZ
5442013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
545
546 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
547 for system registers.
548
4107ae22
DD
5492013-02-27 DJ Delorie <dj@redhat.com>
550
551 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
552 (rl78_op): Handle %code().
553 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
554 (tc_gen_reloc): Likwise; convert to a computed reloc.
555 (md_apply_fix): Likewise.
556
151fa98f
NC
5572013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
558
559 * config/rl78-parse.y: Fix encoding of DIVWU insn.
560
70a8bc5b 5612013-02-25 Terry Guo <terry.guo@arm.com>
562
563 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
564 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
565 list of accepted CPUs.
566
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5672013-02-19 H.J. Lu <hongjiu.lu@intel.com>
568
569 PR gas/15159
570 * config/tc-i386.c (cpu_arch): Add ".smap".
571
572 * doc/c-i386.texi: Document smap.
573
8a75745d
MR
5742013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
575
576 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
577 mips_assembling_insn appropriately.
578 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
579
79850f26
MR
5802013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
581
cf29fc61 582 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
583 extraneous braces.
584
4c261dff
NC
5852013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
586
5c111e37 587 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 588
ea33f281
NC
5892013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
590
591 * configure.tgt: Add nios2-*-rtems*.
592
a1ccaec9
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5932013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
594
595 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
596 NULL.
597
0aa27725
RS
5982013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
599
600 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
601 (macro): Use it. Assert that trunc.w.s is not used for r5900.
602
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6032013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
604
605 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
606 core.
607
36591ba1 6082013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 609 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
610
611 Based on patches from Altera Corporation.
612
613 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
614 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
615 * Makefile.in: Regenerated.
616 * configure.tgt: Add case for nios2*-linux*.
617 * config/obj-elf.c: Conditionally include elf/nios2.h.
618 * config/tc-nios2.c: New file.
619 * config/tc-nios2.h: New file.
620 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
621 * doc/Makefile.in: Regenerated.
622 * doc/all.texi: Set NIOSII.
623 * doc/as.texinfo (Overview): Add Nios II options.
624 (Machine Dependencies): Include c-nios2.texi.
625 * doc/c-nios2.texi: New file.
626 * NEWS: Note Altera Nios II support.
627
94d4433a
AM
6282013-02-06 Alan Modra <amodra@gmail.com>
629
630 PR gas/14255
631 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
632 Don't skip fixups with fx_subsy non-NULL.
633 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
634 with fx_subsy non-NULL.
635
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6362013-02-04 H.J. Lu <hongjiu.lu@intel.com>
637
638 * doc/c-metag.texi: Add "@c man" markers.
639
89d67ed9
AM
6402013-02-04 Alan Modra <amodra@gmail.com>
641
642 * write.c (fixup_segment): Return void. Delete seg_reloc_count
643 related code.
644 (TC_ADJUST_RELOC_COUNT): Delete.
645 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
646
89072bd6
AM
6472013-02-04 Alan Modra <amodra@gmail.com>
648
649 * po/POTFILES.in: Regenerate.
650
f9b2d544
NC
6512013-01-30 Markos Chandras <markos.chandras@imgtec.com>
652
653 * config/tc-metag.c: Make SWAP instruction less permissive with
654 its operands.
655
392ca752
DD
6562013-01-29 DJ Delorie <dj@redhat.com>
657
658 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
659 relocs in .word/.etc statements.
660
427d0db6
RM
6612013-01-29 Roland McGrath <mcgrathr@google.com>
662
663 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
664 immediate value for 8-bit offset" error so it shows line info.
665
4faf939a
JM
6662013-01-24 Joseph Myers <joseph@codesourcery.com>
667
668 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
669 for 64-bit output.
670
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NC
6712013-01-24 Nick Clifton <nickc@redhat.com>
672
673 * config/tc-v850.c: Add support for e3v5 architecture.
674 * doc/c-v850.texi: Mention new support.
675
fb5b7503
NC
6762013-01-23 Nick Clifton <nickc@redhat.com>
677
678 PR gas/15039
679 * config/tc-avr.c: Include dwarf2dbg.h.
680
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6812013-01-18 H.J. Lu <hongjiu.lu@intel.com>
682
683 * config/tc-i386.c (reloc): Support size relocation only for ELF.
684 (tc_i386_fix_adjustable): Likewise.
685 (lex_got): Likewise.
686 (tc_gen_reloc): Likewise.
687
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6882013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
689
690 * config/tc-aarch64.c (output_operand_error_record): Change to output
691 the out-of-range error message as value-expected message if there is
692 only one single value in the expected range.
693 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
694 LSL #0 as a programmer-friendly feature.
695
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6962013-01-16 H.J. Lu <hongjiu.lu@intel.com>
697
698 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
699 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
700 BFD_RELOC_64_SIZE relocations.
701 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
702 for it.
703 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
704 relocations against local symbols.
705
a5840dce
AM
7062013-01-16 Alan Modra <amodra@gmail.com>
707
708 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
709 finding some sort of toc syntax error, and break to avoid
710 compiler uninit warning.
711
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7122013-01-15 H.J. Lu <hongjiu.lu@intel.com>
713
714 PR gas/15019
715 * config/tc-i386.c (lex_got): Increment length by 1 if the
716 relocation token is removed.
717
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NC
7182013-01-15 Nick Clifton <nickc@redhat.com>
719
720 * config/tc-v850.c (md_assemble): Allow signed values for
721 V850E_IMMEDIATE.
722
464e3686
SK
7232013-01-11 Sean Keys <skeys@ipdatasys.com>
724
725 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 726 git to cvs.
464e3686 727
5817ffd1
PB
7282013-01-10 Peter Bergner <bergner@vnet.ibm.com>
729
730 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
731 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
732 * config/tc-ppc.c (md_show_usage): Likewise.
733 (ppc_handle_align): Handle power8's group ending nop.
734
f4b1f6a9
SK
7352013-01-10 Sean Keys <skeys@ipdatasys.com>
736
737 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 738 that the assember exits after the opcodes have been printed.
f4b1f6a9 739
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7402013-01-10 H.J. Lu <hongjiu.lu@intel.com>
741
742 * app.c: Remove trailing white spaces.
743 * as.c: Likewise.
744 * as.h: Likewise.
745 * cond.c: Likewise.
746 * dw2gencfi.c: Likewise.
747 * dwarf2dbg.h: Likewise.
748 * ecoff.c: Likewise.
749 * input-file.c: Likewise.
750 * itbl-lex.h: Likewise.
751 * output-file.c: Likewise.
752 * read.c: Likewise.
753 * sb.c: Likewise.
754 * subsegs.c: Likewise.
755 * symbols.c: Likewise.
756 * write.c: Likewise.
757 * config/tc-i386.c: Likewise.
758 * doc/Makefile.am: Likewise.
759 * doc/Makefile.in: Likewise.
760 * doc/c-aarch64.texi: Likewise.
761 * doc/c-alpha.texi: Likewise.
762 * doc/c-arc.texi: Likewise.
763 * doc/c-arm.texi: Likewise.
764 * doc/c-avr.texi: Likewise.
765 * doc/c-bfin.texi: Likewise.
766 * doc/c-cr16.texi: Likewise.
767 * doc/c-d10v.texi: Likewise.
768 * doc/c-d30v.texi: Likewise.
769 * doc/c-h8300.texi: Likewise.
770 * doc/c-hppa.texi: Likewise.
771 * doc/c-i370.texi: Likewise.
772 * doc/c-i386.texi: Likewise.
773 * doc/c-i860.texi: Likewise.
774 * doc/c-m32c.texi: Likewise.
775 * doc/c-m32r.texi: Likewise.
776 * doc/c-m68hc11.texi: Likewise.
777 * doc/c-m68k.texi: Likewise.
778 * doc/c-microblaze.texi: Likewise.
779 * doc/c-mips.texi: Likewise.
780 * doc/c-msp430.texi: Likewise.
781 * doc/c-mt.texi: Likewise.
782 * doc/c-s390.texi: Likewise.
783 * doc/c-score.texi: Likewise.
784 * doc/c-sh.texi: Likewise.
785 * doc/c-sh64.texi: Likewise.
786 * doc/c-tic54x.texi: Likewise.
787 * doc/c-tic6x.texi: Likewise.
788 * doc/c-v850.texi: Likewise.
789 * doc/c-xc16x.texi: Likewise.
790 * doc/c-xgate.texi: Likewise.
791 * doc/c-xtensa.texi: Likewise.
792 * doc/c-z80.texi: Likewise.
793 * doc/internals.texi: Likewise.
794
4c665b71
RM
7952013-01-10 Roland McGrath <mcgrathr@google.com>
796
797 * hash.c (hash_new_sized): Make it global.
798 * hash.h: Declare it.
799 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
800 pass a small size.
801
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8022013-01-10 Will Newton <will.newton@imgtec.com>
803
804 * Makefile.am: Add Meta.
805 * Makefile.in: Regenerate.
806 * config/tc-metag.c: New file.
807 * config/tc-metag.h: New file.
808 * configure.tgt: Add Meta.
809 * doc/Makefile.am: Add Meta.
810 * doc/Makefile.in: Regenerate.
811 * doc/all.texi: Add Meta.
812 * doc/as.texiinfo: Document Meta options.
813 * doc/c-metag.texi: New file.
814
b37df7c4
SE
8152013-01-09 Steve Ellcey <sellcey@mips.com>
816
817 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
818 calls.
819 * config/tc-mips.c (internalError): Remove, replace with abort.
820
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8212013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
822
823 * config/tc-aarch64.c (parse_operands): Change to compare the result
824 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
825
8ab8155f
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8262013-01-07 Nick Clifton <nickc@redhat.com>
827
828 PR gas/14887
829 * config/tc-arm.c (skip_past_char): Skip whitespace before the
830 anticipated character.
831 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
832 here as it is no longer needed.
833
a4ac1c42
AS
8342013-01-06 Andreas Schwab <schwab@linux-m68k.org>
835
836 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
837 * doc/c-score.texi (SCORE-Opts): Likewise.
838 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
839
e407c74b
NC
8402013-01-04 Juergen Urban <JuergenUrban@gmx.de>
841
842 * config/tc-mips.c: Add support for MIPS r5900.
843 Add M_LQ_AB and M_SQ_AB to support large values for instructions
844 lq and sq.
845 (can_swap_branch_p, get_append_method): Detect some conditional
846 short loops to fix a bug on the r5900 by NOP in the branch delay
847 slot.
848 (M_MUL): Support 3 operands in multu on r5900.
849 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
850 (s_mipsset): Force 32 bit floating point on r5900.
851 (mips_ip): Check parameter range of instructions mfps and mtps on
852 r5900.
853 * configure.in: Detect CPU type when target string contains r5900
854 (e.g. mips64r5900el-linux-gnu).
855
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8562013-01-02 H.J. Lu <hongjiu.lu@intel.com>
857
858 * as.c (parse_args): Update copyright year to 2013.
859
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8602013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
861
862 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
863 and "cortex57".
864
517bb291 8652013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 866
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867 PR gas/14987
868 * config/tc-arm.c (parse_address_main): Skip whitespace before a
869 closing bracket.
d709e4e6 870
517bb291 871For older changes see ChangeLog-2012
08d56133 872\f
517bb291 873Copyright (C) 2013 Free Software Foundation, Inc.
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874
875Copying and distribution of this file, with or without modification,
876are permitted in any medium without royalty provided the copyright
877notice and this notice are preserved.
878
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879Local Variables:
880mode: change-log
881left-margin: 8
882fill-column: 74
883version-control: never
884End: