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614eb277
AK
12013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
2
3 * config/tc-s390.c (s390_machine): Don't force the .machine
4 argument to lower case.
5
e673710a
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62013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7
8 * config/tc-arm.c (s_arm_arch_extension): Improve error message
9 for invalid extension.
10
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YZ
112013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
12
13 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
14 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
15 (aarch64_abi): New variable.
16 (ilp32_p): Change to be a macro.
17 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
18 (struct aarch64_option_abi_value_table): New struct.
19 (aarch64_abis): New table.
20 (aarch64_parse_abi): New function.
21 (aarch64_long_opts): Add entry for -mabi=.
22 * doc/as.texinfo (Target AArch64 options): Document -mabi.
23 * doc/c-aarch64.texi: Likewise.
24
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252013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
26
27 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
28 unsigned comparison.
29
f0c00282
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302013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
31
32 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
33 RX610.
34 * config/rx-parse.y: (rx_check_float_support): Add function to
35 check floating point operation support for target RX100 and
36 RX200.
37 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
38 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
39 RX200, RX600, and RX610
40
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412013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
42
43 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
44
8be59acb
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452013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
46
47 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
48 * doc/c-avr.texi: Likewise.
49
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502013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
51
52 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
53 error with older GCCs.
54 (mips16_macro_build): Dereference args.
55
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562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
57
58 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
59 New functions, split out from...
60 (reg_lookup): ...here. Remove itbl support.
61 (reglist_lookup): Delete.
62 (mips_operand_token_type): New enum.
63 (mips_operand_token): New structure.
64 (mips_operand_tokens): New variable.
65 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
66 (mips_parse_arguments): New functions.
67 (md_begin): Initialize mips_operand_tokens.
68 (mips_arg_info): Add a token field. Remove optional_reg field.
69 (match_char, match_expression): New functions.
70 (match_const_int): Use match_expression. Remove "s" argument
71 and return a boolean result. Remove O_register handling.
72 (match_regno, match_reg, match_reg_range): New functions.
73 (match_int_operand, match_mapped_int_operand, match_msb_operand)
74 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
75 (match_addiusp_operand, match_clo_clz_dest_operand)
76 (match_lwm_swm_list_operand, match_entry_exit_operand)
77 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
78 (match_tied_reg_operand): Remove "s" argument and return a boolean
79 result. Match tokens rather than text. Update calls to
80 match_const_int. Rely on match_regno to call check_regno.
81 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
82 "arg" argument. Return a boolean result.
83 (parse_float_constant): Replace with...
84 (match_float_constant): ...this new function.
85 (match_operand): Remove "s" argument and return a boolean result.
86 Update calls to subfunctions.
87 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
88 rather than string-parsing routines. Update handling of optional
89 registers for token scheme.
90
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912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (parse_float_constant): Split out from...
94 (mips_ip): ...here.
95
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962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
99 Delete.
100
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1012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
102
103 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
104 (match_entry_exit_operand): New function.
105 (match_save_restore_list_operand): Likewise.
106 (match_operand): Use them.
107 (check_absolute_expr): Delete.
108 (mips16_ip): Rewrite main parsing loop to use mips_operands.
109
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1102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
111
112 * config/tc-mips.c: Enable functions commented out in previous patch.
113 (SKIP_SPACE_TABS): Move further up file.
114 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
115 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
116 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
117 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
118 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
119 (micromips_imm_b_map, micromips_imm_c_map): Delete.
120 (mips_lookup_reg_pair): Delete.
121 (macro): Use report_bad_range and report_bad_field.
122 (mips_immed, expr_const_in_range): Delete.
123 (mips_ip): Rewrite main parsing loop to use new functions.
124
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1252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
128 Change return type to bfd_boolean.
129 (report_bad_range, report_bad_field): New functions.
130 (mips_arg_info): New structure.
131 (match_const_int, convert_reg_type, check_regno, match_int_operand)
132 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
133 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
134 (match_addiusp_operand, match_clo_clz_dest_operand)
135 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
136 (match_pc_operand, match_tied_reg_operand, match_operand)
137 (check_completed_insn): New functions, commented out for now.
138
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1392013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
140
141 * config/tc-mips.c (insn_insert_operand): New function.
142 (macro_build, mips16_macro_build): Put null character check
143 in the for loop and convert continues to breaks. Use operand
144 structures to handle constant operands.
145
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1462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
147
148 * config/tc-mips.c (validate_mips_insn): Move further up file.
149 Add insn_bits and decode_operand arguments. Use the mips_operand
150 fields to work out which bits an operand occupies. Detect double
151 definitions.
152 (validate_micromips_insn): Move further up file. Call into
153 validate_mips_insn.
154
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1552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
156
157 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
158
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1592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
160
161 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
162 and "~".
163 (macro): Update accordingly.
164
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1652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
168 (imm_reloc): Delete.
169 (md_assemble): Remove imm_reloc handling.
170 (mips_ip): Update commentary. Use offset_expr and offset_reloc
171 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
172 Use a temporary array rather than imm_reloc when parsing
173 constant expressions. Remove imm_reloc initialization.
174 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
175 for the relaxable field. Use a relax_char variable to track the
176 type of this field. Remove imm_reloc initialization.
177
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1782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
179
180 * config/tc-mips.c (mips16_ip): Handle "I".
181
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1822013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
183
184 * config/tc-mips.c (mips_flag_nan2008): New variable.
185 (options): Add OPTION_NAN enum value.
186 (md_longopts): Handle it.
187 (md_parse_option): Likewise.
188 (s_nan): New function.
189 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
190 (md_show_usage): Add -mnan.
191
192 * doc/as.texinfo (Overview): Add -mnan.
193 * doc/c-mips.texi (MIPS Opts): Document -mnan.
194 (MIPS NaN Encodings): New node. Document .nan directive.
195 (MIPS-Dependent): List the new node.
196
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1972013-07-09 Tristan Gingold <gingold@adacore.com>
198
199 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
200
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2012013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
202
203 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
204 for 'A' and assume that the constant has been elided if the result
205 is an O_register.
206
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2072013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
208
209 * config/tc-mips.c (gprel16_reloc_p): New function.
210 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
211 BFD_RELOC_UNUSED.
212 (offset_high_part, small_offset_p): New functions.
213 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
214 register load and store macros, handle the 16-bit offset case first.
215 If a 16-bit offset is not suitable for the instruction we're
216 generating, load it into the temporary register using
217 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
218 M_L_DAB code once the address has been constructed. For double load
219 and store macros, again handle the 16-bit offset case first.
220 If the second register cannot be accessed from the same high
221 part as the first, load it into AT using ADDRESS_ADDI_INSN.
222 Fix the handling of LD in cases where the first register is the
223 same as the base. Also handle the case where the offset is
224 not 16 bits and the second register cannot be accessed from the
225 same high part as the first. For unaligned loads and stores,
226 fuse the offbits == 12 and old "ab" handling. Apply this handling
227 whenever the second offset needs a different high part from the first.
228 Construct the offset using ADDRESS_ADDI_INSN where possible,
229 for offbits == 16 as well as offbits == 12. Use offset_reloc
230 when constructing the individual loads and stores.
231 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
232 and offset_reloc before matching against a particular opcode.
233 Handle elided 'A' constants. Allow 'A' constants to use
234 relocation operators.
235
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2362013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
237
238 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
239 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
240 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
241
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2422013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
243
244 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
245 Require the msb to be <= 31 for "+s". Check that the size is <= 31
246 for both "+s" and "+S".
247
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2482013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
249
250 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
251 (mips_ip, mips16_ip): Handle "+i".
252
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2532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
254
255 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
256 (micromips_to_32_reg_h_map): Rename to...
257 (micromips_to_32_reg_h_map1): ...this.
258 (micromips_to_32_reg_i_map): Rename to...
259 (micromips_to_32_reg_h_map2): ...this.
260 (mips_lookup_reg_pair): New function.
261 (gpr_write_mask, macro): Adjust after above renaming.
262 (validate_micromips_insn): Remove "mi" handling.
263 (mips_ip): Likewise. Parse both registers in a pair for "mh".
264
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2652013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
266
267 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
268 (mips_ip): Remove "+D" and "+T" handling.
269
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2702013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
271
272 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
273 relocs.
274
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2752013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
276
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277 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
278
2792013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
280
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281 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
282 (aarch64_force_relocation): Likewise.
283
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2842013-07-02 Alan Modra <amodra@gmail.com>
285
286 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
287
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2882013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
289
290 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
291 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
292 Replace @sc{mips16} with literal `MIPS16'.
293 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
294
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2952013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
296
297 * config/tc-aarch64.c (reloc_table): Replace
298 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
299 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
300 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
301 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
302 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
303 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
304 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
305 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
306 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
307 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
308 (aarch64_force_relocation): Likewise.
309
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3102013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
311
312 * config/tc-aarch64.c (ilp32_p): New static variable.
313 (elf64_aarch64_target_format): Return the target according to the
314 value of 'ilp32_p'.
315 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
316 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
317 (aarch64_dwarf2_addr_size): New function.
318 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
319 (DWARF2_ADDR_SIZE): New define.
320
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3212013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
322
323 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
324
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3252013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
326
327 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
328
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3292013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
330
331 * config/tc-mips.c (mips_set_options): Add insn32 member.
332 (mips_opts): Initialize it.
333 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
334 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
335 (md_longopts): Add "minsn32" and "mno-insn32" options.
336 (is_size_valid): Handle insn32 mode.
337 (md_assemble): Pass instruction string down to macro.
338 (brk_fmt): Add second dimension and insn32 mode initializers.
339 (mfhl_fmt): Likewise.
340 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
341 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
342 (macro_build_jalr, move_register): Handle insn32 mode.
343 (macro_build_branch_rs): Likewise.
344 (macro): Handle insn32 mode.
345 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
346 (mips_ip): Handle insn32 mode.
347 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
348 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
349 (mips_handle_align): Handle insn32 mode.
350 (md_show_usage): Add -minsn32 and -mno-insn32.
351
352 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
353 -mno-insn32 options.
354 (-minsn32, -mno-insn32): New options.
355 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
356 options.
357 (MIPS assembly options): New node. Document .set insn32 and
358 .set noinsn32.
359 (MIPS-Dependent): List the new node.
360
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3612013-06-25 Nick Clifton <nickc@redhat.com>
362
363 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
364 the PC in indirect addressing on 430xv2 parts.
365 (msp430_operands): Add version test to hardware bug encoding
366 restrictions.
367
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3682013-06-24 Roland McGrath <mcgrathr@google.com>
369
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370 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
371 so it skips whitespace before it.
372 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
373
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374 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
375 (arm_reg_parse_multi): Skip whitespace first.
376 (parse_reg_list): Likewise.
377 (parse_vfp_reg_list): Likewise.
378 (s_arm_unwind_save_mmxwcg): Likewise.
379
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3802013-06-24 Nick Clifton <nickc@redhat.com>
381
382 PR gas/15623
383 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
384
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3852013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
386
387 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
388
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3892013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c: Assert that offsetT and valueT are at least
392 8 bytes in size.
393 (GPR_SMIN, GPR_SMAX): New macros.
394 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
395
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3962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
397
398 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
399 conditions. Remove any code deselected by them.
400 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
401
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4022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
403
404 * NEWS: Note removal of ECOFF support.
405 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
406 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
407 (MULTI_CFILES): Remove config/e-mipsecoff.c.
408 * Makefile.in: Regenerate.
409 * configure.in: Remove MIPS ECOFF references.
410 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
411 Delete cases.
412 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
413 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
414 (mips-*-*): ...this single case.
415 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
416 MIPS emulations to be e-mipself*.
417 * configure: Regenerate.
418 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
419 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
420 (mips-*-sysv*): Remove coff and ecoff cases.
421 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
422 * ecoff.c: Remove reference to MIPS ECOFF.
423 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
424 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
425 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
426 (mips_hi_fixup): Tweak comment.
427 (append_insn): Require a howto.
428 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
429
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4302013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
431
432 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
433 Use "CPU" instead of "cpu".
434 * doc/c-mips.texi: Likewise.
435 (MIPS Opts): Rename to MIPS Options.
436 (MIPS option stack): Rename to MIPS Option Stack.
437 (MIPS ASE instruction generation overrides): Rename to
438 MIPS ASE Instruction Generation Overrides (for now).
439 (MIPS floating-point): Rename to MIPS Floating-Point.
440
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4412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
442
443 * doc/c-mips.texi (MIPS Macros): New section.
444 (MIPS Object): Replace with...
445 (MIPS Small Data): ...this new section.
446
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4472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
448
449 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
450 Capitalize name. Use @kindex instead of @cindex for .set entries.
451
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4522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
453
454 * doc/c-mips.texi (MIPS Stabs): Remove section.
455
c6278170
RS
4562013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
457
458 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
459 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
460 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
461 (ISA_SUPPORTS_VIRT64_ASE): Delete.
462 (mips_ase): New structure.
463 (mips_ases): New table.
464 (FP64_ASES): New macro.
465 (mips_ase_groups): New array.
466 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
467 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
468 functions.
469 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
470 (md_parse_option): Use mips_ases and mips_set_ase instead of
471 separate case statements for each ASE option.
472 (mips_after_parse_args): Use FP64_ASES. Use
473 mips_check_isa_supports_ases to check the ASEs against
474 other options.
475 (s_mipsset): Use mips_ases and mips_set_ase instead of
476 separate if statements for each ASE option. Use
477 mips_check_isa_supports_ases, even when a non-ASE option
478 is specified.
479
63a4bc21
KT
4802013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
481
482 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
483
c31f3936
RS
4842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (md_shortopts, options, md_longopts)
487 (md_longopts_size): Move earlier in file.
488
846ef2d0
RS
4892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
490
491 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
492 with a single "ase" bitmask.
493 (mips_opts): Update accordingly.
494 (file_ase, file_ase_explicit): New variables.
495 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
496 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
497 (ISA_HAS_ROR): Adjust for mips_set_options change.
498 (is_opcode_valid): Take the base ase mask directly from mips_opts.
499 (mips_ip): Adjust for mips_set_options change.
500 (md_parse_option): Likewise. Update file_ase_explicit.
501 (mips_after_parse_args): Adjust for mips_set_options change.
502 Use bitmask operations to select the default ASEs. Set file_ase
503 rather than individual per-ASE variables.
504 (s_mipsset): Adjust for mips_set_options change.
505 (mips_elf_final_processing): Test file_ase rather than
506 file_ase_mdmx. Remove commented-out code.
507
d16afab6
RS
5082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
509
510 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
511 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
512 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
513 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
514 (mips_after_parse_args): Use the new "ase" field to choose
515 the default ASEs.
516 (mips_cpu_info_table): Move ASEs from the "flags" field to the
517 "ase" field.
518
e83a675f
RE
5192013-06-18 Richard Earnshaw <rearnsha@arm.com>
520
521 * config/tc-arm.c (symbol_preemptible): New function.
522 (relax_branch): Use it.
523
7f3c4072
CM
5242013-06-17 Catherine Moore <clm@codesourcery.com>
525 Maciej W. Rozycki <macro@codesourcery.com>
526 Chao-Ying Fu <fu@mips.com>
527
528 * config/tc-mips.c (mips_set_options): Add ase_eva.
529 (mips_set_options mips_opts): Add ase_eva.
530 (file_ase_eva): Declare.
531 (ISA_SUPPORTS_EVA_ASE): Define.
532 (IS_SEXT_9BIT_NUM): Define.
533 (MIPS_CPU_ASE_EVA): Define.
534 (is_opcode_valid): Add support for ase_eva.
535 (macro_build): Likewise.
536 (macro): Likewise.
537 (validate_mips_insn): Likewise.
538 (validate_micromips_insn): Likewise.
539 (mips_ip): Likewise.
540 (options): Add OPTION_EVA and OPTION_NO_EVA.
541 (md_longopts): Add -meva and -mno-eva.
542 (md_parse_option): Process new options.
543 (mips_after_parse_args): Check for valid EVA combinations.
544 (s_mipsset): Likewise.
545
e410add4
RS
5462013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
547
548 * dwarf2dbg.h (dwarf2_move_insn): Declare.
549 * dwarf2dbg.c (line_subseg): Add pmove_tail.
550 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
551 (dwarf2_gen_line_info_1): Update call accordingly.
552 (dwarf2_move_insn): New function.
553 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
554
6a50d470
RS
5552013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
556
557 Revert:
558
559 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
560
561 PR gas/13024
562 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
563 (dwarf2_gen_line_info_1): Delete.
564 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
565 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
566 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
567 (dwarf2_directive_loc): Push previous .locs instead of generating
568 them immediately.
569
f122319e
CF
5702013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
571
572 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
573 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
574
909c7f9c
NC
5752013-06-13 Nick Clifton <nickc@redhat.com>
576
577 PR gas/15602
578 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
579 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
580 function. Generates an error if the adjusted offset is out of a
581 16-bit range.
582
5d5755a7
SL
5832013-06-12 Sandra Loosemore <sandra@codesourcery.com>
584
585 * config/tc-nios2.c (md_apply_fix): Mask constant
586 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
587
3bf0dbfb
MR
5882013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
589
590 * config/tc-mips.c (append_insn): Don't do branch relaxation for
591 MIPS-3D instructions either.
592 (md_convert_frag): Update the COPx branch mask accordingly.
593
594 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
595 option.
596 * doc/as.texinfo (Overview): Add --relax-branch and
597 --no-relax-branch.
598 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
599 --no-relax-branch.
600
9daf7bab
SL
6012013-06-09 Sandra Loosemore <sandra@codesourcery.com>
602
603 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
604 omitted.
605
d301a56b
RS
6062013-06-08 Catherine Moore <clm@codesourcery.com>
607
608 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
609 (is_opcode_valid_16): Pass ase value to opcode_is_member.
610 (append_insn): Change INSN_xxxx to ASE_xxxx.
611
7bab7634
DC
6122013-06-01 George Thomas <george.thomas@atmel.com>
613
614 * gas/config/tc-avr.c: Change ISA for devices with USB support to
615 AVR_ISA_XMEGAU
616
f60cf82f
L
6172013-05-31 H.J. Lu <hongjiu.lu@intel.com>
618
619 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
620 for ELF.
621
a3f278e2
CM
6222013-05-31 Paul Brook <paul@codesourcery.com>
623
624 gas/
625 * config/tc-mips.c (s_ehword): New.
626
067ec077
CM
6272013-05-30 Paul Brook <paul@codesourcery.com>
628
629 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
630
d6101ac2
MR
6312013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
632
633 * write.c (resolve_reloc_expr_symbols): On REL targets don't
634 convert relocs who have no relocatable field either. Rephrase
635 the conditional so that the PC-relative check is only applied
636 for REL targets.
637
f19ccbda
MR
6382013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
639
640 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
641 calculation.
642
418009c2
YZ
6432013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
644
645 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 646 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
647 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
648 (md_apply_fix): Likewise.
649 (aarch64_force_relocation): Likewise.
650
0a8897c7
KT
6512013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
652
653 * config/tc-arm.c (it_fsm_post_encode): Improve
654 warning messages about deprecated IT block formats.
655
89d2a2a3
MS
6562013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
657
658 * config/tc-aarch64.c (md_apply_fix): Move value range checking
659 inside fx_done condition.
660
c77c0862
RS
6612013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
662
663 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
664
c0637f3a
PB
6652013-05-20 Peter Bergner <bergner@vnet.ibm.com>
666
667 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
668 and clean up warning when using PRINT_OPCODE_TABLE.
669
5656a981
AM
6702013-05-20 Alan Modra <amodra@gmail.com>
671
672 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
673 and data fixups performing shift/high adjust/sign extension on
674 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
675 when writing data fixups rather than recalculating size.
676
997b26e8
JBG
6772013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
678
679 * doc/c-msp430.texi: Fix typo.
680
9f6e76f4
TG
6812013-05-16 Tristan Gingold <gingold@adacore.com>
682
683 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
684 are also TOC symbols.
685
638d3803
NC
6862013-05-16 Nick Clifton <nickc@redhat.com>
687
688 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
689 Add -mcpu command to specify core type.
997b26e8 690 * doc/c-msp430.texi: Update documentation.
638d3803 691
b015e599
AP
6922013-05-09 Andrew Pinski <apinski@cavium.com>
693
694 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
695 (mips_opts): Update for the new field.
696 (file_ase_virt): New variable.
697 (ISA_SUPPORTS_VIRT_ASE): New macro.
698 (ISA_SUPPORTS_VIRT64_ASE): New macro.
699 (MIPS_CPU_ASE_VIRT): New define.
700 (is_opcode_valid): Handle ase_virt.
701 (macro_build): Handle "+J".
702 (validate_mips_insn): Likewise.
703 (mips_ip): Likewise.
704 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
705 (md_longopts): Add mvirt and mnovirt
706 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
707 (mips_after_parse_args): Handle ase_virt field.
708 (s_mipsset): Handle "virt" and "novirt".
709 (mips_elf_final_processing): Add a comment about virt ASE might need
710 a new flag.
711 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
712 * doc/c-mips.texi: Document -mvirt and -mno-virt.
713 Document ".set virt" and ".set novirt".
714
da8094d7
AM
7152013-05-09 Alan Modra <amodra@gmail.com>
716
717 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
718 control of operand flag bits.
719
c5f8c205
AM
7202013-05-07 Alan Modra <amodra@gmail.com>
721
722 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
723 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
724 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
725 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
726 (md_apply_fix): Set fx_no_overflow for assorted relocations.
727 Shift and sign-extend fieldval for use by some VLE reloc
728 operand->insert functions.
729
b47468a6
CM
7302013-05-06 Paul Brook <paul@codesourcery.com>
731 Catherine Moore <clm@codesourcery.com>
732
c5f8c205
AM
733 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
734 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
735 (md_apply_fix): Likewise.
736 (tc_gen_reloc): Likewise.
737
2de39019
CM
7382013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
739
740 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
741 (mips_fix_adjustable): Adjust pc-relative check to use
742 limited_pc_reloc_p.
743
754e2bb9
RS
7442013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
747 (s_mips_stab): Do not restrict to stabn only.
748
13761a11
NC
7492013-05-02 Nick Clifton <nickc@redhat.com>
750
751 * config/tc-msp430.c: Add support for the MSP430X architecture.
752 Add code to insert a NOP instruction after any instruction that
753 might change the interrupt state.
754 Add support for the LARGE memory model.
755 Add code to initialise the .MSP430.attributes section.
756 * config/tc-msp430.h: Add support for the MSP430X architecture.
757 * doc/c-msp430.texi: Document the new -mL and -mN command line
758 options.
759 * NEWS: Mention support for the MSP430X architecture.
760
df26367c
MR
7612013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
762
763 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
764 alpha*-*-linux*ecoff*.
765
f02d8318
CF
7662013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
767
768 * config/tc-mips.c (mips_ip): Add sizelo.
769 For "+C", "+G", and "+H", set sizelo and compare against it.
770
b40bf0a2
NC
7712013-04-29 Nick Clifton <nickc@redhat.com>
772
773 * as.c (Options): Add -gdwarf-sections.
774 (parse_args): Likewise.
775 * as.h (flag_dwarf_sections): Declare.
776 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
777 (process_entries): When -gdwarf-sections is enabled generate
778 fragmentary .debug_line sections.
779 (out_debug_line): Set the section for the .debug_line section end
780 symbol.
781 * doc/as.texinfo: Document -gdwarf-sections.
782 * NEWS: Mention -gdwarf-sections.
783
8eeccb77 7842013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
785
786 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
787 according to the target parameter. Don't call s_segm since s_segm
788 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
789 initialized yet.
790 (md_begin): Call s_segm according to target parameter from command
791 line.
792
49926cd0
AM
7932013-04-25 Alan Modra <amodra@gmail.com>
794
795 * configure.in: Allow little-endian linux.
796 * configure: Regenerate.
797
e3031850
SL
7982013-04-24 Sandra Loosemore <sandra@codesourcery.com>
799
800 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
801 "fstatus" control register to "eccinj".
802
cb948fc0
KT
8032013-04-19 Kai Tietz <ktietz@redhat.com>
804
805 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
806
4455e9ad
JB
8072013-04-15 Julian Brown <julian@codesourcery.com>
808
809 * expr.c (add_to_result, subtract_from_result): Make global.
810 * expr.h (add_to_result, subtract_from_result): Add prototypes.
811 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
812 subtract_from_result to handle extra bit of precision for .sleb128
813 directive operands.
814
956a6ba3
JB
8152013-04-10 Julian Brown <julian@codesourcery.com>
816
817 * read.c (convert_to_bignum): Add sign parameter. Use it
818 instead of X_unsigned to determine sign of resulting bignum.
819 (emit_expr): Pass extra argument to convert_to_bignum.
820 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
821 X_extrabit to convert_to_bignum.
822 (parse_bitfield_cons): Set X_extrabit.
823 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
824 Initialise X_extrabit field as appropriate.
825 (add_to_result): New.
826 (subtract_from_result): New.
827 (expr): Use above.
828 * expr.h (expressionS): Add X_extrabit field.
829
eb9f3f00
JB
8302013-04-10 Jan Beulich <jbeulich@suse.com>
831
832 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
833 register being PC when is_t or writeback, and use distinct
834 diagnostic for the latter case.
835
ccb84d65
JB
8362013-04-10 Jan Beulich <jbeulich@suse.com>
837
838 * gas/config/tc-arm.c (parse_operands): Re-write
839 po_barrier_or_imm().
840 (do_barrier): Remove bogus constraint().
841 (do_t_barrier): Remove.
842
4d13caa0
NC
8432013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
844
845 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
846 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
847 ATmega2564RFR2
848 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
849
16d02dc9
JB
8502013-04-09 Jan Beulich <jbeulich@suse.com>
851
852 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
853 Use local variable Rt in more places.
854 (do_vmsr): Accept all control registers.
855
05ac0ffb
JB
8562013-04-09 Jan Beulich <jbeulich@suse.com>
857
858 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
859 if there was none specified for moves between scalar and core
860 register.
861
2d51fb74
JB
8622013-04-09 Jan Beulich <jbeulich@suse.com>
863
864 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
865 NEON_ALL_LANES case.
866
94dcf8bf
JB
8672013-04-08 Jan Beulich <jbeulich@suse.com>
868
869 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
870 PC-relative VSTR.
871
1472d06f
JB
8722013-04-08 Jan Beulich <jbeulich@suse.com>
873
874 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
875 entry to sp_fiq.
876
0c76cae8
AM
8772013-04-03 Alan Modra <amodra@gmail.com>
878
879 * doc/as.texinfo: Add support to generate man options for h8300.
880 * doc/c-h8300.texi: Likewise.
881
92eb40d9
RR
8822013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
883
884 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
885 Cortex-A57.
886
51dcdd4d
NC
8872013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
888
889 PR binutils/15068
890 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
891
c5d685bf
NC
8922013-03-26 Nick Clifton <nickc@redhat.com>
893
9b978282
NC
894 PR gas/15295
895 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
896 start of the file each time.
897
c5d685bf
NC
898 PR gas/15178
899 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
900 FreeBSD targets.
901
9699c833
TG
9022013-03-26 Douglas B Rupp <rupp@gnat.com>
903
904 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
905 after fixup.
906
4755303e
WN
9072013-03-21 Will Newton <will.newton@linaro.org>
908
909 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
910 pc-relative str instructions in Thumb mode.
911
81f5558e
NC
9122013-03-21 Michael Schewe <michael.schewe@gmx.net>
913
914 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
915 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
916 R_H8_DISP32A16.
917 * config/tc-h8300.h: Remove duplicated defines.
918
71863e73
NC
9192013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
920
921 PR gas/15282
922 * tc-avr.c (mcu_has_3_byte_pc): New function.
923 (tc_cfi_frame_initial_instructions): Call it to find return
924 address size.
925
795b8e6b
NC
9262013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
927
928 PR gas/15095
929 * config/tc-tic6x.c (tic6x_try_encode): Handle
930 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
931 encode register pair numbers when required.
932
ba86b375
WN
9332013-03-15 Will Newton <will.newton@linaro.org>
934
935 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
936 in vstr in Thumb mode for pre-ARMv7 cores.
937
9e6f3811
AS
9382013-03-14 Andreas Schwab <schwab@suse.de>
939
940 * doc/c-arc.texi (ARC Directives): Revert last change and use
941 @itemize instead of @table.
942 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
943
b10bf8c5
NC
9442013-03-14 Nick Clifton <nickc@redhat.com>
945
946 PR gas/15273
947 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
948 NULL message, instead just check ARM_CPU_IS_ANY directly.
949
ba724cfc
NC
9502013-03-14 Nick Clifton <nickc@redhat.com>
951
952 PR gas/15212
9e6f3811 953 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
954 for table format.
955 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
956 to the @item directives.
957 (ARM-Neon-Alignment): Move to correct place in the document.
958 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
959 formatting.
960 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
961 @smallexample.
962
531a94fd
SL
9632013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
964
965 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
966 case. Add default BAD_CASE to switch.
967
dad60f8e
SL
9682013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
969
970 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
971 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
972
dd5181d5
KT
9732013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
974
975 * config/tc-arm.c (crc_ext_armv8): New feature set.
976 (UNPRED_REG): New macro.
977 (do_crc32_1): New function.
978 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
979 do_crc32ch, do_crc32cw): Likewise.
980 (TUEc): New macro.
981 (insns): Add entries for crc32 mnemonics.
982 (arm_extensions): Add entry for crc.
983
8e723a10
CLT
9842013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
985
986 * write.h (struct fix): Add fx_dot_frag field.
987 (dot_frag): Declare.
988 * write.c (dot_frag): New variable.
989 (fix_new_internal): Set fx_dot_frag field with dot_frag.
990 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
991 * expr.c (expr): Save value of frag_now in dot_frag when setting
992 dot_value.
993 * read.c (emit_expr): Likewise. Delete comments.
994
be05d201
L
9952013-03-07 H.J. Lu <hongjiu.lu@intel.com>
996
997 * config/tc-i386.c (flag_code_names): Removed.
998 (i386_index_check): Rewrote.
999
62b0d0d5
YZ
10002013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1001
1002 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1003 add comment.
1004 (aarch64_double_precision_fmovable): New function.
1005 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1006 function; handle hexadecimal representation of IEEE754 encoding.
1007 (parse_operands): Update the call to parse_aarch64_imm_float.
1008
165de32a
L
10092013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1010
1011 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1012 (check_hle): Updated.
1013 (md_assemble): Likewise.
1014 (parse_insn): Likewise.
1015
d5de92cf
L
10162013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1017
1018 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1019 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1020 (parse_insn): Remove expecting_string_instruction. Set
1021 i.rep_prefix.
1022
e60bb1dd
YZ
10232013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1024
1025 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1026
aeebdd9b
YZ
10272013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1028
1029 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1030 for system registers.
1031
4107ae22
DD
10322013-02-27 DJ Delorie <dj@redhat.com>
1033
1034 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1035 (rl78_op): Handle %code().
1036 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1037 (tc_gen_reloc): Likwise; convert to a computed reloc.
1038 (md_apply_fix): Likewise.
1039
151fa98f
NC
10402013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1041
1042 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1043
70a8bc5b 10442013-02-25 Terry Guo <terry.guo@arm.com>
1045
1046 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1047 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1048 list of accepted CPUs.
1049
5c111e37
L
10502013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1051
1052 PR gas/15159
1053 * config/tc-i386.c (cpu_arch): Add ".smap".
1054
1055 * doc/c-i386.texi: Document smap.
1056
8a75745d
MR
10572013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1058
1059 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1060 mips_assembling_insn appropriately.
1061 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1062
79850f26
MR
10632013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1064
cf29fc61 1065 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1066 extraneous braces.
1067
4c261dff
NC
10682013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1069
5c111e37 1070 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1071
ea33f281
NC
10722013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1073
1074 * configure.tgt: Add nios2-*-rtems*.
1075
a1ccaec9
YZ
10762013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1077
1078 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1079 NULL.
1080
0aa27725
RS
10812013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1082
1083 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1084 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1085
da4339ed
NC
10862013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1087
1088 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1089 core.
1090
36591ba1 10912013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1092 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1093
1094 Based on patches from Altera Corporation.
1095
1096 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1097 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1098 * Makefile.in: Regenerated.
1099 * configure.tgt: Add case for nios2*-linux*.
1100 * config/obj-elf.c: Conditionally include elf/nios2.h.
1101 * config/tc-nios2.c: New file.
1102 * config/tc-nios2.h: New file.
1103 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1104 * doc/Makefile.in: Regenerated.
1105 * doc/all.texi: Set NIOSII.
1106 * doc/as.texinfo (Overview): Add Nios II options.
1107 (Machine Dependencies): Include c-nios2.texi.
1108 * doc/c-nios2.texi: New file.
1109 * NEWS: Note Altera Nios II support.
1110
94d4433a
AM
11112013-02-06 Alan Modra <amodra@gmail.com>
1112
1113 PR gas/14255
1114 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1115 Don't skip fixups with fx_subsy non-NULL.
1116 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1117 with fx_subsy non-NULL.
1118
ace9af6f
L
11192013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1120
1121 * doc/c-metag.texi: Add "@c man" markers.
1122
89d67ed9
AM
11232013-02-04 Alan Modra <amodra@gmail.com>
1124
1125 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1126 related code.
1127 (TC_ADJUST_RELOC_COUNT): Delete.
1128 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1129
89072bd6
AM
11302013-02-04 Alan Modra <amodra@gmail.com>
1131
1132 * po/POTFILES.in: Regenerate.
1133
f9b2d544
NC
11342013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1135
1136 * config/tc-metag.c: Make SWAP instruction less permissive with
1137 its operands.
1138
392ca752
DD
11392013-01-29 DJ Delorie <dj@redhat.com>
1140
1141 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1142 relocs in .word/.etc statements.
1143
427d0db6
RM
11442013-01-29 Roland McGrath <mcgrathr@google.com>
1145
1146 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1147 immediate value for 8-bit offset" error so it shows line info.
1148
4faf939a
JM
11492013-01-24 Joseph Myers <joseph@codesourcery.com>
1150
1151 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1152 for 64-bit output.
1153
78c8d46c
NC
11542013-01-24 Nick Clifton <nickc@redhat.com>
1155
1156 * config/tc-v850.c: Add support for e3v5 architecture.
1157 * doc/c-v850.texi: Mention new support.
1158
fb5b7503
NC
11592013-01-23 Nick Clifton <nickc@redhat.com>
1160
1161 PR gas/15039
1162 * config/tc-avr.c: Include dwarf2dbg.h.
1163
8ce3d284
L
11642013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1165
1166 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1167 (tc_i386_fix_adjustable): Likewise.
1168 (lex_got): Likewise.
1169 (tc_gen_reloc): Likewise.
1170
f5555712
YZ
11712013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1172
1173 * config/tc-aarch64.c (output_operand_error_record): Change to output
1174 the out-of-range error message as value-expected message if there is
1175 only one single value in the expected range.
1176 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1177 LSL #0 as a programmer-friendly feature.
1178
8fd4256d
L
11792013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1180
1181 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1182 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1183 BFD_RELOC_64_SIZE relocations.
1184 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1185 for it.
1186 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1187 relocations against local symbols.
1188
a5840dce
AM
11892013-01-16 Alan Modra <amodra@gmail.com>
1190
1191 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1192 finding some sort of toc syntax error, and break to avoid
1193 compiler uninit warning.
1194
af89796a
L
11952013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1196
1197 PR gas/15019
1198 * config/tc-i386.c (lex_got): Increment length by 1 if the
1199 relocation token is removed.
1200
dd42f060
NC
12012013-01-15 Nick Clifton <nickc@redhat.com>
1202
1203 * config/tc-v850.c (md_assemble): Allow signed values for
1204 V850E_IMMEDIATE.
1205
464e3686
SK
12062013-01-11 Sean Keys <skeys@ipdatasys.com>
1207
1208 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1209 git to cvs.
464e3686 1210
5817ffd1
PB
12112013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1212
1213 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1214 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1215 * config/tc-ppc.c (md_show_usage): Likewise.
1216 (ppc_handle_align): Handle power8's group ending nop.
1217
f4b1f6a9
SK
12182013-01-10 Sean Keys <skeys@ipdatasys.com>
1219
1220 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1221 that the assember exits after the opcodes have been printed.
f4b1f6a9 1222
34bca508
L
12232013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1224
1225 * app.c: Remove trailing white spaces.
1226 * as.c: Likewise.
1227 * as.h: Likewise.
1228 * cond.c: Likewise.
1229 * dw2gencfi.c: Likewise.
1230 * dwarf2dbg.h: Likewise.
1231 * ecoff.c: Likewise.
1232 * input-file.c: Likewise.
1233 * itbl-lex.h: Likewise.
1234 * output-file.c: Likewise.
1235 * read.c: Likewise.
1236 * sb.c: Likewise.
1237 * subsegs.c: Likewise.
1238 * symbols.c: Likewise.
1239 * write.c: Likewise.
1240 * config/tc-i386.c: Likewise.
1241 * doc/Makefile.am: Likewise.
1242 * doc/Makefile.in: Likewise.
1243 * doc/c-aarch64.texi: Likewise.
1244 * doc/c-alpha.texi: Likewise.
1245 * doc/c-arc.texi: Likewise.
1246 * doc/c-arm.texi: Likewise.
1247 * doc/c-avr.texi: Likewise.
1248 * doc/c-bfin.texi: Likewise.
1249 * doc/c-cr16.texi: Likewise.
1250 * doc/c-d10v.texi: Likewise.
1251 * doc/c-d30v.texi: Likewise.
1252 * doc/c-h8300.texi: Likewise.
1253 * doc/c-hppa.texi: Likewise.
1254 * doc/c-i370.texi: Likewise.
1255 * doc/c-i386.texi: Likewise.
1256 * doc/c-i860.texi: Likewise.
1257 * doc/c-m32c.texi: Likewise.
1258 * doc/c-m32r.texi: Likewise.
1259 * doc/c-m68hc11.texi: Likewise.
1260 * doc/c-m68k.texi: Likewise.
1261 * doc/c-microblaze.texi: Likewise.
1262 * doc/c-mips.texi: Likewise.
1263 * doc/c-msp430.texi: Likewise.
1264 * doc/c-mt.texi: Likewise.
1265 * doc/c-s390.texi: Likewise.
1266 * doc/c-score.texi: Likewise.
1267 * doc/c-sh.texi: Likewise.
1268 * doc/c-sh64.texi: Likewise.
1269 * doc/c-tic54x.texi: Likewise.
1270 * doc/c-tic6x.texi: Likewise.
1271 * doc/c-v850.texi: Likewise.
1272 * doc/c-xc16x.texi: Likewise.
1273 * doc/c-xgate.texi: Likewise.
1274 * doc/c-xtensa.texi: Likewise.
1275 * doc/c-z80.texi: Likewise.
1276 * doc/internals.texi: Likewise.
1277
4c665b71
RM
12782013-01-10 Roland McGrath <mcgrathr@google.com>
1279
1280 * hash.c (hash_new_sized): Make it global.
1281 * hash.h: Declare it.
1282 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1283 pass a small size.
1284
a3c62988
NC
12852013-01-10 Will Newton <will.newton@imgtec.com>
1286
1287 * Makefile.am: Add Meta.
1288 * Makefile.in: Regenerate.
1289 * config/tc-metag.c: New file.
1290 * config/tc-metag.h: New file.
1291 * configure.tgt: Add Meta.
1292 * doc/Makefile.am: Add Meta.
1293 * doc/Makefile.in: Regenerate.
1294 * doc/all.texi: Add Meta.
1295 * doc/as.texiinfo: Document Meta options.
1296 * doc/c-metag.texi: New file.
1297
b37df7c4
SE
12982013-01-09 Steve Ellcey <sellcey@mips.com>
1299
1300 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1301 calls.
1302 * config/tc-mips.c (internalError): Remove, replace with abort.
1303
a3251895
YZ
13042013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1305
1306 * config/tc-aarch64.c (parse_operands): Change to compare the result
1307 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1308
8ab8155f
NC
13092013-01-07 Nick Clifton <nickc@redhat.com>
1310
1311 PR gas/14887
1312 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1313 anticipated character.
1314 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1315 here as it is no longer needed.
1316
a4ac1c42
AS
13172013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1318
1319 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1320 * doc/c-score.texi (SCORE-Opts): Likewise.
1321 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1322
e407c74b
NC
13232013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1324
1325 * config/tc-mips.c: Add support for MIPS r5900.
1326 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1327 lq and sq.
1328 (can_swap_branch_p, get_append_method): Detect some conditional
1329 short loops to fix a bug on the r5900 by NOP in the branch delay
1330 slot.
1331 (M_MUL): Support 3 operands in multu on r5900.
1332 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1333 (s_mipsset): Force 32 bit floating point on r5900.
1334 (mips_ip): Check parameter range of instructions mfps and mtps on
1335 r5900.
1336 * configure.in: Detect CPU type when target string contains r5900
1337 (e.g. mips64r5900el-linux-gnu).
1338
62658407
L
13392013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1340
1341 * as.c (parse_args): Update copyright year to 2013.
1342
95830fd1
YZ
13432013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1344
1345 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1346 and "cortex57".
1347
517bb291 13482013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1349
517bb291
NC
1350 PR gas/14987
1351 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1352 closing bracket.
d709e4e6 1353
517bb291 1354For older changes see ChangeLog-2012
08d56133 1355\f
517bb291 1356Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1357
1358Copying and distribution of this file, with or without modification,
1359are permitted in any medium without royalty provided the copyright
1360notice and this notice are preserved.
1361
08d56133
NC
1362Local Variables:
1363mode: change-log
1364left-margin: 8
1365fill-column: 74
1366version-control: never
1367End: