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CommitLineData
a1b86ab7
RS
12013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * doc/c-mips.texi (MIPS Stabs): Remove section.
4
c6278170
RS
52013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
6
7 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
8 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
9 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
10 (ISA_SUPPORTS_VIRT64_ASE): Delete.
11 (mips_ase): New structure.
12 (mips_ases): New table.
13 (FP64_ASES): New macro.
14 (mips_ase_groups): New array.
15 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
16 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
17 functions.
18 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
19 (md_parse_option): Use mips_ases and mips_set_ase instead of
20 separate case statements for each ASE option.
21 (mips_after_parse_args): Use FP64_ASES. Use
22 mips_check_isa_supports_ases to check the ASEs against
23 other options.
24 (s_mipsset): Use mips_ases and mips_set_ase instead of
25 separate if statements for each ASE option. Use
26 mips_check_isa_supports_ases, even when a non-ASE option
27 is specified.
28
63a4bc21
KT
292013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
30
31 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
32
c31f3936
RS
332013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
34
35 * config/tc-mips.c (md_shortopts, options, md_longopts)
36 (md_longopts_size): Move earlier in file.
37
846ef2d0
RS
382013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
39
40 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
41 with a single "ase" bitmask.
42 (mips_opts): Update accordingly.
43 (file_ase, file_ase_explicit): New variables.
44 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
45 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
46 (ISA_HAS_ROR): Adjust for mips_set_options change.
47 (is_opcode_valid): Take the base ase mask directly from mips_opts.
48 (mips_ip): Adjust for mips_set_options change.
49 (md_parse_option): Likewise. Update file_ase_explicit.
50 (mips_after_parse_args): Adjust for mips_set_options change.
51 Use bitmask operations to select the default ASEs. Set file_ase
52 rather than individual per-ASE variables.
53 (s_mipsset): Adjust for mips_set_options change.
54 (mips_elf_final_processing): Test file_ase rather than
55 file_ase_mdmx. Remove commented-out code.
56
d16afab6
RS
572013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
60 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
61 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
62 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
63 (mips_after_parse_args): Use the new "ase" field to choose
64 the default ASEs.
65 (mips_cpu_info_table): Move ASEs from the "flags" field to the
66 "ase" field.
67
e83a675f
RE
682013-06-18 Richard Earnshaw <rearnsha@arm.com>
69
70 * config/tc-arm.c (symbol_preemptible): New function.
71 (relax_branch): Use it.
72
7f3c4072
CM
732013-06-17 Catherine Moore <clm@codesourcery.com>
74 Maciej W. Rozycki <macro@codesourcery.com>
75 Chao-Ying Fu <fu@mips.com>
76
77 * config/tc-mips.c (mips_set_options): Add ase_eva.
78 (mips_set_options mips_opts): Add ase_eva.
79 (file_ase_eva): Declare.
80 (ISA_SUPPORTS_EVA_ASE): Define.
81 (IS_SEXT_9BIT_NUM): Define.
82 (MIPS_CPU_ASE_EVA): Define.
83 (is_opcode_valid): Add support for ase_eva.
84 (macro_build): Likewise.
85 (macro): Likewise.
86 (validate_mips_insn): Likewise.
87 (validate_micromips_insn): Likewise.
88 (mips_ip): Likewise.
89 (options): Add OPTION_EVA and OPTION_NO_EVA.
90 (md_longopts): Add -meva and -mno-eva.
91 (md_parse_option): Process new options.
92 (mips_after_parse_args): Check for valid EVA combinations.
93 (s_mipsset): Likewise.
94
e410add4
RS
952013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
96
97 * dwarf2dbg.h (dwarf2_move_insn): Declare.
98 * dwarf2dbg.c (line_subseg): Add pmove_tail.
99 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
100 (dwarf2_gen_line_info_1): Update call accordingly.
101 (dwarf2_move_insn): New function.
102 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
103
6a50d470
RS
1042013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
105
106 Revert:
107
108 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
109
110 PR gas/13024
111 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
112 (dwarf2_gen_line_info_1): Delete.
113 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
114 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
115 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
116 (dwarf2_directive_loc): Push previous .locs instead of generating
117 them immediately.
118
f122319e
CF
1192013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
120
121 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
122 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
123
909c7f9c
NC
1242013-06-13 Nick Clifton <nickc@redhat.com>
125
126 PR gas/15602
127 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
128 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
129 function. Generates an error if the adjusted offset is out of a
130 16-bit range.
131
5d5755a7
SL
1322013-06-12 Sandra Loosemore <sandra@codesourcery.com>
133
134 * config/tc-nios2.c (md_apply_fix): Mask constant
135 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
136
3bf0dbfb
MR
1372013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
138
139 * config/tc-mips.c (append_insn): Don't do branch relaxation for
140 MIPS-3D instructions either.
141 (md_convert_frag): Update the COPx branch mask accordingly.
142
143 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
144 option.
145 * doc/as.texinfo (Overview): Add --relax-branch and
146 --no-relax-branch.
147 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
148 --no-relax-branch.
149
9daf7bab
SL
1502013-06-09 Sandra Loosemore <sandra@codesourcery.com>
151
152 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
153 omitted.
154
d301a56b
RS
1552013-06-08 Catherine Moore <clm@codesourcery.com>
156
157 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
158 (is_opcode_valid_16): Pass ase value to opcode_is_member.
159 (append_insn): Change INSN_xxxx to ASE_xxxx.
160
7bab7634
DC
1612013-06-01 George Thomas <george.thomas@atmel.com>
162
163 * gas/config/tc-avr.c: Change ISA for devices with USB support to
164 AVR_ISA_XMEGAU
165
f60cf82f
L
1662013-05-31 H.J. Lu <hongjiu.lu@intel.com>
167
168 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
169 for ELF.
170
a3f278e2
CM
1712013-05-31 Paul Brook <paul@codesourcery.com>
172
173 gas/
174 * config/tc-mips.c (s_ehword): New.
175
067ec077
CM
1762013-05-30 Paul Brook <paul@codesourcery.com>
177
178 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
179
d6101ac2
MR
1802013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
181
182 * write.c (resolve_reloc_expr_symbols): On REL targets don't
183 convert relocs who have no relocatable field either. Rephrase
184 the conditional so that the PC-relative check is only applied
185 for REL targets.
186
f19ccbda
MR
1872013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
188
189 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
190 calculation.
191
418009c2
YZ
1922013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
193
194 * config/tc-aarch64.c (reloc_table): Update to use
195 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
196 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
197 (md_apply_fix): Likewise.
198 (aarch64_force_relocation): Likewise.
199
0a8897c7
KT
2002013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
201
202 * config/tc-arm.c (it_fsm_post_encode): Improve
203 warning messages about deprecated IT block formats.
204
89d2a2a3
MS
2052013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
206
207 * config/tc-aarch64.c (md_apply_fix): Move value range checking
208 inside fx_done condition.
209
c77c0862
RS
2102013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
211
212 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
213
c0637f3a
PB
2142013-05-20 Peter Bergner <bergner@vnet.ibm.com>
215
216 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
217 and clean up warning when using PRINT_OPCODE_TABLE.
218
5656a981
AM
2192013-05-20 Alan Modra <amodra@gmail.com>
220
221 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
222 and data fixups performing shift/high adjust/sign extension on
223 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
224 when writing data fixups rather than recalculating size.
225
997b26e8
JBG
2262013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
227
228 * doc/c-msp430.texi: Fix typo.
229
9f6e76f4
TG
2302013-05-16 Tristan Gingold <gingold@adacore.com>
231
232 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
233 are also TOC symbols.
234
638d3803
NC
2352013-05-16 Nick Clifton <nickc@redhat.com>
236
237 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
238 Add -mcpu command to specify core type.
997b26e8 239 * doc/c-msp430.texi: Update documentation.
638d3803 240
b015e599
AP
2412013-05-09 Andrew Pinski <apinski@cavium.com>
242
243 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
244 (mips_opts): Update for the new field.
245 (file_ase_virt): New variable.
246 (ISA_SUPPORTS_VIRT_ASE): New macro.
247 (ISA_SUPPORTS_VIRT64_ASE): New macro.
248 (MIPS_CPU_ASE_VIRT): New define.
249 (is_opcode_valid): Handle ase_virt.
250 (macro_build): Handle "+J".
251 (validate_mips_insn): Likewise.
252 (mips_ip): Likewise.
253 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
254 (md_longopts): Add mvirt and mnovirt
255 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
256 (mips_after_parse_args): Handle ase_virt field.
257 (s_mipsset): Handle "virt" and "novirt".
258 (mips_elf_final_processing): Add a comment about virt ASE might need
259 a new flag.
260 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
261 * doc/c-mips.texi: Document -mvirt and -mno-virt.
262 Document ".set virt" and ".set novirt".
263
da8094d7
AM
2642013-05-09 Alan Modra <amodra@gmail.com>
265
266 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
267 control of operand flag bits.
268
c5f8c205
AM
2692013-05-07 Alan Modra <amodra@gmail.com>
270
271 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
272 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
273 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
274 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
275 (md_apply_fix): Set fx_no_overflow for assorted relocations.
276 Shift and sign-extend fieldval for use by some VLE reloc
277 operand->insert functions.
278
b47468a6
CM
2792013-05-06 Paul Brook <paul@codesourcery.com>
280 Catherine Moore <clm@codesourcery.com>
281
c5f8c205
AM
282 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
283 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
284 (md_apply_fix): Likewise.
285 (tc_gen_reloc): Likewise.
286
2de39019
CM
2872013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
288
289 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
290 (mips_fix_adjustable): Adjust pc-relative check to use
291 limited_pc_reloc_p.
292
754e2bb9
RS
2932013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
294
295 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
296 (s_mips_stab): Do not restrict to stabn only.
297
13761a11
NC
2982013-05-02 Nick Clifton <nickc@redhat.com>
299
300 * config/tc-msp430.c: Add support for the MSP430X architecture.
301 Add code to insert a NOP instruction after any instruction that
302 might change the interrupt state.
303 Add support for the LARGE memory model.
304 Add code to initialise the .MSP430.attributes section.
305 * config/tc-msp430.h: Add support for the MSP430X architecture.
306 * doc/c-msp430.texi: Document the new -mL and -mN command line
307 options.
308 * NEWS: Mention support for the MSP430X architecture.
309
df26367c
MR
3102013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
311
312 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
313 alpha*-*-linux*ecoff*.
314
f02d8318
CF
3152013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
316
317 * config/tc-mips.c (mips_ip): Add sizelo.
318 For "+C", "+G", and "+H", set sizelo and compare against it.
319
b40bf0a2
NC
3202013-04-29 Nick Clifton <nickc@redhat.com>
321
322 * as.c (Options): Add -gdwarf-sections.
323 (parse_args): Likewise.
324 * as.h (flag_dwarf_sections): Declare.
325 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
326 (process_entries): When -gdwarf-sections is enabled generate
327 fragmentary .debug_line sections.
328 (out_debug_line): Set the section for the .debug_line section end
329 symbol.
330 * doc/as.texinfo: Document -gdwarf-sections.
331 * NEWS: Mention -gdwarf-sections.
332
8eeccb77 3332013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
334
335 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
336 according to the target parameter. Don't call s_segm since s_segm
337 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
338 initialized yet.
339 (md_begin): Call s_segm according to target parameter from command
340 line.
341
49926cd0
AM
3422013-04-25 Alan Modra <amodra@gmail.com>
343
344 * configure.in: Allow little-endian linux.
345 * configure: Regenerate.
346
e3031850
SL
3472013-04-24 Sandra Loosemore <sandra@codesourcery.com>
348
349 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
350 "fstatus" control register to "eccinj".
351
cb948fc0
KT
3522013-04-19 Kai Tietz <ktietz@redhat.com>
353
354 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
355
4455e9ad
JB
3562013-04-15 Julian Brown <julian@codesourcery.com>
357
358 * expr.c (add_to_result, subtract_from_result): Make global.
359 * expr.h (add_to_result, subtract_from_result): Add prototypes.
360 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
361 subtract_from_result to handle extra bit of precision for .sleb128
362 directive operands.
363
956a6ba3
JB
3642013-04-10 Julian Brown <julian@codesourcery.com>
365
366 * read.c (convert_to_bignum): Add sign parameter. Use it
367 instead of X_unsigned to determine sign of resulting bignum.
368 (emit_expr): Pass extra argument to convert_to_bignum.
369 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
370 X_extrabit to convert_to_bignum.
371 (parse_bitfield_cons): Set X_extrabit.
372 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
373 Initialise X_extrabit field as appropriate.
374 (add_to_result): New.
375 (subtract_from_result): New.
376 (expr): Use above.
377 * expr.h (expressionS): Add X_extrabit field.
378
eb9f3f00
JB
3792013-04-10 Jan Beulich <jbeulich@suse.com>
380
381 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
382 register being PC when is_t or writeback, and use distinct
383 diagnostic for the latter case.
384
ccb84d65
JB
3852013-04-10 Jan Beulich <jbeulich@suse.com>
386
387 * gas/config/tc-arm.c (parse_operands): Re-write
388 po_barrier_or_imm().
389 (do_barrier): Remove bogus constraint().
390 (do_t_barrier): Remove.
391
4d13caa0
NC
3922013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
393
394 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
395 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
396 ATmega2564RFR2
397 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
398
16d02dc9
JB
3992013-04-09 Jan Beulich <jbeulich@suse.com>
400
401 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
402 Use local variable Rt in more places.
403 (do_vmsr): Accept all control registers.
404
05ac0ffb
JB
4052013-04-09 Jan Beulich <jbeulich@suse.com>
406
407 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
408 if there was none specified for moves between scalar and core
409 register.
410
2d51fb74
JB
4112013-04-09 Jan Beulich <jbeulich@suse.com>
412
413 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
414 NEON_ALL_LANES case.
415
94dcf8bf
JB
4162013-04-08 Jan Beulich <jbeulich@suse.com>
417
418 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
419 PC-relative VSTR.
420
1472d06f
JB
4212013-04-08 Jan Beulich <jbeulich@suse.com>
422
423 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
424 entry to sp_fiq.
425
0c76cae8
AM
4262013-04-03 Alan Modra <amodra@gmail.com>
427
428 * doc/as.texinfo: Add support to generate man options for h8300.
429 * doc/c-h8300.texi: Likewise.
430
92eb40d9
RR
4312013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
432
433 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
434 Cortex-A57.
435
51dcdd4d
NC
4362013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
437
438 PR binutils/15068
439 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
440
c5d685bf
NC
4412013-03-26 Nick Clifton <nickc@redhat.com>
442
9b978282
NC
443 PR gas/15295
444 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
445 start of the file each time.
446
c5d685bf
NC
447 PR gas/15178
448 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
449 FreeBSD targets.
450
9699c833
TG
4512013-03-26 Douglas B Rupp <rupp@gnat.com>
452
453 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
454 after fixup.
455
4755303e
WN
4562013-03-21 Will Newton <will.newton@linaro.org>
457
458 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
459 pc-relative str instructions in Thumb mode.
460
81f5558e
NC
4612013-03-21 Michael Schewe <michael.schewe@gmx.net>
462
463 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
464 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
465 R_H8_DISP32A16.
466 * config/tc-h8300.h: Remove duplicated defines.
467
71863e73
NC
4682013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
469
470 PR gas/15282
471 * tc-avr.c (mcu_has_3_byte_pc): New function.
472 (tc_cfi_frame_initial_instructions): Call it to find return
473 address size.
474
795b8e6b
NC
4752013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
476
477 PR gas/15095
478 * config/tc-tic6x.c (tic6x_try_encode): Handle
479 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
480 encode register pair numbers when required.
481
ba86b375
WN
4822013-03-15 Will Newton <will.newton@linaro.org>
483
484 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
485 in vstr in Thumb mode for pre-ARMv7 cores.
486
9e6f3811
AS
4872013-03-14 Andreas Schwab <schwab@suse.de>
488
489 * doc/c-arc.texi (ARC Directives): Revert last change and use
490 @itemize instead of @table.
491 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
492
b10bf8c5
NC
4932013-03-14 Nick Clifton <nickc@redhat.com>
494
495 PR gas/15273
496 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
497 NULL message, instead just check ARM_CPU_IS_ANY directly.
498
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4992013-03-14 Nick Clifton <nickc@redhat.com>
500
501 PR gas/15212
9e6f3811 502 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
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503 for table format.
504 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
505 to the @item directives.
506 (ARM-Neon-Alignment): Move to correct place in the document.
507 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
508 formatting.
509 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
510 @smallexample.
511
531a94fd
SL
5122013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
513
514 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
515 case. Add default BAD_CASE to switch.
516
dad60f8e
SL
5172013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
518
519 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
520 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
521
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KT
5222013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
523
524 * config/tc-arm.c (crc_ext_armv8): New feature set.
525 (UNPRED_REG): New macro.
526 (do_crc32_1): New function.
527 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
528 do_crc32ch, do_crc32cw): Likewise.
529 (TUEc): New macro.
530 (insns): Add entries for crc32 mnemonics.
531 (arm_extensions): Add entry for crc.
532
8e723a10
CLT
5332013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
534
535 * write.h (struct fix): Add fx_dot_frag field.
536 (dot_frag): Declare.
537 * write.c (dot_frag): New variable.
538 (fix_new_internal): Set fx_dot_frag field with dot_frag.
539 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
540 * expr.c (expr): Save value of frag_now in dot_frag when setting
541 dot_value.
542 * read.c (emit_expr): Likewise. Delete comments.
543
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5442013-03-07 H.J. Lu <hongjiu.lu@intel.com>
545
546 * config/tc-i386.c (flag_code_names): Removed.
547 (i386_index_check): Rewrote.
548
62b0d0d5
YZ
5492013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
550
551 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
552 add comment.
553 (aarch64_double_precision_fmovable): New function.
554 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
555 function; handle hexadecimal representation of IEEE754 encoding.
556 (parse_operands): Update the call to parse_aarch64_imm_float.
557
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5582013-02-28 H.J. Lu <hongjiu.lu@intel.com>
559
560 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
561 (check_hle): Updated.
562 (md_assemble): Likewise.
563 (parse_insn): Likewise.
564
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5652013-02-28 H.J. Lu <hongjiu.lu@intel.com>
566
567 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 568 (md_assemble): Check if REP prefix is OK.
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569 (parse_insn): Remove expecting_string_instruction. Set
570 i.rep_prefix.
571
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YZ
5722013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
573
574 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
575
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YZ
5762013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
577
578 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
579 for system registers.
580
4107ae22
DD
5812013-02-27 DJ Delorie <dj@redhat.com>
582
583 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
584 (rl78_op): Handle %code().
585 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
586 (tc_gen_reloc): Likwise; convert to a computed reloc.
587 (md_apply_fix): Likewise.
588
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5892013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
590
591 * config/rl78-parse.y: Fix encoding of DIVWU insn.
592
70a8bc5b 5932013-02-25 Terry Guo <terry.guo@arm.com>
594
595 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
596 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
597 list of accepted CPUs.
598
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5992013-02-19 H.J. Lu <hongjiu.lu@intel.com>
600
601 PR gas/15159
602 * config/tc-i386.c (cpu_arch): Add ".smap".
603
604 * doc/c-i386.texi: Document smap.
605
8a75745d
MR
6062013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
607
608 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
609 mips_assembling_insn appropriately.
610 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
611
79850f26
MR
6122013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
613
cf29fc61 614 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
615 extraneous braces.
616
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6172013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
618
5c111e37 619 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 620
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6212013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
622
623 * configure.tgt: Add nios2-*-rtems*.
624
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6252013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
626
627 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
628 NULL.
629
0aa27725
RS
6302013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
631
632 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
633 (macro): Use it. Assert that trunc.w.s is not used for r5900.
634
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6352013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
636
637 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
638 core.
639
36591ba1 6402013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 641 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
642
643 Based on patches from Altera Corporation.
644
645 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
646 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
647 * Makefile.in: Regenerated.
648 * configure.tgt: Add case for nios2*-linux*.
649 * config/obj-elf.c: Conditionally include elf/nios2.h.
650 * config/tc-nios2.c: New file.
651 * config/tc-nios2.h: New file.
652 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
653 * doc/Makefile.in: Regenerated.
654 * doc/all.texi: Set NIOSII.
655 * doc/as.texinfo (Overview): Add Nios II options.
656 (Machine Dependencies): Include c-nios2.texi.
657 * doc/c-nios2.texi: New file.
658 * NEWS: Note Altera Nios II support.
659
94d4433a
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6602013-02-06 Alan Modra <amodra@gmail.com>
661
662 PR gas/14255
663 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
664 Don't skip fixups with fx_subsy non-NULL.
665 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
666 with fx_subsy non-NULL.
667
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6682013-02-04 H.J. Lu <hongjiu.lu@intel.com>
669
670 * doc/c-metag.texi: Add "@c man" markers.
671
89d67ed9
AM
6722013-02-04 Alan Modra <amodra@gmail.com>
673
674 * write.c (fixup_segment): Return void. Delete seg_reloc_count
675 related code.
676 (TC_ADJUST_RELOC_COUNT): Delete.
677 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
678
89072bd6
AM
6792013-02-04 Alan Modra <amodra@gmail.com>
680
681 * po/POTFILES.in: Regenerate.
682
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NC
6832013-01-30 Markos Chandras <markos.chandras@imgtec.com>
684
685 * config/tc-metag.c: Make SWAP instruction less permissive with
686 its operands.
687
392ca752
DD
6882013-01-29 DJ Delorie <dj@redhat.com>
689
690 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
691 relocs in .word/.etc statements.
692
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RM
6932013-01-29 Roland McGrath <mcgrathr@google.com>
694
695 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
696 immediate value for 8-bit offset" error so it shows line info.
697
4faf939a
JM
6982013-01-24 Joseph Myers <joseph@codesourcery.com>
699
700 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
701 for 64-bit output.
702
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NC
7032013-01-24 Nick Clifton <nickc@redhat.com>
704
705 * config/tc-v850.c: Add support for e3v5 architecture.
706 * doc/c-v850.texi: Mention new support.
707
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7082013-01-23 Nick Clifton <nickc@redhat.com>
709
710 PR gas/15039
711 * config/tc-avr.c: Include dwarf2dbg.h.
712
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7132013-01-18 H.J. Lu <hongjiu.lu@intel.com>
714
715 * config/tc-i386.c (reloc): Support size relocation only for ELF.
716 (tc_i386_fix_adjustable): Likewise.
717 (lex_got): Likewise.
718 (tc_gen_reloc): Likewise.
719
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7202013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
721
722 * config/tc-aarch64.c (output_operand_error_record): Change to output
723 the out-of-range error message as value-expected message if there is
724 only one single value in the expected range.
725 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
726 LSL #0 as a programmer-friendly feature.
727
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7282013-01-16 H.J. Lu <hongjiu.lu@intel.com>
729
730 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
731 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
732 BFD_RELOC_64_SIZE relocations.
733 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
734 for it.
735 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
736 relocations against local symbols.
737
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AM
7382013-01-16 Alan Modra <amodra@gmail.com>
739
740 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
741 finding some sort of toc syntax error, and break to avoid
742 compiler uninit warning.
743
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7442013-01-15 H.J. Lu <hongjiu.lu@intel.com>
745
746 PR gas/15019
747 * config/tc-i386.c (lex_got): Increment length by 1 if the
748 relocation token is removed.
749
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7502013-01-15 Nick Clifton <nickc@redhat.com>
751
752 * config/tc-v850.c (md_assemble): Allow signed values for
753 V850E_IMMEDIATE.
754
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SK
7552013-01-11 Sean Keys <skeys@ipdatasys.com>
756
757 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 758 git to cvs.
464e3686 759
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7602013-01-10 Peter Bergner <bergner@vnet.ibm.com>
761
762 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
763 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
764 * config/tc-ppc.c (md_show_usage): Likewise.
765 (ppc_handle_align): Handle power8's group ending nop.
766
f4b1f6a9
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7672013-01-10 Sean Keys <skeys@ipdatasys.com>
768
769 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 770 that the assember exits after the opcodes have been printed.
f4b1f6a9 771
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7722013-01-10 H.J. Lu <hongjiu.lu@intel.com>
773
774 * app.c: Remove trailing white spaces.
775 * as.c: Likewise.
776 * as.h: Likewise.
777 * cond.c: Likewise.
778 * dw2gencfi.c: Likewise.
779 * dwarf2dbg.h: Likewise.
780 * ecoff.c: Likewise.
781 * input-file.c: Likewise.
782 * itbl-lex.h: Likewise.
783 * output-file.c: Likewise.
784 * read.c: Likewise.
785 * sb.c: Likewise.
786 * subsegs.c: Likewise.
787 * symbols.c: Likewise.
788 * write.c: Likewise.
789 * config/tc-i386.c: Likewise.
790 * doc/Makefile.am: Likewise.
791 * doc/Makefile.in: Likewise.
792 * doc/c-aarch64.texi: Likewise.
793 * doc/c-alpha.texi: Likewise.
794 * doc/c-arc.texi: Likewise.
795 * doc/c-arm.texi: Likewise.
796 * doc/c-avr.texi: Likewise.
797 * doc/c-bfin.texi: Likewise.
798 * doc/c-cr16.texi: Likewise.
799 * doc/c-d10v.texi: Likewise.
800 * doc/c-d30v.texi: Likewise.
801 * doc/c-h8300.texi: Likewise.
802 * doc/c-hppa.texi: Likewise.
803 * doc/c-i370.texi: Likewise.
804 * doc/c-i386.texi: Likewise.
805 * doc/c-i860.texi: Likewise.
806 * doc/c-m32c.texi: Likewise.
807 * doc/c-m32r.texi: Likewise.
808 * doc/c-m68hc11.texi: Likewise.
809 * doc/c-m68k.texi: Likewise.
810 * doc/c-microblaze.texi: Likewise.
811 * doc/c-mips.texi: Likewise.
812 * doc/c-msp430.texi: Likewise.
813 * doc/c-mt.texi: Likewise.
814 * doc/c-s390.texi: Likewise.
815 * doc/c-score.texi: Likewise.
816 * doc/c-sh.texi: Likewise.
817 * doc/c-sh64.texi: Likewise.
818 * doc/c-tic54x.texi: Likewise.
819 * doc/c-tic6x.texi: Likewise.
820 * doc/c-v850.texi: Likewise.
821 * doc/c-xc16x.texi: Likewise.
822 * doc/c-xgate.texi: Likewise.
823 * doc/c-xtensa.texi: Likewise.
824 * doc/c-z80.texi: Likewise.
825 * doc/internals.texi: Likewise.
826
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8272013-01-10 Roland McGrath <mcgrathr@google.com>
828
829 * hash.c (hash_new_sized): Make it global.
830 * hash.h: Declare it.
831 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
832 pass a small size.
833
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8342013-01-10 Will Newton <will.newton@imgtec.com>
835
836 * Makefile.am: Add Meta.
837 * Makefile.in: Regenerate.
838 * config/tc-metag.c: New file.
839 * config/tc-metag.h: New file.
840 * configure.tgt: Add Meta.
841 * doc/Makefile.am: Add Meta.
842 * doc/Makefile.in: Regenerate.
843 * doc/all.texi: Add Meta.
844 * doc/as.texiinfo: Document Meta options.
845 * doc/c-metag.texi: New file.
846
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SE
8472013-01-09 Steve Ellcey <sellcey@mips.com>
848
849 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
850 calls.
851 * config/tc-mips.c (internalError): Remove, replace with abort.
852
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8532013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
854
855 * config/tc-aarch64.c (parse_operands): Change to compare the result
856 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
857
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8582013-01-07 Nick Clifton <nickc@redhat.com>
859
860 PR gas/14887
861 * config/tc-arm.c (skip_past_char): Skip whitespace before the
862 anticipated character.
863 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
864 here as it is no longer needed.
865
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8662013-01-06 Andreas Schwab <schwab@linux-m68k.org>
867
868 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
869 * doc/c-score.texi (SCORE-Opts): Likewise.
870 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
871
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8722013-01-04 Juergen Urban <JuergenUrban@gmx.de>
873
874 * config/tc-mips.c: Add support for MIPS r5900.
875 Add M_LQ_AB and M_SQ_AB to support large values for instructions
876 lq and sq.
877 (can_swap_branch_p, get_append_method): Detect some conditional
878 short loops to fix a bug on the r5900 by NOP in the branch delay
879 slot.
880 (M_MUL): Support 3 operands in multu on r5900.
881 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
882 (s_mipsset): Force 32 bit floating point on r5900.
883 (mips_ip): Check parameter range of instructions mfps and mtps on
884 r5900.
885 * configure.in: Detect CPU type when target string contains r5900
886 (e.g. mips64r5900el-linux-gnu).
887
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8882013-01-02 H.J. Lu <hongjiu.lu@intel.com>
889
890 * as.c (parse_args): Update copyright year to 2013.
891
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8922013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
893
894 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
895 and "cortex57".
896
517bb291 8972013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 898
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899 PR gas/14987
900 * config/tc-arm.c (parse_address_main): Skip whitespace before a
901 closing bracket.
d709e4e6 902
517bb291 903For older changes see ChangeLog-2012
08d56133 904\f
517bb291 905Copyright (C) 2013 Free Software Foundation, Inc.
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906
907Copying and distribution of this file, with or without modification,
908are permitted in any medium without royalty provided the copyright
909notice and this notice are preserved.
910
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911Local Variables:
912mode: change-log
913left-margin: 8
914fill-column: 74
915version-control: never
916End: