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a1d78564
RS
12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
4 Change return type to bfd_boolean.
5 (report_bad_range, report_bad_field): New functions.
6 (mips_arg_info): New structure.
7 (match_const_int, convert_reg_type, check_regno, match_int_operand)
8 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
9 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
10 (match_addiusp_operand, match_clo_clz_dest_operand)
11 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
12 (match_pc_operand, match_tied_reg_operand, match_operand)
13 (check_completed_insn): New functions, commented out for now.
14
e077a1c8
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152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
16
17 * config/tc-mips.c (insn_insert_operand): New function.
18 (macro_build, mips16_macro_build): Put null character check
19 in the for loop and convert continues to breaks. Use operand
20 structures to handle constant operands.
21
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222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
23
24 * config/tc-mips.c (validate_mips_insn): Move further up file.
25 Add insn_bits and decode_operand arguments. Use the mips_operand
26 fields to work out which bits an operand occupies. Detect double
27 definitions.
28 (validate_micromips_insn): Move further up file. Call into
29 validate_mips_insn.
30
2f8b73cc
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312013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
32
33 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
34
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352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
36
37 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
38 and "~".
39 (macro): Update accordingly.
40
77bd4346
RS
412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
42
43 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
44 (imm_reloc): Delete.
45 (md_assemble): Remove imm_reloc handling.
46 (mips_ip): Update commentary. Use offset_expr and offset_reloc
47 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
48 Use a temporary array rather than imm_reloc when parsing
49 constant expressions. Remove imm_reloc initialization.
50 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
51 for the relaxable field. Use a relax_char variable to track the
52 type of this field. Remove imm_reloc initialization.
53
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542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
55
56 * config/tc-mips.c (mips16_ip): Handle "I".
57
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582013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
59
60 * config/tc-mips.c (mips_flag_nan2008): New variable.
61 (options): Add OPTION_NAN enum value.
62 (md_longopts): Handle it.
63 (md_parse_option): Likewise.
64 (s_nan): New function.
65 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
66 (md_show_usage): Add -mnan.
67
68 * doc/as.texinfo (Overview): Add -mnan.
69 * doc/c-mips.texi (MIPS Opts): Document -mnan.
70 (MIPS NaN Encodings): New node. Document .nan directive.
71 (MIPS-Dependent): List the new node.
72
c1094734
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732013-07-09 Tristan Gingold <gingold@adacore.com>
74
75 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
76
0cbbe1b8
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772013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
78
79 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
80 for 'A' and assume that the constant has been elided if the result
81 is an O_register.
82
f2ae14a1
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832013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
84
85 * config/tc-mips.c (gprel16_reloc_p): New function.
86 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
87 BFD_RELOC_UNUSED.
88 (offset_high_part, small_offset_p): New functions.
89 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
90 register load and store macros, handle the 16-bit offset case first.
91 If a 16-bit offset is not suitable for the instruction we're
92 generating, load it into the temporary register using
93 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
94 M_L_DAB code once the address has been constructed. For double load
95 and store macros, again handle the 16-bit offset case first.
96 If the second register cannot be accessed from the same high
97 part as the first, load it into AT using ADDRESS_ADDI_INSN.
98 Fix the handling of LD in cases where the first register is the
99 same as the base. Also handle the case where the offset is
100 not 16 bits and the second register cannot be accessed from the
101 same high part as the first. For unaligned loads and stores,
102 fuse the offbits == 12 and old "ab" handling. Apply this handling
103 whenever the second offset needs a different high part from the first.
104 Construct the offset using ADDRESS_ADDI_INSN where possible,
105 for offbits == 16 as well as offbits == 12. Use offset_reloc
106 when constructing the individual loads and stores.
107 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
108 and offset_reloc before matching against a particular opcode.
109 Handle elided 'A' constants. Allow 'A' constants to use
110 relocation operators.
111
5c324c16
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1122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
113
114 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
115 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
116 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
117
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1182013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
119
120 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
121 Require the msb to be <= 31 for "+s". Check that the size is <= 31
122 for both "+s" and "+S".
123
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1242013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
125
126 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
127 (mips_ip, mips16_ip): Handle "+i".
128
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1292013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
130
131 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
132 (micromips_to_32_reg_h_map): Rename to...
133 (micromips_to_32_reg_h_map1): ...this.
134 (micromips_to_32_reg_i_map): Rename to...
135 (micromips_to_32_reg_h_map2): ...this.
136 (mips_lookup_reg_pair): New function.
137 (gpr_write_mask, macro): Adjust after above renaming.
138 (validate_micromips_insn): Remove "mi" handling.
139 (mips_ip): Likewise. Parse both registers in a pair for "mh".
140
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1412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
144 (mips_ip): Remove "+D" and "+T" handling.
145
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1462013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
147
148 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
149 relocs.
150
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1512013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
152
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153 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
154
1552013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
156
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157 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
158 (aarch64_force_relocation): Likewise.
159
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1602013-07-02 Alan Modra <amodra@gmail.com>
161
162 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
163
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1642013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
165
166 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
167 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
168 Replace @sc{mips16} with literal `MIPS16'.
169 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
170
a6bb11b2
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1712013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
172
173 * config/tc-aarch64.c (reloc_table): Replace
174 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
175 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
176 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
177 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
178 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
179 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
180 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
181 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
182 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
183 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
184 (aarch64_force_relocation): Likewise.
185
cec5225b
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1862013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
187
188 * config/tc-aarch64.c (ilp32_p): New static variable.
189 (elf64_aarch64_target_format): Return the target according to the
190 value of 'ilp32_p'.
191 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
192 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
193 (aarch64_dwarf2_addr_size): New function.
194 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
195 (DWARF2_ADDR_SIZE): New define.
196
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1972013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
198
199 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
200
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2012013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
202
203 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
204
833794fc
MR
2052013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
206
207 * config/tc-mips.c (mips_set_options): Add insn32 member.
208 (mips_opts): Initialize it.
209 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
210 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
211 (md_longopts): Add "minsn32" and "mno-insn32" options.
212 (is_size_valid): Handle insn32 mode.
213 (md_assemble): Pass instruction string down to macro.
214 (brk_fmt): Add second dimension and insn32 mode initializers.
215 (mfhl_fmt): Likewise.
216 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
217 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
218 (macro_build_jalr, move_register): Handle insn32 mode.
219 (macro_build_branch_rs): Likewise.
220 (macro): Handle insn32 mode.
221 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
222 (mips_ip): Handle insn32 mode.
223 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
224 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
225 (mips_handle_align): Handle insn32 mode.
226 (md_show_usage): Add -minsn32 and -mno-insn32.
227
228 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
229 -mno-insn32 options.
230 (-minsn32, -mno-insn32): New options.
231 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
232 options.
233 (MIPS assembly options): New node. Document .set insn32 and
234 .set noinsn32.
235 (MIPS-Dependent): List the new node.
236
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2372013-06-25 Nick Clifton <nickc@redhat.com>
238
239 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
240 the PC in indirect addressing on 430xv2 parts.
241 (msp430_operands): Add version test to hardware bug encoding
242 restrictions.
243
477330fc
RM
2442013-06-24 Roland McGrath <mcgrathr@google.com>
245
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RM
246 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
247 so it skips whitespace before it.
248 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
249
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250 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
251 (arm_reg_parse_multi): Skip whitespace first.
252 (parse_reg_list): Likewise.
253 (parse_vfp_reg_list): Likewise.
254 (s_arm_unwind_save_mmxwcg): Likewise.
255
24382199
NC
2562013-06-24 Nick Clifton <nickc@redhat.com>
257
258 PR gas/15623
259 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
260
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2612013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
262
263 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
264
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2652013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
266
267 * config/tc-mips.c: Assert that offsetT and valueT are at least
268 8 bytes in size.
269 (GPR_SMIN, GPR_SMAX): New macros.
270 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
271
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2722013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
273
274 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
275 conditions. Remove any code deselected by them.
276 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
277
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2782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
279
280 * NEWS: Note removal of ECOFF support.
281 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
282 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
283 (MULTI_CFILES): Remove config/e-mipsecoff.c.
284 * Makefile.in: Regenerate.
285 * configure.in: Remove MIPS ECOFF references.
286 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
287 Delete cases.
288 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
289 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
290 (mips-*-*): ...this single case.
291 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
292 MIPS emulations to be e-mipself*.
293 * configure: Regenerate.
294 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
295 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
296 (mips-*-sysv*): Remove coff and ecoff cases.
297 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
298 * ecoff.c: Remove reference to MIPS ECOFF.
299 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
300 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
301 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
302 (mips_hi_fixup): Tweak comment.
303 (append_insn): Require a howto.
304 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
305
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3062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
307
308 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
309 Use "CPU" instead of "cpu".
310 * doc/c-mips.texi: Likewise.
311 (MIPS Opts): Rename to MIPS Options.
312 (MIPS option stack): Rename to MIPS Option Stack.
313 (MIPS ASE instruction generation overrides): Rename to
314 MIPS ASE Instruction Generation Overrides (for now).
315 (MIPS floating-point): Rename to MIPS Floating-Point.
316
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3172013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
318
319 * doc/c-mips.texi (MIPS Macros): New section.
320 (MIPS Object): Replace with...
321 (MIPS Small Data): ...this new section.
322
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3232013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
324
325 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
326 Capitalize name. Use @kindex instead of @cindex for .set entries.
327
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3282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
329
330 * doc/c-mips.texi (MIPS Stabs): Remove section.
331
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3322013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
333
334 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
335 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
336 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
337 (ISA_SUPPORTS_VIRT64_ASE): Delete.
338 (mips_ase): New structure.
339 (mips_ases): New table.
340 (FP64_ASES): New macro.
341 (mips_ase_groups): New array.
342 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
343 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
344 functions.
345 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
346 (md_parse_option): Use mips_ases and mips_set_ase instead of
347 separate case statements for each ASE option.
348 (mips_after_parse_args): Use FP64_ASES. Use
349 mips_check_isa_supports_ases to check the ASEs against
350 other options.
351 (s_mipsset): Use mips_ases and mips_set_ase instead of
352 separate if statements for each ASE option. Use
353 mips_check_isa_supports_ases, even when a non-ASE option
354 is specified.
355
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3562013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
357
358 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
359
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3602013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
361
362 * config/tc-mips.c (md_shortopts, options, md_longopts)
363 (md_longopts_size): Move earlier in file.
364
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3652013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
366
367 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
368 with a single "ase" bitmask.
369 (mips_opts): Update accordingly.
370 (file_ase, file_ase_explicit): New variables.
371 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
372 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
373 (ISA_HAS_ROR): Adjust for mips_set_options change.
374 (is_opcode_valid): Take the base ase mask directly from mips_opts.
375 (mips_ip): Adjust for mips_set_options change.
376 (md_parse_option): Likewise. Update file_ase_explicit.
377 (mips_after_parse_args): Adjust for mips_set_options change.
378 Use bitmask operations to select the default ASEs. Set file_ase
379 rather than individual per-ASE variables.
380 (s_mipsset): Adjust for mips_set_options change.
381 (mips_elf_final_processing): Test file_ase rather than
382 file_ase_mdmx. Remove commented-out code.
383
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3842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
385
386 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
387 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
388 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
389 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
390 (mips_after_parse_args): Use the new "ase" field to choose
391 the default ASEs.
392 (mips_cpu_info_table): Move ASEs from the "flags" field to the
393 "ase" field.
394
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3952013-06-18 Richard Earnshaw <rearnsha@arm.com>
396
397 * config/tc-arm.c (symbol_preemptible): New function.
398 (relax_branch): Use it.
399
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CM
4002013-06-17 Catherine Moore <clm@codesourcery.com>
401 Maciej W. Rozycki <macro@codesourcery.com>
402 Chao-Ying Fu <fu@mips.com>
403
404 * config/tc-mips.c (mips_set_options): Add ase_eva.
405 (mips_set_options mips_opts): Add ase_eva.
406 (file_ase_eva): Declare.
407 (ISA_SUPPORTS_EVA_ASE): Define.
408 (IS_SEXT_9BIT_NUM): Define.
409 (MIPS_CPU_ASE_EVA): Define.
410 (is_opcode_valid): Add support for ase_eva.
411 (macro_build): Likewise.
412 (macro): Likewise.
413 (validate_mips_insn): Likewise.
414 (validate_micromips_insn): Likewise.
415 (mips_ip): Likewise.
416 (options): Add OPTION_EVA and OPTION_NO_EVA.
417 (md_longopts): Add -meva and -mno-eva.
418 (md_parse_option): Process new options.
419 (mips_after_parse_args): Check for valid EVA combinations.
420 (s_mipsset): Likewise.
421
e410add4
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4222013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
423
424 * dwarf2dbg.h (dwarf2_move_insn): Declare.
425 * dwarf2dbg.c (line_subseg): Add pmove_tail.
426 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
427 (dwarf2_gen_line_info_1): Update call accordingly.
428 (dwarf2_move_insn): New function.
429 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
430
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4312013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
432
433 Revert:
434
435 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
436
437 PR gas/13024
438 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
439 (dwarf2_gen_line_info_1): Delete.
440 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
441 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
442 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
443 (dwarf2_directive_loc): Push previous .locs instead of generating
444 them immediately.
445
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4462013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
447
448 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
449 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
450
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4512013-06-13 Nick Clifton <nickc@redhat.com>
452
453 PR gas/15602
454 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
455 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
456 function. Generates an error if the adjusted offset is out of a
457 16-bit range.
458
5d5755a7
SL
4592013-06-12 Sandra Loosemore <sandra@codesourcery.com>
460
461 * config/tc-nios2.c (md_apply_fix): Mask constant
462 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
463
3bf0dbfb
MR
4642013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
465
466 * config/tc-mips.c (append_insn): Don't do branch relaxation for
467 MIPS-3D instructions either.
468 (md_convert_frag): Update the COPx branch mask accordingly.
469
470 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
471 option.
472 * doc/as.texinfo (Overview): Add --relax-branch and
473 --no-relax-branch.
474 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
475 --no-relax-branch.
476
9daf7bab
SL
4772013-06-09 Sandra Loosemore <sandra@codesourcery.com>
478
479 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
480 omitted.
481
d301a56b
RS
4822013-06-08 Catherine Moore <clm@codesourcery.com>
483
484 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
485 (is_opcode_valid_16): Pass ase value to opcode_is_member.
486 (append_insn): Change INSN_xxxx to ASE_xxxx.
487
7bab7634
DC
4882013-06-01 George Thomas <george.thomas@atmel.com>
489
490 * gas/config/tc-avr.c: Change ISA for devices with USB support to
491 AVR_ISA_XMEGAU
492
f60cf82f
L
4932013-05-31 H.J. Lu <hongjiu.lu@intel.com>
494
495 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
496 for ELF.
497
a3f278e2
CM
4982013-05-31 Paul Brook <paul@codesourcery.com>
499
500 gas/
501 * config/tc-mips.c (s_ehword): New.
502
067ec077
CM
5032013-05-30 Paul Brook <paul@codesourcery.com>
504
505 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
506
d6101ac2
MR
5072013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
508
509 * write.c (resolve_reloc_expr_symbols): On REL targets don't
510 convert relocs who have no relocatable field either. Rephrase
511 the conditional so that the PC-relative check is only applied
512 for REL targets.
513
f19ccbda
MR
5142013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
515
516 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
517 calculation.
518
418009c2
YZ
5192013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
520
521 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 522 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
523 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
524 (md_apply_fix): Likewise.
525 (aarch64_force_relocation): Likewise.
526
0a8897c7
KT
5272013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
528
529 * config/tc-arm.c (it_fsm_post_encode): Improve
530 warning messages about deprecated IT block formats.
531
89d2a2a3
MS
5322013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
533
534 * config/tc-aarch64.c (md_apply_fix): Move value range checking
535 inside fx_done condition.
536
c77c0862
RS
5372013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
538
539 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
540
c0637f3a
PB
5412013-05-20 Peter Bergner <bergner@vnet.ibm.com>
542
543 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
544 and clean up warning when using PRINT_OPCODE_TABLE.
545
5656a981
AM
5462013-05-20 Alan Modra <amodra@gmail.com>
547
548 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
549 and data fixups performing shift/high adjust/sign extension on
550 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
551 when writing data fixups rather than recalculating size.
552
997b26e8
JBG
5532013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
554
555 * doc/c-msp430.texi: Fix typo.
556
9f6e76f4
TG
5572013-05-16 Tristan Gingold <gingold@adacore.com>
558
559 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
560 are also TOC symbols.
561
638d3803
NC
5622013-05-16 Nick Clifton <nickc@redhat.com>
563
564 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
565 Add -mcpu command to specify core type.
997b26e8 566 * doc/c-msp430.texi: Update documentation.
638d3803 567
b015e599
AP
5682013-05-09 Andrew Pinski <apinski@cavium.com>
569
570 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
571 (mips_opts): Update for the new field.
572 (file_ase_virt): New variable.
573 (ISA_SUPPORTS_VIRT_ASE): New macro.
574 (ISA_SUPPORTS_VIRT64_ASE): New macro.
575 (MIPS_CPU_ASE_VIRT): New define.
576 (is_opcode_valid): Handle ase_virt.
577 (macro_build): Handle "+J".
578 (validate_mips_insn): Likewise.
579 (mips_ip): Likewise.
580 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
581 (md_longopts): Add mvirt and mnovirt
582 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
583 (mips_after_parse_args): Handle ase_virt field.
584 (s_mipsset): Handle "virt" and "novirt".
585 (mips_elf_final_processing): Add a comment about virt ASE might need
586 a new flag.
587 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
588 * doc/c-mips.texi: Document -mvirt and -mno-virt.
589 Document ".set virt" and ".set novirt".
590
da8094d7
AM
5912013-05-09 Alan Modra <amodra@gmail.com>
592
593 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
594 control of operand flag bits.
595
c5f8c205
AM
5962013-05-07 Alan Modra <amodra@gmail.com>
597
598 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
599 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
600 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
601 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
602 (md_apply_fix): Set fx_no_overflow for assorted relocations.
603 Shift and sign-extend fieldval for use by some VLE reloc
604 operand->insert functions.
605
b47468a6
CM
6062013-05-06 Paul Brook <paul@codesourcery.com>
607 Catherine Moore <clm@codesourcery.com>
608
c5f8c205
AM
609 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
610 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
611 (md_apply_fix): Likewise.
612 (tc_gen_reloc): Likewise.
613
2de39019
CM
6142013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
617 (mips_fix_adjustable): Adjust pc-relative check to use
618 limited_pc_reloc_p.
619
754e2bb9
RS
6202013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
621
622 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
623 (s_mips_stab): Do not restrict to stabn only.
624
13761a11
NC
6252013-05-02 Nick Clifton <nickc@redhat.com>
626
627 * config/tc-msp430.c: Add support for the MSP430X architecture.
628 Add code to insert a NOP instruction after any instruction that
629 might change the interrupt state.
630 Add support for the LARGE memory model.
631 Add code to initialise the .MSP430.attributes section.
632 * config/tc-msp430.h: Add support for the MSP430X architecture.
633 * doc/c-msp430.texi: Document the new -mL and -mN command line
634 options.
635 * NEWS: Mention support for the MSP430X architecture.
636
df26367c
MR
6372013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
638
639 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
640 alpha*-*-linux*ecoff*.
641
f02d8318
CF
6422013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
643
644 * config/tc-mips.c (mips_ip): Add sizelo.
645 For "+C", "+G", and "+H", set sizelo and compare against it.
646
b40bf0a2
NC
6472013-04-29 Nick Clifton <nickc@redhat.com>
648
649 * as.c (Options): Add -gdwarf-sections.
650 (parse_args): Likewise.
651 * as.h (flag_dwarf_sections): Declare.
652 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
653 (process_entries): When -gdwarf-sections is enabled generate
654 fragmentary .debug_line sections.
655 (out_debug_line): Set the section for the .debug_line section end
656 symbol.
657 * doc/as.texinfo: Document -gdwarf-sections.
658 * NEWS: Mention -gdwarf-sections.
659
8eeccb77 6602013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
661
662 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
663 according to the target parameter. Don't call s_segm since s_segm
664 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
665 initialized yet.
666 (md_begin): Call s_segm according to target parameter from command
667 line.
668
49926cd0
AM
6692013-04-25 Alan Modra <amodra@gmail.com>
670
671 * configure.in: Allow little-endian linux.
672 * configure: Regenerate.
673
e3031850
SL
6742013-04-24 Sandra Loosemore <sandra@codesourcery.com>
675
676 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
677 "fstatus" control register to "eccinj".
678
cb948fc0
KT
6792013-04-19 Kai Tietz <ktietz@redhat.com>
680
681 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
682
4455e9ad
JB
6832013-04-15 Julian Brown <julian@codesourcery.com>
684
685 * expr.c (add_to_result, subtract_from_result): Make global.
686 * expr.h (add_to_result, subtract_from_result): Add prototypes.
687 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
688 subtract_from_result to handle extra bit of precision for .sleb128
689 directive operands.
690
956a6ba3
JB
6912013-04-10 Julian Brown <julian@codesourcery.com>
692
693 * read.c (convert_to_bignum): Add sign parameter. Use it
694 instead of X_unsigned to determine sign of resulting bignum.
695 (emit_expr): Pass extra argument to convert_to_bignum.
696 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
697 X_extrabit to convert_to_bignum.
698 (parse_bitfield_cons): Set X_extrabit.
699 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
700 Initialise X_extrabit field as appropriate.
701 (add_to_result): New.
702 (subtract_from_result): New.
703 (expr): Use above.
704 * expr.h (expressionS): Add X_extrabit field.
705
eb9f3f00
JB
7062013-04-10 Jan Beulich <jbeulich@suse.com>
707
708 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
709 register being PC when is_t or writeback, and use distinct
710 diagnostic for the latter case.
711
ccb84d65
JB
7122013-04-10 Jan Beulich <jbeulich@suse.com>
713
714 * gas/config/tc-arm.c (parse_operands): Re-write
715 po_barrier_or_imm().
716 (do_barrier): Remove bogus constraint().
717 (do_t_barrier): Remove.
718
4d13caa0
NC
7192013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
720
721 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
722 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
723 ATmega2564RFR2
724 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
725
16d02dc9
JB
7262013-04-09 Jan Beulich <jbeulich@suse.com>
727
728 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
729 Use local variable Rt in more places.
730 (do_vmsr): Accept all control registers.
731
05ac0ffb
JB
7322013-04-09 Jan Beulich <jbeulich@suse.com>
733
734 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
735 if there was none specified for moves between scalar and core
736 register.
737
2d51fb74
JB
7382013-04-09 Jan Beulich <jbeulich@suse.com>
739
740 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
741 NEON_ALL_LANES case.
742
94dcf8bf
JB
7432013-04-08 Jan Beulich <jbeulich@suse.com>
744
745 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
746 PC-relative VSTR.
747
1472d06f
JB
7482013-04-08 Jan Beulich <jbeulich@suse.com>
749
750 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
751 entry to sp_fiq.
752
0c76cae8
AM
7532013-04-03 Alan Modra <amodra@gmail.com>
754
755 * doc/as.texinfo: Add support to generate man options for h8300.
756 * doc/c-h8300.texi: Likewise.
757
92eb40d9
RR
7582013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
759
760 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
761 Cortex-A57.
762
51dcdd4d
NC
7632013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
764
765 PR binutils/15068
766 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
767
c5d685bf
NC
7682013-03-26 Nick Clifton <nickc@redhat.com>
769
9b978282
NC
770 PR gas/15295
771 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
772 start of the file each time.
773
c5d685bf
NC
774 PR gas/15178
775 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
776 FreeBSD targets.
777
9699c833
TG
7782013-03-26 Douglas B Rupp <rupp@gnat.com>
779
780 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
781 after fixup.
782
4755303e
WN
7832013-03-21 Will Newton <will.newton@linaro.org>
784
785 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
786 pc-relative str instructions in Thumb mode.
787
81f5558e
NC
7882013-03-21 Michael Schewe <michael.schewe@gmx.net>
789
790 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
791 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
792 R_H8_DISP32A16.
793 * config/tc-h8300.h: Remove duplicated defines.
794
71863e73
NC
7952013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
796
797 PR gas/15282
798 * tc-avr.c (mcu_has_3_byte_pc): New function.
799 (tc_cfi_frame_initial_instructions): Call it to find return
800 address size.
801
795b8e6b
NC
8022013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
803
804 PR gas/15095
805 * config/tc-tic6x.c (tic6x_try_encode): Handle
806 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
807 encode register pair numbers when required.
808
ba86b375
WN
8092013-03-15 Will Newton <will.newton@linaro.org>
810
811 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
812 in vstr in Thumb mode for pre-ARMv7 cores.
813
9e6f3811
AS
8142013-03-14 Andreas Schwab <schwab@suse.de>
815
816 * doc/c-arc.texi (ARC Directives): Revert last change and use
817 @itemize instead of @table.
818 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
819
b10bf8c5
NC
8202013-03-14 Nick Clifton <nickc@redhat.com>
821
822 PR gas/15273
823 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
824 NULL message, instead just check ARM_CPU_IS_ANY directly.
825
ba724cfc
NC
8262013-03-14 Nick Clifton <nickc@redhat.com>
827
828 PR gas/15212
9e6f3811 829 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
830 for table format.
831 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
832 to the @item directives.
833 (ARM-Neon-Alignment): Move to correct place in the document.
834 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
835 formatting.
836 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
837 @smallexample.
838
531a94fd
SL
8392013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
840
841 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
842 case. Add default BAD_CASE to switch.
843
dad60f8e
SL
8442013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
845
846 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
847 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
848
dd5181d5
KT
8492013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
850
851 * config/tc-arm.c (crc_ext_armv8): New feature set.
852 (UNPRED_REG): New macro.
853 (do_crc32_1): New function.
854 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
855 do_crc32ch, do_crc32cw): Likewise.
856 (TUEc): New macro.
857 (insns): Add entries for crc32 mnemonics.
858 (arm_extensions): Add entry for crc.
859
8e723a10
CLT
8602013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
861
862 * write.h (struct fix): Add fx_dot_frag field.
863 (dot_frag): Declare.
864 * write.c (dot_frag): New variable.
865 (fix_new_internal): Set fx_dot_frag field with dot_frag.
866 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
867 * expr.c (expr): Save value of frag_now in dot_frag when setting
868 dot_value.
869 * read.c (emit_expr): Likewise. Delete comments.
870
be05d201
L
8712013-03-07 H.J. Lu <hongjiu.lu@intel.com>
872
873 * config/tc-i386.c (flag_code_names): Removed.
874 (i386_index_check): Rewrote.
875
62b0d0d5
YZ
8762013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
877
878 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
879 add comment.
880 (aarch64_double_precision_fmovable): New function.
881 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
882 function; handle hexadecimal representation of IEEE754 encoding.
883 (parse_operands): Update the call to parse_aarch64_imm_float.
884
165de32a
L
8852013-02-28 H.J. Lu <hongjiu.lu@intel.com>
886
887 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
888 (check_hle): Updated.
889 (md_assemble): Likewise.
890 (parse_insn): Likewise.
891
d5de92cf
L
8922013-02-28 H.J. Lu <hongjiu.lu@intel.com>
893
894 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 895 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
896 (parse_insn): Remove expecting_string_instruction. Set
897 i.rep_prefix.
898
e60bb1dd
YZ
8992013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
900
901 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
902
aeebdd9b
YZ
9032013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
904
905 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
906 for system registers.
907
4107ae22
DD
9082013-02-27 DJ Delorie <dj@redhat.com>
909
910 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
911 (rl78_op): Handle %code().
912 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
913 (tc_gen_reloc): Likwise; convert to a computed reloc.
914 (md_apply_fix): Likewise.
915
151fa98f
NC
9162013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
917
918 * config/rl78-parse.y: Fix encoding of DIVWU insn.
919
70a8bc5b 9202013-02-25 Terry Guo <terry.guo@arm.com>
921
922 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
923 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
924 list of accepted CPUs.
925
5c111e37
L
9262013-02-19 H.J. Lu <hongjiu.lu@intel.com>
927
928 PR gas/15159
929 * config/tc-i386.c (cpu_arch): Add ".smap".
930
931 * doc/c-i386.texi: Document smap.
932
8a75745d
MR
9332013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
934
935 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
936 mips_assembling_insn appropriately.
937 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
938
79850f26
MR
9392013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
940
cf29fc61 941 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
942 extraneous braces.
943
4c261dff
NC
9442013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
945
5c111e37 946 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 947
ea33f281
NC
9482013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
949
950 * configure.tgt: Add nios2-*-rtems*.
951
a1ccaec9
YZ
9522013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
953
954 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
955 NULL.
956
0aa27725
RS
9572013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
958
959 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
960 (macro): Use it. Assert that trunc.w.s is not used for r5900.
961
da4339ed
NC
9622013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
963
964 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
965 core.
966
36591ba1 9672013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 968 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
969
970 Based on patches from Altera Corporation.
971
972 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
973 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
974 * Makefile.in: Regenerated.
975 * configure.tgt: Add case for nios2*-linux*.
976 * config/obj-elf.c: Conditionally include elf/nios2.h.
977 * config/tc-nios2.c: New file.
978 * config/tc-nios2.h: New file.
979 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
980 * doc/Makefile.in: Regenerated.
981 * doc/all.texi: Set NIOSII.
982 * doc/as.texinfo (Overview): Add Nios II options.
983 (Machine Dependencies): Include c-nios2.texi.
984 * doc/c-nios2.texi: New file.
985 * NEWS: Note Altera Nios II support.
986
94d4433a
AM
9872013-02-06 Alan Modra <amodra@gmail.com>
988
989 PR gas/14255
990 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
991 Don't skip fixups with fx_subsy non-NULL.
992 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
993 with fx_subsy non-NULL.
994
ace9af6f
L
9952013-02-04 H.J. Lu <hongjiu.lu@intel.com>
996
997 * doc/c-metag.texi: Add "@c man" markers.
998
89d67ed9
AM
9992013-02-04 Alan Modra <amodra@gmail.com>
1000
1001 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1002 related code.
1003 (TC_ADJUST_RELOC_COUNT): Delete.
1004 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1005
89072bd6
AM
10062013-02-04 Alan Modra <amodra@gmail.com>
1007
1008 * po/POTFILES.in: Regenerate.
1009
f9b2d544
NC
10102013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1011
1012 * config/tc-metag.c: Make SWAP instruction less permissive with
1013 its operands.
1014
392ca752
DD
10152013-01-29 DJ Delorie <dj@redhat.com>
1016
1017 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1018 relocs in .word/.etc statements.
1019
427d0db6
RM
10202013-01-29 Roland McGrath <mcgrathr@google.com>
1021
1022 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1023 immediate value for 8-bit offset" error so it shows line info.
1024
4faf939a
JM
10252013-01-24 Joseph Myers <joseph@codesourcery.com>
1026
1027 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1028 for 64-bit output.
1029
78c8d46c
NC
10302013-01-24 Nick Clifton <nickc@redhat.com>
1031
1032 * config/tc-v850.c: Add support for e3v5 architecture.
1033 * doc/c-v850.texi: Mention new support.
1034
fb5b7503
NC
10352013-01-23 Nick Clifton <nickc@redhat.com>
1036
1037 PR gas/15039
1038 * config/tc-avr.c: Include dwarf2dbg.h.
1039
8ce3d284
L
10402013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1041
1042 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1043 (tc_i386_fix_adjustable): Likewise.
1044 (lex_got): Likewise.
1045 (tc_gen_reloc): Likewise.
1046
f5555712
YZ
10472013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1048
1049 * config/tc-aarch64.c (output_operand_error_record): Change to output
1050 the out-of-range error message as value-expected message if there is
1051 only one single value in the expected range.
1052 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1053 LSL #0 as a programmer-friendly feature.
1054
8fd4256d
L
10552013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1056
1057 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1058 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1059 BFD_RELOC_64_SIZE relocations.
1060 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1061 for it.
1062 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1063 relocations against local symbols.
1064
a5840dce
AM
10652013-01-16 Alan Modra <amodra@gmail.com>
1066
1067 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1068 finding some sort of toc syntax error, and break to avoid
1069 compiler uninit warning.
1070
af89796a
L
10712013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1072
1073 PR gas/15019
1074 * config/tc-i386.c (lex_got): Increment length by 1 if the
1075 relocation token is removed.
1076
dd42f060
NC
10772013-01-15 Nick Clifton <nickc@redhat.com>
1078
1079 * config/tc-v850.c (md_assemble): Allow signed values for
1080 V850E_IMMEDIATE.
1081
464e3686
SK
10822013-01-11 Sean Keys <skeys@ipdatasys.com>
1083
1084 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1085 git to cvs.
464e3686 1086
5817ffd1
PB
10872013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1088
1089 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1090 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1091 * config/tc-ppc.c (md_show_usage): Likewise.
1092 (ppc_handle_align): Handle power8's group ending nop.
1093
f4b1f6a9
SK
10942013-01-10 Sean Keys <skeys@ipdatasys.com>
1095
1096 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1097 that the assember exits after the opcodes have been printed.
f4b1f6a9 1098
34bca508
L
10992013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1100
1101 * app.c: Remove trailing white spaces.
1102 * as.c: Likewise.
1103 * as.h: Likewise.
1104 * cond.c: Likewise.
1105 * dw2gencfi.c: Likewise.
1106 * dwarf2dbg.h: Likewise.
1107 * ecoff.c: Likewise.
1108 * input-file.c: Likewise.
1109 * itbl-lex.h: Likewise.
1110 * output-file.c: Likewise.
1111 * read.c: Likewise.
1112 * sb.c: Likewise.
1113 * subsegs.c: Likewise.
1114 * symbols.c: Likewise.
1115 * write.c: Likewise.
1116 * config/tc-i386.c: Likewise.
1117 * doc/Makefile.am: Likewise.
1118 * doc/Makefile.in: Likewise.
1119 * doc/c-aarch64.texi: Likewise.
1120 * doc/c-alpha.texi: Likewise.
1121 * doc/c-arc.texi: Likewise.
1122 * doc/c-arm.texi: Likewise.
1123 * doc/c-avr.texi: Likewise.
1124 * doc/c-bfin.texi: Likewise.
1125 * doc/c-cr16.texi: Likewise.
1126 * doc/c-d10v.texi: Likewise.
1127 * doc/c-d30v.texi: Likewise.
1128 * doc/c-h8300.texi: Likewise.
1129 * doc/c-hppa.texi: Likewise.
1130 * doc/c-i370.texi: Likewise.
1131 * doc/c-i386.texi: Likewise.
1132 * doc/c-i860.texi: Likewise.
1133 * doc/c-m32c.texi: Likewise.
1134 * doc/c-m32r.texi: Likewise.
1135 * doc/c-m68hc11.texi: Likewise.
1136 * doc/c-m68k.texi: Likewise.
1137 * doc/c-microblaze.texi: Likewise.
1138 * doc/c-mips.texi: Likewise.
1139 * doc/c-msp430.texi: Likewise.
1140 * doc/c-mt.texi: Likewise.
1141 * doc/c-s390.texi: Likewise.
1142 * doc/c-score.texi: Likewise.
1143 * doc/c-sh.texi: Likewise.
1144 * doc/c-sh64.texi: Likewise.
1145 * doc/c-tic54x.texi: Likewise.
1146 * doc/c-tic6x.texi: Likewise.
1147 * doc/c-v850.texi: Likewise.
1148 * doc/c-xc16x.texi: Likewise.
1149 * doc/c-xgate.texi: Likewise.
1150 * doc/c-xtensa.texi: Likewise.
1151 * doc/c-z80.texi: Likewise.
1152 * doc/internals.texi: Likewise.
1153
4c665b71
RM
11542013-01-10 Roland McGrath <mcgrathr@google.com>
1155
1156 * hash.c (hash_new_sized): Make it global.
1157 * hash.h: Declare it.
1158 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1159 pass a small size.
1160
a3c62988
NC
11612013-01-10 Will Newton <will.newton@imgtec.com>
1162
1163 * Makefile.am: Add Meta.
1164 * Makefile.in: Regenerate.
1165 * config/tc-metag.c: New file.
1166 * config/tc-metag.h: New file.
1167 * configure.tgt: Add Meta.
1168 * doc/Makefile.am: Add Meta.
1169 * doc/Makefile.in: Regenerate.
1170 * doc/all.texi: Add Meta.
1171 * doc/as.texiinfo: Document Meta options.
1172 * doc/c-metag.texi: New file.
1173
b37df7c4
SE
11742013-01-09 Steve Ellcey <sellcey@mips.com>
1175
1176 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1177 calls.
1178 * config/tc-mips.c (internalError): Remove, replace with abort.
1179
a3251895
YZ
11802013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1181
1182 * config/tc-aarch64.c (parse_operands): Change to compare the result
1183 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1184
8ab8155f
NC
11852013-01-07 Nick Clifton <nickc@redhat.com>
1186
1187 PR gas/14887
1188 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1189 anticipated character.
1190 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1191 here as it is no longer needed.
1192
a4ac1c42
AS
11932013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1194
1195 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1196 * doc/c-score.texi (SCORE-Opts): Likewise.
1197 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1198
e407c74b
NC
11992013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1200
1201 * config/tc-mips.c: Add support for MIPS r5900.
1202 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1203 lq and sq.
1204 (can_swap_branch_p, get_append_method): Detect some conditional
1205 short loops to fix a bug on the r5900 by NOP in the branch delay
1206 slot.
1207 (M_MUL): Support 3 operands in multu on r5900.
1208 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1209 (s_mipsset): Force 32 bit floating point on r5900.
1210 (mips_ip): Check parameter range of instructions mfps and mtps on
1211 r5900.
1212 * configure.in: Detect CPU type when target string contains r5900
1213 (e.g. mips64r5900el-linux-gnu).
1214
62658407
L
12152013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1216
1217 * as.c (parse_args): Update copyright year to 2013.
1218
95830fd1
YZ
12192013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1220
1221 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1222 and "cortex57".
1223
517bb291 12242013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1225
517bb291
NC
1226 PR gas/14987
1227 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1228 closing bracket.
d709e4e6 1229
517bb291 1230For older changes see ChangeLog-2012
08d56133 1231\f
517bb291 1232Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1233
1234Copying and distribution of this file, with or without modification,
1235are permitted in any medium without royalty provided the copyright
1236notice and this notice are preserved.
1237
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NC
1238Local Variables:
1239mode: change-log
1240left-margin: 8
1241fill-column: 74
1242version-control: never
1243End: