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69091a2c
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12013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
2
3 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
4 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
5 (aarch64_abi): New variable.
6 (ilp32_p): Change to be a macro.
7 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
8 (struct aarch64_option_abi_value_table): New struct.
9 (aarch64_abis): New table.
10 (aarch64_parse_abi): New function.
11 (aarch64_long_opts): Add entry for -mabi=.
12 * doc/as.texinfo (Target AArch64 options): Document -mabi.
13 * doc/c-aarch64.texi: Likewise.
14
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152013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
16
17 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
18 unsigned comparison.
19
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202013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
21
22 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
23 RX610.
24 * config/rx-parse.y: (rx_check_float_support): Add function to
25 check floating point operation support for target RX100 and
26 RX200.
27 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
28 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
29 RX200, RX600, and RX610
30
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312013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
32
33 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
34
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352013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
36
37 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
38 * doc/c-avr.texi: Likewise.
39
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402013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
41
42 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
43 error with older GCCs.
44 (mips16_macro_build): Dereference args.
45
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462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
47
48 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
49 New functions, split out from...
50 (reg_lookup): ...here. Remove itbl support.
51 (reglist_lookup): Delete.
52 (mips_operand_token_type): New enum.
53 (mips_operand_token): New structure.
54 (mips_operand_tokens): New variable.
55 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
56 (mips_parse_arguments): New functions.
57 (md_begin): Initialize mips_operand_tokens.
58 (mips_arg_info): Add a token field. Remove optional_reg field.
59 (match_char, match_expression): New functions.
60 (match_const_int): Use match_expression. Remove "s" argument
61 and return a boolean result. Remove O_register handling.
62 (match_regno, match_reg, match_reg_range): New functions.
63 (match_int_operand, match_mapped_int_operand, match_msb_operand)
64 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
65 (match_addiusp_operand, match_clo_clz_dest_operand)
66 (match_lwm_swm_list_operand, match_entry_exit_operand)
67 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
68 (match_tied_reg_operand): Remove "s" argument and return a boolean
69 result. Match tokens rather than text. Update calls to
70 match_const_int. Rely on match_regno to call check_regno.
71 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
72 "arg" argument. Return a boolean result.
73 (parse_float_constant): Replace with...
74 (match_float_constant): ...this new function.
75 (match_operand): Remove "s" argument and return a boolean result.
76 Update calls to subfunctions.
77 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
78 rather than string-parsing routines. Update handling of optional
79 registers for token scheme.
80
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812013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
82
83 * config/tc-mips.c (parse_float_constant): Split out from...
84 (mips_ip): ...here.
85
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862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
87
88 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
89 Delete.
90
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912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
94 (match_entry_exit_operand): New function.
95 (match_save_restore_list_operand): Likewise.
96 (match_operand): Use them.
97 (check_absolute_expr): Delete.
98 (mips16_ip): Rewrite main parsing loop to use mips_operands.
99
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1002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
101
102 * config/tc-mips.c: Enable functions commented out in previous patch.
103 (SKIP_SPACE_TABS): Move further up file.
104 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
105 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
106 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
107 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
108 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
109 (micromips_imm_b_map, micromips_imm_c_map): Delete.
110 (mips_lookup_reg_pair): Delete.
111 (macro): Use report_bad_range and report_bad_field.
112 (mips_immed, expr_const_in_range): Delete.
113 (mips_ip): Rewrite main parsing loop to use new functions.
114
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1152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
118 Change return type to bfd_boolean.
119 (report_bad_range, report_bad_field): New functions.
120 (mips_arg_info): New structure.
121 (match_const_int, convert_reg_type, check_regno, match_int_operand)
122 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
123 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
124 (match_addiusp_operand, match_clo_clz_dest_operand)
125 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
126 (match_pc_operand, match_tied_reg_operand, match_operand)
127 (check_completed_insn): New functions, commented out for now.
128
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1292013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
130
131 * config/tc-mips.c (insn_insert_operand): New function.
132 (macro_build, mips16_macro_build): Put null character check
133 in the for loop and convert continues to breaks. Use operand
134 structures to handle constant operands.
135
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1362013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * config/tc-mips.c (validate_mips_insn): Move further up file.
139 Add insn_bits and decode_operand arguments. Use the mips_operand
140 fields to work out which bits an operand occupies. Detect double
141 definitions.
142 (validate_micromips_insn): Move further up file. Call into
143 validate_mips_insn.
144
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1452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
146
147 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
148
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1492013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
150
151 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
152 and "~".
153 (macro): Update accordingly.
154
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1552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
156
157 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
158 (imm_reloc): Delete.
159 (md_assemble): Remove imm_reloc handling.
160 (mips_ip): Update commentary. Use offset_expr and offset_reloc
161 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
162 Use a temporary array rather than imm_reloc when parsing
163 constant expressions. Remove imm_reloc initialization.
164 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
165 for the relaxable field. Use a relax_char variable to track the
166 type of this field. Remove imm_reloc initialization.
167
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1682013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
169
170 * config/tc-mips.c (mips16_ip): Handle "I".
171
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1722013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
173
174 * config/tc-mips.c (mips_flag_nan2008): New variable.
175 (options): Add OPTION_NAN enum value.
176 (md_longopts): Handle it.
177 (md_parse_option): Likewise.
178 (s_nan): New function.
179 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
180 (md_show_usage): Add -mnan.
181
182 * doc/as.texinfo (Overview): Add -mnan.
183 * doc/c-mips.texi (MIPS Opts): Document -mnan.
184 (MIPS NaN Encodings): New node. Document .nan directive.
185 (MIPS-Dependent): List the new node.
186
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1872013-07-09 Tristan Gingold <gingold@adacore.com>
188
189 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
190
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1912013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
192
193 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
194 for 'A' and assume that the constant has been elided if the result
195 is an O_register.
196
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1972013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
198
199 * config/tc-mips.c (gprel16_reloc_p): New function.
200 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
201 BFD_RELOC_UNUSED.
202 (offset_high_part, small_offset_p): New functions.
203 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
204 register load and store macros, handle the 16-bit offset case first.
205 If a 16-bit offset is not suitable for the instruction we're
206 generating, load it into the temporary register using
207 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
208 M_L_DAB code once the address has been constructed. For double load
209 and store macros, again handle the 16-bit offset case first.
210 If the second register cannot be accessed from the same high
211 part as the first, load it into AT using ADDRESS_ADDI_INSN.
212 Fix the handling of LD in cases where the first register is the
213 same as the base. Also handle the case where the offset is
214 not 16 bits and the second register cannot be accessed from the
215 same high part as the first. For unaligned loads and stores,
216 fuse the offbits == 12 and old "ab" handling. Apply this handling
217 whenever the second offset needs a different high part from the first.
218 Construct the offset using ADDRESS_ADDI_INSN where possible,
219 for offbits == 16 as well as offbits == 12. Use offset_reloc
220 when constructing the individual loads and stores.
221 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
222 and offset_reloc before matching against a particular opcode.
223 Handle elided 'A' constants. Allow 'A' constants to use
224 relocation operators.
225
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2262013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
227
228 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
229 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
230 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
231
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2322013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
233
234 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
235 Require the msb to be <= 31 for "+s". Check that the size is <= 31
236 for both "+s" and "+S".
237
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2382013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
239
240 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
241 (mips_ip, mips16_ip): Handle "+i".
242
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2432013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
244
245 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
246 (micromips_to_32_reg_h_map): Rename to...
247 (micromips_to_32_reg_h_map1): ...this.
248 (micromips_to_32_reg_i_map): Rename to...
249 (micromips_to_32_reg_h_map2): ...this.
250 (mips_lookup_reg_pair): New function.
251 (gpr_write_mask, macro): Adjust after above renaming.
252 (validate_micromips_insn): Remove "mi" handling.
253 (mips_ip): Likewise. Parse both registers in a pair for "mh".
254
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2552013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
256
257 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
258 (mips_ip): Remove "+D" and "+T" handling.
259
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2602013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
261
262 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
263 relocs.
264
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2652013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
266
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267 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
268
2692013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
270
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271 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
272 (aarch64_force_relocation): Likewise.
273
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2742013-07-02 Alan Modra <amodra@gmail.com>
275
276 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
277
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2782013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
279
280 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
281 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
282 Replace @sc{mips16} with literal `MIPS16'.
283 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
284
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2852013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
286
287 * config/tc-aarch64.c (reloc_table): Replace
288 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
289 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
290 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
291 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
292 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
293 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
294 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
295 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
296 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
297 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
298 (aarch64_force_relocation): Likewise.
299
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3002013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
301
302 * config/tc-aarch64.c (ilp32_p): New static variable.
303 (elf64_aarch64_target_format): Return the target according to the
304 value of 'ilp32_p'.
305 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
306 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
307 (aarch64_dwarf2_addr_size): New function.
308 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
309 (DWARF2_ADDR_SIZE): New define.
310
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3112013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
312
313 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
314
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3152013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
316
317 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
318
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3192013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
320
321 * config/tc-mips.c (mips_set_options): Add insn32 member.
322 (mips_opts): Initialize it.
323 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
324 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
325 (md_longopts): Add "minsn32" and "mno-insn32" options.
326 (is_size_valid): Handle insn32 mode.
327 (md_assemble): Pass instruction string down to macro.
328 (brk_fmt): Add second dimension and insn32 mode initializers.
329 (mfhl_fmt): Likewise.
330 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
331 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
332 (macro_build_jalr, move_register): Handle insn32 mode.
333 (macro_build_branch_rs): Likewise.
334 (macro): Handle insn32 mode.
335 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
336 (mips_ip): Handle insn32 mode.
337 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
338 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
339 (mips_handle_align): Handle insn32 mode.
340 (md_show_usage): Add -minsn32 and -mno-insn32.
341
342 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
343 -mno-insn32 options.
344 (-minsn32, -mno-insn32): New options.
345 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
346 options.
347 (MIPS assembly options): New node. Document .set insn32 and
348 .set noinsn32.
349 (MIPS-Dependent): List the new node.
350
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3512013-06-25 Nick Clifton <nickc@redhat.com>
352
353 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
354 the PC in indirect addressing on 430xv2 parts.
355 (msp430_operands): Add version test to hardware bug encoding
356 restrictions.
357
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3582013-06-24 Roland McGrath <mcgrathr@google.com>
359
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360 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
361 so it skips whitespace before it.
362 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
363
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364 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
365 (arm_reg_parse_multi): Skip whitespace first.
366 (parse_reg_list): Likewise.
367 (parse_vfp_reg_list): Likewise.
368 (s_arm_unwind_save_mmxwcg): Likewise.
369
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3702013-06-24 Nick Clifton <nickc@redhat.com>
371
372 PR gas/15623
373 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
374
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3752013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
376
377 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
378
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3792013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
380
381 * config/tc-mips.c: Assert that offsetT and valueT are at least
382 8 bytes in size.
383 (GPR_SMIN, GPR_SMAX): New macros.
384 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
385
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3862013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
387
388 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
389 conditions. Remove any code deselected by them.
390 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
391
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3922013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
393
394 * NEWS: Note removal of ECOFF support.
395 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
396 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
397 (MULTI_CFILES): Remove config/e-mipsecoff.c.
398 * Makefile.in: Regenerate.
399 * configure.in: Remove MIPS ECOFF references.
400 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
401 Delete cases.
402 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
403 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
404 (mips-*-*): ...this single case.
405 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
406 MIPS emulations to be e-mipself*.
407 * configure: Regenerate.
408 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
409 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
410 (mips-*-sysv*): Remove coff and ecoff cases.
411 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
412 * ecoff.c: Remove reference to MIPS ECOFF.
413 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
414 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
415 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
416 (mips_hi_fixup): Tweak comment.
417 (append_insn): Require a howto.
418 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
419
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4202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
421
422 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
423 Use "CPU" instead of "cpu".
424 * doc/c-mips.texi: Likewise.
425 (MIPS Opts): Rename to MIPS Options.
426 (MIPS option stack): Rename to MIPS Option Stack.
427 (MIPS ASE instruction generation overrides): Rename to
428 MIPS ASE Instruction Generation Overrides (for now).
429 (MIPS floating-point): Rename to MIPS Floating-Point.
430
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4312013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
432
433 * doc/c-mips.texi (MIPS Macros): New section.
434 (MIPS Object): Replace with...
435 (MIPS Small Data): ...this new section.
436
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4372013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
438
439 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
440 Capitalize name. Use @kindex instead of @cindex for .set entries.
441
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4422013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
443
444 * doc/c-mips.texi (MIPS Stabs): Remove section.
445
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4462013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
447
448 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
449 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
450 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
451 (ISA_SUPPORTS_VIRT64_ASE): Delete.
452 (mips_ase): New structure.
453 (mips_ases): New table.
454 (FP64_ASES): New macro.
455 (mips_ase_groups): New array.
456 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
457 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
458 functions.
459 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
460 (md_parse_option): Use mips_ases and mips_set_ase instead of
461 separate case statements for each ASE option.
462 (mips_after_parse_args): Use FP64_ASES. Use
463 mips_check_isa_supports_ases to check the ASEs against
464 other options.
465 (s_mipsset): Use mips_ases and mips_set_ase instead of
466 separate if statements for each ASE option. Use
467 mips_check_isa_supports_ases, even when a non-ASE option
468 is specified.
469
63a4bc21
KT
4702013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
471
472 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
473
c31f3936
RS
4742013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
475
476 * config/tc-mips.c (md_shortopts, options, md_longopts)
477 (md_longopts_size): Move earlier in file.
478
846ef2d0
RS
4792013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
480
481 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
482 with a single "ase" bitmask.
483 (mips_opts): Update accordingly.
484 (file_ase, file_ase_explicit): New variables.
485 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
486 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
487 (ISA_HAS_ROR): Adjust for mips_set_options change.
488 (is_opcode_valid): Take the base ase mask directly from mips_opts.
489 (mips_ip): Adjust for mips_set_options change.
490 (md_parse_option): Likewise. Update file_ase_explicit.
491 (mips_after_parse_args): Adjust for mips_set_options change.
492 Use bitmask operations to select the default ASEs. Set file_ase
493 rather than individual per-ASE variables.
494 (s_mipsset): Adjust for mips_set_options change.
495 (mips_elf_final_processing): Test file_ase rather than
496 file_ase_mdmx. Remove commented-out code.
497
d16afab6
RS
4982013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
499
500 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
501 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
502 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
503 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
504 (mips_after_parse_args): Use the new "ase" field to choose
505 the default ASEs.
506 (mips_cpu_info_table): Move ASEs from the "flags" field to the
507 "ase" field.
508
e83a675f
RE
5092013-06-18 Richard Earnshaw <rearnsha@arm.com>
510
511 * config/tc-arm.c (symbol_preemptible): New function.
512 (relax_branch): Use it.
513
7f3c4072
CM
5142013-06-17 Catherine Moore <clm@codesourcery.com>
515 Maciej W. Rozycki <macro@codesourcery.com>
516 Chao-Ying Fu <fu@mips.com>
517
518 * config/tc-mips.c (mips_set_options): Add ase_eva.
519 (mips_set_options mips_opts): Add ase_eva.
520 (file_ase_eva): Declare.
521 (ISA_SUPPORTS_EVA_ASE): Define.
522 (IS_SEXT_9BIT_NUM): Define.
523 (MIPS_CPU_ASE_EVA): Define.
524 (is_opcode_valid): Add support for ase_eva.
525 (macro_build): Likewise.
526 (macro): Likewise.
527 (validate_mips_insn): Likewise.
528 (validate_micromips_insn): Likewise.
529 (mips_ip): Likewise.
530 (options): Add OPTION_EVA and OPTION_NO_EVA.
531 (md_longopts): Add -meva and -mno-eva.
532 (md_parse_option): Process new options.
533 (mips_after_parse_args): Check for valid EVA combinations.
534 (s_mipsset): Likewise.
535
e410add4
RS
5362013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
537
538 * dwarf2dbg.h (dwarf2_move_insn): Declare.
539 * dwarf2dbg.c (line_subseg): Add pmove_tail.
540 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
541 (dwarf2_gen_line_info_1): Update call accordingly.
542 (dwarf2_move_insn): New function.
543 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
544
6a50d470
RS
5452013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
546
547 Revert:
548
549 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
550
551 PR gas/13024
552 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
553 (dwarf2_gen_line_info_1): Delete.
554 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
555 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
556 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
557 (dwarf2_directive_loc): Push previous .locs instead of generating
558 them immediately.
559
f122319e
CF
5602013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
561
562 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
563 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
564
909c7f9c
NC
5652013-06-13 Nick Clifton <nickc@redhat.com>
566
567 PR gas/15602
568 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
569 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
570 function. Generates an error if the adjusted offset is out of a
571 16-bit range.
572
5d5755a7
SL
5732013-06-12 Sandra Loosemore <sandra@codesourcery.com>
574
575 * config/tc-nios2.c (md_apply_fix): Mask constant
576 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
577
3bf0dbfb
MR
5782013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
579
580 * config/tc-mips.c (append_insn): Don't do branch relaxation for
581 MIPS-3D instructions either.
582 (md_convert_frag): Update the COPx branch mask accordingly.
583
584 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
585 option.
586 * doc/as.texinfo (Overview): Add --relax-branch and
587 --no-relax-branch.
588 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
589 --no-relax-branch.
590
9daf7bab
SL
5912013-06-09 Sandra Loosemore <sandra@codesourcery.com>
592
593 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
594 omitted.
595
d301a56b
RS
5962013-06-08 Catherine Moore <clm@codesourcery.com>
597
598 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
599 (is_opcode_valid_16): Pass ase value to opcode_is_member.
600 (append_insn): Change INSN_xxxx to ASE_xxxx.
601
7bab7634
DC
6022013-06-01 George Thomas <george.thomas@atmel.com>
603
604 * gas/config/tc-avr.c: Change ISA for devices with USB support to
605 AVR_ISA_XMEGAU
606
f60cf82f
L
6072013-05-31 H.J. Lu <hongjiu.lu@intel.com>
608
609 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
610 for ELF.
611
a3f278e2
CM
6122013-05-31 Paul Brook <paul@codesourcery.com>
613
614 gas/
615 * config/tc-mips.c (s_ehword): New.
616
067ec077
CM
6172013-05-30 Paul Brook <paul@codesourcery.com>
618
619 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
620
d6101ac2
MR
6212013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
622
623 * write.c (resolve_reloc_expr_symbols): On REL targets don't
624 convert relocs who have no relocatable field either. Rephrase
625 the conditional so that the PC-relative check is only applied
626 for REL targets.
627
f19ccbda
MR
6282013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
629
630 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
631 calculation.
632
418009c2
YZ
6332013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
634
635 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 636 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
637 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
638 (md_apply_fix): Likewise.
639 (aarch64_force_relocation): Likewise.
640
0a8897c7
KT
6412013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
642
643 * config/tc-arm.c (it_fsm_post_encode): Improve
644 warning messages about deprecated IT block formats.
645
89d2a2a3
MS
6462013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
647
648 * config/tc-aarch64.c (md_apply_fix): Move value range checking
649 inside fx_done condition.
650
c77c0862
RS
6512013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
652
653 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
654
c0637f3a
PB
6552013-05-20 Peter Bergner <bergner@vnet.ibm.com>
656
657 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
658 and clean up warning when using PRINT_OPCODE_TABLE.
659
5656a981
AM
6602013-05-20 Alan Modra <amodra@gmail.com>
661
662 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
663 and data fixups performing shift/high adjust/sign extension on
664 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
665 when writing data fixups rather than recalculating size.
666
997b26e8
JBG
6672013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
668
669 * doc/c-msp430.texi: Fix typo.
670
9f6e76f4
TG
6712013-05-16 Tristan Gingold <gingold@adacore.com>
672
673 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
674 are also TOC symbols.
675
638d3803
NC
6762013-05-16 Nick Clifton <nickc@redhat.com>
677
678 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
679 Add -mcpu command to specify core type.
997b26e8 680 * doc/c-msp430.texi: Update documentation.
638d3803 681
b015e599
AP
6822013-05-09 Andrew Pinski <apinski@cavium.com>
683
684 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
685 (mips_opts): Update for the new field.
686 (file_ase_virt): New variable.
687 (ISA_SUPPORTS_VIRT_ASE): New macro.
688 (ISA_SUPPORTS_VIRT64_ASE): New macro.
689 (MIPS_CPU_ASE_VIRT): New define.
690 (is_opcode_valid): Handle ase_virt.
691 (macro_build): Handle "+J".
692 (validate_mips_insn): Likewise.
693 (mips_ip): Likewise.
694 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
695 (md_longopts): Add mvirt and mnovirt
696 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
697 (mips_after_parse_args): Handle ase_virt field.
698 (s_mipsset): Handle "virt" and "novirt".
699 (mips_elf_final_processing): Add a comment about virt ASE might need
700 a new flag.
701 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
702 * doc/c-mips.texi: Document -mvirt and -mno-virt.
703 Document ".set virt" and ".set novirt".
704
da8094d7
AM
7052013-05-09 Alan Modra <amodra@gmail.com>
706
707 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
708 control of operand flag bits.
709
c5f8c205
AM
7102013-05-07 Alan Modra <amodra@gmail.com>
711
712 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
713 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
714 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
715 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
716 (md_apply_fix): Set fx_no_overflow for assorted relocations.
717 Shift and sign-extend fieldval for use by some VLE reloc
718 operand->insert functions.
719
b47468a6
CM
7202013-05-06 Paul Brook <paul@codesourcery.com>
721 Catherine Moore <clm@codesourcery.com>
722
c5f8c205
AM
723 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
724 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
725 (md_apply_fix): Likewise.
726 (tc_gen_reloc): Likewise.
727
2de39019
CM
7282013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
729
730 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
731 (mips_fix_adjustable): Adjust pc-relative check to use
732 limited_pc_reloc_p.
733
754e2bb9
RS
7342013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
735
736 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
737 (s_mips_stab): Do not restrict to stabn only.
738
13761a11
NC
7392013-05-02 Nick Clifton <nickc@redhat.com>
740
741 * config/tc-msp430.c: Add support for the MSP430X architecture.
742 Add code to insert a NOP instruction after any instruction that
743 might change the interrupt state.
744 Add support for the LARGE memory model.
745 Add code to initialise the .MSP430.attributes section.
746 * config/tc-msp430.h: Add support for the MSP430X architecture.
747 * doc/c-msp430.texi: Document the new -mL and -mN command line
748 options.
749 * NEWS: Mention support for the MSP430X architecture.
750
df26367c
MR
7512013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
752
753 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
754 alpha*-*-linux*ecoff*.
755
f02d8318
CF
7562013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
757
758 * config/tc-mips.c (mips_ip): Add sizelo.
759 For "+C", "+G", and "+H", set sizelo and compare against it.
760
b40bf0a2
NC
7612013-04-29 Nick Clifton <nickc@redhat.com>
762
763 * as.c (Options): Add -gdwarf-sections.
764 (parse_args): Likewise.
765 * as.h (flag_dwarf_sections): Declare.
766 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
767 (process_entries): When -gdwarf-sections is enabled generate
768 fragmentary .debug_line sections.
769 (out_debug_line): Set the section for the .debug_line section end
770 symbol.
771 * doc/as.texinfo: Document -gdwarf-sections.
772 * NEWS: Mention -gdwarf-sections.
773
8eeccb77 7742013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
775
776 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
777 according to the target parameter. Don't call s_segm since s_segm
778 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
779 initialized yet.
780 (md_begin): Call s_segm according to target parameter from command
781 line.
782
49926cd0
AM
7832013-04-25 Alan Modra <amodra@gmail.com>
784
785 * configure.in: Allow little-endian linux.
786 * configure: Regenerate.
787
e3031850
SL
7882013-04-24 Sandra Loosemore <sandra@codesourcery.com>
789
790 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
791 "fstatus" control register to "eccinj".
792
cb948fc0
KT
7932013-04-19 Kai Tietz <ktietz@redhat.com>
794
795 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
796
4455e9ad
JB
7972013-04-15 Julian Brown <julian@codesourcery.com>
798
799 * expr.c (add_to_result, subtract_from_result): Make global.
800 * expr.h (add_to_result, subtract_from_result): Add prototypes.
801 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
802 subtract_from_result to handle extra bit of precision for .sleb128
803 directive operands.
804
956a6ba3
JB
8052013-04-10 Julian Brown <julian@codesourcery.com>
806
807 * read.c (convert_to_bignum): Add sign parameter. Use it
808 instead of X_unsigned to determine sign of resulting bignum.
809 (emit_expr): Pass extra argument to convert_to_bignum.
810 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
811 X_extrabit to convert_to_bignum.
812 (parse_bitfield_cons): Set X_extrabit.
813 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
814 Initialise X_extrabit field as appropriate.
815 (add_to_result): New.
816 (subtract_from_result): New.
817 (expr): Use above.
818 * expr.h (expressionS): Add X_extrabit field.
819
eb9f3f00
JB
8202013-04-10 Jan Beulich <jbeulich@suse.com>
821
822 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
823 register being PC when is_t or writeback, and use distinct
824 diagnostic for the latter case.
825
ccb84d65
JB
8262013-04-10 Jan Beulich <jbeulich@suse.com>
827
828 * gas/config/tc-arm.c (parse_operands): Re-write
829 po_barrier_or_imm().
830 (do_barrier): Remove bogus constraint().
831 (do_t_barrier): Remove.
832
4d13caa0
NC
8332013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
834
835 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
836 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
837 ATmega2564RFR2
838 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
839
16d02dc9
JB
8402013-04-09 Jan Beulich <jbeulich@suse.com>
841
842 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
843 Use local variable Rt in more places.
844 (do_vmsr): Accept all control registers.
845
05ac0ffb
JB
8462013-04-09 Jan Beulich <jbeulich@suse.com>
847
848 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
849 if there was none specified for moves between scalar and core
850 register.
851
2d51fb74
JB
8522013-04-09 Jan Beulich <jbeulich@suse.com>
853
854 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
855 NEON_ALL_LANES case.
856
94dcf8bf
JB
8572013-04-08 Jan Beulich <jbeulich@suse.com>
858
859 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
860 PC-relative VSTR.
861
1472d06f
JB
8622013-04-08 Jan Beulich <jbeulich@suse.com>
863
864 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
865 entry to sp_fiq.
866
0c76cae8
AM
8672013-04-03 Alan Modra <amodra@gmail.com>
868
869 * doc/as.texinfo: Add support to generate man options for h8300.
870 * doc/c-h8300.texi: Likewise.
871
92eb40d9
RR
8722013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
873
874 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
875 Cortex-A57.
876
51dcdd4d
NC
8772013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
878
879 PR binutils/15068
880 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
881
c5d685bf
NC
8822013-03-26 Nick Clifton <nickc@redhat.com>
883
9b978282
NC
884 PR gas/15295
885 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
886 start of the file each time.
887
c5d685bf
NC
888 PR gas/15178
889 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
890 FreeBSD targets.
891
9699c833
TG
8922013-03-26 Douglas B Rupp <rupp@gnat.com>
893
894 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
895 after fixup.
896
4755303e
WN
8972013-03-21 Will Newton <will.newton@linaro.org>
898
899 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
900 pc-relative str instructions in Thumb mode.
901
81f5558e
NC
9022013-03-21 Michael Schewe <michael.schewe@gmx.net>
903
904 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
905 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
906 R_H8_DISP32A16.
907 * config/tc-h8300.h: Remove duplicated defines.
908
71863e73
NC
9092013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
910
911 PR gas/15282
912 * tc-avr.c (mcu_has_3_byte_pc): New function.
913 (tc_cfi_frame_initial_instructions): Call it to find return
914 address size.
915
795b8e6b
NC
9162013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
917
918 PR gas/15095
919 * config/tc-tic6x.c (tic6x_try_encode): Handle
920 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
921 encode register pair numbers when required.
922
ba86b375
WN
9232013-03-15 Will Newton <will.newton@linaro.org>
924
925 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
926 in vstr in Thumb mode for pre-ARMv7 cores.
927
9e6f3811
AS
9282013-03-14 Andreas Schwab <schwab@suse.de>
929
930 * doc/c-arc.texi (ARC Directives): Revert last change and use
931 @itemize instead of @table.
932 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
933
b10bf8c5
NC
9342013-03-14 Nick Clifton <nickc@redhat.com>
935
936 PR gas/15273
937 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
938 NULL message, instead just check ARM_CPU_IS_ANY directly.
939
ba724cfc
NC
9402013-03-14 Nick Clifton <nickc@redhat.com>
941
942 PR gas/15212
9e6f3811 943 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
944 for table format.
945 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
946 to the @item directives.
947 (ARM-Neon-Alignment): Move to correct place in the document.
948 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
949 formatting.
950 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
951 @smallexample.
952
531a94fd
SL
9532013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
954
955 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
956 case. Add default BAD_CASE to switch.
957
dad60f8e
SL
9582013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
959
960 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
961 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
962
dd5181d5
KT
9632013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
964
965 * config/tc-arm.c (crc_ext_armv8): New feature set.
966 (UNPRED_REG): New macro.
967 (do_crc32_1): New function.
968 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
969 do_crc32ch, do_crc32cw): Likewise.
970 (TUEc): New macro.
971 (insns): Add entries for crc32 mnemonics.
972 (arm_extensions): Add entry for crc.
973
8e723a10
CLT
9742013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
975
976 * write.h (struct fix): Add fx_dot_frag field.
977 (dot_frag): Declare.
978 * write.c (dot_frag): New variable.
979 (fix_new_internal): Set fx_dot_frag field with dot_frag.
980 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
981 * expr.c (expr): Save value of frag_now in dot_frag when setting
982 dot_value.
983 * read.c (emit_expr): Likewise. Delete comments.
984
be05d201
L
9852013-03-07 H.J. Lu <hongjiu.lu@intel.com>
986
987 * config/tc-i386.c (flag_code_names): Removed.
988 (i386_index_check): Rewrote.
989
62b0d0d5
YZ
9902013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
991
992 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
993 add comment.
994 (aarch64_double_precision_fmovable): New function.
995 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
996 function; handle hexadecimal representation of IEEE754 encoding.
997 (parse_operands): Update the call to parse_aarch64_imm_float.
998
165de32a
L
9992013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1000
1001 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1002 (check_hle): Updated.
1003 (md_assemble): Likewise.
1004 (parse_insn): Likewise.
1005
d5de92cf
L
10062013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1007
1008 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1009 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1010 (parse_insn): Remove expecting_string_instruction. Set
1011 i.rep_prefix.
1012
e60bb1dd
YZ
10132013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1014
1015 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1016
aeebdd9b
YZ
10172013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1018
1019 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1020 for system registers.
1021
4107ae22
DD
10222013-02-27 DJ Delorie <dj@redhat.com>
1023
1024 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1025 (rl78_op): Handle %code().
1026 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1027 (tc_gen_reloc): Likwise; convert to a computed reloc.
1028 (md_apply_fix): Likewise.
1029
151fa98f
NC
10302013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1031
1032 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1033
70a8bc5b 10342013-02-25 Terry Guo <terry.guo@arm.com>
1035
1036 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1037 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1038 list of accepted CPUs.
1039
5c111e37
L
10402013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1041
1042 PR gas/15159
1043 * config/tc-i386.c (cpu_arch): Add ".smap".
1044
1045 * doc/c-i386.texi: Document smap.
1046
8a75745d
MR
10472013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1048
1049 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1050 mips_assembling_insn appropriately.
1051 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1052
79850f26
MR
10532013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1054
cf29fc61 1055 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1056 extraneous braces.
1057
4c261dff
NC
10582013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1059
5c111e37 1060 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1061
ea33f281
NC
10622013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1063
1064 * configure.tgt: Add nios2-*-rtems*.
1065
a1ccaec9
YZ
10662013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1067
1068 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1069 NULL.
1070
0aa27725
RS
10712013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1072
1073 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1074 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1075
da4339ed
NC
10762013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1077
1078 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1079 core.
1080
36591ba1 10812013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1082 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1083
1084 Based on patches from Altera Corporation.
1085
1086 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1087 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1088 * Makefile.in: Regenerated.
1089 * configure.tgt: Add case for nios2*-linux*.
1090 * config/obj-elf.c: Conditionally include elf/nios2.h.
1091 * config/tc-nios2.c: New file.
1092 * config/tc-nios2.h: New file.
1093 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1094 * doc/Makefile.in: Regenerated.
1095 * doc/all.texi: Set NIOSII.
1096 * doc/as.texinfo (Overview): Add Nios II options.
1097 (Machine Dependencies): Include c-nios2.texi.
1098 * doc/c-nios2.texi: New file.
1099 * NEWS: Note Altera Nios II support.
1100
94d4433a
AM
11012013-02-06 Alan Modra <amodra@gmail.com>
1102
1103 PR gas/14255
1104 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1105 Don't skip fixups with fx_subsy non-NULL.
1106 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1107 with fx_subsy non-NULL.
1108
ace9af6f
L
11092013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1110
1111 * doc/c-metag.texi: Add "@c man" markers.
1112
89d67ed9
AM
11132013-02-04 Alan Modra <amodra@gmail.com>
1114
1115 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1116 related code.
1117 (TC_ADJUST_RELOC_COUNT): Delete.
1118 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1119
89072bd6
AM
11202013-02-04 Alan Modra <amodra@gmail.com>
1121
1122 * po/POTFILES.in: Regenerate.
1123
f9b2d544
NC
11242013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1125
1126 * config/tc-metag.c: Make SWAP instruction less permissive with
1127 its operands.
1128
392ca752
DD
11292013-01-29 DJ Delorie <dj@redhat.com>
1130
1131 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1132 relocs in .word/.etc statements.
1133
427d0db6
RM
11342013-01-29 Roland McGrath <mcgrathr@google.com>
1135
1136 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1137 immediate value for 8-bit offset" error so it shows line info.
1138
4faf939a
JM
11392013-01-24 Joseph Myers <joseph@codesourcery.com>
1140
1141 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1142 for 64-bit output.
1143
78c8d46c
NC
11442013-01-24 Nick Clifton <nickc@redhat.com>
1145
1146 * config/tc-v850.c: Add support for e3v5 architecture.
1147 * doc/c-v850.texi: Mention new support.
1148
fb5b7503
NC
11492013-01-23 Nick Clifton <nickc@redhat.com>
1150
1151 PR gas/15039
1152 * config/tc-avr.c: Include dwarf2dbg.h.
1153
8ce3d284
L
11542013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1155
1156 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1157 (tc_i386_fix_adjustable): Likewise.
1158 (lex_got): Likewise.
1159 (tc_gen_reloc): Likewise.
1160
f5555712
YZ
11612013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1162
1163 * config/tc-aarch64.c (output_operand_error_record): Change to output
1164 the out-of-range error message as value-expected message if there is
1165 only one single value in the expected range.
1166 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1167 LSL #0 as a programmer-friendly feature.
1168
8fd4256d
L
11692013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1170
1171 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1172 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1173 BFD_RELOC_64_SIZE relocations.
1174 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1175 for it.
1176 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1177 relocations against local symbols.
1178
a5840dce
AM
11792013-01-16 Alan Modra <amodra@gmail.com>
1180
1181 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1182 finding some sort of toc syntax error, and break to avoid
1183 compiler uninit warning.
1184
af89796a
L
11852013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1186
1187 PR gas/15019
1188 * config/tc-i386.c (lex_got): Increment length by 1 if the
1189 relocation token is removed.
1190
dd42f060
NC
11912013-01-15 Nick Clifton <nickc@redhat.com>
1192
1193 * config/tc-v850.c (md_assemble): Allow signed values for
1194 V850E_IMMEDIATE.
1195
464e3686
SK
11962013-01-11 Sean Keys <skeys@ipdatasys.com>
1197
1198 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1199 git to cvs.
464e3686 1200
5817ffd1
PB
12012013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1202
1203 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1204 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1205 * config/tc-ppc.c (md_show_usage): Likewise.
1206 (ppc_handle_align): Handle power8's group ending nop.
1207
f4b1f6a9
SK
12082013-01-10 Sean Keys <skeys@ipdatasys.com>
1209
1210 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1211 that the assember exits after the opcodes have been printed.
f4b1f6a9 1212
34bca508
L
12132013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1214
1215 * app.c: Remove trailing white spaces.
1216 * as.c: Likewise.
1217 * as.h: Likewise.
1218 * cond.c: Likewise.
1219 * dw2gencfi.c: Likewise.
1220 * dwarf2dbg.h: Likewise.
1221 * ecoff.c: Likewise.
1222 * input-file.c: Likewise.
1223 * itbl-lex.h: Likewise.
1224 * output-file.c: Likewise.
1225 * read.c: Likewise.
1226 * sb.c: Likewise.
1227 * subsegs.c: Likewise.
1228 * symbols.c: Likewise.
1229 * write.c: Likewise.
1230 * config/tc-i386.c: Likewise.
1231 * doc/Makefile.am: Likewise.
1232 * doc/Makefile.in: Likewise.
1233 * doc/c-aarch64.texi: Likewise.
1234 * doc/c-alpha.texi: Likewise.
1235 * doc/c-arc.texi: Likewise.
1236 * doc/c-arm.texi: Likewise.
1237 * doc/c-avr.texi: Likewise.
1238 * doc/c-bfin.texi: Likewise.
1239 * doc/c-cr16.texi: Likewise.
1240 * doc/c-d10v.texi: Likewise.
1241 * doc/c-d30v.texi: Likewise.
1242 * doc/c-h8300.texi: Likewise.
1243 * doc/c-hppa.texi: Likewise.
1244 * doc/c-i370.texi: Likewise.
1245 * doc/c-i386.texi: Likewise.
1246 * doc/c-i860.texi: Likewise.
1247 * doc/c-m32c.texi: Likewise.
1248 * doc/c-m32r.texi: Likewise.
1249 * doc/c-m68hc11.texi: Likewise.
1250 * doc/c-m68k.texi: Likewise.
1251 * doc/c-microblaze.texi: Likewise.
1252 * doc/c-mips.texi: Likewise.
1253 * doc/c-msp430.texi: Likewise.
1254 * doc/c-mt.texi: Likewise.
1255 * doc/c-s390.texi: Likewise.
1256 * doc/c-score.texi: Likewise.
1257 * doc/c-sh.texi: Likewise.
1258 * doc/c-sh64.texi: Likewise.
1259 * doc/c-tic54x.texi: Likewise.
1260 * doc/c-tic6x.texi: Likewise.
1261 * doc/c-v850.texi: Likewise.
1262 * doc/c-xc16x.texi: Likewise.
1263 * doc/c-xgate.texi: Likewise.
1264 * doc/c-xtensa.texi: Likewise.
1265 * doc/c-z80.texi: Likewise.
1266 * doc/internals.texi: Likewise.
1267
4c665b71
RM
12682013-01-10 Roland McGrath <mcgrathr@google.com>
1269
1270 * hash.c (hash_new_sized): Make it global.
1271 * hash.h: Declare it.
1272 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1273 pass a small size.
1274
a3c62988
NC
12752013-01-10 Will Newton <will.newton@imgtec.com>
1276
1277 * Makefile.am: Add Meta.
1278 * Makefile.in: Regenerate.
1279 * config/tc-metag.c: New file.
1280 * config/tc-metag.h: New file.
1281 * configure.tgt: Add Meta.
1282 * doc/Makefile.am: Add Meta.
1283 * doc/Makefile.in: Regenerate.
1284 * doc/all.texi: Add Meta.
1285 * doc/as.texiinfo: Document Meta options.
1286 * doc/c-metag.texi: New file.
1287
b37df7c4
SE
12882013-01-09 Steve Ellcey <sellcey@mips.com>
1289
1290 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1291 calls.
1292 * config/tc-mips.c (internalError): Remove, replace with abort.
1293
a3251895
YZ
12942013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1295
1296 * config/tc-aarch64.c (parse_operands): Change to compare the result
1297 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1298
8ab8155f
NC
12992013-01-07 Nick Clifton <nickc@redhat.com>
1300
1301 PR gas/14887
1302 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1303 anticipated character.
1304 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1305 here as it is no longer needed.
1306
a4ac1c42
AS
13072013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1308
1309 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1310 * doc/c-score.texi (SCORE-Opts): Likewise.
1311 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1312
e407c74b
NC
13132013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1314
1315 * config/tc-mips.c: Add support for MIPS r5900.
1316 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1317 lq and sq.
1318 (can_swap_branch_p, get_append_method): Detect some conditional
1319 short loops to fix a bug on the r5900 by NOP in the branch delay
1320 slot.
1321 (M_MUL): Support 3 operands in multu on r5900.
1322 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1323 (s_mipsset): Force 32 bit floating point on r5900.
1324 (mips_ip): Check parameter range of instructions mfps and mtps on
1325 r5900.
1326 * configure.in: Detect CPU type when target string contains r5900
1327 (e.g. mips64r5900el-linux-gnu).
1328
62658407
L
13292013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1330
1331 * as.c (parse_args): Update copyright year to 2013.
1332
95830fd1
YZ
13332013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1334
1335 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1336 and "cortex57".
1337
517bb291 13382013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1339
517bb291
NC
1340 PR gas/14987
1341 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1342 closing bracket.
d709e4e6 1343
517bb291 1344For older changes see ChangeLog-2012
08d56133 1345\f
517bb291 1346Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1347
1348Copying and distribution of this file, with or without modification,
1349are permitted in any medium without royalty provided the copyright
1350notice and this notice are preserved.
1351
08d56133
NC
1352Local Variables:
1353mode: change-log
1354left-margin: 8
1355fill-column: 74
1356version-control: never
1357End: