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12013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
4 values and use it instead of sreg, treg, xreg, etc.
5
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62013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
9 and mips_int_operand_max.
10 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
11 Delete.
12 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
13 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
14 instead of mips16_immed_operand.
15
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162013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
17
18 * config/tc-mips.c (mips16_macro): Don't use move_register.
19 (mips16_ip): Allow macros to use 'p'.
20
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212013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
22
23 * config/tc-mips.c (MAX_OPERANDS): New macro.
24 (mips_operand_array): New structure.
25 (mips_operands, mips16_operands, micromips_operands): New arrays.
26 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
27 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
28 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
29 (micromips_to_32_reg_q_map): Delete.
30 (insn_operands, insn_opno, insn_extract_operand): New functions.
31 (validate_mips_insn): Take a mips_operand_array as argument and
32 use it to build up a list of operands. Extend to handle INSN_MACRO
33 and MIPS16.
34 (validate_mips16_insn): New function.
35 (validate_micromips_insn): Take a mips_operand_array as argument.
36 Handle INSN_MACRO.
37 (md_begin): Initialize mips_operands, mips16_operands and
38 micromips_operands. Call validate_mips_insn and
39 validate_micromips_insn for macro instructions too.
40 Call validate_mips16_insn for MIPS16 instructions.
41 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
42 New functions.
43 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
44 them. Handle INSN_UDI.
45 (get_append_method): Use gpr_read_mask.
46
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472013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
50 flags for MIPS16 and non-MIPS16 instructions.
51 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
52 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
53 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
54 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
55 and non-MIPS16 instructions. Fix formatting.
56
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572013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * config/tc-mips.c (reg_needs_delay): Move later in file.
60 Use gpr_write_mask.
61 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
62
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632013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
64 Alexander Ivchenko <alexander.ivchenko@intel.com>
65 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
66 Sergey Lega <sergey.s.lega@intel.com>
67 Anna Tikhonova <anna.tikhonova@intel.com>
68 Ilya Tocar <ilya.tocar@intel.com>
69 Andrey Turetskiy <andrey.turetskiy@intel.com>
70 Ilya Verbin <ilya.verbin@intel.com>
71 Kirill Yukhin <kirill.yukhin@intel.com>
72 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
73
74 * config/tc-i386-intel.c (O_zmmword_ptr): New.
75 (i386_types): Add zmmword.
76 (i386_intel_simplify_register): Allow regzmm.
77 (i386_intel_simplify): Handle zmmwords.
78 (i386_intel_operand): Handle RC/SAE, vector operations and
79 zmmwords.
80 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
81 (struct RC_Operation): New.
82 (struct Mask_Operation): New.
83 (struct Broadcast_Operation): New.
84 (vex_prefix): Size of bytes increased to 4 to support EVEX
85 encoding.
86 (enum i386_error): Add new error codes: unsupported_broadcast,
87 broadcast_not_on_src_operand, broadcast_needed,
88 unsupported_masking, mask_not_on_destination, no_default_mask,
89 unsupported_rc_sae, rc_sae_operand_not_last_imm,
90 invalid_register_operand, try_vector_disp8.
91 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
92 rounding, broadcast, memshift.
93 (struct RC_name): New.
94 (RC_NamesTable): New.
95 (evexlig): New.
96 (evexwig): New.
97 (extra_symbol_chars): Add '{'.
98 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
99 (i386_operand_type): Add regzmm, regmask and vec_disp8.
100 (match_mem_size): Handle zmmwords.
101 (operand_type_match): Handle zmm-registers.
102 (mode_from_disp_size): Handle vec_disp8.
103 (fits_in_vec_disp8): New.
104 (md_begin): Handle {} properly.
105 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
106 (build_vex_prefix): Handle vrex.
107 (build_evex_prefix): New.
108 (process_immext): Adjust to properly handle EVEX.
109 (md_assemble): Add EVEX encoding support.
110 (swap_2_operands): Correctly handle operands with masking,
111 broadcasting or RC/SAE.
112 (check_VecOperands): Support EVEX features.
113 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
114 (match_template): Support regzmm and handle new error codes.
115 (process_suffix): Handle zmmwords and zmm-registers.
116 (check_byte_reg): Extend to zmm-registers.
117 (process_operands): Extend to zmm-registers.
118 (build_modrm_byte): Handle EVEX.
119 (output_insn): Adjust to properly handle EVEX case.
120 (disp_size): Handle vec_disp8.
121 (output_disp): Support compressed disp8*N evex feature.
122 (output_imm): Handle RC/SAE immediates properly.
123 (check_VecOperations): New.
124 (i386_immediate): Handle EVEX features.
125 (i386_index_check): Handle zmmwords and zmm-registers.
126 (RC_SAE_immediate): New.
127 (i386_att_operand): Handle EVEX features.
128 (parse_real_register): Add a check for ZMM/Mask registers.
129 (OPTION_MEVEXLIG): New.
130 (OPTION_MEVEXWIG): New.
131 (md_longopts): Add mevexlig and mevexwig.
132 (md_parse_option): Handle mevexlig and mevexwig options.
133 (md_show_usage): Add description for mevexlig and mevexwig.
134 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
135 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
136
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1372013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
138
139 * config/tc-i386.c (cpu_arch): Add .sha.
140 * doc/c-i386.texi: Document sha/.sha.
141
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1422013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
143 Kirill Yukhin <kirill.yukhin@intel.com>
144 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
145
146 * config/tc-i386.c (BND_PREFIX): New.
147 (struct _i386_insn): Add new field bnd_prefix.
148 (add_bnd_prefix): New.
149 (cpu_arch): Add MPX.
150 (i386_operand_type): Add regbnd.
151 (md_assemble): Handle BND prefixes.
152 (parse_insn): Likewise.
153 (output_branch): Likewise.
154 (output_jump): Likewise.
155 (build_modrm_byte): Handle regbnd.
156 (OPTION_MADD_BND_PREFIX): New.
157 (md_longopts): Add entry for 'madd-bnd-prefix'.
158 (md_parse_option): Handle madd-bnd-prefix option.
159 (md_show_usage): Add description for madd-bnd-prefix
160 option.
161 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
162
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1632013-07-24 Tristan Gingold <gingold@adacore.com>
164
165 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
166 xcoff targets.
167
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1682013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
169
170 * config/tc-s390.c (s390_machine): Don't force the .machine
171 argument to lower case.
172
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1732013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
174
175 * config/tc-arm.c (s_arm_arch_extension): Improve error message
176 for invalid extension.
177
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1782013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
179
180 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
181 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
182 (aarch64_abi): New variable.
183 (ilp32_p): Change to be a macro.
184 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
185 (struct aarch64_option_abi_value_table): New struct.
186 (aarch64_abis): New table.
187 (aarch64_parse_abi): New function.
188 (aarch64_long_opts): Add entry for -mabi=.
189 * doc/as.texinfo (Target AArch64 options): Document -mabi.
190 * doc/c-aarch64.texi: Likewise.
191
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1922013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
193
194 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
195 unsigned comparison.
196
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1972013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
198
199 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
200 RX610.
201 * config/rx-parse.y: (rx_check_float_support): Add function to
202 check floating point operation support for target RX100 and
203 RX200.
204 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
205 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
206 RX200, RX600, and RX610
207
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2082013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
209
210 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
211
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2122013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
213
214 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
215 * doc/c-avr.texi: Likewise.
216
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2172013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
218
219 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
220 error with older GCCs.
221 (mips16_macro_build): Dereference args.
222
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2232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
224
225 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
226 New functions, split out from...
227 (reg_lookup): ...here. Remove itbl support.
228 (reglist_lookup): Delete.
229 (mips_operand_token_type): New enum.
230 (mips_operand_token): New structure.
231 (mips_operand_tokens): New variable.
232 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
233 (mips_parse_arguments): New functions.
234 (md_begin): Initialize mips_operand_tokens.
235 (mips_arg_info): Add a token field. Remove optional_reg field.
236 (match_char, match_expression): New functions.
237 (match_const_int): Use match_expression. Remove "s" argument
238 and return a boolean result. Remove O_register handling.
239 (match_regno, match_reg, match_reg_range): New functions.
240 (match_int_operand, match_mapped_int_operand, match_msb_operand)
241 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
242 (match_addiusp_operand, match_clo_clz_dest_operand)
243 (match_lwm_swm_list_operand, match_entry_exit_operand)
244 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
245 (match_tied_reg_operand): Remove "s" argument and return a boolean
246 result. Match tokens rather than text. Update calls to
247 match_const_int. Rely on match_regno to call check_regno.
248 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
249 "arg" argument. Return a boolean result.
250 (parse_float_constant): Replace with...
251 (match_float_constant): ...this new function.
252 (match_operand): Remove "s" argument and return a boolean result.
253 Update calls to subfunctions.
254 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
255 rather than string-parsing routines. Update handling of optional
256 registers for token scheme.
257
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2582013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
259
260 * config/tc-mips.c (parse_float_constant): Split out from...
261 (mips_ip): ...here.
262
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2632013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
264
265 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
266 Delete.
267
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2682013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
271 (match_entry_exit_operand): New function.
272 (match_save_restore_list_operand): Likewise.
273 (match_operand): Use them.
274 (check_absolute_expr): Delete.
275 (mips16_ip): Rewrite main parsing loop to use mips_operands.
276
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2772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * config/tc-mips.c: Enable functions commented out in previous patch.
280 (SKIP_SPACE_TABS): Move further up file.
281 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
282 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
283 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
284 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
285 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
286 (micromips_imm_b_map, micromips_imm_c_map): Delete.
287 (mips_lookup_reg_pair): Delete.
288 (macro): Use report_bad_range and report_bad_field.
289 (mips_immed, expr_const_in_range): Delete.
290 (mips_ip): Rewrite main parsing loop to use new functions.
291
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2922013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
295 Change return type to bfd_boolean.
296 (report_bad_range, report_bad_field): New functions.
297 (mips_arg_info): New structure.
298 (match_const_int, convert_reg_type, check_regno, match_int_operand)
299 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
300 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
301 (match_addiusp_operand, match_clo_clz_dest_operand)
302 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
303 (match_pc_operand, match_tied_reg_operand, match_operand)
304 (check_completed_insn): New functions, commented out for now.
305
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3062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
307
308 * config/tc-mips.c (insn_insert_operand): New function.
309 (macro_build, mips16_macro_build): Put null character check
310 in the for loop and convert continues to breaks. Use operand
311 structures to handle constant operands.
312
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3132013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (validate_mips_insn): Move further up file.
316 Add insn_bits and decode_operand arguments. Use the mips_operand
317 fields to work out which bits an operand occupies. Detect double
318 definitions.
319 (validate_micromips_insn): Move further up file. Call into
320 validate_mips_insn.
321
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3222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
323
324 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
325
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3262013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
327
328 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
329 and "~".
330 (macro): Update accordingly.
331
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3322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
333
334 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
335 (imm_reloc): Delete.
336 (md_assemble): Remove imm_reloc handling.
337 (mips_ip): Update commentary. Use offset_expr and offset_reloc
338 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
339 Use a temporary array rather than imm_reloc when parsing
340 constant expressions. Remove imm_reloc initialization.
341 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
342 for the relaxable field. Use a relax_char variable to track the
343 type of this field. Remove imm_reloc initialization.
344
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3452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
346
347 * config/tc-mips.c (mips16_ip): Handle "I".
348
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3492013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
350
351 * config/tc-mips.c (mips_flag_nan2008): New variable.
352 (options): Add OPTION_NAN enum value.
353 (md_longopts): Handle it.
354 (md_parse_option): Likewise.
355 (s_nan): New function.
356 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
357 (md_show_usage): Add -mnan.
358
359 * doc/as.texinfo (Overview): Add -mnan.
360 * doc/c-mips.texi (MIPS Opts): Document -mnan.
361 (MIPS NaN Encodings): New node. Document .nan directive.
362 (MIPS-Dependent): List the new node.
363
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3642013-07-09 Tristan Gingold <gingold@adacore.com>
365
366 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
367
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3682013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
369
370 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
371 for 'A' and assume that the constant has been elided if the result
372 is an O_register.
373
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3742013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
375
376 * config/tc-mips.c (gprel16_reloc_p): New function.
377 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
378 BFD_RELOC_UNUSED.
379 (offset_high_part, small_offset_p): New functions.
380 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
381 register load and store macros, handle the 16-bit offset case first.
382 If a 16-bit offset is not suitable for the instruction we're
383 generating, load it into the temporary register using
384 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
385 M_L_DAB code once the address has been constructed. For double load
386 and store macros, again handle the 16-bit offset case first.
387 If the second register cannot be accessed from the same high
388 part as the first, load it into AT using ADDRESS_ADDI_INSN.
389 Fix the handling of LD in cases where the first register is the
390 same as the base. Also handle the case where the offset is
391 not 16 bits and the second register cannot be accessed from the
392 same high part as the first. For unaligned loads and stores,
393 fuse the offbits == 12 and old "ab" handling. Apply this handling
394 whenever the second offset needs a different high part from the first.
395 Construct the offset using ADDRESS_ADDI_INSN where possible,
396 for offbits == 16 as well as offbits == 12. Use offset_reloc
397 when constructing the individual loads and stores.
398 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
399 and offset_reloc before matching against a particular opcode.
400 Handle elided 'A' constants. Allow 'A' constants to use
401 relocation operators.
402
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4032013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
404
405 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
406 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
407 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
408
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4092013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
410
411 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
412 Require the msb to be <= 31 for "+s". Check that the size is <= 31
413 for both "+s" and "+S".
414
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4152013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
416
417 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
418 (mips_ip, mips16_ip): Handle "+i".
419
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4202013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
421
422 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
423 (micromips_to_32_reg_h_map): Rename to...
424 (micromips_to_32_reg_h_map1): ...this.
425 (micromips_to_32_reg_i_map): Rename to...
426 (micromips_to_32_reg_h_map2): ...this.
427 (mips_lookup_reg_pair): New function.
428 (gpr_write_mask, macro): Adjust after above renaming.
429 (validate_micromips_insn): Remove "mi" handling.
430 (mips_ip): Likewise. Parse both registers in a pair for "mh".
431
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4322013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
433
434 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
435 (mips_ip): Remove "+D" and "+T" handling.
436
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4372013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
438
439 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
440 relocs.
441
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4422013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
443
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444 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
445
4462013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
447
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448 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
449 (aarch64_force_relocation): Likewise.
450
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4512013-07-02 Alan Modra <amodra@gmail.com>
452
453 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
454
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4552013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
456
457 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
458 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
459 Replace @sc{mips16} with literal `MIPS16'.
460 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
461
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YZ
4622013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
463
464 * config/tc-aarch64.c (reloc_table): Replace
465 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
466 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
467 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
468 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
469 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
470 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
471 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
472 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
473 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
474 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
475 (aarch64_force_relocation): Likewise.
476
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YZ
4772013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
478
479 * config/tc-aarch64.c (ilp32_p): New static variable.
480 (elf64_aarch64_target_format): Return the target according to the
481 value of 'ilp32_p'.
482 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
483 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
484 (aarch64_dwarf2_addr_size): New function.
485 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
486 (DWARF2_ADDR_SIZE): New define.
487
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RS
4882013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
489
490 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
491
18870af7
RS
4922013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
493
494 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
495
833794fc
MR
4962013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
497
498 * config/tc-mips.c (mips_set_options): Add insn32 member.
499 (mips_opts): Initialize it.
500 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
501 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
502 (md_longopts): Add "minsn32" and "mno-insn32" options.
503 (is_size_valid): Handle insn32 mode.
504 (md_assemble): Pass instruction string down to macro.
505 (brk_fmt): Add second dimension and insn32 mode initializers.
506 (mfhl_fmt): Likewise.
507 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
508 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
509 (macro_build_jalr, move_register): Handle insn32 mode.
510 (macro_build_branch_rs): Likewise.
511 (macro): Handle insn32 mode.
512 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
513 (mips_ip): Handle insn32 mode.
514 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
515 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
516 (mips_handle_align): Handle insn32 mode.
517 (md_show_usage): Add -minsn32 and -mno-insn32.
518
519 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
520 -mno-insn32 options.
521 (-minsn32, -mno-insn32): New options.
522 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
523 options.
524 (MIPS assembly options): New node. Document .set insn32 and
525 .set noinsn32.
526 (MIPS-Dependent): List the new node.
527
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NC
5282013-06-25 Nick Clifton <nickc@redhat.com>
529
530 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
531 the PC in indirect addressing on 430xv2 parts.
532 (msp430_operands): Add version test to hardware bug encoding
533 restrictions.
534
477330fc
RM
5352013-06-24 Roland McGrath <mcgrathr@google.com>
536
d996d970
RM
537 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
538 so it skips whitespace before it.
539 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
540
477330fc
RM
541 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
542 (arm_reg_parse_multi): Skip whitespace first.
543 (parse_reg_list): Likewise.
544 (parse_vfp_reg_list): Likewise.
545 (s_arm_unwind_save_mmxwcg): Likewise.
546
24382199
NC
5472013-06-24 Nick Clifton <nickc@redhat.com>
548
549 PR gas/15623
550 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
551
c3678916
RS
5522013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
553
554 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
555
42429eac
RS
5562013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
557
558 * config/tc-mips.c: Assert that offsetT and valueT are at least
559 8 bytes in size.
560 (GPR_SMIN, GPR_SMAX): New macros.
561 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
562
f3ded42a
RS
5632013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
564
565 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
566 conditions. Remove any code deselected by them.
567 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
568
e8044f35
RS
5692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * NEWS: Note removal of ECOFF support.
572 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
573 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
574 (MULTI_CFILES): Remove config/e-mipsecoff.c.
575 * Makefile.in: Regenerate.
576 * configure.in: Remove MIPS ECOFF references.
577 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
578 Delete cases.
579 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
580 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
581 (mips-*-*): ...this single case.
582 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
583 MIPS emulations to be e-mipself*.
584 * configure: Regenerate.
585 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
586 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
587 (mips-*-sysv*): Remove coff and ecoff cases.
588 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
589 * ecoff.c: Remove reference to MIPS ECOFF.
590 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
591 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
592 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
593 (mips_hi_fixup): Tweak comment.
594 (append_insn): Require a howto.
595 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
596
98508b2a
RS
5972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
598
599 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
600 Use "CPU" instead of "cpu".
601 * doc/c-mips.texi: Likewise.
602 (MIPS Opts): Rename to MIPS Options.
603 (MIPS option stack): Rename to MIPS Option Stack.
604 (MIPS ASE instruction generation overrides): Rename to
605 MIPS ASE Instruction Generation Overrides (for now).
606 (MIPS floating-point): Rename to MIPS Floating-Point.
607
fc16f8cc
RS
6082013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
609
610 * doc/c-mips.texi (MIPS Macros): New section.
611 (MIPS Object): Replace with...
612 (MIPS Small Data): ...this new section.
613
5a7560b5
RS
6142013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
617 Capitalize name. Use @kindex instead of @cindex for .set entries.
618
a1b86ab7
RS
6192013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
620
621 * doc/c-mips.texi (MIPS Stabs): Remove section.
622
c6278170
RS
6232013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
624
625 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
626 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
627 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
628 (ISA_SUPPORTS_VIRT64_ASE): Delete.
629 (mips_ase): New structure.
630 (mips_ases): New table.
631 (FP64_ASES): New macro.
632 (mips_ase_groups): New array.
633 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
634 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
635 functions.
636 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
637 (md_parse_option): Use mips_ases and mips_set_ase instead of
638 separate case statements for each ASE option.
639 (mips_after_parse_args): Use FP64_ASES. Use
640 mips_check_isa_supports_ases to check the ASEs against
641 other options.
642 (s_mipsset): Use mips_ases and mips_set_ase instead of
643 separate if statements for each ASE option. Use
644 mips_check_isa_supports_ases, even when a non-ASE option
645 is specified.
646
63a4bc21
KT
6472013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
648
649 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
650
c31f3936
RS
6512013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
652
653 * config/tc-mips.c (md_shortopts, options, md_longopts)
654 (md_longopts_size): Move earlier in file.
655
846ef2d0
RS
6562013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
657
658 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
659 with a single "ase" bitmask.
660 (mips_opts): Update accordingly.
661 (file_ase, file_ase_explicit): New variables.
662 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
663 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
664 (ISA_HAS_ROR): Adjust for mips_set_options change.
665 (is_opcode_valid): Take the base ase mask directly from mips_opts.
666 (mips_ip): Adjust for mips_set_options change.
667 (md_parse_option): Likewise. Update file_ase_explicit.
668 (mips_after_parse_args): Adjust for mips_set_options change.
669 Use bitmask operations to select the default ASEs. Set file_ase
670 rather than individual per-ASE variables.
671 (s_mipsset): Adjust for mips_set_options change.
672 (mips_elf_final_processing): Test file_ase rather than
673 file_ase_mdmx. Remove commented-out code.
674
d16afab6
RS
6752013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
676
677 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
678 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
679 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
680 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
681 (mips_after_parse_args): Use the new "ase" field to choose
682 the default ASEs.
683 (mips_cpu_info_table): Move ASEs from the "flags" field to the
684 "ase" field.
685
e83a675f
RE
6862013-06-18 Richard Earnshaw <rearnsha@arm.com>
687
688 * config/tc-arm.c (symbol_preemptible): New function.
689 (relax_branch): Use it.
690
7f3c4072
CM
6912013-06-17 Catherine Moore <clm@codesourcery.com>
692 Maciej W. Rozycki <macro@codesourcery.com>
693 Chao-Ying Fu <fu@mips.com>
694
695 * config/tc-mips.c (mips_set_options): Add ase_eva.
696 (mips_set_options mips_opts): Add ase_eva.
697 (file_ase_eva): Declare.
698 (ISA_SUPPORTS_EVA_ASE): Define.
699 (IS_SEXT_9BIT_NUM): Define.
700 (MIPS_CPU_ASE_EVA): Define.
701 (is_opcode_valid): Add support for ase_eva.
702 (macro_build): Likewise.
703 (macro): Likewise.
704 (validate_mips_insn): Likewise.
705 (validate_micromips_insn): Likewise.
706 (mips_ip): Likewise.
707 (options): Add OPTION_EVA and OPTION_NO_EVA.
708 (md_longopts): Add -meva and -mno-eva.
709 (md_parse_option): Process new options.
710 (mips_after_parse_args): Check for valid EVA combinations.
711 (s_mipsset): Likewise.
712
e410add4
RS
7132013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
714
715 * dwarf2dbg.h (dwarf2_move_insn): Declare.
716 * dwarf2dbg.c (line_subseg): Add pmove_tail.
717 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
718 (dwarf2_gen_line_info_1): Update call accordingly.
719 (dwarf2_move_insn): New function.
720 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
721
6a50d470
RS
7222013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
723
724 Revert:
725
726 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
727
728 PR gas/13024
729 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
730 (dwarf2_gen_line_info_1): Delete.
731 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
732 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
733 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
734 (dwarf2_directive_loc): Push previous .locs instead of generating
735 them immediately.
736
f122319e
CF
7372013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
738
739 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
740 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
741
909c7f9c
NC
7422013-06-13 Nick Clifton <nickc@redhat.com>
743
744 PR gas/15602
745 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
746 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
747 function. Generates an error if the adjusted offset is out of a
748 16-bit range.
749
5d5755a7
SL
7502013-06-12 Sandra Loosemore <sandra@codesourcery.com>
751
752 * config/tc-nios2.c (md_apply_fix): Mask constant
753 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
754
3bf0dbfb
MR
7552013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
756
757 * config/tc-mips.c (append_insn): Don't do branch relaxation for
758 MIPS-3D instructions either.
759 (md_convert_frag): Update the COPx branch mask accordingly.
760
761 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
762 option.
763 * doc/as.texinfo (Overview): Add --relax-branch and
764 --no-relax-branch.
765 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
766 --no-relax-branch.
767
9daf7bab
SL
7682013-06-09 Sandra Loosemore <sandra@codesourcery.com>
769
770 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
771 omitted.
772
d301a56b
RS
7732013-06-08 Catherine Moore <clm@codesourcery.com>
774
775 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
776 (is_opcode_valid_16): Pass ase value to opcode_is_member.
777 (append_insn): Change INSN_xxxx to ASE_xxxx.
778
7bab7634
DC
7792013-06-01 George Thomas <george.thomas@atmel.com>
780
781 * gas/config/tc-avr.c: Change ISA for devices with USB support to
782 AVR_ISA_XMEGAU
783
f60cf82f
L
7842013-05-31 H.J. Lu <hongjiu.lu@intel.com>
785
786 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
787 for ELF.
788
a3f278e2
CM
7892013-05-31 Paul Brook <paul@codesourcery.com>
790
791 gas/
792 * config/tc-mips.c (s_ehword): New.
793
067ec077
CM
7942013-05-30 Paul Brook <paul@codesourcery.com>
795
796 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
797
d6101ac2
MR
7982013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
799
800 * write.c (resolve_reloc_expr_symbols): On REL targets don't
801 convert relocs who have no relocatable field either. Rephrase
802 the conditional so that the PC-relative check is only applied
803 for REL targets.
804
f19ccbda
MR
8052013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
806
807 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
808 calculation.
809
418009c2
YZ
8102013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
811
812 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 813 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
814 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
815 (md_apply_fix): Likewise.
816 (aarch64_force_relocation): Likewise.
817
0a8897c7
KT
8182013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
819
820 * config/tc-arm.c (it_fsm_post_encode): Improve
821 warning messages about deprecated IT block formats.
822
89d2a2a3
MS
8232013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
824
825 * config/tc-aarch64.c (md_apply_fix): Move value range checking
826 inside fx_done condition.
827
c77c0862
RS
8282013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
829
830 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
831
c0637f3a
PB
8322013-05-20 Peter Bergner <bergner@vnet.ibm.com>
833
834 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
835 and clean up warning when using PRINT_OPCODE_TABLE.
836
5656a981
AM
8372013-05-20 Alan Modra <amodra@gmail.com>
838
839 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
840 and data fixups performing shift/high adjust/sign extension on
841 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
842 when writing data fixups rather than recalculating size.
843
997b26e8
JBG
8442013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
845
846 * doc/c-msp430.texi: Fix typo.
847
9f6e76f4
TG
8482013-05-16 Tristan Gingold <gingold@adacore.com>
849
850 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
851 are also TOC symbols.
852
638d3803
NC
8532013-05-16 Nick Clifton <nickc@redhat.com>
854
855 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
856 Add -mcpu command to specify core type.
997b26e8 857 * doc/c-msp430.texi: Update documentation.
638d3803 858
b015e599
AP
8592013-05-09 Andrew Pinski <apinski@cavium.com>
860
861 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
862 (mips_opts): Update for the new field.
863 (file_ase_virt): New variable.
864 (ISA_SUPPORTS_VIRT_ASE): New macro.
865 (ISA_SUPPORTS_VIRT64_ASE): New macro.
866 (MIPS_CPU_ASE_VIRT): New define.
867 (is_opcode_valid): Handle ase_virt.
868 (macro_build): Handle "+J".
869 (validate_mips_insn): Likewise.
870 (mips_ip): Likewise.
871 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
872 (md_longopts): Add mvirt and mnovirt
873 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
874 (mips_after_parse_args): Handle ase_virt field.
875 (s_mipsset): Handle "virt" and "novirt".
876 (mips_elf_final_processing): Add a comment about virt ASE might need
877 a new flag.
878 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
879 * doc/c-mips.texi: Document -mvirt and -mno-virt.
880 Document ".set virt" and ".set novirt".
881
da8094d7
AM
8822013-05-09 Alan Modra <amodra@gmail.com>
883
884 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
885 control of operand flag bits.
886
c5f8c205
AM
8872013-05-07 Alan Modra <amodra@gmail.com>
888
889 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
890 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
891 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
892 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
893 (md_apply_fix): Set fx_no_overflow for assorted relocations.
894 Shift and sign-extend fieldval for use by some VLE reloc
895 operand->insert functions.
896
b47468a6
CM
8972013-05-06 Paul Brook <paul@codesourcery.com>
898 Catherine Moore <clm@codesourcery.com>
899
c5f8c205
AM
900 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
901 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
902 (md_apply_fix): Likewise.
903 (tc_gen_reloc): Likewise.
904
2de39019
CM
9052013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
906
907 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
908 (mips_fix_adjustable): Adjust pc-relative check to use
909 limited_pc_reloc_p.
910
754e2bb9
RS
9112013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
914 (s_mips_stab): Do not restrict to stabn only.
915
13761a11
NC
9162013-05-02 Nick Clifton <nickc@redhat.com>
917
918 * config/tc-msp430.c: Add support for the MSP430X architecture.
919 Add code to insert a NOP instruction after any instruction that
920 might change the interrupt state.
921 Add support for the LARGE memory model.
922 Add code to initialise the .MSP430.attributes section.
923 * config/tc-msp430.h: Add support for the MSP430X architecture.
924 * doc/c-msp430.texi: Document the new -mL and -mN command line
925 options.
926 * NEWS: Mention support for the MSP430X architecture.
927
df26367c
MR
9282013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
929
930 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
931 alpha*-*-linux*ecoff*.
932
f02d8318
CF
9332013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
934
935 * config/tc-mips.c (mips_ip): Add sizelo.
936 For "+C", "+G", and "+H", set sizelo and compare against it.
937
b40bf0a2
NC
9382013-04-29 Nick Clifton <nickc@redhat.com>
939
940 * as.c (Options): Add -gdwarf-sections.
941 (parse_args): Likewise.
942 * as.h (flag_dwarf_sections): Declare.
943 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
944 (process_entries): When -gdwarf-sections is enabled generate
945 fragmentary .debug_line sections.
946 (out_debug_line): Set the section for the .debug_line section end
947 symbol.
948 * doc/as.texinfo: Document -gdwarf-sections.
949 * NEWS: Mention -gdwarf-sections.
950
8eeccb77 9512013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
952
953 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
954 according to the target parameter. Don't call s_segm since s_segm
955 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
956 initialized yet.
957 (md_begin): Call s_segm according to target parameter from command
958 line.
959
49926cd0
AM
9602013-04-25 Alan Modra <amodra@gmail.com>
961
962 * configure.in: Allow little-endian linux.
963 * configure: Regenerate.
964
e3031850
SL
9652013-04-24 Sandra Loosemore <sandra@codesourcery.com>
966
967 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
968 "fstatus" control register to "eccinj".
969
cb948fc0
KT
9702013-04-19 Kai Tietz <ktietz@redhat.com>
971
972 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
973
4455e9ad
JB
9742013-04-15 Julian Brown <julian@codesourcery.com>
975
976 * expr.c (add_to_result, subtract_from_result): Make global.
977 * expr.h (add_to_result, subtract_from_result): Add prototypes.
978 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
979 subtract_from_result to handle extra bit of precision for .sleb128
980 directive operands.
981
956a6ba3
JB
9822013-04-10 Julian Brown <julian@codesourcery.com>
983
984 * read.c (convert_to_bignum): Add sign parameter. Use it
985 instead of X_unsigned to determine sign of resulting bignum.
986 (emit_expr): Pass extra argument to convert_to_bignum.
987 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
988 X_extrabit to convert_to_bignum.
989 (parse_bitfield_cons): Set X_extrabit.
990 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
991 Initialise X_extrabit field as appropriate.
992 (add_to_result): New.
993 (subtract_from_result): New.
994 (expr): Use above.
995 * expr.h (expressionS): Add X_extrabit field.
996
eb9f3f00
JB
9972013-04-10 Jan Beulich <jbeulich@suse.com>
998
999 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1000 register being PC when is_t or writeback, and use distinct
1001 diagnostic for the latter case.
1002
ccb84d65
JB
10032013-04-10 Jan Beulich <jbeulich@suse.com>
1004
1005 * gas/config/tc-arm.c (parse_operands): Re-write
1006 po_barrier_or_imm().
1007 (do_barrier): Remove bogus constraint().
1008 (do_t_barrier): Remove.
1009
4d13caa0
NC
10102013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1011
1012 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1013 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1014 ATmega2564RFR2
1015 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1016
16d02dc9
JB
10172013-04-09 Jan Beulich <jbeulich@suse.com>
1018
1019 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1020 Use local variable Rt in more places.
1021 (do_vmsr): Accept all control registers.
1022
05ac0ffb
JB
10232013-04-09 Jan Beulich <jbeulich@suse.com>
1024
1025 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1026 if there was none specified for moves between scalar and core
1027 register.
1028
2d51fb74
JB
10292013-04-09 Jan Beulich <jbeulich@suse.com>
1030
1031 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1032 NEON_ALL_LANES case.
1033
94dcf8bf
JB
10342013-04-08 Jan Beulich <jbeulich@suse.com>
1035
1036 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1037 PC-relative VSTR.
1038
1472d06f
JB
10392013-04-08 Jan Beulich <jbeulich@suse.com>
1040
1041 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1042 entry to sp_fiq.
1043
0c76cae8
AM
10442013-04-03 Alan Modra <amodra@gmail.com>
1045
1046 * doc/as.texinfo: Add support to generate man options for h8300.
1047 * doc/c-h8300.texi: Likewise.
1048
92eb40d9
RR
10492013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1050
1051 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1052 Cortex-A57.
1053
51dcdd4d
NC
10542013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1055
1056 PR binutils/15068
1057 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1058
c5d685bf
NC
10592013-03-26 Nick Clifton <nickc@redhat.com>
1060
9b978282
NC
1061 PR gas/15295
1062 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1063 start of the file each time.
1064
c5d685bf
NC
1065 PR gas/15178
1066 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1067 FreeBSD targets.
1068
9699c833
TG
10692013-03-26 Douglas B Rupp <rupp@gnat.com>
1070
1071 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1072 after fixup.
1073
4755303e
WN
10742013-03-21 Will Newton <will.newton@linaro.org>
1075
1076 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1077 pc-relative str instructions in Thumb mode.
1078
81f5558e
NC
10792013-03-21 Michael Schewe <michael.schewe@gmx.net>
1080
1081 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1082 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1083 R_H8_DISP32A16.
1084 * config/tc-h8300.h: Remove duplicated defines.
1085
71863e73
NC
10862013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1087
1088 PR gas/15282
1089 * tc-avr.c (mcu_has_3_byte_pc): New function.
1090 (tc_cfi_frame_initial_instructions): Call it to find return
1091 address size.
1092
795b8e6b
NC
10932013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1094
1095 PR gas/15095
1096 * config/tc-tic6x.c (tic6x_try_encode): Handle
1097 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1098 encode register pair numbers when required.
1099
ba86b375
WN
11002013-03-15 Will Newton <will.newton@linaro.org>
1101
1102 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1103 in vstr in Thumb mode for pre-ARMv7 cores.
1104
9e6f3811
AS
11052013-03-14 Andreas Schwab <schwab@suse.de>
1106
1107 * doc/c-arc.texi (ARC Directives): Revert last change and use
1108 @itemize instead of @table.
1109 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1110
b10bf8c5
NC
11112013-03-14 Nick Clifton <nickc@redhat.com>
1112
1113 PR gas/15273
1114 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1115 NULL message, instead just check ARM_CPU_IS_ANY directly.
1116
ba724cfc
NC
11172013-03-14 Nick Clifton <nickc@redhat.com>
1118
1119 PR gas/15212
9e6f3811 1120 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1121 for table format.
1122 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1123 to the @item directives.
1124 (ARM-Neon-Alignment): Move to correct place in the document.
1125 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1126 formatting.
1127 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1128 @smallexample.
1129
531a94fd
SL
11302013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1131
1132 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1133 case. Add default BAD_CASE to switch.
1134
dad60f8e
SL
11352013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1136
1137 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1138 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1139
dd5181d5
KT
11402013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1141
1142 * config/tc-arm.c (crc_ext_armv8): New feature set.
1143 (UNPRED_REG): New macro.
1144 (do_crc32_1): New function.
1145 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1146 do_crc32ch, do_crc32cw): Likewise.
1147 (TUEc): New macro.
1148 (insns): Add entries for crc32 mnemonics.
1149 (arm_extensions): Add entry for crc.
1150
8e723a10
CLT
11512013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1152
1153 * write.h (struct fix): Add fx_dot_frag field.
1154 (dot_frag): Declare.
1155 * write.c (dot_frag): New variable.
1156 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1157 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1158 * expr.c (expr): Save value of frag_now in dot_frag when setting
1159 dot_value.
1160 * read.c (emit_expr): Likewise. Delete comments.
1161
be05d201
L
11622013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1163
1164 * config/tc-i386.c (flag_code_names): Removed.
1165 (i386_index_check): Rewrote.
1166
62b0d0d5
YZ
11672013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1168
1169 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1170 add comment.
1171 (aarch64_double_precision_fmovable): New function.
1172 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1173 function; handle hexadecimal representation of IEEE754 encoding.
1174 (parse_operands): Update the call to parse_aarch64_imm_float.
1175
165de32a
L
11762013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1177
1178 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1179 (check_hle): Updated.
1180 (md_assemble): Likewise.
1181 (parse_insn): Likewise.
1182
d5de92cf
L
11832013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1184
1185 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1186 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1187 (parse_insn): Remove expecting_string_instruction. Set
1188 i.rep_prefix.
1189
e60bb1dd
YZ
11902013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1191
1192 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1193
aeebdd9b
YZ
11942013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1195
1196 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1197 for system registers.
1198
4107ae22
DD
11992013-02-27 DJ Delorie <dj@redhat.com>
1200
1201 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1202 (rl78_op): Handle %code().
1203 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1204 (tc_gen_reloc): Likwise; convert to a computed reloc.
1205 (md_apply_fix): Likewise.
1206
151fa98f
NC
12072013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1208
1209 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1210
70a8bc5b 12112013-02-25 Terry Guo <terry.guo@arm.com>
1212
1213 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1214 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1215 list of accepted CPUs.
1216
5c111e37
L
12172013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1218
1219 PR gas/15159
1220 * config/tc-i386.c (cpu_arch): Add ".smap".
1221
1222 * doc/c-i386.texi: Document smap.
1223
8a75745d
MR
12242013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1225
1226 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1227 mips_assembling_insn appropriately.
1228 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1229
79850f26
MR
12302013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1231
cf29fc61 1232 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1233 extraneous braces.
1234
4c261dff
NC
12352013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1236
5c111e37 1237 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1238
ea33f281
NC
12392013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1240
1241 * configure.tgt: Add nios2-*-rtems*.
1242
a1ccaec9
YZ
12432013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1244
1245 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1246 NULL.
1247
0aa27725
RS
12482013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1249
1250 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1251 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1252
da4339ed
NC
12532013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1254
1255 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1256 core.
1257
36591ba1 12582013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1259 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1260
1261 Based on patches from Altera Corporation.
1262
1263 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1264 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1265 * Makefile.in: Regenerated.
1266 * configure.tgt: Add case for nios2*-linux*.
1267 * config/obj-elf.c: Conditionally include elf/nios2.h.
1268 * config/tc-nios2.c: New file.
1269 * config/tc-nios2.h: New file.
1270 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1271 * doc/Makefile.in: Regenerated.
1272 * doc/all.texi: Set NIOSII.
1273 * doc/as.texinfo (Overview): Add Nios II options.
1274 (Machine Dependencies): Include c-nios2.texi.
1275 * doc/c-nios2.texi: New file.
1276 * NEWS: Note Altera Nios II support.
1277
94d4433a
AM
12782013-02-06 Alan Modra <amodra@gmail.com>
1279
1280 PR gas/14255
1281 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1282 Don't skip fixups with fx_subsy non-NULL.
1283 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1284 with fx_subsy non-NULL.
1285
ace9af6f
L
12862013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1287
1288 * doc/c-metag.texi: Add "@c man" markers.
1289
89d67ed9
AM
12902013-02-04 Alan Modra <amodra@gmail.com>
1291
1292 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1293 related code.
1294 (TC_ADJUST_RELOC_COUNT): Delete.
1295 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1296
89072bd6
AM
12972013-02-04 Alan Modra <amodra@gmail.com>
1298
1299 * po/POTFILES.in: Regenerate.
1300
f9b2d544
NC
13012013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1302
1303 * config/tc-metag.c: Make SWAP instruction less permissive with
1304 its operands.
1305
392ca752
DD
13062013-01-29 DJ Delorie <dj@redhat.com>
1307
1308 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1309 relocs in .word/.etc statements.
1310
427d0db6
RM
13112013-01-29 Roland McGrath <mcgrathr@google.com>
1312
1313 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1314 immediate value for 8-bit offset" error so it shows line info.
1315
4faf939a
JM
13162013-01-24 Joseph Myers <joseph@codesourcery.com>
1317
1318 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1319 for 64-bit output.
1320
78c8d46c
NC
13212013-01-24 Nick Clifton <nickc@redhat.com>
1322
1323 * config/tc-v850.c: Add support for e3v5 architecture.
1324 * doc/c-v850.texi: Mention new support.
1325
fb5b7503
NC
13262013-01-23 Nick Clifton <nickc@redhat.com>
1327
1328 PR gas/15039
1329 * config/tc-avr.c: Include dwarf2dbg.h.
1330
8ce3d284
L
13312013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1332
1333 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1334 (tc_i386_fix_adjustable): Likewise.
1335 (lex_got): Likewise.
1336 (tc_gen_reloc): Likewise.
1337
f5555712
YZ
13382013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1339
1340 * config/tc-aarch64.c (output_operand_error_record): Change to output
1341 the out-of-range error message as value-expected message if there is
1342 only one single value in the expected range.
1343 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1344 LSL #0 as a programmer-friendly feature.
1345
8fd4256d
L
13462013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1347
1348 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1349 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1350 BFD_RELOC_64_SIZE relocations.
1351 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1352 for it.
1353 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1354 relocations against local symbols.
1355
a5840dce
AM
13562013-01-16 Alan Modra <amodra@gmail.com>
1357
1358 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1359 finding some sort of toc syntax error, and break to avoid
1360 compiler uninit warning.
1361
af89796a
L
13622013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1363
1364 PR gas/15019
1365 * config/tc-i386.c (lex_got): Increment length by 1 if the
1366 relocation token is removed.
1367
dd42f060
NC
13682013-01-15 Nick Clifton <nickc@redhat.com>
1369
1370 * config/tc-v850.c (md_assemble): Allow signed values for
1371 V850E_IMMEDIATE.
1372
464e3686
SK
13732013-01-11 Sean Keys <skeys@ipdatasys.com>
1374
1375 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1376 git to cvs.
464e3686 1377
5817ffd1
PB
13782013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1379
1380 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1381 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1382 * config/tc-ppc.c (md_show_usage): Likewise.
1383 (ppc_handle_align): Handle power8's group ending nop.
1384
f4b1f6a9
SK
13852013-01-10 Sean Keys <skeys@ipdatasys.com>
1386
1387 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1388 that the assember exits after the opcodes have been printed.
f4b1f6a9 1389
34bca508
L
13902013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1391
1392 * app.c: Remove trailing white spaces.
1393 * as.c: Likewise.
1394 * as.h: Likewise.
1395 * cond.c: Likewise.
1396 * dw2gencfi.c: Likewise.
1397 * dwarf2dbg.h: Likewise.
1398 * ecoff.c: Likewise.
1399 * input-file.c: Likewise.
1400 * itbl-lex.h: Likewise.
1401 * output-file.c: Likewise.
1402 * read.c: Likewise.
1403 * sb.c: Likewise.
1404 * subsegs.c: Likewise.
1405 * symbols.c: Likewise.
1406 * write.c: Likewise.
1407 * config/tc-i386.c: Likewise.
1408 * doc/Makefile.am: Likewise.
1409 * doc/Makefile.in: Likewise.
1410 * doc/c-aarch64.texi: Likewise.
1411 * doc/c-alpha.texi: Likewise.
1412 * doc/c-arc.texi: Likewise.
1413 * doc/c-arm.texi: Likewise.
1414 * doc/c-avr.texi: Likewise.
1415 * doc/c-bfin.texi: Likewise.
1416 * doc/c-cr16.texi: Likewise.
1417 * doc/c-d10v.texi: Likewise.
1418 * doc/c-d30v.texi: Likewise.
1419 * doc/c-h8300.texi: Likewise.
1420 * doc/c-hppa.texi: Likewise.
1421 * doc/c-i370.texi: Likewise.
1422 * doc/c-i386.texi: Likewise.
1423 * doc/c-i860.texi: Likewise.
1424 * doc/c-m32c.texi: Likewise.
1425 * doc/c-m32r.texi: Likewise.
1426 * doc/c-m68hc11.texi: Likewise.
1427 * doc/c-m68k.texi: Likewise.
1428 * doc/c-microblaze.texi: Likewise.
1429 * doc/c-mips.texi: Likewise.
1430 * doc/c-msp430.texi: Likewise.
1431 * doc/c-mt.texi: Likewise.
1432 * doc/c-s390.texi: Likewise.
1433 * doc/c-score.texi: Likewise.
1434 * doc/c-sh.texi: Likewise.
1435 * doc/c-sh64.texi: Likewise.
1436 * doc/c-tic54x.texi: Likewise.
1437 * doc/c-tic6x.texi: Likewise.
1438 * doc/c-v850.texi: Likewise.
1439 * doc/c-xc16x.texi: Likewise.
1440 * doc/c-xgate.texi: Likewise.
1441 * doc/c-xtensa.texi: Likewise.
1442 * doc/c-z80.texi: Likewise.
1443 * doc/internals.texi: Likewise.
1444
4c665b71
RM
14452013-01-10 Roland McGrath <mcgrathr@google.com>
1446
1447 * hash.c (hash_new_sized): Make it global.
1448 * hash.h: Declare it.
1449 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1450 pass a small size.
1451
a3c62988
NC
14522013-01-10 Will Newton <will.newton@imgtec.com>
1453
1454 * Makefile.am: Add Meta.
1455 * Makefile.in: Regenerate.
1456 * config/tc-metag.c: New file.
1457 * config/tc-metag.h: New file.
1458 * configure.tgt: Add Meta.
1459 * doc/Makefile.am: Add Meta.
1460 * doc/Makefile.in: Regenerate.
1461 * doc/all.texi: Add Meta.
1462 * doc/as.texiinfo: Document Meta options.
1463 * doc/c-metag.texi: New file.
1464
b37df7c4
SE
14652013-01-09 Steve Ellcey <sellcey@mips.com>
1466
1467 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1468 calls.
1469 * config/tc-mips.c (internalError): Remove, replace with abort.
1470
a3251895
YZ
14712013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1472
1473 * config/tc-aarch64.c (parse_operands): Change to compare the result
1474 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1475
8ab8155f
NC
14762013-01-07 Nick Clifton <nickc@redhat.com>
1477
1478 PR gas/14887
1479 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1480 anticipated character.
1481 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1482 here as it is no longer needed.
1483
a4ac1c42
AS
14842013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1485
1486 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1487 * doc/c-score.texi (SCORE-Opts): Likewise.
1488 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1489
e407c74b
NC
14902013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1491
1492 * config/tc-mips.c: Add support for MIPS r5900.
1493 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1494 lq and sq.
1495 (can_swap_branch_p, get_append_method): Detect some conditional
1496 short loops to fix a bug on the r5900 by NOP in the branch delay
1497 slot.
1498 (M_MUL): Support 3 operands in multu on r5900.
1499 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1500 (s_mipsset): Force 32 bit floating point on r5900.
1501 (mips_ip): Check parameter range of instructions mfps and mtps on
1502 r5900.
1503 * configure.in: Detect CPU type when target string contains r5900
1504 (e.g. mips64r5900el-linux-gnu).
1505
62658407
L
15062013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1507
1508 * as.c (parse_args): Update copyright year to 2013.
1509
95830fd1
YZ
15102013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1511
1512 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1513 and "cortex57".
1514
517bb291 15152013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1516
517bb291
NC
1517 PR gas/14987
1518 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1519 closing bracket.
d709e4e6 1520
517bb291 1521For older changes see ChangeLog-2012
08d56133 1522\f
517bb291 1523Copyright (C) 2013 Free Software Foundation, Inc.
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1524
1525Copying and distribution of this file, with or without modification,
1526are permitted in any medium without royalty provided the copyright
1527notice and this notice are preserved.
1528
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1529Local Variables:
1530mode: change-log
1531left-margin: 8
1532fill-column: 74
1533version-control: never
1534End: