]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
gdb/
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ae335a4e
SL
12013-10-13 Sandra Loosemore <sandra@codesourcery.com>
2
3 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
4 also test/refer to "sstatus". Reformat the warning message.
5
0e1c2434
SK
62013-10-10 Sean Keys <skeys@ipdatasys.com>
7
8 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
9
47cd3fa7
JB
102013-10-10 Jan Beulich <jbeulich@suse.com>
11
12 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
13 swapping for bndmk, bndldx, and bndstx.
14
6085f853
NC
152013-10-09 Nick Clifton <nickc@redhat.com>
16
b7b2bb1d
NC
17 PR gas/16025
18 * config/tc-epiphany.c (md_convert_frag): Add missing break
19 statement.
20
6085f853
NC
21 PR gas/16026
22 * config/tc-mn10200.c (md_convert_frag): Add missing break
23 statement.
24
cecf1424
JB
252013-10-08 Jan Beulich <jbeulich@suse.com>
26
27 * tc-i386.c (check_word_reg): Remove misplaced "else".
28 (check_long_reg): Restore symmetry with check_word_reg.
29
d3bfe16e
JB
302013-10-08 Jan Beulich <jbeulich@suse.com>
31
32 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
33 LR/PC check.
34
38d77545
NC
352013-10-08 Nick Clifton <nickc@redhat.com>
36
37 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
38 for "<foo>a". Issue error messages for unrecognised or corrrupt
39 size extensions.
40
fe8b4cc3
KT
412013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
42
43 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
44 possible.
45
c7b0bd56
SE
462013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
47
48 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
49 * doc/c-i386.texi: Add -march=bdver4 option.
50
cc9afea3
AM
512013-09-20 Alan Modra <amodra@gmail.com>
52
53 * configure: Regenerate.
54
58ca03a2
TG
552013-09-18 Tristan Gingold <gingold@adacore.com>
56
57 * NEWS: Add marker for 2.24.
58
ab905915
NC
592013-09-18 Nick Clifton <nickc@redhat.com>
60
61 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
62 (move_data): New variable.
63 (md_parse_option): Parse -md.
64 (msp430_section): New function. Catch references to the .bss or
65 .data sections and generate a special symbol for use by the libcrt
66 library.
67 (md_pseudo_table): Intercept .section directives.
68 (md_longopt): Add -md
69 (md_show_usage): Likewise.
70 (msp430_operands): Generate a warning message if a NOP is inserted
71 into the instruction stream.
72 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
73
f1c38003
SE
742013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
75
76 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 77 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 78
1d50d57c
WN
792013-09-16 Will Newton <will.newton@linaro.org>
80
81 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
82 disallowing element size 64 with interleave other than 1.
83
173d3447
CF
842013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
85
86 * config/tc-mips.c (match_insn): Set error when $31 is used for
87 bltzal* and bgezal*.
88
ac21e7da
TG
892013-09-04 Tristan Gingold <gingold@adacore.com>
90
91 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
92 symbols.
93
74db7efb
NC
942013-09-04 Roland McGrath <mcgrathr@google.com>
95
96 PR gas/15914
97 * config/tc-arm.c (T16_32_TAB): Add _udf.
98 (do_t_udf): New function.
99 (insns): Add "udf".
100
664a88c6
DD
1012013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
102
103 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
104 assembler errors at correct position.
105
9aff4b7a
NC
1062013-08-23 Yuri Chornoivan <yurchor@ukr.net>
107
108 PR binutils/15834
109 * config/tc-ia64.c: Fix typos.
110 * config/tc-sparc.c: Likewise.
111 * config/tc-z80.c: Likewise.
112 * doc/c-i386.texi: Likewise.
113 * doc/c-m32r.texi: Likewise.
114
4f2374c7
WN
1152013-08-23 Will Newton <will.newton@linaro.org>
116
9aff4b7a 117 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
118 for pre-indexed addressing modes.
119
b4e6cb80
AM
1202013-08-21 Alan Modra <amodra@gmail.com>
121
122 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
123 range check label number for use with fb_low_counter array.
124
1661c76c
RS
1252013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
128 (mips_parse_argument_token, validate_micromips_insn, md_begin)
129 (check_regno, match_float_constant, check_completed_insn, append_insn)
130 (match_insn, match_mips16_insn, match_insns, macro_start)
131 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
132 (mips16_ip, mips_set_option_string, md_parse_option)
133 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
134 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
135 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
136 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
137 Start error messages with a lower-case letter. Do not end error
138 messages with a period. Wrap long messages to 80 character-lines.
139 Use "cannot" instead of "can't" and "can not".
140
b0e6f033
RS
1412013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c (imm_expr): Expand comment.
144 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
145 when populated.
146
e423441d
RS
1472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * config/tc-mips.c (imm2_expr): Delete.
150 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
151
5e0dc5ba
RS
1522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
155 (macro): Remove M_DEXT and M_DINS handling.
156
60f20e8b
RS
1572013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
158
159 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
160 lax_max with lax_match.
161 (match_int_operand): Update accordingly. Don't report an error
162 for !lax_match-only cases.
163 (match_insn): Replace more_alts with lax_match and use it to
164 initialize the mips_arg_info field. Add a complete_p parameter.
165 Handle implicit VU0 suffixes here.
166 (match_invalid_for_isa, match_insns, match_mips16_insns): New
167 functions.
168 (mips_ip, mips16_ip): Use them.
169
d436c1c2
RS
1702013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
171
172 * config/tc-mips.c (match_expression): Report uses of registers here.
173 Add a "must be an immediate expression" error. Handle elided offsets
174 here rather than...
175 (match_int_operand): ...here.
176
1a00e612
RS
1772013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
178
179 * config/tc-mips.c (mips_arg_info): Remove soft_match.
180 (match_out_of_range, match_not_constant): New functions.
181 (match_const_int): Remove fallback parameter and check for soft_match.
182 Use match_not_constant.
183 (match_mapped_int_operand, match_addiusp_operand)
184 (match_perf_reg_operand, match_save_restore_list_operand)
185 (match_mdmx_imm_reg_operand): Update accordingly. Use
186 match_out_of_range and set_insn_error* instead of as_bad.
187 (match_int_operand): Likewise. Use match_not_constant in the
188 !allows_nonconst case.
189 (match_float_constant): Report invalid float constants.
190 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
191 match_float_constant to check for invalid constants. Fail the
192 match if match_const_int or match_float_constant return false.
193 (mips_ip): Update accordingly.
194 (mips16_ip): Likewise. Undo null termination of instruction name
195 once lookup is complete.
196
e3de51ce
RS
1972013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
198
199 * config/tc-mips.c (mips_insn_error_format): New enum.
200 (mips_insn_error): New struct.
201 (insn_error): Change to a mips_insn_error.
202 (clear_insn_error, set_insn_error_format, set_insn_error)
203 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
204 functions.
205 (mips_parse_argument_token, md_assemble, match_insn)
206 (match_mips16_insn): Use them instead of manipulating insn_error
207 directly.
208 (mips_ip, mips16_ip): Likewise. Simplify control flow.
209
97d87491
RS
2102013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
211
212 * config/tc-mips.c (normalize_constant_expr): Move further up file.
213 (normalize_address_expr): Likewise.
214 (match_insn, match_mips16_insn): New functions, split out from...
215 (mips_ip, mips16_ip): ...here.
216
0f35dbc4
RS
2172013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
218
219 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
220 OP_OPTIONAL_REG.
221 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
222 for optional operands.
223
27285eed
AM
2242013-08-16 Alan Modra <amodra@gmail.com>
225
226 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
227 modifiers generally.
228
cbe02d4f
AM
2292013-08-16 Alan Modra <amodra@gmail.com>
230
231 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
232
3c02c47f
DE
2332013-08-14 David Edelsohn <dje.gcc@gmail.com>
234
235 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
236 argument as alignment.
237
4046d87a
NC
2382013-08-09 Nick Clifton <nickc@redhat.com>
239
240 * config/tc-rl78.c (elf_flags): New variable.
241 (enum options): Add OPTION_G10.
242 (md_longopts): Add mg10.
243 (md_parse_option): Parse -mg10.
244 (rl78_elf_final_processing): New function.
245 * config/tc-rl78.c (tc_final_processing): Define.
246 * doc/c-rl78.texi: Document -mg10 option.
247
ee5734f0
RS
2482013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
249
250 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
251 suffixes to be elided too.
252 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
253 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
254 to be omitted too.
255
13896403
RS
2562013-08-05 John Tytgat <john@bass-software.com>
257
258 * po/POTFILES.in: Regenerate.
259
d6787ef9
EB
2602013-08-05 Eric Botcazou <ebotcazou@adacore.com>
261 Konrad Eisele <konrad@gaisler.com>
262
263 * config/tc-sparc.c (sparc_arch_types): Add leon.
264 (sparc_arch): Move sparc4 around and add leon.
265 (sparc_target_format): Document -Aleon.
266 * doc/c-sparc.texi: Likewise.
267
da8bca91
RS
2682013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
271
14daeee3
RS
2722013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
273 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
276 (RWARN): Bump to 0x8000000.
277 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
278 (RTYPE_R5900_ACC): New register types.
279 (RTYPE_MASK): Include them.
280 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
281 macros.
282 (reg_names): Include them.
283 (mips_parse_register_1): New function, split out from...
284 (mips_parse_register): ...here. Add a channels_ptr parameter.
285 Look for VU0 channel suffixes when nonnull.
286 (reg_lookup): Update the call to mips_parse_register.
287 (mips_parse_vu0_channels): New function.
288 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
289 (mips_operand_token): Add a "channels" field to the union.
290 Extend the comment above "ch" to OT_DOUBLE_CHAR.
291 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
292 (mips_parse_argument_token): Handle channel suffixes here too.
293 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
294 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
295 Handle '#' formats.
296 (md_begin): Register $vfN and $vfI registers.
297 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
298 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
299 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
300 (match_vu0_suffix_operand): New function.
301 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
302 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
303 (mips_lookup_insn): New function.
304 (mips_ip): Use it. Allow "+K" operands to be elided at the end
305 of an instruction. Handle '#' sequences.
306
c0ebe874
RS
3072013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
308
309 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
310 values and use it instead of sreg, treg, xreg, etc.
311
3ccad066
RS
3122013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
313
314 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
315 and mips_int_operand_max.
316 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
317 Delete.
318 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
319 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
320 instead of mips16_immed_operand.
321
0acfaea6
RS
3222013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
323
324 * config/tc-mips.c (mips16_macro): Don't use move_register.
325 (mips16_ip): Allow macros to use 'p'.
326
fc76e730
RS
3272013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
328
329 * config/tc-mips.c (MAX_OPERANDS): New macro.
330 (mips_operand_array): New structure.
331 (mips_operands, mips16_operands, micromips_operands): New arrays.
332 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
333 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
334 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
335 (micromips_to_32_reg_q_map): Delete.
336 (insn_operands, insn_opno, insn_extract_operand): New functions.
337 (validate_mips_insn): Take a mips_operand_array as argument and
338 use it to build up a list of operands. Extend to handle INSN_MACRO
339 and MIPS16.
340 (validate_mips16_insn): New function.
341 (validate_micromips_insn): Take a mips_operand_array as argument.
342 Handle INSN_MACRO.
343 (md_begin): Initialize mips_operands, mips16_operands and
344 micromips_operands. Call validate_mips_insn and
345 validate_micromips_insn for macro instructions too.
346 Call validate_mips16_insn for MIPS16 instructions.
347 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
348 New functions.
349 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
350 them. Handle INSN_UDI.
351 (get_append_method): Use gpr_read_mask.
352
26545944
RS
3532013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
354
355 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
356 flags for MIPS16 and non-MIPS16 instructions.
357 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
358 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
359 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
360 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
361 and non-MIPS16 instructions. Fix formatting.
362
85fcb30f
RS
3632013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
364
365 * config/tc-mips.c (reg_needs_delay): Move later in file.
366 Use gpr_write_mask.
367 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
368
43234a1e
L
3692013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
370 Alexander Ivchenko <alexander.ivchenko@intel.com>
371 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
372 Sergey Lega <sergey.s.lega@intel.com>
373 Anna Tikhonova <anna.tikhonova@intel.com>
374 Ilya Tocar <ilya.tocar@intel.com>
375 Andrey Turetskiy <andrey.turetskiy@intel.com>
376 Ilya Verbin <ilya.verbin@intel.com>
377 Kirill Yukhin <kirill.yukhin@intel.com>
378 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
379
380 * config/tc-i386-intel.c (O_zmmword_ptr): New.
381 (i386_types): Add zmmword.
382 (i386_intel_simplify_register): Allow regzmm.
383 (i386_intel_simplify): Handle zmmwords.
384 (i386_intel_operand): Handle RC/SAE, vector operations and
385 zmmwords.
386 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
387 (struct RC_Operation): New.
388 (struct Mask_Operation): New.
389 (struct Broadcast_Operation): New.
390 (vex_prefix): Size of bytes increased to 4 to support EVEX
391 encoding.
392 (enum i386_error): Add new error codes: unsupported_broadcast,
393 broadcast_not_on_src_operand, broadcast_needed,
394 unsupported_masking, mask_not_on_destination, no_default_mask,
395 unsupported_rc_sae, rc_sae_operand_not_last_imm,
396 invalid_register_operand, try_vector_disp8.
397 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
398 rounding, broadcast, memshift.
399 (struct RC_name): New.
400 (RC_NamesTable): New.
401 (evexlig): New.
402 (evexwig): New.
403 (extra_symbol_chars): Add '{'.
404 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
405 (i386_operand_type): Add regzmm, regmask and vec_disp8.
406 (match_mem_size): Handle zmmwords.
407 (operand_type_match): Handle zmm-registers.
408 (mode_from_disp_size): Handle vec_disp8.
409 (fits_in_vec_disp8): New.
410 (md_begin): Handle {} properly.
411 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
412 (build_vex_prefix): Handle vrex.
413 (build_evex_prefix): New.
414 (process_immext): Adjust to properly handle EVEX.
415 (md_assemble): Add EVEX encoding support.
416 (swap_2_operands): Correctly handle operands with masking,
417 broadcasting or RC/SAE.
418 (check_VecOperands): Support EVEX features.
419 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
420 (match_template): Support regzmm and handle new error codes.
421 (process_suffix): Handle zmmwords and zmm-registers.
422 (check_byte_reg): Extend to zmm-registers.
423 (process_operands): Extend to zmm-registers.
424 (build_modrm_byte): Handle EVEX.
425 (output_insn): Adjust to properly handle EVEX case.
426 (disp_size): Handle vec_disp8.
427 (output_disp): Support compressed disp8*N evex feature.
428 (output_imm): Handle RC/SAE immediates properly.
429 (check_VecOperations): New.
430 (i386_immediate): Handle EVEX features.
431 (i386_index_check): Handle zmmwords and zmm-registers.
432 (RC_SAE_immediate): New.
433 (i386_att_operand): Handle EVEX features.
434 (parse_real_register): Add a check for ZMM/Mask registers.
435 (OPTION_MEVEXLIG): New.
436 (OPTION_MEVEXWIG): New.
437 (md_longopts): Add mevexlig and mevexwig.
438 (md_parse_option): Handle mevexlig and mevexwig options.
439 (md_show_usage): Add description for mevexlig and mevexwig.
440 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
441 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
442
a0046408
L
4432013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
444
445 * config/tc-i386.c (cpu_arch): Add .sha.
446 * doc/c-i386.texi: Document sha/.sha.
447
7e8b059b
L
4482013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
449 Kirill Yukhin <kirill.yukhin@intel.com>
450 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
451
452 * config/tc-i386.c (BND_PREFIX): New.
453 (struct _i386_insn): Add new field bnd_prefix.
454 (add_bnd_prefix): New.
455 (cpu_arch): Add MPX.
456 (i386_operand_type): Add regbnd.
457 (md_assemble): Handle BND prefixes.
458 (parse_insn): Likewise.
459 (output_branch): Likewise.
460 (output_jump): Likewise.
461 (build_modrm_byte): Handle regbnd.
462 (OPTION_MADD_BND_PREFIX): New.
463 (md_longopts): Add entry for 'madd-bnd-prefix'.
464 (md_parse_option): Handle madd-bnd-prefix option.
465 (md_show_usage): Add description for madd-bnd-prefix
466 option.
467 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
468
7fa9fcb6
TG
4692013-07-24 Tristan Gingold <gingold@adacore.com>
470
471 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
472 xcoff targets.
473
614eb277
AK
4742013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
475
476 * config/tc-s390.c (s390_machine): Don't force the .machine
477 argument to lower case.
478
e673710a
KT
4792013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
480
481 * config/tc-arm.c (s_arm_arch_extension): Improve error message
482 for invalid extension.
483
69091a2c
YZ
4842013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
485
486 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
487 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
488 (aarch64_abi): New variable.
489 (ilp32_p): Change to be a macro.
490 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
491 (struct aarch64_option_abi_value_table): New struct.
492 (aarch64_abis): New table.
493 (aarch64_parse_abi): New function.
494 (aarch64_long_opts): Add entry for -mabi=.
495 * doc/as.texinfo (Target AArch64 options): Document -mabi.
496 * doc/c-aarch64.texi: Likewise.
497
faf786e6
NC
4982013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
499
500 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
501 unsigned comparison.
502
f0c00282
NC
5032013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
504
cbe02d4f 505 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 506 RX610.
cbe02d4f 507 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
508 check floating point operation support for target RX100 and
509 RX200.
cbe02d4f
AM
510 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
511 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
512 RX200, RX600, and RX610
f0c00282 513
8c997c27
NC
5142013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
515
516 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
517
8be59acb
NC
5182013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
519
520 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
521 * doc/c-avr.texi: Likewise.
522
4a06e5a2
RS
5232013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
524
525 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
526 error with older GCCs.
527 (mips16_macro_build): Dereference args.
528
a92713e6
RS
5292013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
530
531 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
532 New functions, split out from...
533 (reg_lookup): ...here. Remove itbl support.
534 (reglist_lookup): Delete.
535 (mips_operand_token_type): New enum.
536 (mips_operand_token): New structure.
537 (mips_operand_tokens): New variable.
538 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
539 (mips_parse_arguments): New functions.
540 (md_begin): Initialize mips_operand_tokens.
541 (mips_arg_info): Add a token field. Remove optional_reg field.
542 (match_char, match_expression): New functions.
543 (match_const_int): Use match_expression. Remove "s" argument
544 and return a boolean result. Remove O_register handling.
545 (match_regno, match_reg, match_reg_range): New functions.
546 (match_int_operand, match_mapped_int_operand, match_msb_operand)
547 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
548 (match_addiusp_operand, match_clo_clz_dest_operand)
549 (match_lwm_swm_list_operand, match_entry_exit_operand)
550 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
551 (match_tied_reg_operand): Remove "s" argument and return a boolean
552 result. Match tokens rather than text. Update calls to
553 match_const_int. Rely on match_regno to call check_regno.
554 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
555 "arg" argument. Return a boolean result.
556 (parse_float_constant): Replace with...
557 (match_float_constant): ...this new function.
558 (match_operand): Remove "s" argument and return a boolean result.
559 Update calls to subfunctions.
560 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
561 rather than string-parsing routines. Update handling of optional
562 registers for token scheme.
563
89565f1b
RS
5642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
565
566 * config/tc-mips.c (parse_float_constant): Split out from...
567 (mips_ip): ...here.
568
3c14a432
RS
5692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
572 Delete.
573
364215c8
RS
5742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
577 (match_entry_exit_operand): New function.
578 (match_save_restore_list_operand): Likewise.
579 (match_operand): Use them.
580 (check_absolute_expr): Delete.
581 (mips16_ip): Rewrite main parsing loop to use mips_operands.
582
9e12b7a2
RS
5832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
584
585 * config/tc-mips.c: Enable functions commented out in previous patch.
586 (SKIP_SPACE_TABS): Move further up file.
587 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
588 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
589 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
590 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
591 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
592 (micromips_imm_b_map, micromips_imm_c_map): Delete.
593 (mips_lookup_reg_pair): Delete.
594 (macro): Use report_bad_range and report_bad_field.
595 (mips_immed, expr_const_in_range): Delete.
596 (mips_ip): Rewrite main parsing loop to use new functions.
597
a1d78564
RS
5982013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
599
600 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
601 Change return type to bfd_boolean.
602 (report_bad_range, report_bad_field): New functions.
603 (mips_arg_info): New structure.
604 (match_const_int, convert_reg_type, check_regno, match_int_operand)
605 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
606 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
607 (match_addiusp_operand, match_clo_clz_dest_operand)
608 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
609 (match_pc_operand, match_tied_reg_operand, match_operand)
610 (check_completed_insn): New functions, commented out for now.
611
e077a1c8
RS
6122013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
613
614 * config/tc-mips.c (insn_insert_operand): New function.
615 (macro_build, mips16_macro_build): Put null character check
616 in the for loop and convert continues to breaks. Use operand
617 structures to handle constant operands.
618
ab902481
RS
6192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
620
621 * config/tc-mips.c (validate_mips_insn): Move further up file.
622 Add insn_bits and decode_operand arguments. Use the mips_operand
623 fields to work out which bits an operand occupies. Detect double
624 definitions.
625 (validate_micromips_insn): Move further up file. Call into
626 validate_mips_insn.
627
2f8b73cc
RS
6282013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
629
630 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
631
c8276761
RS
6322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
633
634 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
635 and "~".
636 (macro): Update accordingly.
637
77bd4346
RS
6382013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
639
640 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
641 (imm_reloc): Delete.
642 (md_assemble): Remove imm_reloc handling.
643 (mips_ip): Update commentary. Use offset_expr and offset_reloc
644 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
645 Use a temporary array rather than imm_reloc when parsing
646 constant expressions. Remove imm_reloc initialization.
647 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
648 for the relaxable field. Use a relax_char variable to track the
649 type of this field. Remove imm_reloc initialization.
650
cc537e56
RS
6512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
652
653 * config/tc-mips.c (mips16_ip): Handle "I".
654
ba92f887
MR
6552013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
656
657 * config/tc-mips.c (mips_flag_nan2008): New variable.
658 (options): Add OPTION_NAN enum value.
659 (md_longopts): Handle it.
660 (md_parse_option): Likewise.
661 (s_nan): New function.
662 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
663 (md_show_usage): Add -mnan.
664
665 * doc/as.texinfo (Overview): Add -mnan.
666 * doc/c-mips.texi (MIPS Opts): Document -mnan.
667 (MIPS NaN Encodings): New node. Document .nan directive.
668 (MIPS-Dependent): List the new node.
669
c1094734
TG
6702013-07-09 Tristan Gingold <gingold@adacore.com>
671
672 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
673
0cbbe1b8
RS
6742013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
675
676 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
677 for 'A' and assume that the constant has been elided if the result
678 is an O_register.
679
f2ae14a1
RS
6802013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (gprel16_reloc_p): New function.
683 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
684 BFD_RELOC_UNUSED.
685 (offset_high_part, small_offset_p): New functions.
686 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
687 register load and store macros, handle the 16-bit offset case first.
688 If a 16-bit offset is not suitable for the instruction we're
689 generating, load it into the temporary register using
690 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
691 M_L_DAB code once the address has been constructed. For double load
692 and store macros, again handle the 16-bit offset case first.
693 If the second register cannot be accessed from the same high
694 part as the first, load it into AT using ADDRESS_ADDI_INSN.
695 Fix the handling of LD in cases where the first register is the
696 same as the base. Also handle the case where the offset is
697 not 16 bits and the second register cannot be accessed from the
698 same high part as the first. For unaligned loads and stores,
699 fuse the offbits == 12 and old "ab" handling. Apply this handling
700 whenever the second offset needs a different high part from the first.
701 Construct the offset using ADDRESS_ADDI_INSN where possible,
702 for offbits == 16 as well as offbits == 12. Use offset_reloc
703 when constructing the individual loads and stores.
704 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
705 and offset_reloc before matching against a particular opcode.
706 Handle elided 'A' constants. Allow 'A' constants to use
707 relocation operators.
708
5c324c16
RS
7092013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
710
711 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
712 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
713 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
714
23e69e47
RS
7152013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
716
717 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
718 Require the msb to be <= 31 for "+s". Check that the size is <= 31
719 for both "+s" and "+S".
720
27c5c572
RS
7212013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
722
723 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
724 (mips_ip, mips16_ip): Handle "+i".
725
e76ff5ab
RS
7262013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
727
728 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
729 (micromips_to_32_reg_h_map): Rename to...
730 (micromips_to_32_reg_h_map1): ...this.
731 (micromips_to_32_reg_i_map): Rename to...
732 (micromips_to_32_reg_h_map2): ...this.
733 (mips_lookup_reg_pair): New function.
734 (gpr_write_mask, macro): Adjust after above renaming.
735 (validate_micromips_insn): Remove "mi" handling.
736 (mips_ip): Likewise. Parse both registers in a pair for "mh".
737
fa7616a4
RS
7382013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
739
740 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
741 (mips_ip): Remove "+D" and "+T" handling.
742
fb798c50
AK
7432013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
744
745 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
746 relocs.
747
2c0a3565
MS
7482013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
749
4aa2c5e2
MS
750 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
751
7522013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
753
2c0a3565
MS
754 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
755 (aarch64_force_relocation): Likewise.
756
f40da81b
AM
7572013-07-02 Alan Modra <amodra@gmail.com>
758
759 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
760
81566a9b
MR
7612013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
762
763 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
764 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
765 Replace @sc{mips16} with literal `MIPS16'.
766 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
767
a6bb11b2
YZ
7682013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
769
770 * config/tc-aarch64.c (reloc_table): Replace
771 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
772 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
773 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
774 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
775 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
776 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
777 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
778 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
779 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
780 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
781 (aarch64_force_relocation): Likewise.
782
cec5225b
YZ
7832013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
784
785 * config/tc-aarch64.c (ilp32_p): New static variable.
786 (elf64_aarch64_target_format): Return the target according to the
787 value of 'ilp32_p'.
788 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
789 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
790 (aarch64_dwarf2_addr_size): New function.
791 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
792 (DWARF2_ADDR_SIZE): New define.
793
e335d9cb
RS
7942013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
795
796 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
797
18870af7
RS
7982013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
799
800 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
801
833794fc
MR
8022013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
803
804 * config/tc-mips.c (mips_set_options): Add insn32 member.
805 (mips_opts): Initialize it.
806 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
807 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
808 (md_longopts): Add "minsn32" and "mno-insn32" options.
809 (is_size_valid): Handle insn32 mode.
810 (md_assemble): Pass instruction string down to macro.
811 (brk_fmt): Add second dimension and insn32 mode initializers.
812 (mfhl_fmt): Likewise.
813 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
814 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
815 (macro_build_jalr, move_register): Handle insn32 mode.
816 (macro_build_branch_rs): Likewise.
817 (macro): Handle insn32 mode.
818 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
819 (mips_ip): Handle insn32 mode.
820 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
821 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
822 (mips_handle_align): Handle insn32 mode.
823 (md_show_usage): Add -minsn32 and -mno-insn32.
824
825 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
826 -mno-insn32 options.
827 (-minsn32, -mno-insn32): New options.
828 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
829 options.
830 (MIPS assembly options): New node. Document .set insn32 and
831 .set noinsn32.
832 (MIPS-Dependent): List the new node.
833
d1706f38
NC
8342013-06-25 Nick Clifton <nickc@redhat.com>
835
836 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
837 the PC in indirect addressing on 430xv2 parts.
838 (msp430_operands): Add version test to hardware bug encoding
839 restrictions.
840
477330fc
RM
8412013-06-24 Roland McGrath <mcgrathr@google.com>
842
d996d970
RM
843 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
844 so it skips whitespace before it.
845 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
846
477330fc
RM
847 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
848 (arm_reg_parse_multi): Skip whitespace first.
849 (parse_reg_list): Likewise.
850 (parse_vfp_reg_list): Likewise.
851 (s_arm_unwind_save_mmxwcg): Likewise.
852
24382199
NC
8532013-06-24 Nick Clifton <nickc@redhat.com>
854
855 PR gas/15623
856 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
857
c3678916
RS
8582013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
859
860 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
861
42429eac
RS
8622013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
863
864 * config/tc-mips.c: Assert that offsetT and valueT are at least
865 8 bytes in size.
866 (GPR_SMIN, GPR_SMAX): New macros.
867 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
868
f3ded42a
RS
8692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
870
871 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
872 conditions. Remove any code deselected by them.
873 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
874
e8044f35
RS
8752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
876
877 * NEWS: Note removal of ECOFF support.
878 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
879 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
880 (MULTI_CFILES): Remove config/e-mipsecoff.c.
881 * Makefile.in: Regenerate.
882 * configure.in: Remove MIPS ECOFF references.
883 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
884 Delete cases.
885 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
886 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
887 (mips-*-*): ...this single case.
888 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
889 MIPS emulations to be e-mipself*.
890 * configure: Regenerate.
891 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
892 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
893 (mips-*-sysv*): Remove coff and ecoff cases.
894 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
895 * ecoff.c: Remove reference to MIPS ECOFF.
896 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
897 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
898 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
899 (mips_hi_fixup): Tweak comment.
900 (append_insn): Require a howto.
901 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
902
98508b2a
RS
9032013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
904
905 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
906 Use "CPU" instead of "cpu".
907 * doc/c-mips.texi: Likewise.
908 (MIPS Opts): Rename to MIPS Options.
909 (MIPS option stack): Rename to MIPS Option Stack.
910 (MIPS ASE instruction generation overrides): Rename to
911 MIPS ASE Instruction Generation Overrides (for now).
912 (MIPS floating-point): Rename to MIPS Floating-Point.
913
fc16f8cc
RS
9142013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
915
916 * doc/c-mips.texi (MIPS Macros): New section.
917 (MIPS Object): Replace with...
918 (MIPS Small Data): ...this new section.
919
5a7560b5
RS
9202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
921
922 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
923 Capitalize name. Use @kindex instead of @cindex for .set entries.
924
a1b86ab7
RS
9252013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
926
927 * doc/c-mips.texi (MIPS Stabs): Remove section.
928
c6278170
RS
9292013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
930
931 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
932 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
933 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
934 (ISA_SUPPORTS_VIRT64_ASE): Delete.
935 (mips_ase): New structure.
936 (mips_ases): New table.
937 (FP64_ASES): New macro.
938 (mips_ase_groups): New array.
939 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
940 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
941 functions.
942 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
943 (md_parse_option): Use mips_ases and mips_set_ase instead of
944 separate case statements for each ASE option.
945 (mips_after_parse_args): Use FP64_ASES. Use
946 mips_check_isa_supports_ases to check the ASEs against
947 other options.
948 (s_mipsset): Use mips_ases and mips_set_ase instead of
949 separate if statements for each ASE option. Use
950 mips_check_isa_supports_ases, even when a non-ASE option
951 is specified.
952
63a4bc21
KT
9532013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
954
955 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
956
c31f3936
RS
9572013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
958
959 * config/tc-mips.c (md_shortopts, options, md_longopts)
960 (md_longopts_size): Move earlier in file.
961
846ef2d0
RS
9622013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
963
964 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
965 with a single "ase" bitmask.
966 (mips_opts): Update accordingly.
967 (file_ase, file_ase_explicit): New variables.
968 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
969 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
970 (ISA_HAS_ROR): Adjust for mips_set_options change.
971 (is_opcode_valid): Take the base ase mask directly from mips_opts.
972 (mips_ip): Adjust for mips_set_options change.
973 (md_parse_option): Likewise. Update file_ase_explicit.
974 (mips_after_parse_args): Adjust for mips_set_options change.
975 Use bitmask operations to select the default ASEs. Set file_ase
976 rather than individual per-ASE variables.
977 (s_mipsset): Adjust for mips_set_options change.
978 (mips_elf_final_processing): Test file_ase rather than
979 file_ase_mdmx. Remove commented-out code.
980
d16afab6
RS
9812013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
982
983 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
984 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
985 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
986 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
987 (mips_after_parse_args): Use the new "ase" field to choose
988 the default ASEs.
989 (mips_cpu_info_table): Move ASEs from the "flags" field to the
990 "ase" field.
991
e83a675f
RE
9922013-06-18 Richard Earnshaw <rearnsha@arm.com>
993
994 * config/tc-arm.c (symbol_preemptible): New function.
995 (relax_branch): Use it.
996
7f3c4072
CM
9972013-06-17 Catherine Moore <clm@codesourcery.com>
998 Maciej W. Rozycki <macro@codesourcery.com>
999 Chao-Ying Fu <fu@mips.com>
1000
1001 * config/tc-mips.c (mips_set_options): Add ase_eva.
1002 (mips_set_options mips_opts): Add ase_eva.
1003 (file_ase_eva): Declare.
1004 (ISA_SUPPORTS_EVA_ASE): Define.
1005 (IS_SEXT_9BIT_NUM): Define.
1006 (MIPS_CPU_ASE_EVA): Define.
1007 (is_opcode_valid): Add support for ase_eva.
1008 (macro_build): Likewise.
1009 (macro): Likewise.
1010 (validate_mips_insn): Likewise.
1011 (validate_micromips_insn): Likewise.
1012 (mips_ip): Likewise.
1013 (options): Add OPTION_EVA and OPTION_NO_EVA.
1014 (md_longopts): Add -meva and -mno-eva.
1015 (md_parse_option): Process new options.
1016 (mips_after_parse_args): Check for valid EVA combinations.
1017 (s_mipsset): Likewise.
1018
e410add4
RS
10192013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1020
1021 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1022 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1023 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1024 (dwarf2_gen_line_info_1): Update call accordingly.
1025 (dwarf2_move_insn): New function.
1026 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1027
6a50d470
RS
10282013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1029
1030 Revert:
1031
1032 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1033
1034 PR gas/13024
1035 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1036 (dwarf2_gen_line_info_1): Delete.
1037 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1038 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1039 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1040 (dwarf2_directive_loc): Push previous .locs instead of generating
1041 them immediately.
1042
f122319e
CF
10432013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1044
1045 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1046 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1047
909c7f9c
NC
10482013-06-13 Nick Clifton <nickc@redhat.com>
1049
1050 PR gas/15602
1051 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1052 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1053 function. Generates an error if the adjusted offset is out of a
1054 16-bit range.
1055
5d5755a7
SL
10562013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1057
1058 * config/tc-nios2.c (md_apply_fix): Mask constant
1059 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1060
3bf0dbfb
MR
10612013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1062
1063 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1064 MIPS-3D instructions either.
1065 (md_convert_frag): Update the COPx branch mask accordingly.
1066
1067 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1068 option.
1069 * doc/as.texinfo (Overview): Add --relax-branch and
1070 --no-relax-branch.
1071 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1072 --no-relax-branch.
1073
9daf7bab
SL
10742013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1075
1076 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1077 omitted.
1078
d301a56b
RS
10792013-06-08 Catherine Moore <clm@codesourcery.com>
1080
1081 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1082 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1083 (append_insn): Change INSN_xxxx to ASE_xxxx.
1084
7bab7634
DC
10852013-06-01 George Thomas <george.thomas@atmel.com>
1086
cbe02d4f 1087 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1088 AVR_ISA_XMEGAU
1089
f60cf82f
L
10902013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1091
1092 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1093 for ELF.
1094
a3f278e2
CM
10952013-05-31 Paul Brook <paul@codesourcery.com>
1096
a3f278e2
CM
1097 * config/tc-mips.c (s_ehword): New.
1098
067ec077
CM
10992013-05-30 Paul Brook <paul@codesourcery.com>
1100
1101 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1102
d6101ac2
MR
11032013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1104
1105 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1106 convert relocs who have no relocatable field either. Rephrase
1107 the conditional so that the PC-relative check is only applied
1108 for REL targets.
1109
f19ccbda
MR
11102013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1111
1112 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1113 calculation.
1114
418009c2
YZ
11152013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1116
1117 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1118 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1119 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1120 (md_apply_fix): Likewise.
1121 (aarch64_force_relocation): Likewise.
1122
0a8897c7
KT
11232013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1124
1125 * config/tc-arm.c (it_fsm_post_encode): Improve
1126 warning messages about deprecated IT block formats.
1127
89d2a2a3
MS
11282013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1129
1130 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1131 inside fx_done condition.
1132
c77c0862
RS
11332013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1134
1135 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1136
c0637f3a
PB
11372013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1138
1139 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1140 and clean up warning when using PRINT_OPCODE_TABLE.
1141
5656a981
AM
11422013-05-20 Alan Modra <amodra@gmail.com>
1143
1144 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1145 and data fixups performing shift/high adjust/sign extension on
1146 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1147 when writing data fixups rather than recalculating size.
1148
997b26e8
JBG
11492013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1150
1151 * doc/c-msp430.texi: Fix typo.
1152
9f6e76f4
TG
11532013-05-16 Tristan Gingold <gingold@adacore.com>
1154
1155 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1156 are also TOC symbols.
1157
638d3803
NC
11582013-05-16 Nick Clifton <nickc@redhat.com>
1159
1160 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1161 Add -mcpu command to specify core type.
997b26e8 1162 * doc/c-msp430.texi: Update documentation.
638d3803 1163
b015e599
AP
11642013-05-09 Andrew Pinski <apinski@cavium.com>
1165
1166 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1167 (mips_opts): Update for the new field.
1168 (file_ase_virt): New variable.
1169 (ISA_SUPPORTS_VIRT_ASE): New macro.
1170 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1171 (MIPS_CPU_ASE_VIRT): New define.
1172 (is_opcode_valid): Handle ase_virt.
1173 (macro_build): Handle "+J".
1174 (validate_mips_insn): Likewise.
1175 (mips_ip): Likewise.
1176 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1177 (md_longopts): Add mvirt and mnovirt
1178 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1179 (mips_after_parse_args): Handle ase_virt field.
1180 (s_mipsset): Handle "virt" and "novirt".
1181 (mips_elf_final_processing): Add a comment about virt ASE might need
1182 a new flag.
1183 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1184 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1185 Document ".set virt" and ".set novirt".
1186
da8094d7
AM
11872013-05-09 Alan Modra <amodra@gmail.com>
1188
1189 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1190 control of operand flag bits.
1191
c5f8c205
AM
11922013-05-07 Alan Modra <amodra@gmail.com>
1193
1194 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1195 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1196 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1197 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1198 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1199 Shift and sign-extend fieldval for use by some VLE reloc
1200 operand->insert functions.
1201
b47468a6
CM
12022013-05-06 Paul Brook <paul@codesourcery.com>
1203 Catherine Moore <clm@codesourcery.com>
1204
c5f8c205
AM
1205 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1206 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1207 (md_apply_fix): Likewise.
1208 (tc_gen_reloc): Likewise.
1209
2de39019
CM
12102013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1211
1212 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1213 (mips_fix_adjustable): Adjust pc-relative check to use
1214 limited_pc_reloc_p.
1215
754e2bb9
RS
12162013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1217
1218 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1219 (s_mips_stab): Do not restrict to stabn only.
1220
13761a11
NC
12212013-05-02 Nick Clifton <nickc@redhat.com>
1222
1223 * config/tc-msp430.c: Add support for the MSP430X architecture.
1224 Add code to insert a NOP instruction after any instruction that
1225 might change the interrupt state.
1226 Add support for the LARGE memory model.
1227 Add code to initialise the .MSP430.attributes section.
1228 * config/tc-msp430.h: Add support for the MSP430X architecture.
1229 * doc/c-msp430.texi: Document the new -mL and -mN command line
1230 options.
1231 * NEWS: Mention support for the MSP430X architecture.
1232
df26367c
MR
12332013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1234
1235 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1236 alpha*-*-linux*ecoff*.
1237
f02d8318
CF
12382013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1239
1240 * config/tc-mips.c (mips_ip): Add sizelo.
1241 For "+C", "+G", and "+H", set sizelo and compare against it.
1242
b40bf0a2
NC
12432013-04-29 Nick Clifton <nickc@redhat.com>
1244
1245 * as.c (Options): Add -gdwarf-sections.
1246 (parse_args): Likewise.
1247 * as.h (flag_dwarf_sections): Declare.
1248 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1249 (process_entries): When -gdwarf-sections is enabled generate
1250 fragmentary .debug_line sections.
1251 (out_debug_line): Set the section for the .debug_line section end
1252 symbol.
1253 * doc/as.texinfo: Document -gdwarf-sections.
1254 * NEWS: Mention -gdwarf-sections.
1255
8eeccb77 12562013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1257
1258 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1259 according to the target parameter. Don't call s_segm since s_segm
1260 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1261 initialized yet.
1262 (md_begin): Call s_segm according to target parameter from command
1263 line.
1264
49926cd0
AM
12652013-04-25 Alan Modra <amodra@gmail.com>
1266
1267 * configure.in: Allow little-endian linux.
1268 * configure: Regenerate.
1269
e3031850
SL
12702013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1271
1272 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1273 "fstatus" control register to "eccinj".
1274
cb948fc0
KT
12752013-04-19 Kai Tietz <ktietz@redhat.com>
1276
1277 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1278
4455e9ad
JB
12792013-04-15 Julian Brown <julian@codesourcery.com>
1280
1281 * expr.c (add_to_result, subtract_from_result): Make global.
1282 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1283 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1284 subtract_from_result to handle extra bit of precision for .sleb128
1285 directive operands.
1286
956a6ba3
JB
12872013-04-10 Julian Brown <julian@codesourcery.com>
1288
1289 * read.c (convert_to_bignum): Add sign parameter. Use it
1290 instead of X_unsigned to determine sign of resulting bignum.
1291 (emit_expr): Pass extra argument to convert_to_bignum.
1292 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1293 X_extrabit to convert_to_bignum.
1294 (parse_bitfield_cons): Set X_extrabit.
1295 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1296 Initialise X_extrabit field as appropriate.
1297 (add_to_result): New.
1298 (subtract_from_result): New.
1299 (expr): Use above.
1300 * expr.h (expressionS): Add X_extrabit field.
1301
eb9f3f00
JB
13022013-04-10 Jan Beulich <jbeulich@suse.com>
1303
1304 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1305 register being PC when is_t or writeback, and use distinct
1306 diagnostic for the latter case.
1307
ccb84d65
JB
13082013-04-10 Jan Beulich <jbeulich@suse.com>
1309
1310 * gas/config/tc-arm.c (parse_operands): Re-write
1311 po_barrier_or_imm().
1312 (do_barrier): Remove bogus constraint().
1313 (do_t_barrier): Remove.
1314
4d13caa0
NC
13152013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1316
1317 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1318 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1319 ATmega2564RFR2
1320 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1321
16d02dc9
JB
13222013-04-09 Jan Beulich <jbeulich@suse.com>
1323
1324 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1325 Use local variable Rt in more places.
1326 (do_vmsr): Accept all control registers.
1327
05ac0ffb
JB
13282013-04-09 Jan Beulich <jbeulich@suse.com>
1329
1330 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1331 if there was none specified for moves between scalar and core
1332 register.
1333
2d51fb74
JB
13342013-04-09 Jan Beulich <jbeulich@suse.com>
1335
1336 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1337 NEON_ALL_LANES case.
1338
94dcf8bf
JB
13392013-04-08 Jan Beulich <jbeulich@suse.com>
1340
1341 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1342 PC-relative VSTR.
1343
1472d06f
JB
13442013-04-08 Jan Beulich <jbeulich@suse.com>
1345
1346 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1347 entry to sp_fiq.
1348
0c76cae8
AM
13492013-04-03 Alan Modra <amodra@gmail.com>
1350
1351 * doc/as.texinfo: Add support to generate man options for h8300.
1352 * doc/c-h8300.texi: Likewise.
1353
92eb40d9
RR
13542013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1355
1356 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1357 Cortex-A57.
1358
51dcdd4d
NC
13592013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1360
1361 PR binutils/15068
1362 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1363
c5d685bf
NC
13642013-03-26 Nick Clifton <nickc@redhat.com>
1365
9b978282
NC
1366 PR gas/15295
1367 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1368 start of the file each time.
1369
c5d685bf
NC
1370 PR gas/15178
1371 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1372 FreeBSD targets.
1373
9699c833
TG
13742013-03-26 Douglas B Rupp <rupp@gnat.com>
1375
1376 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1377 after fixup.
1378
4755303e
WN
13792013-03-21 Will Newton <will.newton@linaro.org>
1380
1381 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1382 pc-relative str instructions in Thumb mode.
1383
81f5558e
NC
13842013-03-21 Michael Schewe <michael.schewe@gmx.net>
1385
1386 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1387 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1388 R_H8_DISP32A16.
1389 * config/tc-h8300.h: Remove duplicated defines.
1390
71863e73
NC
13912013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1392
1393 PR gas/15282
1394 * tc-avr.c (mcu_has_3_byte_pc): New function.
1395 (tc_cfi_frame_initial_instructions): Call it to find return
1396 address size.
1397
795b8e6b
NC
13982013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1399
1400 PR gas/15095
1401 * config/tc-tic6x.c (tic6x_try_encode): Handle
1402 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1403 encode register pair numbers when required.
1404
ba86b375
WN
14052013-03-15 Will Newton <will.newton@linaro.org>
1406
1407 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1408 in vstr in Thumb mode for pre-ARMv7 cores.
1409
9e6f3811
AS
14102013-03-14 Andreas Schwab <schwab@suse.de>
1411
1412 * doc/c-arc.texi (ARC Directives): Revert last change and use
1413 @itemize instead of @table.
1414 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1415
b10bf8c5
NC
14162013-03-14 Nick Clifton <nickc@redhat.com>
1417
1418 PR gas/15273
1419 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1420 NULL message, instead just check ARM_CPU_IS_ANY directly.
1421
ba724cfc
NC
14222013-03-14 Nick Clifton <nickc@redhat.com>
1423
1424 PR gas/15212
9e6f3811 1425 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1426 for table format.
1427 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1428 to the @item directives.
1429 (ARM-Neon-Alignment): Move to correct place in the document.
1430 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1431 formatting.
1432 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1433 @smallexample.
1434
531a94fd
SL
14352013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1436
1437 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1438 case. Add default BAD_CASE to switch.
1439
dad60f8e
SL
14402013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1441
1442 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1443 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1444
dd5181d5
KT
14452013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1446
1447 * config/tc-arm.c (crc_ext_armv8): New feature set.
1448 (UNPRED_REG): New macro.
1449 (do_crc32_1): New function.
1450 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1451 do_crc32ch, do_crc32cw): Likewise.
1452 (TUEc): New macro.
1453 (insns): Add entries for crc32 mnemonics.
1454 (arm_extensions): Add entry for crc.
1455
8e723a10
CLT
14562013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1457
1458 * write.h (struct fix): Add fx_dot_frag field.
1459 (dot_frag): Declare.
1460 * write.c (dot_frag): New variable.
1461 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1462 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1463 * expr.c (expr): Save value of frag_now in dot_frag when setting
1464 dot_value.
1465 * read.c (emit_expr): Likewise. Delete comments.
1466
be05d201
L
14672013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1468
1469 * config/tc-i386.c (flag_code_names): Removed.
1470 (i386_index_check): Rewrote.
1471
62b0d0d5
YZ
14722013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1473
1474 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1475 add comment.
1476 (aarch64_double_precision_fmovable): New function.
1477 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1478 function; handle hexadecimal representation of IEEE754 encoding.
1479 (parse_operands): Update the call to parse_aarch64_imm_float.
1480
165de32a
L
14812013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1482
1483 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1484 (check_hle): Updated.
1485 (md_assemble): Likewise.
1486 (parse_insn): Likewise.
1487
d5de92cf
L
14882013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1489
1490 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1491 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1492 (parse_insn): Remove expecting_string_instruction. Set
1493 i.rep_prefix.
1494
e60bb1dd
YZ
14952013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1496
1497 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1498
aeebdd9b
YZ
14992013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1500
1501 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1502 for system registers.
1503
4107ae22
DD
15042013-02-27 DJ Delorie <dj@redhat.com>
1505
1506 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1507 (rl78_op): Handle %code().
1508 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1509 (tc_gen_reloc): Likwise; convert to a computed reloc.
1510 (md_apply_fix): Likewise.
1511
151fa98f
NC
15122013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1513
1514 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1515
70a8bc5b 15162013-02-25 Terry Guo <terry.guo@arm.com>
1517
1518 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1519 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1520 list of accepted CPUs.
1521
5c111e37
L
15222013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1523
1524 PR gas/15159
1525 * config/tc-i386.c (cpu_arch): Add ".smap".
1526
1527 * doc/c-i386.texi: Document smap.
1528
8a75745d
MR
15292013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1530
1531 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1532 mips_assembling_insn appropriately.
1533 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1534
79850f26
MR
15352013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1536
cf29fc61 1537 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1538 extraneous braces.
1539
4c261dff
NC
15402013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1541
5c111e37 1542 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1543
ea33f281
NC
15442013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1545
1546 * configure.tgt: Add nios2-*-rtems*.
1547
a1ccaec9
YZ
15482013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1549
1550 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1551 NULL.
1552
0aa27725
RS
15532013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1554
1555 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1556 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1557
da4339ed
NC
15582013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1559
1560 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1561 core.
1562
36591ba1 15632013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1564 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1565
1566 Based on patches from Altera Corporation.
1567
1568 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1569 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1570 * Makefile.in: Regenerated.
1571 * configure.tgt: Add case for nios2*-linux*.
1572 * config/obj-elf.c: Conditionally include elf/nios2.h.
1573 * config/tc-nios2.c: New file.
1574 * config/tc-nios2.h: New file.
1575 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1576 * doc/Makefile.in: Regenerated.
1577 * doc/all.texi: Set NIOSII.
1578 * doc/as.texinfo (Overview): Add Nios II options.
1579 (Machine Dependencies): Include c-nios2.texi.
1580 * doc/c-nios2.texi: New file.
1581 * NEWS: Note Altera Nios II support.
1582
94d4433a
AM
15832013-02-06 Alan Modra <amodra@gmail.com>
1584
1585 PR gas/14255
1586 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1587 Don't skip fixups with fx_subsy non-NULL.
1588 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1589 with fx_subsy non-NULL.
1590
ace9af6f
L
15912013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1592
1593 * doc/c-metag.texi: Add "@c man" markers.
1594
89d67ed9
AM
15952013-02-04 Alan Modra <amodra@gmail.com>
1596
1597 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1598 related code.
1599 (TC_ADJUST_RELOC_COUNT): Delete.
1600 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1601
89072bd6
AM
16022013-02-04 Alan Modra <amodra@gmail.com>
1603
1604 * po/POTFILES.in: Regenerate.
1605
f9b2d544
NC
16062013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1607
1608 * config/tc-metag.c: Make SWAP instruction less permissive with
1609 its operands.
1610
392ca752
DD
16112013-01-29 DJ Delorie <dj@redhat.com>
1612
1613 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1614 relocs in .word/.etc statements.
1615
427d0db6
RM
16162013-01-29 Roland McGrath <mcgrathr@google.com>
1617
1618 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1619 immediate value for 8-bit offset" error so it shows line info.
1620
4faf939a
JM
16212013-01-24 Joseph Myers <joseph@codesourcery.com>
1622
1623 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1624 for 64-bit output.
1625
78c8d46c
NC
16262013-01-24 Nick Clifton <nickc@redhat.com>
1627
1628 * config/tc-v850.c: Add support for e3v5 architecture.
1629 * doc/c-v850.texi: Mention new support.
1630
fb5b7503
NC
16312013-01-23 Nick Clifton <nickc@redhat.com>
1632
1633 PR gas/15039
1634 * config/tc-avr.c: Include dwarf2dbg.h.
1635
8ce3d284
L
16362013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1637
1638 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1639 (tc_i386_fix_adjustable): Likewise.
1640 (lex_got): Likewise.
1641 (tc_gen_reloc): Likewise.
1642
f5555712
YZ
16432013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1644
1645 * config/tc-aarch64.c (output_operand_error_record): Change to output
1646 the out-of-range error message as value-expected message if there is
1647 only one single value in the expected range.
1648 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1649 LSL #0 as a programmer-friendly feature.
1650
8fd4256d
L
16512013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1652
1653 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1654 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1655 BFD_RELOC_64_SIZE relocations.
1656 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1657 for it.
1658 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1659 relocations against local symbols.
1660
a5840dce
AM
16612013-01-16 Alan Modra <amodra@gmail.com>
1662
1663 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1664 finding some sort of toc syntax error, and break to avoid
1665 compiler uninit warning.
1666
af89796a
L
16672013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1668
1669 PR gas/15019
1670 * config/tc-i386.c (lex_got): Increment length by 1 if the
1671 relocation token is removed.
1672
dd42f060
NC
16732013-01-15 Nick Clifton <nickc@redhat.com>
1674
1675 * config/tc-v850.c (md_assemble): Allow signed values for
1676 V850E_IMMEDIATE.
1677
464e3686
SK
16782013-01-11 Sean Keys <skeys@ipdatasys.com>
1679
1680 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1681 git to cvs.
464e3686 1682
5817ffd1
PB
16832013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1684
1685 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1686 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1687 * config/tc-ppc.c (md_show_usage): Likewise.
1688 (ppc_handle_align): Handle power8's group ending nop.
1689
f4b1f6a9
SK
16902013-01-10 Sean Keys <skeys@ipdatasys.com>
1691
1692 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1693 that the assember exits after the opcodes have been printed.
f4b1f6a9 1694
34bca508
L
16952013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1696
1697 * app.c: Remove trailing white spaces.
1698 * as.c: Likewise.
1699 * as.h: Likewise.
1700 * cond.c: Likewise.
1701 * dw2gencfi.c: Likewise.
1702 * dwarf2dbg.h: Likewise.
1703 * ecoff.c: Likewise.
1704 * input-file.c: Likewise.
1705 * itbl-lex.h: Likewise.
1706 * output-file.c: Likewise.
1707 * read.c: Likewise.
1708 * sb.c: Likewise.
1709 * subsegs.c: Likewise.
1710 * symbols.c: Likewise.
1711 * write.c: Likewise.
1712 * config/tc-i386.c: Likewise.
1713 * doc/Makefile.am: Likewise.
1714 * doc/Makefile.in: Likewise.
1715 * doc/c-aarch64.texi: Likewise.
1716 * doc/c-alpha.texi: Likewise.
1717 * doc/c-arc.texi: Likewise.
1718 * doc/c-arm.texi: Likewise.
1719 * doc/c-avr.texi: Likewise.
1720 * doc/c-bfin.texi: Likewise.
1721 * doc/c-cr16.texi: Likewise.
1722 * doc/c-d10v.texi: Likewise.
1723 * doc/c-d30v.texi: Likewise.
1724 * doc/c-h8300.texi: Likewise.
1725 * doc/c-hppa.texi: Likewise.
1726 * doc/c-i370.texi: Likewise.
1727 * doc/c-i386.texi: Likewise.
1728 * doc/c-i860.texi: Likewise.
1729 * doc/c-m32c.texi: Likewise.
1730 * doc/c-m32r.texi: Likewise.
1731 * doc/c-m68hc11.texi: Likewise.
1732 * doc/c-m68k.texi: Likewise.
1733 * doc/c-microblaze.texi: Likewise.
1734 * doc/c-mips.texi: Likewise.
1735 * doc/c-msp430.texi: Likewise.
1736 * doc/c-mt.texi: Likewise.
1737 * doc/c-s390.texi: Likewise.
1738 * doc/c-score.texi: Likewise.
1739 * doc/c-sh.texi: Likewise.
1740 * doc/c-sh64.texi: Likewise.
1741 * doc/c-tic54x.texi: Likewise.
1742 * doc/c-tic6x.texi: Likewise.
1743 * doc/c-v850.texi: Likewise.
1744 * doc/c-xc16x.texi: Likewise.
1745 * doc/c-xgate.texi: Likewise.
1746 * doc/c-xtensa.texi: Likewise.
1747 * doc/c-z80.texi: Likewise.
1748 * doc/internals.texi: Likewise.
1749
4c665b71
RM
17502013-01-10 Roland McGrath <mcgrathr@google.com>
1751
1752 * hash.c (hash_new_sized): Make it global.
1753 * hash.h: Declare it.
1754 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1755 pass a small size.
1756
a3c62988
NC
17572013-01-10 Will Newton <will.newton@imgtec.com>
1758
1759 * Makefile.am: Add Meta.
1760 * Makefile.in: Regenerate.
1761 * config/tc-metag.c: New file.
1762 * config/tc-metag.h: New file.
1763 * configure.tgt: Add Meta.
1764 * doc/Makefile.am: Add Meta.
1765 * doc/Makefile.in: Regenerate.
1766 * doc/all.texi: Add Meta.
1767 * doc/as.texiinfo: Document Meta options.
1768 * doc/c-metag.texi: New file.
1769
b37df7c4
SE
17702013-01-09 Steve Ellcey <sellcey@mips.com>
1771
1772 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1773 calls.
1774 * config/tc-mips.c (internalError): Remove, replace with abort.
1775
a3251895
YZ
17762013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1777
1778 * config/tc-aarch64.c (parse_operands): Change to compare the result
1779 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1780
8ab8155f
NC
17812013-01-07 Nick Clifton <nickc@redhat.com>
1782
1783 PR gas/14887
1784 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1785 anticipated character.
1786 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1787 here as it is no longer needed.
1788
a4ac1c42
AS
17892013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1790
1791 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1792 * doc/c-score.texi (SCORE-Opts): Likewise.
1793 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1794
e407c74b
NC
17952013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1796
1797 * config/tc-mips.c: Add support for MIPS r5900.
1798 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1799 lq and sq.
1800 (can_swap_branch_p, get_append_method): Detect some conditional
1801 short loops to fix a bug on the r5900 by NOP in the branch delay
1802 slot.
1803 (M_MUL): Support 3 operands in multu on r5900.
1804 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1805 (s_mipsset): Force 32 bit floating point on r5900.
1806 (mips_ip): Check parameter range of instructions mfps and mtps on
1807 r5900.
1808 * configure.in: Detect CPU type when target string contains r5900
1809 (e.g. mips64r5900el-linux-gnu).
1810
62658407
L
18112013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1812
1813 * as.c (parse_args): Update copyright year to 2013.
1814
95830fd1
YZ
18152013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1816
1817 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1818 and "cortex57".
1819
517bb291 18202013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1821
517bb291
NC
1822 PR gas/14987
1823 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1824 closing bracket.
d709e4e6 1825
517bb291 1826For older changes see ChangeLog-2012
08d56133 1827\f
517bb291 1828Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1829
1830Copying and distribution of this file, with or without modification,
1831are permitted in any medium without royalty provided the copyright
1832notice and this notice are preserved.
1833
08d56133
NC
1834Local Variables:
1835mode: change-log
1836left-margin: 8
1837fill-column: 74
1838version-control: never
1839End: