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[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-10-18 Nick Clifton <nickc@redhat.com>
2
3 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
4
56d438b1
CF
52013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
6 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
7
8 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
9 (md_longopts): Add mmsa and mno-msa.
10 (mips_ases): Add msa.
11 (RTYPE_MASK): Update.
12 (RTYPE_MSA): New define.
13 (OT_REG_ELEMENT): Replace with...
14 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
15 (mips_operand_token): Replace reg_element with index.
16 (mips_parse_argument_token): Treat vector indices as separate tokens.
17 Handle register indices.
18 (md_begin): Add MSA register names.
19 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
20 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
21 (match_mdmx_imm_reg_operand): Update accordingly.
22 (match_imm_index_operand): New function.
23 (match_reg_index_operand): New function.
24 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
25 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
26 (md_show_usage): Print -mmsa and -mno-msa.
27 * doc/as.texinfo: Document -mmsa and -mno-msa.
28 * doc/c-mips.texi: Document -mmsa and -mno-msa.
29 Document .set msa and .set nomsa.
30
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312013-10-14 Nick Clifton <nickc@redhat.com>
32
33 * read.c (add_include_dir): Use xrealloc.
34 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
35 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
36
ae335a4e
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372013-10-13 Sandra Loosemore <sandra@codesourcery.com>
38
39 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
40 also test/refer to "sstatus". Reformat the warning message.
41
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422013-10-10 Sean Keys <skeys@ipdatasys.com>
43
44 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
45
47cd3fa7
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462013-10-10 Jan Beulich <jbeulich@suse.com>
47
48 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
49 swapping for bndmk, bndldx, and bndstx.
50
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512013-10-09 Nick Clifton <nickc@redhat.com>
52
b7b2bb1d
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53 PR gas/16025
54 * config/tc-epiphany.c (md_convert_frag): Add missing break
55 statement.
56
6085f853
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57 PR gas/16026
58 * config/tc-mn10200.c (md_convert_frag): Add missing break
59 statement.
60
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612013-10-08 Jan Beulich <jbeulich@suse.com>
62
63 * tc-i386.c (check_word_reg): Remove misplaced "else".
64 (check_long_reg): Restore symmetry with check_word_reg.
65
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662013-10-08 Jan Beulich <jbeulich@suse.com>
67
68 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
69 LR/PC check.
70
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712013-10-08 Nick Clifton <nickc@redhat.com>
72
73 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
74 for "<foo>a". Issue error messages for unrecognised or corrrupt
75 size extensions.
76
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772013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
78
79 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
80 possible.
81
c7b0bd56
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822013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
83
84 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
85 * doc/c-i386.texi: Add -march=bdver4 option.
86
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872013-09-20 Alan Modra <amodra@gmail.com>
88
89 * configure: Regenerate.
90
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912013-09-18 Tristan Gingold <gingold@adacore.com>
92
93 * NEWS: Add marker for 2.24.
94
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952013-09-18 Nick Clifton <nickc@redhat.com>
96
97 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
98 (move_data): New variable.
99 (md_parse_option): Parse -md.
100 (msp430_section): New function. Catch references to the .bss or
101 .data sections and generate a special symbol for use by the libcrt
102 library.
103 (md_pseudo_table): Intercept .section directives.
104 (md_longopt): Add -md
105 (md_show_usage): Likewise.
106 (msp430_operands): Generate a warning message if a NOP is inserted
107 into the instruction stream.
108 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
109
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1102013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
111
112 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 113 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 114
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1152013-09-16 Will Newton <will.newton@linaro.org>
116
117 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
118 disallowing element size 64 with interleave other than 1.
119
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1202013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
121
122 * config/tc-mips.c (match_insn): Set error when $31 is used for
123 bltzal* and bgezal*.
124
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1252013-09-04 Tristan Gingold <gingold@adacore.com>
126
127 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
128 symbols.
129
74db7efb
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1302013-09-04 Roland McGrath <mcgrathr@google.com>
131
132 PR gas/15914
133 * config/tc-arm.c (T16_32_TAB): Add _udf.
134 (do_t_udf): New function.
135 (insns): Add "udf".
136
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1372013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
138
139 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
140 assembler errors at correct position.
141
9aff4b7a
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1422013-08-23 Yuri Chornoivan <yurchor@ukr.net>
143
144 PR binutils/15834
145 * config/tc-ia64.c: Fix typos.
146 * config/tc-sparc.c: Likewise.
147 * config/tc-z80.c: Likewise.
148 * doc/c-i386.texi: Likewise.
149 * doc/c-m32r.texi: Likewise.
150
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1512013-08-23 Will Newton <will.newton@linaro.org>
152
9aff4b7a 153 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
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154 for pre-indexed addressing modes.
155
b4e6cb80
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1562013-08-21 Alan Modra <amodra@gmail.com>
157
158 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
159 range check label number for use with fb_low_counter array.
160
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1612013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
164 (mips_parse_argument_token, validate_micromips_insn, md_begin)
165 (check_regno, match_float_constant, check_completed_insn, append_insn)
166 (match_insn, match_mips16_insn, match_insns, macro_start)
167 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
168 (mips16_ip, mips_set_option_string, md_parse_option)
169 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
170 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
171 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
172 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
173 Start error messages with a lower-case letter. Do not end error
174 messages with a period. Wrap long messages to 80 character-lines.
175 Use "cannot" instead of "can't" and "can not".
176
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1772013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
178
179 * config/tc-mips.c (imm_expr): Expand comment.
180 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
181 when populated.
182
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1832013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (imm2_expr): Delete.
186 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
187
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1882013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
191 (macro): Remove M_DEXT and M_DINS handling.
192
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1932013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
194
195 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
196 lax_max with lax_match.
197 (match_int_operand): Update accordingly. Don't report an error
198 for !lax_match-only cases.
199 (match_insn): Replace more_alts with lax_match and use it to
200 initialize the mips_arg_info field. Add a complete_p parameter.
201 Handle implicit VU0 suffixes here.
202 (match_invalid_for_isa, match_insns, match_mips16_insns): New
203 functions.
204 (mips_ip, mips16_ip): Use them.
205
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2062013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
207
208 * config/tc-mips.c (match_expression): Report uses of registers here.
209 Add a "must be an immediate expression" error. Handle elided offsets
210 here rather than...
211 (match_int_operand): ...here.
212
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2132013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
214
215 * config/tc-mips.c (mips_arg_info): Remove soft_match.
216 (match_out_of_range, match_not_constant): New functions.
217 (match_const_int): Remove fallback parameter and check for soft_match.
218 Use match_not_constant.
219 (match_mapped_int_operand, match_addiusp_operand)
220 (match_perf_reg_operand, match_save_restore_list_operand)
221 (match_mdmx_imm_reg_operand): Update accordingly. Use
222 match_out_of_range and set_insn_error* instead of as_bad.
223 (match_int_operand): Likewise. Use match_not_constant in the
224 !allows_nonconst case.
225 (match_float_constant): Report invalid float constants.
226 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
227 match_float_constant to check for invalid constants. Fail the
228 match if match_const_int or match_float_constant return false.
229 (mips_ip): Update accordingly.
230 (mips16_ip): Likewise. Undo null termination of instruction name
231 once lookup is complete.
232
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2332013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
234
235 * config/tc-mips.c (mips_insn_error_format): New enum.
236 (mips_insn_error): New struct.
237 (insn_error): Change to a mips_insn_error.
238 (clear_insn_error, set_insn_error_format, set_insn_error)
239 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
240 functions.
241 (mips_parse_argument_token, md_assemble, match_insn)
242 (match_mips16_insn): Use them instead of manipulating insn_error
243 directly.
244 (mips_ip, mips16_ip): Likewise. Simplify control flow.
245
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2462013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
247
248 * config/tc-mips.c (normalize_constant_expr): Move further up file.
249 (normalize_address_expr): Likewise.
250 (match_insn, match_mips16_insn): New functions, split out from...
251 (mips_ip, mips16_ip): ...here.
252
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2532013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
254
255 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
256 OP_OPTIONAL_REG.
257 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
258 for optional operands.
259
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AM
2602013-08-16 Alan Modra <amodra@gmail.com>
261
262 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
263 modifiers generally.
264
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2652013-08-16 Alan Modra <amodra@gmail.com>
266
267 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
268
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2692013-08-14 David Edelsohn <dje.gcc@gmail.com>
270
271 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
272 argument as alignment.
273
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2742013-08-09 Nick Clifton <nickc@redhat.com>
275
276 * config/tc-rl78.c (elf_flags): New variable.
277 (enum options): Add OPTION_G10.
278 (md_longopts): Add mg10.
279 (md_parse_option): Parse -mg10.
280 (rl78_elf_final_processing): New function.
281 * config/tc-rl78.c (tc_final_processing): Define.
282 * doc/c-rl78.texi: Document -mg10 option.
283
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2842013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
285
286 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
287 suffixes to be elided too.
288 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
289 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
290 to be omitted too.
291
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2922013-08-05 John Tytgat <john@bass-software.com>
293
294 * po/POTFILES.in: Regenerate.
295
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2962013-08-05 Eric Botcazou <ebotcazou@adacore.com>
297 Konrad Eisele <konrad@gaisler.com>
298
299 * config/tc-sparc.c (sparc_arch_types): Add leon.
300 (sparc_arch): Move sparc4 around and add leon.
301 (sparc_target_format): Document -Aleon.
302 * doc/c-sparc.texi: Likewise.
303
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3042013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
305
306 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
307
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3082013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
309 Richard Sandiford <rdsandiford@googlemail.com>
310
311 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
312 (RWARN): Bump to 0x8000000.
313 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
314 (RTYPE_R5900_ACC): New register types.
315 (RTYPE_MASK): Include them.
316 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
317 macros.
318 (reg_names): Include them.
319 (mips_parse_register_1): New function, split out from...
320 (mips_parse_register): ...here. Add a channels_ptr parameter.
321 Look for VU0 channel suffixes when nonnull.
322 (reg_lookup): Update the call to mips_parse_register.
323 (mips_parse_vu0_channels): New function.
324 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
325 (mips_operand_token): Add a "channels" field to the union.
326 Extend the comment above "ch" to OT_DOUBLE_CHAR.
327 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
328 (mips_parse_argument_token): Handle channel suffixes here too.
329 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
330 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
331 Handle '#' formats.
332 (md_begin): Register $vfN and $vfI registers.
333 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
334 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
335 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
336 (match_vu0_suffix_operand): New function.
337 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
338 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
339 (mips_lookup_insn): New function.
340 (mips_ip): Use it. Allow "+K" operands to be elided at the end
341 of an instruction. Handle '#' sequences.
342
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3432013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
344
345 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
346 values and use it instead of sreg, treg, xreg, etc.
347
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3482013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
349
350 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
351 and mips_int_operand_max.
352 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
353 Delete.
354 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
355 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
356 instead of mips16_immed_operand.
357
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3582013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
359
360 * config/tc-mips.c (mips16_macro): Don't use move_register.
361 (mips16_ip): Allow macros to use 'p'.
362
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3632013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
364
365 * config/tc-mips.c (MAX_OPERANDS): New macro.
366 (mips_operand_array): New structure.
367 (mips_operands, mips16_operands, micromips_operands): New arrays.
368 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
369 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
370 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
371 (micromips_to_32_reg_q_map): Delete.
372 (insn_operands, insn_opno, insn_extract_operand): New functions.
373 (validate_mips_insn): Take a mips_operand_array as argument and
374 use it to build up a list of operands. Extend to handle INSN_MACRO
375 and MIPS16.
376 (validate_mips16_insn): New function.
377 (validate_micromips_insn): Take a mips_operand_array as argument.
378 Handle INSN_MACRO.
379 (md_begin): Initialize mips_operands, mips16_operands and
380 micromips_operands. Call validate_mips_insn and
381 validate_micromips_insn for macro instructions too.
382 Call validate_mips16_insn for MIPS16 instructions.
383 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
384 New functions.
385 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
386 them. Handle INSN_UDI.
387 (get_append_method): Use gpr_read_mask.
388
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3892013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
392 flags for MIPS16 and non-MIPS16 instructions.
393 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
394 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
395 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
396 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
397 and non-MIPS16 instructions. Fix formatting.
398
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3992013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
400
401 * config/tc-mips.c (reg_needs_delay): Move later in file.
402 Use gpr_write_mask.
403 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
404
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4052013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
406 Alexander Ivchenko <alexander.ivchenko@intel.com>
407 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
408 Sergey Lega <sergey.s.lega@intel.com>
409 Anna Tikhonova <anna.tikhonova@intel.com>
410 Ilya Tocar <ilya.tocar@intel.com>
411 Andrey Turetskiy <andrey.turetskiy@intel.com>
412 Ilya Verbin <ilya.verbin@intel.com>
413 Kirill Yukhin <kirill.yukhin@intel.com>
414 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
415
416 * config/tc-i386-intel.c (O_zmmword_ptr): New.
417 (i386_types): Add zmmword.
418 (i386_intel_simplify_register): Allow regzmm.
419 (i386_intel_simplify): Handle zmmwords.
420 (i386_intel_operand): Handle RC/SAE, vector operations and
421 zmmwords.
422 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
423 (struct RC_Operation): New.
424 (struct Mask_Operation): New.
425 (struct Broadcast_Operation): New.
426 (vex_prefix): Size of bytes increased to 4 to support EVEX
427 encoding.
428 (enum i386_error): Add new error codes: unsupported_broadcast,
429 broadcast_not_on_src_operand, broadcast_needed,
430 unsupported_masking, mask_not_on_destination, no_default_mask,
431 unsupported_rc_sae, rc_sae_operand_not_last_imm,
432 invalid_register_operand, try_vector_disp8.
433 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
434 rounding, broadcast, memshift.
435 (struct RC_name): New.
436 (RC_NamesTable): New.
437 (evexlig): New.
438 (evexwig): New.
439 (extra_symbol_chars): Add '{'.
440 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
441 (i386_operand_type): Add regzmm, regmask and vec_disp8.
442 (match_mem_size): Handle zmmwords.
443 (operand_type_match): Handle zmm-registers.
444 (mode_from_disp_size): Handle vec_disp8.
445 (fits_in_vec_disp8): New.
446 (md_begin): Handle {} properly.
447 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
448 (build_vex_prefix): Handle vrex.
449 (build_evex_prefix): New.
450 (process_immext): Adjust to properly handle EVEX.
451 (md_assemble): Add EVEX encoding support.
452 (swap_2_operands): Correctly handle operands with masking,
453 broadcasting or RC/SAE.
454 (check_VecOperands): Support EVEX features.
455 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
456 (match_template): Support regzmm and handle new error codes.
457 (process_suffix): Handle zmmwords and zmm-registers.
458 (check_byte_reg): Extend to zmm-registers.
459 (process_operands): Extend to zmm-registers.
460 (build_modrm_byte): Handle EVEX.
461 (output_insn): Adjust to properly handle EVEX case.
462 (disp_size): Handle vec_disp8.
463 (output_disp): Support compressed disp8*N evex feature.
464 (output_imm): Handle RC/SAE immediates properly.
465 (check_VecOperations): New.
466 (i386_immediate): Handle EVEX features.
467 (i386_index_check): Handle zmmwords and zmm-registers.
468 (RC_SAE_immediate): New.
469 (i386_att_operand): Handle EVEX features.
470 (parse_real_register): Add a check for ZMM/Mask registers.
471 (OPTION_MEVEXLIG): New.
472 (OPTION_MEVEXWIG): New.
473 (md_longopts): Add mevexlig and mevexwig.
474 (md_parse_option): Handle mevexlig and mevexwig options.
475 (md_show_usage): Add description for mevexlig and mevexwig.
476 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
477 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
478
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L
4792013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
480
481 * config/tc-i386.c (cpu_arch): Add .sha.
482 * doc/c-i386.texi: Document sha/.sha.
483
7e8b059b
L
4842013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
485 Kirill Yukhin <kirill.yukhin@intel.com>
486 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
487
488 * config/tc-i386.c (BND_PREFIX): New.
489 (struct _i386_insn): Add new field bnd_prefix.
490 (add_bnd_prefix): New.
491 (cpu_arch): Add MPX.
492 (i386_operand_type): Add regbnd.
493 (md_assemble): Handle BND prefixes.
494 (parse_insn): Likewise.
495 (output_branch): Likewise.
496 (output_jump): Likewise.
497 (build_modrm_byte): Handle regbnd.
498 (OPTION_MADD_BND_PREFIX): New.
499 (md_longopts): Add entry for 'madd-bnd-prefix'.
500 (md_parse_option): Handle madd-bnd-prefix option.
501 (md_show_usage): Add description for madd-bnd-prefix
502 option.
503 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
504
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5052013-07-24 Tristan Gingold <gingold@adacore.com>
506
507 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
508 xcoff targets.
509
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5102013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
511
512 * config/tc-s390.c (s390_machine): Don't force the .machine
513 argument to lower case.
514
e673710a
KT
5152013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
516
517 * config/tc-arm.c (s_arm_arch_extension): Improve error message
518 for invalid extension.
519
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YZ
5202013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
521
522 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
523 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
524 (aarch64_abi): New variable.
525 (ilp32_p): Change to be a macro.
526 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
527 (struct aarch64_option_abi_value_table): New struct.
528 (aarch64_abis): New table.
529 (aarch64_parse_abi): New function.
530 (aarch64_long_opts): Add entry for -mabi=.
531 * doc/as.texinfo (Target AArch64 options): Document -mabi.
532 * doc/c-aarch64.texi: Likewise.
533
faf786e6
NC
5342013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
535
536 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
537 unsigned comparison.
538
f0c00282
NC
5392013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
540
cbe02d4f 541 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 542 RX610.
cbe02d4f 543 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
544 check floating point operation support for target RX100 and
545 RX200.
cbe02d4f
AM
546 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
547 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
548 RX200, RX600, and RX610
f0c00282 549
8c997c27
NC
5502013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
551
552 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
553
8be59acb
NC
5542013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
555
556 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
557 * doc/c-avr.texi: Likewise.
558
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RS
5592013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
560
561 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
562 error with older GCCs.
563 (mips16_macro_build): Dereference args.
564
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RS
5652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
568 New functions, split out from...
569 (reg_lookup): ...here. Remove itbl support.
570 (reglist_lookup): Delete.
571 (mips_operand_token_type): New enum.
572 (mips_operand_token): New structure.
573 (mips_operand_tokens): New variable.
574 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
575 (mips_parse_arguments): New functions.
576 (md_begin): Initialize mips_operand_tokens.
577 (mips_arg_info): Add a token field. Remove optional_reg field.
578 (match_char, match_expression): New functions.
579 (match_const_int): Use match_expression. Remove "s" argument
580 and return a boolean result. Remove O_register handling.
581 (match_regno, match_reg, match_reg_range): New functions.
582 (match_int_operand, match_mapped_int_operand, match_msb_operand)
583 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
584 (match_addiusp_operand, match_clo_clz_dest_operand)
585 (match_lwm_swm_list_operand, match_entry_exit_operand)
586 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
587 (match_tied_reg_operand): Remove "s" argument and return a boolean
588 result. Match tokens rather than text. Update calls to
589 match_const_int. Rely on match_regno to call check_regno.
590 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
591 "arg" argument. Return a boolean result.
592 (parse_float_constant): Replace with...
593 (match_float_constant): ...this new function.
594 (match_operand): Remove "s" argument and return a boolean result.
595 Update calls to subfunctions.
596 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
597 rather than string-parsing routines. Update handling of optional
598 registers for token scheme.
599
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6002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
601
602 * config/tc-mips.c (parse_float_constant): Split out from...
603 (mips_ip): ...here.
604
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RS
6052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
606
607 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
608 Delete.
609
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RS
6102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
611
612 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
613 (match_entry_exit_operand): New function.
614 (match_save_restore_list_operand): Likewise.
615 (match_operand): Use them.
616 (check_absolute_expr): Delete.
617 (mips16_ip): Rewrite main parsing loop to use mips_operands.
618
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RS
6192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
620
621 * config/tc-mips.c: Enable functions commented out in previous patch.
622 (SKIP_SPACE_TABS): Move further up file.
623 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
624 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
625 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
626 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
627 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
628 (micromips_imm_b_map, micromips_imm_c_map): Delete.
629 (mips_lookup_reg_pair): Delete.
630 (macro): Use report_bad_range and report_bad_field.
631 (mips_immed, expr_const_in_range): Delete.
632 (mips_ip): Rewrite main parsing loop to use new functions.
633
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RS
6342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
635
636 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
637 Change return type to bfd_boolean.
638 (report_bad_range, report_bad_field): New functions.
639 (mips_arg_info): New structure.
640 (match_const_int, convert_reg_type, check_regno, match_int_operand)
641 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
642 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
643 (match_addiusp_operand, match_clo_clz_dest_operand)
644 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
645 (match_pc_operand, match_tied_reg_operand, match_operand)
646 (check_completed_insn): New functions, commented out for now.
647
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RS
6482013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
649
650 * config/tc-mips.c (insn_insert_operand): New function.
651 (macro_build, mips16_macro_build): Put null character check
652 in the for loop and convert continues to breaks. Use operand
653 structures to handle constant operands.
654
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RS
6552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
656
657 * config/tc-mips.c (validate_mips_insn): Move further up file.
658 Add insn_bits and decode_operand arguments. Use the mips_operand
659 fields to work out which bits an operand occupies. Detect double
660 definitions.
661 (validate_micromips_insn): Move further up file. Call into
662 validate_mips_insn.
663
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RS
6642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
665
666 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
667
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RS
6682013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
669
670 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
671 and "~".
672 (macro): Update accordingly.
673
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RS
6742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
675
676 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
677 (imm_reloc): Delete.
678 (md_assemble): Remove imm_reloc handling.
679 (mips_ip): Update commentary. Use offset_expr and offset_reloc
680 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
681 Use a temporary array rather than imm_reloc when parsing
682 constant expressions. Remove imm_reloc initialization.
683 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
684 for the relaxable field. Use a relax_char variable to track the
685 type of this field. Remove imm_reloc initialization.
686
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6872013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
688
689 * config/tc-mips.c (mips16_ip): Handle "I".
690
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MR
6912013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
692
693 * config/tc-mips.c (mips_flag_nan2008): New variable.
694 (options): Add OPTION_NAN enum value.
695 (md_longopts): Handle it.
696 (md_parse_option): Likewise.
697 (s_nan): New function.
698 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
699 (md_show_usage): Add -mnan.
700
701 * doc/as.texinfo (Overview): Add -mnan.
702 * doc/c-mips.texi (MIPS Opts): Document -mnan.
703 (MIPS NaN Encodings): New node. Document .nan directive.
704 (MIPS-Dependent): List the new node.
705
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TG
7062013-07-09 Tristan Gingold <gingold@adacore.com>
707
708 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
709
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RS
7102013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
711
712 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
713 for 'A' and assume that the constant has been elided if the result
714 is an O_register.
715
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RS
7162013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
717
718 * config/tc-mips.c (gprel16_reloc_p): New function.
719 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
720 BFD_RELOC_UNUSED.
721 (offset_high_part, small_offset_p): New functions.
722 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
723 register load and store macros, handle the 16-bit offset case first.
724 If a 16-bit offset is not suitable for the instruction we're
725 generating, load it into the temporary register using
726 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
727 M_L_DAB code once the address has been constructed. For double load
728 and store macros, again handle the 16-bit offset case first.
729 If the second register cannot be accessed from the same high
730 part as the first, load it into AT using ADDRESS_ADDI_INSN.
731 Fix the handling of LD in cases where the first register is the
732 same as the base. Also handle the case where the offset is
733 not 16 bits and the second register cannot be accessed from the
734 same high part as the first. For unaligned loads and stores,
735 fuse the offbits == 12 and old "ab" handling. Apply this handling
736 whenever the second offset needs a different high part from the first.
737 Construct the offset using ADDRESS_ADDI_INSN where possible,
738 for offbits == 16 as well as offbits == 12. Use offset_reloc
739 when constructing the individual loads and stores.
740 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
741 and offset_reloc before matching against a particular opcode.
742 Handle elided 'A' constants. Allow 'A' constants to use
743 relocation operators.
744
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RS
7452013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
746
747 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
748 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
749 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
750
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RS
7512013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
752
753 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
754 Require the msb to be <= 31 for "+s". Check that the size is <= 31
755 for both "+s" and "+S".
756
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RS
7572013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
758
759 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
760 (mips_ip, mips16_ip): Handle "+i".
761
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RS
7622013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
763
764 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
765 (micromips_to_32_reg_h_map): Rename to...
766 (micromips_to_32_reg_h_map1): ...this.
767 (micromips_to_32_reg_i_map): Rename to...
768 (micromips_to_32_reg_h_map2): ...this.
769 (mips_lookup_reg_pair): New function.
770 (gpr_write_mask, macro): Adjust after above renaming.
771 (validate_micromips_insn): Remove "mi" handling.
772 (mips_ip): Likewise. Parse both registers in a pair for "mh".
773
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RS
7742013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
775
776 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
777 (mips_ip): Remove "+D" and "+T" handling.
778
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7792013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
780
781 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
782 relocs.
783
2c0a3565
MS
7842013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
785
4aa2c5e2
MS
786 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
787
7882013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
789
2c0a3565
MS
790 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
791 (aarch64_force_relocation): Likewise.
792
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AM
7932013-07-02 Alan Modra <amodra@gmail.com>
794
795 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
796
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MR
7972013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
798
799 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
800 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
801 Replace @sc{mips16} with literal `MIPS16'.
802 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
803
a6bb11b2
YZ
8042013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
805
806 * config/tc-aarch64.c (reloc_table): Replace
807 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
808 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
809 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
810 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
811 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
812 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
813 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
814 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
815 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
816 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
817 (aarch64_force_relocation): Likewise.
818
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YZ
8192013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
820
821 * config/tc-aarch64.c (ilp32_p): New static variable.
822 (elf64_aarch64_target_format): Return the target according to the
823 value of 'ilp32_p'.
824 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
825 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
826 (aarch64_dwarf2_addr_size): New function.
827 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
828 (DWARF2_ADDR_SIZE): New define.
829
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8302013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
831
832 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
833
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RS
8342013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
835
836 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
837
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MR
8382013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
839
840 * config/tc-mips.c (mips_set_options): Add insn32 member.
841 (mips_opts): Initialize it.
842 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
843 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
844 (md_longopts): Add "minsn32" and "mno-insn32" options.
845 (is_size_valid): Handle insn32 mode.
846 (md_assemble): Pass instruction string down to macro.
847 (brk_fmt): Add second dimension and insn32 mode initializers.
848 (mfhl_fmt): Likewise.
849 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
850 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
851 (macro_build_jalr, move_register): Handle insn32 mode.
852 (macro_build_branch_rs): Likewise.
853 (macro): Handle insn32 mode.
854 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
855 (mips_ip): Handle insn32 mode.
856 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
857 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
858 (mips_handle_align): Handle insn32 mode.
859 (md_show_usage): Add -minsn32 and -mno-insn32.
860
861 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
862 -mno-insn32 options.
863 (-minsn32, -mno-insn32): New options.
864 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
865 options.
866 (MIPS assembly options): New node. Document .set insn32 and
867 .set noinsn32.
868 (MIPS-Dependent): List the new node.
869
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NC
8702013-06-25 Nick Clifton <nickc@redhat.com>
871
872 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
873 the PC in indirect addressing on 430xv2 parts.
874 (msp430_operands): Add version test to hardware bug encoding
875 restrictions.
876
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RM
8772013-06-24 Roland McGrath <mcgrathr@google.com>
878
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RM
879 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
880 so it skips whitespace before it.
881 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
882
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RM
883 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
884 (arm_reg_parse_multi): Skip whitespace first.
885 (parse_reg_list): Likewise.
886 (parse_vfp_reg_list): Likewise.
887 (s_arm_unwind_save_mmxwcg): Likewise.
888
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NC
8892013-06-24 Nick Clifton <nickc@redhat.com>
890
891 PR gas/15623
892 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
893
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RS
8942013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
895
896 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
897
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RS
8982013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
899
900 * config/tc-mips.c: Assert that offsetT and valueT are at least
901 8 bytes in size.
902 (GPR_SMIN, GPR_SMAX): New macros.
903 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
904
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RS
9052013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
906
907 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
908 conditions. Remove any code deselected by them.
909 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
910
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RS
9112013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * NEWS: Note removal of ECOFF support.
914 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
915 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
916 (MULTI_CFILES): Remove config/e-mipsecoff.c.
917 * Makefile.in: Regenerate.
918 * configure.in: Remove MIPS ECOFF references.
919 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
920 Delete cases.
921 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
922 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
923 (mips-*-*): ...this single case.
924 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
925 MIPS emulations to be e-mipself*.
926 * configure: Regenerate.
927 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
928 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
929 (mips-*-sysv*): Remove coff and ecoff cases.
930 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
931 * ecoff.c: Remove reference to MIPS ECOFF.
932 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
933 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
934 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
935 (mips_hi_fixup): Tweak comment.
936 (append_insn): Require a howto.
937 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
938
98508b2a
RS
9392013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
940
941 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
942 Use "CPU" instead of "cpu".
943 * doc/c-mips.texi: Likewise.
944 (MIPS Opts): Rename to MIPS Options.
945 (MIPS option stack): Rename to MIPS Option Stack.
946 (MIPS ASE instruction generation overrides): Rename to
947 MIPS ASE Instruction Generation Overrides (for now).
948 (MIPS floating-point): Rename to MIPS Floating-Point.
949
fc16f8cc
RS
9502013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
951
952 * doc/c-mips.texi (MIPS Macros): New section.
953 (MIPS Object): Replace with...
954 (MIPS Small Data): ...this new section.
955
5a7560b5
RS
9562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
957
958 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
959 Capitalize name. Use @kindex instead of @cindex for .set entries.
960
a1b86ab7
RS
9612013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
962
963 * doc/c-mips.texi (MIPS Stabs): Remove section.
964
c6278170
RS
9652013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
966
967 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
968 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
969 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
970 (ISA_SUPPORTS_VIRT64_ASE): Delete.
971 (mips_ase): New structure.
972 (mips_ases): New table.
973 (FP64_ASES): New macro.
974 (mips_ase_groups): New array.
975 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
976 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
977 functions.
978 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
979 (md_parse_option): Use mips_ases and mips_set_ase instead of
980 separate case statements for each ASE option.
981 (mips_after_parse_args): Use FP64_ASES. Use
982 mips_check_isa_supports_ases to check the ASEs against
983 other options.
984 (s_mipsset): Use mips_ases and mips_set_ase instead of
985 separate if statements for each ASE option. Use
986 mips_check_isa_supports_ases, even when a non-ASE option
987 is specified.
988
63a4bc21
KT
9892013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
990
991 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
992
c31f3936
RS
9932013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
994
995 * config/tc-mips.c (md_shortopts, options, md_longopts)
996 (md_longopts_size): Move earlier in file.
997
846ef2d0
RS
9982013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
999
1000 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1001 with a single "ase" bitmask.
1002 (mips_opts): Update accordingly.
1003 (file_ase, file_ase_explicit): New variables.
1004 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1005 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1006 (ISA_HAS_ROR): Adjust for mips_set_options change.
1007 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1008 (mips_ip): Adjust for mips_set_options change.
1009 (md_parse_option): Likewise. Update file_ase_explicit.
1010 (mips_after_parse_args): Adjust for mips_set_options change.
1011 Use bitmask operations to select the default ASEs. Set file_ase
1012 rather than individual per-ASE variables.
1013 (s_mipsset): Adjust for mips_set_options change.
1014 (mips_elf_final_processing): Test file_ase rather than
1015 file_ase_mdmx. Remove commented-out code.
1016
d16afab6
RS
10172013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1018
1019 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1020 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1021 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1022 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1023 (mips_after_parse_args): Use the new "ase" field to choose
1024 the default ASEs.
1025 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1026 "ase" field.
1027
e83a675f
RE
10282013-06-18 Richard Earnshaw <rearnsha@arm.com>
1029
1030 * config/tc-arm.c (symbol_preemptible): New function.
1031 (relax_branch): Use it.
1032
7f3c4072
CM
10332013-06-17 Catherine Moore <clm@codesourcery.com>
1034 Maciej W. Rozycki <macro@codesourcery.com>
1035 Chao-Ying Fu <fu@mips.com>
1036
1037 * config/tc-mips.c (mips_set_options): Add ase_eva.
1038 (mips_set_options mips_opts): Add ase_eva.
1039 (file_ase_eva): Declare.
1040 (ISA_SUPPORTS_EVA_ASE): Define.
1041 (IS_SEXT_9BIT_NUM): Define.
1042 (MIPS_CPU_ASE_EVA): Define.
1043 (is_opcode_valid): Add support for ase_eva.
1044 (macro_build): Likewise.
1045 (macro): Likewise.
1046 (validate_mips_insn): Likewise.
1047 (validate_micromips_insn): Likewise.
1048 (mips_ip): Likewise.
1049 (options): Add OPTION_EVA and OPTION_NO_EVA.
1050 (md_longopts): Add -meva and -mno-eva.
1051 (md_parse_option): Process new options.
1052 (mips_after_parse_args): Check for valid EVA combinations.
1053 (s_mipsset): Likewise.
1054
e410add4
RS
10552013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1056
1057 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1058 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1059 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1060 (dwarf2_gen_line_info_1): Update call accordingly.
1061 (dwarf2_move_insn): New function.
1062 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1063
6a50d470
RS
10642013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1065
1066 Revert:
1067
1068 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1069
1070 PR gas/13024
1071 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1072 (dwarf2_gen_line_info_1): Delete.
1073 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1074 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1075 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1076 (dwarf2_directive_loc): Push previous .locs instead of generating
1077 them immediately.
1078
f122319e
CF
10792013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1080
1081 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1082 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1083
909c7f9c
NC
10842013-06-13 Nick Clifton <nickc@redhat.com>
1085
1086 PR gas/15602
1087 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1088 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1089 function. Generates an error if the adjusted offset is out of a
1090 16-bit range.
1091
5d5755a7
SL
10922013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1093
1094 * config/tc-nios2.c (md_apply_fix): Mask constant
1095 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1096
3bf0dbfb
MR
10972013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1098
1099 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1100 MIPS-3D instructions either.
1101 (md_convert_frag): Update the COPx branch mask accordingly.
1102
1103 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1104 option.
1105 * doc/as.texinfo (Overview): Add --relax-branch and
1106 --no-relax-branch.
1107 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1108 --no-relax-branch.
1109
9daf7bab
SL
11102013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1111
1112 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1113 omitted.
1114
d301a56b
RS
11152013-06-08 Catherine Moore <clm@codesourcery.com>
1116
1117 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1118 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1119 (append_insn): Change INSN_xxxx to ASE_xxxx.
1120
7bab7634
DC
11212013-06-01 George Thomas <george.thomas@atmel.com>
1122
cbe02d4f 1123 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1124 AVR_ISA_XMEGAU
1125
f60cf82f
L
11262013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1127
1128 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1129 for ELF.
1130
a3f278e2
CM
11312013-05-31 Paul Brook <paul@codesourcery.com>
1132
a3f278e2
CM
1133 * config/tc-mips.c (s_ehword): New.
1134
067ec077
CM
11352013-05-30 Paul Brook <paul@codesourcery.com>
1136
1137 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1138
d6101ac2
MR
11392013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1140
1141 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1142 convert relocs who have no relocatable field either. Rephrase
1143 the conditional so that the PC-relative check is only applied
1144 for REL targets.
1145
f19ccbda
MR
11462013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1147
1148 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1149 calculation.
1150
418009c2
YZ
11512013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1152
1153 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1154 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1155 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1156 (md_apply_fix): Likewise.
1157 (aarch64_force_relocation): Likewise.
1158
0a8897c7
KT
11592013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1160
1161 * config/tc-arm.c (it_fsm_post_encode): Improve
1162 warning messages about deprecated IT block formats.
1163
89d2a2a3
MS
11642013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1165
1166 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1167 inside fx_done condition.
1168
c77c0862
RS
11692013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1170
1171 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1172
c0637f3a
PB
11732013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1174
1175 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1176 and clean up warning when using PRINT_OPCODE_TABLE.
1177
5656a981
AM
11782013-05-20 Alan Modra <amodra@gmail.com>
1179
1180 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1181 and data fixups performing shift/high adjust/sign extension on
1182 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1183 when writing data fixups rather than recalculating size.
1184
997b26e8
JBG
11852013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1186
1187 * doc/c-msp430.texi: Fix typo.
1188
9f6e76f4
TG
11892013-05-16 Tristan Gingold <gingold@adacore.com>
1190
1191 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1192 are also TOC symbols.
1193
638d3803
NC
11942013-05-16 Nick Clifton <nickc@redhat.com>
1195
1196 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1197 Add -mcpu command to specify core type.
997b26e8 1198 * doc/c-msp430.texi: Update documentation.
638d3803 1199
b015e599
AP
12002013-05-09 Andrew Pinski <apinski@cavium.com>
1201
1202 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1203 (mips_opts): Update for the new field.
1204 (file_ase_virt): New variable.
1205 (ISA_SUPPORTS_VIRT_ASE): New macro.
1206 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1207 (MIPS_CPU_ASE_VIRT): New define.
1208 (is_opcode_valid): Handle ase_virt.
1209 (macro_build): Handle "+J".
1210 (validate_mips_insn): Likewise.
1211 (mips_ip): Likewise.
1212 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1213 (md_longopts): Add mvirt and mnovirt
1214 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1215 (mips_after_parse_args): Handle ase_virt field.
1216 (s_mipsset): Handle "virt" and "novirt".
1217 (mips_elf_final_processing): Add a comment about virt ASE might need
1218 a new flag.
1219 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1220 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1221 Document ".set virt" and ".set novirt".
1222
da8094d7
AM
12232013-05-09 Alan Modra <amodra@gmail.com>
1224
1225 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1226 control of operand flag bits.
1227
c5f8c205
AM
12282013-05-07 Alan Modra <amodra@gmail.com>
1229
1230 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1231 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1232 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1233 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1234 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1235 Shift and sign-extend fieldval for use by some VLE reloc
1236 operand->insert functions.
1237
b47468a6
CM
12382013-05-06 Paul Brook <paul@codesourcery.com>
1239 Catherine Moore <clm@codesourcery.com>
1240
c5f8c205
AM
1241 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1242 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1243 (md_apply_fix): Likewise.
1244 (tc_gen_reloc): Likewise.
1245
2de39019
CM
12462013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1247
1248 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1249 (mips_fix_adjustable): Adjust pc-relative check to use
1250 limited_pc_reloc_p.
1251
754e2bb9
RS
12522013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1253
1254 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1255 (s_mips_stab): Do not restrict to stabn only.
1256
13761a11
NC
12572013-05-02 Nick Clifton <nickc@redhat.com>
1258
1259 * config/tc-msp430.c: Add support for the MSP430X architecture.
1260 Add code to insert a NOP instruction after any instruction that
1261 might change the interrupt state.
1262 Add support for the LARGE memory model.
1263 Add code to initialise the .MSP430.attributes section.
1264 * config/tc-msp430.h: Add support for the MSP430X architecture.
1265 * doc/c-msp430.texi: Document the new -mL and -mN command line
1266 options.
1267 * NEWS: Mention support for the MSP430X architecture.
1268
df26367c
MR
12692013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1270
1271 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1272 alpha*-*-linux*ecoff*.
1273
f02d8318
CF
12742013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1275
1276 * config/tc-mips.c (mips_ip): Add sizelo.
1277 For "+C", "+G", and "+H", set sizelo and compare against it.
1278
b40bf0a2
NC
12792013-04-29 Nick Clifton <nickc@redhat.com>
1280
1281 * as.c (Options): Add -gdwarf-sections.
1282 (parse_args): Likewise.
1283 * as.h (flag_dwarf_sections): Declare.
1284 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1285 (process_entries): When -gdwarf-sections is enabled generate
1286 fragmentary .debug_line sections.
1287 (out_debug_line): Set the section for the .debug_line section end
1288 symbol.
1289 * doc/as.texinfo: Document -gdwarf-sections.
1290 * NEWS: Mention -gdwarf-sections.
1291
8eeccb77 12922013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1293
1294 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1295 according to the target parameter. Don't call s_segm since s_segm
1296 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1297 initialized yet.
1298 (md_begin): Call s_segm according to target parameter from command
1299 line.
1300
49926cd0
AM
13012013-04-25 Alan Modra <amodra@gmail.com>
1302
1303 * configure.in: Allow little-endian linux.
1304 * configure: Regenerate.
1305
e3031850
SL
13062013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1307
1308 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1309 "fstatus" control register to "eccinj".
1310
cb948fc0
KT
13112013-04-19 Kai Tietz <ktietz@redhat.com>
1312
1313 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1314
4455e9ad
JB
13152013-04-15 Julian Brown <julian@codesourcery.com>
1316
1317 * expr.c (add_to_result, subtract_from_result): Make global.
1318 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1319 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1320 subtract_from_result to handle extra bit of precision for .sleb128
1321 directive operands.
1322
956a6ba3
JB
13232013-04-10 Julian Brown <julian@codesourcery.com>
1324
1325 * read.c (convert_to_bignum): Add sign parameter. Use it
1326 instead of X_unsigned to determine sign of resulting bignum.
1327 (emit_expr): Pass extra argument to convert_to_bignum.
1328 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1329 X_extrabit to convert_to_bignum.
1330 (parse_bitfield_cons): Set X_extrabit.
1331 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1332 Initialise X_extrabit field as appropriate.
1333 (add_to_result): New.
1334 (subtract_from_result): New.
1335 (expr): Use above.
1336 * expr.h (expressionS): Add X_extrabit field.
1337
eb9f3f00
JB
13382013-04-10 Jan Beulich <jbeulich@suse.com>
1339
1340 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1341 register being PC when is_t or writeback, and use distinct
1342 diagnostic for the latter case.
1343
ccb84d65
JB
13442013-04-10 Jan Beulich <jbeulich@suse.com>
1345
1346 * gas/config/tc-arm.c (parse_operands): Re-write
1347 po_barrier_or_imm().
1348 (do_barrier): Remove bogus constraint().
1349 (do_t_barrier): Remove.
1350
4d13caa0
NC
13512013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1352
1353 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1354 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1355 ATmega2564RFR2
1356 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1357
16d02dc9
JB
13582013-04-09 Jan Beulich <jbeulich@suse.com>
1359
1360 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1361 Use local variable Rt in more places.
1362 (do_vmsr): Accept all control registers.
1363
05ac0ffb
JB
13642013-04-09 Jan Beulich <jbeulich@suse.com>
1365
1366 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1367 if there was none specified for moves between scalar and core
1368 register.
1369
2d51fb74
JB
13702013-04-09 Jan Beulich <jbeulich@suse.com>
1371
1372 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1373 NEON_ALL_LANES case.
1374
94dcf8bf
JB
13752013-04-08 Jan Beulich <jbeulich@suse.com>
1376
1377 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1378 PC-relative VSTR.
1379
1472d06f
JB
13802013-04-08 Jan Beulich <jbeulich@suse.com>
1381
1382 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1383 entry to sp_fiq.
1384
0c76cae8
AM
13852013-04-03 Alan Modra <amodra@gmail.com>
1386
1387 * doc/as.texinfo: Add support to generate man options for h8300.
1388 * doc/c-h8300.texi: Likewise.
1389
92eb40d9
RR
13902013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1391
1392 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1393 Cortex-A57.
1394
51dcdd4d
NC
13952013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1396
1397 PR binutils/15068
1398 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1399
c5d685bf
NC
14002013-03-26 Nick Clifton <nickc@redhat.com>
1401
9b978282
NC
1402 PR gas/15295
1403 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1404 start of the file each time.
1405
c5d685bf
NC
1406 PR gas/15178
1407 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1408 FreeBSD targets.
1409
9699c833
TG
14102013-03-26 Douglas B Rupp <rupp@gnat.com>
1411
1412 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1413 after fixup.
1414
4755303e
WN
14152013-03-21 Will Newton <will.newton@linaro.org>
1416
1417 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1418 pc-relative str instructions in Thumb mode.
1419
81f5558e
NC
14202013-03-21 Michael Schewe <michael.schewe@gmx.net>
1421
1422 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1423 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1424 R_H8_DISP32A16.
1425 * config/tc-h8300.h: Remove duplicated defines.
1426
71863e73
NC
14272013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1428
1429 PR gas/15282
1430 * tc-avr.c (mcu_has_3_byte_pc): New function.
1431 (tc_cfi_frame_initial_instructions): Call it to find return
1432 address size.
1433
795b8e6b
NC
14342013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1435
1436 PR gas/15095
1437 * config/tc-tic6x.c (tic6x_try_encode): Handle
1438 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1439 encode register pair numbers when required.
1440
ba86b375
WN
14412013-03-15 Will Newton <will.newton@linaro.org>
1442
1443 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1444 in vstr in Thumb mode for pre-ARMv7 cores.
1445
9e6f3811
AS
14462013-03-14 Andreas Schwab <schwab@suse.de>
1447
1448 * doc/c-arc.texi (ARC Directives): Revert last change and use
1449 @itemize instead of @table.
1450 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1451
b10bf8c5
NC
14522013-03-14 Nick Clifton <nickc@redhat.com>
1453
1454 PR gas/15273
1455 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1456 NULL message, instead just check ARM_CPU_IS_ANY directly.
1457
ba724cfc
NC
14582013-03-14 Nick Clifton <nickc@redhat.com>
1459
1460 PR gas/15212
9e6f3811 1461 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1462 for table format.
1463 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1464 to the @item directives.
1465 (ARM-Neon-Alignment): Move to correct place in the document.
1466 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1467 formatting.
1468 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1469 @smallexample.
1470
531a94fd
SL
14712013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1472
1473 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1474 case. Add default BAD_CASE to switch.
1475
dad60f8e
SL
14762013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1477
1478 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1479 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1480
dd5181d5
KT
14812013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1482
1483 * config/tc-arm.c (crc_ext_armv8): New feature set.
1484 (UNPRED_REG): New macro.
1485 (do_crc32_1): New function.
1486 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1487 do_crc32ch, do_crc32cw): Likewise.
1488 (TUEc): New macro.
1489 (insns): Add entries for crc32 mnemonics.
1490 (arm_extensions): Add entry for crc.
1491
8e723a10
CLT
14922013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1493
1494 * write.h (struct fix): Add fx_dot_frag field.
1495 (dot_frag): Declare.
1496 * write.c (dot_frag): New variable.
1497 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1498 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1499 * expr.c (expr): Save value of frag_now in dot_frag when setting
1500 dot_value.
1501 * read.c (emit_expr): Likewise. Delete comments.
1502
be05d201
L
15032013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1504
1505 * config/tc-i386.c (flag_code_names): Removed.
1506 (i386_index_check): Rewrote.
1507
62b0d0d5
YZ
15082013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1509
1510 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1511 add comment.
1512 (aarch64_double_precision_fmovable): New function.
1513 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1514 function; handle hexadecimal representation of IEEE754 encoding.
1515 (parse_operands): Update the call to parse_aarch64_imm_float.
1516
165de32a
L
15172013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1518
1519 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1520 (check_hle): Updated.
1521 (md_assemble): Likewise.
1522 (parse_insn): Likewise.
1523
d5de92cf
L
15242013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1525
1526 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1527 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1528 (parse_insn): Remove expecting_string_instruction. Set
1529 i.rep_prefix.
1530
e60bb1dd
YZ
15312013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1532
1533 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1534
aeebdd9b
YZ
15352013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1536
1537 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1538 for system registers.
1539
4107ae22
DD
15402013-02-27 DJ Delorie <dj@redhat.com>
1541
1542 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1543 (rl78_op): Handle %code().
1544 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1545 (tc_gen_reloc): Likwise; convert to a computed reloc.
1546 (md_apply_fix): Likewise.
1547
151fa98f
NC
15482013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1549
1550 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1551
70a8bc5b 15522013-02-25 Terry Guo <terry.guo@arm.com>
1553
1554 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1555 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1556 list of accepted CPUs.
1557
5c111e37
L
15582013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1559
1560 PR gas/15159
1561 * config/tc-i386.c (cpu_arch): Add ".smap".
1562
1563 * doc/c-i386.texi: Document smap.
1564
8a75745d
MR
15652013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1566
1567 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1568 mips_assembling_insn appropriately.
1569 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1570
79850f26
MR
15712013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1572
cf29fc61 1573 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1574 extraneous braces.
1575
4c261dff
NC
15762013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1577
5c111e37 1578 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1579
ea33f281
NC
15802013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1581
1582 * configure.tgt: Add nios2-*-rtems*.
1583
a1ccaec9
YZ
15842013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1585
1586 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1587 NULL.
1588
0aa27725
RS
15892013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1590
1591 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1592 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1593
da4339ed
NC
15942013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1595
1596 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1597 core.
1598
36591ba1 15992013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1600 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1601
1602 Based on patches from Altera Corporation.
1603
1604 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1605 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1606 * Makefile.in: Regenerated.
1607 * configure.tgt: Add case for nios2*-linux*.
1608 * config/obj-elf.c: Conditionally include elf/nios2.h.
1609 * config/tc-nios2.c: New file.
1610 * config/tc-nios2.h: New file.
1611 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1612 * doc/Makefile.in: Regenerated.
1613 * doc/all.texi: Set NIOSII.
1614 * doc/as.texinfo (Overview): Add Nios II options.
1615 (Machine Dependencies): Include c-nios2.texi.
1616 * doc/c-nios2.texi: New file.
1617 * NEWS: Note Altera Nios II support.
1618
94d4433a
AM
16192013-02-06 Alan Modra <amodra@gmail.com>
1620
1621 PR gas/14255
1622 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1623 Don't skip fixups with fx_subsy non-NULL.
1624 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1625 with fx_subsy non-NULL.
1626
ace9af6f
L
16272013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1628
1629 * doc/c-metag.texi: Add "@c man" markers.
1630
89d67ed9
AM
16312013-02-04 Alan Modra <amodra@gmail.com>
1632
1633 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1634 related code.
1635 (TC_ADJUST_RELOC_COUNT): Delete.
1636 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1637
89072bd6
AM
16382013-02-04 Alan Modra <amodra@gmail.com>
1639
1640 * po/POTFILES.in: Regenerate.
1641
f9b2d544
NC
16422013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1643
1644 * config/tc-metag.c: Make SWAP instruction less permissive with
1645 its operands.
1646
392ca752
DD
16472013-01-29 DJ Delorie <dj@redhat.com>
1648
1649 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1650 relocs in .word/.etc statements.
1651
427d0db6
RM
16522013-01-29 Roland McGrath <mcgrathr@google.com>
1653
1654 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1655 immediate value for 8-bit offset" error so it shows line info.
1656
4faf939a
JM
16572013-01-24 Joseph Myers <joseph@codesourcery.com>
1658
1659 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1660 for 64-bit output.
1661
78c8d46c
NC
16622013-01-24 Nick Clifton <nickc@redhat.com>
1663
1664 * config/tc-v850.c: Add support for e3v5 architecture.
1665 * doc/c-v850.texi: Mention new support.
1666
fb5b7503
NC
16672013-01-23 Nick Clifton <nickc@redhat.com>
1668
1669 PR gas/15039
1670 * config/tc-avr.c: Include dwarf2dbg.h.
1671
8ce3d284
L
16722013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1673
1674 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1675 (tc_i386_fix_adjustable): Likewise.
1676 (lex_got): Likewise.
1677 (tc_gen_reloc): Likewise.
1678
f5555712
YZ
16792013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1680
1681 * config/tc-aarch64.c (output_operand_error_record): Change to output
1682 the out-of-range error message as value-expected message if there is
1683 only one single value in the expected range.
1684 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1685 LSL #0 as a programmer-friendly feature.
1686
8fd4256d
L
16872013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1688
1689 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1690 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1691 BFD_RELOC_64_SIZE relocations.
1692 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1693 for it.
1694 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1695 relocations against local symbols.
1696
a5840dce
AM
16972013-01-16 Alan Modra <amodra@gmail.com>
1698
1699 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1700 finding some sort of toc syntax error, and break to avoid
1701 compiler uninit warning.
1702
af89796a
L
17032013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1704
1705 PR gas/15019
1706 * config/tc-i386.c (lex_got): Increment length by 1 if the
1707 relocation token is removed.
1708
dd42f060
NC
17092013-01-15 Nick Clifton <nickc@redhat.com>
1710
1711 * config/tc-v850.c (md_assemble): Allow signed values for
1712 V850E_IMMEDIATE.
1713
464e3686
SK
17142013-01-11 Sean Keys <skeys@ipdatasys.com>
1715
1716 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1717 git to cvs.
464e3686 1718
5817ffd1
PB
17192013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1720
1721 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1722 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1723 * config/tc-ppc.c (md_show_usage): Likewise.
1724 (ppc_handle_align): Handle power8's group ending nop.
1725
f4b1f6a9
SK
17262013-01-10 Sean Keys <skeys@ipdatasys.com>
1727
1728 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1729 that the assember exits after the opcodes have been printed.
f4b1f6a9 1730
34bca508
L
17312013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1732
1733 * app.c: Remove trailing white spaces.
1734 * as.c: Likewise.
1735 * as.h: Likewise.
1736 * cond.c: Likewise.
1737 * dw2gencfi.c: Likewise.
1738 * dwarf2dbg.h: Likewise.
1739 * ecoff.c: Likewise.
1740 * input-file.c: Likewise.
1741 * itbl-lex.h: Likewise.
1742 * output-file.c: Likewise.
1743 * read.c: Likewise.
1744 * sb.c: Likewise.
1745 * subsegs.c: Likewise.
1746 * symbols.c: Likewise.
1747 * write.c: Likewise.
1748 * config/tc-i386.c: Likewise.
1749 * doc/Makefile.am: Likewise.
1750 * doc/Makefile.in: Likewise.
1751 * doc/c-aarch64.texi: Likewise.
1752 * doc/c-alpha.texi: Likewise.
1753 * doc/c-arc.texi: Likewise.
1754 * doc/c-arm.texi: Likewise.
1755 * doc/c-avr.texi: Likewise.
1756 * doc/c-bfin.texi: Likewise.
1757 * doc/c-cr16.texi: Likewise.
1758 * doc/c-d10v.texi: Likewise.
1759 * doc/c-d30v.texi: Likewise.
1760 * doc/c-h8300.texi: Likewise.
1761 * doc/c-hppa.texi: Likewise.
1762 * doc/c-i370.texi: Likewise.
1763 * doc/c-i386.texi: Likewise.
1764 * doc/c-i860.texi: Likewise.
1765 * doc/c-m32c.texi: Likewise.
1766 * doc/c-m32r.texi: Likewise.
1767 * doc/c-m68hc11.texi: Likewise.
1768 * doc/c-m68k.texi: Likewise.
1769 * doc/c-microblaze.texi: Likewise.
1770 * doc/c-mips.texi: Likewise.
1771 * doc/c-msp430.texi: Likewise.
1772 * doc/c-mt.texi: Likewise.
1773 * doc/c-s390.texi: Likewise.
1774 * doc/c-score.texi: Likewise.
1775 * doc/c-sh.texi: Likewise.
1776 * doc/c-sh64.texi: Likewise.
1777 * doc/c-tic54x.texi: Likewise.
1778 * doc/c-tic6x.texi: Likewise.
1779 * doc/c-v850.texi: Likewise.
1780 * doc/c-xc16x.texi: Likewise.
1781 * doc/c-xgate.texi: Likewise.
1782 * doc/c-xtensa.texi: Likewise.
1783 * doc/c-z80.texi: Likewise.
1784 * doc/internals.texi: Likewise.
1785
4c665b71
RM
17862013-01-10 Roland McGrath <mcgrathr@google.com>
1787
1788 * hash.c (hash_new_sized): Make it global.
1789 * hash.h: Declare it.
1790 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1791 pass a small size.
1792
a3c62988
NC
17932013-01-10 Will Newton <will.newton@imgtec.com>
1794
1795 * Makefile.am: Add Meta.
1796 * Makefile.in: Regenerate.
1797 * config/tc-metag.c: New file.
1798 * config/tc-metag.h: New file.
1799 * configure.tgt: Add Meta.
1800 * doc/Makefile.am: Add Meta.
1801 * doc/Makefile.in: Regenerate.
1802 * doc/all.texi: Add Meta.
1803 * doc/as.texiinfo: Document Meta options.
1804 * doc/c-metag.texi: New file.
1805
b37df7c4
SE
18062013-01-09 Steve Ellcey <sellcey@mips.com>
1807
1808 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1809 calls.
1810 * config/tc-mips.c (internalError): Remove, replace with abort.
1811
a3251895
YZ
18122013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1813
1814 * config/tc-aarch64.c (parse_operands): Change to compare the result
1815 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1816
8ab8155f
NC
18172013-01-07 Nick Clifton <nickc@redhat.com>
1818
1819 PR gas/14887
1820 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1821 anticipated character.
1822 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1823 here as it is no longer needed.
1824
a4ac1c42
AS
18252013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1826
1827 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1828 * doc/c-score.texi (SCORE-Opts): Likewise.
1829 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1830
e407c74b
NC
18312013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1832
1833 * config/tc-mips.c: Add support for MIPS r5900.
1834 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1835 lq and sq.
1836 (can_swap_branch_p, get_append_method): Detect some conditional
1837 short loops to fix a bug on the r5900 by NOP in the branch delay
1838 slot.
1839 (M_MUL): Support 3 operands in multu on r5900.
1840 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1841 (s_mipsset): Force 32 bit floating point on r5900.
1842 (mips_ip): Check parameter range of instructions mfps and mtps on
1843 r5900.
1844 * configure.in: Detect CPU type when target string contains r5900
1845 (e.g. mips64r5900el-linux-gnu).
1846
62658407
L
18472013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1848
1849 * as.c (parse_args): Update copyright year to 2013.
1850
95830fd1
YZ
18512013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1852
1853 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1854 and "cortex57".
1855
517bb291 18562013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1857
517bb291
NC
1858 PR gas/14987
1859 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1860 closing bracket.
d709e4e6 1861
517bb291 1862For older changes see ChangeLog-2012
08d56133 1863\f
517bb291 1864Copyright (C) 2013 Free Software Foundation, Inc.
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1865
1866Copying and distribution of this file, with or without modification,
1867are permitted in any medium without royalty provided the copyright
1868notice and this notice are preserved.
1869
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1870Local Variables:
1871mode: change-log
1872left-margin: 8
1873fill-column: 74
1874version-control: never
1875End: