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47cd3fa7
JB
12013-10-10 Jan Beulich <jbeulich@suse.com>
2
3 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
4 swapping for bndmk, bndldx, and bndstx.
5
6085f853
NC
62013-10-09 Nick Clifton <nickc@redhat.com>
7
b7b2bb1d
NC
8 PR gas/16025
9 * config/tc-epiphany.c (md_convert_frag): Add missing break
10 statement.
11
6085f853
NC
12 PR gas/16026
13 * config/tc-mn10200.c (md_convert_frag): Add missing break
14 statement.
15
cecf1424
JB
162013-10-08 Jan Beulich <jbeulich@suse.com>
17
18 * tc-i386.c (check_word_reg): Remove misplaced "else".
19 (check_long_reg): Restore symmetry with check_word_reg.
20
d3bfe16e
JB
212013-10-08 Jan Beulich <jbeulich@suse.com>
22
23 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
24 LR/PC check.
25
38d77545
NC
262013-10-08 Nick Clifton <nickc@redhat.com>
27
28 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
29 for "<foo>a". Issue error messages for unrecognised or corrrupt
30 size extensions.
31
fe8b4cc3
KT
322013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33
34 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
35 possible.
36
c7b0bd56
SE
372013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
38
39 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
40 * doc/c-i386.texi: Add -march=bdver4 option.
41
cc9afea3
AM
422013-09-20 Alan Modra <amodra@gmail.com>
43
44 * configure: Regenerate.
45
58ca03a2
TG
462013-09-18 Tristan Gingold <gingold@adacore.com>
47
48 * NEWS: Add marker for 2.24.
49
ab905915
NC
502013-09-18 Nick Clifton <nickc@redhat.com>
51
52 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
53 (move_data): New variable.
54 (md_parse_option): Parse -md.
55 (msp430_section): New function. Catch references to the .bss or
56 .data sections and generate a special symbol for use by the libcrt
57 library.
58 (md_pseudo_table): Intercept .section directives.
59 (md_longopt): Add -md
60 (md_show_usage): Likewise.
61 (msp430_operands): Generate a warning message if a NOP is inserted
62 into the instruction stream.
63 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
64
f1c38003
SE
652013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
66
67 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 68 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 69
1d50d57c
WN
702013-09-16 Will Newton <will.newton@linaro.org>
71
72 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
73 disallowing element size 64 with interleave other than 1.
74
173d3447
CF
752013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
76
77 * config/tc-mips.c (match_insn): Set error when $31 is used for
78 bltzal* and bgezal*.
79
ac21e7da
TG
802013-09-04 Tristan Gingold <gingold@adacore.com>
81
82 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
83 symbols.
84
74db7efb
NC
852013-09-04 Roland McGrath <mcgrathr@google.com>
86
87 PR gas/15914
88 * config/tc-arm.c (T16_32_TAB): Add _udf.
89 (do_t_udf): New function.
90 (insns): Add "udf".
91
664a88c6
DD
922013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
93
94 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
95 assembler errors at correct position.
96
9aff4b7a
NC
972013-08-23 Yuri Chornoivan <yurchor@ukr.net>
98
99 PR binutils/15834
100 * config/tc-ia64.c: Fix typos.
101 * config/tc-sparc.c: Likewise.
102 * config/tc-z80.c: Likewise.
103 * doc/c-i386.texi: Likewise.
104 * doc/c-m32r.texi: Likewise.
105
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1062013-08-23 Will Newton <will.newton@linaro.org>
107
9aff4b7a 108 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
109 for pre-indexed addressing modes.
110
b4e6cb80
AM
1112013-08-21 Alan Modra <amodra@gmail.com>
112
113 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
114 range check label number for use with fb_low_counter array.
115
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RS
1162013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
117
118 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
119 (mips_parse_argument_token, validate_micromips_insn, md_begin)
120 (check_regno, match_float_constant, check_completed_insn, append_insn)
121 (match_insn, match_mips16_insn, match_insns, macro_start)
122 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
123 (mips16_ip, mips_set_option_string, md_parse_option)
124 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
125 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
126 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
127 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
128 Start error messages with a lower-case letter. Do not end error
129 messages with a period. Wrap long messages to 80 character-lines.
130 Use "cannot" instead of "can't" and "can not".
131
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1322013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * config/tc-mips.c (imm_expr): Expand comment.
135 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
136 when populated.
137
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RS
1382013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
139
140 * config/tc-mips.c (imm2_expr): Delete.
141 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
142
5e0dc5ba
RS
1432013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
144
145 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
146 (macro): Remove M_DEXT and M_DINS handling.
147
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RS
1482013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
149
150 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
151 lax_max with lax_match.
152 (match_int_operand): Update accordingly. Don't report an error
153 for !lax_match-only cases.
154 (match_insn): Replace more_alts with lax_match and use it to
155 initialize the mips_arg_info field. Add a complete_p parameter.
156 Handle implicit VU0 suffixes here.
157 (match_invalid_for_isa, match_insns, match_mips16_insns): New
158 functions.
159 (mips_ip, mips16_ip): Use them.
160
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RS
1612013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (match_expression): Report uses of registers here.
164 Add a "must be an immediate expression" error. Handle elided offsets
165 here rather than...
166 (match_int_operand): ...here.
167
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RS
1682013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
169
170 * config/tc-mips.c (mips_arg_info): Remove soft_match.
171 (match_out_of_range, match_not_constant): New functions.
172 (match_const_int): Remove fallback parameter and check for soft_match.
173 Use match_not_constant.
174 (match_mapped_int_operand, match_addiusp_operand)
175 (match_perf_reg_operand, match_save_restore_list_operand)
176 (match_mdmx_imm_reg_operand): Update accordingly. Use
177 match_out_of_range and set_insn_error* instead of as_bad.
178 (match_int_operand): Likewise. Use match_not_constant in the
179 !allows_nonconst case.
180 (match_float_constant): Report invalid float constants.
181 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
182 match_float_constant to check for invalid constants. Fail the
183 match if match_const_int or match_float_constant return false.
184 (mips_ip): Update accordingly.
185 (mips16_ip): Likewise. Undo null termination of instruction name
186 once lookup is complete.
187
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1882013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * config/tc-mips.c (mips_insn_error_format): New enum.
191 (mips_insn_error): New struct.
192 (insn_error): Change to a mips_insn_error.
193 (clear_insn_error, set_insn_error_format, set_insn_error)
194 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
195 functions.
196 (mips_parse_argument_token, md_assemble, match_insn)
197 (match_mips16_insn): Use them instead of manipulating insn_error
198 directly.
199 (mips_ip, mips16_ip): Likewise. Simplify control flow.
200
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2012013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
202
203 * config/tc-mips.c (normalize_constant_expr): Move further up file.
204 (normalize_address_expr): Likewise.
205 (match_insn, match_mips16_insn): New functions, split out from...
206 (mips_ip, mips16_ip): ...here.
207
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RS
2082013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
211 OP_OPTIONAL_REG.
212 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
213 for optional operands.
214
27285eed
AM
2152013-08-16 Alan Modra <amodra@gmail.com>
216
217 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
218 modifiers generally.
219
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AM
2202013-08-16 Alan Modra <amodra@gmail.com>
221
222 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
223
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DE
2242013-08-14 David Edelsohn <dje.gcc@gmail.com>
225
226 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
227 argument as alignment.
228
4046d87a
NC
2292013-08-09 Nick Clifton <nickc@redhat.com>
230
231 * config/tc-rl78.c (elf_flags): New variable.
232 (enum options): Add OPTION_G10.
233 (md_longopts): Add mg10.
234 (md_parse_option): Parse -mg10.
235 (rl78_elf_final_processing): New function.
236 * config/tc-rl78.c (tc_final_processing): Define.
237 * doc/c-rl78.texi: Document -mg10 option.
238
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RS
2392013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
240
241 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
242 suffixes to be elided too.
243 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
244 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
245 to be omitted too.
246
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RS
2472013-08-05 John Tytgat <john@bass-software.com>
248
249 * po/POTFILES.in: Regenerate.
250
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EB
2512013-08-05 Eric Botcazou <ebotcazou@adacore.com>
252 Konrad Eisele <konrad@gaisler.com>
253
254 * config/tc-sparc.c (sparc_arch_types): Add leon.
255 (sparc_arch): Move sparc4 around and add leon.
256 (sparc_target_format): Document -Aleon.
257 * doc/c-sparc.texi: Likewise.
258
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RS
2592013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
260
261 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
262
14daeee3
RS
2632013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
264 Richard Sandiford <rdsandiford@googlemail.com>
265
266 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
267 (RWARN): Bump to 0x8000000.
268 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
269 (RTYPE_R5900_ACC): New register types.
270 (RTYPE_MASK): Include them.
271 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
272 macros.
273 (reg_names): Include them.
274 (mips_parse_register_1): New function, split out from...
275 (mips_parse_register): ...here. Add a channels_ptr parameter.
276 Look for VU0 channel suffixes when nonnull.
277 (reg_lookup): Update the call to mips_parse_register.
278 (mips_parse_vu0_channels): New function.
279 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
280 (mips_operand_token): Add a "channels" field to the union.
281 Extend the comment above "ch" to OT_DOUBLE_CHAR.
282 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
283 (mips_parse_argument_token): Handle channel suffixes here too.
284 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
285 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
286 Handle '#' formats.
287 (md_begin): Register $vfN and $vfI registers.
288 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
289 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
290 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
291 (match_vu0_suffix_operand): New function.
292 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
293 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
294 (mips_lookup_insn): New function.
295 (mips_ip): Use it. Allow "+K" operands to be elided at the end
296 of an instruction. Handle '#' sequences.
297
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2982013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
301 values and use it instead of sreg, treg, xreg, etc.
302
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RS
3032013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
304
305 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
306 and mips_int_operand_max.
307 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
308 Delete.
309 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
310 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
311 instead of mips16_immed_operand.
312
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3132013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (mips16_macro): Don't use move_register.
316 (mips16_ip): Allow macros to use 'p'.
317
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RS
3182013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
319
320 * config/tc-mips.c (MAX_OPERANDS): New macro.
321 (mips_operand_array): New structure.
322 (mips_operands, mips16_operands, micromips_operands): New arrays.
323 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
324 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
325 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
326 (micromips_to_32_reg_q_map): Delete.
327 (insn_operands, insn_opno, insn_extract_operand): New functions.
328 (validate_mips_insn): Take a mips_operand_array as argument and
329 use it to build up a list of operands. Extend to handle INSN_MACRO
330 and MIPS16.
331 (validate_mips16_insn): New function.
332 (validate_micromips_insn): Take a mips_operand_array as argument.
333 Handle INSN_MACRO.
334 (md_begin): Initialize mips_operands, mips16_operands and
335 micromips_operands. Call validate_mips_insn and
336 validate_micromips_insn for macro instructions too.
337 Call validate_mips16_insn for MIPS16 instructions.
338 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
339 New functions.
340 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
341 them. Handle INSN_UDI.
342 (get_append_method): Use gpr_read_mask.
343
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3442013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
345
346 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
347 flags for MIPS16 and non-MIPS16 instructions.
348 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
349 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
350 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
351 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
352 and non-MIPS16 instructions. Fix formatting.
353
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3542013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
355
356 * config/tc-mips.c (reg_needs_delay): Move later in file.
357 Use gpr_write_mask.
358 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
359
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3602013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
361 Alexander Ivchenko <alexander.ivchenko@intel.com>
362 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
363 Sergey Lega <sergey.s.lega@intel.com>
364 Anna Tikhonova <anna.tikhonova@intel.com>
365 Ilya Tocar <ilya.tocar@intel.com>
366 Andrey Turetskiy <andrey.turetskiy@intel.com>
367 Ilya Verbin <ilya.verbin@intel.com>
368 Kirill Yukhin <kirill.yukhin@intel.com>
369 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
370
371 * config/tc-i386-intel.c (O_zmmword_ptr): New.
372 (i386_types): Add zmmword.
373 (i386_intel_simplify_register): Allow regzmm.
374 (i386_intel_simplify): Handle zmmwords.
375 (i386_intel_operand): Handle RC/SAE, vector operations and
376 zmmwords.
377 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
378 (struct RC_Operation): New.
379 (struct Mask_Operation): New.
380 (struct Broadcast_Operation): New.
381 (vex_prefix): Size of bytes increased to 4 to support EVEX
382 encoding.
383 (enum i386_error): Add new error codes: unsupported_broadcast,
384 broadcast_not_on_src_operand, broadcast_needed,
385 unsupported_masking, mask_not_on_destination, no_default_mask,
386 unsupported_rc_sae, rc_sae_operand_not_last_imm,
387 invalid_register_operand, try_vector_disp8.
388 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
389 rounding, broadcast, memshift.
390 (struct RC_name): New.
391 (RC_NamesTable): New.
392 (evexlig): New.
393 (evexwig): New.
394 (extra_symbol_chars): Add '{'.
395 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
396 (i386_operand_type): Add regzmm, regmask and vec_disp8.
397 (match_mem_size): Handle zmmwords.
398 (operand_type_match): Handle zmm-registers.
399 (mode_from_disp_size): Handle vec_disp8.
400 (fits_in_vec_disp8): New.
401 (md_begin): Handle {} properly.
402 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
403 (build_vex_prefix): Handle vrex.
404 (build_evex_prefix): New.
405 (process_immext): Adjust to properly handle EVEX.
406 (md_assemble): Add EVEX encoding support.
407 (swap_2_operands): Correctly handle operands with masking,
408 broadcasting or RC/SAE.
409 (check_VecOperands): Support EVEX features.
410 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
411 (match_template): Support regzmm and handle new error codes.
412 (process_suffix): Handle zmmwords and zmm-registers.
413 (check_byte_reg): Extend to zmm-registers.
414 (process_operands): Extend to zmm-registers.
415 (build_modrm_byte): Handle EVEX.
416 (output_insn): Adjust to properly handle EVEX case.
417 (disp_size): Handle vec_disp8.
418 (output_disp): Support compressed disp8*N evex feature.
419 (output_imm): Handle RC/SAE immediates properly.
420 (check_VecOperations): New.
421 (i386_immediate): Handle EVEX features.
422 (i386_index_check): Handle zmmwords and zmm-registers.
423 (RC_SAE_immediate): New.
424 (i386_att_operand): Handle EVEX features.
425 (parse_real_register): Add a check for ZMM/Mask registers.
426 (OPTION_MEVEXLIG): New.
427 (OPTION_MEVEXWIG): New.
428 (md_longopts): Add mevexlig and mevexwig.
429 (md_parse_option): Handle mevexlig and mevexwig options.
430 (md_show_usage): Add description for mevexlig and mevexwig.
431 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
432 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
433
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4342013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
435
436 * config/tc-i386.c (cpu_arch): Add .sha.
437 * doc/c-i386.texi: Document sha/.sha.
438
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4392013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
440 Kirill Yukhin <kirill.yukhin@intel.com>
441 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
442
443 * config/tc-i386.c (BND_PREFIX): New.
444 (struct _i386_insn): Add new field bnd_prefix.
445 (add_bnd_prefix): New.
446 (cpu_arch): Add MPX.
447 (i386_operand_type): Add regbnd.
448 (md_assemble): Handle BND prefixes.
449 (parse_insn): Likewise.
450 (output_branch): Likewise.
451 (output_jump): Likewise.
452 (build_modrm_byte): Handle regbnd.
453 (OPTION_MADD_BND_PREFIX): New.
454 (md_longopts): Add entry for 'madd-bnd-prefix'.
455 (md_parse_option): Handle madd-bnd-prefix option.
456 (md_show_usage): Add description for madd-bnd-prefix
457 option.
458 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
459
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4602013-07-24 Tristan Gingold <gingold@adacore.com>
461
462 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
463 xcoff targets.
464
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4652013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
466
467 * config/tc-s390.c (s390_machine): Don't force the .machine
468 argument to lower case.
469
e673710a
KT
4702013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
471
472 * config/tc-arm.c (s_arm_arch_extension): Improve error message
473 for invalid extension.
474
69091a2c
YZ
4752013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
476
477 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
478 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
479 (aarch64_abi): New variable.
480 (ilp32_p): Change to be a macro.
481 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
482 (struct aarch64_option_abi_value_table): New struct.
483 (aarch64_abis): New table.
484 (aarch64_parse_abi): New function.
485 (aarch64_long_opts): Add entry for -mabi=.
486 * doc/as.texinfo (Target AArch64 options): Document -mabi.
487 * doc/c-aarch64.texi: Likewise.
488
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NC
4892013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
490
491 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
492 unsigned comparison.
493
f0c00282
NC
4942013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
495
cbe02d4f 496 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 497 RX610.
cbe02d4f 498 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
499 check floating point operation support for target RX100 and
500 RX200.
cbe02d4f
AM
501 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
502 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
503 RX200, RX600, and RX610
f0c00282 504
8c997c27
NC
5052013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
506
507 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
508
8be59acb
NC
5092013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
510
511 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
512 * doc/c-avr.texi: Likewise.
513
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RS
5142013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
515
516 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
517 error with older GCCs.
518 (mips16_macro_build): Dereference args.
519
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RS
5202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
521
522 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
523 New functions, split out from...
524 (reg_lookup): ...here. Remove itbl support.
525 (reglist_lookup): Delete.
526 (mips_operand_token_type): New enum.
527 (mips_operand_token): New structure.
528 (mips_operand_tokens): New variable.
529 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
530 (mips_parse_arguments): New functions.
531 (md_begin): Initialize mips_operand_tokens.
532 (mips_arg_info): Add a token field. Remove optional_reg field.
533 (match_char, match_expression): New functions.
534 (match_const_int): Use match_expression. Remove "s" argument
535 and return a boolean result. Remove O_register handling.
536 (match_regno, match_reg, match_reg_range): New functions.
537 (match_int_operand, match_mapped_int_operand, match_msb_operand)
538 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
539 (match_addiusp_operand, match_clo_clz_dest_operand)
540 (match_lwm_swm_list_operand, match_entry_exit_operand)
541 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
542 (match_tied_reg_operand): Remove "s" argument and return a boolean
543 result. Match tokens rather than text. Update calls to
544 match_const_int. Rely on match_regno to call check_regno.
545 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
546 "arg" argument. Return a boolean result.
547 (parse_float_constant): Replace with...
548 (match_float_constant): ...this new function.
549 (match_operand): Remove "s" argument and return a boolean result.
550 Update calls to subfunctions.
551 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
552 rather than string-parsing routines. Update handling of optional
553 registers for token scheme.
554
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5552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
556
557 * config/tc-mips.c (parse_float_constant): Split out from...
558 (mips_ip): ...here.
559
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RS
5602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
561
562 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
563 Delete.
564
364215c8
RS
5652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
568 (match_entry_exit_operand): New function.
569 (match_save_restore_list_operand): Likewise.
570 (match_operand): Use them.
571 (check_absolute_expr): Delete.
572 (mips16_ip): Rewrite main parsing loop to use mips_operands.
573
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5742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c: Enable functions commented out in previous patch.
577 (SKIP_SPACE_TABS): Move further up file.
578 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
579 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
580 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
581 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
582 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
583 (micromips_imm_b_map, micromips_imm_c_map): Delete.
584 (mips_lookup_reg_pair): Delete.
585 (macro): Use report_bad_range and report_bad_field.
586 (mips_immed, expr_const_in_range): Delete.
587 (mips_ip): Rewrite main parsing loop to use new functions.
588
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RS
5892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
590
591 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
592 Change return type to bfd_boolean.
593 (report_bad_range, report_bad_field): New functions.
594 (mips_arg_info): New structure.
595 (match_const_int, convert_reg_type, check_regno, match_int_operand)
596 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
597 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
598 (match_addiusp_operand, match_clo_clz_dest_operand)
599 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
600 (match_pc_operand, match_tied_reg_operand, match_operand)
601 (check_completed_insn): New functions, commented out for now.
602
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RS
6032013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
604
605 * config/tc-mips.c (insn_insert_operand): New function.
606 (macro_build, mips16_macro_build): Put null character check
607 in the for loop and convert continues to breaks. Use operand
608 structures to handle constant operands.
609
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6102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
611
612 * config/tc-mips.c (validate_mips_insn): Move further up file.
613 Add insn_bits and decode_operand arguments. Use the mips_operand
614 fields to work out which bits an operand occupies. Detect double
615 definitions.
616 (validate_micromips_insn): Move further up file. Call into
617 validate_mips_insn.
618
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RS
6192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
620
621 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
622
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RS
6232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
624
625 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
626 and "~".
627 (macro): Update accordingly.
628
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RS
6292013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
630
631 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
632 (imm_reloc): Delete.
633 (md_assemble): Remove imm_reloc handling.
634 (mips_ip): Update commentary. Use offset_expr and offset_reloc
635 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
636 Use a temporary array rather than imm_reloc when parsing
637 constant expressions. Remove imm_reloc initialization.
638 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
639 for the relaxable field. Use a relax_char variable to track the
640 type of this field. Remove imm_reloc initialization.
641
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RS
6422013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
643
644 * config/tc-mips.c (mips16_ip): Handle "I".
645
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MR
6462013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
647
648 * config/tc-mips.c (mips_flag_nan2008): New variable.
649 (options): Add OPTION_NAN enum value.
650 (md_longopts): Handle it.
651 (md_parse_option): Likewise.
652 (s_nan): New function.
653 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
654 (md_show_usage): Add -mnan.
655
656 * doc/as.texinfo (Overview): Add -mnan.
657 * doc/c-mips.texi (MIPS Opts): Document -mnan.
658 (MIPS NaN Encodings): New node. Document .nan directive.
659 (MIPS-Dependent): List the new node.
660
c1094734
TG
6612013-07-09 Tristan Gingold <gingold@adacore.com>
662
663 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
664
0cbbe1b8
RS
6652013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
666
667 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
668 for 'A' and assume that the constant has been elided if the result
669 is an O_register.
670
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RS
6712013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
672
673 * config/tc-mips.c (gprel16_reloc_p): New function.
674 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
675 BFD_RELOC_UNUSED.
676 (offset_high_part, small_offset_p): New functions.
677 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
678 register load and store macros, handle the 16-bit offset case first.
679 If a 16-bit offset is not suitable for the instruction we're
680 generating, load it into the temporary register using
681 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
682 M_L_DAB code once the address has been constructed. For double load
683 and store macros, again handle the 16-bit offset case first.
684 If the second register cannot be accessed from the same high
685 part as the first, load it into AT using ADDRESS_ADDI_INSN.
686 Fix the handling of LD in cases where the first register is the
687 same as the base. Also handle the case where the offset is
688 not 16 bits and the second register cannot be accessed from the
689 same high part as the first. For unaligned loads and stores,
690 fuse the offbits == 12 and old "ab" handling. Apply this handling
691 whenever the second offset needs a different high part from the first.
692 Construct the offset using ADDRESS_ADDI_INSN where possible,
693 for offbits == 16 as well as offbits == 12. Use offset_reloc
694 when constructing the individual loads and stores.
695 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
696 and offset_reloc before matching against a particular opcode.
697 Handle elided 'A' constants. Allow 'A' constants to use
698 relocation operators.
699
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RS
7002013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
701
702 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
703 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
704 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
705
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RS
7062013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
707
708 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
709 Require the msb to be <= 31 for "+s". Check that the size is <= 31
710 for both "+s" and "+S".
711
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RS
7122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
713
714 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
715 (mips_ip, mips16_ip): Handle "+i".
716
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RS
7172013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
718
719 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
720 (micromips_to_32_reg_h_map): Rename to...
721 (micromips_to_32_reg_h_map1): ...this.
722 (micromips_to_32_reg_i_map): Rename to...
723 (micromips_to_32_reg_h_map2): ...this.
724 (mips_lookup_reg_pair): New function.
725 (gpr_write_mask, macro): Adjust after above renaming.
726 (validate_micromips_insn): Remove "mi" handling.
727 (mips_ip): Likewise. Parse both registers in a pair for "mh".
728
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RS
7292013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
730
731 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
732 (mips_ip): Remove "+D" and "+T" handling.
733
fb798c50
AK
7342013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
735
736 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
737 relocs.
738
2c0a3565
MS
7392013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
740
4aa2c5e2
MS
741 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
742
7432013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
744
2c0a3565
MS
745 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
746 (aarch64_force_relocation): Likewise.
747
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AM
7482013-07-02 Alan Modra <amodra@gmail.com>
749
750 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
751
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MR
7522013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
753
754 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
755 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
756 Replace @sc{mips16} with literal `MIPS16'.
757 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
758
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YZ
7592013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
760
761 * config/tc-aarch64.c (reloc_table): Replace
762 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
763 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
764 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
765 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
766 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
767 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
768 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
769 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
770 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
771 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
772 (aarch64_force_relocation): Likewise.
773
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YZ
7742013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
775
776 * config/tc-aarch64.c (ilp32_p): New static variable.
777 (elf64_aarch64_target_format): Return the target according to the
778 value of 'ilp32_p'.
779 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
780 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
781 (aarch64_dwarf2_addr_size): New function.
782 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
783 (DWARF2_ADDR_SIZE): New define.
784
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7852013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
786
787 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
788
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RS
7892013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
790
791 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
792
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MR
7932013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
794
795 * config/tc-mips.c (mips_set_options): Add insn32 member.
796 (mips_opts): Initialize it.
797 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
798 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
799 (md_longopts): Add "minsn32" and "mno-insn32" options.
800 (is_size_valid): Handle insn32 mode.
801 (md_assemble): Pass instruction string down to macro.
802 (brk_fmt): Add second dimension and insn32 mode initializers.
803 (mfhl_fmt): Likewise.
804 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
805 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
806 (macro_build_jalr, move_register): Handle insn32 mode.
807 (macro_build_branch_rs): Likewise.
808 (macro): Handle insn32 mode.
809 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
810 (mips_ip): Handle insn32 mode.
811 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
812 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
813 (mips_handle_align): Handle insn32 mode.
814 (md_show_usage): Add -minsn32 and -mno-insn32.
815
816 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
817 -mno-insn32 options.
818 (-minsn32, -mno-insn32): New options.
819 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
820 options.
821 (MIPS assembly options): New node. Document .set insn32 and
822 .set noinsn32.
823 (MIPS-Dependent): List the new node.
824
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NC
8252013-06-25 Nick Clifton <nickc@redhat.com>
826
827 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
828 the PC in indirect addressing on 430xv2 parts.
829 (msp430_operands): Add version test to hardware bug encoding
830 restrictions.
831
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RM
8322013-06-24 Roland McGrath <mcgrathr@google.com>
833
d996d970
RM
834 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
835 so it skips whitespace before it.
836 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
837
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RM
838 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
839 (arm_reg_parse_multi): Skip whitespace first.
840 (parse_reg_list): Likewise.
841 (parse_vfp_reg_list): Likewise.
842 (s_arm_unwind_save_mmxwcg): Likewise.
843
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NC
8442013-06-24 Nick Clifton <nickc@redhat.com>
845
846 PR gas/15623
847 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
848
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RS
8492013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
850
851 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
852
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RS
8532013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
854
855 * config/tc-mips.c: Assert that offsetT and valueT are at least
856 8 bytes in size.
857 (GPR_SMIN, GPR_SMAX): New macros.
858 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
859
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8602013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
861
862 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
863 conditions. Remove any code deselected by them.
864 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
865
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8662013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
867
868 * NEWS: Note removal of ECOFF support.
869 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
870 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
871 (MULTI_CFILES): Remove config/e-mipsecoff.c.
872 * Makefile.in: Regenerate.
873 * configure.in: Remove MIPS ECOFF references.
874 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
875 Delete cases.
876 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
877 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
878 (mips-*-*): ...this single case.
879 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
880 MIPS emulations to be e-mipself*.
881 * configure: Regenerate.
882 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
883 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
884 (mips-*-sysv*): Remove coff and ecoff cases.
885 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
886 * ecoff.c: Remove reference to MIPS ECOFF.
887 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
888 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
889 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
890 (mips_hi_fixup): Tweak comment.
891 (append_insn): Require a howto.
892 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
893
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8942013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
895
896 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
897 Use "CPU" instead of "cpu".
898 * doc/c-mips.texi: Likewise.
899 (MIPS Opts): Rename to MIPS Options.
900 (MIPS option stack): Rename to MIPS Option Stack.
901 (MIPS ASE instruction generation overrides): Rename to
902 MIPS ASE Instruction Generation Overrides (for now).
903 (MIPS floating-point): Rename to MIPS Floating-Point.
904
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9052013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
906
907 * doc/c-mips.texi (MIPS Macros): New section.
908 (MIPS Object): Replace with...
909 (MIPS Small Data): ...this new section.
910
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9112013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
914 Capitalize name. Use @kindex instead of @cindex for .set entries.
915
a1b86ab7
RS
9162013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
917
918 * doc/c-mips.texi (MIPS Stabs): Remove section.
919
c6278170
RS
9202013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
921
922 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
923 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
924 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
925 (ISA_SUPPORTS_VIRT64_ASE): Delete.
926 (mips_ase): New structure.
927 (mips_ases): New table.
928 (FP64_ASES): New macro.
929 (mips_ase_groups): New array.
930 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
931 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
932 functions.
933 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
934 (md_parse_option): Use mips_ases and mips_set_ase instead of
935 separate case statements for each ASE option.
936 (mips_after_parse_args): Use FP64_ASES. Use
937 mips_check_isa_supports_ases to check the ASEs against
938 other options.
939 (s_mipsset): Use mips_ases and mips_set_ase instead of
940 separate if statements for each ASE option. Use
941 mips_check_isa_supports_ases, even when a non-ASE option
942 is specified.
943
63a4bc21
KT
9442013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
945
946 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
947
c31f3936
RS
9482013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
949
950 * config/tc-mips.c (md_shortopts, options, md_longopts)
951 (md_longopts_size): Move earlier in file.
952
846ef2d0
RS
9532013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
954
955 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
956 with a single "ase" bitmask.
957 (mips_opts): Update accordingly.
958 (file_ase, file_ase_explicit): New variables.
959 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
960 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
961 (ISA_HAS_ROR): Adjust for mips_set_options change.
962 (is_opcode_valid): Take the base ase mask directly from mips_opts.
963 (mips_ip): Adjust for mips_set_options change.
964 (md_parse_option): Likewise. Update file_ase_explicit.
965 (mips_after_parse_args): Adjust for mips_set_options change.
966 Use bitmask operations to select the default ASEs. Set file_ase
967 rather than individual per-ASE variables.
968 (s_mipsset): Adjust for mips_set_options change.
969 (mips_elf_final_processing): Test file_ase rather than
970 file_ase_mdmx. Remove commented-out code.
971
d16afab6
RS
9722013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
973
974 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
975 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
976 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
977 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
978 (mips_after_parse_args): Use the new "ase" field to choose
979 the default ASEs.
980 (mips_cpu_info_table): Move ASEs from the "flags" field to the
981 "ase" field.
982
e83a675f
RE
9832013-06-18 Richard Earnshaw <rearnsha@arm.com>
984
985 * config/tc-arm.c (symbol_preemptible): New function.
986 (relax_branch): Use it.
987
7f3c4072
CM
9882013-06-17 Catherine Moore <clm@codesourcery.com>
989 Maciej W. Rozycki <macro@codesourcery.com>
990 Chao-Ying Fu <fu@mips.com>
991
992 * config/tc-mips.c (mips_set_options): Add ase_eva.
993 (mips_set_options mips_opts): Add ase_eva.
994 (file_ase_eva): Declare.
995 (ISA_SUPPORTS_EVA_ASE): Define.
996 (IS_SEXT_9BIT_NUM): Define.
997 (MIPS_CPU_ASE_EVA): Define.
998 (is_opcode_valid): Add support for ase_eva.
999 (macro_build): Likewise.
1000 (macro): Likewise.
1001 (validate_mips_insn): Likewise.
1002 (validate_micromips_insn): Likewise.
1003 (mips_ip): Likewise.
1004 (options): Add OPTION_EVA and OPTION_NO_EVA.
1005 (md_longopts): Add -meva and -mno-eva.
1006 (md_parse_option): Process new options.
1007 (mips_after_parse_args): Check for valid EVA combinations.
1008 (s_mipsset): Likewise.
1009
e410add4
RS
10102013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1011
1012 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1013 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1014 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1015 (dwarf2_gen_line_info_1): Update call accordingly.
1016 (dwarf2_move_insn): New function.
1017 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1018
6a50d470
RS
10192013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1020
1021 Revert:
1022
1023 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1024
1025 PR gas/13024
1026 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1027 (dwarf2_gen_line_info_1): Delete.
1028 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1029 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1030 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1031 (dwarf2_directive_loc): Push previous .locs instead of generating
1032 them immediately.
1033
f122319e
CF
10342013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1035
1036 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1037 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1038
909c7f9c
NC
10392013-06-13 Nick Clifton <nickc@redhat.com>
1040
1041 PR gas/15602
1042 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1043 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1044 function. Generates an error if the adjusted offset is out of a
1045 16-bit range.
1046
5d5755a7
SL
10472013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1048
1049 * config/tc-nios2.c (md_apply_fix): Mask constant
1050 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1051
3bf0dbfb
MR
10522013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1053
1054 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1055 MIPS-3D instructions either.
1056 (md_convert_frag): Update the COPx branch mask accordingly.
1057
1058 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1059 option.
1060 * doc/as.texinfo (Overview): Add --relax-branch and
1061 --no-relax-branch.
1062 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1063 --no-relax-branch.
1064
9daf7bab
SL
10652013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1066
1067 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1068 omitted.
1069
d301a56b
RS
10702013-06-08 Catherine Moore <clm@codesourcery.com>
1071
1072 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1073 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1074 (append_insn): Change INSN_xxxx to ASE_xxxx.
1075
7bab7634
DC
10762013-06-01 George Thomas <george.thomas@atmel.com>
1077
cbe02d4f 1078 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1079 AVR_ISA_XMEGAU
1080
f60cf82f
L
10812013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1082
1083 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1084 for ELF.
1085
a3f278e2
CM
10862013-05-31 Paul Brook <paul@codesourcery.com>
1087
a3f278e2
CM
1088 * config/tc-mips.c (s_ehword): New.
1089
067ec077
CM
10902013-05-30 Paul Brook <paul@codesourcery.com>
1091
1092 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1093
d6101ac2
MR
10942013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1095
1096 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1097 convert relocs who have no relocatable field either. Rephrase
1098 the conditional so that the PC-relative check is only applied
1099 for REL targets.
1100
f19ccbda
MR
11012013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1102
1103 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1104 calculation.
1105
418009c2
YZ
11062013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1107
1108 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1109 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1110 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1111 (md_apply_fix): Likewise.
1112 (aarch64_force_relocation): Likewise.
1113
0a8897c7
KT
11142013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1115
1116 * config/tc-arm.c (it_fsm_post_encode): Improve
1117 warning messages about deprecated IT block formats.
1118
89d2a2a3
MS
11192013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1120
1121 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1122 inside fx_done condition.
1123
c77c0862
RS
11242013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1125
1126 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1127
c0637f3a
PB
11282013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1129
1130 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1131 and clean up warning when using PRINT_OPCODE_TABLE.
1132
5656a981
AM
11332013-05-20 Alan Modra <amodra@gmail.com>
1134
1135 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1136 and data fixups performing shift/high adjust/sign extension on
1137 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1138 when writing data fixups rather than recalculating size.
1139
997b26e8
JBG
11402013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1141
1142 * doc/c-msp430.texi: Fix typo.
1143
9f6e76f4
TG
11442013-05-16 Tristan Gingold <gingold@adacore.com>
1145
1146 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1147 are also TOC symbols.
1148
638d3803
NC
11492013-05-16 Nick Clifton <nickc@redhat.com>
1150
1151 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1152 Add -mcpu command to specify core type.
997b26e8 1153 * doc/c-msp430.texi: Update documentation.
638d3803 1154
b015e599
AP
11552013-05-09 Andrew Pinski <apinski@cavium.com>
1156
1157 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1158 (mips_opts): Update for the new field.
1159 (file_ase_virt): New variable.
1160 (ISA_SUPPORTS_VIRT_ASE): New macro.
1161 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1162 (MIPS_CPU_ASE_VIRT): New define.
1163 (is_opcode_valid): Handle ase_virt.
1164 (macro_build): Handle "+J".
1165 (validate_mips_insn): Likewise.
1166 (mips_ip): Likewise.
1167 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1168 (md_longopts): Add mvirt and mnovirt
1169 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1170 (mips_after_parse_args): Handle ase_virt field.
1171 (s_mipsset): Handle "virt" and "novirt".
1172 (mips_elf_final_processing): Add a comment about virt ASE might need
1173 a new flag.
1174 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1175 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1176 Document ".set virt" and ".set novirt".
1177
da8094d7
AM
11782013-05-09 Alan Modra <amodra@gmail.com>
1179
1180 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1181 control of operand flag bits.
1182
c5f8c205
AM
11832013-05-07 Alan Modra <amodra@gmail.com>
1184
1185 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1186 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1187 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1188 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1189 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1190 Shift and sign-extend fieldval for use by some VLE reloc
1191 operand->insert functions.
1192
b47468a6
CM
11932013-05-06 Paul Brook <paul@codesourcery.com>
1194 Catherine Moore <clm@codesourcery.com>
1195
c5f8c205
AM
1196 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1197 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1198 (md_apply_fix): Likewise.
1199 (tc_gen_reloc): Likewise.
1200
2de39019
CM
12012013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1202
1203 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1204 (mips_fix_adjustable): Adjust pc-relative check to use
1205 limited_pc_reloc_p.
1206
754e2bb9
RS
12072013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1208
1209 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1210 (s_mips_stab): Do not restrict to stabn only.
1211
13761a11
NC
12122013-05-02 Nick Clifton <nickc@redhat.com>
1213
1214 * config/tc-msp430.c: Add support for the MSP430X architecture.
1215 Add code to insert a NOP instruction after any instruction that
1216 might change the interrupt state.
1217 Add support for the LARGE memory model.
1218 Add code to initialise the .MSP430.attributes section.
1219 * config/tc-msp430.h: Add support for the MSP430X architecture.
1220 * doc/c-msp430.texi: Document the new -mL and -mN command line
1221 options.
1222 * NEWS: Mention support for the MSP430X architecture.
1223
df26367c
MR
12242013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1225
1226 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1227 alpha*-*-linux*ecoff*.
1228
f02d8318
CF
12292013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1230
1231 * config/tc-mips.c (mips_ip): Add sizelo.
1232 For "+C", "+G", and "+H", set sizelo and compare against it.
1233
b40bf0a2
NC
12342013-04-29 Nick Clifton <nickc@redhat.com>
1235
1236 * as.c (Options): Add -gdwarf-sections.
1237 (parse_args): Likewise.
1238 * as.h (flag_dwarf_sections): Declare.
1239 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1240 (process_entries): When -gdwarf-sections is enabled generate
1241 fragmentary .debug_line sections.
1242 (out_debug_line): Set the section for the .debug_line section end
1243 symbol.
1244 * doc/as.texinfo: Document -gdwarf-sections.
1245 * NEWS: Mention -gdwarf-sections.
1246
8eeccb77 12472013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1248
1249 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1250 according to the target parameter. Don't call s_segm since s_segm
1251 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1252 initialized yet.
1253 (md_begin): Call s_segm according to target parameter from command
1254 line.
1255
49926cd0
AM
12562013-04-25 Alan Modra <amodra@gmail.com>
1257
1258 * configure.in: Allow little-endian linux.
1259 * configure: Regenerate.
1260
e3031850
SL
12612013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1262
1263 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1264 "fstatus" control register to "eccinj".
1265
cb948fc0
KT
12662013-04-19 Kai Tietz <ktietz@redhat.com>
1267
1268 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1269
4455e9ad
JB
12702013-04-15 Julian Brown <julian@codesourcery.com>
1271
1272 * expr.c (add_to_result, subtract_from_result): Make global.
1273 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1274 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1275 subtract_from_result to handle extra bit of precision for .sleb128
1276 directive operands.
1277
956a6ba3
JB
12782013-04-10 Julian Brown <julian@codesourcery.com>
1279
1280 * read.c (convert_to_bignum): Add sign parameter. Use it
1281 instead of X_unsigned to determine sign of resulting bignum.
1282 (emit_expr): Pass extra argument to convert_to_bignum.
1283 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1284 X_extrabit to convert_to_bignum.
1285 (parse_bitfield_cons): Set X_extrabit.
1286 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1287 Initialise X_extrabit field as appropriate.
1288 (add_to_result): New.
1289 (subtract_from_result): New.
1290 (expr): Use above.
1291 * expr.h (expressionS): Add X_extrabit field.
1292
eb9f3f00
JB
12932013-04-10 Jan Beulich <jbeulich@suse.com>
1294
1295 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1296 register being PC when is_t or writeback, and use distinct
1297 diagnostic for the latter case.
1298
ccb84d65
JB
12992013-04-10 Jan Beulich <jbeulich@suse.com>
1300
1301 * gas/config/tc-arm.c (parse_operands): Re-write
1302 po_barrier_or_imm().
1303 (do_barrier): Remove bogus constraint().
1304 (do_t_barrier): Remove.
1305
4d13caa0
NC
13062013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1307
1308 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1309 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1310 ATmega2564RFR2
1311 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1312
16d02dc9
JB
13132013-04-09 Jan Beulich <jbeulich@suse.com>
1314
1315 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1316 Use local variable Rt in more places.
1317 (do_vmsr): Accept all control registers.
1318
05ac0ffb
JB
13192013-04-09 Jan Beulich <jbeulich@suse.com>
1320
1321 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1322 if there was none specified for moves between scalar and core
1323 register.
1324
2d51fb74
JB
13252013-04-09 Jan Beulich <jbeulich@suse.com>
1326
1327 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1328 NEON_ALL_LANES case.
1329
94dcf8bf
JB
13302013-04-08 Jan Beulich <jbeulich@suse.com>
1331
1332 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1333 PC-relative VSTR.
1334
1472d06f
JB
13352013-04-08 Jan Beulich <jbeulich@suse.com>
1336
1337 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1338 entry to sp_fiq.
1339
0c76cae8
AM
13402013-04-03 Alan Modra <amodra@gmail.com>
1341
1342 * doc/as.texinfo: Add support to generate man options for h8300.
1343 * doc/c-h8300.texi: Likewise.
1344
92eb40d9
RR
13452013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1346
1347 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1348 Cortex-A57.
1349
51dcdd4d
NC
13502013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1351
1352 PR binutils/15068
1353 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1354
c5d685bf
NC
13552013-03-26 Nick Clifton <nickc@redhat.com>
1356
9b978282
NC
1357 PR gas/15295
1358 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1359 start of the file each time.
1360
c5d685bf
NC
1361 PR gas/15178
1362 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1363 FreeBSD targets.
1364
9699c833
TG
13652013-03-26 Douglas B Rupp <rupp@gnat.com>
1366
1367 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1368 after fixup.
1369
4755303e
WN
13702013-03-21 Will Newton <will.newton@linaro.org>
1371
1372 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1373 pc-relative str instructions in Thumb mode.
1374
81f5558e
NC
13752013-03-21 Michael Schewe <michael.schewe@gmx.net>
1376
1377 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1378 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1379 R_H8_DISP32A16.
1380 * config/tc-h8300.h: Remove duplicated defines.
1381
71863e73
NC
13822013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1383
1384 PR gas/15282
1385 * tc-avr.c (mcu_has_3_byte_pc): New function.
1386 (tc_cfi_frame_initial_instructions): Call it to find return
1387 address size.
1388
795b8e6b
NC
13892013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1390
1391 PR gas/15095
1392 * config/tc-tic6x.c (tic6x_try_encode): Handle
1393 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1394 encode register pair numbers when required.
1395
ba86b375
WN
13962013-03-15 Will Newton <will.newton@linaro.org>
1397
1398 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1399 in vstr in Thumb mode for pre-ARMv7 cores.
1400
9e6f3811
AS
14012013-03-14 Andreas Schwab <schwab@suse.de>
1402
1403 * doc/c-arc.texi (ARC Directives): Revert last change and use
1404 @itemize instead of @table.
1405 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1406
b10bf8c5
NC
14072013-03-14 Nick Clifton <nickc@redhat.com>
1408
1409 PR gas/15273
1410 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1411 NULL message, instead just check ARM_CPU_IS_ANY directly.
1412
ba724cfc
NC
14132013-03-14 Nick Clifton <nickc@redhat.com>
1414
1415 PR gas/15212
9e6f3811 1416 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1417 for table format.
1418 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1419 to the @item directives.
1420 (ARM-Neon-Alignment): Move to correct place in the document.
1421 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1422 formatting.
1423 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1424 @smallexample.
1425
531a94fd
SL
14262013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1427
1428 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1429 case. Add default BAD_CASE to switch.
1430
dad60f8e
SL
14312013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1432
1433 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1434 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1435
dd5181d5
KT
14362013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1437
1438 * config/tc-arm.c (crc_ext_armv8): New feature set.
1439 (UNPRED_REG): New macro.
1440 (do_crc32_1): New function.
1441 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1442 do_crc32ch, do_crc32cw): Likewise.
1443 (TUEc): New macro.
1444 (insns): Add entries for crc32 mnemonics.
1445 (arm_extensions): Add entry for crc.
1446
8e723a10
CLT
14472013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1448
1449 * write.h (struct fix): Add fx_dot_frag field.
1450 (dot_frag): Declare.
1451 * write.c (dot_frag): New variable.
1452 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1453 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1454 * expr.c (expr): Save value of frag_now in dot_frag when setting
1455 dot_value.
1456 * read.c (emit_expr): Likewise. Delete comments.
1457
be05d201
L
14582013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1459
1460 * config/tc-i386.c (flag_code_names): Removed.
1461 (i386_index_check): Rewrote.
1462
62b0d0d5
YZ
14632013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1464
1465 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1466 add comment.
1467 (aarch64_double_precision_fmovable): New function.
1468 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1469 function; handle hexadecimal representation of IEEE754 encoding.
1470 (parse_operands): Update the call to parse_aarch64_imm_float.
1471
165de32a
L
14722013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1473
1474 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1475 (check_hle): Updated.
1476 (md_assemble): Likewise.
1477 (parse_insn): Likewise.
1478
d5de92cf
L
14792013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1480
1481 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1482 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1483 (parse_insn): Remove expecting_string_instruction. Set
1484 i.rep_prefix.
1485
e60bb1dd
YZ
14862013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1487
1488 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1489
aeebdd9b
YZ
14902013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1491
1492 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1493 for system registers.
1494
4107ae22
DD
14952013-02-27 DJ Delorie <dj@redhat.com>
1496
1497 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1498 (rl78_op): Handle %code().
1499 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1500 (tc_gen_reloc): Likwise; convert to a computed reloc.
1501 (md_apply_fix): Likewise.
1502
151fa98f
NC
15032013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1504
1505 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1506
70a8bc5b 15072013-02-25 Terry Guo <terry.guo@arm.com>
1508
1509 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1510 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1511 list of accepted CPUs.
1512
5c111e37
L
15132013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1514
1515 PR gas/15159
1516 * config/tc-i386.c (cpu_arch): Add ".smap".
1517
1518 * doc/c-i386.texi: Document smap.
1519
8a75745d
MR
15202013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1521
1522 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1523 mips_assembling_insn appropriately.
1524 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1525
79850f26
MR
15262013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1527
cf29fc61 1528 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1529 extraneous braces.
1530
4c261dff
NC
15312013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1532
5c111e37 1533 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1534
ea33f281
NC
15352013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1536
1537 * configure.tgt: Add nios2-*-rtems*.
1538
a1ccaec9
YZ
15392013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1540
1541 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1542 NULL.
1543
0aa27725
RS
15442013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1545
1546 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1547 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1548
da4339ed
NC
15492013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1550
1551 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1552 core.
1553
36591ba1 15542013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1555 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1556
1557 Based on patches from Altera Corporation.
1558
1559 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1560 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1561 * Makefile.in: Regenerated.
1562 * configure.tgt: Add case for nios2*-linux*.
1563 * config/obj-elf.c: Conditionally include elf/nios2.h.
1564 * config/tc-nios2.c: New file.
1565 * config/tc-nios2.h: New file.
1566 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1567 * doc/Makefile.in: Regenerated.
1568 * doc/all.texi: Set NIOSII.
1569 * doc/as.texinfo (Overview): Add Nios II options.
1570 (Machine Dependencies): Include c-nios2.texi.
1571 * doc/c-nios2.texi: New file.
1572 * NEWS: Note Altera Nios II support.
1573
94d4433a
AM
15742013-02-06 Alan Modra <amodra@gmail.com>
1575
1576 PR gas/14255
1577 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1578 Don't skip fixups with fx_subsy non-NULL.
1579 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1580 with fx_subsy non-NULL.
1581
ace9af6f
L
15822013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1583
1584 * doc/c-metag.texi: Add "@c man" markers.
1585
89d67ed9
AM
15862013-02-04 Alan Modra <amodra@gmail.com>
1587
1588 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1589 related code.
1590 (TC_ADJUST_RELOC_COUNT): Delete.
1591 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1592
89072bd6
AM
15932013-02-04 Alan Modra <amodra@gmail.com>
1594
1595 * po/POTFILES.in: Regenerate.
1596
f9b2d544
NC
15972013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1598
1599 * config/tc-metag.c: Make SWAP instruction less permissive with
1600 its operands.
1601
392ca752
DD
16022013-01-29 DJ Delorie <dj@redhat.com>
1603
1604 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1605 relocs in .word/.etc statements.
1606
427d0db6
RM
16072013-01-29 Roland McGrath <mcgrathr@google.com>
1608
1609 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1610 immediate value for 8-bit offset" error so it shows line info.
1611
4faf939a
JM
16122013-01-24 Joseph Myers <joseph@codesourcery.com>
1613
1614 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1615 for 64-bit output.
1616
78c8d46c
NC
16172013-01-24 Nick Clifton <nickc@redhat.com>
1618
1619 * config/tc-v850.c: Add support for e3v5 architecture.
1620 * doc/c-v850.texi: Mention new support.
1621
fb5b7503
NC
16222013-01-23 Nick Clifton <nickc@redhat.com>
1623
1624 PR gas/15039
1625 * config/tc-avr.c: Include dwarf2dbg.h.
1626
8ce3d284
L
16272013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1628
1629 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1630 (tc_i386_fix_adjustable): Likewise.
1631 (lex_got): Likewise.
1632 (tc_gen_reloc): Likewise.
1633
f5555712
YZ
16342013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1635
1636 * config/tc-aarch64.c (output_operand_error_record): Change to output
1637 the out-of-range error message as value-expected message if there is
1638 only one single value in the expected range.
1639 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1640 LSL #0 as a programmer-friendly feature.
1641
8fd4256d
L
16422013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1643
1644 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1645 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1646 BFD_RELOC_64_SIZE relocations.
1647 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1648 for it.
1649 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1650 relocations against local symbols.
1651
a5840dce
AM
16522013-01-16 Alan Modra <amodra@gmail.com>
1653
1654 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1655 finding some sort of toc syntax error, and break to avoid
1656 compiler uninit warning.
1657
af89796a
L
16582013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1659
1660 PR gas/15019
1661 * config/tc-i386.c (lex_got): Increment length by 1 if the
1662 relocation token is removed.
1663
dd42f060
NC
16642013-01-15 Nick Clifton <nickc@redhat.com>
1665
1666 * config/tc-v850.c (md_assemble): Allow signed values for
1667 V850E_IMMEDIATE.
1668
464e3686
SK
16692013-01-11 Sean Keys <skeys@ipdatasys.com>
1670
1671 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1672 git to cvs.
464e3686 1673
5817ffd1
PB
16742013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1675
1676 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1677 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1678 * config/tc-ppc.c (md_show_usage): Likewise.
1679 (ppc_handle_align): Handle power8's group ending nop.
1680
f4b1f6a9
SK
16812013-01-10 Sean Keys <skeys@ipdatasys.com>
1682
1683 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1684 that the assember exits after the opcodes have been printed.
f4b1f6a9 1685
34bca508
L
16862013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1687
1688 * app.c: Remove trailing white spaces.
1689 * as.c: Likewise.
1690 * as.h: Likewise.
1691 * cond.c: Likewise.
1692 * dw2gencfi.c: Likewise.
1693 * dwarf2dbg.h: Likewise.
1694 * ecoff.c: Likewise.
1695 * input-file.c: Likewise.
1696 * itbl-lex.h: Likewise.
1697 * output-file.c: Likewise.
1698 * read.c: Likewise.
1699 * sb.c: Likewise.
1700 * subsegs.c: Likewise.
1701 * symbols.c: Likewise.
1702 * write.c: Likewise.
1703 * config/tc-i386.c: Likewise.
1704 * doc/Makefile.am: Likewise.
1705 * doc/Makefile.in: Likewise.
1706 * doc/c-aarch64.texi: Likewise.
1707 * doc/c-alpha.texi: Likewise.
1708 * doc/c-arc.texi: Likewise.
1709 * doc/c-arm.texi: Likewise.
1710 * doc/c-avr.texi: Likewise.
1711 * doc/c-bfin.texi: Likewise.
1712 * doc/c-cr16.texi: Likewise.
1713 * doc/c-d10v.texi: Likewise.
1714 * doc/c-d30v.texi: Likewise.
1715 * doc/c-h8300.texi: Likewise.
1716 * doc/c-hppa.texi: Likewise.
1717 * doc/c-i370.texi: Likewise.
1718 * doc/c-i386.texi: Likewise.
1719 * doc/c-i860.texi: Likewise.
1720 * doc/c-m32c.texi: Likewise.
1721 * doc/c-m32r.texi: Likewise.
1722 * doc/c-m68hc11.texi: Likewise.
1723 * doc/c-m68k.texi: Likewise.
1724 * doc/c-microblaze.texi: Likewise.
1725 * doc/c-mips.texi: Likewise.
1726 * doc/c-msp430.texi: Likewise.
1727 * doc/c-mt.texi: Likewise.
1728 * doc/c-s390.texi: Likewise.
1729 * doc/c-score.texi: Likewise.
1730 * doc/c-sh.texi: Likewise.
1731 * doc/c-sh64.texi: Likewise.
1732 * doc/c-tic54x.texi: Likewise.
1733 * doc/c-tic6x.texi: Likewise.
1734 * doc/c-v850.texi: Likewise.
1735 * doc/c-xc16x.texi: Likewise.
1736 * doc/c-xgate.texi: Likewise.
1737 * doc/c-xtensa.texi: Likewise.
1738 * doc/c-z80.texi: Likewise.
1739 * doc/internals.texi: Likewise.
1740
4c665b71
RM
17412013-01-10 Roland McGrath <mcgrathr@google.com>
1742
1743 * hash.c (hash_new_sized): Make it global.
1744 * hash.h: Declare it.
1745 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1746 pass a small size.
1747
a3c62988
NC
17482013-01-10 Will Newton <will.newton@imgtec.com>
1749
1750 * Makefile.am: Add Meta.
1751 * Makefile.in: Regenerate.
1752 * config/tc-metag.c: New file.
1753 * config/tc-metag.h: New file.
1754 * configure.tgt: Add Meta.
1755 * doc/Makefile.am: Add Meta.
1756 * doc/Makefile.in: Regenerate.
1757 * doc/all.texi: Add Meta.
1758 * doc/as.texiinfo: Document Meta options.
1759 * doc/c-metag.texi: New file.
1760
b37df7c4
SE
17612013-01-09 Steve Ellcey <sellcey@mips.com>
1762
1763 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1764 calls.
1765 * config/tc-mips.c (internalError): Remove, replace with abort.
1766
a3251895
YZ
17672013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1768
1769 * config/tc-aarch64.c (parse_operands): Change to compare the result
1770 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1771
8ab8155f
NC
17722013-01-07 Nick Clifton <nickc@redhat.com>
1773
1774 PR gas/14887
1775 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1776 anticipated character.
1777 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1778 here as it is no longer needed.
1779
a4ac1c42
AS
17802013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1781
1782 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1783 * doc/c-score.texi (SCORE-Opts): Likewise.
1784 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1785
e407c74b
NC
17862013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1787
1788 * config/tc-mips.c: Add support for MIPS r5900.
1789 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1790 lq and sq.
1791 (can_swap_branch_p, get_append_method): Detect some conditional
1792 short loops to fix a bug on the r5900 by NOP in the branch delay
1793 slot.
1794 (M_MUL): Support 3 operands in multu on r5900.
1795 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1796 (s_mipsset): Force 32 bit floating point on r5900.
1797 (mips_ip): Check parameter range of instructions mfps and mtps on
1798 r5900.
1799 * configure.in: Detect CPU type when target string contains r5900
1800 (e.g. mips64r5900el-linux-gnu).
1801
62658407
L
18022013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1803
1804 * as.c (parse_args): Update copyright year to 2013.
1805
95830fd1
YZ
18062013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1807
1808 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1809 and "cortex57".
1810
517bb291 18112013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1812
517bb291
NC
1813 PR gas/14987
1814 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1815 closing bracket.
d709e4e6 1816
517bb291 1817For older changes see ChangeLog-2012
08d56133 1818\f
517bb291 1819Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1820
1821Copying and distribution of this file, with or without modification,
1822are permitted in any medium without royalty provided the copyright
1823notice and this notice are preserved.
1824
08d56133
NC
1825Local Variables:
1826mode: change-log
1827left-margin: 8
1828fill-column: 74
1829version-control: never
1830End: