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ab902481
RS		 12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (validate_mips_insn): Move further up file.
4 Add insn_bits and decode_operand arguments. Use the mips_operand
5 fields to work out which bits an operand occupies. Detect double
6 definitions.
7 (validate_micromips_insn): Move further up file. Call into
8 validate_mips_insn.
9
2f8b73cc
RS		 102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
11
12 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
13
c8276761
RS		 142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
15
16 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
17 and "~".
18 (macro): Update accordingly.
19
77bd4346
RS		 202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
21
22 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
23 (imm_reloc): Delete.
24 (md_assemble): Remove imm_reloc handling.
25 (mips_ip): Update commentary. Use offset_expr and offset_reloc
26 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
27 Use a temporary array rather than imm_reloc when parsing
28 constant expressions. Remove imm_reloc initialization.
29 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
30 for the relaxable field. Use a relax_char variable to track the
31 type of this field. Remove imm_reloc initialization.
32
cc537e56
RS		 332013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
34
35 * config/tc-mips.c (mips16_ip): Handle "I".
36
ba92f887
MR		 372013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
38
39 * config/tc-mips.c (mips_flag_nan2008): New variable.
40 (options): Add OPTION_NAN enum value.
41 (md_longopts): Handle it.
42 (md_parse_option): Likewise.
43 (s_nan): New function.
44 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
45 (md_show_usage): Add -mnan.
46
47 * doc/as.texinfo (Overview): Add -mnan.
48 * doc/c-mips.texi (MIPS Opts): Document -mnan.
49 (MIPS NaN Encodings): New node. Document .nan directive.
50 (MIPS-Dependent): List the new node.
51
c1094734
TG		 522013-07-09 Tristan Gingold <gingold@adacore.com>
53
54 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
55
0cbbe1b8
RS		 562013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
57
58 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
59 for 'A' and assume that the constant has been elided if the result
60 is an O_register.
61
f2ae14a1
RS		 622013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
63
64 * config/tc-mips.c (gprel16_reloc_p): New function.
65 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
66 BFD_RELOC_UNUSED.
67 (offset_high_part, small_offset_p): New functions.
68 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
69 register load and store macros, handle the 16-bit offset case first.
70 If a 16-bit offset is not suitable for the instruction we're
71 generating, load it into the temporary register using
72 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
73 M_L_DAB code once the address has been constructed. For double load
74 and store macros, again handle the 16-bit offset case first.
75 If the second register cannot be accessed from the same high
76 part as the first, load it into AT using ADDRESS_ADDI_INSN.
77 Fix the handling of LD in cases where the first register is the
78 same as the base. Also handle the case where the offset is
79 not 16 bits and the second register cannot be accessed from the
80 same high part as the first. For unaligned loads and stores,
81 fuse the offbits == 12 and old "ab" handling. Apply this handling
82 whenever the second offset needs a different high part from the first.
83 Construct the offset using ADDRESS_ADDI_INSN where possible,
84 for offbits == 16 as well as offbits == 12. Use offset_reloc
85 when constructing the individual loads and stores.
86 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
87 and offset_reloc before matching against a particular opcode.
88 Handle elided 'A' constants. Allow 'A' constants to use
89 relocation operators.
90
5c324c16
RS		 912013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
94 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
95 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
96
23e69e47
RS		 972013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
98
99 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
100 Require the msb to be <= 31 for "+s". Check that the size is <= 31
101 for both "+s" and "+S".
102
27c5c572
RS		 1032013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
104
105 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
106 (mips_ip, mips16_ip): Handle "+i".
107
e76ff5ab
RS		 1082013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
109
110 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
111 (micromips_to_32_reg_h_map): Rename to...
112 (micromips_to_32_reg_h_map1): ...this.
113 (micromips_to_32_reg_i_map): Rename to...
114 (micromips_to_32_reg_h_map2): ...this.
115 (mips_lookup_reg_pair): New function.
116 (gpr_write_mask, macro): Adjust after above renaming.
117 (validate_micromips_insn): Remove "mi" handling.
118 (mips_ip): Likewise. Parse both registers in a pair for "mh".
119
fa7616a4
RS		 1202013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
121
122 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
123 (mips_ip): Remove "+D" and "+T" handling.
124
fb798c50
AK		 1252013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
126
127 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
128 relocs.
129
2c0a3565
MS		 1302013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
131
4aa2c5e2
MS		 132 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
133
1342013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
135
2c0a3565
MS		 136 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
137 (aarch64_force_relocation): Likewise.
138
f40da81b
AM		 1392013-07-02 Alan Modra <amodra@gmail.com>
140
141 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
142
81566a9b
MR		 1432013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
144
145 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
146 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
147 Replace @sc{mips16} with literal `MIPS16'.
148 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
149
a6bb11b2
YZ		 1502013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
151
152 * config/tc-aarch64.c (reloc_table): Replace
153 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
154 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
155 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
156 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
157 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
158 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
159 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
160 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
161 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
162 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
163 (aarch64_force_relocation): Likewise.
164
cec5225b
YZ		 1652013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
166
167 * config/tc-aarch64.c (ilp32_p): New static variable.
168 (elf64_aarch64_target_format): Return the target according to the
169 value of 'ilp32_p'.
170 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
171 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
172 (aarch64_dwarf2_addr_size): New function.
173 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
174 (DWARF2_ADDR_SIZE): New define.
175
e335d9cb
RS		 1762013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
177
178 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
179
18870af7
RS		 1802013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
181
182 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
183
833794fc
MR		 1842013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
185
186 * config/tc-mips.c (mips_set_options): Add insn32 member.
187 (mips_opts): Initialize it.
188 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
189 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
190 (md_longopts): Add "minsn32" and "mno-insn32" options.
191 (is_size_valid): Handle insn32 mode.
192 (md_assemble): Pass instruction string down to macro.
193 (brk_fmt): Add second dimension and insn32 mode initializers.
194 (mfhl_fmt): Likewise.
195 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
196 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
197 (macro_build_jalr, move_register): Handle insn32 mode.
198 (macro_build_branch_rs): Likewise.
199 (macro): Handle insn32 mode.
200 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
201 (mips_ip): Handle insn32 mode.
202 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
203 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
204 (mips_handle_align): Handle insn32 mode.
205 (md_show_usage): Add -minsn32 and -mno-insn32.
206
207 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
208 -mno-insn32 options.
209 (-minsn32, -mno-insn32): New options.
210 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
211 options.
212 (MIPS assembly options): New node. Document .set insn32 and
213 .set noinsn32.
214 (MIPS-Dependent): List the new node.
215
d1706f38
NC		 2162013-06-25 Nick Clifton <nickc@redhat.com>
217
218 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
219 the PC in indirect addressing on 430xv2 parts.
220 (msp430_operands): Add version test to hardware bug encoding
221 restrictions.
222
477330fc
RM		 2232013-06-24 Roland McGrath <mcgrathr@google.com>
224
d996d970
RM		 225 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
226 so it skips whitespace before it.
227 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
228
477330fc
RM		 229 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
230 (arm_reg_parse_multi): Skip whitespace first.
231 (parse_reg_list): Likewise.
232 (parse_vfp_reg_list): Likewise.
233 (s_arm_unwind_save_mmxwcg): Likewise.
234
24382199
NC		 2352013-06-24 Nick Clifton <nickc@redhat.com>
236
237 PR gas/15623
238 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
239
c3678916
RS		 2402013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
241
242 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
243
42429eac
RS		 2442013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c: Assert that offsetT and valueT are at least
247 8 bytes in size.
248 (GPR_SMIN, GPR_SMAX): New macros.
249 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
250
f3ded42a
RS		 2512013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
252
253 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
254 conditions. Remove any code deselected by them.
255 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
256
e8044f35
RS		 2572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
258
259 * NEWS: Note removal of ECOFF support.
260 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
261 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
262 (MULTI_CFILES): Remove config/e-mipsecoff.c.
263 * Makefile.in: Regenerate.
264 * configure.in: Remove MIPS ECOFF references.
265 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
266 Delete cases.
267 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
268 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
269 (mips-*-*): ...this single case.
270 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
271 MIPS emulations to be e-mipself*.
272 * configure: Regenerate.
273 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
274 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
275 (mips-*-sysv*): Remove coff and ecoff cases.
276 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
277 * ecoff.c: Remove reference to MIPS ECOFF.
278 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
279 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
280 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
281 (mips_hi_fixup): Tweak comment.
282 (append_insn): Require a howto.
283 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
284
98508b2a
RS		 2852013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
286
287 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
288 Use "CPU" instead of "cpu".
289 * doc/c-mips.texi: Likewise.
290 (MIPS Opts): Rename to MIPS Options.
291 (MIPS option stack): Rename to MIPS Option Stack.
292 (MIPS ASE instruction generation overrides): Rename to
293 MIPS ASE Instruction Generation Overrides (for now).
294 (MIPS floating-point): Rename to MIPS Floating-Point.
295
fc16f8cc
RS		 2962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
297
298 * doc/c-mips.texi (MIPS Macros): New section.
299 (MIPS Object): Replace with...
300 (MIPS Small Data): ...this new section.
301
5a7560b5
RS		 3022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
303
304 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
305 Capitalize name. Use @kindex instead of @cindex for .set entries.
306
a1b86ab7
RS		 3072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
308
309 * doc/c-mips.texi (MIPS Stabs): Remove section.
310
c6278170
RS		 3112013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
312
313 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
314 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
315 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
316 (ISA_SUPPORTS_VIRT64_ASE): Delete.
317 (mips_ase): New structure.
318 (mips_ases): New table.
319 (FP64_ASES): New macro.
320 (mips_ase_groups): New array.
321 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
322 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
323 functions.
324 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
325 (md_parse_option): Use mips_ases and mips_set_ase instead of
326 separate case statements for each ASE option.
327 (mips_after_parse_args): Use FP64_ASES. Use
328 mips_check_isa_supports_ases to check the ASEs against
329 other options.
330 (s_mipsset): Use mips_ases and mips_set_ase instead of
331 separate if statements for each ASE option. Use
332 mips_check_isa_supports_ases, even when a non-ASE option
333 is specified.
334
63a4bc21
KT		 3352013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
336
337 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
338
c31f3936
RS		 3392013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
340
341 * config/tc-mips.c (md_shortopts, options, md_longopts)
342 (md_longopts_size): Move earlier in file.
343
846ef2d0
RS		 3442013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
345
346 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
347 with a single "ase" bitmask.
348 (mips_opts): Update accordingly.
349 (file_ase, file_ase_explicit): New variables.
350 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
351 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
352 (ISA_HAS_ROR): Adjust for mips_set_options change.
353 (is_opcode_valid): Take the base ase mask directly from mips_opts.
354 (mips_ip): Adjust for mips_set_options change.
355 (md_parse_option): Likewise. Update file_ase_explicit.
356 (mips_after_parse_args): Adjust for mips_set_options change.
357 Use bitmask operations to select the default ASEs. Set file_ase
358 rather than individual per-ASE variables.
359 (s_mipsset): Adjust for mips_set_options change.
360 (mips_elf_final_processing): Test file_ase rather than
361 file_ase_mdmx. Remove commented-out code.
362
d16afab6
RS		 3632013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
364
365 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
366 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
367 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
368 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
369 (mips_after_parse_args): Use the new "ase" field to choose
370 the default ASEs.
371 (mips_cpu_info_table): Move ASEs from the "flags" field to the
372 "ase" field.
373
e83a675f
RE		 3742013-06-18 Richard Earnshaw <rearnsha@arm.com>
375
376 * config/tc-arm.c (symbol_preemptible): New function.
377 (relax_branch): Use it.
378
7f3c4072
CM		 3792013-06-17 Catherine Moore <clm@codesourcery.com>
380 Maciej W. Rozycki <macro@codesourcery.com>
381 Chao-Ying Fu <fu@mips.com>
382
383 * config/tc-mips.c (mips_set_options): Add ase_eva.
384 (mips_set_options mips_opts): Add ase_eva.
385 (file_ase_eva): Declare.
386 (ISA_SUPPORTS_EVA_ASE): Define.
387 (IS_SEXT_9BIT_NUM): Define.
388 (MIPS_CPU_ASE_EVA): Define.
389 (is_opcode_valid): Add support for ase_eva.
390 (macro_build): Likewise.
391 (macro): Likewise.
392 (validate_mips_insn): Likewise.
393 (validate_micromips_insn): Likewise.
394 (mips_ip): Likewise.
395 (options): Add OPTION_EVA and OPTION_NO_EVA.
396 (md_longopts): Add -meva and -mno-eva.
397 (md_parse_option): Process new options.
398 (mips_after_parse_args): Check for valid EVA combinations.
399 (s_mipsset): Likewise.
400
e410add4
RS		 4012013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
402
403 * dwarf2dbg.h (dwarf2_move_insn): Declare.
404 * dwarf2dbg.c (line_subseg): Add pmove_tail.
405 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
406 (dwarf2_gen_line_info_1): Update call accordingly.
407 (dwarf2_move_insn): New function.
408 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
409
6a50d470
RS		 4102013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
411
412 Revert:
413
414 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
415
416 PR gas/13024
417 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
418 (dwarf2_gen_line_info_1): Delete.
419 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
420 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
421 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
422 (dwarf2_directive_loc): Push previous .locs instead of generating
423 them immediately.
424
f122319e
CF		 4252013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
426
427 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
428 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
429
909c7f9c
NC		 4302013-06-13 Nick Clifton <nickc@redhat.com>
431
432 PR gas/15602
433 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
434 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
435 function. Generates an error if the adjusted offset is out of a
436 16-bit range.
437
5d5755a7
SL		 4382013-06-12 Sandra Loosemore <sandra@codesourcery.com>
439
440 * config/tc-nios2.c (md_apply_fix): Mask constant
441 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
442
3bf0dbfb
MR		 4432013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
444
445 * config/tc-mips.c (append_insn): Don't do branch relaxation for
446 MIPS-3D instructions either.
447 (md_convert_frag): Update the COPx branch mask accordingly.
448
449 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
450 option.
451 * doc/as.texinfo (Overview): Add --relax-branch and
452 --no-relax-branch.
453 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
454 --no-relax-branch.
455
9daf7bab
SL		 4562013-06-09 Sandra Loosemore <sandra@codesourcery.com>
457
458 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
459 omitted.
460
d301a56b
RS		 4612013-06-08 Catherine Moore <clm@codesourcery.com>
462
463 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
464 (is_opcode_valid_16): Pass ase value to opcode_is_member.
465 (append_insn): Change INSN_xxxx to ASE_xxxx.
466
7bab7634
DC		 4672013-06-01 George Thomas <george.thomas@atmel.com>
468
469 * gas/config/tc-avr.c: Change ISA for devices with USB support to
470 AVR_ISA_XMEGAU
471
f60cf82f
L		 4722013-05-31 H.J. Lu <hongjiu.lu@intel.com>
473
474 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
475 for ELF.
476
a3f278e2
CM		 4772013-05-31 Paul Brook <paul@codesourcery.com>
478
479 gas/
480 * config/tc-mips.c (s_ehword): New.
481
067ec077
CM		 4822013-05-30 Paul Brook <paul@codesourcery.com>
483
484 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
485
d6101ac2
MR		 4862013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
487
488 * write.c (resolve_reloc_expr_symbols): On REL targets don't
489 convert relocs who have no relocatable field either. Rephrase
490 the conditional so that the PC-relative check is only applied
491 for REL targets.
492
f19ccbda
MR		 4932013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
494
495 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
496 calculation.
497
418009c2
YZ		 4982013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
499
500 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 501 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 502 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
503 (md_apply_fix): Likewise.
504 (aarch64_force_relocation): Likewise.
505
0a8897c7
KT		 5062013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
507
508 * config/tc-arm.c (it_fsm_post_encode): Improve
509 warning messages about deprecated IT block formats.
510
89d2a2a3
MS		 5112013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
512
513 * config/tc-aarch64.c (md_apply_fix): Move value range checking
514 inside fx_done condition.
515
c77c0862
RS		 5162013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
517
518 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
519
c0637f3a
PB		 5202013-05-20 Peter Bergner <bergner@vnet.ibm.com>
521
522 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
523 and clean up warning when using PRINT_OPCODE_TABLE.
524
5656a981
AM		 5252013-05-20 Alan Modra <amodra@gmail.com>
526
527 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
528 and data fixups performing shift/high adjust/sign extension on
529 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
530 when writing data fixups rather than recalculating size.
531
997b26e8
JBG		 5322013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
533
534 * doc/c-msp430.texi: Fix typo.
535
9f6e76f4
TG		 5362013-05-16 Tristan Gingold <gingold@adacore.com>
537
538 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
539 are also TOC symbols.
540
638d3803
NC		 5412013-05-16 Nick Clifton <nickc@redhat.com>
542
543 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
544 Add -mcpu command to specify core type.
997b26e8 545 * doc/c-msp430.texi: Update documentation.
638d3803 546
b015e599
AP		 5472013-05-09 Andrew Pinski <apinski@cavium.com>
548
549 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
550 (mips_opts): Update for the new field.
551 (file_ase_virt): New variable.
552 (ISA_SUPPORTS_VIRT_ASE): New macro.
553 (ISA_SUPPORTS_VIRT64_ASE): New macro.
554 (MIPS_CPU_ASE_VIRT): New define.
555 (is_opcode_valid): Handle ase_virt.
556 (macro_build): Handle "+J".
557 (validate_mips_insn): Likewise.
558 (mips_ip): Likewise.
559 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
560 (md_longopts): Add mvirt and mnovirt
561 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
562 (mips_after_parse_args): Handle ase_virt field.
563 (s_mipsset): Handle "virt" and "novirt".
564 (mips_elf_final_processing): Add a comment about virt ASE might need
565 a new flag.
566 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
567 * doc/c-mips.texi: Document -mvirt and -mno-virt.
568 Document ".set virt" and ".set novirt".
569
da8094d7
AM		 5702013-05-09 Alan Modra <amodra@gmail.com>
571
572 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
573 control of operand flag bits.
574
c5f8c205
AM		 5752013-05-07 Alan Modra <amodra@gmail.com>
576
577 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
578 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
579 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
580 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
581 (md_apply_fix): Set fx_no_overflow for assorted relocations.
582 Shift and sign-extend fieldval for use by some VLE reloc
583 operand->insert functions.
584
b47468a6
CM		 5852013-05-06 Paul Brook <paul@codesourcery.com>
586 Catherine Moore <clm@codesourcery.com>
587
c5f8c205
AM		 588 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
589 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 590 (md_apply_fix): Likewise.
591 (tc_gen_reloc): Likewise.
592
2de39019
CM		 5932013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
594
595 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
596 (mips_fix_adjustable): Adjust pc-relative check to use
597 limited_pc_reloc_p.
598
754e2bb9
RS		 5992013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
600
601 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
602 (s_mips_stab): Do not restrict to stabn only.
603
13761a11
NC		 6042013-05-02 Nick Clifton <nickc@redhat.com>
605
606 * config/tc-msp430.c: Add support for the MSP430X architecture.
607 Add code to insert a NOP instruction after any instruction that
608 might change the interrupt state.
609 Add support for the LARGE memory model.
610 Add code to initialise the .MSP430.attributes section.
611 * config/tc-msp430.h: Add support for the MSP430X architecture.
612 * doc/c-msp430.texi: Document the new -mL and -mN command line
613 options.
614 * NEWS: Mention support for the MSP430X architecture.
615
df26367c
MR		 6162013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
617
618 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
619 alpha*-*-linux*ecoff*.
620
f02d8318
CF		 6212013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
622
623 * config/tc-mips.c (mips_ip): Add sizelo.
624 For "+C", "+G", and "+H", set sizelo and compare against it.
625
b40bf0a2
NC		 6262013-04-29 Nick Clifton <nickc@redhat.com>
627
628 * as.c (Options): Add -gdwarf-sections.
629 (parse_args): Likewise.
630 * as.h (flag_dwarf_sections): Declare.
631 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
632 (process_entries): When -gdwarf-sections is enabled generate
633 fragmentary .debug_line sections.
634 (out_debug_line): Set the section for the .debug_line section end
635 symbol.
636 * doc/as.texinfo: Document -gdwarf-sections.
637 * NEWS: Mention -gdwarf-sections.
638
8eeccb77 6392013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 640
641 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
642 according to the target parameter. Don't call s_segm since s_segm
643 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
644 initialized yet.
645 (md_begin): Call s_segm according to target parameter from command
646 line.
647
49926cd0
AM		 6482013-04-25 Alan Modra <amodra@gmail.com>
649
650 * configure.in: Allow little-endian linux.
651 * configure: Regenerate.
652
e3031850
SL		 6532013-04-24 Sandra Loosemore <sandra@codesourcery.com>
654
655 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
656 "fstatus" control register to "eccinj".
657
cb948fc0
KT		 6582013-04-19 Kai Tietz <ktietz@redhat.com>
659
660 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
661
4455e9ad
JB		 6622013-04-15 Julian Brown <julian@codesourcery.com>
663
664 * expr.c (add_to_result, subtract_from_result): Make global.
665 * expr.h (add_to_result, subtract_from_result): Add prototypes.
666 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
667 subtract_from_result to handle extra bit of precision for .sleb128
668 directive operands.
669
956a6ba3
JB		 6702013-04-10 Julian Brown <julian@codesourcery.com>
671
672 * read.c (convert_to_bignum): Add sign parameter. Use it
673 instead of X_unsigned to determine sign of resulting bignum.
674 (emit_expr): Pass extra argument to convert_to_bignum.
675 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
676 X_extrabit to convert_to_bignum.
677 (parse_bitfield_cons): Set X_extrabit.
678 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
679 Initialise X_extrabit field as appropriate.
680 (add_to_result): New.
681 (subtract_from_result): New.
682 (expr): Use above.
683 * expr.h (expressionS): Add X_extrabit field.
684
eb9f3f00
JB		 6852013-04-10 Jan Beulich <jbeulich@suse.com>
686
687 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
688 register being PC when is_t or writeback, and use distinct
689 diagnostic for the latter case.
690
ccb84d65
JB		 6912013-04-10 Jan Beulich <jbeulich@suse.com>
692
693 * gas/config/tc-arm.c (parse_operands): Re-write
694 po_barrier_or_imm().
695 (do_barrier): Remove bogus constraint().
696 (do_t_barrier): Remove.
697
4d13caa0
NC		 6982013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
699
700 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
701 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
702 ATmega2564RFR2
703 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
704
16d02dc9
JB		 7052013-04-09 Jan Beulich <jbeulich@suse.com>
706
707 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
708 Use local variable Rt in more places.
709 (do_vmsr): Accept all control registers.
710
05ac0ffb
JB		 7112013-04-09 Jan Beulich <jbeulich@suse.com>
712
713 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
714 if there was none specified for moves between scalar and core
715 register.
716
2d51fb74
JB		 7172013-04-09 Jan Beulich <jbeulich@suse.com>
718
719 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
720 NEON_ALL_LANES case.
721
94dcf8bf
JB		 7222013-04-08 Jan Beulich <jbeulich@suse.com>
723
724 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
725 PC-relative VSTR.
726
1472d06f
JB		 7272013-04-08 Jan Beulich <jbeulich@suse.com>
728
729 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
730 entry to sp_fiq.
731
0c76cae8
AM		 7322013-04-03 Alan Modra <amodra@gmail.com>
733
734 * doc/as.texinfo: Add support to generate man options for h8300.
735 * doc/c-h8300.texi: Likewise.
736
92eb40d9
RR		 7372013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
738
739 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
740 Cortex-A57.
741
51dcdd4d
NC		 7422013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
743
744 PR binutils/15068
745 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
746
c5d685bf
NC		 7472013-03-26 Nick Clifton <nickc@redhat.com>
748
9b978282
NC		 749 PR gas/15295
750 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
751 start of the file each time.
752
c5d685bf
NC		 753 PR gas/15178
754 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
755 FreeBSD targets.
756
9699c833
TG		 7572013-03-26 Douglas B Rupp <rupp@gnat.com>
758
759 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
760 after fixup.
761
4755303e
WN		 7622013-03-21 Will Newton <will.newton@linaro.org>
763
764 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
765 pc-relative str instructions in Thumb mode.
766
81f5558e
NC		 7672013-03-21 Michael Schewe <michael.schewe@gmx.net>
768
769 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
770 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
771 R_H8_DISP32A16.
772 * config/tc-h8300.h: Remove duplicated defines.
773
71863e73
NC		 7742013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
775
776 PR gas/15282
777 * tc-avr.c (mcu_has_3_byte_pc): New function.
778 (tc_cfi_frame_initial_instructions): Call it to find return
779 address size.
780
795b8e6b
NC		 7812013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
782
783 PR gas/15095
784 * config/tc-tic6x.c (tic6x_try_encode): Handle
785 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
786 encode register pair numbers when required.
787
ba86b375
WN		 7882013-03-15 Will Newton <will.newton@linaro.org>
789
790 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
791 in vstr in Thumb mode for pre-ARMv7 cores.
792
9e6f3811
AS		 7932013-03-14 Andreas Schwab <schwab@suse.de>
794
795 * doc/c-arc.texi (ARC Directives): Revert last change and use
796 @itemize instead of @table.
797 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
798
b10bf8c5
NC		 7992013-03-14 Nick Clifton <nickc@redhat.com>
800
801 PR gas/15273
802 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
803 NULL message, instead just check ARM_CPU_IS_ANY directly.
804
ba724cfc
NC		 8052013-03-14 Nick Clifton <nickc@redhat.com>
806
807 PR gas/15212
9e6f3811 808 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 809 for table format.
810 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
811 to the @item directives.
812 (ARM-Neon-Alignment): Move to correct place in the document.
813 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
814 formatting.
815 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
816 @smallexample.
817
531a94fd
SL		 8182013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
819
820 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
821 case. Add default BAD_CASE to switch.
822
dad60f8e
SL		 8232013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
824
825 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
826 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
827
dd5181d5
KT		 8282013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
829
830 * config/tc-arm.c (crc_ext_armv8): New feature set.
831 (UNPRED_REG): New macro.
832 (do_crc32_1): New function.
833 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
834 do_crc32ch, do_crc32cw): Likewise.
835 (TUEc): New macro.
836 (insns): Add entries for crc32 mnemonics.
837 (arm_extensions): Add entry for crc.
838
8e723a10
CLT		 8392013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
840
841 * write.h (struct fix): Add fx_dot_frag field.
842 (dot_frag): Declare.
843 * write.c (dot_frag): New variable.
844 (fix_new_internal): Set fx_dot_frag field with dot_frag.
845 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
846 * expr.c (expr): Save value of frag_now in dot_frag when setting
847 dot_value.
848 * read.c (emit_expr): Likewise. Delete comments.
849
be05d201
L		 8502013-03-07 H.J. Lu <hongjiu.lu@intel.com>
851
852 * config/tc-i386.c (flag_code_names): Removed.
853 (i386_index_check): Rewrote.
854
62b0d0d5
YZ		 8552013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
856
857 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
858 add comment.
859 (aarch64_double_precision_fmovable): New function.
860 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
861 function; handle hexadecimal representation of IEEE754 encoding.
862 (parse_operands): Update the call to parse_aarch64_imm_float.
863
165de32a
L		 8642013-02-28 H.J. Lu <hongjiu.lu@intel.com>
865
866 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
867 (check_hle): Updated.
868 (md_assemble): Likewise.
869 (parse_insn): Likewise.
870
d5de92cf
L		 8712013-02-28 H.J. Lu <hongjiu.lu@intel.com>
872
873 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 874 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 875 (parse_insn): Remove expecting_string_instruction. Set
876 i.rep_prefix.
877
e60bb1dd
YZ		 8782013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
879
880 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
881
aeebdd9b
YZ		 8822013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
883
884 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
885 for system registers.
886
4107ae22
DD		 8872013-02-27 DJ Delorie <dj@redhat.com>
888
889 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
890 (rl78_op): Handle %code().
891 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
892 (tc_gen_reloc): Likwise; convert to a computed reloc.
893 (md_apply_fix): Likewise.
894
151fa98f
NC		 8952013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
896
897 * config/rl78-parse.y: Fix encoding of DIVWU insn.
898
70a8bc5b 8992013-02-25 Terry Guo <terry.guo@arm.com>
900
901 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
902 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
903 list of accepted CPUs.
904
5c111e37
L		 9052013-02-19 H.J. Lu <hongjiu.lu@intel.com>
906
907 PR gas/15159
908 * config/tc-i386.c (cpu_arch): Add ".smap".
909
910 * doc/c-i386.texi: Document smap.
911
8a75745d
MR		 9122013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
913
914 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
915 mips_assembling_insn appropriately.
916 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
917
79850f26
MR		 9182013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
919
cf29fc61 920 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 921 extraneous braces.
922
4c261dff
NC		 9232013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
924
5c111e37 925 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 926
ea33f281
NC		 9272013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
928
929 * configure.tgt: Add nios2-*-rtems*.
930
a1ccaec9
YZ		 9312013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
932
933 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
934 NULL.
935
0aa27725
RS		 9362013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
937
938 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
939 (macro): Use it. Assert that trunc.w.s is not used for r5900.
940
da4339ed
NC		 9412013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
942
943 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
944 core.
945
36591ba1 9462013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 947 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 948
949 Based on patches from Altera Corporation.
950
951 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
952 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
953 * Makefile.in: Regenerated.
954 * configure.tgt: Add case for nios2*-linux*.
955 * config/obj-elf.c: Conditionally include elf/nios2.h.
956 * config/tc-nios2.c: New file.
957 * config/tc-nios2.h: New file.
958 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
959 * doc/Makefile.in: Regenerated.
960 * doc/all.texi: Set NIOSII.
961 * doc/as.texinfo (Overview): Add Nios II options.
962 (Machine Dependencies): Include c-nios2.texi.
963 * doc/c-nios2.texi: New file.
964 * NEWS: Note Altera Nios II support.
965
94d4433a
AM		 9662013-02-06 Alan Modra <amodra@gmail.com>
967
968 PR gas/14255
969 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
970 Don't skip fixups with fx_subsy non-NULL.
971 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
972 with fx_subsy non-NULL.
973
ace9af6f
L		 9742013-02-04 H.J. Lu <hongjiu.lu@intel.com>
975
976 * doc/c-metag.texi: Add "@c man" markers.
977
89d67ed9
AM		 9782013-02-04 Alan Modra <amodra@gmail.com>
979
980 * write.c (fixup_segment): Return void. Delete seg_reloc_count
981 related code.
982 (TC_ADJUST_RELOC_COUNT): Delete.
983 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
984
89072bd6
AM		 9852013-02-04 Alan Modra <amodra@gmail.com>
986
987 * po/POTFILES.in: Regenerate.
988
f9b2d544
NC		 9892013-01-30 Markos Chandras <markos.chandras@imgtec.com>
990
991 * config/tc-metag.c: Make SWAP instruction less permissive with
992 its operands.
993
392ca752
DD		 9942013-01-29 DJ Delorie <dj@redhat.com>
995
996 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
997 relocs in .word/.etc statements.
998
427d0db6
RM		 9992013-01-29 Roland McGrath <mcgrathr@google.com>
1000
1001 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1002 immediate value for 8-bit offset" error so it shows line info.
1003
4faf939a
JM		 10042013-01-24 Joseph Myers <joseph@codesourcery.com>
1005
1006 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1007 for 64-bit output.
1008
78c8d46c
NC		 10092013-01-24 Nick Clifton <nickc@redhat.com>
1010
1011 * config/tc-v850.c: Add support for e3v5 architecture.
1012 * doc/c-v850.texi: Mention new support.
1013
fb5b7503
NC		 10142013-01-23 Nick Clifton <nickc@redhat.com>
1015
1016 PR gas/15039
1017 * config/tc-avr.c: Include dwarf2dbg.h.
1018
8ce3d284
L		 10192013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1020
1021 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1022 (tc_i386_fix_adjustable): Likewise.
1023 (lex_got): Likewise.
1024 (tc_gen_reloc): Likewise.
1025
f5555712
YZ		 10262013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1027
1028 * config/tc-aarch64.c (output_operand_error_record): Change to output
1029 the out-of-range error message as value-expected message if there is
1030 only one single value in the expected range.
1031 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1032 LSL #0 as a programmer-friendly feature.
1033
8fd4256d
L		 10342013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1035
1036 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1037 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1038 BFD_RELOC_64_SIZE relocations.
1039 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1040 for it.
1041 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1042 relocations against local symbols.
1043
a5840dce
AM		 10442013-01-16 Alan Modra <amodra@gmail.com>
1045
1046 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1047 finding some sort of toc syntax error, and break to avoid
1048 compiler uninit warning.
1049
af89796a
L		 10502013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1051
1052 PR gas/15019
1053 * config/tc-i386.c (lex_got): Increment length by 1 if the
1054 relocation token is removed.
1055
dd42f060
NC		 10562013-01-15 Nick Clifton <nickc@redhat.com>
1057
1058 * config/tc-v850.c (md_assemble): Allow signed values for
1059 V850E_IMMEDIATE.
1060
464e3686
SK		 10612013-01-11 Sean Keys <skeys@ipdatasys.com>
1062
1063 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1064 git to cvs.
464e3686 1065
5817ffd1
PB		 10662013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1067
1068 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1069 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1070 * config/tc-ppc.c (md_show_usage): Likewise.
1071 (ppc_handle_align): Handle power8's group ending nop.
1072
f4b1f6a9
SK		 10732013-01-10 Sean Keys <skeys@ipdatasys.com>
1074
1075 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1076 that the assember exits after the opcodes have been printed.
f4b1f6a9 1077
34bca508
L		 10782013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1079
1080 * app.c: Remove trailing white spaces.
1081 * as.c: Likewise.
1082 * as.h: Likewise.
1083 * cond.c: Likewise.
1084 * dw2gencfi.c: Likewise.
1085 * dwarf2dbg.h: Likewise.
1086 * ecoff.c: Likewise.
1087 * input-file.c: Likewise.
1088 * itbl-lex.h: Likewise.
1089 * output-file.c: Likewise.
1090 * read.c: Likewise.
1091 * sb.c: Likewise.
1092 * subsegs.c: Likewise.
1093 * symbols.c: Likewise.
1094 * write.c: Likewise.
1095 * config/tc-i386.c: Likewise.
1096 * doc/Makefile.am: Likewise.
1097 * doc/Makefile.in: Likewise.
1098 * doc/c-aarch64.texi: Likewise.
1099 * doc/c-alpha.texi: Likewise.
1100 * doc/c-arc.texi: Likewise.
1101 * doc/c-arm.texi: Likewise.
1102 * doc/c-avr.texi: Likewise.
1103 * doc/c-bfin.texi: Likewise.
1104 * doc/c-cr16.texi: Likewise.
1105 * doc/c-d10v.texi: Likewise.
1106 * doc/c-d30v.texi: Likewise.
1107 * doc/c-h8300.texi: Likewise.
1108 * doc/c-hppa.texi: Likewise.
1109 * doc/c-i370.texi: Likewise.
1110 * doc/c-i386.texi: Likewise.
1111 * doc/c-i860.texi: Likewise.
1112 * doc/c-m32c.texi: Likewise.
1113 * doc/c-m32r.texi: Likewise.
1114 * doc/c-m68hc11.texi: Likewise.
1115 * doc/c-m68k.texi: Likewise.
1116 * doc/c-microblaze.texi: Likewise.
1117 * doc/c-mips.texi: Likewise.
1118 * doc/c-msp430.texi: Likewise.
1119 * doc/c-mt.texi: Likewise.
1120 * doc/c-s390.texi: Likewise.
1121 * doc/c-score.texi: Likewise.
1122 * doc/c-sh.texi: Likewise.
1123 * doc/c-sh64.texi: Likewise.
1124 * doc/c-tic54x.texi: Likewise.
1125 * doc/c-tic6x.texi: Likewise.
1126 * doc/c-v850.texi: Likewise.
1127 * doc/c-xc16x.texi: Likewise.
1128 * doc/c-xgate.texi: Likewise.
1129 * doc/c-xtensa.texi: Likewise.
1130 * doc/c-z80.texi: Likewise.
1131 * doc/internals.texi: Likewise.
1132
4c665b71
RM		 11332013-01-10 Roland McGrath <mcgrathr@google.com>
1134
1135 * hash.c (hash_new_sized): Make it global.
1136 * hash.h: Declare it.
1137 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1138 pass a small size.
1139
a3c62988
NC		 11402013-01-10 Will Newton <will.newton@imgtec.com>
1141
1142 * Makefile.am: Add Meta.
1143 * Makefile.in: Regenerate.
1144 * config/tc-metag.c: New file.
1145 * config/tc-metag.h: New file.
1146 * configure.tgt: Add Meta.
1147 * doc/Makefile.am: Add Meta.
1148 * doc/Makefile.in: Regenerate.
1149 * doc/all.texi: Add Meta.
1150 * doc/as.texiinfo: Document Meta options.
1151 * doc/c-metag.texi: New file.
1152
b37df7c4
SE		 11532013-01-09 Steve Ellcey <sellcey@mips.com>
1154
1155 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1156 calls.
1157 * config/tc-mips.c (internalError): Remove, replace with abort.
1158
a3251895
YZ		 11592013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1160
1161 * config/tc-aarch64.c (parse_operands): Change to compare the result
1162 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1163
8ab8155f
NC		 11642013-01-07 Nick Clifton <nickc@redhat.com>
1165
1166 PR gas/14887
1167 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1168 anticipated character.
1169 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1170 here as it is no longer needed.
1171
a4ac1c42
AS		 11722013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1173
1174 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1175 * doc/c-score.texi (SCORE-Opts): Likewise.
1176 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1177
e407c74b
NC		 11782013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1179
1180 * config/tc-mips.c: Add support for MIPS r5900.
1181 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1182 lq and sq.
1183 (can_swap_branch_p, get_append_method): Detect some conditional
1184 short loops to fix a bug on the r5900 by NOP in the branch delay
1185 slot.
1186 (M_MUL): Support 3 operands in multu on r5900.
1187 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1188 (s_mipsset): Force 32 bit floating point on r5900.
1189 (mips_ip): Check parameter range of instructions mfps and mtps on
1190 r5900.
1191 * configure.in: Detect CPU type when target string contains r5900
1192 (e.g. mips64r5900el-linux-gnu).
1193
62658407
L		 11942013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1195
1196 * as.c (parse_args): Update copyright year to 2013.
1197
95830fd1
YZ		 11982013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1199
1200 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1201 and "cortex57".
1202
517bb291 12032013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1204
517bb291
NC		 1205 PR gas/14987
1206 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1207 closing bracket.
d709e4e6 1208
517bb291 1209For older changes see ChangeLog-2012
08d56133 1210\f
517bb291 1211Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1212
1213Copying and distribution of this file, with or without modification,
1214are permitted in any medium without royalty provided the copyright
1215notice and this notice are preserved.
1216
08d56133
NC		 1217Local Variables:
1218mode: change-log
1219left-margin: 8
1220fill-column: 74
1221version-control: never
1222End:
A mirror of the official binutils-gdb repository