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Correct MPX ChangeLog entries
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12013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
2 Kirill Yukhin <kirill.yukhin@intel.com>
3 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
4
5 * config/tc-i386.c (BND_PREFIX): New.
6 (struct _i386_insn): Add new field bnd_prefix.
7 (add_bnd_prefix): New.
8 (cpu_arch): Add MPX.
9 (i386_operand_type): Add regbnd.
10 (md_assemble): Handle BND prefixes.
11 (parse_insn): Likewise.
12 (output_branch): Likewise.
13 (output_jump): Likewise.
14 (build_modrm_byte): Handle regbnd.
15 (OPTION_MADD_BND_PREFIX): New.
16 (md_longopts): Add entry for 'madd-bnd-prefix'.
17 (md_parse_option): Handle madd-bnd-prefix option.
18 (md_show_usage): Add description for madd-bnd-prefix
19 option.
20 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
21
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222013-07-24 Tristan Gingold <gingold@adacore.com>
23
24 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
25 xcoff targets.
26
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272013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
28
29 * config/tc-s390.c (s390_machine): Don't force the .machine
30 argument to lower case.
31
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322013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33
34 * config/tc-arm.c (s_arm_arch_extension): Improve error message
35 for invalid extension.
36
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372013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
38
39 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
40 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
41 (aarch64_abi): New variable.
42 (ilp32_p): Change to be a macro.
43 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
44 (struct aarch64_option_abi_value_table): New struct.
45 (aarch64_abis): New table.
46 (aarch64_parse_abi): New function.
47 (aarch64_long_opts): Add entry for -mabi=.
48 * doc/as.texinfo (Target AArch64 options): Document -mabi.
49 * doc/c-aarch64.texi: Likewise.
50
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512013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
52
53 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
54 unsigned comparison.
55
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562013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
57
58 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
59 RX610.
60 * config/rx-parse.y: (rx_check_float_support): Add function to
61 check floating point operation support for target RX100 and
62 RX200.
63 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
64 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
65 RX200, RX600, and RX610
66
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672013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
68
69 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
70
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712013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
72
73 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
74 * doc/c-avr.texi: Likewise.
75
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762013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
77
78 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
79 error with older GCCs.
80 (mips16_macro_build): Dereference args.
81
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822013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
83
84 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
85 New functions, split out from...
86 (reg_lookup): ...here. Remove itbl support.
87 (reglist_lookup): Delete.
88 (mips_operand_token_type): New enum.
89 (mips_operand_token): New structure.
90 (mips_operand_tokens): New variable.
91 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
92 (mips_parse_arguments): New functions.
93 (md_begin): Initialize mips_operand_tokens.
94 (mips_arg_info): Add a token field. Remove optional_reg field.
95 (match_char, match_expression): New functions.
96 (match_const_int): Use match_expression. Remove "s" argument
97 and return a boolean result. Remove O_register handling.
98 (match_regno, match_reg, match_reg_range): New functions.
99 (match_int_operand, match_mapped_int_operand, match_msb_operand)
100 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
101 (match_addiusp_operand, match_clo_clz_dest_operand)
102 (match_lwm_swm_list_operand, match_entry_exit_operand)
103 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
104 (match_tied_reg_operand): Remove "s" argument and return a boolean
105 result. Match tokens rather than text. Update calls to
106 match_const_int. Rely on match_regno to call check_regno.
107 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
108 "arg" argument. Return a boolean result.
109 (parse_float_constant): Replace with...
110 (match_float_constant): ...this new function.
111 (match_operand): Remove "s" argument and return a boolean result.
112 Update calls to subfunctions.
113 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
114 rather than string-parsing routines. Update handling of optional
115 registers for token scheme.
116
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1172013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * config/tc-mips.c (parse_float_constant): Split out from...
120 (mips_ip): ...here.
121
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1222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
123
124 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
125 Delete.
126
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1272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
130 (match_entry_exit_operand): New function.
131 (match_save_restore_list_operand): Likewise.
132 (match_operand): Use them.
133 (check_absolute_expr): Delete.
134 (mips16_ip): Rewrite main parsing loop to use mips_operands.
135
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1362013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * config/tc-mips.c: Enable functions commented out in previous patch.
139 (SKIP_SPACE_TABS): Move further up file.
140 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
141 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
142 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
143 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
144 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
145 (micromips_imm_b_map, micromips_imm_c_map): Delete.
146 (mips_lookup_reg_pair): Delete.
147 (macro): Use report_bad_range and report_bad_field.
148 (mips_immed, expr_const_in_range): Delete.
149 (mips_ip): Rewrite main parsing loop to use new functions.
150
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1512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
152
153 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
154 Change return type to bfd_boolean.
155 (report_bad_range, report_bad_field): New functions.
156 (mips_arg_info): New structure.
157 (match_const_int, convert_reg_type, check_regno, match_int_operand)
158 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
159 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
160 (match_addiusp_operand, match_clo_clz_dest_operand)
161 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
162 (match_pc_operand, match_tied_reg_operand, match_operand)
163 (check_completed_insn): New functions, commented out for now.
164
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1652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * config/tc-mips.c (insn_insert_operand): New function.
168 (macro_build, mips16_macro_build): Put null character check
169 in the for loop and convert continues to breaks. Use operand
170 structures to handle constant operands.
171
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1722013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
173
174 * config/tc-mips.c (validate_mips_insn): Move further up file.
175 Add insn_bits and decode_operand arguments. Use the mips_operand
176 fields to work out which bits an operand occupies. Detect double
177 definitions.
178 (validate_micromips_insn): Move further up file. Call into
179 validate_mips_insn.
180
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1812013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
182
183 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
184
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1852013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
186
187 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
188 and "~".
189 (macro): Update accordingly.
190
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1912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
192
193 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
194 (imm_reloc): Delete.
195 (md_assemble): Remove imm_reloc handling.
196 (mips_ip): Update commentary. Use offset_expr and offset_reloc
197 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
198 Use a temporary array rather than imm_reloc when parsing
199 constant expressions. Remove imm_reloc initialization.
200 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
201 for the relaxable field. Use a relax_char variable to track the
202 type of this field. Remove imm_reloc initialization.
203
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2042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
205
206 * config/tc-mips.c (mips16_ip): Handle "I".
207
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2082013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
209
210 * config/tc-mips.c (mips_flag_nan2008): New variable.
211 (options): Add OPTION_NAN enum value.
212 (md_longopts): Handle it.
213 (md_parse_option): Likewise.
214 (s_nan): New function.
215 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
216 (md_show_usage): Add -mnan.
217
218 * doc/as.texinfo (Overview): Add -mnan.
219 * doc/c-mips.texi (MIPS Opts): Document -mnan.
220 (MIPS NaN Encodings): New node. Document .nan directive.
221 (MIPS-Dependent): List the new node.
222
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2232013-07-09 Tristan Gingold <gingold@adacore.com>
224
225 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
226
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2272013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
228
229 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
230 for 'A' and assume that the constant has been elided if the result
231 is an O_register.
232
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2332013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
234
235 * config/tc-mips.c (gprel16_reloc_p): New function.
236 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
237 BFD_RELOC_UNUSED.
238 (offset_high_part, small_offset_p): New functions.
239 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
240 register load and store macros, handle the 16-bit offset case first.
241 If a 16-bit offset is not suitable for the instruction we're
242 generating, load it into the temporary register using
243 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
244 M_L_DAB code once the address has been constructed. For double load
245 and store macros, again handle the 16-bit offset case first.
246 If the second register cannot be accessed from the same high
247 part as the first, load it into AT using ADDRESS_ADDI_INSN.
248 Fix the handling of LD in cases where the first register is the
249 same as the base. Also handle the case where the offset is
250 not 16 bits and the second register cannot be accessed from the
251 same high part as the first. For unaligned loads and stores,
252 fuse the offbits == 12 and old "ab" handling. Apply this handling
253 whenever the second offset needs a different high part from the first.
254 Construct the offset using ADDRESS_ADDI_INSN where possible,
255 for offbits == 16 as well as offbits == 12. Use offset_reloc
256 when constructing the individual loads and stores.
257 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
258 and offset_reloc before matching against a particular opcode.
259 Handle elided 'A' constants. Allow 'A' constants to use
260 relocation operators.
261
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2622013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
263
264 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
265 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
266 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
267
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2682013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
271 Require the msb to be <= 31 for "+s". Check that the size is <= 31
272 for both "+s" and "+S".
273
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2742013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
275
276 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
277 (mips_ip, mips16_ip): Handle "+i".
278
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2792013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
280
281 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
282 (micromips_to_32_reg_h_map): Rename to...
283 (micromips_to_32_reg_h_map1): ...this.
284 (micromips_to_32_reg_i_map): Rename to...
285 (micromips_to_32_reg_h_map2): ...this.
286 (mips_lookup_reg_pair): New function.
287 (gpr_write_mask, macro): Adjust after above renaming.
288 (validate_micromips_insn): Remove "mi" handling.
289 (mips_ip): Likewise. Parse both registers in a pair for "mh".
290
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2912013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
292
293 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
294 (mips_ip): Remove "+D" and "+T" handling.
295
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2962013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
297
298 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
299 relocs.
300
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3012013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
302
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303 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
304
3052013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
306
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307 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
308 (aarch64_force_relocation): Likewise.
309
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3102013-07-02 Alan Modra <amodra@gmail.com>
311
312 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
313
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3142013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
315
316 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
317 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
318 Replace @sc{mips16} with literal `MIPS16'.
319 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
320
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3212013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
322
323 * config/tc-aarch64.c (reloc_table): Replace
324 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
325 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
326 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
327 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
328 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
329 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
330 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
331 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
332 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
333 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
334 (aarch64_force_relocation): Likewise.
335
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3362013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
337
338 * config/tc-aarch64.c (ilp32_p): New static variable.
339 (elf64_aarch64_target_format): Return the target according to the
340 value of 'ilp32_p'.
341 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
342 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
343 (aarch64_dwarf2_addr_size): New function.
344 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
345 (DWARF2_ADDR_SIZE): New define.
346
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3472013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
348
349 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
350
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3512013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
352
353 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
354
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3552013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
356
357 * config/tc-mips.c (mips_set_options): Add insn32 member.
358 (mips_opts): Initialize it.
359 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
360 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
361 (md_longopts): Add "minsn32" and "mno-insn32" options.
362 (is_size_valid): Handle insn32 mode.
363 (md_assemble): Pass instruction string down to macro.
364 (brk_fmt): Add second dimension and insn32 mode initializers.
365 (mfhl_fmt): Likewise.
366 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
367 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
368 (macro_build_jalr, move_register): Handle insn32 mode.
369 (macro_build_branch_rs): Likewise.
370 (macro): Handle insn32 mode.
371 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
372 (mips_ip): Handle insn32 mode.
373 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
374 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
375 (mips_handle_align): Handle insn32 mode.
376 (md_show_usage): Add -minsn32 and -mno-insn32.
377
378 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
379 -mno-insn32 options.
380 (-minsn32, -mno-insn32): New options.
381 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
382 options.
383 (MIPS assembly options): New node. Document .set insn32 and
384 .set noinsn32.
385 (MIPS-Dependent): List the new node.
386
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3872013-06-25 Nick Clifton <nickc@redhat.com>
388
389 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
390 the PC in indirect addressing on 430xv2 parts.
391 (msp430_operands): Add version test to hardware bug encoding
392 restrictions.
393
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3942013-06-24 Roland McGrath <mcgrathr@google.com>
395
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396 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
397 so it skips whitespace before it.
398 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
399
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400 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
401 (arm_reg_parse_multi): Skip whitespace first.
402 (parse_reg_list): Likewise.
403 (parse_vfp_reg_list): Likewise.
404 (s_arm_unwind_save_mmxwcg): Likewise.
405
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4062013-06-24 Nick Clifton <nickc@redhat.com>
407
408 PR gas/15623
409 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
410
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4112013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
412
413 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
414
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4152013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
416
417 * config/tc-mips.c: Assert that offsetT and valueT are at least
418 8 bytes in size.
419 (GPR_SMIN, GPR_SMAX): New macros.
420 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
421
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4222013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
423
424 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
425 conditions. Remove any code deselected by them.
426 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
427
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4282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
429
430 * NEWS: Note removal of ECOFF support.
431 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
432 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
433 (MULTI_CFILES): Remove config/e-mipsecoff.c.
434 * Makefile.in: Regenerate.
435 * configure.in: Remove MIPS ECOFF references.
436 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
437 Delete cases.
438 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
439 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
440 (mips-*-*): ...this single case.
441 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
442 MIPS emulations to be e-mipself*.
443 * configure: Regenerate.
444 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
445 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
446 (mips-*-sysv*): Remove coff and ecoff cases.
447 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
448 * ecoff.c: Remove reference to MIPS ECOFF.
449 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
450 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
451 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
452 (mips_hi_fixup): Tweak comment.
453 (append_insn): Require a howto.
454 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
455
98508b2a
RS
4562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
457
458 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
459 Use "CPU" instead of "cpu".
460 * doc/c-mips.texi: Likewise.
461 (MIPS Opts): Rename to MIPS Options.
462 (MIPS option stack): Rename to MIPS Option Stack.
463 (MIPS ASE instruction generation overrides): Rename to
464 MIPS ASE Instruction Generation Overrides (for now).
465 (MIPS floating-point): Rename to MIPS Floating-Point.
466
fc16f8cc
RS
4672013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
468
469 * doc/c-mips.texi (MIPS Macros): New section.
470 (MIPS Object): Replace with...
471 (MIPS Small Data): ...this new section.
472
5a7560b5
RS
4732013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
474
475 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
476 Capitalize name. Use @kindex instead of @cindex for .set entries.
477
a1b86ab7
RS
4782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * doc/c-mips.texi (MIPS Stabs): Remove section.
481
c6278170
RS
4822013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
483
484 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
485 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
486 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
487 (ISA_SUPPORTS_VIRT64_ASE): Delete.
488 (mips_ase): New structure.
489 (mips_ases): New table.
490 (FP64_ASES): New macro.
491 (mips_ase_groups): New array.
492 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
493 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
494 functions.
495 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
496 (md_parse_option): Use mips_ases and mips_set_ase instead of
497 separate case statements for each ASE option.
498 (mips_after_parse_args): Use FP64_ASES. Use
499 mips_check_isa_supports_ases to check the ASEs against
500 other options.
501 (s_mipsset): Use mips_ases and mips_set_ase instead of
502 separate if statements for each ASE option. Use
503 mips_check_isa_supports_ases, even when a non-ASE option
504 is specified.
505
63a4bc21
KT
5062013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
507
508 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
509
c31f3936
RS
5102013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
511
512 * config/tc-mips.c (md_shortopts, options, md_longopts)
513 (md_longopts_size): Move earlier in file.
514
846ef2d0
RS
5152013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
516
517 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
518 with a single "ase" bitmask.
519 (mips_opts): Update accordingly.
520 (file_ase, file_ase_explicit): New variables.
521 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
522 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
523 (ISA_HAS_ROR): Adjust for mips_set_options change.
524 (is_opcode_valid): Take the base ase mask directly from mips_opts.
525 (mips_ip): Adjust for mips_set_options change.
526 (md_parse_option): Likewise. Update file_ase_explicit.
527 (mips_after_parse_args): Adjust for mips_set_options change.
528 Use bitmask operations to select the default ASEs. Set file_ase
529 rather than individual per-ASE variables.
530 (s_mipsset): Adjust for mips_set_options change.
531 (mips_elf_final_processing): Test file_ase rather than
532 file_ase_mdmx. Remove commented-out code.
533
d16afab6
RS
5342013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
535
536 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
537 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
538 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
539 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
540 (mips_after_parse_args): Use the new "ase" field to choose
541 the default ASEs.
542 (mips_cpu_info_table): Move ASEs from the "flags" field to the
543 "ase" field.
544
e83a675f
RE
5452013-06-18 Richard Earnshaw <rearnsha@arm.com>
546
547 * config/tc-arm.c (symbol_preemptible): New function.
548 (relax_branch): Use it.
549
7f3c4072
CM
5502013-06-17 Catherine Moore <clm@codesourcery.com>
551 Maciej W. Rozycki <macro@codesourcery.com>
552 Chao-Ying Fu <fu@mips.com>
553
554 * config/tc-mips.c (mips_set_options): Add ase_eva.
555 (mips_set_options mips_opts): Add ase_eva.
556 (file_ase_eva): Declare.
557 (ISA_SUPPORTS_EVA_ASE): Define.
558 (IS_SEXT_9BIT_NUM): Define.
559 (MIPS_CPU_ASE_EVA): Define.
560 (is_opcode_valid): Add support for ase_eva.
561 (macro_build): Likewise.
562 (macro): Likewise.
563 (validate_mips_insn): Likewise.
564 (validate_micromips_insn): Likewise.
565 (mips_ip): Likewise.
566 (options): Add OPTION_EVA and OPTION_NO_EVA.
567 (md_longopts): Add -meva and -mno-eva.
568 (md_parse_option): Process new options.
569 (mips_after_parse_args): Check for valid EVA combinations.
570 (s_mipsset): Likewise.
571
e410add4
RS
5722013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
573
574 * dwarf2dbg.h (dwarf2_move_insn): Declare.
575 * dwarf2dbg.c (line_subseg): Add pmove_tail.
576 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
577 (dwarf2_gen_line_info_1): Update call accordingly.
578 (dwarf2_move_insn): New function.
579 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
580
6a50d470
RS
5812013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
582
583 Revert:
584
585 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
586
587 PR gas/13024
588 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
589 (dwarf2_gen_line_info_1): Delete.
590 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
591 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
592 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
593 (dwarf2_directive_loc): Push previous .locs instead of generating
594 them immediately.
595
f122319e
CF
5962013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
597
598 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
599 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
600
909c7f9c
NC
6012013-06-13 Nick Clifton <nickc@redhat.com>
602
603 PR gas/15602
604 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
605 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
606 function. Generates an error if the adjusted offset is out of a
607 16-bit range.
608
5d5755a7
SL
6092013-06-12 Sandra Loosemore <sandra@codesourcery.com>
610
611 * config/tc-nios2.c (md_apply_fix): Mask constant
612 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
613
3bf0dbfb
MR
6142013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
615
616 * config/tc-mips.c (append_insn): Don't do branch relaxation for
617 MIPS-3D instructions either.
618 (md_convert_frag): Update the COPx branch mask accordingly.
619
620 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
621 option.
622 * doc/as.texinfo (Overview): Add --relax-branch and
623 --no-relax-branch.
624 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
625 --no-relax-branch.
626
9daf7bab
SL
6272013-06-09 Sandra Loosemore <sandra@codesourcery.com>
628
629 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
630 omitted.
631
d301a56b
RS
6322013-06-08 Catherine Moore <clm@codesourcery.com>
633
634 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
635 (is_opcode_valid_16): Pass ase value to opcode_is_member.
636 (append_insn): Change INSN_xxxx to ASE_xxxx.
637
7bab7634
DC
6382013-06-01 George Thomas <george.thomas@atmel.com>
639
640 * gas/config/tc-avr.c: Change ISA for devices with USB support to
641 AVR_ISA_XMEGAU
642
f60cf82f
L
6432013-05-31 H.J. Lu <hongjiu.lu@intel.com>
644
645 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
646 for ELF.
647
a3f278e2
CM
6482013-05-31 Paul Brook <paul@codesourcery.com>
649
650 gas/
651 * config/tc-mips.c (s_ehword): New.
652
067ec077
CM
6532013-05-30 Paul Brook <paul@codesourcery.com>
654
655 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
656
d6101ac2
MR
6572013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
658
659 * write.c (resolve_reloc_expr_symbols): On REL targets don't
660 convert relocs who have no relocatable field either. Rephrase
661 the conditional so that the PC-relative check is only applied
662 for REL targets.
663
f19ccbda
MR
6642013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
665
666 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
667 calculation.
668
418009c2
YZ
6692013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
670
671 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 672 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
673 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
674 (md_apply_fix): Likewise.
675 (aarch64_force_relocation): Likewise.
676
0a8897c7
KT
6772013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
678
679 * config/tc-arm.c (it_fsm_post_encode): Improve
680 warning messages about deprecated IT block formats.
681
89d2a2a3
MS
6822013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
683
684 * config/tc-aarch64.c (md_apply_fix): Move value range checking
685 inside fx_done condition.
686
c77c0862
RS
6872013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
688
689 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
690
c0637f3a
PB
6912013-05-20 Peter Bergner <bergner@vnet.ibm.com>
692
693 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
694 and clean up warning when using PRINT_OPCODE_TABLE.
695
5656a981
AM
6962013-05-20 Alan Modra <amodra@gmail.com>
697
698 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
699 and data fixups performing shift/high adjust/sign extension on
700 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
701 when writing data fixups rather than recalculating size.
702
997b26e8
JBG
7032013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
704
705 * doc/c-msp430.texi: Fix typo.
706
9f6e76f4
TG
7072013-05-16 Tristan Gingold <gingold@adacore.com>
708
709 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
710 are also TOC symbols.
711
638d3803
NC
7122013-05-16 Nick Clifton <nickc@redhat.com>
713
714 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
715 Add -mcpu command to specify core type.
997b26e8 716 * doc/c-msp430.texi: Update documentation.
638d3803 717
b015e599
AP
7182013-05-09 Andrew Pinski <apinski@cavium.com>
719
720 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
721 (mips_opts): Update for the new field.
722 (file_ase_virt): New variable.
723 (ISA_SUPPORTS_VIRT_ASE): New macro.
724 (ISA_SUPPORTS_VIRT64_ASE): New macro.
725 (MIPS_CPU_ASE_VIRT): New define.
726 (is_opcode_valid): Handle ase_virt.
727 (macro_build): Handle "+J".
728 (validate_mips_insn): Likewise.
729 (mips_ip): Likewise.
730 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
731 (md_longopts): Add mvirt and mnovirt
732 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
733 (mips_after_parse_args): Handle ase_virt field.
734 (s_mipsset): Handle "virt" and "novirt".
735 (mips_elf_final_processing): Add a comment about virt ASE might need
736 a new flag.
737 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
738 * doc/c-mips.texi: Document -mvirt and -mno-virt.
739 Document ".set virt" and ".set novirt".
740
da8094d7
AM
7412013-05-09 Alan Modra <amodra@gmail.com>
742
743 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
744 control of operand flag bits.
745
c5f8c205
AM
7462013-05-07 Alan Modra <amodra@gmail.com>
747
748 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
749 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
750 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
751 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
752 (md_apply_fix): Set fx_no_overflow for assorted relocations.
753 Shift and sign-extend fieldval for use by some VLE reloc
754 operand->insert functions.
755
b47468a6
CM
7562013-05-06 Paul Brook <paul@codesourcery.com>
757 Catherine Moore <clm@codesourcery.com>
758
c5f8c205
AM
759 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
760 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
761 (md_apply_fix): Likewise.
762 (tc_gen_reloc): Likewise.
763
2de39019
CM
7642013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
765
766 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
767 (mips_fix_adjustable): Adjust pc-relative check to use
768 limited_pc_reloc_p.
769
754e2bb9
RS
7702013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
771
772 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
773 (s_mips_stab): Do not restrict to stabn only.
774
13761a11
NC
7752013-05-02 Nick Clifton <nickc@redhat.com>
776
777 * config/tc-msp430.c: Add support for the MSP430X architecture.
778 Add code to insert a NOP instruction after any instruction that
779 might change the interrupt state.
780 Add support for the LARGE memory model.
781 Add code to initialise the .MSP430.attributes section.
782 * config/tc-msp430.h: Add support for the MSP430X architecture.
783 * doc/c-msp430.texi: Document the new -mL and -mN command line
784 options.
785 * NEWS: Mention support for the MSP430X architecture.
786
df26367c
MR
7872013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
788
789 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
790 alpha*-*-linux*ecoff*.
791
f02d8318
CF
7922013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
793
794 * config/tc-mips.c (mips_ip): Add sizelo.
795 For "+C", "+G", and "+H", set sizelo and compare against it.
796
b40bf0a2
NC
7972013-04-29 Nick Clifton <nickc@redhat.com>
798
799 * as.c (Options): Add -gdwarf-sections.
800 (parse_args): Likewise.
801 * as.h (flag_dwarf_sections): Declare.
802 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
803 (process_entries): When -gdwarf-sections is enabled generate
804 fragmentary .debug_line sections.
805 (out_debug_line): Set the section for the .debug_line section end
806 symbol.
807 * doc/as.texinfo: Document -gdwarf-sections.
808 * NEWS: Mention -gdwarf-sections.
809
8eeccb77 8102013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
811
812 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
813 according to the target parameter. Don't call s_segm since s_segm
814 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
815 initialized yet.
816 (md_begin): Call s_segm according to target parameter from command
817 line.
818
49926cd0
AM
8192013-04-25 Alan Modra <amodra@gmail.com>
820
821 * configure.in: Allow little-endian linux.
822 * configure: Regenerate.
823
e3031850
SL
8242013-04-24 Sandra Loosemore <sandra@codesourcery.com>
825
826 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
827 "fstatus" control register to "eccinj".
828
cb948fc0
KT
8292013-04-19 Kai Tietz <ktietz@redhat.com>
830
831 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
832
4455e9ad
JB
8332013-04-15 Julian Brown <julian@codesourcery.com>
834
835 * expr.c (add_to_result, subtract_from_result): Make global.
836 * expr.h (add_to_result, subtract_from_result): Add prototypes.
837 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
838 subtract_from_result to handle extra bit of precision for .sleb128
839 directive operands.
840
956a6ba3
JB
8412013-04-10 Julian Brown <julian@codesourcery.com>
842
843 * read.c (convert_to_bignum): Add sign parameter. Use it
844 instead of X_unsigned to determine sign of resulting bignum.
845 (emit_expr): Pass extra argument to convert_to_bignum.
846 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
847 X_extrabit to convert_to_bignum.
848 (parse_bitfield_cons): Set X_extrabit.
849 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
850 Initialise X_extrabit field as appropriate.
851 (add_to_result): New.
852 (subtract_from_result): New.
853 (expr): Use above.
854 * expr.h (expressionS): Add X_extrabit field.
855
eb9f3f00
JB
8562013-04-10 Jan Beulich <jbeulich@suse.com>
857
858 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
859 register being PC when is_t or writeback, and use distinct
860 diagnostic for the latter case.
861
ccb84d65
JB
8622013-04-10 Jan Beulich <jbeulich@suse.com>
863
864 * gas/config/tc-arm.c (parse_operands): Re-write
865 po_barrier_or_imm().
866 (do_barrier): Remove bogus constraint().
867 (do_t_barrier): Remove.
868
4d13caa0
NC
8692013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
870
871 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
872 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
873 ATmega2564RFR2
874 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
875
16d02dc9
JB
8762013-04-09 Jan Beulich <jbeulich@suse.com>
877
878 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
879 Use local variable Rt in more places.
880 (do_vmsr): Accept all control registers.
881
05ac0ffb
JB
8822013-04-09 Jan Beulich <jbeulich@suse.com>
883
884 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
885 if there was none specified for moves between scalar and core
886 register.
887
2d51fb74
JB
8882013-04-09 Jan Beulich <jbeulich@suse.com>
889
890 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
891 NEON_ALL_LANES case.
892
94dcf8bf
JB
8932013-04-08 Jan Beulich <jbeulich@suse.com>
894
895 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
896 PC-relative VSTR.
897
1472d06f
JB
8982013-04-08 Jan Beulich <jbeulich@suse.com>
899
900 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
901 entry to sp_fiq.
902
0c76cae8
AM
9032013-04-03 Alan Modra <amodra@gmail.com>
904
905 * doc/as.texinfo: Add support to generate man options for h8300.
906 * doc/c-h8300.texi: Likewise.
907
92eb40d9
RR
9082013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
909
910 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
911 Cortex-A57.
912
51dcdd4d
NC
9132013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
914
915 PR binutils/15068
916 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
917
c5d685bf
NC
9182013-03-26 Nick Clifton <nickc@redhat.com>
919
9b978282
NC
920 PR gas/15295
921 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
922 start of the file each time.
923
c5d685bf
NC
924 PR gas/15178
925 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
926 FreeBSD targets.
927
9699c833
TG
9282013-03-26 Douglas B Rupp <rupp@gnat.com>
929
930 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
931 after fixup.
932
4755303e
WN
9332013-03-21 Will Newton <will.newton@linaro.org>
934
935 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
936 pc-relative str instructions in Thumb mode.
937
81f5558e
NC
9382013-03-21 Michael Schewe <michael.schewe@gmx.net>
939
940 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
941 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
942 R_H8_DISP32A16.
943 * config/tc-h8300.h: Remove duplicated defines.
944
71863e73
NC
9452013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
946
947 PR gas/15282
948 * tc-avr.c (mcu_has_3_byte_pc): New function.
949 (tc_cfi_frame_initial_instructions): Call it to find return
950 address size.
951
795b8e6b
NC
9522013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
953
954 PR gas/15095
955 * config/tc-tic6x.c (tic6x_try_encode): Handle
956 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
957 encode register pair numbers when required.
958
ba86b375
WN
9592013-03-15 Will Newton <will.newton@linaro.org>
960
961 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
962 in vstr in Thumb mode for pre-ARMv7 cores.
963
9e6f3811
AS
9642013-03-14 Andreas Schwab <schwab@suse.de>
965
966 * doc/c-arc.texi (ARC Directives): Revert last change and use
967 @itemize instead of @table.
968 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
969
b10bf8c5
NC
9702013-03-14 Nick Clifton <nickc@redhat.com>
971
972 PR gas/15273
973 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
974 NULL message, instead just check ARM_CPU_IS_ANY directly.
975
ba724cfc
NC
9762013-03-14 Nick Clifton <nickc@redhat.com>
977
978 PR gas/15212
9e6f3811 979 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
980 for table format.
981 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
982 to the @item directives.
983 (ARM-Neon-Alignment): Move to correct place in the document.
984 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
985 formatting.
986 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
987 @smallexample.
988
531a94fd
SL
9892013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
990
991 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
992 case. Add default BAD_CASE to switch.
993
dad60f8e
SL
9942013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
995
996 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
997 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
998
dd5181d5
KT
9992013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1000
1001 * config/tc-arm.c (crc_ext_armv8): New feature set.
1002 (UNPRED_REG): New macro.
1003 (do_crc32_1): New function.
1004 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1005 do_crc32ch, do_crc32cw): Likewise.
1006 (TUEc): New macro.
1007 (insns): Add entries for crc32 mnemonics.
1008 (arm_extensions): Add entry for crc.
1009
8e723a10
CLT
10102013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1011
1012 * write.h (struct fix): Add fx_dot_frag field.
1013 (dot_frag): Declare.
1014 * write.c (dot_frag): New variable.
1015 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1016 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1017 * expr.c (expr): Save value of frag_now in dot_frag when setting
1018 dot_value.
1019 * read.c (emit_expr): Likewise. Delete comments.
1020
be05d201
L
10212013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1022
1023 * config/tc-i386.c (flag_code_names): Removed.
1024 (i386_index_check): Rewrote.
1025
62b0d0d5
YZ
10262013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1027
1028 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1029 add comment.
1030 (aarch64_double_precision_fmovable): New function.
1031 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1032 function; handle hexadecimal representation of IEEE754 encoding.
1033 (parse_operands): Update the call to parse_aarch64_imm_float.
1034
165de32a
L
10352013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1036
1037 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1038 (check_hle): Updated.
1039 (md_assemble): Likewise.
1040 (parse_insn): Likewise.
1041
d5de92cf
L
10422013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1043
1044 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1045 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1046 (parse_insn): Remove expecting_string_instruction. Set
1047 i.rep_prefix.
1048
e60bb1dd
YZ
10492013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1050
1051 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1052
aeebdd9b
YZ
10532013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1054
1055 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1056 for system registers.
1057
4107ae22
DD
10582013-02-27 DJ Delorie <dj@redhat.com>
1059
1060 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1061 (rl78_op): Handle %code().
1062 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1063 (tc_gen_reloc): Likwise; convert to a computed reloc.
1064 (md_apply_fix): Likewise.
1065
151fa98f
NC
10662013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1067
1068 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1069
70a8bc5b 10702013-02-25 Terry Guo <terry.guo@arm.com>
1071
1072 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1073 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1074 list of accepted CPUs.
1075
5c111e37
L
10762013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1077
1078 PR gas/15159
1079 * config/tc-i386.c (cpu_arch): Add ".smap".
1080
1081 * doc/c-i386.texi: Document smap.
1082
8a75745d
MR
10832013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1084
1085 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1086 mips_assembling_insn appropriately.
1087 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1088
79850f26
MR
10892013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1090
cf29fc61 1091 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1092 extraneous braces.
1093
4c261dff
NC
10942013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1095
5c111e37 1096 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1097
ea33f281
NC
10982013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1099
1100 * configure.tgt: Add nios2-*-rtems*.
1101
a1ccaec9
YZ
11022013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1103
1104 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1105 NULL.
1106
0aa27725
RS
11072013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1108
1109 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1110 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1111
da4339ed
NC
11122013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1113
1114 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1115 core.
1116
36591ba1 11172013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1118 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1119
1120 Based on patches from Altera Corporation.
1121
1122 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1123 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1124 * Makefile.in: Regenerated.
1125 * configure.tgt: Add case for nios2*-linux*.
1126 * config/obj-elf.c: Conditionally include elf/nios2.h.
1127 * config/tc-nios2.c: New file.
1128 * config/tc-nios2.h: New file.
1129 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1130 * doc/Makefile.in: Regenerated.
1131 * doc/all.texi: Set NIOSII.
1132 * doc/as.texinfo (Overview): Add Nios II options.
1133 (Machine Dependencies): Include c-nios2.texi.
1134 * doc/c-nios2.texi: New file.
1135 * NEWS: Note Altera Nios II support.
1136
94d4433a
AM
11372013-02-06 Alan Modra <amodra@gmail.com>
1138
1139 PR gas/14255
1140 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1141 Don't skip fixups with fx_subsy non-NULL.
1142 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1143 with fx_subsy non-NULL.
1144
ace9af6f
L
11452013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1146
1147 * doc/c-metag.texi: Add "@c man" markers.
1148
89d67ed9
AM
11492013-02-04 Alan Modra <amodra@gmail.com>
1150
1151 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1152 related code.
1153 (TC_ADJUST_RELOC_COUNT): Delete.
1154 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1155
89072bd6
AM
11562013-02-04 Alan Modra <amodra@gmail.com>
1157
1158 * po/POTFILES.in: Regenerate.
1159
f9b2d544
NC
11602013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1161
1162 * config/tc-metag.c: Make SWAP instruction less permissive with
1163 its operands.
1164
392ca752
DD
11652013-01-29 DJ Delorie <dj@redhat.com>
1166
1167 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1168 relocs in .word/.etc statements.
1169
427d0db6
RM
11702013-01-29 Roland McGrath <mcgrathr@google.com>
1171
1172 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1173 immediate value for 8-bit offset" error so it shows line info.
1174
4faf939a
JM
11752013-01-24 Joseph Myers <joseph@codesourcery.com>
1176
1177 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1178 for 64-bit output.
1179
78c8d46c
NC
11802013-01-24 Nick Clifton <nickc@redhat.com>
1181
1182 * config/tc-v850.c: Add support for e3v5 architecture.
1183 * doc/c-v850.texi: Mention new support.
1184
fb5b7503
NC
11852013-01-23 Nick Clifton <nickc@redhat.com>
1186
1187 PR gas/15039
1188 * config/tc-avr.c: Include dwarf2dbg.h.
1189
8ce3d284
L
11902013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1191
1192 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1193 (tc_i386_fix_adjustable): Likewise.
1194 (lex_got): Likewise.
1195 (tc_gen_reloc): Likewise.
1196
f5555712
YZ
11972013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1198
1199 * config/tc-aarch64.c (output_operand_error_record): Change to output
1200 the out-of-range error message as value-expected message if there is
1201 only one single value in the expected range.
1202 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1203 LSL #0 as a programmer-friendly feature.
1204
8fd4256d
L
12052013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1206
1207 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1208 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1209 BFD_RELOC_64_SIZE relocations.
1210 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1211 for it.
1212 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1213 relocations against local symbols.
1214
a5840dce
AM
12152013-01-16 Alan Modra <amodra@gmail.com>
1216
1217 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1218 finding some sort of toc syntax error, and break to avoid
1219 compiler uninit warning.
1220
af89796a
L
12212013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1222
1223 PR gas/15019
1224 * config/tc-i386.c (lex_got): Increment length by 1 if the
1225 relocation token is removed.
1226
dd42f060
NC
12272013-01-15 Nick Clifton <nickc@redhat.com>
1228
1229 * config/tc-v850.c (md_assemble): Allow signed values for
1230 V850E_IMMEDIATE.
1231
464e3686
SK
12322013-01-11 Sean Keys <skeys@ipdatasys.com>
1233
1234 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1235 git to cvs.
464e3686 1236
5817ffd1
PB
12372013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1238
1239 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1240 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1241 * config/tc-ppc.c (md_show_usage): Likewise.
1242 (ppc_handle_align): Handle power8's group ending nop.
1243
f4b1f6a9
SK
12442013-01-10 Sean Keys <skeys@ipdatasys.com>
1245
1246 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1247 that the assember exits after the opcodes have been printed.
f4b1f6a9 1248
34bca508
L
12492013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1250
1251 * app.c: Remove trailing white spaces.
1252 * as.c: Likewise.
1253 * as.h: Likewise.
1254 * cond.c: Likewise.
1255 * dw2gencfi.c: Likewise.
1256 * dwarf2dbg.h: Likewise.
1257 * ecoff.c: Likewise.
1258 * input-file.c: Likewise.
1259 * itbl-lex.h: Likewise.
1260 * output-file.c: Likewise.
1261 * read.c: Likewise.
1262 * sb.c: Likewise.
1263 * subsegs.c: Likewise.
1264 * symbols.c: Likewise.
1265 * write.c: Likewise.
1266 * config/tc-i386.c: Likewise.
1267 * doc/Makefile.am: Likewise.
1268 * doc/Makefile.in: Likewise.
1269 * doc/c-aarch64.texi: Likewise.
1270 * doc/c-alpha.texi: Likewise.
1271 * doc/c-arc.texi: Likewise.
1272 * doc/c-arm.texi: Likewise.
1273 * doc/c-avr.texi: Likewise.
1274 * doc/c-bfin.texi: Likewise.
1275 * doc/c-cr16.texi: Likewise.
1276 * doc/c-d10v.texi: Likewise.
1277 * doc/c-d30v.texi: Likewise.
1278 * doc/c-h8300.texi: Likewise.
1279 * doc/c-hppa.texi: Likewise.
1280 * doc/c-i370.texi: Likewise.
1281 * doc/c-i386.texi: Likewise.
1282 * doc/c-i860.texi: Likewise.
1283 * doc/c-m32c.texi: Likewise.
1284 * doc/c-m32r.texi: Likewise.
1285 * doc/c-m68hc11.texi: Likewise.
1286 * doc/c-m68k.texi: Likewise.
1287 * doc/c-microblaze.texi: Likewise.
1288 * doc/c-mips.texi: Likewise.
1289 * doc/c-msp430.texi: Likewise.
1290 * doc/c-mt.texi: Likewise.
1291 * doc/c-s390.texi: Likewise.
1292 * doc/c-score.texi: Likewise.
1293 * doc/c-sh.texi: Likewise.
1294 * doc/c-sh64.texi: Likewise.
1295 * doc/c-tic54x.texi: Likewise.
1296 * doc/c-tic6x.texi: Likewise.
1297 * doc/c-v850.texi: Likewise.
1298 * doc/c-xc16x.texi: Likewise.
1299 * doc/c-xgate.texi: Likewise.
1300 * doc/c-xtensa.texi: Likewise.
1301 * doc/c-z80.texi: Likewise.
1302 * doc/internals.texi: Likewise.
1303
4c665b71
RM
13042013-01-10 Roland McGrath <mcgrathr@google.com>
1305
1306 * hash.c (hash_new_sized): Make it global.
1307 * hash.h: Declare it.
1308 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1309 pass a small size.
1310
a3c62988
NC
13112013-01-10 Will Newton <will.newton@imgtec.com>
1312
1313 * Makefile.am: Add Meta.
1314 * Makefile.in: Regenerate.
1315 * config/tc-metag.c: New file.
1316 * config/tc-metag.h: New file.
1317 * configure.tgt: Add Meta.
1318 * doc/Makefile.am: Add Meta.
1319 * doc/Makefile.in: Regenerate.
1320 * doc/all.texi: Add Meta.
1321 * doc/as.texiinfo: Document Meta options.
1322 * doc/c-metag.texi: New file.
1323
b37df7c4
SE
13242013-01-09 Steve Ellcey <sellcey@mips.com>
1325
1326 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1327 calls.
1328 * config/tc-mips.c (internalError): Remove, replace with abort.
1329
a3251895
YZ
13302013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1331
1332 * config/tc-aarch64.c (parse_operands): Change to compare the result
1333 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1334
8ab8155f
NC
13352013-01-07 Nick Clifton <nickc@redhat.com>
1336
1337 PR gas/14887
1338 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1339 anticipated character.
1340 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1341 here as it is no longer needed.
1342
a4ac1c42
AS
13432013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1344
1345 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1346 * doc/c-score.texi (SCORE-Opts): Likewise.
1347 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1348
e407c74b
NC
13492013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1350
1351 * config/tc-mips.c: Add support for MIPS r5900.
1352 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1353 lq and sq.
1354 (can_swap_branch_p, get_append_method): Detect some conditional
1355 short loops to fix a bug on the r5900 by NOP in the branch delay
1356 slot.
1357 (M_MUL): Support 3 operands in multu on r5900.
1358 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1359 (s_mipsset): Force 32 bit floating point on r5900.
1360 (mips_ip): Check parameter range of instructions mfps and mtps on
1361 r5900.
1362 * configure.in: Detect CPU type when target string contains r5900
1363 (e.g. mips64r5900el-linux-gnu).
1364
62658407
L
13652013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1366
1367 * as.c (parse_args): Update copyright year to 2013.
1368
95830fd1
YZ
13692013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1370
1371 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1372 and "cortex57".
1373
517bb291 13742013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1375
517bb291
NC
1376 PR gas/14987
1377 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1378 closing bracket.
d709e4e6 1379
517bb291 1380For older changes see ChangeLog-2012
08d56133 1381\f
517bb291 1382Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1383
1384Copying and distribution of this file, with or without modification,
1385are permitted in any medium without royalty provided the copyright
1386notice and this notice are preserved.
1387
08d56133
NC
1388Local Variables:
1389mode: change-log
1390left-margin: 8
1391fill-column: 74
1392version-control: never
1393End: