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Minor O_CLOEXEC optimization, "regression" fix
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
6085f853
NC
12013-10-09 Nick Clifton <nickc@redhat.com>
2
3 PR gas/16026
4 * config/tc-mn10200.c (md_convert_frag): Add missing break
5 statement.
6
cecf1424
JB
72013-10-08 Jan Beulich <jbeulich@suse.com>
8
9 * tc-i386.c (check_word_reg): Remove misplaced "else".
10 (check_long_reg): Restore symmetry with check_word_reg.
11
d3bfe16e
JB
122013-10-08 Jan Beulich <jbeulich@suse.com>
13
14 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
15 LR/PC check.
16
38d77545
NC
172013-10-08 Nick Clifton <nickc@redhat.com>
18
19 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
20 for "<foo>a". Issue error messages for unrecognised or corrrupt
21 size extensions.
22
fe8b4cc3
KT
232013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24
25 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
26 possible.
27
c7b0bd56
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282013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
29
30 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
31 * doc/c-i386.texi: Add -march=bdver4 option.
32
cc9afea3
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332013-09-20 Alan Modra <amodra@gmail.com>
34
35 * configure: Regenerate.
36
58ca03a2
TG
372013-09-18 Tristan Gingold <gingold@adacore.com>
38
39 * NEWS: Add marker for 2.24.
40
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412013-09-18 Nick Clifton <nickc@redhat.com>
42
43 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
44 (move_data): New variable.
45 (md_parse_option): Parse -md.
46 (msp430_section): New function. Catch references to the .bss or
47 .data sections and generate a special symbol for use by the libcrt
48 library.
49 (md_pseudo_table): Intercept .section directives.
50 (md_longopt): Add -md
51 (md_show_usage): Likewise.
52 (msp430_operands): Generate a warning message if a NOP is inserted
53 into the instruction stream.
54 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
55
f1c38003
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562013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
57
58 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 59 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 60
1d50d57c
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612013-09-16 Will Newton <will.newton@linaro.org>
62
63 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
64 disallowing element size 64 with interleave other than 1.
65
173d3447
CF
662013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
67
68 * config/tc-mips.c (match_insn): Set error when $31 is used for
69 bltzal* and bgezal*.
70
ac21e7da
TG
712013-09-04 Tristan Gingold <gingold@adacore.com>
72
73 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
74 symbols.
75
74db7efb
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762013-09-04 Roland McGrath <mcgrathr@google.com>
77
78 PR gas/15914
79 * config/tc-arm.c (T16_32_TAB): Add _udf.
80 (do_t_udf): New function.
81 (insns): Add "udf".
82
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832013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
84
85 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
86 assembler errors at correct position.
87
9aff4b7a
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882013-08-23 Yuri Chornoivan <yurchor@ukr.net>
89
90 PR binutils/15834
91 * config/tc-ia64.c: Fix typos.
92 * config/tc-sparc.c: Likewise.
93 * config/tc-z80.c: Likewise.
94 * doc/c-i386.texi: Likewise.
95 * doc/c-m32r.texi: Likewise.
96
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972013-08-23 Will Newton <will.newton@linaro.org>
98
9aff4b7a 99 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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WN
100 for pre-indexed addressing modes.
101
b4e6cb80
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1022013-08-21 Alan Modra <amodra@gmail.com>
103
104 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
105 range check label number for use with fb_low_counter array.
106
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1072013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
108
109 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
110 (mips_parse_argument_token, validate_micromips_insn, md_begin)
111 (check_regno, match_float_constant, check_completed_insn, append_insn)
112 (match_insn, match_mips16_insn, match_insns, macro_start)
113 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
114 (mips16_ip, mips_set_option_string, md_parse_option)
115 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
116 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
117 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
118 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
119 Start error messages with a lower-case letter. Do not end error
120 messages with a period. Wrap long messages to 80 character-lines.
121 Use "cannot" instead of "can't" and "can not".
122
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1232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * config/tc-mips.c (imm_expr): Expand comment.
126 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
127 when populated.
128
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1292013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
130
131 * config/tc-mips.c (imm2_expr): Delete.
132 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
133
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1342013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
135
136 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
137 (macro): Remove M_DEXT and M_DINS handling.
138
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1392013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
140
141 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
142 lax_max with lax_match.
143 (match_int_operand): Update accordingly. Don't report an error
144 for !lax_match-only cases.
145 (match_insn): Replace more_alts with lax_match and use it to
146 initialize the mips_arg_info field. Add a complete_p parameter.
147 Handle implicit VU0 suffixes here.
148 (match_invalid_for_isa, match_insns, match_mips16_insns): New
149 functions.
150 (mips_ip, mips16_ip): Use them.
151
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1522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (match_expression): Report uses of registers here.
155 Add a "must be an immediate expression" error. Handle elided offsets
156 here rather than...
157 (match_int_operand): ...here.
158
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1592013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
160
161 * config/tc-mips.c (mips_arg_info): Remove soft_match.
162 (match_out_of_range, match_not_constant): New functions.
163 (match_const_int): Remove fallback parameter and check for soft_match.
164 Use match_not_constant.
165 (match_mapped_int_operand, match_addiusp_operand)
166 (match_perf_reg_operand, match_save_restore_list_operand)
167 (match_mdmx_imm_reg_operand): Update accordingly. Use
168 match_out_of_range and set_insn_error* instead of as_bad.
169 (match_int_operand): Likewise. Use match_not_constant in the
170 !allows_nonconst case.
171 (match_float_constant): Report invalid float constants.
172 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
173 match_float_constant to check for invalid constants. Fail the
174 match if match_const_int or match_float_constant return false.
175 (mips_ip): Update accordingly.
176 (mips16_ip): Likewise. Undo null termination of instruction name
177 once lookup is complete.
178
e3de51ce
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1792013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
180
181 * config/tc-mips.c (mips_insn_error_format): New enum.
182 (mips_insn_error): New struct.
183 (insn_error): Change to a mips_insn_error.
184 (clear_insn_error, set_insn_error_format, set_insn_error)
185 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
186 functions.
187 (mips_parse_argument_token, md_assemble, match_insn)
188 (match_mips16_insn): Use them instead of manipulating insn_error
189 directly.
190 (mips_ip, mips16_ip): Likewise. Simplify control flow.
191
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1922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
193
194 * config/tc-mips.c (normalize_constant_expr): Move further up file.
195 (normalize_address_expr): Likewise.
196 (match_insn, match_mips16_insn): New functions, split out from...
197 (mips_ip, mips16_ip): ...here.
198
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1992013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
200
201 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
202 OP_OPTIONAL_REG.
203 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
204 for optional operands.
205
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2062013-08-16 Alan Modra <amodra@gmail.com>
207
208 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
209 modifiers generally.
210
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2112013-08-16 Alan Modra <amodra@gmail.com>
212
213 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
214
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2152013-08-14 David Edelsohn <dje.gcc@gmail.com>
216
217 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
218 argument as alignment.
219
4046d87a
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2202013-08-09 Nick Clifton <nickc@redhat.com>
221
222 * config/tc-rl78.c (elf_flags): New variable.
223 (enum options): Add OPTION_G10.
224 (md_longopts): Add mg10.
225 (md_parse_option): Parse -mg10.
226 (rl78_elf_final_processing): New function.
227 * config/tc-rl78.c (tc_final_processing): Define.
228 * doc/c-rl78.texi: Document -mg10 option.
229
ee5734f0
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2302013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
231
232 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
233 suffixes to be elided too.
234 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
235 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
236 to be omitted too.
237
13896403
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2382013-08-05 John Tytgat <john@bass-software.com>
239
240 * po/POTFILES.in: Regenerate.
241
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EB
2422013-08-05 Eric Botcazou <ebotcazou@adacore.com>
243 Konrad Eisele <konrad@gaisler.com>
244
245 * config/tc-sparc.c (sparc_arch_types): Add leon.
246 (sparc_arch): Move sparc4 around and add leon.
247 (sparc_target_format): Document -Aleon.
248 * doc/c-sparc.texi: Likewise.
249
da8bca91
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2502013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
251
252 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
253
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RS
2542013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
255 Richard Sandiford <rdsandiford@googlemail.com>
256
257 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
258 (RWARN): Bump to 0x8000000.
259 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
260 (RTYPE_R5900_ACC): New register types.
261 (RTYPE_MASK): Include them.
262 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
263 macros.
264 (reg_names): Include them.
265 (mips_parse_register_1): New function, split out from...
266 (mips_parse_register): ...here. Add a channels_ptr parameter.
267 Look for VU0 channel suffixes when nonnull.
268 (reg_lookup): Update the call to mips_parse_register.
269 (mips_parse_vu0_channels): New function.
270 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
271 (mips_operand_token): Add a "channels" field to the union.
272 Extend the comment above "ch" to OT_DOUBLE_CHAR.
273 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
274 (mips_parse_argument_token): Handle channel suffixes here too.
275 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
276 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
277 Handle '#' formats.
278 (md_begin): Register $vfN and $vfI registers.
279 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
280 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
281 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
282 (match_vu0_suffix_operand): New function.
283 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
284 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
285 (mips_lookup_insn): New function.
286 (mips_ip): Use it. Allow "+K" operands to be elided at the end
287 of an instruction. Handle '#' sequences.
288
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2892013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
290
291 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
292 values and use it instead of sreg, treg, xreg, etc.
293
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2942013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
295
296 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
297 and mips_int_operand_max.
298 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
299 Delete.
300 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
301 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
302 instead of mips16_immed_operand.
303
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3042013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
305
306 * config/tc-mips.c (mips16_macro): Don't use move_register.
307 (mips16_ip): Allow macros to use 'p'.
308
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3092013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
310
311 * config/tc-mips.c (MAX_OPERANDS): New macro.
312 (mips_operand_array): New structure.
313 (mips_operands, mips16_operands, micromips_operands): New arrays.
314 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
315 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
316 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
317 (micromips_to_32_reg_q_map): Delete.
318 (insn_operands, insn_opno, insn_extract_operand): New functions.
319 (validate_mips_insn): Take a mips_operand_array as argument and
320 use it to build up a list of operands. Extend to handle INSN_MACRO
321 and MIPS16.
322 (validate_mips16_insn): New function.
323 (validate_micromips_insn): Take a mips_operand_array as argument.
324 Handle INSN_MACRO.
325 (md_begin): Initialize mips_operands, mips16_operands and
326 micromips_operands. Call validate_mips_insn and
327 validate_micromips_insn for macro instructions too.
328 Call validate_mips16_insn for MIPS16 instructions.
329 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
330 New functions.
331 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
332 them. Handle INSN_UDI.
333 (get_append_method): Use gpr_read_mask.
334
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3352013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
336
337 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
338 flags for MIPS16 and non-MIPS16 instructions.
339 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
340 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
341 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
342 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
343 and non-MIPS16 instructions. Fix formatting.
344
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3452013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
346
347 * config/tc-mips.c (reg_needs_delay): Move later in file.
348 Use gpr_write_mask.
349 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
350
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3512013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
352 Alexander Ivchenko <alexander.ivchenko@intel.com>
353 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
354 Sergey Lega <sergey.s.lega@intel.com>
355 Anna Tikhonova <anna.tikhonova@intel.com>
356 Ilya Tocar <ilya.tocar@intel.com>
357 Andrey Turetskiy <andrey.turetskiy@intel.com>
358 Ilya Verbin <ilya.verbin@intel.com>
359 Kirill Yukhin <kirill.yukhin@intel.com>
360 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
361
362 * config/tc-i386-intel.c (O_zmmword_ptr): New.
363 (i386_types): Add zmmword.
364 (i386_intel_simplify_register): Allow regzmm.
365 (i386_intel_simplify): Handle zmmwords.
366 (i386_intel_operand): Handle RC/SAE, vector operations and
367 zmmwords.
368 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
369 (struct RC_Operation): New.
370 (struct Mask_Operation): New.
371 (struct Broadcast_Operation): New.
372 (vex_prefix): Size of bytes increased to 4 to support EVEX
373 encoding.
374 (enum i386_error): Add new error codes: unsupported_broadcast,
375 broadcast_not_on_src_operand, broadcast_needed,
376 unsupported_masking, mask_not_on_destination, no_default_mask,
377 unsupported_rc_sae, rc_sae_operand_not_last_imm,
378 invalid_register_operand, try_vector_disp8.
379 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
380 rounding, broadcast, memshift.
381 (struct RC_name): New.
382 (RC_NamesTable): New.
383 (evexlig): New.
384 (evexwig): New.
385 (extra_symbol_chars): Add '{'.
386 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
387 (i386_operand_type): Add regzmm, regmask and vec_disp8.
388 (match_mem_size): Handle zmmwords.
389 (operand_type_match): Handle zmm-registers.
390 (mode_from_disp_size): Handle vec_disp8.
391 (fits_in_vec_disp8): New.
392 (md_begin): Handle {} properly.
393 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
394 (build_vex_prefix): Handle vrex.
395 (build_evex_prefix): New.
396 (process_immext): Adjust to properly handle EVEX.
397 (md_assemble): Add EVEX encoding support.
398 (swap_2_operands): Correctly handle operands with masking,
399 broadcasting or RC/SAE.
400 (check_VecOperands): Support EVEX features.
401 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
402 (match_template): Support regzmm and handle new error codes.
403 (process_suffix): Handle zmmwords and zmm-registers.
404 (check_byte_reg): Extend to zmm-registers.
405 (process_operands): Extend to zmm-registers.
406 (build_modrm_byte): Handle EVEX.
407 (output_insn): Adjust to properly handle EVEX case.
408 (disp_size): Handle vec_disp8.
409 (output_disp): Support compressed disp8*N evex feature.
410 (output_imm): Handle RC/SAE immediates properly.
411 (check_VecOperations): New.
412 (i386_immediate): Handle EVEX features.
413 (i386_index_check): Handle zmmwords and zmm-registers.
414 (RC_SAE_immediate): New.
415 (i386_att_operand): Handle EVEX features.
416 (parse_real_register): Add a check for ZMM/Mask registers.
417 (OPTION_MEVEXLIG): New.
418 (OPTION_MEVEXWIG): New.
419 (md_longopts): Add mevexlig and mevexwig.
420 (md_parse_option): Handle mevexlig and mevexwig options.
421 (md_show_usage): Add description for mevexlig and mevexwig.
422 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
423 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
424
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4252013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
426
427 * config/tc-i386.c (cpu_arch): Add .sha.
428 * doc/c-i386.texi: Document sha/.sha.
429
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4302013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
431 Kirill Yukhin <kirill.yukhin@intel.com>
432 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
433
434 * config/tc-i386.c (BND_PREFIX): New.
435 (struct _i386_insn): Add new field bnd_prefix.
436 (add_bnd_prefix): New.
437 (cpu_arch): Add MPX.
438 (i386_operand_type): Add regbnd.
439 (md_assemble): Handle BND prefixes.
440 (parse_insn): Likewise.
441 (output_branch): Likewise.
442 (output_jump): Likewise.
443 (build_modrm_byte): Handle regbnd.
444 (OPTION_MADD_BND_PREFIX): New.
445 (md_longopts): Add entry for 'madd-bnd-prefix'.
446 (md_parse_option): Handle madd-bnd-prefix option.
447 (md_show_usage): Add description for madd-bnd-prefix
448 option.
449 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
450
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4512013-07-24 Tristan Gingold <gingold@adacore.com>
452
453 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
454 xcoff targets.
455
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4562013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
457
458 * config/tc-s390.c (s390_machine): Don't force the .machine
459 argument to lower case.
460
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4612013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
462
463 * config/tc-arm.c (s_arm_arch_extension): Improve error message
464 for invalid extension.
465
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4662013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
467
468 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
469 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
470 (aarch64_abi): New variable.
471 (ilp32_p): Change to be a macro.
472 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
473 (struct aarch64_option_abi_value_table): New struct.
474 (aarch64_abis): New table.
475 (aarch64_parse_abi): New function.
476 (aarch64_long_opts): Add entry for -mabi=.
477 * doc/as.texinfo (Target AArch64 options): Document -mabi.
478 * doc/c-aarch64.texi: Likewise.
479
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4802013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
481
482 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
483 unsigned comparison.
484
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NC
4852013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
486
cbe02d4f 487 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 488 RX610.
cbe02d4f 489 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
490 check floating point operation support for target RX100 and
491 RX200.
cbe02d4f
AM
492 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
493 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
494 RX200, RX600, and RX610
f0c00282 495
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NC
4962013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
497
498 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
499
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NC
5002013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
501
502 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
503 * doc/c-avr.texi: Likewise.
504
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5052013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
506
507 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
508 error with older GCCs.
509 (mips16_macro_build): Dereference args.
510
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5112013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
512
513 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
514 New functions, split out from...
515 (reg_lookup): ...here. Remove itbl support.
516 (reglist_lookup): Delete.
517 (mips_operand_token_type): New enum.
518 (mips_operand_token): New structure.
519 (mips_operand_tokens): New variable.
520 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
521 (mips_parse_arguments): New functions.
522 (md_begin): Initialize mips_operand_tokens.
523 (mips_arg_info): Add a token field. Remove optional_reg field.
524 (match_char, match_expression): New functions.
525 (match_const_int): Use match_expression. Remove "s" argument
526 and return a boolean result. Remove O_register handling.
527 (match_regno, match_reg, match_reg_range): New functions.
528 (match_int_operand, match_mapped_int_operand, match_msb_operand)
529 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
530 (match_addiusp_operand, match_clo_clz_dest_operand)
531 (match_lwm_swm_list_operand, match_entry_exit_operand)
532 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
533 (match_tied_reg_operand): Remove "s" argument and return a boolean
534 result. Match tokens rather than text. Update calls to
535 match_const_int. Rely on match_regno to call check_regno.
536 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
537 "arg" argument. Return a boolean result.
538 (parse_float_constant): Replace with...
539 (match_float_constant): ...this new function.
540 (match_operand): Remove "s" argument and return a boolean result.
541 Update calls to subfunctions.
542 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
543 rather than string-parsing routines. Update handling of optional
544 registers for token scheme.
545
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5462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
547
548 * config/tc-mips.c (parse_float_constant): Split out from...
549 (mips_ip): ...here.
550
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5512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
552
553 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
554 Delete.
555
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5562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
557
558 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
559 (match_entry_exit_operand): New function.
560 (match_save_restore_list_operand): Likewise.
561 (match_operand): Use them.
562 (check_absolute_expr): Delete.
563 (mips16_ip): Rewrite main parsing loop to use mips_operands.
564
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5652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c: Enable functions commented out in previous patch.
568 (SKIP_SPACE_TABS): Move further up file.
569 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
570 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
571 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
572 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
573 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
574 (micromips_imm_b_map, micromips_imm_c_map): Delete.
575 (mips_lookup_reg_pair): Delete.
576 (macro): Use report_bad_range and report_bad_field.
577 (mips_immed, expr_const_in_range): Delete.
578 (mips_ip): Rewrite main parsing loop to use new functions.
579
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5802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
581
582 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
583 Change return type to bfd_boolean.
584 (report_bad_range, report_bad_field): New functions.
585 (mips_arg_info): New structure.
586 (match_const_int, convert_reg_type, check_regno, match_int_operand)
587 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
588 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
589 (match_addiusp_operand, match_clo_clz_dest_operand)
590 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
591 (match_pc_operand, match_tied_reg_operand, match_operand)
592 (check_completed_insn): New functions, commented out for now.
593
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5942013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
595
596 * config/tc-mips.c (insn_insert_operand): New function.
597 (macro_build, mips16_macro_build): Put null character check
598 in the for loop and convert continues to breaks. Use operand
599 structures to handle constant operands.
600
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6012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
602
603 * config/tc-mips.c (validate_mips_insn): Move further up file.
604 Add insn_bits and decode_operand arguments. Use the mips_operand
605 fields to work out which bits an operand occupies. Detect double
606 definitions.
607 (validate_micromips_insn): Move further up file. Call into
608 validate_mips_insn.
609
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6102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
611
612 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
613
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6142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
617 and "~".
618 (macro): Update accordingly.
619
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6202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
621
622 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
623 (imm_reloc): Delete.
624 (md_assemble): Remove imm_reloc handling.
625 (mips_ip): Update commentary. Use offset_expr and offset_reloc
626 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
627 Use a temporary array rather than imm_reloc when parsing
628 constant expressions. Remove imm_reloc initialization.
629 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
630 for the relaxable field. Use a relax_char variable to track the
631 type of this field. Remove imm_reloc initialization.
632
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6332013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
634
635 * config/tc-mips.c (mips16_ip): Handle "I".
636
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MR
6372013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
638
639 * config/tc-mips.c (mips_flag_nan2008): New variable.
640 (options): Add OPTION_NAN enum value.
641 (md_longopts): Handle it.
642 (md_parse_option): Likewise.
643 (s_nan): New function.
644 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
645 (md_show_usage): Add -mnan.
646
647 * doc/as.texinfo (Overview): Add -mnan.
648 * doc/c-mips.texi (MIPS Opts): Document -mnan.
649 (MIPS NaN Encodings): New node. Document .nan directive.
650 (MIPS-Dependent): List the new node.
651
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TG
6522013-07-09 Tristan Gingold <gingold@adacore.com>
653
654 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
655
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RS
6562013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
657
658 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
659 for 'A' and assume that the constant has been elided if the result
660 is an O_register.
661
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6622013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
663
664 * config/tc-mips.c (gprel16_reloc_p): New function.
665 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
666 BFD_RELOC_UNUSED.
667 (offset_high_part, small_offset_p): New functions.
668 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
669 register load and store macros, handle the 16-bit offset case first.
670 If a 16-bit offset is not suitable for the instruction we're
671 generating, load it into the temporary register using
672 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
673 M_L_DAB code once the address has been constructed. For double load
674 and store macros, again handle the 16-bit offset case first.
675 If the second register cannot be accessed from the same high
676 part as the first, load it into AT using ADDRESS_ADDI_INSN.
677 Fix the handling of LD in cases where the first register is the
678 same as the base. Also handle the case where the offset is
679 not 16 bits and the second register cannot be accessed from the
680 same high part as the first. For unaligned loads and stores,
681 fuse the offbits == 12 and old "ab" handling. Apply this handling
682 whenever the second offset needs a different high part from the first.
683 Construct the offset using ADDRESS_ADDI_INSN where possible,
684 for offbits == 16 as well as offbits == 12. Use offset_reloc
685 when constructing the individual loads and stores.
686 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
687 and offset_reloc before matching against a particular opcode.
688 Handle elided 'A' constants. Allow 'A' constants to use
689 relocation operators.
690
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RS
6912013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
692
693 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
694 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
695 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
696
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RS
6972013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
698
699 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
700 Require the msb to be <= 31 for "+s". Check that the size is <= 31
701 for both "+s" and "+S".
702
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RS
7032013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
704
705 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
706 (mips_ip, mips16_ip): Handle "+i".
707
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7082013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
709
710 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
711 (micromips_to_32_reg_h_map): Rename to...
712 (micromips_to_32_reg_h_map1): ...this.
713 (micromips_to_32_reg_i_map): Rename to...
714 (micromips_to_32_reg_h_map2): ...this.
715 (mips_lookup_reg_pair): New function.
716 (gpr_write_mask, macro): Adjust after above renaming.
717 (validate_micromips_insn): Remove "mi" handling.
718 (mips_ip): Likewise. Parse both registers in a pair for "mh".
719
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7202013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
721
722 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
723 (mips_ip): Remove "+D" and "+T" handling.
724
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AK
7252013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
726
727 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
728 relocs.
729
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MS
7302013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
731
4aa2c5e2
MS
732 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
733
7342013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
735
2c0a3565
MS
736 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
737 (aarch64_force_relocation): Likewise.
738
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AM
7392013-07-02 Alan Modra <amodra@gmail.com>
740
741 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
742
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MR
7432013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
744
745 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
746 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
747 Replace @sc{mips16} with literal `MIPS16'.
748 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
749
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YZ
7502013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
751
752 * config/tc-aarch64.c (reloc_table): Replace
753 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
754 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
755 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
756 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
757 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
758 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
759 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
760 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
761 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
762 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
763 (aarch64_force_relocation): Likewise.
764
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YZ
7652013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
766
767 * config/tc-aarch64.c (ilp32_p): New static variable.
768 (elf64_aarch64_target_format): Return the target according to the
769 value of 'ilp32_p'.
770 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
771 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
772 (aarch64_dwarf2_addr_size): New function.
773 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
774 (DWARF2_ADDR_SIZE): New define.
775
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7762013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
777
778 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
779
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7802013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
781
782 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
783
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MR
7842013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
785
786 * config/tc-mips.c (mips_set_options): Add insn32 member.
787 (mips_opts): Initialize it.
788 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
789 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
790 (md_longopts): Add "minsn32" and "mno-insn32" options.
791 (is_size_valid): Handle insn32 mode.
792 (md_assemble): Pass instruction string down to macro.
793 (brk_fmt): Add second dimension and insn32 mode initializers.
794 (mfhl_fmt): Likewise.
795 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
796 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
797 (macro_build_jalr, move_register): Handle insn32 mode.
798 (macro_build_branch_rs): Likewise.
799 (macro): Handle insn32 mode.
800 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
801 (mips_ip): Handle insn32 mode.
802 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
803 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
804 (mips_handle_align): Handle insn32 mode.
805 (md_show_usage): Add -minsn32 and -mno-insn32.
806
807 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
808 -mno-insn32 options.
809 (-minsn32, -mno-insn32): New options.
810 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
811 options.
812 (MIPS assembly options): New node. Document .set insn32 and
813 .set noinsn32.
814 (MIPS-Dependent): List the new node.
815
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NC
8162013-06-25 Nick Clifton <nickc@redhat.com>
817
818 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
819 the PC in indirect addressing on 430xv2 parts.
820 (msp430_operands): Add version test to hardware bug encoding
821 restrictions.
822
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RM
8232013-06-24 Roland McGrath <mcgrathr@google.com>
824
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RM
825 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
826 so it skips whitespace before it.
827 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
828
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RM
829 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
830 (arm_reg_parse_multi): Skip whitespace first.
831 (parse_reg_list): Likewise.
832 (parse_vfp_reg_list): Likewise.
833 (s_arm_unwind_save_mmxwcg): Likewise.
834
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NC
8352013-06-24 Nick Clifton <nickc@redhat.com>
836
837 PR gas/15623
838 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
839
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RS
8402013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
841
842 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
843
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RS
8442013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
845
846 * config/tc-mips.c: Assert that offsetT and valueT are at least
847 8 bytes in size.
848 (GPR_SMIN, GPR_SMAX): New macros.
849 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
850
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8512013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
852
853 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
854 conditions. Remove any code deselected by them.
855 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
856
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8572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
858
859 * NEWS: Note removal of ECOFF support.
860 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
861 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
862 (MULTI_CFILES): Remove config/e-mipsecoff.c.
863 * Makefile.in: Regenerate.
864 * configure.in: Remove MIPS ECOFF references.
865 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
866 Delete cases.
867 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
868 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
869 (mips-*-*): ...this single case.
870 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
871 MIPS emulations to be e-mipself*.
872 * configure: Regenerate.
873 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
874 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
875 (mips-*-sysv*): Remove coff and ecoff cases.
876 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
877 * ecoff.c: Remove reference to MIPS ECOFF.
878 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
879 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
880 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
881 (mips_hi_fixup): Tweak comment.
882 (append_insn): Require a howto.
883 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
884
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8852013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
886
887 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
888 Use "CPU" instead of "cpu".
889 * doc/c-mips.texi: Likewise.
890 (MIPS Opts): Rename to MIPS Options.
891 (MIPS option stack): Rename to MIPS Option Stack.
892 (MIPS ASE instruction generation overrides): Rename to
893 MIPS ASE Instruction Generation Overrides (for now).
894 (MIPS floating-point): Rename to MIPS Floating-Point.
895
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RS
8962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
897
898 * doc/c-mips.texi (MIPS Macros): New section.
899 (MIPS Object): Replace with...
900 (MIPS Small Data): ...this new section.
901
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9022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
903
904 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
905 Capitalize name. Use @kindex instead of @cindex for .set entries.
906
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RS
9072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
908
909 * doc/c-mips.texi (MIPS Stabs): Remove section.
910
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RS
9112013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
914 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
915 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
916 (ISA_SUPPORTS_VIRT64_ASE): Delete.
917 (mips_ase): New structure.
918 (mips_ases): New table.
919 (FP64_ASES): New macro.
920 (mips_ase_groups): New array.
921 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
922 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
923 functions.
924 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
925 (md_parse_option): Use mips_ases and mips_set_ase instead of
926 separate case statements for each ASE option.
927 (mips_after_parse_args): Use FP64_ASES. Use
928 mips_check_isa_supports_ases to check the ASEs against
929 other options.
930 (s_mipsset): Use mips_ases and mips_set_ase instead of
931 separate if statements for each ASE option. Use
932 mips_check_isa_supports_ases, even when a non-ASE option
933 is specified.
934
63a4bc21
KT
9352013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
936
937 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
938
c31f3936
RS
9392013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
940
941 * config/tc-mips.c (md_shortopts, options, md_longopts)
942 (md_longopts_size): Move earlier in file.
943
846ef2d0
RS
9442013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
945
946 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
947 with a single "ase" bitmask.
948 (mips_opts): Update accordingly.
949 (file_ase, file_ase_explicit): New variables.
950 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
951 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
952 (ISA_HAS_ROR): Adjust for mips_set_options change.
953 (is_opcode_valid): Take the base ase mask directly from mips_opts.
954 (mips_ip): Adjust for mips_set_options change.
955 (md_parse_option): Likewise. Update file_ase_explicit.
956 (mips_after_parse_args): Adjust for mips_set_options change.
957 Use bitmask operations to select the default ASEs. Set file_ase
958 rather than individual per-ASE variables.
959 (s_mipsset): Adjust for mips_set_options change.
960 (mips_elf_final_processing): Test file_ase rather than
961 file_ase_mdmx. Remove commented-out code.
962
d16afab6
RS
9632013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
964
965 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
966 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
967 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
968 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
969 (mips_after_parse_args): Use the new "ase" field to choose
970 the default ASEs.
971 (mips_cpu_info_table): Move ASEs from the "flags" field to the
972 "ase" field.
973
e83a675f
RE
9742013-06-18 Richard Earnshaw <rearnsha@arm.com>
975
976 * config/tc-arm.c (symbol_preemptible): New function.
977 (relax_branch): Use it.
978
7f3c4072
CM
9792013-06-17 Catherine Moore <clm@codesourcery.com>
980 Maciej W. Rozycki <macro@codesourcery.com>
981 Chao-Ying Fu <fu@mips.com>
982
983 * config/tc-mips.c (mips_set_options): Add ase_eva.
984 (mips_set_options mips_opts): Add ase_eva.
985 (file_ase_eva): Declare.
986 (ISA_SUPPORTS_EVA_ASE): Define.
987 (IS_SEXT_9BIT_NUM): Define.
988 (MIPS_CPU_ASE_EVA): Define.
989 (is_opcode_valid): Add support for ase_eva.
990 (macro_build): Likewise.
991 (macro): Likewise.
992 (validate_mips_insn): Likewise.
993 (validate_micromips_insn): Likewise.
994 (mips_ip): Likewise.
995 (options): Add OPTION_EVA and OPTION_NO_EVA.
996 (md_longopts): Add -meva and -mno-eva.
997 (md_parse_option): Process new options.
998 (mips_after_parse_args): Check for valid EVA combinations.
999 (s_mipsset): Likewise.
1000
e410add4
RS
10012013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1002
1003 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1004 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1005 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1006 (dwarf2_gen_line_info_1): Update call accordingly.
1007 (dwarf2_move_insn): New function.
1008 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1009
6a50d470
RS
10102013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1011
1012 Revert:
1013
1014 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1015
1016 PR gas/13024
1017 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1018 (dwarf2_gen_line_info_1): Delete.
1019 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1020 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1021 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1022 (dwarf2_directive_loc): Push previous .locs instead of generating
1023 them immediately.
1024
f122319e
CF
10252013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1026
1027 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1028 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1029
909c7f9c
NC
10302013-06-13 Nick Clifton <nickc@redhat.com>
1031
1032 PR gas/15602
1033 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1034 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1035 function. Generates an error if the adjusted offset is out of a
1036 16-bit range.
1037
5d5755a7
SL
10382013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1039
1040 * config/tc-nios2.c (md_apply_fix): Mask constant
1041 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1042
3bf0dbfb
MR
10432013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1044
1045 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1046 MIPS-3D instructions either.
1047 (md_convert_frag): Update the COPx branch mask accordingly.
1048
1049 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1050 option.
1051 * doc/as.texinfo (Overview): Add --relax-branch and
1052 --no-relax-branch.
1053 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1054 --no-relax-branch.
1055
9daf7bab
SL
10562013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1057
1058 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1059 omitted.
1060
d301a56b
RS
10612013-06-08 Catherine Moore <clm@codesourcery.com>
1062
1063 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1064 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1065 (append_insn): Change INSN_xxxx to ASE_xxxx.
1066
7bab7634
DC
10672013-06-01 George Thomas <george.thomas@atmel.com>
1068
cbe02d4f 1069 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1070 AVR_ISA_XMEGAU
1071
f60cf82f
L
10722013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1073
1074 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1075 for ELF.
1076
a3f278e2
CM
10772013-05-31 Paul Brook <paul@codesourcery.com>
1078
a3f278e2
CM
1079 * config/tc-mips.c (s_ehword): New.
1080
067ec077
CM
10812013-05-30 Paul Brook <paul@codesourcery.com>
1082
1083 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1084
d6101ac2
MR
10852013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1086
1087 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1088 convert relocs who have no relocatable field either. Rephrase
1089 the conditional so that the PC-relative check is only applied
1090 for REL targets.
1091
f19ccbda
MR
10922013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1093
1094 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1095 calculation.
1096
418009c2
YZ
10972013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1098
1099 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1100 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1101 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1102 (md_apply_fix): Likewise.
1103 (aarch64_force_relocation): Likewise.
1104
0a8897c7
KT
11052013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1106
1107 * config/tc-arm.c (it_fsm_post_encode): Improve
1108 warning messages about deprecated IT block formats.
1109
89d2a2a3
MS
11102013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1111
1112 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1113 inside fx_done condition.
1114
c77c0862
RS
11152013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1116
1117 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1118
c0637f3a
PB
11192013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1120
1121 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1122 and clean up warning when using PRINT_OPCODE_TABLE.
1123
5656a981
AM
11242013-05-20 Alan Modra <amodra@gmail.com>
1125
1126 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1127 and data fixups performing shift/high adjust/sign extension on
1128 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1129 when writing data fixups rather than recalculating size.
1130
997b26e8
JBG
11312013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1132
1133 * doc/c-msp430.texi: Fix typo.
1134
9f6e76f4
TG
11352013-05-16 Tristan Gingold <gingold@adacore.com>
1136
1137 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1138 are also TOC symbols.
1139
638d3803
NC
11402013-05-16 Nick Clifton <nickc@redhat.com>
1141
1142 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1143 Add -mcpu command to specify core type.
997b26e8 1144 * doc/c-msp430.texi: Update documentation.
638d3803 1145
b015e599
AP
11462013-05-09 Andrew Pinski <apinski@cavium.com>
1147
1148 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1149 (mips_opts): Update for the new field.
1150 (file_ase_virt): New variable.
1151 (ISA_SUPPORTS_VIRT_ASE): New macro.
1152 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1153 (MIPS_CPU_ASE_VIRT): New define.
1154 (is_opcode_valid): Handle ase_virt.
1155 (macro_build): Handle "+J".
1156 (validate_mips_insn): Likewise.
1157 (mips_ip): Likewise.
1158 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1159 (md_longopts): Add mvirt and mnovirt
1160 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1161 (mips_after_parse_args): Handle ase_virt field.
1162 (s_mipsset): Handle "virt" and "novirt".
1163 (mips_elf_final_processing): Add a comment about virt ASE might need
1164 a new flag.
1165 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1166 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1167 Document ".set virt" and ".set novirt".
1168
da8094d7
AM
11692013-05-09 Alan Modra <amodra@gmail.com>
1170
1171 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1172 control of operand flag bits.
1173
c5f8c205
AM
11742013-05-07 Alan Modra <amodra@gmail.com>
1175
1176 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1177 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1178 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1179 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1180 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1181 Shift and sign-extend fieldval for use by some VLE reloc
1182 operand->insert functions.
1183
b47468a6
CM
11842013-05-06 Paul Brook <paul@codesourcery.com>
1185 Catherine Moore <clm@codesourcery.com>
1186
c5f8c205
AM
1187 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1188 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1189 (md_apply_fix): Likewise.
1190 (tc_gen_reloc): Likewise.
1191
2de39019
CM
11922013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1193
1194 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1195 (mips_fix_adjustable): Adjust pc-relative check to use
1196 limited_pc_reloc_p.
1197
754e2bb9
RS
11982013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1199
1200 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1201 (s_mips_stab): Do not restrict to stabn only.
1202
13761a11
NC
12032013-05-02 Nick Clifton <nickc@redhat.com>
1204
1205 * config/tc-msp430.c: Add support for the MSP430X architecture.
1206 Add code to insert a NOP instruction after any instruction that
1207 might change the interrupt state.
1208 Add support for the LARGE memory model.
1209 Add code to initialise the .MSP430.attributes section.
1210 * config/tc-msp430.h: Add support for the MSP430X architecture.
1211 * doc/c-msp430.texi: Document the new -mL and -mN command line
1212 options.
1213 * NEWS: Mention support for the MSP430X architecture.
1214
df26367c
MR
12152013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1216
1217 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1218 alpha*-*-linux*ecoff*.
1219
f02d8318
CF
12202013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1221
1222 * config/tc-mips.c (mips_ip): Add sizelo.
1223 For "+C", "+G", and "+H", set sizelo and compare against it.
1224
b40bf0a2
NC
12252013-04-29 Nick Clifton <nickc@redhat.com>
1226
1227 * as.c (Options): Add -gdwarf-sections.
1228 (parse_args): Likewise.
1229 * as.h (flag_dwarf_sections): Declare.
1230 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1231 (process_entries): When -gdwarf-sections is enabled generate
1232 fragmentary .debug_line sections.
1233 (out_debug_line): Set the section for the .debug_line section end
1234 symbol.
1235 * doc/as.texinfo: Document -gdwarf-sections.
1236 * NEWS: Mention -gdwarf-sections.
1237
8eeccb77 12382013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1239
1240 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1241 according to the target parameter. Don't call s_segm since s_segm
1242 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1243 initialized yet.
1244 (md_begin): Call s_segm according to target parameter from command
1245 line.
1246
49926cd0
AM
12472013-04-25 Alan Modra <amodra@gmail.com>
1248
1249 * configure.in: Allow little-endian linux.
1250 * configure: Regenerate.
1251
e3031850
SL
12522013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1253
1254 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1255 "fstatus" control register to "eccinj".
1256
cb948fc0
KT
12572013-04-19 Kai Tietz <ktietz@redhat.com>
1258
1259 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1260
4455e9ad
JB
12612013-04-15 Julian Brown <julian@codesourcery.com>
1262
1263 * expr.c (add_to_result, subtract_from_result): Make global.
1264 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1265 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1266 subtract_from_result to handle extra bit of precision for .sleb128
1267 directive operands.
1268
956a6ba3
JB
12692013-04-10 Julian Brown <julian@codesourcery.com>
1270
1271 * read.c (convert_to_bignum): Add sign parameter. Use it
1272 instead of X_unsigned to determine sign of resulting bignum.
1273 (emit_expr): Pass extra argument to convert_to_bignum.
1274 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1275 X_extrabit to convert_to_bignum.
1276 (parse_bitfield_cons): Set X_extrabit.
1277 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1278 Initialise X_extrabit field as appropriate.
1279 (add_to_result): New.
1280 (subtract_from_result): New.
1281 (expr): Use above.
1282 * expr.h (expressionS): Add X_extrabit field.
1283
eb9f3f00
JB
12842013-04-10 Jan Beulich <jbeulich@suse.com>
1285
1286 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1287 register being PC when is_t or writeback, and use distinct
1288 diagnostic for the latter case.
1289
ccb84d65
JB
12902013-04-10 Jan Beulich <jbeulich@suse.com>
1291
1292 * gas/config/tc-arm.c (parse_operands): Re-write
1293 po_barrier_or_imm().
1294 (do_barrier): Remove bogus constraint().
1295 (do_t_barrier): Remove.
1296
4d13caa0
NC
12972013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1298
1299 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1300 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1301 ATmega2564RFR2
1302 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1303
16d02dc9
JB
13042013-04-09 Jan Beulich <jbeulich@suse.com>
1305
1306 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1307 Use local variable Rt in more places.
1308 (do_vmsr): Accept all control registers.
1309
05ac0ffb
JB
13102013-04-09 Jan Beulich <jbeulich@suse.com>
1311
1312 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1313 if there was none specified for moves between scalar and core
1314 register.
1315
2d51fb74
JB
13162013-04-09 Jan Beulich <jbeulich@suse.com>
1317
1318 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1319 NEON_ALL_LANES case.
1320
94dcf8bf
JB
13212013-04-08 Jan Beulich <jbeulich@suse.com>
1322
1323 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1324 PC-relative VSTR.
1325
1472d06f
JB
13262013-04-08 Jan Beulich <jbeulich@suse.com>
1327
1328 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1329 entry to sp_fiq.
1330
0c76cae8
AM
13312013-04-03 Alan Modra <amodra@gmail.com>
1332
1333 * doc/as.texinfo: Add support to generate man options for h8300.
1334 * doc/c-h8300.texi: Likewise.
1335
92eb40d9
RR
13362013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1337
1338 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1339 Cortex-A57.
1340
51dcdd4d
NC
13412013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1342
1343 PR binutils/15068
1344 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1345
c5d685bf
NC
13462013-03-26 Nick Clifton <nickc@redhat.com>
1347
9b978282
NC
1348 PR gas/15295
1349 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1350 start of the file each time.
1351
c5d685bf
NC
1352 PR gas/15178
1353 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1354 FreeBSD targets.
1355
9699c833
TG
13562013-03-26 Douglas B Rupp <rupp@gnat.com>
1357
1358 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1359 after fixup.
1360
4755303e
WN
13612013-03-21 Will Newton <will.newton@linaro.org>
1362
1363 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1364 pc-relative str instructions in Thumb mode.
1365
81f5558e
NC
13662013-03-21 Michael Schewe <michael.schewe@gmx.net>
1367
1368 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1369 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1370 R_H8_DISP32A16.
1371 * config/tc-h8300.h: Remove duplicated defines.
1372
71863e73
NC
13732013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1374
1375 PR gas/15282
1376 * tc-avr.c (mcu_has_3_byte_pc): New function.
1377 (tc_cfi_frame_initial_instructions): Call it to find return
1378 address size.
1379
795b8e6b
NC
13802013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1381
1382 PR gas/15095
1383 * config/tc-tic6x.c (tic6x_try_encode): Handle
1384 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1385 encode register pair numbers when required.
1386
ba86b375
WN
13872013-03-15 Will Newton <will.newton@linaro.org>
1388
1389 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1390 in vstr in Thumb mode for pre-ARMv7 cores.
1391
9e6f3811
AS
13922013-03-14 Andreas Schwab <schwab@suse.de>
1393
1394 * doc/c-arc.texi (ARC Directives): Revert last change and use
1395 @itemize instead of @table.
1396 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1397
b10bf8c5
NC
13982013-03-14 Nick Clifton <nickc@redhat.com>
1399
1400 PR gas/15273
1401 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1402 NULL message, instead just check ARM_CPU_IS_ANY directly.
1403
ba724cfc
NC
14042013-03-14 Nick Clifton <nickc@redhat.com>
1405
1406 PR gas/15212
9e6f3811 1407 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1408 for table format.
1409 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1410 to the @item directives.
1411 (ARM-Neon-Alignment): Move to correct place in the document.
1412 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1413 formatting.
1414 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1415 @smallexample.
1416
531a94fd
SL
14172013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1418
1419 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1420 case. Add default BAD_CASE to switch.
1421
dad60f8e
SL
14222013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1423
1424 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1425 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1426
dd5181d5
KT
14272013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1428
1429 * config/tc-arm.c (crc_ext_armv8): New feature set.
1430 (UNPRED_REG): New macro.
1431 (do_crc32_1): New function.
1432 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1433 do_crc32ch, do_crc32cw): Likewise.
1434 (TUEc): New macro.
1435 (insns): Add entries for crc32 mnemonics.
1436 (arm_extensions): Add entry for crc.
1437
8e723a10
CLT
14382013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1439
1440 * write.h (struct fix): Add fx_dot_frag field.
1441 (dot_frag): Declare.
1442 * write.c (dot_frag): New variable.
1443 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1444 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1445 * expr.c (expr): Save value of frag_now in dot_frag when setting
1446 dot_value.
1447 * read.c (emit_expr): Likewise. Delete comments.
1448
be05d201
L
14492013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1450
1451 * config/tc-i386.c (flag_code_names): Removed.
1452 (i386_index_check): Rewrote.
1453
62b0d0d5
YZ
14542013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1455
1456 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1457 add comment.
1458 (aarch64_double_precision_fmovable): New function.
1459 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1460 function; handle hexadecimal representation of IEEE754 encoding.
1461 (parse_operands): Update the call to parse_aarch64_imm_float.
1462
165de32a
L
14632013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1464
1465 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1466 (check_hle): Updated.
1467 (md_assemble): Likewise.
1468 (parse_insn): Likewise.
1469
d5de92cf
L
14702013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1471
1472 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1473 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1474 (parse_insn): Remove expecting_string_instruction. Set
1475 i.rep_prefix.
1476
e60bb1dd
YZ
14772013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1478
1479 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1480
aeebdd9b
YZ
14812013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1482
1483 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1484 for system registers.
1485
4107ae22
DD
14862013-02-27 DJ Delorie <dj@redhat.com>
1487
1488 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1489 (rl78_op): Handle %code().
1490 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1491 (tc_gen_reloc): Likwise; convert to a computed reloc.
1492 (md_apply_fix): Likewise.
1493
151fa98f
NC
14942013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1495
1496 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1497
70a8bc5b 14982013-02-25 Terry Guo <terry.guo@arm.com>
1499
1500 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1501 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1502 list of accepted CPUs.
1503
5c111e37
L
15042013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1505
1506 PR gas/15159
1507 * config/tc-i386.c (cpu_arch): Add ".smap".
1508
1509 * doc/c-i386.texi: Document smap.
1510
8a75745d
MR
15112013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1512
1513 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1514 mips_assembling_insn appropriately.
1515 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1516
79850f26
MR
15172013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1518
cf29fc61 1519 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1520 extraneous braces.
1521
4c261dff
NC
15222013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1523
5c111e37 1524 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1525
ea33f281
NC
15262013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1527
1528 * configure.tgt: Add nios2-*-rtems*.
1529
a1ccaec9
YZ
15302013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1531
1532 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1533 NULL.
1534
0aa27725
RS
15352013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1536
1537 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1538 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1539
da4339ed
NC
15402013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1541
1542 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1543 core.
1544
36591ba1 15452013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1546 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1547
1548 Based on patches from Altera Corporation.
1549
1550 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1551 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1552 * Makefile.in: Regenerated.
1553 * configure.tgt: Add case for nios2*-linux*.
1554 * config/obj-elf.c: Conditionally include elf/nios2.h.
1555 * config/tc-nios2.c: New file.
1556 * config/tc-nios2.h: New file.
1557 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1558 * doc/Makefile.in: Regenerated.
1559 * doc/all.texi: Set NIOSII.
1560 * doc/as.texinfo (Overview): Add Nios II options.
1561 (Machine Dependencies): Include c-nios2.texi.
1562 * doc/c-nios2.texi: New file.
1563 * NEWS: Note Altera Nios II support.
1564
94d4433a
AM
15652013-02-06 Alan Modra <amodra@gmail.com>
1566
1567 PR gas/14255
1568 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1569 Don't skip fixups with fx_subsy non-NULL.
1570 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1571 with fx_subsy non-NULL.
1572
ace9af6f
L
15732013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1574
1575 * doc/c-metag.texi: Add "@c man" markers.
1576
89d67ed9
AM
15772013-02-04 Alan Modra <amodra@gmail.com>
1578
1579 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1580 related code.
1581 (TC_ADJUST_RELOC_COUNT): Delete.
1582 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1583
89072bd6
AM
15842013-02-04 Alan Modra <amodra@gmail.com>
1585
1586 * po/POTFILES.in: Regenerate.
1587
f9b2d544
NC
15882013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1589
1590 * config/tc-metag.c: Make SWAP instruction less permissive with
1591 its operands.
1592
392ca752
DD
15932013-01-29 DJ Delorie <dj@redhat.com>
1594
1595 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1596 relocs in .word/.etc statements.
1597
427d0db6
RM
15982013-01-29 Roland McGrath <mcgrathr@google.com>
1599
1600 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1601 immediate value for 8-bit offset" error so it shows line info.
1602
4faf939a
JM
16032013-01-24 Joseph Myers <joseph@codesourcery.com>
1604
1605 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1606 for 64-bit output.
1607
78c8d46c
NC
16082013-01-24 Nick Clifton <nickc@redhat.com>
1609
1610 * config/tc-v850.c: Add support for e3v5 architecture.
1611 * doc/c-v850.texi: Mention new support.
1612
fb5b7503
NC
16132013-01-23 Nick Clifton <nickc@redhat.com>
1614
1615 PR gas/15039
1616 * config/tc-avr.c: Include dwarf2dbg.h.
1617
8ce3d284
L
16182013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1619
1620 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1621 (tc_i386_fix_adjustable): Likewise.
1622 (lex_got): Likewise.
1623 (tc_gen_reloc): Likewise.
1624
f5555712
YZ
16252013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1626
1627 * config/tc-aarch64.c (output_operand_error_record): Change to output
1628 the out-of-range error message as value-expected message if there is
1629 only one single value in the expected range.
1630 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1631 LSL #0 as a programmer-friendly feature.
1632
8fd4256d
L
16332013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1634
1635 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1636 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1637 BFD_RELOC_64_SIZE relocations.
1638 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1639 for it.
1640 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1641 relocations against local symbols.
1642
a5840dce
AM
16432013-01-16 Alan Modra <amodra@gmail.com>
1644
1645 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1646 finding some sort of toc syntax error, and break to avoid
1647 compiler uninit warning.
1648
af89796a
L
16492013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1650
1651 PR gas/15019
1652 * config/tc-i386.c (lex_got): Increment length by 1 if the
1653 relocation token is removed.
1654
dd42f060
NC
16552013-01-15 Nick Clifton <nickc@redhat.com>
1656
1657 * config/tc-v850.c (md_assemble): Allow signed values for
1658 V850E_IMMEDIATE.
1659
464e3686
SK
16602013-01-11 Sean Keys <skeys@ipdatasys.com>
1661
1662 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1663 git to cvs.
464e3686 1664
5817ffd1
PB
16652013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1666
1667 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1668 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1669 * config/tc-ppc.c (md_show_usage): Likewise.
1670 (ppc_handle_align): Handle power8's group ending nop.
1671
f4b1f6a9
SK
16722013-01-10 Sean Keys <skeys@ipdatasys.com>
1673
1674 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1675 that the assember exits after the opcodes have been printed.
f4b1f6a9 1676
34bca508
L
16772013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1678
1679 * app.c: Remove trailing white spaces.
1680 * as.c: Likewise.
1681 * as.h: Likewise.
1682 * cond.c: Likewise.
1683 * dw2gencfi.c: Likewise.
1684 * dwarf2dbg.h: Likewise.
1685 * ecoff.c: Likewise.
1686 * input-file.c: Likewise.
1687 * itbl-lex.h: Likewise.
1688 * output-file.c: Likewise.
1689 * read.c: Likewise.
1690 * sb.c: Likewise.
1691 * subsegs.c: Likewise.
1692 * symbols.c: Likewise.
1693 * write.c: Likewise.
1694 * config/tc-i386.c: Likewise.
1695 * doc/Makefile.am: Likewise.
1696 * doc/Makefile.in: Likewise.
1697 * doc/c-aarch64.texi: Likewise.
1698 * doc/c-alpha.texi: Likewise.
1699 * doc/c-arc.texi: Likewise.
1700 * doc/c-arm.texi: Likewise.
1701 * doc/c-avr.texi: Likewise.
1702 * doc/c-bfin.texi: Likewise.
1703 * doc/c-cr16.texi: Likewise.
1704 * doc/c-d10v.texi: Likewise.
1705 * doc/c-d30v.texi: Likewise.
1706 * doc/c-h8300.texi: Likewise.
1707 * doc/c-hppa.texi: Likewise.
1708 * doc/c-i370.texi: Likewise.
1709 * doc/c-i386.texi: Likewise.
1710 * doc/c-i860.texi: Likewise.
1711 * doc/c-m32c.texi: Likewise.
1712 * doc/c-m32r.texi: Likewise.
1713 * doc/c-m68hc11.texi: Likewise.
1714 * doc/c-m68k.texi: Likewise.
1715 * doc/c-microblaze.texi: Likewise.
1716 * doc/c-mips.texi: Likewise.
1717 * doc/c-msp430.texi: Likewise.
1718 * doc/c-mt.texi: Likewise.
1719 * doc/c-s390.texi: Likewise.
1720 * doc/c-score.texi: Likewise.
1721 * doc/c-sh.texi: Likewise.
1722 * doc/c-sh64.texi: Likewise.
1723 * doc/c-tic54x.texi: Likewise.
1724 * doc/c-tic6x.texi: Likewise.
1725 * doc/c-v850.texi: Likewise.
1726 * doc/c-xc16x.texi: Likewise.
1727 * doc/c-xgate.texi: Likewise.
1728 * doc/c-xtensa.texi: Likewise.
1729 * doc/c-z80.texi: Likewise.
1730 * doc/internals.texi: Likewise.
1731
4c665b71
RM
17322013-01-10 Roland McGrath <mcgrathr@google.com>
1733
1734 * hash.c (hash_new_sized): Make it global.
1735 * hash.h: Declare it.
1736 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1737 pass a small size.
1738
a3c62988
NC
17392013-01-10 Will Newton <will.newton@imgtec.com>
1740
1741 * Makefile.am: Add Meta.
1742 * Makefile.in: Regenerate.
1743 * config/tc-metag.c: New file.
1744 * config/tc-metag.h: New file.
1745 * configure.tgt: Add Meta.
1746 * doc/Makefile.am: Add Meta.
1747 * doc/Makefile.in: Regenerate.
1748 * doc/all.texi: Add Meta.
1749 * doc/as.texiinfo: Document Meta options.
1750 * doc/c-metag.texi: New file.
1751
b37df7c4
SE
17522013-01-09 Steve Ellcey <sellcey@mips.com>
1753
1754 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1755 calls.
1756 * config/tc-mips.c (internalError): Remove, replace with abort.
1757
a3251895
YZ
17582013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1759
1760 * config/tc-aarch64.c (parse_operands): Change to compare the result
1761 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1762
8ab8155f
NC
17632013-01-07 Nick Clifton <nickc@redhat.com>
1764
1765 PR gas/14887
1766 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1767 anticipated character.
1768 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1769 here as it is no longer needed.
1770
a4ac1c42
AS
17712013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1772
1773 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1774 * doc/c-score.texi (SCORE-Opts): Likewise.
1775 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1776
e407c74b
NC
17772013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1778
1779 * config/tc-mips.c: Add support for MIPS r5900.
1780 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1781 lq and sq.
1782 (can_swap_branch_p, get_append_method): Detect some conditional
1783 short loops to fix a bug on the r5900 by NOP in the branch delay
1784 slot.
1785 (M_MUL): Support 3 operands in multu on r5900.
1786 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1787 (s_mipsset): Force 32 bit floating point on r5900.
1788 (mips_ip): Check parameter range of instructions mfps and mtps on
1789 r5900.
1790 * configure.in: Detect CPU type when target string contains r5900
1791 (e.g. mips64r5900el-linux-gnu).
1792
62658407
L
17932013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1794
1795 * as.c (parse_args): Update copyright year to 2013.
1796
95830fd1
YZ
17972013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1798
1799 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1800 and "cortex57".
1801
517bb291 18022013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1803
517bb291
NC
1804 PR gas/14987
1805 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1806 closing bracket.
d709e4e6 1807
517bb291 1808For older changes see ChangeLog-2012
08d56133 1809\f
517bb291 1810Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1811
1812Copying and distribution of this file, with or without modification,
1813are permitted in any medium without royalty provided the copyright
1814notice and this notice are preserved.
1815
08d56133
NC
1816Local Variables:
1817mode: change-log
1818left-margin: 8
1819fill-column: 74
1820version-control: never
1821End: