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* config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-08-16 Alan Modra <amodra@gmail.com>
2
3 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
4
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52013-08-14 David Edelsohn <dje.gcc@gmail.com>
6
7 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
8 argument as alignment.
9
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102013-08-09 Nick Clifton <nickc@redhat.com>
11
12 * config/tc-rl78.c (elf_flags): New variable.
13 (enum options): Add OPTION_G10.
14 (md_longopts): Add mg10.
15 (md_parse_option): Parse -mg10.
16 (rl78_elf_final_processing): New function.
17 * config/tc-rl78.c (tc_final_processing): Define.
18 * doc/c-rl78.texi: Document -mg10 option.
19
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202013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
21
22 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
23 suffixes to be elided too.
24 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
25 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
26 to be omitted too.
27
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282013-08-05 John Tytgat <john@bass-software.com>
29
30 * po/POTFILES.in: Regenerate.
31
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322013-08-05 Eric Botcazou <ebotcazou@adacore.com>
33 Konrad Eisele <konrad@gaisler.com>
34
35 * config/tc-sparc.c (sparc_arch_types): Add leon.
36 (sparc_arch): Move sparc4 around and add leon.
37 (sparc_target_format): Document -Aleon.
38 * doc/c-sparc.texi: Likewise.
39
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402013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
41
42 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
43
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442013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
45 Richard Sandiford <rdsandiford@googlemail.com>
46
47 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
48 (RWARN): Bump to 0x8000000.
49 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
50 (RTYPE_R5900_ACC): New register types.
51 (RTYPE_MASK): Include them.
52 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
53 macros.
54 (reg_names): Include them.
55 (mips_parse_register_1): New function, split out from...
56 (mips_parse_register): ...here. Add a channels_ptr parameter.
57 Look for VU0 channel suffixes when nonnull.
58 (reg_lookup): Update the call to mips_parse_register.
59 (mips_parse_vu0_channels): New function.
60 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
61 (mips_operand_token): Add a "channels" field to the union.
62 Extend the comment above "ch" to OT_DOUBLE_CHAR.
63 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
64 (mips_parse_argument_token): Handle channel suffixes here too.
65 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
66 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
67 Handle '#' formats.
68 (md_begin): Register $vfN and $vfI registers.
69 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
70 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
71 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
72 (match_vu0_suffix_operand): New function.
73 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
74 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
75 (mips_lookup_insn): New function.
76 (mips_ip): Use it. Allow "+K" operands to be elided at the end
77 of an instruction. Handle '#' sequences.
78
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792013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
80
81 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
82 values and use it instead of sreg, treg, xreg, etc.
83
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842013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
85
86 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
87 and mips_int_operand_max.
88 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
89 Delete.
90 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
91 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
92 instead of mips16_immed_operand.
93
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942013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
95
96 * config/tc-mips.c (mips16_macro): Don't use move_register.
97 (mips16_ip): Allow macros to use 'p'.
98
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992013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
100
101 * config/tc-mips.c (MAX_OPERANDS): New macro.
102 (mips_operand_array): New structure.
103 (mips_operands, mips16_operands, micromips_operands): New arrays.
104 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
105 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
106 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
107 (micromips_to_32_reg_q_map): Delete.
108 (insn_operands, insn_opno, insn_extract_operand): New functions.
109 (validate_mips_insn): Take a mips_operand_array as argument and
110 use it to build up a list of operands. Extend to handle INSN_MACRO
111 and MIPS16.
112 (validate_mips16_insn): New function.
113 (validate_micromips_insn): Take a mips_operand_array as argument.
114 Handle INSN_MACRO.
115 (md_begin): Initialize mips_operands, mips16_operands and
116 micromips_operands. Call validate_mips_insn and
117 validate_micromips_insn for macro instructions too.
118 Call validate_mips16_insn for MIPS16 instructions.
119 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
120 New functions.
121 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
122 them. Handle INSN_UDI.
123 (get_append_method): Use gpr_read_mask.
124
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1252013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
128 flags for MIPS16 and non-MIPS16 instructions.
129 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
130 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
131 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
132 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
133 and non-MIPS16 instructions. Fix formatting.
134
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1352013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
136
137 * config/tc-mips.c (reg_needs_delay): Move later in file.
138 Use gpr_write_mask.
139 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
140
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1412013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
142 Alexander Ivchenko <alexander.ivchenko@intel.com>
143 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
144 Sergey Lega <sergey.s.lega@intel.com>
145 Anna Tikhonova <anna.tikhonova@intel.com>
146 Ilya Tocar <ilya.tocar@intel.com>
147 Andrey Turetskiy <andrey.turetskiy@intel.com>
148 Ilya Verbin <ilya.verbin@intel.com>
149 Kirill Yukhin <kirill.yukhin@intel.com>
150 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
151
152 * config/tc-i386-intel.c (O_zmmword_ptr): New.
153 (i386_types): Add zmmword.
154 (i386_intel_simplify_register): Allow regzmm.
155 (i386_intel_simplify): Handle zmmwords.
156 (i386_intel_operand): Handle RC/SAE, vector operations and
157 zmmwords.
158 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
159 (struct RC_Operation): New.
160 (struct Mask_Operation): New.
161 (struct Broadcast_Operation): New.
162 (vex_prefix): Size of bytes increased to 4 to support EVEX
163 encoding.
164 (enum i386_error): Add new error codes: unsupported_broadcast,
165 broadcast_not_on_src_operand, broadcast_needed,
166 unsupported_masking, mask_not_on_destination, no_default_mask,
167 unsupported_rc_sae, rc_sae_operand_not_last_imm,
168 invalid_register_operand, try_vector_disp8.
169 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
170 rounding, broadcast, memshift.
171 (struct RC_name): New.
172 (RC_NamesTable): New.
173 (evexlig): New.
174 (evexwig): New.
175 (extra_symbol_chars): Add '{'.
176 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
177 (i386_operand_type): Add regzmm, regmask and vec_disp8.
178 (match_mem_size): Handle zmmwords.
179 (operand_type_match): Handle zmm-registers.
180 (mode_from_disp_size): Handle vec_disp8.
181 (fits_in_vec_disp8): New.
182 (md_begin): Handle {} properly.
183 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
184 (build_vex_prefix): Handle vrex.
185 (build_evex_prefix): New.
186 (process_immext): Adjust to properly handle EVEX.
187 (md_assemble): Add EVEX encoding support.
188 (swap_2_operands): Correctly handle operands with masking,
189 broadcasting or RC/SAE.
190 (check_VecOperands): Support EVEX features.
191 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
192 (match_template): Support regzmm and handle new error codes.
193 (process_suffix): Handle zmmwords and zmm-registers.
194 (check_byte_reg): Extend to zmm-registers.
195 (process_operands): Extend to zmm-registers.
196 (build_modrm_byte): Handle EVEX.
197 (output_insn): Adjust to properly handle EVEX case.
198 (disp_size): Handle vec_disp8.
199 (output_disp): Support compressed disp8*N evex feature.
200 (output_imm): Handle RC/SAE immediates properly.
201 (check_VecOperations): New.
202 (i386_immediate): Handle EVEX features.
203 (i386_index_check): Handle zmmwords and zmm-registers.
204 (RC_SAE_immediate): New.
205 (i386_att_operand): Handle EVEX features.
206 (parse_real_register): Add a check for ZMM/Mask registers.
207 (OPTION_MEVEXLIG): New.
208 (OPTION_MEVEXWIG): New.
209 (md_longopts): Add mevexlig and mevexwig.
210 (md_parse_option): Handle mevexlig and mevexwig options.
211 (md_show_usage): Add description for mevexlig and mevexwig.
212 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
213 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
214
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2152013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
216
217 * config/tc-i386.c (cpu_arch): Add .sha.
218 * doc/c-i386.texi: Document sha/.sha.
219
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2202013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
221 Kirill Yukhin <kirill.yukhin@intel.com>
222 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
223
224 * config/tc-i386.c (BND_PREFIX): New.
225 (struct _i386_insn): Add new field bnd_prefix.
226 (add_bnd_prefix): New.
227 (cpu_arch): Add MPX.
228 (i386_operand_type): Add regbnd.
229 (md_assemble): Handle BND prefixes.
230 (parse_insn): Likewise.
231 (output_branch): Likewise.
232 (output_jump): Likewise.
233 (build_modrm_byte): Handle regbnd.
234 (OPTION_MADD_BND_PREFIX): New.
235 (md_longopts): Add entry for 'madd-bnd-prefix'.
236 (md_parse_option): Handle madd-bnd-prefix option.
237 (md_show_usage): Add description for madd-bnd-prefix
238 option.
239 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
240
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2412013-07-24 Tristan Gingold <gingold@adacore.com>
242
243 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
244 xcoff targets.
245
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2462013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
247
248 * config/tc-s390.c (s390_machine): Don't force the .machine
249 argument to lower case.
250
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2512013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
252
253 * config/tc-arm.c (s_arm_arch_extension): Improve error message
254 for invalid extension.
255
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2562013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
257
258 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
259 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
260 (aarch64_abi): New variable.
261 (ilp32_p): Change to be a macro.
262 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
263 (struct aarch64_option_abi_value_table): New struct.
264 (aarch64_abis): New table.
265 (aarch64_parse_abi): New function.
266 (aarch64_long_opts): Add entry for -mabi=.
267 * doc/as.texinfo (Target AArch64 options): Document -mabi.
268 * doc/c-aarch64.texi: Likewise.
269
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2702013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
271
272 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
273 unsigned comparison.
274
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2752013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
276
cbe02d4f 277 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 278 RX610.
cbe02d4f 279 * config/rx-parse.y: (rx_check_float_support): Add function to
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280 check floating point operation support for target RX100 and
281 RX200.
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282 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
283 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
284 RX200, RX600, and RX610
f0c00282 285
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2862013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
287
288 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
289
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2902013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
291
292 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
293 * doc/c-avr.texi: Likewise.
294
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2952013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
296
297 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
298 error with older GCCs.
299 (mips16_macro_build): Dereference args.
300
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3012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
302
303 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
304 New functions, split out from...
305 (reg_lookup): ...here. Remove itbl support.
306 (reglist_lookup): Delete.
307 (mips_operand_token_type): New enum.
308 (mips_operand_token): New structure.
309 (mips_operand_tokens): New variable.
310 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
311 (mips_parse_arguments): New functions.
312 (md_begin): Initialize mips_operand_tokens.
313 (mips_arg_info): Add a token field. Remove optional_reg field.
314 (match_char, match_expression): New functions.
315 (match_const_int): Use match_expression. Remove "s" argument
316 and return a boolean result. Remove O_register handling.
317 (match_regno, match_reg, match_reg_range): New functions.
318 (match_int_operand, match_mapped_int_operand, match_msb_operand)
319 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
320 (match_addiusp_operand, match_clo_clz_dest_operand)
321 (match_lwm_swm_list_operand, match_entry_exit_operand)
322 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
323 (match_tied_reg_operand): Remove "s" argument and return a boolean
324 result. Match tokens rather than text. Update calls to
325 match_const_int. Rely on match_regno to call check_regno.
326 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
327 "arg" argument. Return a boolean result.
328 (parse_float_constant): Replace with...
329 (match_float_constant): ...this new function.
330 (match_operand): Remove "s" argument and return a boolean result.
331 Update calls to subfunctions.
332 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
333 rather than string-parsing routines. Update handling of optional
334 registers for token scheme.
335
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3362013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
337
338 * config/tc-mips.c (parse_float_constant): Split out from...
339 (mips_ip): ...here.
340
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3412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
344 Delete.
345
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3462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
347
348 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
349 (match_entry_exit_operand): New function.
350 (match_save_restore_list_operand): Likewise.
351 (match_operand): Use them.
352 (check_absolute_expr): Delete.
353 (mips16_ip): Rewrite main parsing loop to use mips_operands.
354
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3552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
356
357 * config/tc-mips.c: Enable functions commented out in previous patch.
358 (SKIP_SPACE_TABS): Move further up file.
359 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
360 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
361 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
362 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
363 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
364 (micromips_imm_b_map, micromips_imm_c_map): Delete.
365 (mips_lookup_reg_pair): Delete.
366 (macro): Use report_bad_range and report_bad_field.
367 (mips_immed, expr_const_in_range): Delete.
368 (mips_ip): Rewrite main parsing loop to use new functions.
369
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3702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
371
372 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
373 Change return type to bfd_boolean.
374 (report_bad_range, report_bad_field): New functions.
375 (mips_arg_info): New structure.
376 (match_const_int, convert_reg_type, check_regno, match_int_operand)
377 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
378 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
379 (match_addiusp_operand, match_clo_clz_dest_operand)
380 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
381 (match_pc_operand, match_tied_reg_operand, match_operand)
382 (check_completed_insn): New functions, commented out for now.
383
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3842013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
385
386 * config/tc-mips.c (insn_insert_operand): New function.
387 (macro_build, mips16_macro_build): Put null character check
388 in the for loop and convert continues to breaks. Use operand
389 structures to handle constant operands.
390
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3912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
392
393 * config/tc-mips.c (validate_mips_insn): Move further up file.
394 Add insn_bits and decode_operand arguments. Use the mips_operand
395 fields to work out which bits an operand occupies. Detect double
396 definitions.
397 (validate_micromips_insn): Move further up file. Call into
398 validate_mips_insn.
399
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4002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
401
402 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
403
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4042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
405
406 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
407 and "~".
408 (macro): Update accordingly.
409
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4102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
411
412 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
413 (imm_reloc): Delete.
414 (md_assemble): Remove imm_reloc handling.
415 (mips_ip): Update commentary. Use offset_expr and offset_reloc
416 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
417 Use a temporary array rather than imm_reloc when parsing
418 constant expressions. Remove imm_reloc initialization.
419 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
420 for the relaxable field. Use a relax_char variable to track the
421 type of this field. Remove imm_reloc initialization.
422
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4232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
424
425 * config/tc-mips.c (mips16_ip): Handle "I".
426
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4272013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
428
429 * config/tc-mips.c (mips_flag_nan2008): New variable.
430 (options): Add OPTION_NAN enum value.
431 (md_longopts): Handle it.
432 (md_parse_option): Likewise.
433 (s_nan): New function.
434 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
435 (md_show_usage): Add -mnan.
436
437 * doc/as.texinfo (Overview): Add -mnan.
438 * doc/c-mips.texi (MIPS Opts): Document -mnan.
439 (MIPS NaN Encodings): New node. Document .nan directive.
440 (MIPS-Dependent): List the new node.
441
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4422013-07-09 Tristan Gingold <gingold@adacore.com>
443
444 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
445
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4462013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
447
448 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
449 for 'A' and assume that the constant has been elided if the result
450 is an O_register.
451
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4522013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
453
454 * config/tc-mips.c (gprel16_reloc_p): New function.
455 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
456 BFD_RELOC_UNUSED.
457 (offset_high_part, small_offset_p): New functions.
458 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
459 register load and store macros, handle the 16-bit offset case first.
460 If a 16-bit offset is not suitable for the instruction we're
461 generating, load it into the temporary register using
462 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
463 M_L_DAB code once the address has been constructed. For double load
464 and store macros, again handle the 16-bit offset case first.
465 If the second register cannot be accessed from the same high
466 part as the first, load it into AT using ADDRESS_ADDI_INSN.
467 Fix the handling of LD in cases where the first register is the
468 same as the base. Also handle the case where the offset is
469 not 16 bits and the second register cannot be accessed from the
470 same high part as the first. For unaligned loads and stores,
471 fuse the offbits == 12 and old "ab" handling. Apply this handling
472 whenever the second offset needs a different high part from the first.
473 Construct the offset using ADDRESS_ADDI_INSN where possible,
474 for offbits == 16 as well as offbits == 12. Use offset_reloc
475 when constructing the individual loads and stores.
476 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
477 and offset_reloc before matching against a particular opcode.
478 Handle elided 'A' constants. Allow 'A' constants to use
479 relocation operators.
480
5c324c16
RS
4812013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
482
483 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
484 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
485 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
486
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RS
4872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
488
489 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
490 Require the msb to be <= 31 for "+s". Check that the size is <= 31
491 for both "+s" and "+S".
492
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RS
4932013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
494
495 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
496 (mips_ip, mips16_ip): Handle "+i".
497
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RS
4982013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
499
500 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
501 (micromips_to_32_reg_h_map): Rename to...
502 (micromips_to_32_reg_h_map1): ...this.
503 (micromips_to_32_reg_i_map): Rename to...
504 (micromips_to_32_reg_h_map2): ...this.
505 (mips_lookup_reg_pair): New function.
506 (gpr_write_mask, macro): Adjust after above renaming.
507 (validate_micromips_insn): Remove "mi" handling.
508 (mips_ip): Likewise. Parse both registers in a pair for "mh".
509
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RS
5102013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
511
512 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
513 (mips_ip): Remove "+D" and "+T" handling.
514
fb798c50
AK
5152013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
516
517 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
518 relocs.
519
2c0a3565
MS
5202013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
521
4aa2c5e2
MS
522 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
523
5242013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
525
2c0a3565
MS
526 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
527 (aarch64_force_relocation): Likewise.
528
f40da81b
AM
5292013-07-02 Alan Modra <amodra@gmail.com>
530
531 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
532
81566a9b
MR
5332013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
534
535 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
536 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
537 Replace @sc{mips16} with literal `MIPS16'.
538 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
539
a6bb11b2
YZ
5402013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
541
542 * config/tc-aarch64.c (reloc_table): Replace
543 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
544 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
545 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
546 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
547 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
548 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
549 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
550 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
551 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
552 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
553 (aarch64_force_relocation): Likewise.
554
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YZ
5552013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
556
557 * config/tc-aarch64.c (ilp32_p): New static variable.
558 (elf64_aarch64_target_format): Return the target according to the
559 value of 'ilp32_p'.
560 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
561 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
562 (aarch64_dwarf2_addr_size): New function.
563 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
564 (DWARF2_ADDR_SIZE): New define.
565
e335d9cb
RS
5662013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
567
568 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
569
18870af7
RS
5702013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
571
572 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
573
833794fc
MR
5742013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
575
576 * config/tc-mips.c (mips_set_options): Add insn32 member.
577 (mips_opts): Initialize it.
578 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
579 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
580 (md_longopts): Add "minsn32" and "mno-insn32" options.
581 (is_size_valid): Handle insn32 mode.
582 (md_assemble): Pass instruction string down to macro.
583 (brk_fmt): Add second dimension and insn32 mode initializers.
584 (mfhl_fmt): Likewise.
585 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
586 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
587 (macro_build_jalr, move_register): Handle insn32 mode.
588 (macro_build_branch_rs): Likewise.
589 (macro): Handle insn32 mode.
590 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
591 (mips_ip): Handle insn32 mode.
592 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
593 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
594 (mips_handle_align): Handle insn32 mode.
595 (md_show_usage): Add -minsn32 and -mno-insn32.
596
597 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
598 -mno-insn32 options.
599 (-minsn32, -mno-insn32): New options.
600 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
601 options.
602 (MIPS assembly options): New node. Document .set insn32 and
603 .set noinsn32.
604 (MIPS-Dependent): List the new node.
605
d1706f38
NC
6062013-06-25 Nick Clifton <nickc@redhat.com>
607
608 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
609 the PC in indirect addressing on 430xv2 parts.
610 (msp430_operands): Add version test to hardware bug encoding
611 restrictions.
612
477330fc
RM
6132013-06-24 Roland McGrath <mcgrathr@google.com>
614
d996d970
RM
615 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
616 so it skips whitespace before it.
617 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
618
477330fc
RM
619 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
620 (arm_reg_parse_multi): Skip whitespace first.
621 (parse_reg_list): Likewise.
622 (parse_vfp_reg_list): Likewise.
623 (s_arm_unwind_save_mmxwcg): Likewise.
624
24382199
NC
6252013-06-24 Nick Clifton <nickc@redhat.com>
626
627 PR gas/15623
628 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
629
c3678916
RS
6302013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
631
632 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
633
42429eac
RS
6342013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
635
636 * config/tc-mips.c: Assert that offsetT and valueT are at least
637 8 bytes in size.
638 (GPR_SMIN, GPR_SMAX): New macros.
639 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
640
f3ded42a
RS
6412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
642
643 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
644 conditions. Remove any code deselected by them.
645 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
646
e8044f35
RS
6472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
648
649 * NEWS: Note removal of ECOFF support.
650 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
651 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
652 (MULTI_CFILES): Remove config/e-mipsecoff.c.
653 * Makefile.in: Regenerate.
654 * configure.in: Remove MIPS ECOFF references.
655 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
656 Delete cases.
657 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
658 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
659 (mips-*-*): ...this single case.
660 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
661 MIPS emulations to be e-mipself*.
662 * configure: Regenerate.
663 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
664 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
665 (mips-*-sysv*): Remove coff and ecoff cases.
666 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
667 * ecoff.c: Remove reference to MIPS ECOFF.
668 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
669 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
670 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
671 (mips_hi_fixup): Tweak comment.
672 (append_insn): Require a howto.
673 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
674
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RS
6752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
676
677 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
678 Use "CPU" instead of "cpu".
679 * doc/c-mips.texi: Likewise.
680 (MIPS Opts): Rename to MIPS Options.
681 (MIPS option stack): Rename to MIPS Option Stack.
682 (MIPS ASE instruction generation overrides): Rename to
683 MIPS ASE Instruction Generation Overrides (for now).
684 (MIPS floating-point): Rename to MIPS Floating-Point.
685
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RS
6862013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
687
688 * doc/c-mips.texi (MIPS Macros): New section.
689 (MIPS Object): Replace with...
690 (MIPS Small Data): ...this new section.
691
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RS
6922013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
693
694 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
695 Capitalize name. Use @kindex instead of @cindex for .set entries.
696
a1b86ab7
RS
6972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
698
699 * doc/c-mips.texi (MIPS Stabs): Remove section.
700
c6278170
RS
7012013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
702
703 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
704 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
705 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
706 (ISA_SUPPORTS_VIRT64_ASE): Delete.
707 (mips_ase): New structure.
708 (mips_ases): New table.
709 (FP64_ASES): New macro.
710 (mips_ase_groups): New array.
711 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
712 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
713 functions.
714 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
715 (md_parse_option): Use mips_ases and mips_set_ase instead of
716 separate case statements for each ASE option.
717 (mips_after_parse_args): Use FP64_ASES. Use
718 mips_check_isa_supports_ases to check the ASEs against
719 other options.
720 (s_mipsset): Use mips_ases and mips_set_ase instead of
721 separate if statements for each ASE option. Use
722 mips_check_isa_supports_ases, even when a non-ASE option
723 is specified.
724
63a4bc21
KT
7252013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
726
727 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
728
c31f3936
RS
7292013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
730
731 * config/tc-mips.c (md_shortopts, options, md_longopts)
732 (md_longopts_size): Move earlier in file.
733
846ef2d0
RS
7342013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
735
736 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
737 with a single "ase" bitmask.
738 (mips_opts): Update accordingly.
739 (file_ase, file_ase_explicit): New variables.
740 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
741 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
742 (ISA_HAS_ROR): Adjust for mips_set_options change.
743 (is_opcode_valid): Take the base ase mask directly from mips_opts.
744 (mips_ip): Adjust for mips_set_options change.
745 (md_parse_option): Likewise. Update file_ase_explicit.
746 (mips_after_parse_args): Adjust for mips_set_options change.
747 Use bitmask operations to select the default ASEs. Set file_ase
748 rather than individual per-ASE variables.
749 (s_mipsset): Adjust for mips_set_options change.
750 (mips_elf_final_processing): Test file_ase rather than
751 file_ase_mdmx. Remove commented-out code.
752
d16afab6
RS
7532013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
754
755 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
756 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
757 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
758 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
759 (mips_after_parse_args): Use the new "ase" field to choose
760 the default ASEs.
761 (mips_cpu_info_table): Move ASEs from the "flags" field to the
762 "ase" field.
763
e83a675f
RE
7642013-06-18 Richard Earnshaw <rearnsha@arm.com>
765
766 * config/tc-arm.c (symbol_preemptible): New function.
767 (relax_branch): Use it.
768
7f3c4072
CM
7692013-06-17 Catherine Moore <clm@codesourcery.com>
770 Maciej W. Rozycki <macro@codesourcery.com>
771 Chao-Ying Fu <fu@mips.com>
772
773 * config/tc-mips.c (mips_set_options): Add ase_eva.
774 (mips_set_options mips_opts): Add ase_eva.
775 (file_ase_eva): Declare.
776 (ISA_SUPPORTS_EVA_ASE): Define.
777 (IS_SEXT_9BIT_NUM): Define.
778 (MIPS_CPU_ASE_EVA): Define.
779 (is_opcode_valid): Add support for ase_eva.
780 (macro_build): Likewise.
781 (macro): Likewise.
782 (validate_mips_insn): Likewise.
783 (validate_micromips_insn): Likewise.
784 (mips_ip): Likewise.
785 (options): Add OPTION_EVA and OPTION_NO_EVA.
786 (md_longopts): Add -meva and -mno-eva.
787 (md_parse_option): Process new options.
788 (mips_after_parse_args): Check for valid EVA combinations.
789 (s_mipsset): Likewise.
790
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RS
7912013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
792
793 * dwarf2dbg.h (dwarf2_move_insn): Declare.
794 * dwarf2dbg.c (line_subseg): Add pmove_tail.
795 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
796 (dwarf2_gen_line_info_1): Update call accordingly.
797 (dwarf2_move_insn): New function.
798 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
799
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RS
8002013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
801
802 Revert:
803
804 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
805
806 PR gas/13024
807 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
808 (dwarf2_gen_line_info_1): Delete.
809 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
810 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
811 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
812 (dwarf2_directive_loc): Push previous .locs instead of generating
813 them immediately.
814
f122319e
CF
8152013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
816
817 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
818 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
819
909c7f9c
NC
8202013-06-13 Nick Clifton <nickc@redhat.com>
821
822 PR gas/15602
823 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
824 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
825 function. Generates an error if the adjusted offset is out of a
826 16-bit range.
827
5d5755a7
SL
8282013-06-12 Sandra Loosemore <sandra@codesourcery.com>
829
830 * config/tc-nios2.c (md_apply_fix): Mask constant
831 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
832
3bf0dbfb
MR
8332013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
834
835 * config/tc-mips.c (append_insn): Don't do branch relaxation for
836 MIPS-3D instructions either.
837 (md_convert_frag): Update the COPx branch mask accordingly.
838
839 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
840 option.
841 * doc/as.texinfo (Overview): Add --relax-branch and
842 --no-relax-branch.
843 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
844 --no-relax-branch.
845
9daf7bab
SL
8462013-06-09 Sandra Loosemore <sandra@codesourcery.com>
847
848 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
849 omitted.
850
d301a56b
RS
8512013-06-08 Catherine Moore <clm@codesourcery.com>
852
853 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
854 (is_opcode_valid_16): Pass ase value to opcode_is_member.
855 (append_insn): Change INSN_xxxx to ASE_xxxx.
856
7bab7634
DC
8572013-06-01 George Thomas <george.thomas@atmel.com>
858
cbe02d4f 859 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
860 AVR_ISA_XMEGAU
861
f60cf82f
L
8622013-05-31 H.J. Lu <hongjiu.lu@intel.com>
863
864 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
865 for ELF.
866
a3f278e2
CM
8672013-05-31 Paul Brook <paul@codesourcery.com>
868
a3f278e2
CM
869 * config/tc-mips.c (s_ehword): New.
870
067ec077
CM
8712013-05-30 Paul Brook <paul@codesourcery.com>
872
873 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
874
d6101ac2
MR
8752013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
876
877 * write.c (resolve_reloc_expr_symbols): On REL targets don't
878 convert relocs who have no relocatable field either. Rephrase
879 the conditional so that the PC-relative check is only applied
880 for REL targets.
881
f19ccbda
MR
8822013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
883
884 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
885 calculation.
886
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YZ
8872013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
888
889 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 890 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
891 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
892 (md_apply_fix): Likewise.
893 (aarch64_force_relocation): Likewise.
894
0a8897c7
KT
8952013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
896
897 * config/tc-arm.c (it_fsm_post_encode): Improve
898 warning messages about deprecated IT block formats.
899
89d2a2a3
MS
9002013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
901
902 * config/tc-aarch64.c (md_apply_fix): Move value range checking
903 inside fx_done condition.
904
c77c0862
RS
9052013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
906
907 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
908
c0637f3a
PB
9092013-05-20 Peter Bergner <bergner@vnet.ibm.com>
910
911 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
912 and clean up warning when using PRINT_OPCODE_TABLE.
913
5656a981
AM
9142013-05-20 Alan Modra <amodra@gmail.com>
915
916 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
917 and data fixups performing shift/high adjust/sign extension on
918 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
919 when writing data fixups rather than recalculating size.
920
997b26e8
JBG
9212013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
922
923 * doc/c-msp430.texi: Fix typo.
924
9f6e76f4
TG
9252013-05-16 Tristan Gingold <gingold@adacore.com>
926
927 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
928 are also TOC symbols.
929
638d3803
NC
9302013-05-16 Nick Clifton <nickc@redhat.com>
931
932 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
933 Add -mcpu command to specify core type.
997b26e8 934 * doc/c-msp430.texi: Update documentation.
638d3803 935
b015e599
AP
9362013-05-09 Andrew Pinski <apinski@cavium.com>
937
938 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
939 (mips_opts): Update for the new field.
940 (file_ase_virt): New variable.
941 (ISA_SUPPORTS_VIRT_ASE): New macro.
942 (ISA_SUPPORTS_VIRT64_ASE): New macro.
943 (MIPS_CPU_ASE_VIRT): New define.
944 (is_opcode_valid): Handle ase_virt.
945 (macro_build): Handle "+J".
946 (validate_mips_insn): Likewise.
947 (mips_ip): Likewise.
948 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
949 (md_longopts): Add mvirt and mnovirt
950 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
951 (mips_after_parse_args): Handle ase_virt field.
952 (s_mipsset): Handle "virt" and "novirt".
953 (mips_elf_final_processing): Add a comment about virt ASE might need
954 a new flag.
955 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
956 * doc/c-mips.texi: Document -mvirt and -mno-virt.
957 Document ".set virt" and ".set novirt".
958
da8094d7
AM
9592013-05-09 Alan Modra <amodra@gmail.com>
960
961 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
962 control of operand flag bits.
963
c5f8c205
AM
9642013-05-07 Alan Modra <amodra@gmail.com>
965
966 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
967 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
968 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
969 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
970 (md_apply_fix): Set fx_no_overflow for assorted relocations.
971 Shift and sign-extend fieldval for use by some VLE reloc
972 operand->insert functions.
973
b47468a6
CM
9742013-05-06 Paul Brook <paul@codesourcery.com>
975 Catherine Moore <clm@codesourcery.com>
976
c5f8c205
AM
977 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
978 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
979 (md_apply_fix): Likewise.
980 (tc_gen_reloc): Likewise.
981
2de39019
CM
9822013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
983
984 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
985 (mips_fix_adjustable): Adjust pc-relative check to use
986 limited_pc_reloc_p.
987
754e2bb9
RS
9882013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
989
990 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
991 (s_mips_stab): Do not restrict to stabn only.
992
13761a11
NC
9932013-05-02 Nick Clifton <nickc@redhat.com>
994
995 * config/tc-msp430.c: Add support for the MSP430X architecture.
996 Add code to insert a NOP instruction after any instruction that
997 might change the interrupt state.
998 Add support for the LARGE memory model.
999 Add code to initialise the .MSP430.attributes section.
1000 * config/tc-msp430.h: Add support for the MSP430X architecture.
1001 * doc/c-msp430.texi: Document the new -mL and -mN command line
1002 options.
1003 * NEWS: Mention support for the MSP430X architecture.
1004
df26367c
MR
10052013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1006
1007 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1008 alpha*-*-linux*ecoff*.
1009
f02d8318
CF
10102013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1011
1012 * config/tc-mips.c (mips_ip): Add sizelo.
1013 For "+C", "+G", and "+H", set sizelo and compare against it.
1014
b40bf0a2
NC
10152013-04-29 Nick Clifton <nickc@redhat.com>
1016
1017 * as.c (Options): Add -gdwarf-sections.
1018 (parse_args): Likewise.
1019 * as.h (flag_dwarf_sections): Declare.
1020 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1021 (process_entries): When -gdwarf-sections is enabled generate
1022 fragmentary .debug_line sections.
1023 (out_debug_line): Set the section for the .debug_line section end
1024 symbol.
1025 * doc/as.texinfo: Document -gdwarf-sections.
1026 * NEWS: Mention -gdwarf-sections.
1027
8eeccb77 10282013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1029
1030 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1031 according to the target parameter. Don't call s_segm since s_segm
1032 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1033 initialized yet.
1034 (md_begin): Call s_segm according to target parameter from command
1035 line.
1036
49926cd0
AM
10372013-04-25 Alan Modra <amodra@gmail.com>
1038
1039 * configure.in: Allow little-endian linux.
1040 * configure: Regenerate.
1041
e3031850
SL
10422013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1043
1044 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1045 "fstatus" control register to "eccinj".
1046
cb948fc0
KT
10472013-04-19 Kai Tietz <ktietz@redhat.com>
1048
1049 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1050
4455e9ad
JB
10512013-04-15 Julian Brown <julian@codesourcery.com>
1052
1053 * expr.c (add_to_result, subtract_from_result): Make global.
1054 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1055 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1056 subtract_from_result to handle extra bit of precision for .sleb128
1057 directive operands.
1058
956a6ba3
JB
10592013-04-10 Julian Brown <julian@codesourcery.com>
1060
1061 * read.c (convert_to_bignum): Add sign parameter. Use it
1062 instead of X_unsigned to determine sign of resulting bignum.
1063 (emit_expr): Pass extra argument to convert_to_bignum.
1064 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1065 X_extrabit to convert_to_bignum.
1066 (parse_bitfield_cons): Set X_extrabit.
1067 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1068 Initialise X_extrabit field as appropriate.
1069 (add_to_result): New.
1070 (subtract_from_result): New.
1071 (expr): Use above.
1072 * expr.h (expressionS): Add X_extrabit field.
1073
eb9f3f00
JB
10742013-04-10 Jan Beulich <jbeulich@suse.com>
1075
1076 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1077 register being PC when is_t or writeback, and use distinct
1078 diagnostic for the latter case.
1079
ccb84d65
JB
10802013-04-10 Jan Beulich <jbeulich@suse.com>
1081
1082 * gas/config/tc-arm.c (parse_operands): Re-write
1083 po_barrier_or_imm().
1084 (do_barrier): Remove bogus constraint().
1085 (do_t_barrier): Remove.
1086
4d13caa0
NC
10872013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1088
1089 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1090 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1091 ATmega2564RFR2
1092 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1093
16d02dc9
JB
10942013-04-09 Jan Beulich <jbeulich@suse.com>
1095
1096 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1097 Use local variable Rt in more places.
1098 (do_vmsr): Accept all control registers.
1099
05ac0ffb
JB
11002013-04-09 Jan Beulich <jbeulich@suse.com>
1101
1102 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1103 if there was none specified for moves between scalar and core
1104 register.
1105
2d51fb74
JB
11062013-04-09 Jan Beulich <jbeulich@suse.com>
1107
1108 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1109 NEON_ALL_LANES case.
1110
94dcf8bf
JB
11112013-04-08 Jan Beulich <jbeulich@suse.com>
1112
1113 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1114 PC-relative VSTR.
1115
1472d06f
JB
11162013-04-08 Jan Beulich <jbeulich@suse.com>
1117
1118 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1119 entry to sp_fiq.
1120
0c76cae8
AM
11212013-04-03 Alan Modra <amodra@gmail.com>
1122
1123 * doc/as.texinfo: Add support to generate man options for h8300.
1124 * doc/c-h8300.texi: Likewise.
1125
92eb40d9
RR
11262013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1127
1128 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1129 Cortex-A57.
1130
51dcdd4d
NC
11312013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1132
1133 PR binutils/15068
1134 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1135
c5d685bf
NC
11362013-03-26 Nick Clifton <nickc@redhat.com>
1137
9b978282
NC
1138 PR gas/15295
1139 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1140 start of the file each time.
1141
c5d685bf
NC
1142 PR gas/15178
1143 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1144 FreeBSD targets.
1145
9699c833
TG
11462013-03-26 Douglas B Rupp <rupp@gnat.com>
1147
1148 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1149 after fixup.
1150
4755303e
WN
11512013-03-21 Will Newton <will.newton@linaro.org>
1152
1153 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1154 pc-relative str instructions in Thumb mode.
1155
81f5558e
NC
11562013-03-21 Michael Schewe <michael.schewe@gmx.net>
1157
1158 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1159 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1160 R_H8_DISP32A16.
1161 * config/tc-h8300.h: Remove duplicated defines.
1162
71863e73
NC
11632013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1164
1165 PR gas/15282
1166 * tc-avr.c (mcu_has_3_byte_pc): New function.
1167 (tc_cfi_frame_initial_instructions): Call it to find return
1168 address size.
1169
795b8e6b
NC
11702013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1171
1172 PR gas/15095
1173 * config/tc-tic6x.c (tic6x_try_encode): Handle
1174 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1175 encode register pair numbers when required.
1176
ba86b375
WN
11772013-03-15 Will Newton <will.newton@linaro.org>
1178
1179 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1180 in vstr in Thumb mode for pre-ARMv7 cores.
1181
9e6f3811
AS
11822013-03-14 Andreas Schwab <schwab@suse.de>
1183
1184 * doc/c-arc.texi (ARC Directives): Revert last change and use
1185 @itemize instead of @table.
1186 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1187
b10bf8c5
NC
11882013-03-14 Nick Clifton <nickc@redhat.com>
1189
1190 PR gas/15273
1191 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1192 NULL message, instead just check ARM_CPU_IS_ANY directly.
1193
ba724cfc
NC
11942013-03-14 Nick Clifton <nickc@redhat.com>
1195
1196 PR gas/15212
9e6f3811 1197 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1198 for table format.
1199 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1200 to the @item directives.
1201 (ARM-Neon-Alignment): Move to correct place in the document.
1202 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1203 formatting.
1204 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1205 @smallexample.
1206
531a94fd
SL
12072013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1208
1209 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1210 case. Add default BAD_CASE to switch.
1211
dad60f8e
SL
12122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1213
1214 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1215 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1216
dd5181d5
KT
12172013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1218
1219 * config/tc-arm.c (crc_ext_armv8): New feature set.
1220 (UNPRED_REG): New macro.
1221 (do_crc32_1): New function.
1222 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1223 do_crc32ch, do_crc32cw): Likewise.
1224 (TUEc): New macro.
1225 (insns): Add entries for crc32 mnemonics.
1226 (arm_extensions): Add entry for crc.
1227
8e723a10
CLT
12282013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1229
1230 * write.h (struct fix): Add fx_dot_frag field.
1231 (dot_frag): Declare.
1232 * write.c (dot_frag): New variable.
1233 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1234 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1235 * expr.c (expr): Save value of frag_now in dot_frag when setting
1236 dot_value.
1237 * read.c (emit_expr): Likewise. Delete comments.
1238
be05d201
L
12392013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1240
1241 * config/tc-i386.c (flag_code_names): Removed.
1242 (i386_index_check): Rewrote.
1243
62b0d0d5
YZ
12442013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1245
1246 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1247 add comment.
1248 (aarch64_double_precision_fmovable): New function.
1249 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1250 function; handle hexadecimal representation of IEEE754 encoding.
1251 (parse_operands): Update the call to parse_aarch64_imm_float.
1252
165de32a
L
12532013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1254
1255 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1256 (check_hle): Updated.
1257 (md_assemble): Likewise.
1258 (parse_insn): Likewise.
1259
d5de92cf
L
12602013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1261
1262 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1263 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1264 (parse_insn): Remove expecting_string_instruction. Set
1265 i.rep_prefix.
1266
e60bb1dd
YZ
12672013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1268
1269 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1270
aeebdd9b
YZ
12712013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1272
1273 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1274 for system registers.
1275
4107ae22
DD
12762013-02-27 DJ Delorie <dj@redhat.com>
1277
1278 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1279 (rl78_op): Handle %code().
1280 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1281 (tc_gen_reloc): Likwise; convert to a computed reloc.
1282 (md_apply_fix): Likewise.
1283
151fa98f
NC
12842013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1285
1286 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1287
70a8bc5b 12882013-02-25 Terry Guo <terry.guo@arm.com>
1289
1290 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1291 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1292 list of accepted CPUs.
1293
5c111e37
L
12942013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1295
1296 PR gas/15159
1297 * config/tc-i386.c (cpu_arch): Add ".smap".
1298
1299 * doc/c-i386.texi: Document smap.
1300
8a75745d
MR
13012013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1302
1303 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1304 mips_assembling_insn appropriately.
1305 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1306
79850f26
MR
13072013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1308
cf29fc61 1309 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1310 extraneous braces.
1311
4c261dff
NC
13122013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1313
5c111e37 1314 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1315
ea33f281
NC
13162013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1317
1318 * configure.tgt: Add nios2-*-rtems*.
1319
a1ccaec9
YZ
13202013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1321
1322 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1323 NULL.
1324
0aa27725
RS
13252013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1326
1327 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1328 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1329
da4339ed
NC
13302013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1331
1332 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1333 core.
1334
36591ba1 13352013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1336 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1337
1338 Based on patches from Altera Corporation.
1339
1340 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1341 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1342 * Makefile.in: Regenerated.
1343 * configure.tgt: Add case for nios2*-linux*.
1344 * config/obj-elf.c: Conditionally include elf/nios2.h.
1345 * config/tc-nios2.c: New file.
1346 * config/tc-nios2.h: New file.
1347 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1348 * doc/Makefile.in: Regenerated.
1349 * doc/all.texi: Set NIOSII.
1350 * doc/as.texinfo (Overview): Add Nios II options.
1351 (Machine Dependencies): Include c-nios2.texi.
1352 * doc/c-nios2.texi: New file.
1353 * NEWS: Note Altera Nios II support.
1354
94d4433a
AM
13552013-02-06 Alan Modra <amodra@gmail.com>
1356
1357 PR gas/14255
1358 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1359 Don't skip fixups with fx_subsy non-NULL.
1360 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1361 with fx_subsy non-NULL.
1362
ace9af6f
L
13632013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1364
1365 * doc/c-metag.texi: Add "@c man" markers.
1366
89d67ed9
AM
13672013-02-04 Alan Modra <amodra@gmail.com>
1368
1369 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1370 related code.
1371 (TC_ADJUST_RELOC_COUNT): Delete.
1372 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1373
89072bd6
AM
13742013-02-04 Alan Modra <amodra@gmail.com>
1375
1376 * po/POTFILES.in: Regenerate.
1377
f9b2d544
NC
13782013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1379
1380 * config/tc-metag.c: Make SWAP instruction less permissive with
1381 its operands.
1382
392ca752
DD
13832013-01-29 DJ Delorie <dj@redhat.com>
1384
1385 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1386 relocs in .word/.etc statements.
1387
427d0db6
RM
13882013-01-29 Roland McGrath <mcgrathr@google.com>
1389
1390 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1391 immediate value for 8-bit offset" error so it shows line info.
1392
4faf939a
JM
13932013-01-24 Joseph Myers <joseph@codesourcery.com>
1394
1395 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1396 for 64-bit output.
1397
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NC
13982013-01-24 Nick Clifton <nickc@redhat.com>
1399
1400 * config/tc-v850.c: Add support for e3v5 architecture.
1401 * doc/c-v850.texi: Mention new support.
1402
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NC
14032013-01-23 Nick Clifton <nickc@redhat.com>
1404
1405 PR gas/15039
1406 * config/tc-avr.c: Include dwarf2dbg.h.
1407
8ce3d284
L
14082013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1409
1410 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1411 (tc_i386_fix_adjustable): Likewise.
1412 (lex_got): Likewise.
1413 (tc_gen_reloc): Likewise.
1414
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YZ
14152013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1416
1417 * config/tc-aarch64.c (output_operand_error_record): Change to output
1418 the out-of-range error message as value-expected message if there is
1419 only one single value in the expected range.
1420 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1421 LSL #0 as a programmer-friendly feature.
1422
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14232013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1424
1425 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1426 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1427 BFD_RELOC_64_SIZE relocations.
1428 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1429 for it.
1430 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1431 relocations against local symbols.
1432
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AM
14332013-01-16 Alan Modra <amodra@gmail.com>
1434
1435 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1436 finding some sort of toc syntax error, and break to avoid
1437 compiler uninit warning.
1438
af89796a
L
14392013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1440
1441 PR gas/15019
1442 * config/tc-i386.c (lex_got): Increment length by 1 if the
1443 relocation token is removed.
1444
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NC
14452013-01-15 Nick Clifton <nickc@redhat.com>
1446
1447 * config/tc-v850.c (md_assemble): Allow signed values for
1448 V850E_IMMEDIATE.
1449
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SK
14502013-01-11 Sean Keys <skeys@ipdatasys.com>
1451
1452 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1453 git to cvs.
464e3686 1454
5817ffd1
PB
14552013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1456
1457 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1458 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1459 * config/tc-ppc.c (md_show_usage): Likewise.
1460 (ppc_handle_align): Handle power8's group ending nop.
1461
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SK
14622013-01-10 Sean Keys <skeys@ipdatasys.com>
1463
1464 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1465 that the assember exits after the opcodes have been printed.
f4b1f6a9 1466
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14672013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1468
1469 * app.c: Remove trailing white spaces.
1470 * as.c: Likewise.
1471 * as.h: Likewise.
1472 * cond.c: Likewise.
1473 * dw2gencfi.c: Likewise.
1474 * dwarf2dbg.h: Likewise.
1475 * ecoff.c: Likewise.
1476 * input-file.c: Likewise.
1477 * itbl-lex.h: Likewise.
1478 * output-file.c: Likewise.
1479 * read.c: Likewise.
1480 * sb.c: Likewise.
1481 * subsegs.c: Likewise.
1482 * symbols.c: Likewise.
1483 * write.c: Likewise.
1484 * config/tc-i386.c: Likewise.
1485 * doc/Makefile.am: Likewise.
1486 * doc/Makefile.in: Likewise.
1487 * doc/c-aarch64.texi: Likewise.
1488 * doc/c-alpha.texi: Likewise.
1489 * doc/c-arc.texi: Likewise.
1490 * doc/c-arm.texi: Likewise.
1491 * doc/c-avr.texi: Likewise.
1492 * doc/c-bfin.texi: Likewise.
1493 * doc/c-cr16.texi: Likewise.
1494 * doc/c-d10v.texi: Likewise.
1495 * doc/c-d30v.texi: Likewise.
1496 * doc/c-h8300.texi: Likewise.
1497 * doc/c-hppa.texi: Likewise.
1498 * doc/c-i370.texi: Likewise.
1499 * doc/c-i386.texi: Likewise.
1500 * doc/c-i860.texi: Likewise.
1501 * doc/c-m32c.texi: Likewise.
1502 * doc/c-m32r.texi: Likewise.
1503 * doc/c-m68hc11.texi: Likewise.
1504 * doc/c-m68k.texi: Likewise.
1505 * doc/c-microblaze.texi: Likewise.
1506 * doc/c-mips.texi: Likewise.
1507 * doc/c-msp430.texi: Likewise.
1508 * doc/c-mt.texi: Likewise.
1509 * doc/c-s390.texi: Likewise.
1510 * doc/c-score.texi: Likewise.
1511 * doc/c-sh.texi: Likewise.
1512 * doc/c-sh64.texi: Likewise.
1513 * doc/c-tic54x.texi: Likewise.
1514 * doc/c-tic6x.texi: Likewise.
1515 * doc/c-v850.texi: Likewise.
1516 * doc/c-xc16x.texi: Likewise.
1517 * doc/c-xgate.texi: Likewise.
1518 * doc/c-xtensa.texi: Likewise.
1519 * doc/c-z80.texi: Likewise.
1520 * doc/internals.texi: Likewise.
1521
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RM
15222013-01-10 Roland McGrath <mcgrathr@google.com>
1523
1524 * hash.c (hash_new_sized): Make it global.
1525 * hash.h: Declare it.
1526 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1527 pass a small size.
1528
a3c62988
NC
15292013-01-10 Will Newton <will.newton@imgtec.com>
1530
1531 * Makefile.am: Add Meta.
1532 * Makefile.in: Regenerate.
1533 * config/tc-metag.c: New file.
1534 * config/tc-metag.h: New file.
1535 * configure.tgt: Add Meta.
1536 * doc/Makefile.am: Add Meta.
1537 * doc/Makefile.in: Regenerate.
1538 * doc/all.texi: Add Meta.
1539 * doc/as.texiinfo: Document Meta options.
1540 * doc/c-metag.texi: New file.
1541
b37df7c4
SE
15422013-01-09 Steve Ellcey <sellcey@mips.com>
1543
1544 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1545 calls.
1546 * config/tc-mips.c (internalError): Remove, replace with abort.
1547
a3251895
YZ
15482013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1549
1550 * config/tc-aarch64.c (parse_operands): Change to compare the result
1551 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1552
8ab8155f
NC
15532013-01-07 Nick Clifton <nickc@redhat.com>
1554
1555 PR gas/14887
1556 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1557 anticipated character.
1558 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1559 here as it is no longer needed.
1560
a4ac1c42
AS
15612013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1562
1563 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1564 * doc/c-score.texi (SCORE-Opts): Likewise.
1565 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1566
e407c74b
NC
15672013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1568
1569 * config/tc-mips.c: Add support for MIPS r5900.
1570 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1571 lq and sq.
1572 (can_swap_branch_p, get_append_method): Detect some conditional
1573 short loops to fix a bug on the r5900 by NOP in the branch delay
1574 slot.
1575 (M_MUL): Support 3 operands in multu on r5900.
1576 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1577 (s_mipsset): Force 32 bit floating point on r5900.
1578 (mips_ip): Check parameter range of instructions mfps and mtps on
1579 r5900.
1580 * configure.in: Detect CPU type when target string contains r5900
1581 (e.g. mips64r5900el-linux-gnu).
1582
62658407
L
15832013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1584
1585 * as.c (parse_args): Update copyright year to 2013.
1586
95830fd1
YZ
15872013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1588
1589 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1590 and "cortex57".
1591
517bb291 15922013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1593
517bb291
NC
1594 PR gas/14987
1595 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1596 closing bracket.
d709e4e6 1597
517bb291 1598For older changes see ChangeLog-2012
08d56133 1599\f
517bb291 1600Copyright (C) 2013 Free Software Foundation, Inc.
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1601
1602Copying and distribution of this file, with or without modification,
1603are permitted in any medium without royalty provided the copyright
1604notice and this notice are preserved.
1605
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1606Local Variables:
1607mode: change-log
1608left-margin: 8
1609fill-column: 74
1610version-control: never
1611End: