]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
cec5225b
YZ		 12013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
2
3 * config/tc-aarch64.c (ilp32_p): New static variable.
4 (elf64_aarch64_target_format): Return the target according to the
5 value of 'ilp32_p'.
6 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
7 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
8 (aarch64_dwarf2_addr_size): New function.
9 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
10 (DWARF2_ADDR_SIZE): New define.
11
e335d9cb
RS		 122013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
13
14 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
15
18870af7
RS		 162013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
17
18 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
19
833794fc
MR		 202013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
21
22 * config/tc-mips.c (mips_set_options): Add insn32 member.
23 (mips_opts): Initialize it.
24 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
25 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
26 (md_longopts): Add "minsn32" and "mno-insn32" options.
27 (is_size_valid): Handle insn32 mode.
28 (md_assemble): Pass instruction string down to macro.
29 (brk_fmt): Add second dimension and insn32 mode initializers.
30 (mfhl_fmt): Likewise.
31 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
32 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
33 (macro_build_jalr, move_register): Handle insn32 mode.
34 (macro_build_branch_rs): Likewise.
35 (macro): Handle insn32 mode.
36 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
37 (mips_ip): Handle insn32 mode.
38 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
39 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
40 (mips_handle_align): Handle insn32 mode.
41 (md_show_usage): Add -minsn32 and -mno-insn32.
42
43 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
44 -mno-insn32 options.
45 (-minsn32, -mno-insn32): New options.
46 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
47 options.
48 (MIPS assembly options): New node. Document .set insn32 and
49 .set noinsn32.
50 (MIPS-Dependent): List the new node.
51
d1706f38
NC		 522013-06-25 Nick Clifton <nickc@redhat.com>
53
54 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
55 the PC in indirect addressing on 430xv2 parts.
56 (msp430_operands): Add version test to hardware bug encoding
57 restrictions.
58
477330fc
RM		 592013-06-24 Roland McGrath <mcgrathr@google.com>
60
d996d970
RM		 61 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
62 so it skips whitespace before it.
63 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
64
477330fc
RM		 65 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
66 (arm_reg_parse_multi): Skip whitespace first.
67 (parse_reg_list): Likewise.
68 (parse_vfp_reg_list): Likewise.
69 (s_arm_unwind_save_mmxwcg): Likewise.
70
24382199
NC		 712013-06-24 Nick Clifton <nickc@redhat.com>
72
73 PR gas/15623
74 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
75
c3678916
RS		 762013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
77
78 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
79
42429eac
RS		 802013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
81
82 * config/tc-mips.c: Assert that offsetT and valueT are at least
83 8 bytes in size.
84 (GPR_SMIN, GPR_SMAX): New macros.
85 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
86
f3ded42a
RS		 872013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
88
89 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
90 conditions. Remove any code deselected by them.
91 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
92
e8044f35
RS		 932013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
94
95 * NEWS: Note removal of ECOFF support.
96 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
97 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
98 (MULTI_CFILES): Remove config/e-mipsecoff.c.
99 * Makefile.in: Regenerate.
100 * configure.in: Remove MIPS ECOFF references.
101 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
102 Delete cases.
103 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
104 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
105 (mips-*-*): ...this single case.
106 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
107 MIPS emulations to be e-mipself*.
108 * configure: Regenerate.
109 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
110 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
111 (mips-*-sysv*): Remove coff and ecoff cases.
112 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
113 * ecoff.c: Remove reference to MIPS ECOFF.
114 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
115 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
116 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
117 (mips_hi_fixup): Tweak comment.
118 (append_insn): Require a howto.
119 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
120
98508b2a
RS		 1212013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
122
123 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
124 Use "CPU" instead of "cpu".
125 * doc/c-mips.texi: Likewise.
126 (MIPS Opts): Rename to MIPS Options.
127 (MIPS option stack): Rename to MIPS Option Stack.
128 (MIPS ASE instruction generation overrides): Rename to
129 MIPS ASE Instruction Generation Overrides (for now).
130 (MIPS floating-point): Rename to MIPS Floating-Point.
131
fc16f8cc
RS		 1322013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * doc/c-mips.texi (MIPS Macros): New section.
135 (MIPS Object): Replace with...
136 (MIPS Small Data): ...this new section.
137
5a7560b5
RS		 1382013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
139
140 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
141 Capitalize name. Use @kindex instead of @cindex for .set entries.
142
a1b86ab7
RS		 1432013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
144
145 * doc/c-mips.texi (MIPS Stabs): Remove section.
146
c6278170
RS		 1472013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
150 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
151 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
152 (ISA_SUPPORTS_VIRT64_ASE): Delete.
153 (mips_ase): New structure.
154 (mips_ases): New table.
155 (FP64_ASES): New macro.
156 (mips_ase_groups): New array.
157 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
158 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
159 functions.
160 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
161 (md_parse_option): Use mips_ases and mips_set_ase instead of
162 separate case statements for each ASE option.
163 (mips_after_parse_args): Use FP64_ASES. Use
164 mips_check_isa_supports_ases to check the ASEs against
165 other options.
166 (s_mipsset): Use mips_ases and mips_set_ase instead of
167 separate if statements for each ASE option. Use
168 mips_check_isa_supports_ases, even when a non-ASE option
169 is specified.
170
63a4bc21
KT		 1712013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
172
173 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
174
c31f3936
RS		 1752013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
176
177 * config/tc-mips.c (md_shortopts, options, md_longopts)
178 (md_longopts_size): Move earlier in file.
179
846ef2d0
RS		 1802013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
181
182 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
183 with a single "ase" bitmask.
184 (mips_opts): Update accordingly.
185 (file_ase, file_ase_explicit): New variables.
186 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
187 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
188 (ISA_HAS_ROR): Adjust for mips_set_options change.
189 (is_opcode_valid): Take the base ase mask directly from mips_opts.
190 (mips_ip): Adjust for mips_set_options change.
191 (md_parse_option): Likewise. Update file_ase_explicit.
192 (mips_after_parse_args): Adjust for mips_set_options change.
193 Use bitmask operations to select the default ASEs. Set file_ase
194 rather than individual per-ASE variables.
195 (s_mipsset): Adjust for mips_set_options change.
196 (mips_elf_final_processing): Test file_ase rather than
197 file_ase_mdmx. Remove commented-out code.
198
d16afab6
RS		 1992013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
200
201 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
202 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
203 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
204 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
205 (mips_after_parse_args): Use the new "ase" field to choose
206 the default ASEs.
207 (mips_cpu_info_table): Move ASEs from the "flags" field to the
208 "ase" field.
209
e83a675f
RE		 2102013-06-18 Richard Earnshaw <rearnsha@arm.com>
211
212 * config/tc-arm.c (symbol_preemptible): New function.
213 (relax_branch): Use it.
214
7f3c4072
CM		 2152013-06-17 Catherine Moore <clm@codesourcery.com>
216 Maciej W. Rozycki <macro@codesourcery.com>
217 Chao-Ying Fu <fu@mips.com>
218
219 * config/tc-mips.c (mips_set_options): Add ase_eva.
220 (mips_set_options mips_opts): Add ase_eva.
221 (file_ase_eva): Declare.
222 (ISA_SUPPORTS_EVA_ASE): Define.
223 (IS_SEXT_9BIT_NUM): Define.
224 (MIPS_CPU_ASE_EVA): Define.
225 (is_opcode_valid): Add support for ase_eva.
226 (macro_build): Likewise.
227 (macro): Likewise.
228 (validate_mips_insn): Likewise.
229 (validate_micromips_insn): Likewise.
230 (mips_ip): Likewise.
231 (options): Add OPTION_EVA and OPTION_NO_EVA.
232 (md_longopts): Add -meva and -mno-eva.
233 (md_parse_option): Process new options.
234 (mips_after_parse_args): Check for valid EVA combinations.
235 (s_mipsset): Likewise.
236
e410add4
RS		 2372013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
238
239 * dwarf2dbg.h (dwarf2_move_insn): Declare.
240 * dwarf2dbg.c (line_subseg): Add pmove_tail.
241 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
242 (dwarf2_gen_line_info_1): Update call accordingly.
243 (dwarf2_move_insn): New function.
244 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
245
6a50d470
RS		 2462013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
247
248 Revert:
249
250 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
251
252 PR gas/13024
253 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
254 (dwarf2_gen_line_info_1): Delete.
255 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
256 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
257 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
258 (dwarf2_directive_loc): Push previous .locs instead of generating
259 them immediately.
260
f122319e
CF		 2612013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
262
263 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
264 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
265
909c7f9c
NC		 2662013-06-13 Nick Clifton <nickc@redhat.com>
267
268 PR gas/15602
269 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
270 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
271 function. Generates an error if the adjusted offset is out of a
272 16-bit range.
273
5d5755a7
SL		 2742013-06-12 Sandra Loosemore <sandra@codesourcery.com>
275
276 * config/tc-nios2.c (md_apply_fix): Mask constant
277 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
278
3bf0dbfb
MR		 2792013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
280
281 * config/tc-mips.c (append_insn): Don't do branch relaxation for
282 MIPS-3D instructions either.
283 (md_convert_frag): Update the COPx branch mask accordingly.
284
285 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
286 option.
287 * doc/as.texinfo (Overview): Add --relax-branch and
288 --no-relax-branch.
289 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
290 --no-relax-branch.
291
9daf7bab
SL		 2922013-06-09 Sandra Loosemore <sandra@codesourcery.com>
293
294 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
295 omitted.
296
d301a56b
RS		 2972013-06-08 Catherine Moore <clm@codesourcery.com>
298
299 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
300 (is_opcode_valid_16): Pass ase value to opcode_is_member.
301 (append_insn): Change INSN_xxxx to ASE_xxxx.
302
7bab7634
DC		 3032013-06-01 George Thomas <george.thomas@atmel.com>
304
305 * gas/config/tc-avr.c: Change ISA for devices with USB support to
306 AVR_ISA_XMEGAU
307
f60cf82f
L		 3082013-05-31 H.J. Lu <hongjiu.lu@intel.com>
309
310 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
311 for ELF.
312
a3f278e2
CM		 3132013-05-31 Paul Brook <paul@codesourcery.com>
314
315 gas/
316 * config/tc-mips.c (s_ehword): New.
317
067ec077
CM		 3182013-05-30 Paul Brook <paul@codesourcery.com>
319
320 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
321
d6101ac2
MR		 3222013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
323
324 * write.c (resolve_reloc_expr_symbols): On REL targets don't
325 convert relocs who have no relocatable field either. Rephrase
326 the conditional so that the PC-relative check is only applied
327 for REL targets.
328
f19ccbda
MR		 3292013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
330
331 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
332 calculation.
333
418009c2
YZ		 3342013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
335
336 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 337 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 338 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
339 (md_apply_fix): Likewise.
340 (aarch64_force_relocation): Likewise.
341
0a8897c7
KT		 3422013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
343
344 * config/tc-arm.c (it_fsm_post_encode): Improve
345 warning messages about deprecated IT block formats.
346
89d2a2a3
MS		 3472013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
348
349 * config/tc-aarch64.c (md_apply_fix): Move value range checking
350 inside fx_done condition.
351
c77c0862
RS		 3522013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
353
354 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
355
c0637f3a
PB		 3562013-05-20 Peter Bergner <bergner@vnet.ibm.com>
357
358 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
359 and clean up warning when using PRINT_OPCODE_TABLE.
360
5656a981
AM		 3612013-05-20 Alan Modra <amodra@gmail.com>
362
363 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
364 and data fixups performing shift/high adjust/sign extension on
365 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
366 when writing data fixups rather than recalculating size.
367
997b26e8
JBG		 3682013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
369
370 * doc/c-msp430.texi: Fix typo.
371
9f6e76f4
TG		 3722013-05-16 Tristan Gingold <gingold@adacore.com>
373
374 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
375 are also TOC symbols.
376
638d3803
NC		 3772013-05-16 Nick Clifton <nickc@redhat.com>
378
379 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
380 Add -mcpu command to specify core type.
997b26e8 381 * doc/c-msp430.texi: Update documentation.
638d3803 382
b015e599
AP		 3832013-05-09 Andrew Pinski <apinski@cavium.com>
384
385 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
386 (mips_opts): Update for the new field.
387 (file_ase_virt): New variable.
388 (ISA_SUPPORTS_VIRT_ASE): New macro.
389 (ISA_SUPPORTS_VIRT64_ASE): New macro.
390 (MIPS_CPU_ASE_VIRT): New define.
391 (is_opcode_valid): Handle ase_virt.
392 (macro_build): Handle "+J".
393 (validate_mips_insn): Likewise.
394 (mips_ip): Likewise.
395 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
396 (md_longopts): Add mvirt and mnovirt
397 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
398 (mips_after_parse_args): Handle ase_virt field.
399 (s_mipsset): Handle "virt" and "novirt".
400 (mips_elf_final_processing): Add a comment about virt ASE might need
401 a new flag.
402 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
403 * doc/c-mips.texi: Document -mvirt and -mno-virt.
404 Document ".set virt" and ".set novirt".
405
da8094d7
AM		 4062013-05-09 Alan Modra <amodra@gmail.com>
407
408 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
409 control of operand flag bits.
410
c5f8c205
AM		 4112013-05-07 Alan Modra <amodra@gmail.com>
412
413 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
414 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
415 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
416 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
417 (md_apply_fix): Set fx_no_overflow for assorted relocations.
418 Shift and sign-extend fieldval for use by some VLE reloc
419 operand->insert functions.
420
b47468a6
CM		 4212013-05-06 Paul Brook <paul@codesourcery.com>
422 Catherine Moore <clm@codesourcery.com>
423
c5f8c205
AM		 424 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
425 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 426 (md_apply_fix): Likewise.
427 (tc_gen_reloc): Likewise.
428
2de39019
CM		 4292013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
430
431 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
432 (mips_fix_adjustable): Adjust pc-relative check to use
433 limited_pc_reloc_p.
434
754e2bb9
RS		 4352013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
436
437 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
438 (s_mips_stab): Do not restrict to stabn only.
439
13761a11
NC		 4402013-05-02 Nick Clifton <nickc@redhat.com>
441
442 * config/tc-msp430.c: Add support for the MSP430X architecture.
443 Add code to insert a NOP instruction after any instruction that
444 might change the interrupt state.
445 Add support for the LARGE memory model.
446 Add code to initialise the .MSP430.attributes section.
447 * config/tc-msp430.h: Add support for the MSP430X architecture.
448 * doc/c-msp430.texi: Document the new -mL and -mN command line
449 options.
450 * NEWS: Mention support for the MSP430X architecture.
451
df26367c
MR		 4522013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
453
454 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
455 alpha*-*-linux*ecoff*.
456
f02d8318
CF		 4572013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
458
459 * config/tc-mips.c (mips_ip): Add sizelo.
460 For "+C", "+G", and "+H", set sizelo and compare against it.
461
b40bf0a2
NC		 4622013-04-29 Nick Clifton <nickc@redhat.com>
463
464 * as.c (Options): Add -gdwarf-sections.
465 (parse_args): Likewise.
466 * as.h (flag_dwarf_sections): Declare.
467 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
468 (process_entries): When -gdwarf-sections is enabled generate
469 fragmentary .debug_line sections.
470 (out_debug_line): Set the section for the .debug_line section end
471 symbol.
472 * doc/as.texinfo: Document -gdwarf-sections.
473 * NEWS: Mention -gdwarf-sections.
474
8eeccb77 4752013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 476
477 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
478 according to the target parameter. Don't call s_segm since s_segm
479 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
480 initialized yet.
481 (md_begin): Call s_segm according to target parameter from command
482 line.
483
49926cd0
AM		 4842013-04-25 Alan Modra <amodra@gmail.com>
485
486 * configure.in: Allow little-endian linux.
487 * configure: Regenerate.
488
e3031850
SL		 4892013-04-24 Sandra Loosemore <sandra@codesourcery.com>
490
491 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
492 "fstatus" control register to "eccinj".
493
cb948fc0
KT		 4942013-04-19 Kai Tietz <ktietz@redhat.com>
495
496 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
497
4455e9ad
JB		 4982013-04-15 Julian Brown <julian@codesourcery.com>
499
500 * expr.c (add_to_result, subtract_from_result): Make global.
501 * expr.h (add_to_result, subtract_from_result): Add prototypes.
502 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
503 subtract_from_result to handle extra bit of precision for .sleb128
504 directive operands.
505
956a6ba3
JB		 5062013-04-10 Julian Brown <julian@codesourcery.com>
507
508 * read.c (convert_to_bignum): Add sign parameter. Use it
509 instead of X_unsigned to determine sign of resulting bignum.
510 (emit_expr): Pass extra argument to convert_to_bignum.
511 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
512 X_extrabit to convert_to_bignum.
513 (parse_bitfield_cons): Set X_extrabit.
514 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
515 Initialise X_extrabit field as appropriate.
516 (add_to_result): New.
517 (subtract_from_result): New.
518 (expr): Use above.
519 * expr.h (expressionS): Add X_extrabit field.
520
eb9f3f00
JB		 5212013-04-10 Jan Beulich <jbeulich@suse.com>
522
523 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
524 register being PC when is_t or writeback, and use distinct
525 diagnostic for the latter case.
526
ccb84d65
JB		 5272013-04-10 Jan Beulich <jbeulich@suse.com>
528
529 * gas/config/tc-arm.c (parse_operands): Re-write
530 po_barrier_or_imm().
531 (do_barrier): Remove bogus constraint().
532 (do_t_barrier): Remove.
533
4d13caa0
NC		 5342013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
535
536 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
537 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
538 ATmega2564RFR2
539 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
540
16d02dc9
JB		 5412013-04-09 Jan Beulich <jbeulich@suse.com>
542
543 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
544 Use local variable Rt in more places.
545 (do_vmsr): Accept all control registers.
546
05ac0ffb
JB		 5472013-04-09 Jan Beulich <jbeulich@suse.com>
548
549 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
550 if there was none specified for moves between scalar and core
551 register.
552
2d51fb74
JB		 5532013-04-09 Jan Beulich <jbeulich@suse.com>
554
555 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
556 NEON_ALL_LANES case.
557
94dcf8bf
JB		 5582013-04-08 Jan Beulich <jbeulich@suse.com>
559
560 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
561 PC-relative VSTR.
562
1472d06f
JB		 5632013-04-08 Jan Beulich <jbeulich@suse.com>
564
565 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
566 entry to sp_fiq.
567
0c76cae8
AM		 5682013-04-03 Alan Modra <amodra@gmail.com>
569
570 * doc/as.texinfo: Add support to generate man options for h8300.
571 * doc/c-h8300.texi: Likewise.
572
92eb40d9
RR		 5732013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
574
575 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
576 Cortex-A57.
577
51dcdd4d
NC		 5782013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
579
580 PR binutils/15068
581 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
582
c5d685bf
NC		 5832013-03-26 Nick Clifton <nickc@redhat.com>
584
9b978282
NC		 585 PR gas/15295
586 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
587 start of the file each time.
588
c5d685bf
NC		 589 PR gas/15178
590 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
591 FreeBSD targets.
592
9699c833
TG		 5932013-03-26 Douglas B Rupp <rupp@gnat.com>
594
595 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
596 after fixup.
597
4755303e
WN		 5982013-03-21 Will Newton <will.newton@linaro.org>
599
600 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
601 pc-relative str instructions in Thumb mode.
602
81f5558e
NC		 6032013-03-21 Michael Schewe <michael.schewe@gmx.net>
604
605 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
606 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
607 R_H8_DISP32A16.
608 * config/tc-h8300.h: Remove duplicated defines.
609
71863e73
NC		 6102013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
611
612 PR gas/15282
613 * tc-avr.c (mcu_has_3_byte_pc): New function.
614 (tc_cfi_frame_initial_instructions): Call it to find return
615 address size.
616
795b8e6b
NC		 6172013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
618
619 PR gas/15095
620 * config/tc-tic6x.c (tic6x_try_encode): Handle
621 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
622 encode register pair numbers when required.
623
ba86b375
WN		 6242013-03-15 Will Newton <will.newton@linaro.org>
625
626 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
627 in vstr in Thumb mode for pre-ARMv7 cores.
628
9e6f3811
AS		 6292013-03-14 Andreas Schwab <schwab@suse.de>
630
631 * doc/c-arc.texi (ARC Directives): Revert last change and use
632 @itemize instead of @table.
633 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
634
b10bf8c5
NC		 6352013-03-14 Nick Clifton <nickc@redhat.com>
636
637 PR gas/15273
638 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
639 NULL message, instead just check ARM_CPU_IS_ANY directly.
640
ba724cfc
NC		 6412013-03-14 Nick Clifton <nickc@redhat.com>
642
643 PR gas/15212
9e6f3811 644 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 645 for table format.
646 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
647 to the @item directives.
648 (ARM-Neon-Alignment): Move to correct place in the document.
649 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
650 formatting.
651 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
652 @smallexample.
653
531a94fd
SL		 6542013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
655
656 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
657 case. Add default BAD_CASE to switch.
658
dad60f8e
SL		 6592013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
660
661 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
662 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
663
dd5181d5
KT		 6642013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
665
666 * config/tc-arm.c (crc_ext_armv8): New feature set.
667 (UNPRED_REG): New macro.
668 (do_crc32_1): New function.
669 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
670 do_crc32ch, do_crc32cw): Likewise.
671 (TUEc): New macro.
672 (insns): Add entries for crc32 mnemonics.
673 (arm_extensions): Add entry for crc.
674
8e723a10
CLT		 6752013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
676
677 * write.h (struct fix): Add fx_dot_frag field.
678 (dot_frag): Declare.
679 * write.c (dot_frag): New variable.
680 (fix_new_internal): Set fx_dot_frag field with dot_frag.
681 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
682 * expr.c (expr): Save value of frag_now in dot_frag when setting
683 dot_value.
684 * read.c (emit_expr): Likewise. Delete comments.
685
be05d201
L		 6862013-03-07 H.J. Lu <hongjiu.lu@intel.com>
687
688 * config/tc-i386.c (flag_code_names): Removed.
689 (i386_index_check): Rewrote.
690
62b0d0d5
YZ		 6912013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
692
693 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
694 add comment.
695 (aarch64_double_precision_fmovable): New function.
696 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
697 function; handle hexadecimal representation of IEEE754 encoding.
698 (parse_operands): Update the call to parse_aarch64_imm_float.
699
165de32a
L		 7002013-02-28 H.J. Lu <hongjiu.lu@intel.com>
701
702 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
703 (check_hle): Updated.
704 (md_assemble): Likewise.
705 (parse_insn): Likewise.
706
d5de92cf
L		 7072013-02-28 H.J. Lu <hongjiu.lu@intel.com>
708
709 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 710 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 711 (parse_insn): Remove expecting_string_instruction. Set
712 i.rep_prefix.
713
e60bb1dd
YZ		 7142013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
715
716 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
717
aeebdd9b
YZ		 7182013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
719
720 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
721 for system registers.
722
4107ae22
DD		 7232013-02-27 DJ Delorie <dj@redhat.com>
724
725 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
726 (rl78_op): Handle %code().
727 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
728 (tc_gen_reloc): Likwise; convert to a computed reloc.
729 (md_apply_fix): Likewise.
730
151fa98f
NC		 7312013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
732
733 * config/rl78-parse.y: Fix encoding of DIVWU insn.
734
70a8bc5b 7352013-02-25 Terry Guo <terry.guo@arm.com>
736
737 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
738 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
739 list of accepted CPUs.
740
5c111e37
L		 7412013-02-19 H.J. Lu <hongjiu.lu@intel.com>
742
743 PR gas/15159
744 * config/tc-i386.c (cpu_arch): Add ".smap".
745
746 * doc/c-i386.texi: Document smap.
747
8a75745d
MR		 7482013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
749
750 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
751 mips_assembling_insn appropriately.
752 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
753
79850f26
MR		 7542013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
755
cf29fc61 756 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 757 extraneous braces.
758
4c261dff
NC		 7592013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
760
5c111e37 761 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 762
ea33f281
NC		 7632013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
764
765 * configure.tgt: Add nios2-*-rtems*.
766
a1ccaec9
YZ		 7672013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
768
769 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
770 NULL.
771
0aa27725
RS		 7722013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
773
774 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
775 (macro): Use it. Assert that trunc.w.s is not used for r5900.
776
da4339ed
NC		 7772013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
778
779 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
780 core.
781
36591ba1 7822013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 783 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 784
785 Based on patches from Altera Corporation.
786
787 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
788 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
789 * Makefile.in: Regenerated.
790 * configure.tgt: Add case for nios2*-linux*.
791 * config/obj-elf.c: Conditionally include elf/nios2.h.
792 * config/tc-nios2.c: New file.
793 * config/tc-nios2.h: New file.
794 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
795 * doc/Makefile.in: Regenerated.
796 * doc/all.texi: Set NIOSII.
797 * doc/as.texinfo (Overview): Add Nios II options.
798 (Machine Dependencies): Include c-nios2.texi.
799 * doc/c-nios2.texi: New file.
800 * NEWS: Note Altera Nios II support.
801
94d4433a
AM		 8022013-02-06 Alan Modra <amodra@gmail.com>
803
804 PR gas/14255
805 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
806 Don't skip fixups with fx_subsy non-NULL.
807 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
808 with fx_subsy non-NULL.
809
ace9af6f
L		 8102013-02-04 H.J. Lu <hongjiu.lu@intel.com>
811
812 * doc/c-metag.texi: Add "@c man" markers.
813
89d67ed9
AM		 8142013-02-04 Alan Modra <amodra@gmail.com>
815
816 * write.c (fixup_segment): Return void. Delete seg_reloc_count
817 related code.
818 (TC_ADJUST_RELOC_COUNT): Delete.
819 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
820
89072bd6
AM		 8212013-02-04 Alan Modra <amodra@gmail.com>
822
823 * po/POTFILES.in: Regenerate.
824
f9b2d544
NC		 8252013-01-30 Markos Chandras <markos.chandras@imgtec.com>
826
827 * config/tc-metag.c: Make SWAP instruction less permissive with
828 its operands.
829
392ca752
DD		 8302013-01-29 DJ Delorie <dj@redhat.com>
831
832 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
833 relocs in .word/.etc statements.
834
427d0db6
RM		 8352013-01-29 Roland McGrath <mcgrathr@google.com>
836
837 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
838 immediate value for 8-bit offset" error so it shows line info.
839
4faf939a
JM		 8402013-01-24 Joseph Myers <joseph@codesourcery.com>
841
842 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
843 for 64-bit output.
844
78c8d46c
NC		 8452013-01-24 Nick Clifton <nickc@redhat.com>
846
847 * config/tc-v850.c: Add support for e3v5 architecture.
848 * doc/c-v850.texi: Mention new support.
849
fb5b7503
NC		 8502013-01-23 Nick Clifton <nickc@redhat.com>
851
852 PR gas/15039
853 * config/tc-avr.c: Include dwarf2dbg.h.
854
8ce3d284
L		 8552013-01-18 H.J. Lu <hongjiu.lu@intel.com>
856
857 * config/tc-i386.c (reloc): Support size relocation only for ELF.
858 (tc_i386_fix_adjustable): Likewise.
859 (lex_got): Likewise.
860 (tc_gen_reloc): Likewise.
861
f5555712
YZ		 8622013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
863
864 * config/tc-aarch64.c (output_operand_error_record): Change to output
865 the out-of-range error message as value-expected message if there is
866 only one single value in the expected range.
867 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
868 LSL #0 as a programmer-friendly feature.
869
8fd4256d
L		 8702013-01-16 H.J. Lu <hongjiu.lu@intel.com>
871
872 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
873 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
874 BFD_RELOC_64_SIZE relocations.
875 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
876 for it.
877 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
878 relocations against local symbols.
879
a5840dce
AM		 8802013-01-16 Alan Modra <amodra@gmail.com>
881
882 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
883 finding some sort of toc syntax error, and break to avoid
884 compiler uninit warning.
885
af89796a
L		 8862013-01-15 H.J. Lu <hongjiu.lu@intel.com>
887
888 PR gas/15019
889 * config/tc-i386.c (lex_got): Increment length by 1 if the
890 relocation token is removed.
891
dd42f060
NC		 8922013-01-15 Nick Clifton <nickc@redhat.com>
893
894 * config/tc-v850.c (md_assemble): Allow signed values for
895 V850E_IMMEDIATE.
896
464e3686
SK		 8972013-01-11 Sean Keys <skeys@ipdatasys.com>
898
899 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 900 git to cvs.
464e3686 901
5817ffd1
PB		 9022013-01-10 Peter Bergner <bergner@vnet.ibm.com>
903
904 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
905 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
906 * config/tc-ppc.c (md_show_usage): Likewise.
907 (ppc_handle_align): Handle power8's group ending nop.
908
f4b1f6a9
SK		 9092013-01-10 Sean Keys <skeys@ipdatasys.com>
910
911 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 912 that the assember exits after the opcodes have been printed.
f4b1f6a9 913
34bca508
L		 9142013-01-10 H.J. Lu <hongjiu.lu@intel.com>
915
916 * app.c: Remove trailing white spaces.
917 * as.c: Likewise.
918 * as.h: Likewise.
919 * cond.c: Likewise.
920 * dw2gencfi.c: Likewise.
921 * dwarf2dbg.h: Likewise.
922 * ecoff.c: Likewise.
923 * input-file.c: Likewise.
924 * itbl-lex.h: Likewise.
925 * output-file.c: Likewise.
926 * read.c: Likewise.
927 * sb.c: Likewise.
928 * subsegs.c: Likewise.
929 * symbols.c: Likewise.
930 * write.c: Likewise.
931 * config/tc-i386.c: Likewise.
932 * doc/Makefile.am: Likewise.
933 * doc/Makefile.in: Likewise.
934 * doc/c-aarch64.texi: Likewise.
935 * doc/c-alpha.texi: Likewise.
936 * doc/c-arc.texi: Likewise.
937 * doc/c-arm.texi: Likewise.
938 * doc/c-avr.texi: Likewise.
939 * doc/c-bfin.texi: Likewise.
940 * doc/c-cr16.texi: Likewise.
941 * doc/c-d10v.texi: Likewise.
942 * doc/c-d30v.texi: Likewise.
943 * doc/c-h8300.texi: Likewise.
944 * doc/c-hppa.texi: Likewise.
945 * doc/c-i370.texi: Likewise.
946 * doc/c-i386.texi: Likewise.
947 * doc/c-i860.texi: Likewise.
948 * doc/c-m32c.texi: Likewise.
949 * doc/c-m32r.texi: Likewise.
950 * doc/c-m68hc11.texi: Likewise.
951 * doc/c-m68k.texi: Likewise.
952 * doc/c-microblaze.texi: Likewise.
953 * doc/c-mips.texi: Likewise.
954 * doc/c-msp430.texi: Likewise.
955 * doc/c-mt.texi: Likewise.
956 * doc/c-s390.texi: Likewise.
957 * doc/c-score.texi: Likewise.
958 * doc/c-sh.texi: Likewise.
959 * doc/c-sh64.texi: Likewise.
960 * doc/c-tic54x.texi: Likewise.
961 * doc/c-tic6x.texi: Likewise.
962 * doc/c-v850.texi: Likewise.
963 * doc/c-xc16x.texi: Likewise.
964 * doc/c-xgate.texi: Likewise.
965 * doc/c-xtensa.texi: Likewise.
966 * doc/c-z80.texi: Likewise.
967 * doc/internals.texi: Likewise.
968
4c665b71
RM		 9692013-01-10 Roland McGrath <mcgrathr@google.com>
970
971 * hash.c (hash_new_sized): Make it global.
972 * hash.h: Declare it.
973 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
974 pass a small size.
975
a3c62988
NC		 9762013-01-10 Will Newton <will.newton@imgtec.com>
977
978 * Makefile.am: Add Meta.
979 * Makefile.in: Regenerate.
980 * config/tc-metag.c: New file.
981 * config/tc-metag.h: New file.
982 * configure.tgt: Add Meta.
983 * doc/Makefile.am: Add Meta.
984 * doc/Makefile.in: Regenerate.
985 * doc/all.texi: Add Meta.
986 * doc/as.texiinfo: Document Meta options.
987 * doc/c-metag.texi: New file.
988
b37df7c4
SE		 9892013-01-09 Steve Ellcey <sellcey@mips.com>
990
991 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
992 calls.
993 * config/tc-mips.c (internalError): Remove, replace with abort.
994
a3251895
YZ		 9952013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
996
997 * config/tc-aarch64.c (parse_operands): Change to compare the result
998 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
999
8ab8155f
NC		 10002013-01-07 Nick Clifton <nickc@redhat.com>
1001
1002 PR gas/14887
1003 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1004 anticipated character.
1005 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1006 here as it is no longer needed.
1007
a4ac1c42
AS		 10082013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1009
1010 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1011 * doc/c-score.texi (SCORE-Opts): Likewise.
1012 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1013
e407c74b
NC		 10142013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1015
1016 * config/tc-mips.c: Add support for MIPS r5900.
1017 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1018 lq and sq.
1019 (can_swap_branch_p, get_append_method): Detect some conditional
1020 short loops to fix a bug on the r5900 by NOP in the branch delay
1021 slot.
1022 (M_MUL): Support 3 operands in multu on r5900.
1023 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1024 (s_mipsset): Force 32 bit floating point on r5900.
1025 (mips_ip): Check parameter range of instructions mfps and mtps on
1026 r5900.
1027 * configure.in: Detect CPU type when target string contains r5900
1028 (e.g. mips64r5900el-linux-gnu).
1029
62658407
L		 10302013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1031
1032 * as.c (parse_args): Update copyright year to 2013.
1033
95830fd1
YZ		 10342013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1035
1036 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1037 and "cortex57".
1038
517bb291 10392013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1040
517bb291
NC		 1041 PR gas/14987
1042 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1043 closing bracket.
d709e4e6 1044
517bb291 1045For older changes see ChangeLog-2012
08d56133 1046\f
517bb291 1047Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1048
1049Copying and distribution of this file, with or without modification,
1050are permitted in any medium without royalty provided the copyright
1051notice and this notice are preserved.
1052
08d56133
NC		 1053Local Variables:
1054mode: change-log
1055left-margin: 8
1056fill-column: 74
1057version-control: never
1058End:
A mirror of the official binutils-gdb repository