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5c324c16
RS		 12013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
4 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
5 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
6
23e69e47
RS		 72013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
8
9 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
10 Require the msb to be <= 31 for "+s". Check that the size is <= 31
11 for both "+s" and "+S".
12
27c5c572
RS		 132013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
14
15 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
16 (mips_ip, mips16_ip): Handle "+i".
17
e76ff5ab
RS		 182013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
19
20 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
21 (micromips_to_32_reg_h_map): Rename to...
22 (micromips_to_32_reg_h_map1): ...this.
23 (micromips_to_32_reg_i_map): Rename to...
24 (micromips_to_32_reg_h_map2): ...this.
25 (mips_lookup_reg_pair): New function.
26 (gpr_write_mask, macro): Adjust after above renaming.
27 (validate_micromips_insn): Remove "mi" handling.
28 (mips_ip): Likewise. Parse both registers in a pair for "mh".
29
fa7616a4
RS		 302013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
31
32 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
33 (mips_ip): Remove "+D" and "+T" handling.
34
fb798c50
AK		 352013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
36
37 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
38 relocs.
39
2c0a3565
MS		 402013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
41
4aa2c5e2
MS		 42 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
43
442013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
45
2c0a3565
MS		 46 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
47 (aarch64_force_relocation): Likewise.
48
f40da81b
AM		 492013-07-02 Alan Modra <amodra@gmail.com>
50
51 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
52
81566a9b
MR		 532013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
54
55 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
56 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
57 Replace @sc{mips16} with literal `MIPS16'.
58 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
59
a6bb11b2
YZ		 602013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
61
62 * config/tc-aarch64.c (reloc_table): Replace
63 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
64 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
65 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
66 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
67 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
68 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
69 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
70 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
71 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
72 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
73 (aarch64_force_relocation): Likewise.
74
cec5225b
YZ		 752013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
76
77 * config/tc-aarch64.c (ilp32_p): New static variable.
78 (elf64_aarch64_target_format): Return the target according to the
79 value of 'ilp32_p'.
80 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
81 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
82 (aarch64_dwarf2_addr_size): New function.
83 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
84 (DWARF2_ADDR_SIZE): New define.
85
e335d9cb
RS		 862013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
87
88 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
89
18870af7
RS		 902013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
91
92 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
93
833794fc
MR		 942013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
95
96 * config/tc-mips.c (mips_set_options): Add insn32 member.
97 (mips_opts): Initialize it.
98 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
99 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
100 (md_longopts): Add "minsn32" and "mno-insn32" options.
101 (is_size_valid): Handle insn32 mode.
102 (md_assemble): Pass instruction string down to macro.
103 (brk_fmt): Add second dimension and insn32 mode initializers.
104 (mfhl_fmt): Likewise.
105 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
106 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
107 (macro_build_jalr, move_register): Handle insn32 mode.
108 (macro_build_branch_rs): Likewise.
109 (macro): Handle insn32 mode.
110 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
111 (mips_ip): Handle insn32 mode.
112 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
113 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
114 (mips_handle_align): Handle insn32 mode.
115 (md_show_usage): Add -minsn32 and -mno-insn32.
116
117 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
118 -mno-insn32 options.
119 (-minsn32, -mno-insn32): New options.
120 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
121 options.
122 (MIPS assembly options): New node. Document .set insn32 and
123 .set noinsn32.
124 (MIPS-Dependent): List the new node.
125
d1706f38
NC		 1262013-06-25 Nick Clifton <nickc@redhat.com>
127
128 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
129 the PC in indirect addressing on 430xv2 parts.
130 (msp430_operands): Add version test to hardware bug encoding
131 restrictions.
132
477330fc
RM		 1332013-06-24 Roland McGrath <mcgrathr@google.com>
134
d996d970
RM		 135 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
136 so it skips whitespace before it.
137 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
138
477330fc
RM		 139 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
140 (arm_reg_parse_multi): Skip whitespace first.
141 (parse_reg_list): Likewise.
142 (parse_vfp_reg_list): Likewise.
143 (s_arm_unwind_save_mmxwcg): Likewise.
144
24382199
NC		 1452013-06-24 Nick Clifton <nickc@redhat.com>
146
147 PR gas/15623
148 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
149
c3678916
RS		 1502013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
151
152 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
153
42429eac
RS		 1542013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
155
156 * config/tc-mips.c: Assert that offsetT and valueT are at least
157 8 bytes in size.
158 (GPR_SMIN, GPR_SMAX): New macros.
159 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
160
f3ded42a
RS		 1612013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
164 conditions. Remove any code deselected by them.
165 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
166
e8044f35
RS		 1672013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * NEWS: Note removal of ECOFF support.
170 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
171 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
172 (MULTI_CFILES): Remove config/e-mipsecoff.c.
173 * Makefile.in: Regenerate.
174 * configure.in: Remove MIPS ECOFF references.
175 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
176 Delete cases.
177 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
178 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
179 (mips-*-*): ...this single case.
180 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
181 MIPS emulations to be e-mipself*.
182 * configure: Regenerate.
183 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
184 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
185 (mips-*-sysv*): Remove coff and ecoff cases.
186 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
187 * ecoff.c: Remove reference to MIPS ECOFF.
188 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
189 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
190 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
191 (mips_hi_fixup): Tweak comment.
192 (append_insn): Require a howto.
193 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
194
98508b2a
RS		 1952013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
196
197 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
198 Use "CPU" instead of "cpu".
199 * doc/c-mips.texi: Likewise.
200 (MIPS Opts): Rename to MIPS Options.
201 (MIPS option stack): Rename to MIPS Option Stack.
202 (MIPS ASE instruction generation overrides): Rename to
203 MIPS ASE Instruction Generation Overrides (for now).
204 (MIPS floating-point): Rename to MIPS Floating-Point.
205
fc16f8cc
RS		 2062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
207
208 * doc/c-mips.texi (MIPS Macros): New section.
209 (MIPS Object): Replace with...
210 (MIPS Small Data): ...this new section.
211
5a7560b5
RS		 2122013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
215 Capitalize name. Use @kindex instead of @cindex for .set entries.
216
a1b86ab7
RS		 2172013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
218
219 * doc/c-mips.texi (MIPS Stabs): Remove section.
220
c6278170
RS		 2212013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
222
223 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
224 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
225 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
226 (ISA_SUPPORTS_VIRT64_ASE): Delete.
227 (mips_ase): New structure.
228 (mips_ases): New table.
229 (FP64_ASES): New macro.
230 (mips_ase_groups): New array.
231 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
232 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
233 functions.
234 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
235 (md_parse_option): Use mips_ases and mips_set_ase instead of
236 separate case statements for each ASE option.
237 (mips_after_parse_args): Use FP64_ASES. Use
238 mips_check_isa_supports_ases to check the ASEs against
239 other options.
240 (s_mipsset): Use mips_ases and mips_set_ase instead of
241 separate if statements for each ASE option. Use
242 mips_check_isa_supports_ases, even when a non-ASE option
243 is specified.
244
63a4bc21
KT		 2452013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
246
247 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
248
c31f3936
RS		 2492013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * config/tc-mips.c (md_shortopts, options, md_longopts)
252 (md_longopts_size): Move earlier in file.
253
846ef2d0
RS		 2542013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
255
256 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
257 with a single "ase" bitmask.
258 (mips_opts): Update accordingly.
259 (file_ase, file_ase_explicit): New variables.
260 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
261 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
262 (ISA_HAS_ROR): Adjust for mips_set_options change.
263 (is_opcode_valid): Take the base ase mask directly from mips_opts.
264 (mips_ip): Adjust for mips_set_options change.
265 (md_parse_option): Likewise. Update file_ase_explicit.
266 (mips_after_parse_args): Adjust for mips_set_options change.
267 Use bitmask operations to select the default ASEs. Set file_ase
268 rather than individual per-ASE variables.
269 (s_mipsset): Adjust for mips_set_options change.
270 (mips_elf_final_processing): Test file_ase rather than
271 file_ase_mdmx. Remove commented-out code.
272
d16afab6
RS		 2732013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
276 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
277 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
278 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
279 (mips_after_parse_args): Use the new "ase" field to choose
280 the default ASEs.
281 (mips_cpu_info_table): Move ASEs from the "flags" field to the
282 "ase" field.
283
e83a675f
RE		 2842013-06-18 Richard Earnshaw <rearnsha@arm.com>
285
286 * config/tc-arm.c (symbol_preemptible): New function.
287 (relax_branch): Use it.
288
7f3c4072
CM		 2892013-06-17 Catherine Moore <clm@codesourcery.com>
290 Maciej W. Rozycki <macro@codesourcery.com>
291 Chao-Ying Fu <fu@mips.com>
292
293 * config/tc-mips.c (mips_set_options): Add ase_eva.
294 (mips_set_options mips_opts): Add ase_eva.
295 (file_ase_eva): Declare.
296 (ISA_SUPPORTS_EVA_ASE): Define.
297 (IS_SEXT_9BIT_NUM): Define.
298 (MIPS_CPU_ASE_EVA): Define.
299 (is_opcode_valid): Add support for ase_eva.
300 (macro_build): Likewise.
301 (macro): Likewise.
302 (validate_mips_insn): Likewise.
303 (validate_micromips_insn): Likewise.
304 (mips_ip): Likewise.
305 (options): Add OPTION_EVA and OPTION_NO_EVA.
306 (md_longopts): Add -meva and -mno-eva.
307 (md_parse_option): Process new options.
308 (mips_after_parse_args): Check for valid EVA combinations.
309 (s_mipsset): Likewise.
310
e410add4
RS		 3112013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
312
313 * dwarf2dbg.h (dwarf2_move_insn): Declare.
314 * dwarf2dbg.c (line_subseg): Add pmove_tail.
315 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
316 (dwarf2_gen_line_info_1): Update call accordingly.
317 (dwarf2_move_insn): New function.
318 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
319
6a50d470
RS		 3202013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
321
322 Revert:
323
324 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
325
326 PR gas/13024
327 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
328 (dwarf2_gen_line_info_1): Delete.
329 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
330 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
331 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
332 (dwarf2_directive_loc): Push previous .locs instead of generating
333 them immediately.
334
f122319e
CF		 3352013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
336
337 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
338 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
339
909c7f9c
NC		 3402013-06-13 Nick Clifton <nickc@redhat.com>
341
342 PR gas/15602
343 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
344 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
345 function. Generates an error if the adjusted offset is out of a
346 16-bit range.
347
5d5755a7
SL		 3482013-06-12 Sandra Loosemore <sandra@codesourcery.com>
349
350 * config/tc-nios2.c (md_apply_fix): Mask constant
351 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
352
3bf0dbfb
MR		 3532013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
354
355 * config/tc-mips.c (append_insn): Don't do branch relaxation for
356 MIPS-3D instructions either.
357 (md_convert_frag): Update the COPx branch mask accordingly.
358
359 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
360 option.
361 * doc/as.texinfo (Overview): Add --relax-branch and
362 --no-relax-branch.
363 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
364 --no-relax-branch.
365
9daf7bab
SL		 3662013-06-09 Sandra Loosemore <sandra@codesourcery.com>
367
368 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
369 omitted.
370
d301a56b
RS		 3712013-06-08 Catherine Moore <clm@codesourcery.com>
372
373 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
374 (is_opcode_valid_16): Pass ase value to opcode_is_member.
375 (append_insn): Change INSN_xxxx to ASE_xxxx.
376
7bab7634
DC		 3772013-06-01 George Thomas <george.thomas@atmel.com>
378
379 * gas/config/tc-avr.c: Change ISA for devices with USB support to
380 AVR_ISA_XMEGAU
381
f60cf82f
L		 3822013-05-31 H.J. Lu <hongjiu.lu@intel.com>
383
384 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
385 for ELF.
386
a3f278e2
CM		 3872013-05-31 Paul Brook <paul@codesourcery.com>
388
389 gas/
390 * config/tc-mips.c (s_ehword): New.
391
067ec077
CM		 3922013-05-30 Paul Brook <paul@codesourcery.com>
393
394 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
395
d6101ac2
MR		 3962013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
397
398 * write.c (resolve_reloc_expr_symbols): On REL targets don't
399 convert relocs who have no relocatable field either. Rephrase
400 the conditional so that the PC-relative check is only applied
401 for REL targets.
402
f19ccbda
MR		 4032013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
404
405 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
406 calculation.
407
418009c2
YZ		 4082013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
409
410 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 411 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 412 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
413 (md_apply_fix): Likewise.
414 (aarch64_force_relocation): Likewise.
415
0a8897c7
KT		 4162013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
417
418 * config/tc-arm.c (it_fsm_post_encode): Improve
419 warning messages about deprecated IT block formats.
420
89d2a2a3
MS		 4212013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
422
423 * config/tc-aarch64.c (md_apply_fix): Move value range checking
424 inside fx_done condition.
425
c77c0862
RS		 4262013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
427
428 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
429
c0637f3a
PB		 4302013-05-20 Peter Bergner <bergner@vnet.ibm.com>
431
432 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
433 and clean up warning when using PRINT_OPCODE_TABLE.
434
5656a981
AM		 4352013-05-20 Alan Modra <amodra@gmail.com>
436
437 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
438 and data fixups performing shift/high adjust/sign extension on
439 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
440 when writing data fixups rather than recalculating size.
441
997b26e8
JBG		 4422013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
443
444 * doc/c-msp430.texi: Fix typo.
445
9f6e76f4
TG		 4462013-05-16 Tristan Gingold <gingold@adacore.com>
447
448 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
449 are also TOC symbols.
450
638d3803
NC		 4512013-05-16 Nick Clifton <nickc@redhat.com>
452
453 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
454 Add -mcpu command to specify core type.
997b26e8 455 * doc/c-msp430.texi: Update documentation.
638d3803 456
b015e599
AP		 4572013-05-09 Andrew Pinski <apinski@cavium.com>
458
459 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
460 (mips_opts): Update for the new field.
461 (file_ase_virt): New variable.
462 (ISA_SUPPORTS_VIRT_ASE): New macro.
463 (ISA_SUPPORTS_VIRT64_ASE): New macro.
464 (MIPS_CPU_ASE_VIRT): New define.
465 (is_opcode_valid): Handle ase_virt.
466 (macro_build): Handle "+J".
467 (validate_mips_insn): Likewise.
468 (mips_ip): Likewise.
469 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
470 (md_longopts): Add mvirt and mnovirt
471 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
472 (mips_after_parse_args): Handle ase_virt field.
473 (s_mipsset): Handle "virt" and "novirt".
474 (mips_elf_final_processing): Add a comment about virt ASE might need
475 a new flag.
476 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
477 * doc/c-mips.texi: Document -mvirt and -mno-virt.
478 Document ".set virt" and ".set novirt".
479
da8094d7
AM		 4802013-05-09 Alan Modra <amodra@gmail.com>
481
482 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
483 control of operand flag bits.
484
c5f8c205
AM		 4852013-05-07 Alan Modra <amodra@gmail.com>
486
487 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
488 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
489 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
490 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
491 (md_apply_fix): Set fx_no_overflow for assorted relocations.
492 Shift and sign-extend fieldval for use by some VLE reloc
493 operand->insert functions.
494
b47468a6
CM		 4952013-05-06 Paul Brook <paul@codesourcery.com>
496 Catherine Moore <clm@codesourcery.com>
497
c5f8c205
AM		 498 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
499 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 500 (md_apply_fix): Likewise.
501 (tc_gen_reloc): Likewise.
502
2de39019
CM		 5032013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
504
505 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
506 (mips_fix_adjustable): Adjust pc-relative check to use
507 limited_pc_reloc_p.
508
754e2bb9
RS		 5092013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
510
511 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
512 (s_mips_stab): Do not restrict to stabn only.
513
13761a11
NC		 5142013-05-02 Nick Clifton <nickc@redhat.com>
515
516 * config/tc-msp430.c: Add support for the MSP430X architecture.
517 Add code to insert a NOP instruction after any instruction that
518 might change the interrupt state.
519 Add support for the LARGE memory model.
520 Add code to initialise the .MSP430.attributes section.
521 * config/tc-msp430.h: Add support for the MSP430X architecture.
522 * doc/c-msp430.texi: Document the new -mL and -mN command line
523 options.
524 * NEWS: Mention support for the MSP430X architecture.
525
df26367c
MR		 5262013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
527
528 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
529 alpha*-*-linux*ecoff*.
530
f02d8318
CF		 5312013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
532
533 * config/tc-mips.c (mips_ip): Add sizelo.
534 For "+C", "+G", and "+H", set sizelo and compare against it.
535
b40bf0a2
NC		 5362013-04-29 Nick Clifton <nickc@redhat.com>
537
538 * as.c (Options): Add -gdwarf-sections.
539 (parse_args): Likewise.
540 * as.h (flag_dwarf_sections): Declare.
541 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
542 (process_entries): When -gdwarf-sections is enabled generate
543 fragmentary .debug_line sections.
544 (out_debug_line): Set the section for the .debug_line section end
545 symbol.
546 * doc/as.texinfo: Document -gdwarf-sections.
547 * NEWS: Mention -gdwarf-sections.
548
8eeccb77 5492013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 550
551 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
552 according to the target parameter. Don't call s_segm since s_segm
553 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
554 initialized yet.
555 (md_begin): Call s_segm according to target parameter from command
556 line.
557
49926cd0
AM		 5582013-04-25 Alan Modra <amodra@gmail.com>
559
560 * configure.in: Allow little-endian linux.
561 * configure: Regenerate.
562
e3031850
SL		 5632013-04-24 Sandra Loosemore <sandra@codesourcery.com>
564
565 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
566 "fstatus" control register to "eccinj".
567
cb948fc0
KT		 5682013-04-19 Kai Tietz <ktietz@redhat.com>
569
570 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
571
4455e9ad
JB		 5722013-04-15 Julian Brown <julian@codesourcery.com>
573
574 * expr.c (add_to_result, subtract_from_result): Make global.
575 * expr.h (add_to_result, subtract_from_result): Add prototypes.
576 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
577 subtract_from_result to handle extra bit of precision for .sleb128
578 directive operands.
579
956a6ba3
JB		 5802013-04-10 Julian Brown <julian@codesourcery.com>
581
582 * read.c (convert_to_bignum): Add sign parameter. Use it
583 instead of X_unsigned to determine sign of resulting bignum.
584 (emit_expr): Pass extra argument to convert_to_bignum.
585 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
586 X_extrabit to convert_to_bignum.
587 (parse_bitfield_cons): Set X_extrabit.
588 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
589 Initialise X_extrabit field as appropriate.
590 (add_to_result): New.
591 (subtract_from_result): New.
592 (expr): Use above.
593 * expr.h (expressionS): Add X_extrabit field.
594
eb9f3f00
JB		 5952013-04-10 Jan Beulich <jbeulich@suse.com>
596
597 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
598 register being PC when is_t or writeback, and use distinct
599 diagnostic for the latter case.
600
ccb84d65
JB		 6012013-04-10 Jan Beulich <jbeulich@suse.com>
602
603 * gas/config/tc-arm.c (parse_operands): Re-write
604 po_barrier_or_imm().
605 (do_barrier): Remove bogus constraint().
606 (do_t_barrier): Remove.
607
4d13caa0
NC		 6082013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
609
610 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
611 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
612 ATmega2564RFR2
613 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
614
16d02dc9
JB		 6152013-04-09 Jan Beulich <jbeulich@suse.com>
616
617 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
618 Use local variable Rt in more places.
619 (do_vmsr): Accept all control registers.
620
05ac0ffb
JB		 6212013-04-09 Jan Beulich <jbeulich@suse.com>
622
623 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
624 if there was none specified for moves between scalar and core
625 register.
626
2d51fb74
JB		 6272013-04-09 Jan Beulich <jbeulich@suse.com>
628
629 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
630 NEON_ALL_LANES case.
631
94dcf8bf
JB		 6322013-04-08 Jan Beulich <jbeulich@suse.com>
633
634 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
635 PC-relative VSTR.
636
1472d06f
JB		 6372013-04-08 Jan Beulich <jbeulich@suse.com>
638
639 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
640 entry to sp_fiq.
641
0c76cae8
AM		 6422013-04-03 Alan Modra <amodra@gmail.com>
643
644 * doc/as.texinfo: Add support to generate man options for h8300.
645 * doc/c-h8300.texi: Likewise.
646
92eb40d9
RR		 6472013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
648
649 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
650 Cortex-A57.
651
51dcdd4d
NC		 6522013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
653
654 PR binutils/15068
655 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
656
c5d685bf
NC		 6572013-03-26 Nick Clifton <nickc@redhat.com>
658
9b978282
NC		 659 PR gas/15295
660 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
661 start of the file each time.
662
c5d685bf
NC		 663 PR gas/15178
664 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
665 FreeBSD targets.
666
9699c833
TG		 6672013-03-26 Douglas B Rupp <rupp@gnat.com>
668
669 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
670 after fixup.
671
4755303e
WN		 6722013-03-21 Will Newton <will.newton@linaro.org>
673
674 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
675 pc-relative str instructions in Thumb mode.
676
81f5558e
NC		 6772013-03-21 Michael Schewe <michael.schewe@gmx.net>
678
679 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
680 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
681 R_H8_DISP32A16.
682 * config/tc-h8300.h: Remove duplicated defines.
683
71863e73
NC		 6842013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
685
686 PR gas/15282
687 * tc-avr.c (mcu_has_3_byte_pc): New function.
688 (tc_cfi_frame_initial_instructions): Call it to find return
689 address size.
690
795b8e6b
NC		 6912013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
692
693 PR gas/15095
694 * config/tc-tic6x.c (tic6x_try_encode): Handle
695 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
696 encode register pair numbers when required.
697
ba86b375
WN		 6982013-03-15 Will Newton <will.newton@linaro.org>
699
700 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
701 in vstr in Thumb mode for pre-ARMv7 cores.
702
9e6f3811
AS		 7032013-03-14 Andreas Schwab <schwab@suse.de>
704
705 * doc/c-arc.texi (ARC Directives): Revert last change and use
706 @itemize instead of @table.
707 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
708
b10bf8c5
NC		 7092013-03-14 Nick Clifton <nickc@redhat.com>
710
711 PR gas/15273
712 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
713 NULL message, instead just check ARM_CPU_IS_ANY directly.
714
ba724cfc
NC		 7152013-03-14 Nick Clifton <nickc@redhat.com>
716
717 PR gas/15212
9e6f3811 718 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 719 for table format.
720 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
721 to the @item directives.
722 (ARM-Neon-Alignment): Move to correct place in the document.
723 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
724 formatting.
725 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
726 @smallexample.
727
531a94fd
SL		 7282013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
729
730 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
731 case. Add default BAD_CASE to switch.
732
dad60f8e
SL		 7332013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
734
735 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
736 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
737
dd5181d5
KT		 7382013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
739
740 * config/tc-arm.c (crc_ext_armv8): New feature set.
741 (UNPRED_REG): New macro.
742 (do_crc32_1): New function.
743 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
744 do_crc32ch, do_crc32cw): Likewise.
745 (TUEc): New macro.
746 (insns): Add entries for crc32 mnemonics.
747 (arm_extensions): Add entry for crc.
748
8e723a10
CLT		 7492013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
750
751 * write.h (struct fix): Add fx_dot_frag field.
752 (dot_frag): Declare.
753 * write.c (dot_frag): New variable.
754 (fix_new_internal): Set fx_dot_frag field with dot_frag.
755 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
756 * expr.c (expr): Save value of frag_now in dot_frag when setting
757 dot_value.
758 * read.c (emit_expr): Likewise. Delete comments.
759
be05d201
L		 7602013-03-07 H.J. Lu <hongjiu.lu@intel.com>
761
762 * config/tc-i386.c (flag_code_names): Removed.
763 (i386_index_check): Rewrote.
764
62b0d0d5
YZ		 7652013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
766
767 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
768 add comment.
769 (aarch64_double_precision_fmovable): New function.
770 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
771 function; handle hexadecimal representation of IEEE754 encoding.
772 (parse_operands): Update the call to parse_aarch64_imm_float.
773
165de32a
L		 7742013-02-28 H.J. Lu <hongjiu.lu@intel.com>
775
776 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
777 (check_hle): Updated.
778 (md_assemble): Likewise.
779 (parse_insn): Likewise.
780
d5de92cf
L		 7812013-02-28 H.J. Lu <hongjiu.lu@intel.com>
782
783 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 784 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 785 (parse_insn): Remove expecting_string_instruction. Set
786 i.rep_prefix.
787
e60bb1dd
YZ		 7882013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
789
790 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
791
aeebdd9b
YZ		 7922013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
793
794 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
795 for system registers.
796
4107ae22
DD		 7972013-02-27 DJ Delorie <dj@redhat.com>
798
799 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
800 (rl78_op): Handle %code().
801 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
802 (tc_gen_reloc): Likwise; convert to a computed reloc.
803 (md_apply_fix): Likewise.
804
151fa98f
NC		 8052013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
806
807 * config/rl78-parse.y: Fix encoding of DIVWU insn.
808
70a8bc5b 8092013-02-25 Terry Guo <terry.guo@arm.com>
810
811 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
812 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
813 list of accepted CPUs.
814
5c111e37
L		 8152013-02-19 H.J. Lu <hongjiu.lu@intel.com>
816
817 PR gas/15159
818 * config/tc-i386.c (cpu_arch): Add ".smap".
819
820 * doc/c-i386.texi: Document smap.
821
8a75745d
MR		 8222013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
823
824 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
825 mips_assembling_insn appropriately.
826 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
827
79850f26
MR		 8282013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
829
cf29fc61 830 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 831 extraneous braces.
832
4c261dff
NC		 8332013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
834
5c111e37 835 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 836
ea33f281
NC		 8372013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
838
839 * configure.tgt: Add nios2-*-rtems*.
840
a1ccaec9
YZ		 8412013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
842
843 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
844 NULL.
845
0aa27725
RS		 8462013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
847
848 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
849 (macro): Use it. Assert that trunc.w.s is not used for r5900.
850
da4339ed
NC		 8512013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
852
853 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
854 core.
855
36591ba1 8562013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 857 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 858
859 Based on patches from Altera Corporation.
860
861 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
862 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
863 * Makefile.in: Regenerated.
864 * configure.tgt: Add case for nios2*-linux*.
865 * config/obj-elf.c: Conditionally include elf/nios2.h.
866 * config/tc-nios2.c: New file.
867 * config/tc-nios2.h: New file.
868 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
869 * doc/Makefile.in: Regenerated.
870 * doc/all.texi: Set NIOSII.
871 * doc/as.texinfo (Overview): Add Nios II options.
872 (Machine Dependencies): Include c-nios2.texi.
873 * doc/c-nios2.texi: New file.
874 * NEWS: Note Altera Nios II support.
875
94d4433a
AM		 8762013-02-06 Alan Modra <amodra@gmail.com>
877
878 PR gas/14255
879 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
880 Don't skip fixups with fx_subsy non-NULL.
881 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
882 with fx_subsy non-NULL.
883
ace9af6f
L		 8842013-02-04 H.J. Lu <hongjiu.lu@intel.com>
885
886 * doc/c-metag.texi: Add "@c man" markers.
887
89d67ed9
AM		 8882013-02-04 Alan Modra <amodra@gmail.com>
889
890 * write.c (fixup_segment): Return void. Delete seg_reloc_count
891 related code.
892 (TC_ADJUST_RELOC_COUNT): Delete.
893 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
894
89072bd6
AM		 8952013-02-04 Alan Modra <amodra@gmail.com>
896
897 * po/POTFILES.in: Regenerate.
898
f9b2d544
NC		 8992013-01-30 Markos Chandras <markos.chandras@imgtec.com>
900
901 * config/tc-metag.c: Make SWAP instruction less permissive with
902 its operands.
903
392ca752
DD		 9042013-01-29 DJ Delorie <dj@redhat.com>
905
906 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
907 relocs in .word/.etc statements.
908
427d0db6
RM		 9092013-01-29 Roland McGrath <mcgrathr@google.com>
910
911 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
912 immediate value for 8-bit offset" error so it shows line info.
913
4faf939a
JM		 9142013-01-24 Joseph Myers <joseph@codesourcery.com>
915
916 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
917 for 64-bit output.
918
78c8d46c
NC		 9192013-01-24 Nick Clifton <nickc@redhat.com>
920
921 * config/tc-v850.c: Add support for e3v5 architecture.
922 * doc/c-v850.texi: Mention new support.
923
fb5b7503
NC		 9242013-01-23 Nick Clifton <nickc@redhat.com>
925
926 PR gas/15039
927 * config/tc-avr.c: Include dwarf2dbg.h.
928
8ce3d284
L		 9292013-01-18 H.J. Lu <hongjiu.lu@intel.com>
930
931 * config/tc-i386.c (reloc): Support size relocation only for ELF.
932 (tc_i386_fix_adjustable): Likewise.
933 (lex_got): Likewise.
934 (tc_gen_reloc): Likewise.
935
f5555712
YZ		 9362013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
937
938 * config/tc-aarch64.c (output_operand_error_record): Change to output
939 the out-of-range error message as value-expected message if there is
940 only one single value in the expected range.
941 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
942 LSL #0 as a programmer-friendly feature.
943
8fd4256d
L		 9442013-01-16 H.J. Lu <hongjiu.lu@intel.com>
945
946 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
947 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
948 BFD_RELOC_64_SIZE relocations.
949 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
950 for it.
951 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
952 relocations against local symbols.
953
a5840dce
AM		 9542013-01-16 Alan Modra <amodra@gmail.com>
955
956 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
957 finding some sort of toc syntax error, and break to avoid
958 compiler uninit warning.
959
af89796a
L		 9602013-01-15 H.J. Lu <hongjiu.lu@intel.com>
961
962 PR gas/15019
963 * config/tc-i386.c (lex_got): Increment length by 1 if the
964 relocation token is removed.
965
dd42f060
NC		 9662013-01-15 Nick Clifton <nickc@redhat.com>
967
968 * config/tc-v850.c (md_assemble): Allow signed values for
969 V850E_IMMEDIATE.
970
464e3686
SK		 9712013-01-11 Sean Keys <skeys@ipdatasys.com>
972
973 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 974 git to cvs.
464e3686 975
5817ffd1
PB		 9762013-01-10 Peter Bergner <bergner@vnet.ibm.com>
977
978 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
979 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
980 * config/tc-ppc.c (md_show_usage): Likewise.
981 (ppc_handle_align): Handle power8's group ending nop.
982
f4b1f6a9
SK		 9832013-01-10 Sean Keys <skeys@ipdatasys.com>
984
985 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 986 that the assember exits after the opcodes have been printed.
f4b1f6a9 987
34bca508
L		 9882013-01-10 H.J. Lu <hongjiu.lu@intel.com>
989
990 * app.c: Remove trailing white spaces.
991 * as.c: Likewise.
992 * as.h: Likewise.
993 * cond.c: Likewise.
994 * dw2gencfi.c: Likewise.
995 * dwarf2dbg.h: Likewise.
996 * ecoff.c: Likewise.
997 * input-file.c: Likewise.
998 * itbl-lex.h: Likewise.
999 * output-file.c: Likewise.
1000 * read.c: Likewise.
1001 * sb.c: Likewise.
1002 * subsegs.c: Likewise.
1003 * symbols.c: Likewise.
1004 * write.c: Likewise.
1005 * config/tc-i386.c: Likewise.
1006 * doc/Makefile.am: Likewise.
1007 * doc/Makefile.in: Likewise.
1008 * doc/c-aarch64.texi: Likewise.
1009 * doc/c-alpha.texi: Likewise.
1010 * doc/c-arc.texi: Likewise.
1011 * doc/c-arm.texi: Likewise.
1012 * doc/c-avr.texi: Likewise.
1013 * doc/c-bfin.texi: Likewise.
1014 * doc/c-cr16.texi: Likewise.
1015 * doc/c-d10v.texi: Likewise.
1016 * doc/c-d30v.texi: Likewise.
1017 * doc/c-h8300.texi: Likewise.
1018 * doc/c-hppa.texi: Likewise.
1019 * doc/c-i370.texi: Likewise.
1020 * doc/c-i386.texi: Likewise.
1021 * doc/c-i860.texi: Likewise.
1022 * doc/c-m32c.texi: Likewise.
1023 * doc/c-m32r.texi: Likewise.
1024 * doc/c-m68hc11.texi: Likewise.
1025 * doc/c-m68k.texi: Likewise.
1026 * doc/c-microblaze.texi: Likewise.
1027 * doc/c-mips.texi: Likewise.
1028 * doc/c-msp430.texi: Likewise.
1029 * doc/c-mt.texi: Likewise.
1030 * doc/c-s390.texi: Likewise.
1031 * doc/c-score.texi: Likewise.
1032 * doc/c-sh.texi: Likewise.
1033 * doc/c-sh64.texi: Likewise.
1034 * doc/c-tic54x.texi: Likewise.
1035 * doc/c-tic6x.texi: Likewise.
1036 * doc/c-v850.texi: Likewise.
1037 * doc/c-xc16x.texi: Likewise.
1038 * doc/c-xgate.texi: Likewise.
1039 * doc/c-xtensa.texi: Likewise.
1040 * doc/c-z80.texi: Likewise.
1041 * doc/internals.texi: Likewise.
1042
4c665b71
RM		 10432013-01-10 Roland McGrath <mcgrathr@google.com>
1044
1045 * hash.c (hash_new_sized): Make it global.
1046 * hash.h: Declare it.
1047 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1048 pass a small size.
1049
a3c62988
NC		 10502013-01-10 Will Newton <will.newton@imgtec.com>
1051
1052 * Makefile.am: Add Meta.
1053 * Makefile.in: Regenerate.
1054 * config/tc-metag.c: New file.
1055 * config/tc-metag.h: New file.
1056 * configure.tgt: Add Meta.
1057 * doc/Makefile.am: Add Meta.
1058 * doc/Makefile.in: Regenerate.
1059 * doc/all.texi: Add Meta.
1060 * doc/as.texiinfo: Document Meta options.
1061 * doc/c-metag.texi: New file.
1062
b37df7c4
SE		 10632013-01-09 Steve Ellcey <sellcey@mips.com>
1064
1065 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1066 calls.
1067 * config/tc-mips.c (internalError): Remove, replace with abort.
1068
a3251895
YZ		 10692013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1070
1071 * config/tc-aarch64.c (parse_operands): Change to compare the result
1072 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1073
8ab8155f
NC		 10742013-01-07 Nick Clifton <nickc@redhat.com>
1075
1076 PR gas/14887
1077 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1078 anticipated character.
1079 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1080 here as it is no longer needed.
1081
a4ac1c42
AS		 10822013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1083
1084 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1085 * doc/c-score.texi (SCORE-Opts): Likewise.
1086 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1087
e407c74b
NC		 10882013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1089
1090 * config/tc-mips.c: Add support for MIPS r5900.
1091 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1092 lq and sq.
1093 (can_swap_branch_p, get_append_method): Detect some conditional
1094 short loops to fix a bug on the r5900 by NOP in the branch delay
1095 slot.
1096 (M_MUL): Support 3 operands in multu on r5900.
1097 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1098 (s_mipsset): Force 32 bit floating point on r5900.
1099 (mips_ip): Check parameter range of instructions mfps and mtps on
1100 r5900.
1101 * configure.in: Detect CPU type when target string contains r5900
1102 (e.g. mips64r5900el-linux-gnu).
1103
62658407
L		 11042013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1105
1106 * as.c (parse_args): Update copyright year to 2013.
1107
95830fd1
YZ		 11082013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1109
1110 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1111 and "cortex57".
1112
517bb291 11132013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1114
517bb291
NC		 1115 PR gas/14987
1116 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1117 closing bracket.
d709e4e6 1118
517bb291 1119For older changes see ChangeLog-2012
08d56133 1120\f
517bb291 1121Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1122
1123Copying and distribution of this file, with or without modification,
1124are permitted in any medium without royalty provided the copyright
1125notice and this notice are preserved.
1126
08d56133
NC		 1127Local Variables:
1128mode: change-log
1129left-margin: 8
1130fill-column: 74
1131version-control: never
1132End:
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