projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 862be3fb L |
1 | 2011-01-16 H.J. Lu <hongjiu.lu@intel.com> |
| 2 | ||
| 3 | * config/tc-i386.c (disallow_64bit_disp): Renamed to ... | |
| 4 | (disallow_64bit_reloc): This. | |
| 5 | (md_assemble): Don't check movabs for x32 mode here. | |
| 6 | (i386_target_format): Updated. | |
| 7 | (tc_gen_reloc): Check if 64bit relocations are allowed. | |
| 8 | ||
| 7f56bc95 L |
9 | 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> |
| 10 | ||
| 11 | * config/tc-i386.c (disallow_64bit_disp): New. | |
| 12 | (x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with | |
| 13 | X86_64_ABI/X86_64_X32_ABI. | |
| 14 | (md_assemble): Don't allow movabs with relocation in x32 mode. | |
| 15 | (i386_target_format): Updated. | |
| 16 | ||
| 570561f7 L |
17 | 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> |
| 18 | ||
| 19 | * config/tc-i386.c (OPTION_N32): Renamed to ... | |
| 20 | (OPTION_X32): This. | |
| 21 | (md_longopts): Replace n32 with x32. | |
| 22 | (md_parse_option): Updated. | |
| 23 | (md_show_usage): Likewise. | |
| 24 | ||
| 4a22cb7c | 25 | * doc/c-i386.texi: Replace --n32 with --x32. |
| 570561f7 | 26 | |
| c95354ed MX |
27 | 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com> |
| 28 | ||
| 29 | * config/tc-mips.c (mips_ip): Update error messages. Take an | |
| 30 | unadjusted offset for "+c" argument. | |
| 31 | ||
| 7af8ed2d NC |
32 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
| 33 | ||
| 34 | * config/tc-i386.c (x86_elf_abi): Only define for targets that use | |
| 35 | it. | |
| 36 | ||
| cdf9ccec NC |
37 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
| 38 | ||
| 39 | * config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only | |
| 40 | part of the file. | |
| 41 | ||
| 0855e32b NS |
42 | 2011-01-10 Nathan Sidwell <nathan@codesourcery.com> |
| 43 | Glauber de Oliveira Costa <glommer@gmail.com> | |
| 44 | ||
| 45 | * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and | |
| 46 | .tlsdescseq directive. | |
| 47 | * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc | |
| 48 | following a symbol. | |
| 49 | (s_arm_tls_descseq): New directive. | |
| 50 | (md_pseudo_table): Add it. | |
| 51 | (encode_branch): Allow TLS_CALL relocs too. | |
| 52 | (do_t_blx, do_t_branch23): Use encode_branch. | |
| 53 | (reloc_names): Add tlsdesc and tlscall. | |
| 54 | (md_apply_fix): Process tls desc relocations. | |
| 55 | (tc_gen_reloc): Likewise. | |
| 56 | (arm_fix_adjustable): Likewise. | |
| 57 | ||
| 87973e9f QN |
58 | 2011-01-07 Quentin Neill <quentin.neill@amd.com> |
| 59 | ||
| 60 | * config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS. | |
| 61 | ||
| 62 | * doc/c-i386.texi (i386-BMI): New section. | |
| 63 | ||
| 12505806 PK |
64 | 2011-01-06 Paul Koning <ni1d@arrl.net> |
| 65 | ||
| 66 | * config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative | |
| 67 | references to absolute addresses. | |
| 68 | ||
| 9689e3a3 DD |
69 | 2011-01-05 DJ Delorie <dj@redhat.com> |
| 70 | ||
| 71 | * config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression | |
| 72 | instead of an RH_NEG32 one. | |
| 73 | ||
| 35cc6a0b L |
74 | 2011-01-05 Jonathan Wakely <jwakely.gcc@gmail.com> |
| 75 | ||
| 76 | * doc/c-i386.texi: Clarify --n32. | |
| 77 | ||
| f12dc422 L |
78 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 79 | ||
| 80 | * config/tc-i386.c (build_modrm_byte): Allow encoding 32/64bit | |
| 81 | integer registers in VEX.vvvv. Check register-only source | |
| 82 | operand when two source operands are swapped. Properly update | |
| 83 | destination when two source operands are swapped. | |
| 84 | ||
| 0db46eb4 L |
85 | 2011-01-01 H.J. Lu <hongjiu.lu@intel.com> |
| 86 | ||
| 87 | * gas.c (parse_args): Update copyright to 2011. | |
| 88 | ||
| 5b326c3e | 89 | For older changes see ChangeLog-2010 |
| 08d56133 NC |
90 | \f |
| 91 | Local Variables: | |
| 92 | mode: change-log | |
| 93 | left-margin: 8 | |
| 94 | fill-column: 74 | |
| 95 | version-control: never | |
| 96 | End: |