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833794fc
MR		 12013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * config/tc-mips.c (mips_set_options): Add insn32 member.
4 (mips_opts): Initialize it.
5 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
6 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
7 (md_longopts): Add "minsn32" and "mno-insn32" options.
8 (is_size_valid): Handle insn32 mode.
9 (md_assemble): Pass instruction string down to macro.
10 (brk_fmt): Add second dimension and insn32 mode initializers.
11 (mfhl_fmt): Likewise.
12 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
13 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
14 (macro_build_jalr, move_register): Handle insn32 mode.
15 (macro_build_branch_rs): Likewise.
16 (macro): Handle insn32 mode.
17 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
18 (mips_ip): Handle insn32 mode.
19 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
20 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
21 (mips_handle_align): Handle insn32 mode.
22 (md_show_usage): Add -minsn32 and -mno-insn32.
23
24 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
25 -mno-insn32 options.
26 (-minsn32, -mno-insn32): New options.
27 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
28 options.
29 (MIPS assembly options): New node. Document .set insn32 and
30 .set noinsn32.
31 (MIPS-Dependent): List the new node.
32
d1706f38
NC		 332013-06-25 Nick Clifton <nickc@redhat.com>
34
35 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
36 the PC in indirect addressing on 430xv2 parts.
37 (msp430_operands): Add version test to hardware bug encoding
38 restrictions.
39
477330fc
RM		 402013-06-24 Roland McGrath <mcgrathr@google.com>
41
d996d970
RM		 42 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
43 so it skips whitespace before it.
44 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
45
477330fc
RM		 46 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
47 (arm_reg_parse_multi): Skip whitespace first.
48 (parse_reg_list): Likewise.
49 (parse_vfp_reg_list): Likewise.
50 (s_arm_unwind_save_mmxwcg): Likewise.
51
24382199
NC		 522013-06-24 Nick Clifton <nickc@redhat.com>
53
54 PR gas/15623
55 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
56
c3678916
RS		 572013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
60
42429eac
RS		 612013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c: Assert that offsetT and valueT are at least
64 8 bytes in size.
65 (GPR_SMIN, GPR_SMAX): New macros.
66 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
67
f3ded42a
RS		 682013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
69
70 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
71 conditions. Remove any code deselected by them.
72 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
73
e8044f35
RS		 742013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
75
76 * NEWS: Note removal of ECOFF support.
77 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
78 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
79 (MULTI_CFILES): Remove config/e-mipsecoff.c.
80 * Makefile.in: Regenerate.
81 * configure.in: Remove MIPS ECOFF references.
82 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
83 Delete cases.
84 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
85 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
86 (mips-*-*): ...this single case.
87 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
88 MIPS emulations to be e-mipself*.
89 * configure: Regenerate.
90 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
91 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
92 (mips-*-sysv*): Remove coff and ecoff cases.
93 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
94 * ecoff.c: Remove reference to MIPS ECOFF.
95 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
96 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
97 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
98 (mips_hi_fixup): Tweak comment.
99 (append_insn): Require a howto.
100 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
101
98508b2a
RS		 1022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
105 Use "CPU" instead of "cpu".
106 * doc/c-mips.texi: Likewise.
107 (MIPS Opts): Rename to MIPS Options.
108 (MIPS option stack): Rename to MIPS Option Stack.
109 (MIPS ASE instruction generation overrides): Rename to
110 MIPS ASE Instruction Generation Overrides (for now).
111 (MIPS floating-point): Rename to MIPS Floating-Point.
112
fc16f8cc
RS		 1132013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
114
115 * doc/c-mips.texi (MIPS Macros): New section.
116 (MIPS Object): Replace with...
117 (MIPS Small Data): ...this new section.
118
5a7560b5
RS		 1192013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
120
121 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
122 Capitalize name. Use @kindex instead of @cindex for .set entries.
123
a1b86ab7
RS		 1242013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
125
126 * doc/c-mips.texi (MIPS Stabs): Remove section.
127
c6278170
RS		 1282013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
129
130 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
131 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
132 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
133 (ISA_SUPPORTS_VIRT64_ASE): Delete.
134 (mips_ase): New structure.
135 (mips_ases): New table.
136 (FP64_ASES): New macro.
137 (mips_ase_groups): New array.
138 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
139 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
140 functions.
141 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
142 (md_parse_option): Use mips_ases and mips_set_ase instead of
143 separate case statements for each ASE option.
144 (mips_after_parse_args): Use FP64_ASES. Use
145 mips_check_isa_supports_ases to check the ASEs against
146 other options.
147 (s_mipsset): Use mips_ases and mips_set_ase instead of
148 separate if statements for each ASE option. Use
149 mips_check_isa_supports_ases, even when a non-ASE option
150 is specified.
151
63a4bc21
KT		 1522013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
153
154 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
155
c31f3936
RS		 1562013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (md_shortopts, options, md_longopts)
159 (md_longopts_size): Move earlier in file.
160
846ef2d0
RS		 1612013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
164 with a single "ase" bitmask.
165 (mips_opts): Update accordingly.
166 (file_ase, file_ase_explicit): New variables.
167 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
168 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
169 (ISA_HAS_ROR): Adjust for mips_set_options change.
170 (is_opcode_valid): Take the base ase mask directly from mips_opts.
171 (mips_ip): Adjust for mips_set_options change.
172 (md_parse_option): Likewise. Update file_ase_explicit.
173 (mips_after_parse_args): Adjust for mips_set_options change.
174 Use bitmask operations to select the default ASEs. Set file_ase
175 rather than individual per-ASE variables.
176 (s_mipsset): Adjust for mips_set_options change.
177 (mips_elf_final_processing): Test file_ase rather than
178 file_ase_mdmx. Remove commented-out code.
179
d16afab6
RS		 1802013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
181
182 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
183 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
184 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
185 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
186 (mips_after_parse_args): Use the new "ase" field to choose
187 the default ASEs.
188 (mips_cpu_info_table): Move ASEs from the "flags" field to the
189 "ase" field.
190
e83a675f
RE		 1912013-06-18 Richard Earnshaw <rearnsha@arm.com>
192
193 * config/tc-arm.c (symbol_preemptible): New function.
194 (relax_branch): Use it.
195
7f3c4072
CM		 1962013-06-17 Catherine Moore <clm@codesourcery.com>
197 Maciej W. Rozycki <macro@codesourcery.com>
198 Chao-Ying Fu <fu@mips.com>
199
200 * config/tc-mips.c (mips_set_options): Add ase_eva.
201 (mips_set_options mips_opts): Add ase_eva.
202 (file_ase_eva): Declare.
203 (ISA_SUPPORTS_EVA_ASE): Define.
204 (IS_SEXT_9BIT_NUM): Define.
205 (MIPS_CPU_ASE_EVA): Define.
206 (is_opcode_valid): Add support for ase_eva.
207 (macro_build): Likewise.
208 (macro): Likewise.
209 (validate_mips_insn): Likewise.
210 (validate_micromips_insn): Likewise.
211 (mips_ip): Likewise.
212 (options): Add OPTION_EVA and OPTION_NO_EVA.
213 (md_longopts): Add -meva and -mno-eva.
214 (md_parse_option): Process new options.
215 (mips_after_parse_args): Check for valid EVA combinations.
216 (s_mipsset): Likewise.
217
e410add4
RS		 2182013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
219
220 * dwarf2dbg.h (dwarf2_move_insn): Declare.
221 * dwarf2dbg.c (line_subseg): Add pmove_tail.
222 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
223 (dwarf2_gen_line_info_1): Update call accordingly.
224 (dwarf2_move_insn): New function.
225 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
226
6a50d470
RS		 2272013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
228
229 Revert:
230
231 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
232
233 PR gas/13024
234 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
235 (dwarf2_gen_line_info_1): Delete.
236 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
237 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
238 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
239 (dwarf2_directive_loc): Push previous .locs instead of generating
240 them immediately.
241
f122319e
CF		 2422013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
243
244 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
245 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
246
909c7f9c
NC		 2472013-06-13 Nick Clifton <nickc@redhat.com>
248
249 PR gas/15602
250 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
251 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
252 function. Generates an error if the adjusted offset is out of a
253 16-bit range.
254
5d5755a7
SL		 2552013-06-12 Sandra Loosemore <sandra@codesourcery.com>
256
257 * config/tc-nios2.c (md_apply_fix): Mask constant
258 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
259
3bf0dbfb
MR		 2602013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
261
262 * config/tc-mips.c (append_insn): Don't do branch relaxation for
263 MIPS-3D instructions either.
264 (md_convert_frag): Update the COPx branch mask accordingly.
265
266 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
267 option.
268 * doc/as.texinfo (Overview): Add --relax-branch and
269 --no-relax-branch.
270 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
271 --no-relax-branch.
272
9daf7bab
SL		 2732013-06-09 Sandra Loosemore <sandra@codesourcery.com>
274
275 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
276 omitted.
277
d301a56b
RS		 2782013-06-08 Catherine Moore <clm@codesourcery.com>
279
280 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
281 (is_opcode_valid_16): Pass ase value to opcode_is_member.
282 (append_insn): Change INSN_xxxx to ASE_xxxx.
283
7bab7634
DC		 2842013-06-01 George Thomas <george.thomas@atmel.com>
285
286 * gas/config/tc-avr.c: Change ISA for devices with USB support to
287 AVR_ISA_XMEGAU
288
f60cf82f
L		 2892013-05-31 H.J. Lu <hongjiu.lu@intel.com>
290
291 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
292 for ELF.
293
a3f278e2
CM		 2942013-05-31 Paul Brook <paul@codesourcery.com>
295
296 gas/
297 * config/tc-mips.c (s_ehword): New.
298
067ec077
CM		 2992013-05-30 Paul Brook <paul@codesourcery.com>
300
301 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
302
d6101ac2
MR		 3032013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
304
305 * write.c (resolve_reloc_expr_symbols): On REL targets don't
306 convert relocs who have no relocatable field either. Rephrase
307 the conditional so that the PC-relative check is only applied
308 for REL targets.
309
f19ccbda
MR		 3102013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
311
312 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
313 calculation.
314
418009c2
YZ		 3152013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
316
317 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 318 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 319 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
320 (md_apply_fix): Likewise.
321 (aarch64_force_relocation): Likewise.
322
0a8897c7
KT		 3232013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
324
325 * config/tc-arm.c (it_fsm_post_encode): Improve
326 warning messages about deprecated IT block formats.
327
89d2a2a3
MS		 3282013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
329
330 * config/tc-aarch64.c (md_apply_fix): Move value range checking
331 inside fx_done condition.
332
c77c0862
RS		 3332013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
334
335 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
336
c0637f3a
PB		 3372013-05-20 Peter Bergner <bergner@vnet.ibm.com>
338
339 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
340 and clean up warning when using PRINT_OPCODE_TABLE.
341
5656a981
AM		 3422013-05-20 Alan Modra <amodra@gmail.com>
343
344 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
345 and data fixups performing shift/high adjust/sign extension on
346 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
347 when writing data fixups rather than recalculating size.
348
997b26e8
JBG		 3492013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
350
351 * doc/c-msp430.texi: Fix typo.
352
9f6e76f4
TG		 3532013-05-16 Tristan Gingold <gingold@adacore.com>
354
355 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
356 are also TOC symbols.
357
638d3803
NC		 3582013-05-16 Nick Clifton <nickc@redhat.com>
359
360 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
361 Add -mcpu command to specify core type.
997b26e8 362 * doc/c-msp430.texi: Update documentation.
638d3803 363
b015e599
AP		 3642013-05-09 Andrew Pinski <apinski@cavium.com>
365
366 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
367 (mips_opts): Update for the new field.
368 (file_ase_virt): New variable.
369 (ISA_SUPPORTS_VIRT_ASE): New macro.
370 (ISA_SUPPORTS_VIRT64_ASE): New macro.
371 (MIPS_CPU_ASE_VIRT): New define.
372 (is_opcode_valid): Handle ase_virt.
373 (macro_build): Handle "+J".
374 (validate_mips_insn): Likewise.
375 (mips_ip): Likewise.
376 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
377 (md_longopts): Add mvirt and mnovirt
378 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
379 (mips_after_parse_args): Handle ase_virt field.
380 (s_mipsset): Handle "virt" and "novirt".
381 (mips_elf_final_processing): Add a comment about virt ASE might need
382 a new flag.
383 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
384 * doc/c-mips.texi: Document -mvirt and -mno-virt.
385 Document ".set virt" and ".set novirt".
386
da8094d7
AM		 3872013-05-09 Alan Modra <amodra@gmail.com>
388
389 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
390 control of operand flag bits.
391
c5f8c205
AM		 3922013-05-07 Alan Modra <amodra@gmail.com>
393
394 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
395 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
396 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
397 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
398 (md_apply_fix): Set fx_no_overflow for assorted relocations.
399 Shift and sign-extend fieldval for use by some VLE reloc
400 operand->insert functions.
401
b47468a6
CM		 4022013-05-06 Paul Brook <paul@codesourcery.com>
403 Catherine Moore <clm@codesourcery.com>
404
c5f8c205
AM		 405 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
406 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 407 (md_apply_fix): Likewise.
408 (tc_gen_reloc): Likewise.
409
2de39019
CM		 4102013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
411
412 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
413 (mips_fix_adjustable): Adjust pc-relative check to use
414 limited_pc_reloc_p.
415
754e2bb9
RS		 4162013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
417
418 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
419 (s_mips_stab): Do not restrict to stabn only.
420
13761a11
NC		 4212013-05-02 Nick Clifton <nickc@redhat.com>
422
423 * config/tc-msp430.c: Add support for the MSP430X architecture.
424 Add code to insert a NOP instruction after any instruction that
425 might change the interrupt state.
426 Add support for the LARGE memory model.
427 Add code to initialise the .MSP430.attributes section.
428 * config/tc-msp430.h: Add support for the MSP430X architecture.
429 * doc/c-msp430.texi: Document the new -mL and -mN command line
430 options.
431 * NEWS: Mention support for the MSP430X architecture.
432
df26367c
MR		 4332013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
434
435 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
436 alpha*-*-linux*ecoff*.
437
f02d8318
CF		 4382013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
439
440 * config/tc-mips.c (mips_ip): Add sizelo.
441 For "+C", "+G", and "+H", set sizelo and compare against it.
442
b40bf0a2
NC		 4432013-04-29 Nick Clifton <nickc@redhat.com>
444
445 * as.c (Options): Add -gdwarf-sections.
446 (parse_args): Likewise.
447 * as.h (flag_dwarf_sections): Declare.
448 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
449 (process_entries): When -gdwarf-sections is enabled generate
450 fragmentary .debug_line sections.
451 (out_debug_line): Set the section for the .debug_line section end
452 symbol.
453 * doc/as.texinfo: Document -gdwarf-sections.
454 * NEWS: Mention -gdwarf-sections.
455
8eeccb77 4562013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 457
458 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
459 according to the target parameter. Don't call s_segm since s_segm
460 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
461 initialized yet.
462 (md_begin): Call s_segm according to target parameter from command
463 line.
464
49926cd0
AM		 4652013-04-25 Alan Modra <amodra@gmail.com>
466
467 * configure.in: Allow little-endian linux.
468 * configure: Regenerate.
469
e3031850
SL		 4702013-04-24 Sandra Loosemore <sandra@codesourcery.com>
471
472 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
473 "fstatus" control register to "eccinj".
474
cb948fc0
KT		 4752013-04-19 Kai Tietz <ktietz@redhat.com>
476
477 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
478
4455e9ad
JB		 4792013-04-15 Julian Brown <julian@codesourcery.com>
480
481 * expr.c (add_to_result, subtract_from_result): Make global.
482 * expr.h (add_to_result, subtract_from_result): Add prototypes.
483 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
484 subtract_from_result to handle extra bit of precision for .sleb128
485 directive operands.
486
956a6ba3
JB		 4872013-04-10 Julian Brown <julian@codesourcery.com>
488
489 * read.c (convert_to_bignum): Add sign parameter. Use it
490 instead of X_unsigned to determine sign of resulting bignum.
491 (emit_expr): Pass extra argument to convert_to_bignum.
492 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
493 X_extrabit to convert_to_bignum.
494 (parse_bitfield_cons): Set X_extrabit.
495 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
496 Initialise X_extrabit field as appropriate.
497 (add_to_result): New.
498 (subtract_from_result): New.
499 (expr): Use above.
500 * expr.h (expressionS): Add X_extrabit field.
501
eb9f3f00
JB		 5022013-04-10 Jan Beulich <jbeulich@suse.com>
503
504 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
505 register being PC when is_t or writeback, and use distinct
506 diagnostic for the latter case.
507
ccb84d65
JB		 5082013-04-10 Jan Beulich <jbeulich@suse.com>
509
510 * gas/config/tc-arm.c (parse_operands): Re-write
511 po_barrier_or_imm().
512 (do_barrier): Remove bogus constraint().
513 (do_t_barrier): Remove.
514
4d13caa0
NC		 5152013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
516
517 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
518 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
519 ATmega2564RFR2
520 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
521
16d02dc9
JB		 5222013-04-09 Jan Beulich <jbeulich@suse.com>
523
524 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
525 Use local variable Rt in more places.
526 (do_vmsr): Accept all control registers.
527
05ac0ffb
JB		 5282013-04-09 Jan Beulich <jbeulich@suse.com>
529
530 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
531 if there was none specified for moves between scalar and core
532 register.
533
2d51fb74
JB		 5342013-04-09 Jan Beulich <jbeulich@suse.com>
535
536 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
537 NEON_ALL_LANES case.
538
94dcf8bf
JB		 5392013-04-08 Jan Beulich <jbeulich@suse.com>
540
541 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
542 PC-relative VSTR.
543
1472d06f
JB		 5442013-04-08 Jan Beulich <jbeulich@suse.com>
545
546 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
547 entry to sp_fiq.
548
0c76cae8
AM		 5492013-04-03 Alan Modra <amodra@gmail.com>
550
551 * doc/as.texinfo: Add support to generate man options for h8300.
552 * doc/c-h8300.texi: Likewise.
553
92eb40d9
RR		 5542013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
555
556 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
557 Cortex-A57.
558
51dcdd4d
NC		 5592013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
560
561 PR binutils/15068
562 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
563
c5d685bf
NC		 5642013-03-26 Nick Clifton <nickc@redhat.com>
565
9b978282
NC		 566 PR gas/15295
567 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
568 start of the file each time.
569
c5d685bf
NC		 570 PR gas/15178
571 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
572 FreeBSD targets.
573
9699c833
TG		 5742013-03-26 Douglas B Rupp <rupp@gnat.com>
575
576 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
577 after fixup.
578
4755303e
WN		 5792013-03-21 Will Newton <will.newton@linaro.org>
580
581 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
582 pc-relative str instructions in Thumb mode.
583
81f5558e
NC		 5842013-03-21 Michael Schewe <michael.schewe@gmx.net>
585
586 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
587 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
588 R_H8_DISP32A16.
589 * config/tc-h8300.h: Remove duplicated defines.
590
71863e73
NC		 5912013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
592
593 PR gas/15282
594 * tc-avr.c (mcu_has_3_byte_pc): New function.
595 (tc_cfi_frame_initial_instructions): Call it to find return
596 address size.
597
795b8e6b
NC		 5982013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
599
600 PR gas/15095
601 * config/tc-tic6x.c (tic6x_try_encode): Handle
602 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
603 encode register pair numbers when required.
604
ba86b375
WN		 6052013-03-15 Will Newton <will.newton@linaro.org>
606
607 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
608 in vstr in Thumb mode for pre-ARMv7 cores.
609
9e6f3811
AS		 6102013-03-14 Andreas Schwab <schwab@suse.de>
611
612 * doc/c-arc.texi (ARC Directives): Revert last change and use
613 @itemize instead of @table.
614 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
615
b10bf8c5
NC		 6162013-03-14 Nick Clifton <nickc@redhat.com>
617
618 PR gas/15273
619 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
620 NULL message, instead just check ARM_CPU_IS_ANY directly.
621
ba724cfc
NC		 6222013-03-14 Nick Clifton <nickc@redhat.com>
623
624 PR gas/15212
9e6f3811 625 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 626 for table format.
627 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
628 to the @item directives.
629 (ARM-Neon-Alignment): Move to correct place in the document.
630 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
631 formatting.
632 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
633 @smallexample.
634
531a94fd
SL		 6352013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
636
637 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
638 case. Add default BAD_CASE to switch.
639
dad60f8e
SL		 6402013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
641
642 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
643 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
644
dd5181d5
KT		 6452013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
646
647 * config/tc-arm.c (crc_ext_armv8): New feature set.
648 (UNPRED_REG): New macro.
649 (do_crc32_1): New function.
650 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
651 do_crc32ch, do_crc32cw): Likewise.
652 (TUEc): New macro.
653 (insns): Add entries for crc32 mnemonics.
654 (arm_extensions): Add entry for crc.
655
8e723a10
CLT		 6562013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
657
658 * write.h (struct fix): Add fx_dot_frag field.
659 (dot_frag): Declare.
660 * write.c (dot_frag): New variable.
661 (fix_new_internal): Set fx_dot_frag field with dot_frag.
662 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
663 * expr.c (expr): Save value of frag_now in dot_frag when setting
664 dot_value.
665 * read.c (emit_expr): Likewise. Delete comments.
666
be05d201
L		 6672013-03-07 H.J. Lu <hongjiu.lu@intel.com>
668
669 * config/tc-i386.c (flag_code_names): Removed.
670 (i386_index_check): Rewrote.
671
62b0d0d5
YZ		 6722013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
673
674 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
675 add comment.
676 (aarch64_double_precision_fmovable): New function.
677 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
678 function; handle hexadecimal representation of IEEE754 encoding.
679 (parse_operands): Update the call to parse_aarch64_imm_float.
680
165de32a
L		 6812013-02-28 H.J. Lu <hongjiu.lu@intel.com>
682
683 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
684 (check_hle): Updated.
685 (md_assemble): Likewise.
686 (parse_insn): Likewise.
687
d5de92cf
L		 6882013-02-28 H.J. Lu <hongjiu.lu@intel.com>
689
690 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 691 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 692 (parse_insn): Remove expecting_string_instruction. Set
693 i.rep_prefix.
694
e60bb1dd
YZ		 6952013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
696
697 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
698
aeebdd9b
YZ		 6992013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
700
701 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
702 for system registers.
703
4107ae22
DD		 7042013-02-27 DJ Delorie <dj@redhat.com>
705
706 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
707 (rl78_op): Handle %code().
708 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
709 (tc_gen_reloc): Likwise; convert to a computed reloc.
710 (md_apply_fix): Likewise.
711
151fa98f
NC		 7122013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
713
714 * config/rl78-parse.y: Fix encoding of DIVWU insn.
715
70a8bc5b 7162013-02-25 Terry Guo <terry.guo@arm.com>
717
718 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
719 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
720 list of accepted CPUs.
721
5c111e37
L		 7222013-02-19 H.J. Lu <hongjiu.lu@intel.com>
723
724 PR gas/15159
725 * config/tc-i386.c (cpu_arch): Add ".smap".
726
727 * doc/c-i386.texi: Document smap.
728
8a75745d
MR		 7292013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
730
731 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
732 mips_assembling_insn appropriately.
733 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
734
79850f26
MR		 7352013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
736
cf29fc61 737 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 738 extraneous braces.
739
4c261dff
NC		 7402013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
741
5c111e37 742 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 743
ea33f281
NC		 7442013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
745
746 * configure.tgt: Add nios2-*-rtems*.
747
a1ccaec9
YZ		 7482013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
749
750 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
751 NULL.
752
0aa27725
RS		 7532013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
754
755 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
756 (macro): Use it. Assert that trunc.w.s is not used for r5900.
757
da4339ed
NC		 7582013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
759
760 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
761 core.
762
36591ba1 7632013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 764 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 765
766 Based on patches from Altera Corporation.
767
768 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
769 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
770 * Makefile.in: Regenerated.
771 * configure.tgt: Add case for nios2*-linux*.
772 * config/obj-elf.c: Conditionally include elf/nios2.h.
773 * config/tc-nios2.c: New file.
774 * config/tc-nios2.h: New file.
775 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
776 * doc/Makefile.in: Regenerated.
777 * doc/all.texi: Set NIOSII.
778 * doc/as.texinfo (Overview): Add Nios II options.
779 (Machine Dependencies): Include c-nios2.texi.
780 * doc/c-nios2.texi: New file.
781 * NEWS: Note Altera Nios II support.
782
94d4433a
AM		 7832013-02-06 Alan Modra <amodra@gmail.com>
784
785 PR gas/14255
786 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
787 Don't skip fixups with fx_subsy non-NULL.
788 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
789 with fx_subsy non-NULL.
790
ace9af6f
L		 7912013-02-04 H.J. Lu <hongjiu.lu@intel.com>
792
793 * doc/c-metag.texi: Add "@c man" markers.
794
89d67ed9
AM		 7952013-02-04 Alan Modra <amodra@gmail.com>
796
797 * write.c (fixup_segment): Return void. Delete seg_reloc_count
798 related code.
799 (TC_ADJUST_RELOC_COUNT): Delete.
800 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
801
89072bd6
AM		 8022013-02-04 Alan Modra <amodra@gmail.com>
803
804 * po/POTFILES.in: Regenerate.
805
f9b2d544
NC		 8062013-01-30 Markos Chandras <markos.chandras@imgtec.com>
807
808 * config/tc-metag.c: Make SWAP instruction less permissive with
809 its operands.
810
392ca752
DD		 8112013-01-29 DJ Delorie <dj@redhat.com>
812
813 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
814 relocs in .word/.etc statements.
815
427d0db6
RM		 8162013-01-29 Roland McGrath <mcgrathr@google.com>
817
818 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
819 immediate value for 8-bit offset" error so it shows line info.
820
4faf939a
JM		 8212013-01-24 Joseph Myers <joseph@codesourcery.com>
822
823 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
824 for 64-bit output.
825
78c8d46c
NC		 8262013-01-24 Nick Clifton <nickc@redhat.com>
827
828 * config/tc-v850.c: Add support for e3v5 architecture.
829 * doc/c-v850.texi: Mention new support.
830
fb5b7503
NC		 8312013-01-23 Nick Clifton <nickc@redhat.com>
832
833 PR gas/15039
834 * config/tc-avr.c: Include dwarf2dbg.h.
835
8ce3d284
L		 8362013-01-18 H.J. Lu <hongjiu.lu@intel.com>
837
838 * config/tc-i386.c (reloc): Support size relocation only for ELF.
839 (tc_i386_fix_adjustable): Likewise.
840 (lex_got): Likewise.
841 (tc_gen_reloc): Likewise.
842
f5555712
YZ		 8432013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
844
845 * config/tc-aarch64.c (output_operand_error_record): Change to output
846 the out-of-range error message as value-expected message if there is
847 only one single value in the expected range.
848 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
849 LSL #0 as a programmer-friendly feature.
850
8fd4256d
L		 8512013-01-16 H.J. Lu <hongjiu.lu@intel.com>
852
853 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
854 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
855 BFD_RELOC_64_SIZE relocations.
856 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
857 for it.
858 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
859 relocations against local symbols.
860
a5840dce
AM		 8612013-01-16 Alan Modra <amodra@gmail.com>
862
863 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
864 finding some sort of toc syntax error, and break to avoid
865 compiler uninit warning.
866
af89796a
L		 8672013-01-15 H.J. Lu <hongjiu.lu@intel.com>
868
869 PR gas/15019
870 * config/tc-i386.c (lex_got): Increment length by 1 if the
871 relocation token is removed.
872
dd42f060
NC		 8732013-01-15 Nick Clifton <nickc@redhat.com>
874
875 * config/tc-v850.c (md_assemble): Allow signed values for
876 V850E_IMMEDIATE.
877
464e3686
SK		 8782013-01-11 Sean Keys <skeys@ipdatasys.com>
879
880 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 881 git to cvs.
464e3686 882
5817ffd1
PB		 8832013-01-10 Peter Bergner <bergner@vnet.ibm.com>
884
885 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
886 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
887 * config/tc-ppc.c (md_show_usage): Likewise.
888 (ppc_handle_align): Handle power8's group ending nop.
889
f4b1f6a9
SK		 8902013-01-10 Sean Keys <skeys@ipdatasys.com>
891
892 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 893 that the assember exits after the opcodes have been printed.
f4b1f6a9 894
34bca508
L		 8952013-01-10 H.J. Lu <hongjiu.lu@intel.com>
896
897 * app.c: Remove trailing white spaces.
898 * as.c: Likewise.
899 * as.h: Likewise.
900 * cond.c: Likewise.
901 * dw2gencfi.c: Likewise.
902 * dwarf2dbg.h: Likewise.
903 * ecoff.c: Likewise.
904 * input-file.c: Likewise.
905 * itbl-lex.h: Likewise.
906 * output-file.c: Likewise.
907 * read.c: Likewise.
908 * sb.c: Likewise.
909 * subsegs.c: Likewise.
910 * symbols.c: Likewise.
911 * write.c: Likewise.
912 * config/tc-i386.c: Likewise.
913 * doc/Makefile.am: Likewise.
914 * doc/Makefile.in: Likewise.
915 * doc/c-aarch64.texi: Likewise.
916 * doc/c-alpha.texi: Likewise.
917 * doc/c-arc.texi: Likewise.
918 * doc/c-arm.texi: Likewise.
919 * doc/c-avr.texi: Likewise.
920 * doc/c-bfin.texi: Likewise.
921 * doc/c-cr16.texi: Likewise.
922 * doc/c-d10v.texi: Likewise.
923 * doc/c-d30v.texi: Likewise.
924 * doc/c-h8300.texi: Likewise.
925 * doc/c-hppa.texi: Likewise.
926 * doc/c-i370.texi: Likewise.
927 * doc/c-i386.texi: Likewise.
928 * doc/c-i860.texi: Likewise.
929 * doc/c-m32c.texi: Likewise.
930 * doc/c-m32r.texi: Likewise.
931 * doc/c-m68hc11.texi: Likewise.
932 * doc/c-m68k.texi: Likewise.
933 * doc/c-microblaze.texi: Likewise.
934 * doc/c-mips.texi: Likewise.
935 * doc/c-msp430.texi: Likewise.
936 * doc/c-mt.texi: Likewise.
937 * doc/c-s390.texi: Likewise.
938 * doc/c-score.texi: Likewise.
939 * doc/c-sh.texi: Likewise.
940 * doc/c-sh64.texi: Likewise.
941 * doc/c-tic54x.texi: Likewise.
942 * doc/c-tic6x.texi: Likewise.
943 * doc/c-v850.texi: Likewise.
944 * doc/c-xc16x.texi: Likewise.
945 * doc/c-xgate.texi: Likewise.
946 * doc/c-xtensa.texi: Likewise.
947 * doc/c-z80.texi: Likewise.
948 * doc/internals.texi: Likewise.
949
4c665b71
RM		 9502013-01-10 Roland McGrath <mcgrathr@google.com>
951
952 * hash.c (hash_new_sized): Make it global.
953 * hash.h: Declare it.
954 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
955 pass a small size.
956
a3c62988
NC		 9572013-01-10 Will Newton <will.newton@imgtec.com>
958
959 * Makefile.am: Add Meta.
960 * Makefile.in: Regenerate.
961 * config/tc-metag.c: New file.
962 * config/tc-metag.h: New file.
963 * configure.tgt: Add Meta.
964 * doc/Makefile.am: Add Meta.
965 * doc/Makefile.in: Regenerate.
966 * doc/all.texi: Add Meta.
967 * doc/as.texiinfo: Document Meta options.
968 * doc/c-metag.texi: New file.
969
b37df7c4
SE		 9702013-01-09 Steve Ellcey <sellcey@mips.com>
971
972 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
973 calls.
974 * config/tc-mips.c (internalError): Remove, replace with abort.
975
a3251895
YZ		 9762013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
977
978 * config/tc-aarch64.c (parse_operands): Change to compare the result
979 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
980
8ab8155f
NC		 9812013-01-07 Nick Clifton <nickc@redhat.com>
982
983 PR gas/14887
984 * config/tc-arm.c (skip_past_char): Skip whitespace before the
985 anticipated character.
986 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
987 here as it is no longer needed.
988
a4ac1c42
AS		 9892013-01-06 Andreas Schwab <schwab@linux-m68k.org>
990
991 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
992 * doc/c-score.texi (SCORE-Opts): Likewise.
993 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
994
e407c74b
NC		 9952013-01-04 Juergen Urban <JuergenUrban@gmx.de>
996
997 * config/tc-mips.c: Add support for MIPS r5900.
998 Add M_LQ_AB and M_SQ_AB to support large values for instructions
999 lq and sq.
1000 (can_swap_branch_p, get_append_method): Detect some conditional
1001 short loops to fix a bug on the r5900 by NOP in the branch delay
1002 slot.
1003 (M_MUL): Support 3 operands in multu on r5900.
1004 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1005 (s_mipsset): Force 32 bit floating point on r5900.
1006 (mips_ip): Check parameter range of instructions mfps and mtps on
1007 r5900.
1008 * configure.in: Detect CPU type when target string contains r5900
1009 (e.g. mips64r5900el-linux-gnu).
1010
62658407
L		 10112013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1012
1013 * as.c (parse_args): Update copyright year to 2013.
1014
95830fd1
YZ		 10152013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1016
1017 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1018 and "cortex57".
1019
517bb291 10202013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1021
517bb291
NC		 1022 PR gas/14987
1023 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1024 closing bracket.
d709e4e6 1025
517bb291 1026For older changes see ChangeLog-2012
08d56133 1027\f
517bb291 1028Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1029
1030Copying and distribution of this file, with or without modification,
1031are permitted in any medium without royalty provided the copyright
1032notice and this notice are preserved.
1033
08d56133
NC		 1034Local Variables:
1035mode: change-log
1036left-margin: 8
1037fill-column: 74
1038version-control: never
1039End:
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