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e077a1c8
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12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (insn_insert_operand): New function.
4 (macro_build, mips16_macro_build): Put null character check
5 in the for loop and convert continues to breaks. Use operand
6 structures to handle constant operands.
7
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82013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
9
10 * config/tc-mips.c (validate_mips_insn): Move further up file.
11 Add insn_bits and decode_operand arguments. Use the mips_operand
12 fields to work out which bits an operand occupies. Detect double
13 definitions.
14 (validate_micromips_insn): Move further up file. Call into
15 validate_mips_insn.
16
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172013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
18
19 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
20
c8276761
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212013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
22
23 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
24 and "~".
25 (macro): Update accordingly.
26
77bd4346
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272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
28
29 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
30 (imm_reloc): Delete.
31 (md_assemble): Remove imm_reloc handling.
32 (mips_ip): Update commentary. Use offset_expr and offset_reloc
33 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
34 Use a temporary array rather than imm_reloc when parsing
35 constant expressions. Remove imm_reloc initialization.
36 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
37 for the relaxable field. Use a relax_char variable to track the
38 type of this field. Remove imm_reloc initialization.
39
cc537e56
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402013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
41
42 * config/tc-mips.c (mips16_ip): Handle "I".
43
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442013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
45
46 * config/tc-mips.c (mips_flag_nan2008): New variable.
47 (options): Add OPTION_NAN enum value.
48 (md_longopts): Handle it.
49 (md_parse_option): Likewise.
50 (s_nan): New function.
51 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
52 (md_show_usage): Add -mnan.
53
54 * doc/as.texinfo (Overview): Add -mnan.
55 * doc/c-mips.texi (MIPS Opts): Document -mnan.
56 (MIPS NaN Encodings): New node. Document .nan directive.
57 (MIPS-Dependent): List the new node.
58
c1094734
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592013-07-09 Tristan Gingold <gingold@adacore.com>
60
61 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
62
0cbbe1b8
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632013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
64
65 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
66 for 'A' and assume that the constant has been elided if the result
67 is an O_register.
68
f2ae14a1
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692013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
70
71 * config/tc-mips.c (gprel16_reloc_p): New function.
72 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
73 BFD_RELOC_UNUSED.
74 (offset_high_part, small_offset_p): New functions.
75 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
76 register load and store macros, handle the 16-bit offset case first.
77 If a 16-bit offset is not suitable for the instruction we're
78 generating, load it into the temporary register using
79 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
80 M_L_DAB code once the address has been constructed. For double load
81 and store macros, again handle the 16-bit offset case first.
82 If the second register cannot be accessed from the same high
83 part as the first, load it into AT using ADDRESS_ADDI_INSN.
84 Fix the handling of LD in cases where the first register is the
85 same as the base. Also handle the case where the offset is
86 not 16 bits and the second register cannot be accessed from the
87 same high part as the first. For unaligned loads and stores,
88 fuse the offbits == 12 and old "ab" handling. Apply this handling
89 whenever the second offset needs a different high part from the first.
90 Construct the offset using ADDRESS_ADDI_INSN where possible,
91 for offbits == 16 as well as offbits == 12. Use offset_reloc
92 when constructing the individual loads and stores.
93 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
94 and offset_reloc before matching against a particular opcode.
95 Handle elided 'A' constants. Allow 'A' constants to use
96 relocation operators.
97
5c324c16
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982013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
99
100 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
101 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
102 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
103
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1042013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
105
106 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
107 Require the msb to be <= 31 for "+s". Check that the size is <= 31
108 for both "+s" and "+S".
109
27c5c572
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1102013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
111
112 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
113 (mips_ip, mips16_ip): Handle "+i".
114
e76ff5ab
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1152013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
118 (micromips_to_32_reg_h_map): Rename to...
119 (micromips_to_32_reg_h_map1): ...this.
120 (micromips_to_32_reg_i_map): Rename to...
121 (micromips_to_32_reg_h_map2): ...this.
122 (mips_lookup_reg_pair): New function.
123 (gpr_write_mask, macro): Adjust after above renaming.
124 (validate_micromips_insn): Remove "mi" handling.
125 (mips_ip): Likewise. Parse both registers in a pair for "mh".
126
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1272013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
130 (mips_ip): Remove "+D" and "+T" handling.
131
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1322013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
133
134 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
135 relocs.
136
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1372013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
138
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139 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
140
1412013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
142
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143 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
144 (aarch64_force_relocation): Likewise.
145
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1462013-07-02 Alan Modra <amodra@gmail.com>
147
148 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
149
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MR
1502013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
151
152 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
153 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
154 Replace @sc{mips16} with literal `MIPS16'.
155 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
156
a6bb11b2
YZ
1572013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
158
159 * config/tc-aarch64.c (reloc_table): Replace
160 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
161 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
162 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
163 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
164 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
165 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
166 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
167 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
168 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
169 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
170 (aarch64_force_relocation): Likewise.
171
cec5225b
YZ
1722013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
173
174 * config/tc-aarch64.c (ilp32_p): New static variable.
175 (elf64_aarch64_target_format): Return the target according to the
176 value of 'ilp32_p'.
177 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
178 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
179 (aarch64_dwarf2_addr_size): New function.
180 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
181 (DWARF2_ADDR_SIZE): New define.
182
e335d9cb
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1832013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
186
18870af7
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1872013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
188
189 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
190
833794fc
MR
1912013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
192
193 * config/tc-mips.c (mips_set_options): Add insn32 member.
194 (mips_opts): Initialize it.
195 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
196 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
197 (md_longopts): Add "minsn32" and "mno-insn32" options.
198 (is_size_valid): Handle insn32 mode.
199 (md_assemble): Pass instruction string down to macro.
200 (brk_fmt): Add second dimension and insn32 mode initializers.
201 (mfhl_fmt): Likewise.
202 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
203 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
204 (macro_build_jalr, move_register): Handle insn32 mode.
205 (macro_build_branch_rs): Likewise.
206 (macro): Handle insn32 mode.
207 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
208 (mips_ip): Handle insn32 mode.
209 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
210 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
211 (mips_handle_align): Handle insn32 mode.
212 (md_show_usage): Add -minsn32 and -mno-insn32.
213
214 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
215 -mno-insn32 options.
216 (-minsn32, -mno-insn32): New options.
217 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
218 options.
219 (MIPS assembly options): New node. Document .set insn32 and
220 .set noinsn32.
221 (MIPS-Dependent): List the new node.
222
d1706f38
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2232013-06-25 Nick Clifton <nickc@redhat.com>
224
225 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
226 the PC in indirect addressing on 430xv2 parts.
227 (msp430_operands): Add version test to hardware bug encoding
228 restrictions.
229
477330fc
RM
2302013-06-24 Roland McGrath <mcgrathr@google.com>
231
d996d970
RM
232 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
233 so it skips whitespace before it.
234 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
235
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RM
236 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
237 (arm_reg_parse_multi): Skip whitespace first.
238 (parse_reg_list): Likewise.
239 (parse_vfp_reg_list): Likewise.
240 (s_arm_unwind_save_mmxwcg): Likewise.
241
24382199
NC
2422013-06-24 Nick Clifton <nickc@redhat.com>
243
244 PR gas/15623
245 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
246
c3678916
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2472013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
248
249 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
250
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RS
2512013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
252
253 * config/tc-mips.c: Assert that offsetT and valueT are at least
254 8 bytes in size.
255 (GPR_SMIN, GPR_SMAX): New macros.
256 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
257
f3ded42a
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2582013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
259
260 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
261 conditions. Remove any code deselected by them.
262 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
263
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2642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
265
266 * NEWS: Note removal of ECOFF support.
267 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
268 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
269 (MULTI_CFILES): Remove config/e-mipsecoff.c.
270 * Makefile.in: Regenerate.
271 * configure.in: Remove MIPS ECOFF references.
272 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
273 Delete cases.
274 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
275 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
276 (mips-*-*): ...this single case.
277 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
278 MIPS emulations to be e-mipself*.
279 * configure: Regenerate.
280 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
281 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
282 (mips-*-sysv*): Remove coff and ecoff cases.
283 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
284 * ecoff.c: Remove reference to MIPS ECOFF.
285 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
286 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
287 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
288 (mips_hi_fixup): Tweak comment.
289 (append_insn): Require a howto.
290 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
291
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2922013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
295 Use "CPU" instead of "cpu".
296 * doc/c-mips.texi: Likewise.
297 (MIPS Opts): Rename to MIPS Options.
298 (MIPS option stack): Rename to MIPS Option Stack.
299 (MIPS ASE instruction generation overrides): Rename to
300 MIPS ASE Instruction Generation Overrides (for now).
301 (MIPS floating-point): Rename to MIPS Floating-Point.
302
fc16f8cc
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3032013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
304
305 * doc/c-mips.texi (MIPS Macros): New section.
306 (MIPS Object): Replace with...
307 (MIPS Small Data): ...this new section.
308
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3092013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
310
311 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
312 Capitalize name. Use @kindex instead of @cindex for .set entries.
313
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3142013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
315
316 * doc/c-mips.texi (MIPS Stabs): Remove section.
317
c6278170
RS
3182013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
319
320 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
321 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
322 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
323 (ISA_SUPPORTS_VIRT64_ASE): Delete.
324 (mips_ase): New structure.
325 (mips_ases): New table.
326 (FP64_ASES): New macro.
327 (mips_ase_groups): New array.
328 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
329 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
330 functions.
331 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
332 (md_parse_option): Use mips_ases and mips_set_ase instead of
333 separate case statements for each ASE option.
334 (mips_after_parse_args): Use FP64_ASES. Use
335 mips_check_isa_supports_ases to check the ASEs against
336 other options.
337 (s_mipsset): Use mips_ases and mips_set_ase instead of
338 separate if statements for each ASE option. Use
339 mips_check_isa_supports_ases, even when a non-ASE option
340 is specified.
341
63a4bc21
KT
3422013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
343
344 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
345
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3462013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
347
348 * config/tc-mips.c (md_shortopts, options, md_longopts)
349 (md_longopts_size): Move earlier in file.
350
846ef2d0
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3512013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
352
353 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
354 with a single "ase" bitmask.
355 (mips_opts): Update accordingly.
356 (file_ase, file_ase_explicit): New variables.
357 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
358 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
359 (ISA_HAS_ROR): Adjust for mips_set_options change.
360 (is_opcode_valid): Take the base ase mask directly from mips_opts.
361 (mips_ip): Adjust for mips_set_options change.
362 (md_parse_option): Likewise. Update file_ase_explicit.
363 (mips_after_parse_args): Adjust for mips_set_options change.
364 Use bitmask operations to select the default ASEs. Set file_ase
365 rather than individual per-ASE variables.
366 (s_mipsset): Adjust for mips_set_options change.
367 (mips_elf_final_processing): Test file_ase rather than
368 file_ase_mdmx. Remove commented-out code.
369
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3702013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
371
372 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
373 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
374 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
375 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
376 (mips_after_parse_args): Use the new "ase" field to choose
377 the default ASEs.
378 (mips_cpu_info_table): Move ASEs from the "flags" field to the
379 "ase" field.
380
e83a675f
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3812013-06-18 Richard Earnshaw <rearnsha@arm.com>
382
383 * config/tc-arm.c (symbol_preemptible): New function.
384 (relax_branch): Use it.
385
7f3c4072
CM
3862013-06-17 Catherine Moore <clm@codesourcery.com>
387 Maciej W. Rozycki <macro@codesourcery.com>
388 Chao-Ying Fu <fu@mips.com>
389
390 * config/tc-mips.c (mips_set_options): Add ase_eva.
391 (mips_set_options mips_opts): Add ase_eva.
392 (file_ase_eva): Declare.
393 (ISA_SUPPORTS_EVA_ASE): Define.
394 (IS_SEXT_9BIT_NUM): Define.
395 (MIPS_CPU_ASE_EVA): Define.
396 (is_opcode_valid): Add support for ase_eva.
397 (macro_build): Likewise.
398 (macro): Likewise.
399 (validate_mips_insn): Likewise.
400 (validate_micromips_insn): Likewise.
401 (mips_ip): Likewise.
402 (options): Add OPTION_EVA and OPTION_NO_EVA.
403 (md_longopts): Add -meva and -mno-eva.
404 (md_parse_option): Process new options.
405 (mips_after_parse_args): Check for valid EVA combinations.
406 (s_mipsset): Likewise.
407
e410add4
RS
4082013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
409
410 * dwarf2dbg.h (dwarf2_move_insn): Declare.
411 * dwarf2dbg.c (line_subseg): Add pmove_tail.
412 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
413 (dwarf2_gen_line_info_1): Update call accordingly.
414 (dwarf2_move_insn): New function.
415 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
416
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4172013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
418
419 Revert:
420
421 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
422
423 PR gas/13024
424 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
425 (dwarf2_gen_line_info_1): Delete.
426 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
427 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
428 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
429 (dwarf2_directive_loc): Push previous .locs instead of generating
430 them immediately.
431
f122319e
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4322013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
433
434 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
435 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
436
909c7f9c
NC
4372013-06-13 Nick Clifton <nickc@redhat.com>
438
439 PR gas/15602
440 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
441 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
442 function. Generates an error if the adjusted offset is out of a
443 16-bit range.
444
5d5755a7
SL
4452013-06-12 Sandra Loosemore <sandra@codesourcery.com>
446
447 * config/tc-nios2.c (md_apply_fix): Mask constant
448 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
449
3bf0dbfb
MR
4502013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
451
452 * config/tc-mips.c (append_insn): Don't do branch relaxation for
453 MIPS-3D instructions either.
454 (md_convert_frag): Update the COPx branch mask accordingly.
455
456 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
457 option.
458 * doc/as.texinfo (Overview): Add --relax-branch and
459 --no-relax-branch.
460 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
461 --no-relax-branch.
462
9daf7bab
SL
4632013-06-09 Sandra Loosemore <sandra@codesourcery.com>
464
465 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
466 omitted.
467
d301a56b
RS
4682013-06-08 Catherine Moore <clm@codesourcery.com>
469
470 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
471 (is_opcode_valid_16): Pass ase value to opcode_is_member.
472 (append_insn): Change INSN_xxxx to ASE_xxxx.
473
7bab7634
DC
4742013-06-01 George Thomas <george.thomas@atmel.com>
475
476 * gas/config/tc-avr.c: Change ISA for devices with USB support to
477 AVR_ISA_XMEGAU
478
f60cf82f
L
4792013-05-31 H.J. Lu <hongjiu.lu@intel.com>
480
481 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
482 for ELF.
483
a3f278e2
CM
4842013-05-31 Paul Brook <paul@codesourcery.com>
485
486 gas/
487 * config/tc-mips.c (s_ehword): New.
488
067ec077
CM
4892013-05-30 Paul Brook <paul@codesourcery.com>
490
491 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
492
d6101ac2
MR
4932013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
494
495 * write.c (resolve_reloc_expr_symbols): On REL targets don't
496 convert relocs who have no relocatable field either. Rephrase
497 the conditional so that the PC-relative check is only applied
498 for REL targets.
499
f19ccbda
MR
5002013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
501
502 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
503 calculation.
504
418009c2
YZ
5052013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
506
507 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 508 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
509 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
510 (md_apply_fix): Likewise.
511 (aarch64_force_relocation): Likewise.
512
0a8897c7
KT
5132013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
514
515 * config/tc-arm.c (it_fsm_post_encode): Improve
516 warning messages about deprecated IT block formats.
517
89d2a2a3
MS
5182013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
519
520 * config/tc-aarch64.c (md_apply_fix): Move value range checking
521 inside fx_done condition.
522
c77c0862
RS
5232013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
524
525 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
526
c0637f3a
PB
5272013-05-20 Peter Bergner <bergner@vnet.ibm.com>
528
529 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
530 and clean up warning when using PRINT_OPCODE_TABLE.
531
5656a981
AM
5322013-05-20 Alan Modra <amodra@gmail.com>
533
534 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
535 and data fixups performing shift/high adjust/sign extension on
536 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
537 when writing data fixups rather than recalculating size.
538
997b26e8
JBG
5392013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
540
541 * doc/c-msp430.texi: Fix typo.
542
9f6e76f4
TG
5432013-05-16 Tristan Gingold <gingold@adacore.com>
544
545 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
546 are also TOC symbols.
547
638d3803
NC
5482013-05-16 Nick Clifton <nickc@redhat.com>
549
550 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
551 Add -mcpu command to specify core type.
997b26e8 552 * doc/c-msp430.texi: Update documentation.
638d3803 553
b015e599
AP
5542013-05-09 Andrew Pinski <apinski@cavium.com>
555
556 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
557 (mips_opts): Update for the new field.
558 (file_ase_virt): New variable.
559 (ISA_SUPPORTS_VIRT_ASE): New macro.
560 (ISA_SUPPORTS_VIRT64_ASE): New macro.
561 (MIPS_CPU_ASE_VIRT): New define.
562 (is_opcode_valid): Handle ase_virt.
563 (macro_build): Handle "+J".
564 (validate_mips_insn): Likewise.
565 (mips_ip): Likewise.
566 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
567 (md_longopts): Add mvirt and mnovirt
568 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
569 (mips_after_parse_args): Handle ase_virt field.
570 (s_mipsset): Handle "virt" and "novirt".
571 (mips_elf_final_processing): Add a comment about virt ASE might need
572 a new flag.
573 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
574 * doc/c-mips.texi: Document -mvirt and -mno-virt.
575 Document ".set virt" and ".set novirt".
576
da8094d7
AM
5772013-05-09 Alan Modra <amodra@gmail.com>
578
579 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
580 control of operand flag bits.
581
c5f8c205
AM
5822013-05-07 Alan Modra <amodra@gmail.com>
583
584 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
585 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
586 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
587 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
588 (md_apply_fix): Set fx_no_overflow for assorted relocations.
589 Shift and sign-extend fieldval for use by some VLE reloc
590 operand->insert functions.
591
b47468a6
CM
5922013-05-06 Paul Brook <paul@codesourcery.com>
593 Catherine Moore <clm@codesourcery.com>
594
c5f8c205
AM
595 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
596 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
597 (md_apply_fix): Likewise.
598 (tc_gen_reloc): Likewise.
599
2de39019
CM
6002013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
601
602 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
603 (mips_fix_adjustable): Adjust pc-relative check to use
604 limited_pc_reloc_p.
605
754e2bb9
RS
6062013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
607
608 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
609 (s_mips_stab): Do not restrict to stabn only.
610
13761a11
NC
6112013-05-02 Nick Clifton <nickc@redhat.com>
612
613 * config/tc-msp430.c: Add support for the MSP430X architecture.
614 Add code to insert a NOP instruction after any instruction that
615 might change the interrupt state.
616 Add support for the LARGE memory model.
617 Add code to initialise the .MSP430.attributes section.
618 * config/tc-msp430.h: Add support for the MSP430X architecture.
619 * doc/c-msp430.texi: Document the new -mL and -mN command line
620 options.
621 * NEWS: Mention support for the MSP430X architecture.
622
df26367c
MR
6232013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
624
625 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
626 alpha*-*-linux*ecoff*.
627
f02d8318
CF
6282013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
629
630 * config/tc-mips.c (mips_ip): Add sizelo.
631 For "+C", "+G", and "+H", set sizelo and compare against it.
632
b40bf0a2
NC
6332013-04-29 Nick Clifton <nickc@redhat.com>
634
635 * as.c (Options): Add -gdwarf-sections.
636 (parse_args): Likewise.
637 * as.h (flag_dwarf_sections): Declare.
638 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
639 (process_entries): When -gdwarf-sections is enabled generate
640 fragmentary .debug_line sections.
641 (out_debug_line): Set the section for the .debug_line section end
642 symbol.
643 * doc/as.texinfo: Document -gdwarf-sections.
644 * NEWS: Mention -gdwarf-sections.
645
8eeccb77 6462013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
647
648 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
649 according to the target parameter. Don't call s_segm since s_segm
650 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
651 initialized yet.
652 (md_begin): Call s_segm according to target parameter from command
653 line.
654
49926cd0
AM
6552013-04-25 Alan Modra <amodra@gmail.com>
656
657 * configure.in: Allow little-endian linux.
658 * configure: Regenerate.
659
e3031850
SL
6602013-04-24 Sandra Loosemore <sandra@codesourcery.com>
661
662 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
663 "fstatus" control register to "eccinj".
664
cb948fc0
KT
6652013-04-19 Kai Tietz <ktietz@redhat.com>
666
667 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
668
4455e9ad
JB
6692013-04-15 Julian Brown <julian@codesourcery.com>
670
671 * expr.c (add_to_result, subtract_from_result): Make global.
672 * expr.h (add_to_result, subtract_from_result): Add prototypes.
673 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
674 subtract_from_result to handle extra bit of precision for .sleb128
675 directive operands.
676
956a6ba3
JB
6772013-04-10 Julian Brown <julian@codesourcery.com>
678
679 * read.c (convert_to_bignum): Add sign parameter. Use it
680 instead of X_unsigned to determine sign of resulting bignum.
681 (emit_expr): Pass extra argument to convert_to_bignum.
682 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
683 X_extrabit to convert_to_bignum.
684 (parse_bitfield_cons): Set X_extrabit.
685 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
686 Initialise X_extrabit field as appropriate.
687 (add_to_result): New.
688 (subtract_from_result): New.
689 (expr): Use above.
690 * expr.h (expressionS): Add X_extrabit field.
691
eb9f3f00
JB
6922013-04-10 Jan Beulich <jbeulich@suse.com>
693
694 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
695 register being PC when is_t or writeback, and use distinct
696 diagnostic for the latter case.
697
ccb84d65
JB
6982013-04-10 Jan Beulich <jbeulich@suse.com>
699
700 * gas/config/tc-arm.c (parse_operands): Re-write
701 po_barrier_or_imm().
702 (do_barrier): Remove bogus constraint().
703 (do_t_barrier): Remove.
704
4d13caa0
NC
7052013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
706
707 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
708 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
709 ATmega2564RFR2
710 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
711
16d02dc9
JB
7122013-04-09 Jan Beulich <jbeulich@suse.com>
713
714 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
715 Use local variable Rt in more places.
716 (do_vmsr): Accept all control registers.
717
05ac0ffb
JB
7182013-04-09 Jan Beulich <jbeulich@suse.com>
719
720 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
721 if there was none specified for moves between scalar and core
722 register.
723
2d51fb74
JB
7242013-04-09 Jan Beulich <jbeulich@suse.com>
725
726 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
727 NEON_ALL_LANES case.
728
94dcf8bf
JB
7292013-04-08 Jan Beulich <jbeulich@suse.com>
730
731 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
732 PC-relative VSTR.
733
1472d06f
JB
7342013-04-08 Jan Beulich <jbeulich@suse.com>
735
736 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
737 entry to sp_fiq.
738
0c76cae8
AM
7392013-04-03 Alan Modra <amodra@gmail.com>
740
741 * doc/as.texinfo: Add support to generate man options for h8300.
742 * doc/c-h8300.texi: Likewise.
743
92eb40d9
RR
7442013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
745
746 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
747 Cortex-A57.
748
51dcdd4d
NC
7492013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
750
751 PR binutils/15068
752 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
753
c5d685bf
NC
7542013-03-26 Nick Clifton <nickc@redhat.com>
755
9b978282
NC
756 PR gas/15295
757 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
758 start of the file each time.
759
c5d685bf
NC
760 PR gas/15178
761 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
762 FreeBSD targets.
763
9699c833
TG
7642013-03-26 Douglas B Rupp <rupp@gnat.com>
765
766 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
767 after fixup.
768
4755303e
WN
7692013-03-21 Will Newton <will.newton@linaro.org>
770
771 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
772 pc-relative str instructions in Thumb mode.
773
81f5558e
NC
7742013-03-21 Michael Schewe <michael.schewe@gmx.net>
775
776 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
777 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
778 R_H8_DISP32A16.
779 * config/tc-h8300.h: Remove duplicated defines.
780
71863e73
NC
7812013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
782
783 PR gas/15282
784 * tc-avr.c (mcu_has_3_byte_pc): New function.
785 (tc_cfi_frame_initial_instructions): Call it to find return
786 address size.
787
795b8e6b
NC
7882013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
789
790 PR gas/15095
791 * config/tc-tic6x.c (tic6x_try_encode): Handle
792 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
793 encode register pair numbers when required.
794
ba86b375
WN
7952013-03-15 Will Newton <will.newton@linaro.org>
796
797 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
798 in vstr in Thumb mode for pre-ARMv7 cores.
799
9e6f3811
AS
8002013-03-14 Andreas Schwab <schwab@suse.de>
801
802 * doc/c-arc.texi (ARC Directives): Revert last change and use
803 @itemize instead of @table.
804 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
805
b10bf8c5
NC
8062013-03-14 Nick Clifton <nickc@redhat.com>
807
808 PR gas/15273
809 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
810 NULL message, instead just check ARM_CPU_IS_ANY directly.
811
ba724cfc
NC
8122013-03-14 Nick Clifton <nickc@redhat.com>
813
814 PR gas/15212
9e6f3811 815 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
816 for table format.
817 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
818 to the @item directives.
819 (ARM-Neon-Alignment): Move to correct place in the document.
820 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
821 formatting.
822 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
823 @smallexample.
824
531a94fd
SL
8252013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
826
827 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
828 case. Add default BAD_CASE to switch.
829
dad60f8e
SL
8302013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
831
832 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
833 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
834
dd5181d5
KT
8352013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
836
837 * config/tc-arm.c (crc_ext_armv8): New feature set.
838 (UNPRED_REG): New macro.
839 (do_crc32_1): New function.
840 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
841 do_crc32ch, do_crc32cw): Likewise.
842 (TUEc): New macro.
843 (insns): Add entries for crc32 mnemonics.
844 (arm_extensions): Add entry for crc.
845
8e723a10
CLT
8462013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
847
848 * write.h (struct fix): Add fx_dot_frag field.
849 (dot_frag): Declare.
850 * write.c (dot_frag): New variable.
851 (fix_new_internal): Set fx_dot_frag field with dot_frag.
852 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
853 * expr.c (expr): Save value of frag_now in dot_frag when setting
854 dot_value.
855 * read.c (emit_expr): Likewise. Delete comments.
856
be05d201
L
8572013-03-07 H.J. Lu <hongjiu.lu@intel.com>
858
859 * config/tc-i386.c (flag_code_names): Removed.
860 (i386_index_check): Rewrote.
861
62b0d0d5
YZ
8622013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
863
864 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
865 add comment.
866 (aarch64_double_precision_fmovable): New function.
867 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
868 function; handle hexadecimal representation of IEEE754 encoding.
869 (parse_operands): Update the call to parse_aarch64_imm_float.
870
165de32a
L
8712013-02-28 H.J. Lu <hongjiu.lu@intel.com>
872
873 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
874 (check_hle): Updated.
875 (md_assemble): Likewise.
876 (parse_insn): Likewise.
877
d5de92cf
L
8782013-02-28 H.J. Lu <hongjiu.lu@intel.com>
879
880 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 881 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
882 (parse_insn): Remove expecting_string_instruction. Set
883 i.rep_prefix.
884
e60bb1dd
YZ
8852013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
886
887 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
888
aeebdd9b
YZ
8892013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
890
891 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
892 for system registers.
893
4107ae22
DD
8942013-02-27 DJ Delorie <dj@redhat.com>
895
896 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
897 (rl78_op): Handle %code().
898 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
899 (tc_gen_reloc): Likwise; convert to a computed reloc.
900 (md_apply_fix): Likewise.
901
151fa98f
NC
9022013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
903
904 * config/rl78-parse.y: Fix encoding of DIVWU insn.
905
70a8bc5b 9062013-02-25 Terry Guo <terry.guo@arm.com>
907
908 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
909 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
910 list of accepted CPUs.
911
5c111e37
L
9122013-02-19 H.J. Lu <hongjiu.lu@intel.com>
913
914 PR gas/15159
915 * config/tc-i386.c (cpu_arch): Add ".smap".
916
917 * doc/c-i386.texi: Document smap.
918
8a75745d
MR
9192013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
920
921 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
922 mips_assembling_insn appropriately.
923 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
924
79850f26
MR
9252013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
926
cf29fc61 927 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
928 extraneous braces.
929
4c261dff
NC
9302013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
931
5c111e37 932 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 933
ea33f281
NC
9342013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
935
936 * configure.tgt: Add nios2-*-rtems*.
937
a1ccaec9
YZ
9382013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
939
940 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
941 NULL.
942
0aa27725
RS
9432013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
944
945 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
946 (macro): Use it. Assert that trunc.w.s is not used for r5900.
947
da4339ed
NC
9482013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
949
950 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
951 core.
952
36591ba1 9532013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 954 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
955
956 Based on patches from Altera Corporation.
957
958 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
959 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
960 * Makefile.in: Regenerated.
961 * configure.tgt: Add case for nios2*-linux*.
962 * config/obj-elf.c: Conditionally include elf/nios2.h.
963 * config/tc-nios2.c: New file.
964 * config/tc-nios2.h: New file.
965 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
966 * doc/Makefile.in: Regenerated.
967 * doc/all.texi: Set NIOSII.
968 * doc/as.texinfo (Overview): Add Nios II options.
969 (Machine Dependencies): Include c-nios2.texi.
970 * doc/c-nios2.texi: New file.
971 * NEWS: Note Altera Nios II support.
972
94d4433a
AM
9732013-02-06 Alan Modra <amodra@gmail.com>
974
975 PR gas/14255
976 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
977 Don't skip fixups with fx_subsy non-NULL.
978 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
979 with fx_subsy non-NULL.
980
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L
9812013-02-04 H.J. Lu <hongjiu.lu@intel.com>
982
983 * doc/c-metag.texi: Add "@c man" markers.
984
89d67ed9
AM
9852013-02-04 Alan Modra <amodra@gmail.com>
986
987 * write.c (fixup_segment): Return void. Delete seg_reloc_count
988 related code.
989 (TC_ADJUST_RELOC_COUNT): Delete.
990 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
991
89072bd6
AM
9922013-02-04 Alan Modra <amodra@gmail.com>
993
994 * po/POTFILES.in: Regenerate.
995
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NC
9962013-01-30 Markos Chandras <markos.chandras@imgtec.com>
997
998 * config/tc-metag.c: Make SWAP instruction less permissive with
999 its operands.
1000
392ca752
DD
10012013-01-29 DJ Delorie <dj@redhat.com>
1002
1003 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1004 relocs in .word/.etc statements.
1005
427d0db6
RM
10062013-01-29 Roland McGrath <mcgrathr@google.com>
1007
1008 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1009 immediate value for 8-bit offset" error so it shows line info.
1010
4faf939a
JM
10112013-01-24 Joseph Myers <joseph@codesourcery.com>
1012
1013 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1014 for 64-bit output.
1015
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NC
10162013-01-24 Nick Clifton <nickc@redhat.com>
1017
1018 * config/tc-v850.c: Add support for e3v5 architecture.
1019 * doc/c-v850.texi: Mention new support.
1020
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NC
10212013-01-23 Nick Clifton <nickc@redhat.com>
1022
1023 PR gas/15039
1024 * config/tc-avr.c: Include dwarf2dbg.h.
1025
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L
10262013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1027
1028 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1029 (tc_i386_fix_adjustable): Likewise.
1030 (lex_got): Likewise.
1031 (tc_gen_reloc): Likewise.
1032
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YZ
10332013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1034
1035 * config/tc-aarch64.c (output_operand_error_record): Change to output
1036 the out-of-range error message as value-expected message if there is
1037 only one single value in the expected range.
1038 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1039 LSL #0 as a programmer-friendly feature.
1040
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10412013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1042
1043 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1044 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1045 BFD_RELOC_64_SIZE relocations.
1046 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1047 for it.
1048 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1049 relocations against local symbols.
1050
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AM
10512013-01-16 Alan Modra <amodra@gmail.com>
1052
1053 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1054 finding some sort of toc syntax error, and break to avoid
1055 compiler uninit warning.
1056
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10572013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1058
1059 PR gas/15019
1060 * config/tc-i386.c (lex_got): Increment length by 1 if the
1061 relocation token is removed.
1062
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NC
10632013-01-15 Nick Clifton <nickc@redhat.com>
1064
1065 * config/tc-v850.c (md_assemble): Allow signed values for
1066 V850E_IMMEDIATE.
1067
464e3686
SK
10682013-01-11 Sean Keys <skeys@ipdatasys.com>
1069
1070 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1071 git to cvs.
464e3686 1072
5817ffd1
PB
10732013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1074
1075 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1076 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1077 * config/tc-ppc.c (md_show_usage): Likewise.
1078 (ppc_handle_align): Handle power8's group ending nop.
1079
f4b1f6a9
SK
10802013-01-10 Sean Keys <skeys@ipdatasys.com>
1081
1082 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1083 that the assember exits after the opcodes have been printed.
f4b1f6a9 1084
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10852013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1086
1087 * app.c: Remove trailing white spaces.
1088 * as.c: Likewise.
1089 * as.h: Likewise.
1090 * cond.c: Likewise.
1091 * dw2gencfi.c: Likewise.
1092 * dwarf2dbg.h: Likewise.
1093 * ecoff.c: Likewise.
1094 * input-file.c: Likewise.
1095 * itbl-lex.h: Likewise.
1096 * output-file.c: Likewise.
1097 * read.c: Likewise.
1098 * sb.c: Likewise.
1099 * subsegs.c: Likewise.
1100 * symbols.c: Likewise.
1101 * write.c: Likewise.
1102 * config/tc-i386.c: Likewise.
1103 * doc/Makefile.am: Likewise.
1104 * doc/Makefile.in: Likewise.
1105 * doc/c-aarch64.texi: Likewise.
1106 * doc/c-alpha.texi: Likewise.
1107 * doc/c-arc.texi: Likewise.
1108 * doc/c-arm.texi: Likewise.
1109 * doc/c-avr.texi: Likewise.
1110 * doc/c-bfin.texi: Likewise.
1111 * doc/c-cr16.texi: Likewise.
1112 * doc/c-d10v.texi: Likewise.
1113 * doc/c-d30v.texi: Likewise.
1114 * doc/c-h8300.texi: Likewise.
1115 * doc/c-hppa.texi: Likewise.
1116 * doc/c-i370.texi: Likewise.
1117 * doc/c-i386.texi: Likewise.
1118 * doc/c-i860.texi: Likewise.
1119 * doc/c-m32c.texi: Likewise.
1120 * doc/c-m32r.texi: Likewise.
1121 * doc/c-m68hc11.texi: Likewise.
1122 * doc/c-m68k.texi: Likewise.
1123 * doc/c-microblaze.texi: Likewise.
1124 * doc/c-mips.texi: Likewise.
1125 * doc/c-msp430.texi: Likewise.
1126 * doc/c-mt.texi: Likewise.
1127 * doc/c-s390.texi: Likewise.
1128 * doc/c-score.texi: Likewise.
1129 * doc/c-sh.texi: Likewise.
1130 * doc/c-sh64.texi: Likewise.
1131 * doc/c-tic54x.texi: Likewise.
1132 * doc/c-tic6x.texi: Likewise.
1133 * doc/c-v850.texi: Likewise.
1134 * doc/c-xc16x.texi: Likewise.
1135 * doc/c-xgate.texi: Likewise.
1136 * doc/c-xtensa.texi: Likewise.
1137 * doc/c-z80.texi: Likewise.
1138 * doc/internals.texi: Likewise.
1139
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RM
11402013-01-10 Roland McGrath <mcgrathr@google.com>
1141
1142 * hash.c (hash_new_sized): Make it global.
1143 * hash.h: Declare it.
1144 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1145 pass a small size.
1146
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NC
11472013-01-10 Will Newton <will.newton@imgtec.com>
1148
1149 * Makefile.am: Add Meta.
1150 * Makefile.in: Regenerate.
1151 * config/tc-metag.c: New file.
1152 * config/tc-metag.h: New file.
1153 * configure.tgt: Add Meta.
1154 * doc/Makefile.am: Add Meta.
1155 * doc/Makefile.in: Regenerate.
1156 * doc/all.texi: Add Meta.
1157 * doc/as.texiinfo: Document Meta options.
1158 * doc/c-metag.texi: New file.
1159
b37df7c4
SE
11602013-01-09 Steve Ellcey <sellcey@mips.com>
1161
1162 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1163 calls.
1164 * config/tc-mips.c (internalError): Remove, replace with abort.
1165
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YZ
11662013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1167
1168 * config/tc-aarch64.c (parse_operands): Change to compare the result
1169 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1170
8ab8155f
NC
11712013-01-07 Nick Clifton <nickc@redhat.com>
1172
1173 PR gas/14887
1174 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1175 anticipated character.
1176 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1177 here as it is no longer needed.
1178
a4ac1c42
AS
11792013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1180
1181 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1182 * doc/c-score.texi (SCORE-Opts): Likewise.
1183 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1184
e407c74b
NC
11852013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1186
1187 * config/tc-mips.c: Add support for MIPS r5900.
1188 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1189 lq and sq.
1190 (can_swap_branch_p, get_append_method): Detect some conditional
1191 short loops to fix a bug on the r5900 by NOP in the branch delay
1192 slot.
1193 (M_MUL): Support 3 operands in multu on r5900.
1194 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1195 (s_mipsset): Force 32 bit floating point on r5900.
1196 (mips_ip): Check parameter range of instructions mfps and mtps on
1197 r5900.
1198 * configure.in: Detect CPU type when target string contains r5900
1199 (e.g. mips64r5900el-linux-gnu).
1200
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12012013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1202
1203 * as.c (parse_args): Update copyright year to 2013.
1204
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12052013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1206
1207 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1208 and "cortex57".
1209
517bb291 12102013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1211
517bb291
NC
1212 PR gas/14987
1213 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1214 closing bracket.
d709e4e6 1215
517bb291 1216For older changes see ChangeLog-2012
08d56133 1217\f
517bb291 1218Copyright (C) 2013 Free Software Foundation, Inc.
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1219
1220Copying and distribution of this file, with or without modification,
1221are permitted in any medium without royalty provided the copyright
1222notice and this notice are preserved.
1223
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1224Local Variables:
1225mode: change-log
1226left-margin: 8
1227fill-column: 74
1228version-control: never
1229End: