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531a94fd
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12013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
2
3 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
4 case. Add default BAD_CASE to switch.
5
dad60f8e
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62013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
7
8 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
9 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
10
dd5181d5
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112013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12
13 * config/tc-arm.c (crc_ext_armv8): New feature set.
14 (UNPRED_REG): New macro.
15 (do_crc32_1): New function.
16 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
17 do_crc32ch, do_crc32cw): Likewise.
18 (TUEc): New macro.
19 (insns): Add entries for crc32 mnemonics.
20 (arm_extensions): Add entry for crc.
21
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222013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
23
24 * write.h (struct fix): Add fx_dot_frag field.
25 (dot_frag): Declare.
26 * write.c (dot_frag): New variable.
27 (fix_new_internal): Set fx_dot_frag field with dot_frag.
28 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
29 * expr.c (expr): Save value of frag_now in dot_frag when setting
30 dot_value.
31 * read.c (emit_expr): Likewise. Delete comments.
32
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332013-03-07 H.J. Lu <hongjiu.lu@intel.com>
34
35 * config/tc-i386.c (flag_code_names): Removed.
36 (i386_index_check): Rewrote.
37
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382013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
39
40 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
41 add comment.
42 (aarch64_double_precision_fmovable): New function.
43 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
44 function; handle hexadecimal representation of IEEE754 encoding.
45 (parse_operands): Update the call to parse_aarch64_imm_float.
46
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472013-02-28 H.J. Lu <hongjiu.lu@intel.com>
48
49 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
50 (check_hle): Updated.
51 (md_assemble): Likewise.
52 (parse_insn): Likewise.
53
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542013-02-28 H.J. Lu <hongjiu.lu@intel.com>
55
56 * config/tc-i386.c (_i386_insn): Add rep_prefix.
57 (md_assemble): Check if REP prefix is OK.
58 (parse_insn): Remove expecting_string_instruction. Set
59 i.rep_prefix.
60
e60bb1dd
YZ
612013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
62
63 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
64
aeebdd9b
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652013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
66
67 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
68 for system registers.
69
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DD
702013-02-27 DJ Delorie <dj@redhat.com>
71
72 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
73 (rl78_op): Handle %code().
74 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
75 (tc_gen_reloc): Likwise; convert to a computed reloc.
76 (md_apply_fix): Likewise.
77
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782013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
79
80 * config/rl78-parse.y: Fix encoding of DIVWU insn.
81
70a8bc5b 822013-02-25 Terry Guo <terry.guo@arm.com>
83
84 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
85 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
86 list of accepted CPUs.
87
5c111e37
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882013-02-19 H.J. Lu <hongjiu.lu@intel.com>
89
90 PR gas/15159
91 * config/tc-i386.c (cpu_arch): Add ".smap".
92
93 * doc/c-i386.texi: Document smap.
94
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MR
952013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
96
97 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
98 mips_assembling_insn appropriately.
99 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
100
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1012013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
102
cf29fc61 103 * config/tc-mips.c (append_insn): Correct indentation, remove
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104 extraneous braces.
105
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1062013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
107
5c111e37 108 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 109
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1102013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
111
112 * configure.tgt: Add nios2-*-rtems*.
113
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1142013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
115
116 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
117 NULL.
118
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1192013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
120
121 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
122 (macro): Use it. Assert that trunc.w.s is not used for r5900.
123
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1242013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
125
126 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
127 core.
128
36591ba1 1292013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 130 Andrew Jenner <andrew@codesourcery.com>
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131
132 Based on patches from Altera Corporation.
133
134 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
135 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
136 * Makefile.in: Regenerated.
137 * configure.tgt: Add case for nios2*-linux*.
138 * config/obj-elf.c: Conditionally include elf/nios2.h.
139 * config/tc-nios2.c: New file.
140 * config/tc-nios2.h: New file.
141 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
142 * doc/Makefile.in: Regenerated.
143 * doc/all.texi: Set NIOSII.
144 * doc/as.texinfo (Overview): Add Nios II options.
145 (Machine Dependencies): Include c-nios2.texi.
146 * doc/c-nios2.texi: New file.
147 * NEWS: Note Altera Nios II support.
148
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1492013-02-06 Alan Modra <amodra@gmail.com>
150
151 PR gas/14255
152 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
153 Don't skip fixups with fx_subsy non-NULL.
154 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
155 with fx_subsy non-NULL.
156
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1572013-02-04 H.J. Lu <hongjiu.lu@intel.com>
158
159 * doc/c-metag.texi: Add "@c man" markers.
160
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1612013-02-04 Alan Modra <amodra@gmail.com>
162
163 * write.c (fixup_segment): Return void. Delete seg_reloc_count
164 related code.
165 (TC_ADJUST_RELOC_COUNT): Delete.
166 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
167
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1682013-02-04 Alan Modra <amodra@gmail.com>
169
170 * po/POTFILES.in: Regenerate.
171
f9b2d544
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1722013-01-30 Markos Chandras <markos.chandras@imgtec.com>
173
174 * config/tc-metag.c: Make SWAP instruction less permissive with
175 its operands.
176
392ca752
DD
1772013-01-29 DJ Delorie <dj@redhat.com>
178
179 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
180 relocs in .word/.etc statements.
181
427d0db6
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1822013-01-29 Roland McGrath <mcgrathr@google.com>
183
184 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
185 immediate value for 8-bit offset" error so it shows line info.
186
4faf939a
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1872013-01-24 Joseph Myers <joseph@codesourcery.com>
188
189 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
190 for 64-bit output.
191
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1922013-01-24 Nick Clifton <nickc@redhat.com>
193
194 * config/tc-v850.c: Add support for e3v5 architecture.
195 * doc/c-v850.texi: Mention new support.
196
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1972013-01-23 Nick Clifton <nickc@redhat.com>
198
199 PR gas/15039
200 * config/tc-avr.c: Include dwarf2dbg.h.
201
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2022013-01-18 H.J. Lu <hongjiu.lu@intel.com>
203
204 * config/tc-i386.c (reloc): Support size relocation only for ELF.
205 (tc_i386_fix_adjustable): Likewise.
206 (lex_got): Likewise.
207 (tc_gen_reloc): Likewise.
208
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2092013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
210
211 * config/tc-aarch64.c (output_operand_error_record): Change to output
212 the out-of-range error message as value-expected message if there is
213 only one single value in the expected range.
214 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
215 LSL #0 as a programmer-friendly feature.
216
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2172013-01-16 H.J. Lu <hongjiu.lu@intel.com>
218
219 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
220 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
221 BFD_RELOC_64_SIZE relocations.
222 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
223 for it.
224 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
225 relocations against local symbols.
226
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2272013-01-16 Alan Modra <amodra@gmail.com>
228
229 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
230 finding some sort of toc syntax error, and break to avoid
231 compiler uninit warning.
232
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2332013-01-15 H.J. Lu <hongjiu.lu@intel.com>
234
235 PR gas/15019
236 * config/tc-i386.c (lex_got): Increment length by 1 if the
237 relocation token is removed.
238
dd42f060
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2392013-01-15 Nick Clifton <nickc@redhat.com>
240
241 * config/tc-v850.c (md_assemble): Allow signed values for
242 V850E_IMMEDIATE.
243
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2442013-01-11 Sean Keys <skeys@ipdatasys.com>
245
246 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 247 git to cvs.
464e3686 248
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2492013-01-10 Peter Bergner <bergner@vnet.ibm.com>
250
251 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
252 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
253 * config/tc-ppc.c (md_show_usage): Likewise.
254 (ppc_handle_align): Handle power8's group ending nop.
255
f4b1f6a9
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2562013-01-10 Sean Keys <skeys@ipdatasys.com>
257
258 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 259 that the assember exits after the opcodes have been printed.
f4b1f6a9 260
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2612013-01-10 H.J. Lu <hongjiu.lu@intel.com>
262
263 * app.c: Remove trailing white spaces.
264 * as.c: Likewise.
265 * as.h: Likewise.
266 * cond.c: Likewise.
267 * dw2gencfi.c: Likewise.
268 * dwarf2dbg.h: Likewise.
269 * ecoff.c: Likewise.
270 * input-file.c: Likewise.
271 * itbl-lex.h: Likewise.
272 * output-file.c: Likewise.
273 * read.c: Likewise.
274 * sb.c: Likewise.
275 * subsegs.c: Likewise.
276 * symbols.c: Likewise.
277 * write.c: Likewise.
278 * config/tc-i386.c: Likewise.
279 * doc/Makefile.am: Likewise.
280 * doc/Makefile.in: Likewise.
281 * doc/c-aarch64.texi: Likewise.
282 * doc/c-alpha.texi: Likewise.
283 * doc/c-arc.texi: Likewise.
284 * doc/c-arm.texi: Likewise.
285 * doc/c-avr.texi: Likewise.
286 * doc/c-bfin.texi: Likewise.
287 * doc/c-cr16.texi: Likewise.
288 * doc/c-d10v.texi: Likewise.
289 * doc/c-d30v.texi: Likewise.
290 * doc/c-h8300.texi: Likewise.
291 * doc/c-hppa.texi: Likewise.
292 * doc/c-i370.texi: Likewise.
293 * doc/c-i386.texi: Likewise.
294 * doc/c-i860.texi: Likewise.
295 * doc/c-m32c.texi: Likewise.
296 * doc/c-m32r.texi: Likewise.
297 * doc/c-m68hc11.texi: Likewise.
298 * doc/c-m68k.texi: Likewise.
299 * doc/c-microblaze.texi: Likewise.
300 * doc/c-mips.texi: Likewise.
301 * doc/c-msp430.texi: Likewise.
302 * doc/c-mt.texi: Likewise.
303 * doc/c-s390.texi: Likewise.
304 * doc/c-score.texi: Likewise.
305 * doc/c-sh.texi: Likewise.
306 * doc/c-sh64.texi: Likewise.
307 * doc/c-tic54x.texi: Likewise.
308 * doc/c-tic6x.texi: Likewise.
309 * doc/c-v850.texi: Likewise.
310 * doc/c-xc16x.texi: Likewise.
311 * doc/c-xgate.texi: Likewise.
312 * doc/c-xtensa.texi: Likewise.
313 * doc/c-z80.texi: Likewise.
314 * doc/internals.texi: Likewise.
315
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3162013-01-10 Roland McGrath <mcgrathr@google.com>
317
318 * hash.c (hash_new_sized): Make it global.
319 * hash.h: Declare it.
320 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
321 pass a small size.
322
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3232013-01-10 Will Newton <will.newton@imgtec.com>
324
325 * Makefile.am: Add Meta.
326 * Makefile.in: Regenerate.
327 * config/tc-metag.c: New file.
328 * config/tc-metag.h: New file.
329 * configure.tgt: Add Meta.
330 * doc/Makefile.am: Add Meta.
331 * doc/Makefile.in: Regenerate.
332 * doc/all.texi: Add Meta.
333 * doc/as.texiinfo: Document Meta options.
334 * doc/c-metag.texi: New file.
335
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SE
3362013-01-09 Steve Ellcey <sellcey@mips.com>
337
338 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
339 calls.
340 * config/tc-mips.c (internalError): Remove, replace with abort.
341
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3422013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
343
344 * config/tc-aarch64.c (parse_operands): Change to compare the result
345 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
346
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3472013-01-07 Nick Clifton <nickc@redhat.com>
348
349 PR gas/14887
350 * config/tc-arm.c (skip_past_char): Skip whitespace before the
351 anticipated character.
352 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
353 here as it is no longer needed.
354
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3552013-01-06 Andreas Schwab <schwab@linux-m68k.org>
356
357 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
358 * doc/c-score.texi (SCORE-Opts): Likewise.
359 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
360
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3612013-01-04 Juergen Urban <JuergenUrban@gmx.de>
362
363 * config/tc-mips.c: Add support for MIPS r5900.
364 Add M_LQ_AB and M_SQ_AB to support large values for instructions
365 lq and sq.
366 (can_swap_branch_p, get_append_method): Detect some conditional
367 short loops to fix a bug on the r5900 by NOP in the branch delay
368 slot.
369 (M_MUL): Support 3 operands in multu on r5900.
370 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
371 (s_mipsset): Force 32 bit floating point on r5900.
372 (mips_ip): Check parameter range of instructions mfps and mtps on
373 r5900.
374 * configure.in: Detect CPU type when target string contains r5900
375 (e.g. mips64r5900el-linux-gnu).
376
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3772013-01-02 H.J. Lu <hongjiu.lu@intel.com>
378
379 * as.c (parse_args): Update copyright year to 2013.
380
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3812013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
382
383 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
384 and "cortex57".
385
517bb291 3862013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 387
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388 PR gas/14987
389 * config/tc-arm.c (parse_address_main): Skip whitespace before a
390 closing bracket.
d709e4e6 391
517bb291 392For older changes see ChangeLog-2012
08d56133 393\f
517bb291 394Copyright (C) 2013 Free Software Foundation, Inc.
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395
396Copying and distribution of this file, with or without modification,
397are permitted in any medium without royalty provided the copyright
398notice and this notice are preserved.
399
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400Local Variables:
401mode: change-log
402left-margin: 8
403fill-column: 74
404version-control: never
405End: