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e76ff5ab
RS		 12013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
4 (micromips_to_32_reg_h_map): Rename to...
5 (micromips_to_32_reg_h_map1): ...this.
6 (micromips_to_32_reg_i_map): Rename to...
7 (micromips_to_32_reg_h_map2): ...this.
8 (mips_lookup_reg_pair): New function.
9 (gpr_write_mask, macro): Adjust after above renaming.
10 (validate_micromips_insn): Remove "mi" handling.
11 (mips_ip): Likewise. Parse both registers in a pair for "mh".
12
fa7616a4
RS		 132013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
14
15 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
16 (mips_ip): Remove "+D" and "+T" handling.
17
fb798c50
AK		 182013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
19
20 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
21 relocs.
22
2c0a3565
MS		 232013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
24
4aa2c5e2
MS		 25 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
26
272013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
28
2c0a3565
MS		 29 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
30 (aarch64_force_relocation): Likewise.
31
f40da81b
AM		 322013-07-02 Alan Modra <amodra@gmail.com>
33
34 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
35
81566a9b
MR		 362013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
37
38 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
39 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
40 Replace @sc{mips16} with literal `MIPS16'.
41 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
42
a6bb11b2
YZ		 432013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
44
45 * config/tc-aarch64.c (reloc_table): Replace
46 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
47 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
48 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
49 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
50 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
51 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
52 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
53 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
54 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
55 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
56 (aarch64_force_relocation): Likewise.
57
cec5225b
YZ		 582013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
59
60 * config/tc-aarch64.c (ilp32_p): New static variable.
61 (elf64_aarch64_target_format): Return the target according to the
62 value of 'ilp32_p'.
63 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
64 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
65 (aarch64_dwarf2_addr_size): New function.
66 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
67 (DWARF2_ADDR_SIZE): New define.
68
e335d9cb
RS		 692013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
70
71 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
72
18870af7
RS		 732013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
74
75 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
76
833794fc
MR		 772013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
78
79 * config/tc-mips.c (mips_set_options): Add insn32 member.
80 (mips_opts): Initialize it.
81 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
82 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
83 (md_longopts): Add "minsn32" and "mno-insn32" options.
84 (is_size_valid): Handle insn32 mode.
85 (md_assemble): Pass instruction string down to macro.
86 (brk_fmt): Add second dimension and insn32 mode initializers.
87 (mfhl_fmt): Likewise.
88 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
89 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
90 (macro_build_jalr, move_register): Handle insn32 mode.
91 (macro_build_branch_rs): Likewise.
92 (macro): Handle insn32 mode.
93 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
94 (mips_ip): Handle insn32 mode.
95 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
96 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
97 (mips_handle_align): Handle insn32 mode.
98 (md_show_usage): Add -minsn32 and -mno-insn32.
99
100 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
101 -mno-insn32 options.
102 (-minsn32, -mno-insn32): New options.
103 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
104 options.
105 (MIPS assembly options): New node. Document .set insn32 and
106 .set noinsn32.
107 (MIPS-Dependent): List the new node.
108
d1706f38
NC		 1092013-06-25 Nick Clifton <nickc@redhat.com>
110
111 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
112 the PC in indirect addressing on 430xv2 parts.
113 (msp430_operands): Add version test to hardware bug encoding
114 restrictions.
115
477330fc
RM		 1162013-06-24 Roland McGrath <mcgrathr@google.com>
117
d996d970
RM		 118 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
119 so it skips whitespace before it.
120 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
121
477330fc
RM		 122 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
123 (arm_reg_parse_multi): Skip whitespace first.
124 (parse_reg_list): Likewise.
125 (parse_vfp_reg_list): Likewise.
126 (s_arm_unwind_save_mmxwcg): Likewise.
127
24382199
NC		 1282013-06-24 Nick Clifton <nickc@redhat.com>
129
130 PR gas/15623
131 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
132
c3678916
RS		 1332013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
134
135 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
136
42429eac
RS		 1372013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
138
139 * config/tc-mips.c: Assert that offsetT and valueT are at least
140 8 bytes in size.
141 (GPR_SMIN, GPR_SMAX): New macros.
142 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
143
f3ded42a
RS		 1442013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
145
146 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
147 conditions. Remove any code deselected by them.
148 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
149
e8044f35
RS		 1502013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
151
152 * NEWS: Note removal of ECOFF support.
153 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
154 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
155 (MULTI_CFILES): Remove config/e-mipsecoff.c.
156 * Makefile.in: Regenerate.
157 * configure.in: Remove MIPS ECOFF references.
158 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
159 Delete cases.
160 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
161 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
162 (mips-*-*): ...this single case.
163 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
164 MIPS emulations to be e-mipself*.
165 * configure: Regenerate.
166 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
167 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
168 (mips-*-sysv*): Remove coff and ecoff cases.
169 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
170 * ecoff.c: Remove reference to MIPS ECOFF.
171 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
172 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
173 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
174 (mips_hi_fixup): Tweak comment.
175 (append_insn): Require a howto.
176 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
177
98508b2a
RS		 1782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
179
180 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
181 Use "CPU" instead of "cpu".
182 * doc/c-mips.texi: Likewise.
183 (MIPS Opts): Rename to MIPS Options.
184 (MIPS option stack): Rename to MIPS Option Stack.
185 (MIPS ASE instruction generation overrides): Rename to
186 MIPS ASE Instruction Generation Overrides (for now).
187 (MIPS floating-point): Rename to MIPS Floating-Point.
188
fc16f8cc
RS		 1892013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
190
191 * doc/c-mips.texi (MIPS Macros): New section.
192 (MIPS Object): Replace with...
193 (MIPS Small Data): ...this new section.
194
5a7560b5
RS		 1952013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
196
197 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
198 Capitalize name. Use @kindex instead of @cindex for .set entries.
199
a1b86ab7
RS		 2002013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
201
202 * doc/c-mips.texi (MIPS Stabs): Remove section.
203
c6278170
RS		 2042013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
205
206 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
207 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
208 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
209 (ISA_SUPPORTS_VIRT64_ASE): Delete.
210 (mips_ase): New structure.
211 (mips_ases): New table.
212 (FP64_ASES): New macro.
213 (mips_ase_groups): New array.
214 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
215 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
216 functions.
217 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
218 (md_parse_option): Use mips_ases and mips_set_ase instead of
219 separate case statements for each ASE option.
220 (mips_after_parse_args): Use FP64_ASES. Use
221 mips_check_isa_supports_ases to check the ASEs against
222 other options.
223 (s_mipsset): Use mips_ases and mips_set_ase instead of
224 separate if statements for each ASE option. Use
225 mips_check_isa_supports_ases, even when a non-ASE option
226 is specified.
227
63a4bc21
KT		 2282013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
229
230 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
231
c31f3936
RS		 2322013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
233
234 * config/tc-mips.c (md_shortopts, options, md_longopts)
235 (md_longopts_size): Move earlier in file.
236
846ef2d0
RS		 2372013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
238
239 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
240 with a single "ase" bitmask.
241 (mips_opts): Update accordingly.
242 (file_ase, file_ase_explicit): New variables.
243 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
244 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
245 (ISA_HAS_ROR): Adjust for mips_set_options change.
246 (is_opcode_valid): Take the base ase mask directly from mips_opts.
247 (mips_ip): Adjust for mips_set_options change.
248 (md_parse_option): Likewise. Update file_ase_explicit.
249 (mips_after_parse_args): Adjust for mips_set_options change.
250 Use bitmask operations to select the default ASEs. Set file_ase
251 rather than individual per-ASE variables.
252 (s_mipsset): Adjust for mips_set_options change.
253 (mips_elf_final_processing): Test file_ase rather than
254 file_ase_mdmx. Remove commented-out code.
255
d16afab6
RS		 2562013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
257
258 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
259 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
260 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
261 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
262 (mips_after_parse_args): Use the new "ase" field to choose
263 the default ASEs.
264 (mips_cpu_info_table): Move ASEs from the "flags" field to the
265 "ase" field.
266
e83a675f
RE		 2672013-06-18 Richard Earnshaw <rearnsha@arm.com>
268
269 * config/tc-arm.c (symbol_preemptible): New function.
270 (relax_branch): Use it.
271
7f3c4072
CM		 2722013-06-17 Catherine Moore <clm@codesourcery.com>
273 Maciej W. Rozycki <macro@codesourcery.com>
274 Chao-Ying Fu <fu@mips.com>
275
276 * config/tc-mips.c (mips_set_options): Add ase_eva.
277 (mips_set_options mips_opts): Add ase_eva.
278 (file_ase_eva): Declare.
279 (ISA_SUPPORTS_EVA_ASE): Define.
280 (IS_SEXT_9BIT_NUM): Define.
281 (MIPS_CPU_ASE_EVA): Define.
282 (is_opcode_valid): Add support for ase_eva.
283 (macro_build): Likewise.
284 (macro): Likewise.
285 (validate_mips_insn): Likewise.
286 (validate_micromips_insn): Likewise.
287 (mips_ip): Likewise.
288 (options): Add OPTION_EVA and OPTION_NO_EVA.
289 (md_longopts): Add -meva and -mno-eva.
290 (md_parse_option): Process new options.
291 (mips_after_parse_args): Check for valid EVA combinations.
292 (s_mipsset): Likewise.
293
e410add4
RS		 2942013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
295
296 * dwarf2dbg.h (dwarf2_move_insn): Declare.
297 * dwarf2dbg.c (line_subseg): Add pmove_tail.
298 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
299 (dwarf2_gen_line_info_1): Update call accordingly.
300 (dwarf2_move_insn): New function.
301 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
302
6a50d470
RS		 3032013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
304
305 Revert:
306
307 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
308
309 PR gas/13024
310 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
311 (dwarf2_gen_line_info_1): Delete.
312 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
313 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
314 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
315 (dwarf2_directive_loc): Push previous .locs instead of generating
316 them immediately.
317
f122319e
CF		 3182013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
319
320 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
321 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
322
909c7f9c
NC		 3232013-06-13 Nick Clifton <nickc@redhat.com>
324
325 PR gas/15602
326 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
327 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
328 function. Generates an error if the adjusted offset is out of a
329 16-bit range.
330
5d5755a7
SL		 3312013-06-12 Sandra Loosemore <sandra@codesourcery.com>
332
333 * config/tc-nios2.c (md_apply_fix): Mask constant
334 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
335
3bf0dbfb
MR		 3362013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
337
338 * config/tc-mips.c (append_insn): Don't do branch relaxation for
339 MIPS-3D instructions either.
340 (md_convert_frag): Update the COPx branch mask accordingly.
341
342 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
343 option.
344 * doc/as.texinfo (Overview): Add --relax-branch and
345 --no-relax-branch.
346 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
347 --no-relax-branch.
348
9daf7bab
SL		 3492013-06-09 Sandra Loosemore <sandra@codesourcery.com>
350
351 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
352 omitted.
353
d301a56b
RS		 3542013-06-08 Catherine Moore <clm@codesourcery.com>
355
356 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
357 (is_opcode_valid_16): Pass ase value to opcode_is_member.
358 (append_insn): Change INSN_xxxx to ASE_xxxx.
359
7bab7634
DC		 3602013-06-01 George Thomas <george.thomas@atmel.com>
361
362 * gas/config/tc-avr.c: Change ISA for devices with USB support to
363 AVR_ISA_XMEGAU
364
f60cf82f
L		 3652013-05-31 H.J. Lu <hongjiu.lu@intel.com>
366
367 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
368 for ELF.
369
a3f278e2
CM		 3702013-05-31 Paul Brook <paul@codesourcery.com>
371
372 gas/
373 * config/tc-mips.c (s_ehword): New.
374
067ec077
CM		 3752013-05-30 Paul Brook <paul@codesourcery.com>
376
377 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
378
d6101ac2
MR		 3792013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
380
381 * write.c (resolve_reloc_expr_symbols): On REL targets don't
382 convert relocs who have no relocatable field either. Rephrase
383 the conditional so that the PC-relative check is only applied
384 for REL targets.
385
f19ccbda
MR		 3862013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
387
388 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
389 calculation.
390
418009c2
YZ		 3912013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
392
393 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 394 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 395 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
396 (md_apply_fix): Likewise.
397 (aarch64_force_relocation): Likewise.
398
0a8897c7
KT		 3992013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
400
401 * config/tc-arm.c (it_fsm_post_encode): Improve
402 warning messages about deprecated IT block formats.
403
89d2a2a3
MS		 4042013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
405
406 * config/tc-aarch64.c (md_apply_fix): Move value range checking
407 inside fx_done condition.
408
c77c0862
RS		 4092013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
410
411 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
412
c0637f3a
PB		 4132013-05-20 Peter Bergner <bergner@vnet.ibm.com>
414
415 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
416 and clean up warning when using PRINT_OPCODE_TABLE.
417
5656a981
AM		 4182013-05-20 Alan Modra <amodra@gmail.com>
419
420 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
421 and data fixups performing shift/high adjust/sign extension on
422 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
423 when writing data fixups rather than recalculating size.
424
997b26e8
JBG		 4252013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
426
427 * doc/c-msp430.texi: Fix typo.
428
9f6e76f4
TG		 4292013-05-16 Tristan Gingold <gingold@adacore.com>
430
431 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
432 are also TOC symbols.
433
638d3803
NC		 4342013-05-16 Nick Clifton <nickc@redhat.com>
435
436 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
437 Add -mcpu command to specify core type.
997b26e8 438 * doc/c-msp430.texi: Update documentation.
638d3803 439
b015e599
AP		 4402013-05-09 Andrew Pinski <apinski@cavium.com>
441
442 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
443 (mips_opts): Update for the new field.
444 (file_ase_virt): New variable.
445 (ISA_SUPPORTS_VIRT_ASE): New macro.
446 (ISA_SUPPORTS_VIRT64_ASE): New macro.
447 (MIPS_CPU_ASE_VIRT): New define.
448 (is_opcode_valid): Handle ase_virt.
449 (macro_build): Handle "+J".
450 (validate_mips_insn): Likewise.
451 (mips_ip): Likewise.
452 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
453 (md_longopts): Add mvirt and mnovirt
454 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
455 (mips_after_parse_args): Handle ase_virt field.
456 (s_mipsset): Handle "virt" and "novirt".
457 (mips_elf_final_processing): Add a comment about virt ASE might need
458 a new flag.
459 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
460 * doc/c-mips.texi: Document -mvirt and -mno-virt.
461 Document ".set virt" and ".set novirt".
462
da8094d7
AM		 4632013-05-09 Alan Modra <amodra@gmail.com>
464
465 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
466 control of operand flag bits.
467
c5f8c205
AM		 4682013-05-07 Alan Modra <amodra@gmail.com>
469
470 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
471 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
472 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
473 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
474 (md_apply_fix): Set fx_no_overflow for assorted relocations.
475 Shift and sign-extend fieldval for use by some VLE reloc
476 operand->insert functions.
477
b47468a6
CM		 4782013-05-06 Paul Brook <paul@codesourcery.com>
479 Catherine Moore <clm@codesourcery.com>
480
c5f8c205
AM		 481 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
482 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 483 (md_apply_fix): Likewise.
484 (tc_gen_reloc): Likewise.
485
2de39019
CM		 4862013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
487
488 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
489 (mips_fix_adjustable): Adjust pc-relative check to use
490 limited_pc_reloc_p.
491
754e2bb9
RS		 4922013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
493
494 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
495 (s_mips_stab): Do not restrict to stabn only.
496
13761a11
NC		 4972013-05-02 Nick Clifton <nickc@redhat.com>
498
499 * config/tc-msp430.c: Add support for the MSP430X architecture.
500 Add code to insert a NOP instruction after any instruction that
501 might change the interrupt state.
502 Add support for the LARGE memory model.
503 Add code to initialise the .MSP430.attributes section.
504 * config/tc-msp430.h: Add support for the MSP430X architecture.
505 * doc/c-msp430.texi: Document the new -mL and -mN command line
506 options.
507 * NEWS: Mention support for the MSP430X architecture.
508
df26367c
MR		 5092013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
510
511 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
512 alpha*-*-linux*ecoff*.
513
f02d8318
CF		 5142013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
515
516 * config/tc-mips.c (mips_ip): Add sizelo.
517 For "+C", "+G", and "+H", set sizelo and compare against it.
518
b40bf0a2
NC		 5192013-04-29 Nick Clifton <nickc@redhat.com>
520
521 * as.c (Options): Add -gdwarf-sections.
522 (parse_args): Likewise.
523 * as.h (flag_dwarf_sections): Declare.
524 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
525 (process_entries): When -gdwarf-sections is enabled generate
526 fragmentary .debug_line sections.
527 (out_debug_line): Set the section for the .debug_line section end
528 symbol.
529 * doc/as.texinfo: Document -gdwarf-sections.
530 * NEWS: Mention -gdwarf-sections.
531
8eeccb77 5322013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 533
534 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
535 according to the target parameter. Don't call s_segm since s_segm
536 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
537 initialized yet.
538 (md_begin): Call s_segm according to target parameter from command
539 line.
540
49926cd0
AM		 5412013-04-25 Alan Modra <amodra@gmail.com>
542
543 * configure.in: Allow little-endian linux.
544 * configure: Regenerate.
545
e3031850
SL		 5462013-04-24 Sandra Loosemore <sandra@codesourcery.com>
547
548 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
549 "fstatus" control register to "eccinj".
550
cb948fc0
KT		 5512013-04-19 Kai Tietz <ktietz@redhat.com>
552
553 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
554
4455e9ad
JB		 5552013-04-15 Julian Brown <julian@codesourcery.com>
556
557 * expr.c (add_to_result, subtract_from_result): Make global.
558 * expr.h (add_to_result, subtract_from_result): Add prototypes.
559 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
560 subtract_from_result to handle extra bit of precision for .sleb128
561 directive operands.
562
956a6ba3
JB		 5632013-04-10 Julian Brown <julian@codesourcery.com>
564
565 * read.c (convert_to_bignum): Add sign parameter. Use it
566 instead of X_unsigned to determine sign of resulting bignum.
567 (emit_expr): Pass extra argument to convert_to_bignum.
568 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
569 X_extrabit to convert_to_bignum.
570 (parse_bitfield_cons): Set X_extrabit.
571 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
572 Initialise X_extrabit field as appropriate.
573 (add_to_result): New.
574 (subtract_from_result): New.
575 (expr): Use above.
576 * expr.h (expressionS): Add X_extrabit field.
577
eb9f3f00
JB		 5782013-04-10 Jan Beulich <jbeulich@suse.com>
579
580 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
581 register being PC when is_t or writeback, and use distinct
582 diagnostic for the latter case.
583
ccb84d65
JB		 5842013-04-10 Jan Beulich <jbeulich@suse.com>
585
586 * gas/config/tc-arm.c (parse_operands): Re-write
587 po_barrier_or_imm().
588 (do_barrier): Remove bogus constraint().
589 (do_t_barrier): Remove.
590
4d13caa0
NC		 5912013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
592
593 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
594 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
595 ATmega2564RFR2
596 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
597
16d02dc9
JB		 5982013-04-09 Jan Beulich <jbeulich@suse.com>
599
600 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
601 Use local variable Rt in more places.
602 (do_vmsr): Accept all control registers.
603
05ac0ffb
JB		 6042013-04-09 Jan Beulich <jbeulich@suse.com>
605
606 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
607 if there was none specified for moves between scalar and core
608 register.
609
2d51fb74
JB		 6102013-04-09 Jan Beulich <jbeulich@suse.com>
611
612 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
613 NEON_ALL_LANES case.
614
94dcf8bf
JB		 6152013-04-08 Jan Beulich <jbeulich@suse.com>
616
617 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
618 PC-relative VSTR.
619
1472d06f
JB		 6202013-04-08 Jan Beulich <jbeulich@suse.com>
621
622 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
623 entry to sp_fiq.
624
0c76cae8
AM		 6252013-04-03 Alan Modra <amodra@gmail.com>
626
627 * doc/as.texinfo: Add support to generate man options for h8300.
628 * doc/c-h8300.texi: Likewise.
629
92eb40d9
RR		 6302013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
631
632 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
633 Cortex-A57.
634
51dcdd4d
NC		 6352013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
636
637 PR binutils/15068
638 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
639
c5d685bf
NC		 6402013-03-26 Nick Clifton <nickc@redhat.com>
641
9b978282
NC		 642 PR gas/15295
643 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
644 start of the file each time.
645
c5d685bf
NC		 646 PR gas/15178
647 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
648 FreeBSD targets.
649
9699c833
TG		 6502013-03-26 Douglas B Rupp <rupp@gnat.com>
651
652 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
653 after fixup.
654
4755303e
WN		 6552013-03-21 Will Newton <will.newton@linaro.org>
656
657 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
658 pc-relative str instructions in Thumb mode.
659
81f5558e
NC		 6602013-03-21 Michael Schewe <michael.schewe@gmx.net>
661
662 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
663 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
664 R_H8_DISP32A16.
665 * config/tc-h8300.h: Remove duplicated defines.
666
71863e73
NC		 6672013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
668
669 PR gas/15282
670 * tc-avr.c (mcu_has_3_byte_pc): New function.
671 (tc_cfi_frame_initial_instructions): Call it to find return
672 address size.
673
795b8e6b
NC		 6742013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
675
676 PR gas/15095
677 * config/tc-tic6x.c (tic6x_try_encode): Handle
678 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
679 encode register pair numbers when required.
680
ba86b375
WN		 6812013-03-15 Will Newton <will.newton@linaro.org>
682
683 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
684 in vstr in Thumb mode for pre-ARMv7 cores.
685
9e6f3811
AS		 6862013-03-14 Andreas Schwab <schwab@suse.de>
687
688 * doc/c-arc.texi (ARC Directives): Revert last change and use
689 @itemize instead of @table.
690 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
691
b10bf8c5
NC		 6922013-03-14 Nick Clifton <nickc@redhat.com>
693
694 PR gas/15273
695 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
696 NULL message, instead just check ARM_CPU_IS_ANY directly.
697
ba724cfc
NC		 6982013-03-14 Nick Clifton <nickc@redhat.com>
699
700 PR gas/15212
9e6f3811 701 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 702 for table format.
703 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
704 to the @item directives.
705 (ARM-Neon-Alignment): Move to correct place in the document.
706 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
707 formatting.
708 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
709 @smallexample.
710
531a94fd
SL		 7112013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
712
713 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
714 case. Add default BAD_CASE to switch.
715
dad60f8e
SL		 7162013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
717
718 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
719 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
720
dd5181d5
KT		 7212013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
722
723 * config/tc-arm.c (crc_ext_armv8): New feature set.
724 (UNPRED_REG): New macro.
725 (do_crc32_1): New function.
726 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
727 do_crc32ch, do_crc32cw): Likewise.
728 (TUEc): New macro.
729 (insns): Add entries for crc32 mnemonics.
730 (arm_extensions): Add entry for crc.
731
8e723a10
CLT		 7322013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
733
734 * write.h (struct fix): Add fx_dot_frag field.
735 (dot_frag): Declare.
736 * write.c (dot_frag): New variable.
737 (fix_new_internal): Set fx_dot_frag field with dot_frag.
738 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
739 * expr.c (expr): Save value of frag_now in dot_frag when setting
740 dot_value.
741 * read.c (emit_expr): Likewise. Delete comments.
742
be05d201
L		 7432013-03-07 H.J. Lu <hongjiu.lu@intel.com>
744
745 * config/tc-i386.c (flag_code_names): Removed.
746 (i386_index_check): Rewrote.
747
62b0d0d5
YZ		 7482013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
749
750 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
751 add comment.
752 (aarch64_double_precision_fmovable): New function.
753 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
754 function; handle hexadecimal representation of IEEE754 encoding.
755 (parse_operands): Update the call to parse_aarch64_imm_float.
756
165de32a
L		 7572013-02-28 H.J. Lu <hongjiu.lu@intel.com>
758
759 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
760 (check_hle): Updated.
761 (md_assemble): Likewise.
762 (parse_insn): Likewise.
763
d5de92cf
L		 7642013-02-28 H.J. Lu <hongjiu.lu@intel.com>
765
766 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 767 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 768 (parse_insn): Remove expecting_string_instruction. Set
769 i.rep_prefix.
770
e60bb1dd
YZ		 7712013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
772
773 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
774
aeebdd9b
YZ		 7752013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
776
777 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
778 for system registers.
779
4107ae22
DD		 7802013-02-27 DJ Delorie <dj@redhat.com>
781
782 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
783 (rl78_op): Handle %code().
784 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
785 (tc_gen_reloc): Likwise; convert to a computed reloc.
786 (md_apply_fix): Likewise.
787
151fa98f
NC		 7882013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
789
790 * config/rl78-parse.y: Fix encoding of DIVWU insn.
791
70a8bc5b 7922013-02-25 Terry Guo <terry.guo@arm.com>
793
794 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
795 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
796 list of accepted CPUs.
797
5c111e37
L		 7982013-02-19 H.J. Lu <hongjiu.lu@intel.com>
799
800 PR gas/15159
801 * config/tc-i386.c (cpu_arch): Add ".smap".
802
803 * doc/c-i386.texi: Document smap.
804
8a75745d
MR		 8052013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
806
807 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
808 mips_assembling_insn appropriately.
809 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
810
79850f26
MR		 8112013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
812
cf29fc61 813 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 814 extraneous braces.
815
4c261dff
NC		 8162013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
817
5c111e37 818 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 819
ea33f281
NC		 8202013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
821
822 * configure.tgt: Add nios2-*-rtems*.
823
a1ccaec9
YZ		 8242013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
825
826 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
827 NULL.
828
0aa27725
RS		 8292013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
830
831 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
832 (macro): Use it. Assert that trunc.w.s is not used for r5900.
833
da4339ed
NC		 8342013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
835
836 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
837 core.
838
36591ba1 8392013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 840 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 841
842 Based on patches from Altera Corporation.
843
844 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
845 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
846 * Makefile.in: Regenerated.
847 * configure.tgt: Add case for nios2*-linux*.
848 * config/obj-elf.c: Conditionally include elf/nios2.h.
849 * config/tc-nios2.c: New file.
850 * config/tc-nios2.h: New file.
851 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
852 * doc/Makefile.in: Regenerated.
853 * doc/all.texi: Set NIOSII.
854 * doc/as.texinfo (Overview): Add Nios II options.
855 (Machine Dependencies): Include c-nios2.texi.
856 * doc/c-nios2.texi: New file.
857 * NEWS: Note Altera Nios II support.
858
94d4433a
AM		 8592013-02-06 Alan Modra <amodra@gmail.com>
860
861 PR gas/14255
862 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
863 Don't skip fixups with fx_subsy non-NULL.
864 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
865 with fx_subsy non-NULL.
866
ace9af6f
L		 8672013-02-04 H.J. Lu <hongjiu.lu@intel.com>
868
869 * doc/c-metag.texi: Add "@c man" markers.
870
89d67ed9
AM		 8712013-02-04 Alan Modra <amodra@gmail.com>
872
873 * write.c (fixup_segment): Return void. Delete seg_reloc_count
874 related code.
875 (TC_ADJUST_RELOC_COUNT): Delete.
876 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
877
89072bd6
AM		 8782013-02-04 Alan Modra <amodra@gmail.com>
879
880 * po/POTFILES.in: Regenerate.
881
f9b2d544
NC		 8822013-01-30 Markos Chandras <markos.chandras@imgtec.com>
883
884 * config/tc-metag.c: Make SWAP instruction less permissive with
885 its operands.
886
392ca752
DD		 8872013-01-29 DJ Delorie <dj@redhat.com>
888
889 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
890 relocs in .word/.etc statements.
891
427d0db6
RM		 8922013-01-29 Roland McGrath <mcgrathr@google.com>
893
894 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
895 immediate value for 8-bit offset" error so it shows line info.
896
4faf939a
JM		 8972013-01-24 Joseph Myers <joseph@codesourcery.com>
898
899 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
900 for 64-bit output.
901
78c8d46c
NC		 9022013-01-24 Nick Clifton <nickc@redhat.com>
903
904 * config/tc-v850.c: Add support for e3v5 architecture.
905 * doc/c-v850.texi: Mention new support.
906
fb5b7503
NC		 9072013-01-23 Nick Clifton <nickc@redhat.com>
908
909 PR gas/15039
910 * config/tc-avr.c: Include dwarf2dbg.h.
911
8ce3d284
L		 9122013-01-18 H.J. Lu <hongjiu.lu@intel.com>
913
914 * config/tc-i386.c (reloc): Support size relocation only for ELF.
915 (tc_i386_fix_adjustable): Likewise.
916 (lex_got): Likewise.
917 (tc_gen_reloc): Likewise.
918
f5555712
YZ		 9192013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
920
921 * config/tc-aarch64.c (output_operand_error_record): Change to output
922 the out-of-range error message as value-expected message if there is
923 only one single value in the expected range.
924 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
925 LSL #0 as a programmer-friendly feature.
926
8fd4256d
L		 9272013-01-16 H.J. Lu <hongjiu.lu@intel.com>
928
929 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
930 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
931 BFD_RELOC_64_SIZE relocations.
932 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
933 for it.
934 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
935 relocations against local symbols.
936
a5840dce
AM		 9372013-01-16 Alan Modra <amodra@gmail.com>
938
939 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
940 finding some sort of toc syntax error, and break to avoid
941 compiler uninit warning.
942
af89796a
L		 9432013-01-15 H.J. Lu <hongjiu.lu@intel.com>
944
945 PR gas/15019
946 * config/tc-i386.c (lex_got): Increment length by 1 if the
947 relocation token is removed.
948
dd42f060
NC		 9492013-01-15 Nick Clifton <nickc@redhat.com>
950
951 * config/tc-v850.c (md_assemble): Allow signed values for
952 V850E_IMMEDIATE.
953
464e3686
SK		 9542013-01-11 Sean Keys <skeys@ipdatasys.com>
955
956 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 957 git to cvs.
464e3686 958
5817ffd1
PB		 9592013-01-10 Peter Bergner <bergner@vnet.ibm.com>
960
961 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
962 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
963 * config/tc-ppc.c (md_show_usage): Likewise.
964 (ppc_handle_align): Handle power8's group ending nop.
965
f4b1f6a9
SK		 9662013-01-10 Sean Keys <skeys@ipdatasys.com>
967
968 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 969 that the assember exits after the opcodes have been printed.
f4b1f6a9 970
34bca508
L		 9712013-01-10 H.J. Lu <hongjiu.lu@intel.com>
972
973 * app.c: Remove trailing white spaces.
974 * as.c: Likewise.
975 * as.h: Likewise.
976 * cond.c: Likewise.
977 * dw2gencfi.c: Likewise.
978 * dwarf2dbg.h: Likewise.
979 * ecoff.c: Likewise.
980 * input-file.c: Likewise.
981 * itbl-lex.h: Likewise.
982 * output-file.c: Likewise.
983 * read.c: Likewise.
984 * sb.c: Likewise.
985 * subsegs.c: Likewise.
986 * symbols.c: Likewise.
987 * write.c: Likewise.
988 * config/tc-i386.c: Likewise.
989 * doc/Makefile.am: Likewise.
990 * doc/Makefile.in: Likewise.
991 * doc/c-aarch64.texi: Likewise.
992 * doc/c-alpha.texi: Likewise.
993 * doc/c-arc.texi: Likewise.
994 * doc/c-arm.texi: Likewise.
995 * doc/c-avr.texi: Likewise.
996 * doc/c-bfin.texi: Likewise.
997 * doc/c-cr16.texi: Likewise.
998 * doc/c-d10v.texi: Likewise.
999 * doc/c-d30v.texi: Likewise.
1000 * doc/c-h8300.texi: Likewise.
1001 * doc/c-hppa.texi: Likewise.
1002 * doc/c-i370.texi: Likewise.
1003 * doc/c-i386.texi: Likewise.
1004 * doc/c-i860.texi: Likewise.
1005 * doc/c-m32c.texi: Likewise.
1006 * doc/c-m32r.texi: Likewise.
1007 * doc/c-m68hc11.texi: Likewise.
1008 * doc/c-m68k.texi: Likewise.
1009 * doc/c-microblaze.texi: Likewise.
1010 * doc/c-mips.texi: Likewise.
1011 * doc/c-msp430.texi: Likewise.
1012 * doc/c-mt.texi: Likewise.
1013 * doc/c-s390.texi: Likewise.
1014 * doc/c-score.texi: Likewise.
1015 * doc/c-sh.texi: Likewise.
1016 * doc/c-sh64.texi: Likewise.
1017 * doc/c-tic54x.texi: Likewise.
1018 * doc/c-tic6x.texi: Likewise.
1019 * doc/c-v850.texi: Likewise.
1020 * doc/c-xc16x.texi: Likewise.
1021 * doc/c-xgate.texi: Likewise.
1022 * doc/c-xtensa.texi: Likewise.
1023 * doc/c-z80.texi: Likewise.
1024 * doc/internals.texi: Likewise.
1025
4c665b71
RM		 10262013-01-10 Roland McGrath <mcgrathr@google.com>
1027
1028 * hash.c (hash_new_sized): Make it global.
1029 * hash.h: Declare it.
1030 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1031 pass a small size.
1032
a3c62988
NC		 10332013-01-10 Will Newton <will.newton@imgtec.com>
1034
1035 * Makefile.am: Add Meta.
1036 * Makefile.in: Regenerate.
1037 * config/tc-metag.c: New file.
1038 * config/tc-metag.h: New file.
1039 * configure.tgt: Add Meta.
1040 * doc/Makefile.am: Add Meta.
1041 * doc/Makefile.in: Regenerate.
1042 * doc/all.texi: Add Meta.
1043 * doc/as.texiinfo: Document Meta options.
1044 * doc/c-metag.texi: New file.
1045
b37df7c4
SE		 10462013-01-09 Steve Ellcey <sellcey@mips.com>
1047
1048 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1049 calls.
1050 * config/tc-mips.c (internalError): Remove, replace with abort.
1051
a3251895
YZ		 10522013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1053
1054 * config/tc-aarch64.c (parse_operands): Change to compare the result
1055 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1056
8ab8155f
NC		 10572013-01-07 Nick Clifton <nickc@redhat.com>
1058
1059 PR gas/14887
1060 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1061 anticipated character.
1062 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1063 here as it is no longer needed.
1064
a4ac1c42
AS		 10652013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1066
1067 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1068 * doc/c-score.texi (SCORE-Opts): Likewise.
1069 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1070
e407c74b
NC		 10712013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1072
1073 * config/tc-mips.c: Add support for MIPS r5900.
1074 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1075 lq and sq.
1076 (can_swap_branch_p, get_append_method): Detect some conditional
1077 short loops to fix a bug on the r5900 by NOP in the branch delay
1078 slot.
1079 (M_MUL): Support 3 operands in multu on r5900.
1080 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1081 (s_mipsset): Force 32 bit floating point on r5900.
1082 (mips_ip): Check parameter range of instructions mfps and mtps on
1083 r5900.
1084 * configure.in: Detect CPU type when target string contains r5900
1085 (e.g. mips64r5900el-linux-gnu).
1086
62658407
L		 10872013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1088
1089 * as.c (parse_args): Update copyright year to 2013.
1090
95830fd1
YZ		 10912013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1092
1093 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1094 and "cortex57".
1095
517bb291 10962013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1097
517bb291
NC		 1098 PR gas/14987
1099 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1100 closing bracket.
d709e4e6 1101
517bb291 1102For older changes see ChangeLog-2012
08d56133 1103\f
517bb291 1104Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1105
1106Copying and distribution of this file, with or without modification,
1107are permitted in any medium without royalty provided the copyright
1108notice and this notice are preserved.
1109
08d56133
NC		 1110Local Variables:
1111mode: change-log
1112left-margin: 8
1113fill-column: 74
1114version-control: never
1115End:
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