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2013-07-15 Shawn Landden <shawnlandden@gmail.com>
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a92713e6
RS		 12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
4 New functions, split out from...
5 (reg_lookup): ...here. Remove itbl support.
6 (reglist_lookup): Delete.
7 (mips_operand_token_type): New enum.
8 (mips_operand_token): New structure.
9 (mips_operand_tokens): New variable.
10 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
11 (mips_parse_arguments): New functions.
12 (md_begin): Initialize mips_operand_tokens.
13 (mips_arg_info): Add a token field. Remove optional_reg field.
14 (match_char, match_expression): New functions.
15 (match_const_int): Use match_expression. Remove "s" argument
16 and return a boolean result. Remove O_register handling.
17 (match_regno, match_reg, match_reg_range): New functions.
18 (match_int_operand, match_mapped_int_operand, match_msb_operand)
19 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
20 (match_addiusp_operand, match_clo_clz_dest_operand)
21 (match_lwm_swm_list_operand, match_entry_exit_operand)
22 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
23 (match_tied_reg_operand): Remove "s" argument and return a boolean
24 result. Match tokens rather than text. Update calls to
25 match_const_int. Rely on match_regno to call check_regno.
26 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
27 "arg" argument. Return a boolean result.
28 (parse_float_constant): Replace with...
29 (match_float_constant): ...this new function.
30 (match_operand): Remove "s" argument and return a boolean result.
31 Update calls to subfunctions.
32 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
33 rather than string-parsing routines. Update handling of optional
34 registers for token scheme.
35
89565f1b
RS		 362013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
37
38 * config/tc-mips.c (parse_float_constant): Split out from...
39 (mips_ip): ...here.
40
3c14a432
RS		 412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
42
43 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
44 Delete.
45
364215c8
RS		 462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
47
48 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
49 (match_entry_exit_operand): New function.
50 (match_save_restore_list_operand): Likewise.
51 (match_operand): Use them.
52 (check_absolute_expr): Delete.
53 (mips16_ip): Rewrite main parsing loop to use mips_operands.
54
9e12b7a2
RS		 552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
56
57 * config/tc-mips.c: Enable functions commented out in previous patch.
58 (SKIP_SPACE_TABS): Move further up file.
59 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
60 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
61 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
62 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
63 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
64 (micromips_imm_b_map, micromips_imm_c_map): Delete.
65 (mips_lookup_reg_pair): Delete.
66 (macro): Use report_bad_range and report_bad_field.
67 (mips_immed, expr_const_in_range): Delete.
68 (mips_ip): Rewrite main parsing loop to use new functions.
69
a1d78564
RS		 702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
71
72 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
73 Change return type to bfd_boolean.
74 (report_bad_range, report_bad_field): New functions.
75 (mips_arg_info): New structure.
76 (match_const_int, convert_reg_type, check_regno, match_int_operand)
77 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
78 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
79 (match_addiusp_operand, match_clo_clz_dest_operand)
80 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
81 (match_pc_operand, match_tied_reg_operand, match_operand)
82 (check_completed_insn): New functions, commented out for now.
83
e077a1c8
RS		 842013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
85
86 * config/tc-mips.c (insn_insert_operand): New function.
87 (macro_build, mips16_macro_build): Put null character check
88 in the for loop and convert continues to breaks. Use operand
89 structures to handle constant operands.
90
ab902481
RS		 912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (validate_mips_insn): Move further up file.
94 Add insn_bits and decode_operand arguments. Use the mips_operand
95 fields to work out which bits an operand occupies. Detect double
96 definitions.
97 (validate_micromips_insn): Move further up file. Call into
98 validate_mips_insn.
99
2f8b73cc
RS		 1002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
101
102 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
103
c8276761
RS		 1042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
105
106 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
107 and "~".
108 (macro): Update accordingly.
109
77bd4346
RS		 1102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
111
112 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
113 (imm_reloc): Delete.
114 (md_assemble): Remove imm_reloc handling.
115 (mips_ip): Update commentary. Use offset_expr and offset_reloc
116 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
117 Use a temporary array rather than imm_reloc when parsing
118 constant expressions. Remove imm_reloc initialization.
119 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
120 for the relaxable field. Use a relax_char variable to track the
121 type of this field. Remove imm_reloc initialization.
122
cc537e56
RS		 1232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * config/tc-mips.c (mips16_ip): Handle "I".
126
ba92f887
MR		 1272013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
128
129 * config/tc-mips.c (mips_flag_nan2008): New variable.
130 (options): Add OPTION_NAN enum value.
131 (md_longopts): Handle it.
132 (md_parse_option): Likewise.
133 (s_nan): New function.
134 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
135 (md_show_usage): Add -mnan.
136
137 * doc/as.texinfo (Overview): Add -mnan.
138 * doc/c-mips.texi (MIPS Opts): Document -mnan.
139 (MIPS NaN Encodings): New node. Document .nan directive.
140 (MIPS-Dependent): List the new node.
141
c1094734
TG		 1422013-07-09 Tristan Gingold <gingold@adacore.com>
143
144 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
145
0cbbe1b8
RS		 1462013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
147
148 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
149 for 'A' and assume that the constant has been elided if the result
150 is an O_register.
151
f2ae14a1
RS		 1522013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (gprel16_reloc_p): New function.
155 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
156 BFD_RELOC_UNUSED.
157 (offset_high_part, small_offset_p): New functions.
158 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
159 register load and store macros, handle the 16-bit offset case first.
160 If a 16-bit offset is not suitable for the instruction we're
161 generating, load it into the temporary register using
162 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
163 M_L_DAB code once the address has been constructed. For double load
164 and store macros, again handle the 16-bit offset case first.
165 If the second register cannot be accessed from the same high
166 part as the first, load it into AT using ADDRESS_ADDI_INSN.
167 Fix the handling of LD in cases where the first register is the
168 same as the base. Also handle the case where the offset is
169 not 16 bits and the second register cannot be accessed from the
170 same high part as the first. For unaligned loads and stores,
171 fuse the offbits == 12 and old "ab" handling. Apply this handling
172 whenever the second offset needs a different high part from the first.
173 Construct the offset using ADDRESS_ADDI_INSN where possible,
174 for offbits == 16 as well as offbits == 12. Use offset_reloc
175 when constructing the individual loads and stores.
176 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
177 and offset_reloc before matching against a particular opcode.
178 Handle elided 'A' constants. Allow 'A' constants to use
179 relocation operators.
180
5c324c16
RS		 1812013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
182
183 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
184 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
185 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
186
23e69e47
RS		 1872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
188
189 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
190 Require the msb to be <= 31 for "+s". Check that the size is <= 31
191 for both "+s" and "+S".
192
27c5c572
RS		 1932013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
194
195 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
196 (mips_ip, mips16_ip): Handle "+i".
197
e76ff5ab
RS		 1982013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
199
200 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
201 (micromips_to_32_reg_h_map): Rename to...
202 (micromips_to_32_reg_h_map1): ...this.
203 (micromips_to_32_reg_i_map): Rename to...
204 (micromips_to_32_reg_h_map2): ...this.
205 (mips_lookup_reg_pair): New function.
206 (gpr_write_mask, macro): Adjust after above renaming.
207 (validate_micromips_insn): Remove "mi" handling.
208 (mips_ip): Likewise. Parse both registers in a pair for "mh".
209
fa7616a4
RS		 2102013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
211
212 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
213 (mips_ip): Remove "+D" and "+T" handling.
214
fb798c50
AK		 2152013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
216
217 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
218 relocs.
219
2c0a3565
MS		 2202013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
221
4aa2c5e2
MS		 222 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
223
2242013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
225
2c0a3565
MS		 226 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
227 (aarch64_force_relocation): Likewise.
228
f40da81b
AM		 2292013-07-02 Alan Modra <amodra@gmail.com>
230
231 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
232
81566a9b
MR		 2332013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
234
235 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
236 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
237 Replace @sc{mips16} with literal `MIPS16'.
238 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
239
a6bb11b2
YZ		 2402013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
241
242 * config/tc-aarch64.c (reloc_table): Replace
243 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
244 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
245 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
246 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
247 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
248 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
249 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
250 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
251 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
252 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
253 (aarch64_force_relocation): Likewise.
254
cec5225b
YZ		 2552013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
256
257 * config/tc-aarch64.c (ilp32_p): New static variable.
258 (elf64_aarch64_target_format): Return the target according to the
259 value of 'ilp32_p'.
260 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
261 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
262 (aarch64_dwarf2_addr_size): New function.
263 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
264 (DWARF2_ADDR_SIZE): New define.
265
e335d9cb
RS		 2662013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
267
268 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
269
18870af7
RS		 2702013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
271
272 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
273
833794fc
MR		 2742013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
275
276 * config/tc-mips.c (mips_set_options): Add insn32 member.
277 (mips_opts): Initialize it.
278 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
279 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
280 (md_longopts): Add "minsn32" and "mno-insn32" options.
281 (is_size_valid): Handle insn32 mode.
282 (md_assemble): Pass instruction string down to macro.
283 (brk_fmt): Add second dimension and insn32 mode initializers.
284 (mfhl_fmt): Likewise.
285 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
286 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
287 (macro_build_jalr, move_register): Handle insn32 mode.
288 (macro_build_branch_rs): Likewise.
289 (macro): Handle insn32 mode.
290 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
291 (mips_ip): Handle insn32 mode.
292 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
293 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
294 (mips_handle_align): Handle insn32 mode.
295 (md_show_usage): Add -minsn32 and -mno-insn32.
296
297 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
298 -mno-insn32 options.
299 (-minsn32, -mno-insn32): New options.
300 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
301 options.
302 (MIPS assembly options): New node. Document .set insn32 and
303 .set noinsn32.
304 (MIPS-Dependent): List the new node.
305
d1706f38
NC		 3062013-06-25 Nick Clifton <nickc@redhat.com>
307
308 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
309 the PC in indirect addressing on 430xv2 parts.
310 (msp430_operands): Add version test to hardware bug encoding
311 restrictions.
312
477330fc
RM		 3132013-06-24 Roland McGrath <mcgrathr@google.com>
314
d996d970
RM		 315 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
316 so it skips whitespace before it.
317 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
318
477330fc
RM		 319 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
320 (arm_reg_parse_multi): Skip whitespace first.
321 (parse_reg_list): Likewise.
322 (parse_vfp_reg_list): Likewise.
323 (s_arm_unwind_save_mmxwcg): Likewise.
324
24382199
NC		 3252013-06-24 Nick Clifton <nickc@redhat.com>
326
327 PR gas/15623
328 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
329
c3678916
RS		 3302013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
331
332 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
333
42429eac
RS		 3342013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
335
336 * config/tc-mips.c: Assert that offsetT and valueT are at least
337 8 bytes in size.
338 (GPR_SMIN, GPR_SMAX): New macros.
339 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
340
f3ded42a
RS		 3412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
344 conditions. Remove any code deselected by them.
345 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
346
e8044f35
RS		 3472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
348
349 * NEWS: Note removal of ECOFF support.
350 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
351 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
352 (MULTI_CFILES): Remove config/e-mipsecoff.c.
353 * Makefile.in: Regenerate.
354 * configure.in: Remove MIPS ECOFF references.
355 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
356 Delete cases.
357 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
358 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
359 (mips-*-*): ...this single case.
360 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
361 MIPS emulations to be e-mipself*.
362 * configure: Regenerate.
363 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
364 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
365 (mips-*-sysv*): Remove coff and ecoff cases.
366 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
367 * ecoff.c: Remove reference to MIPS ECOFF.
368 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
369 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
370 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
371 (mips_hi_fixup): Tweak comment.
372 (append_insn): Require a howto.
373 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
374
98508b2a
RS		 3752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
376
377 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
378 Use "CPU" instead of "cpu".
379 * doc/c-mips.texi: Likewise.
380 (MIPS Opts): Rename to MIPS Options.
381 (MIPS option stack): Rename to MIPS Option Stack.
382 (MIPS ASE instruction generation overrides): Rename to
383 MIPS ASE Instruction Generation Overrides (for now).
384 (MIPS floating-point): Rename to MIPS Floating-Point.
385
fc16f8cc
RS		 3862013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
387
388 * doc/c-mips.texi (MIPS Macros): New section.
389 (MIPS Object): Replace with...
390 (MIPS Small Data): ...this new section.
391
5a7560b5
RS		 3922013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
393
394 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
395 Capitalize name. Use @kindex instead of @cindex for .set entries.
396
a1b86ab7
RS		 3972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
398
399 * doc/c-mips.texi (MIPS Stabs): Remove section.
400
c6278170
RS		 4012013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
402
403 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
404 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
405 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
406 (ISA_SUPPORTS_VIRT64_ASE): Delete.
407 (mips_ase): New structure.
408 (mips_ases): New table.
409 (FP64_ASES): New macro.
410 (mips_ase_groups): New array.
411 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
412 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
413 functions.
414 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
415 (md_parse_option): Use mips_ases and mips_set_ase instead of
416 separate case statements for each ASE option.
417 (mips_after_parse_args): Use FP64_ASES. Use
418 mips_check_isa_supports_ases to check the ASEs against
419 other options.
420 (s_mipsset): Use mips_ases and mips_set_ase instead of
421 separate if statements for each ASE option. Use
422 mips_check_isa_supports_ases, even when a non-ASE option
423 is specified.
424
63a4bc21
KT		 4252013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
426
427 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
428
c31f3936
RS		 4292013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
430
431 * config/tc-mips.c (md_shortopts, options, md_longopts)
432 (md_longopts_size): Move earlier in file.
433
846ef2d0
RS		 4342013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
435
436 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
437 with a single "ase" bitmask.
438 (mips_opts): Update accordingly.
439 (file_ase, file_ase_explicit): New variables.
440 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
441 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
442 (ISA_HAS_ROR): Adjust for mips_set_options change.
443 (is_opcode_valid): Take the base ase mask directly from mips_opts.
444 (mips_ip): Adjust for mips_set_options change.
445 (md_parse_option): Likewise. Update file_ase_explicit.
446 (mips_after_parse_args): Adjust for mips_set_options change.
447 Use bitmask operations to select the default ASEs. Set file_ase
448 rather than individual per-ASE variables.
449 (s_mipsset): Adjust for mips_set_options change.
450 (mips_elf_final_processing): Test file_ase rather than
451 file_ase_mdmx. Remove commented-out code.
452
d16afab6
RS		 4532013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
454
455 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
456 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
457 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
458 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
459 (mips_after_parse_args): Use the new "ase" field to choose
460 the default ASEs.
461 (mips_cpu_info_table): Move ASEs from the "flags" field to the
462 "ase" field.
463
e83a675f
RE		 4642013-06-18 Richard Earnshaw <rearnsha@arm.com>
465
466 * config/tc-arm.c (symbol_preemptible): New function.
467 (relax_branch): Use it.
468
7f3c4072
CM		 4692013-06-17 Catherine Moore <clm@codesourcery.com>
470 Maciej W. Rozycki <macro@codesourcery.com>
471 Chao-Ying Fu <fu@mips.com>
472
473 * config/tc-mips.c (mips_set_options): Add ase_eva.
474 (mips_set_options mips_opts): Add ase_eva.
475 (file_ase_eva): Declare.
476 (ISA_SUPPORTS_EVA_ASE): Define.
477 (IS_SEXT_9BIT_NUM): Define.
478 (MIPS_CPU_ASE_EVA): Define.
479 (is_opcode_valid): Add support for ase_eva.
480 (macro_build): Likewise.
481 (macro): Likewise.
482 (validate_mips_insn): Likewise.
483 (validate_micromips_insn): Likewise.
484 (mips_ip): Likewise.
485 (options): Add OPTION_EVA and OPTION_NO_EVA.
486 (md_longopts): Add -meva and -mno-eva.
487 (md_parse_option): Process new options.
488 (mips_after_parse_args): Check for valid EVA combinations.
489 (s_mipsset): Likewise.
490
e410add4
RS		 4912013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
492
493 * dwarf2dbg.h (dwarf2_move_insn): Declare.
494 * dwarf2dbg.c (line_subseg): Add pmove_tail.
495 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
496 (dwarf2_gen_line_info_1): Update call accordingly.
497 (dwarf2_move_insn): New function.
498 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
499
6a50d470
RS		 5002013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
501
502 Revert:
503
504 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
505
506 PR gas/13024
507 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
508 (dwarf2_gen_line_info_1): Delete.
509 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
510 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
511 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
512 (dwarf2_directive_loc): Push previous .locs instead of generating
513 them immediately.
514
f122319e
CF		 5152013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
516
517 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
518 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
519
909c7f9c
NC		 5202013-06-13 Nick Clifton <nickc@redhat.com>
521
522 PR gas/15602
523 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
524 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
525 function. Generates an error if the adjusted offset is out of a
526 16-bit range.
527
5d5755a7
SL		 5282013-06-12 Sandra Loosemore <sandra@codesourcery.com>
529
530 * config/tc-nios2.c (md_apply_fix): Mask constant
531 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
532
3bf0dbfb
MR		 5332013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
534
535 * config/tc-mips.c (append_insn): Don't do branch relaxation for
536 MIPS-3D instructions either.
537 (md_convert_frag): Update the COPx branch mask accordingly.
538
539 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
540 option.
541 * doc/as.texinfo (Overview): Add --relax-branch and
542 --no-relax-branch.
543 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
544 --no-relax-branch.
545
9daf7bab
SL		 5462013-06-09 Sandra Loosemore <sandra@codesourcery.com>
547
548 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
549 omitted.
550
d301a56b
RS		 5512013-06-08 Catherine Moore <clm@codesourcery.com>
552
553 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
554 (is_opcode_valid_16): Pass ase value to opcode_is_member.
555 (append_insn): Change INSN_xxxx to ASE_xxxx.
556
7bab7634
DC		 5572013-06-01 George Thomas <george.thomas@atmel.com>
558
559 * gas/config/tc-avr.c: Change ISA for devices with USB support to
560 AVR_ISA_XMEGAU
561
f60cf82f
L		 5622013-05-31 H.J. Lu <hongjiu.lu@intel.com>
563
564 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
565 for ELF.
566
a3f278e2
CM		 5672013-05-31 Paul Brook <paul@codesourcery.com>
568
569 gas/
570 * config/tc-mips.c (s_ehword): New.
571
067ec077
CM		 5722013-05-30 Paul Brook <paul@codesourcery.com>
573
574 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
575
d6101ac2
MR		 5762013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
577
578 * write.c (resolve_reloc_expr_symbols): On REL targets don't
579 convert relocs who have no relocatable field either. Rephrase
580 the conditional so that the PC-relative check is only applied
581 for REL targets.
582
f19ccbda
MR		 5832013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
584
585 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
586 calculation.
587
418009c2
YZ		 5882013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
589
590 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 591 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 592 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
593 (md_apply_fix): Likewise.
594 (aarch64_force_relocation): Likewise.
595
0a8897c7
KT		 5962013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
597
598 * config/tc-arm.c (it_fsm_post_encode): Improve
599 warning messages about deprecated IT block formats.
600
89d2a2a3
MS		 6012013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
602
603 * config/tc-aarch64.c (md_apply_fix): Move value range checking
604 inside fx_done condition.
605
c77c0862
RS		 6062013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
607
608 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
609
c0637f3a
PB		 6102013-05-20 Peter Bergner <bergner@vnet.ibm.com>
611
612 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
613 and clean up warning when using PRINT_OPCODE_TABLE.
614
5656a981
AM		 6152013-05-20 Alan Modra <amodra@gmail.com>
616
617 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
618 and data fixups performing shift/high adjust/sign extension on
619 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
620 when writing data fixups rather than recalculating size.
621
997b26e8
JBG		 6222013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
623
624 * doc/c-msp430.texi: Fix typo.
625
9f6e76f4
TG		 6262013-05-16 Tristan Gingold <gingold@adacore.com>
627
628 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
629 are also TOC symbols.
630
638d3803
NC		 6312013-05-16 Nick Clifton <nickc@redhat.com>
632
633 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
634 Add -mcpu command to specify core type.
997b26e8 635 * doc/c-msp430.texi: Update documentation.
638d3803 636
b015e599
AP		 6372013-05-09 Andrew Pinski <apinski@cavium.com>
638
639 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
640 (mips_opts): Update for the new field.
641 (file_ase_virt): New variable.
642 (ISA_SUPPORTS_VIRT_ASE): New macro.
643 (ISA_SUPPORTS_VIRT64_ASE): New macro.
644 (MIPS_CPU_ASE_VIRT): New define.
645 (is_opcode_valid): Handle ase_virt.
646 (macro_build): Handle "+J".
647 (validate_mips_insn): Likewise.
648 (mips_ip): Likewise.
649 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
650 (md_longopts): Add mvirt and mnovirt
651 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
652 (mips_after_parse_args): Handle ase_virt field.
653 (s_mipsset): Handle "virt" and "novirt".
654 (mips_elf_final_processing): Add a comment about virt ASE might need
655 a new flag.
656 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
657 * doc/c-mips.texi: Document -mvirt and -mno-virt.
658 Document ".set virt" and ".set novirt".
659
da8094d7
AM		 6602013-05-09 Alan Modra <amodra@gmail.com>
661
662 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
663 control of operand flag bits.
664
c5f8c205
AM		 6652013-05-07 Alan Modra <amodra@gmail.com>
666
667 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
668 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
669 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
670 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
671 (md_apply_fix): Set fx_no_overflow for assorted relocations.
672 Shift and sign-extend fieldval for use by some VLE reloc
673 operand->insert functions.
674
b47468a6
CM		 6752013-05-06 Paul Brook <paul@codesourcery.com>
676 Catherine Moore <clm@codesourcery.com>
677
c5f8c205
AM		 678 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
679 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 680 (md_apply_fix): Likewise.
681 (tc_gen_reloc): Likewise.
682
2de39019
CM		 6832013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
684
685 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
686 (mips_fix_adjustable): Adjust pc-relative check to use
687 limited_pc_reloc_p.
688
754e2bb9
RS		 6892013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
690
691 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
692 (s_mips_stab): Do not restrict to stabn only.
693
13761a11
NC		 6942013-05-02 Nick Clifton <nickc@redhat.com>
695
696 * config/tc-msp430.c: Add support for the MSP430X architecture.
697 Add code to insert a NOP instruction after any instruction that
698 might change the interrupt state.
699 Add support for the LARGE memory model.
700 Add code to initialise the .MSP430.attributes section.
701 * config/tc-msp430.h: Add support for the MSP430X architecture.
702 * doc/c-msp430.texi: Document the new -mL and -mN command line
703 options.
704 * NEWS: Mention support for the MSP430X architecture.
705
df26367c
MR		 7062013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
707
708 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
709 alpha*-*-linux*ecoff*.
710
f02d8318
CF		 7112013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
712
713 * config/tc-mips.c (mips_ip): Add sizelo.
714 For "+C", "+G", and "+H", set sizelo and compare against it.
715
b40bf0a2
NC		 7162013-04-29 Nick Clifton <nickc@redhat.com>
717
718 * as.c (Options): Add -gdwarf-sections.
719 (parse_args): Likewise.
720 * as.h (flag_dwarf_sections): Declare.
721 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
722 (process_entries): When -gdwarf-sections is enabled generate
723 fragmentary .debug_line sections.
724 (out_debug_line): Set the section for the .debug_line section end
725 symbol.
726 * doc/as.texinfo: Document -gdwarf-sections.
727 * NEWS: Mention -gdwarf-sections.
728
8eeccb77 7292013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 730
731 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
732 according to the target parameter. Don't call s_segm since s_segm
733 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
734 initialized yet.
735 (md_begin): Call s_segm according to target parameter from command
736 line.
737
49926cd0
AM		 7382013-04-25 Alan Modra <amodra@gmail.com>
739
740 * configure.in: Allow little-endian linux.
741 * configure: Regenerate.
742
e3031850
SL		 7432013-04-24 Sandra Loosemore <sandra@codesourcery.com>
744
745 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
746 "fstatus" control register to "eccinj".
747
cb948fc0
KT		 7482013-04-19 Kai Tietz <ktietz@redhat.com>
749
750 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
751
4455e9ad
JB		 7522013-04-15 Julian Brown <julian@codesourcery.com>
753
754 * expr.c (add_to_result, subtract_from_result): Make global.
755 * expr.h (add_to_result, subtract_from_result): Add prototypes.
756 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
757 subtract_from_result to handle extra bit of precision for .sleb128
758 directive operands.
759
956a6ba3
JB		 7602013-04-10 Julian Brown <julian@codesourcery.com>
761
762 * read.c (convert_to_bignum): Add sign parameter. Use it
763 instead of X_unsigned to determine sign of resulting bignum.
764 (emit_expr): Pass extra argument to convert_to_bignum.
765 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
766 X_extrabit to convert_to_bignum.
767 (parse_bitfield_cons): Set X_extrabit.
768 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
769 Initialise X_extrabit field as appropriate.
770 (add_to_result): New.
771 (subtract_from_result): New.
772 (expr): Use above.
773 * expr.h (expressionS): Add X_extrabit field.
774
eb9f3f00
JB		 7752013-04-10 Jan Beulich <jbeulich@suse.com>
776
777 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
778 register being PC when is_t or writeback, and use distinct
779 diagnostic for the latter case.
780
ccb84d65
JB		 7812013-04-10 Jan Beulich <jbeulich@suse.com>
782
783 * gas/config/tc-arm.c (parse_operands): Re-write
784 po_barrier_or_imm().
785 (do_barrier): Remove bogus constraint().
786 (do_t_barrier): Remove.
787
4d13caa0
NC		 7882013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
789
790 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
791 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
792 ATmega2564RFR2
793 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
794
16d02dc9
JB		 7952013-04-09 Jan Beulich <jbeulich@suse.com>
796
797 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
798 Use local variable Rt in more places.
799 (do_vmsr): Accept all control registers.
800
05ac0ffb
JB		 8012013-04-09 Jan Beulich <jbeulich@suse.com>
802
803 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
804 if there was none specified for moves between scalar and core
805 register.
806
2d51fb74
JB		 8072013-04-09 Jan Beulich <jbeulich@suse.com>
808
809 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
810 NEON_ALL_LANES case.
811
94dcf8bf
JB		 8122013-04-08 Jan Beulich <jbeulich@suse.com>
813
814 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
815 PC-relative VSTR.
816
1472d06f
JB		 8172013-04-08 Jan Beulich <jbeulich@suse.com>
818
819 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
820 entry to sp_fiq.
821
0c76cae8
AM		 8222013-04-03 Alan Modra <amodra@gmail.com>
823
824 * doc/as.texinfo: Add support to generate man options for h8300.
825 * doc/c-h8300.texi: Likewise.
826
92eb40d9
RR		 8272013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
828
829 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
830 Cortex-A57.
831
51dcdd4d
NC		 8322013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
833
834 PR binutils/15068
835 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
836
c5d685bf
NC		 8372013-03-26 Nick Clifton <nickc@redhat.com>
838
9b978282
NC		 839 PR gas/15295
840 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
841 start of the file each time.
842
c5d685bf
NC		 843 PR gas/15178
844 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
845 FreeBSD targets.
846
9699c833
TG		 8472013-03-26 Douglas B Rupp <rupp@gnat.com>
848
849 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
850 after fixup.
851
4755303e
WN		 8522013-03-21 Will Newton <will.newton@linaro.org>
853
854 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
855 pc-relative str instructions in Thumb mode.
856
81f5558e
NC		 8572013-03-21 Michael Schewe <michael.schewe@gmx.net>
858
859 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
860 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
861 R_H8_DISP32A16.
862 * config/tc-h8300.h: Remove duplicated defines.
863
71863e73
NC		 8642013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
865
866 PR gas/15282
867 * tc-avr.c (mcu_has_3_byte_pc): New function.
868 (tc_cfi_frame_initial_instructions): Call it to find return
869 address size.
870
795b8e6b
NC		 8712013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
872
873 PR gas/15095
874 * config/tc-tic6x.c (tic6x_try_encode): Handle
875 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
876 encode register pair numbers when required.
877
ba86b375
WN		 8782013-03-15 Will Newton <will.newton@linaro.org>
879
880 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
881 in vstr in Thumb mode for pre-ARMv7 cores.
882
9e6f3811
AS		 8832013-03-14 Andreas Schwab <schwab@suse.de>
884
885 * doc/c-arc.texi (ARC Directives): Revert last change and use
886 @itemize instead of @table.
887 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
888
b10bf8c5
NC		 8892013-03-14 Nick Clifton <nickc@redhat.com>
890
891 PR gas/15273
892 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
893 NULL message, instead just check ARM_CPU_IS_ANY directly.
894
ba724cfc
NC		 8952013-03-14 Nick Clifton <nickc@redhat.com>
896
897 PR gas/15212
9e6f3811 898 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 899 for table format.
900 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
901 to the @item directives.
902 (ARM-Neon-Alignment): Move to correct place in the document.
903 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
904 formatting.
905 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
906 @smallexample.
907
531a94fd
SL		 9082013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
909
910 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
911 case. Add default BAD_CASE to switch.
912
dad60f8e
SL		 9132013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
914
915 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
916 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
917
dd5181d5
KT		 9182013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
919
920 * config/tc-arm.c (crc_ext_armv8): New feature set.
921 (UNPRED_REG): New macro.
922 (do_crc32_1): New function.
923 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
924 do_crc32ch, do_crc32cw): Likewise.
925 (TUEc): New macro.
926 (insns): Add entries for crc32 mnemonics.
927 (arm_extensions): Add entry for crc.
928
8e723a10
CLT		 9292013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
930
931 * write.h (struct fix): Add fx_dot_frag field.
932 (dot_frag): Declare.
933 * write.c (dot_frag): New variable.
934 (fix_new_internal): Set fx_dot_frag field with dot_frag.
935 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
936 * expr.c (expr): Save value of frag_now in dot_frag when setting
937 dot_value.
938 * read.c (emit_expr): Likewise. Delete comments.
939
be05d201
L		 9402013-03-07 H.J. Lu <hongjiu.lu@intel.com>
941
942 * config/tc-i386.c (flag_code_names): Removed.
943 (i386_index_check): Rewrote.
944
62b0d0d5
YZ		 9452013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
946
947 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
948 add comment.
949 (aarch64_double_precision_fmovable): New function.
950 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
951 function; handle hexadecimal representation of IEEE754 encoding.
952 (parse_operands): Update the call to parse_aarch64_imm_float.
953
165de32a
L		 9542013-02-28 H.J. Lu <hongjiu.lu@intel.com>
955
956 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
957 (check_hle): Updated.
958 (md_assemble): Likewise.
959 (parse_insn): Likewise.
960
d5de92cf
L		 9612013-02-28 H.J. Lu <hongjiu.lu@intel.com>
962
963 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 964 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 965 (parse_insn): Remove expecting_string_instruction. Set
966 i.rep_prefix.
967
e60bb1dd
YZ		 9682013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
969
970 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
971
aeebdd9b
YZ		 9722013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
973
974 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
975 for system registers.
976
4107ae22
DD		 9772013-02-27 DJ Delorie <dj@redhat.com>
978
979 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
980 (rl78_op): Handle %code().
981 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
982 (tc_gen_reloc): Likwise; convert to a computed reloc.
983 (md_apply_fix): Likewise.
984
151fa98f
NC		 9852013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
986
987 * config/rl78-parse.y: Fix encoding of DIVWU insn.
988
70a8bc5b 9892013-02-25 Terry Guo <terry.guo@arm.com>
990
991 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
992 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
993 list of accepted CPUs.
994
5c111e37
L		 9952013-02-19 H.J. Lu <hongjiu.lu@intel.com>
996
997 PR gas/15159
998 * config/tc-i386.c (cpu_arch): Add ".smap".
999
1000 * doc/c-i386.texi: Document smap.
1001
8a75745d
MR		 10022013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1003
1004 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1005 mips_assembling_insn appropriately.
1006 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1007
79850f26
MR		 10082013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1009
cf29fc61 1010 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1011 extraneous braces.
1012
4c261dff
NC		 10132013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1014
5c111e37 1015 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1016
ea33f281
NC		 10172013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1018
1019 * configure.tgt: Add nios2-*-rtems*.
1020
a1ccaec9
YZ		 10212013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1022
1023 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1024 NULL.
1025
0aa27725
RS		 10262013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1027
1028 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1029 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1030
da4339ed
NC		 10312013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1032
1033 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1034 core.
1035
36591ba1 10362013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1037 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1038
1039 Based on patches from Altera Corporation.
1040
1041 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1042 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1043 * Makefile.in: Regenerated.
1044 * configure.tgt: Add case for nios2*-linux*.
1045 * config/obj-elf.c: Conditionally include elf/nios2.h.
1046 * config/tc-nios2.c: New file.
1047 * config/tc-nios2.h: New file.
1048 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1049 * doc/Makefile.in: Regenerated.
1050 * doc/all.texi: Set NIOSII.
1051 * doc/as.texinfo (Overview): Add Nios II options.
1052 (Machine Dependencies): Include c-nios2.texi.
1053 * doc/c-nios2.texi: New file.
1054 * NEWS: Note Altera Nios II support.
1055
94d4433a
AM		 10562013-02-06 Alan Modra <amodra@gmail.com>
1057
1058 PR gas/14255
1059 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1060 Don't skip fixups with fx_subsy non-NULL.
1061 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1062 with fx_subsy non-NULL.
1063
ace9af6f
L		 10642013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1065
1066 * doc/c-metag.texi: Add "@c man" markers.
1067
89d67ed9
AM		 10682013-02-04 Alan Modra <amodra@gmail.com>
1069
1070 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1071 related code.
1072 (TC_ADJUST_RELOC_COUNT): Delete.
1073 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1074
89072bd6
AM		 10752013-02-04 Alan Modra <amodra@gmail.com>
1076
1077 * po/POTFILES.in: Regenerate.
1078
f9b2d544
NC		 10792013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1080
1081 * config/tc-metag.c: Make SWAP instruction less permissive with
1082 its operands.
1083
392ca752
DD		 10842013-01-29 DJ Delorie <dj@redhat.com>
1085
1086 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1087 relocs in .word/.etc statements.
1088
427d0db6
RM		 10892013-01-29 Roland McGrath <mcgrathr@google.com>
1090
1091 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1092 immediate value for 8-bit offset" error so it shows line info.
1093
4faf939a
JM		 10942013-01-24 Joseph Myers <joseph@codesourcery.com>
1095
1096 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1097 for 64-bit output.
1098
78c8d46c
NC		 10992013-01-24 Nick Clifton <nickc@redhat.com>
1100
1101 * config/tc-v850.c: Add support for e3v5 architecture.
1102 * doc/c-v850.texi: Mention new support.
1103
fb5b7503
NC		 11042013-01-23 Nick Clifton <nickc@redhat.com>
1105
1106 PR gas/15039
1107 * config/tc-avr.c: Include dwarf2dbg.h.
1108
8ce3d284
L		 11092013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1110
1111 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1112 (tc_i386_fix_adjustable): Likewise.
1113 (lex_got): Likewise.
1114 (tc_gen_reloc): Likewise.
1115
f5555712
YZ		 11162013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1117
1118 * config/tc-aarch64.c (output_operand_error_record): Change to output
1119 the out-of-range error message as value-expected message if there is
1120 only one single value in the expected range.
1121 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1122 LSL #0 as a programmer-friendly feature.
1123
8fd4256d
L		 11242013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1125
1126 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1127 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1128 BFD_RELOC_64_SIZE relocations.
1129 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1130 for it.
1131 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1132 relocations against local symbols.
1133
a5840dce
AM		 11342013-01-16 Alan Modra <amodra@gmail.com>
1135
1136 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1137 finding some sort of toc syntax error, and break to avoid
1138 compiler uninit warning.
1139
af89796a
L		 11402013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1141
1142 PR gas/15019
1143 * config/tc-i386.c (lex_got): Increment length by 1 if the
1144 relocation token is removed.
1145
dd42f060
NC		 11462013-01-15 Nick Clifton <nickc@redhat.com>
1147
1148 * config/tc-v850.c (md_assemble): Allow signed values for
1149 V850E_IMMEDIATE.
1150
464e3686
SK		 11512013-01-11 Sean Keys <skeys@ipdatasys.com>
1152
1153 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1154 git to cvs.
464e3686 1155
5817ffd1
PB		 11562013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1157
1158 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1159 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1160 * config/tc-ppc.c (md_show_usage): Likewise.
1161 (ppc_handle_align): Handle power8's group ending nop.
1162
f4b1f6a9
SK		 11632013-01-10 Sean Keys <skeys@ipdatasys.com>
1164
1165 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1166 that the assember exits after the opcodes have been printed.
f4b1f6a9 1167
34bca508
L		 11682013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1169
1170 * app.c: Remove trailing white spaces.
1171 * as.c: Likewise.
1172 * as.h: Likewise.
1173 * cond.c: Likewise.
1174 * dw2gencfi.c: Likewise.
1175 * dwarf2dbg.h: Likewise.
1176 * ecoff.c: Likewise.
1177 * input-file.c: Likewise.
1178 * itbl-lex.h: Likewise.
1179 * output-file.c: Likewise.
1180 * read.c: Likewise.
1181 * sb.c: Likewise.
1182 * subsegs.c: Likewise.
1183 * symbols.c: Likewise.
1184 * write.c: Likewise.
1185 * config/tc-i386.c: Likewise.
1186 * doc/Makefile.am: Likewise.
1187 * doc/Makefile.in: Likewise.
1188 * doc/c-aarch64.texi: Likewise.
1189 * doc/c-alpha.texi: Likewise.
1190 * doc/c-arc.texi: Likewise.
1191 * doc/c-arm.texi: Likewise.
1192 * doc/c-avr.texi: Likewise.
1193 * doc/c-bfin.texi: Likewise.
1194 * doc/c-cr16.texi: Likewise.
1195 * doc/c-d10v.texi: Likewise.
1196 * doc/c-d30v.texi: Likewise.
1197 * doc/c-h8300.texi: Likewise.
1198 * doc/c-hppa.texi: Likewise.
1199 * doc/c-i370.texi: Likewise.
1200 * doc/c-i386.texi: Likewise.
1201 * doc/c-i860.texi: Likewise.
1202 * doc/c-m32c.texi: Likewise.
1203 * doc/c-m32r.texi: Likewise.
1204 * doc/c-m68hc11.texi: Likewise.
1205 * doc/c-m68k.texi: Likewise.
1206 * doc/c-microblaze.texi: Likewise.
1207 * doc/c-mips.texi: Likewise.
1208 * doc/c-msp430.texi: Likewise.
1209 * doc/c-mt.texi: Likewise.
1210 * doc/c-s390.texi: Likewise.
1211 * doc/c-score.texi: Likewise.
1212 * doc/c-sh.texi: Likewise.
1213 * doc/c-sh64.texi: Likewise.
1214 * doc/c-tic54x.texi: Likewise.
1215 * doc/c-tic6x.texi: Likewise.
1216 * doc/c-v850.texi: Likewise.
1217 * doc/c-xc16x.texi: Likewise.
1218 * doc/c-xgate.texi: Likewise.
1219 * doc/c-xtensa.texi: Likewise.
1220 * doc/c-z80.texi: Likewise.
1221 * doc/internals.texi: Likewise.
1222
4c665b71
RM		 12232013-01-10 Roland McGrath <mcgrathr@google.com>
1224
1225 * hash.c (hash_new_sized): Make it global.
1226 * hash.h: Declare it.
1227 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1228 pass a small size.
1229
a3c62988
NC		 12302013-01-10 Will Newton <will.newton@imgtec.com>
1231
1232 * Makefile.am: Add Meta.
1233 * Makefile.in: Regenerate.
1234 * config/tc-metag.c: New file.
1235 * config/tc-metag.h: New file.
1236 * configure.tgt: Add Meta.
1237 * doc/Makefile.am: Add Meta.
1238 * doc/Makefile.in: Regenerate.
1239 * doc/all.texi: Add Meta.
1240 * doc/as.texiinfo: Document Meta options.
1241 * doc/c-metag.texi: New file.
1242
b37df7c4
SE		 12432013-01-09 Steve Ellcey <sellcey@mips.com>
1244
1245 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1246 calls.
1247 * config/tc-mips.c (internalError): Remove, replace with abort.
1248
a3251895
YZ		 12492013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1250
1251 * config/tc-aarch64.c (parse_operands): Change to compare the result
1252 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1253
8ab8155f
NC		 12542013-01-07 Nick Clifton <nickc@redhat.com>
1255
1256 PR gas/14887
1257 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1258 anticipated character.
1259 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1260 here as it is no longer needed.
1261
a4ac1c42
AS		 12622013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1263
1264 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1265 * doc/c-score.texi (SCORE-Opts): Likewise.
1266 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1267
e407c74b
NC		 12682013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1269
1270 * config/tc-mips.c: Add support for MIPS r5900.
1271 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1272 lq and sq.
1273 (can_swap_branch_p, get_append_method): Detect some conditional
1274 short loops to fix a bug on the r5900 by NOP in the branch delay
1275 slot.
1276 (M_MUL): Support 3 operands in multu on r5900.
1277 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1278 (s_mipsset): Force 32 bit floating point on r5900.
1279 (mips_ip): Check parameter range of instructions mfps and mtps on
1280 r5900.
1281 * configure.in: Detect CPU type when target string contains r5900
1282 (e.g. mips64r5900el-linux-gnu).
1283
62658407
L		 12842013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1285
1286 * as.c (parse_args): Update copyright year to 2013.
1287
95830fd1
YZ		 12882013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1289
1290 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1291 and "cortex57".
1292
517bb291 12932013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1294
517bb291
NC		 1295 PR gas/14987
1296 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1297 closing bracket.
d709e4e6 1298
517bb291 1299For older changes see ChangeLog-2012
08d56133 1300\f
517bb291 1301Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1302
1303Copying and distribution of this file, with or without modification,
1304are permitted in any medium without royalty provided the copyright
1305notice and this notice are preserved.
1306
08d56133
NC		 1307Local Variables:
1308mode: change-log
1309left-margin: 8
1310fill-column: 74
1311version-control: never
1312End:
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