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* gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon instruction.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
1946c96e
BW		 12006-04-25 Bob Wilson <bob.wilson@acm.org>
2
3 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
4 syntax instead of hardcoded opcodes with ".w18" suffixes.
5 (wide_branch_opcode): New.
6 (build_transition): Use it to check for wide branch opcodes with
7 either ".w18" or ".w15" suffixes.
8
5033a645
BW		 92006-04-25 Bob Wilson <bob.wilson@acm.org>
10
11 * config/tc-xtensa.c (xtensa_create_literal_symbol,
12 xg_assemble_literal, xg_assemble_literal_space): Do not set the
13 frag's is_literal flag.
14
395fa56f
BW		 152006-04-25 Bob Wilson <bob.wilson@acm.org>
16
17 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
18
708587a4
KH		 192006-04-23 Kazu Hirata <kazu@codesourcery.com>
20
21 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
22 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
23 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
24 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
25 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
26
8463be01
PB		 272005-04-20 Paul Brook <paul@codesourcery.com>
28
29 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
30 all targets.
31 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
32
f26a5955
AM		 332006-04-19 Alan Modra <amodra@bigpond.net.au>
34
35 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
36 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
37 Make some cpus unsupported on ELF. Run "make dep-am".
38 * Makefile.in: Regenerate.
39
241a6c40
AM		 402006-04-19 Alan Modra <amodra@bigpond.net.au>
41
42 * configure.in (--enable-targets): Indent help message.
43 * configure: Regenerate.
44
bb8f5920
L		 452006-04-18 H.J. Lu <hongjiu.lu@intel.com>
46
47 PR gas/2533
48 * config/tc-i386.c (i386_immediate): Check illegal immediate
49 register operand.
50
23d9d9de
AM		 512006-04-18 Alan Modra <amodra@bigpond.net.au>
52
64e74474
AM		 53 * config/tc-i386.c: Formatting.
54 (output_disp, output_imm): ISO C90 params.
55
6cbe03fb
AM		 56 * frags.c (frag_offset_fixed_p): Constify args.
57 * frags.h (frag_offset_fixed_p): Ditto.
58
23d9d9de
AM		 59 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
60 (COFF_MAGIC): Delete.
a37d486e
AM		 61
62 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
63
e7403566
DJ		 642006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
65
66 * po/POTFILES.in: Regenerated.
67
58ab4f3d
MM		 682006-04-16 Mark Mitchell <mark@codesourcery.com>
69
70 * doc/as.texinfo: Mention that some .type syntaxes are not
71 supported on all architectures.
72
482fd9f9
BW		 732006-04-14 Sterling Augustine <sterling@tensilica.com>
74
75 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
76 instructions when such transformations have been disabled.
77
05d58145
BW		 782006-04-10 Sterling Augustine <sterling@tensilica.com>
79
80 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
81 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
82 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
83 decoding the loop instructions. Remove current_offset variable.
84 (xtensa_fix_short_loop_frags): Likewise.
85 (min_bytes_to_other_loop_end): Remove current_offset argument.
86
9e75b3fa
AM		 872006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
88
a37d486e 89 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM		 90 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
91
d727e8c2
NC		 922006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
93
94 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
95 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
96 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
97 atmega644, atmega329, atmega3290, atmega649, atmega6490,
98 atmega406, atmega640, atmega1280, atmega1281, at90can32,
99 at90can64, at90usb646, at90usb647, at90usb1286 and
100 at90usb1287.
101 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
102
d252fdde
PB		 1032006-04-07 Paul Brook <paul@codesourcery.com>
104
105 * config/tc-arm.c (parse_operands): Set default error message.
106
ab1eb5fe
PB		 1072006-04-07 Paul Brook <paul@codesourcery.com>
108
109 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
110
7ae2971b
PB		 1112006-04-07 Paul Brook <paul@codesourcery.com>
112
113 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
114
53365c0d
PB		 1152006-04-07 Paul Brook <paul@codesourcery.com>
116
117 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
118 (move_or_literal_pool): Handle Thumb-2 instructions.
119 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
120
45aa61fe
AM		 1212006-04-07 Alan Modra <amodra@bigpond.net.au>
122
123 PR 2512.
124 * config/tc-i386.c (match_template): Move 64-bit operand tests
125 inside loop.
126
108a6f8e
CD		 1272006-04-06 Carlos O'Donell <carlos@codesourcery.com>
128
129 * po/Make-in: Add install-html target.
130 * Makefile.am: Add install-html and install-html-recursive targets.
131 * Makefile.in: Regenerate.
132 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
133 * configure: Regenerate.
134 * doc/Makefile.am: Add install-html and install-html-am targets.
135 * doc/Makefile.in: Regenerate.
136
ec651a3b
AM		 1372006-04-06 Alan Modra <amodra@bigpond.net.au>
138
139 * frags.c (frag_offset_fixed_p): Reinitialise offset before
140 second scan.
141
910600e9
RS		 1422006-04-05 Richard Sandiford <richard@codesourcery.com>
143 Daniel Jacobowitz <dan@codesourcery.com>
144
145 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
146 (GOTT_BASE, GOTT_INDEX): New.
147 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
148 GOTT_INDEX when generating VxWorks PIC.
149 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
150 use the generic *-*-vxworks* stanza instead.
151
99630778
AM		 1522006-04-04 Alan Modra <amodra@bigpond.net.au>
153
154 PR 997
155 * frags.c (frag_offset_fixed_p): New function.
156 * frags.h (frag_offset_fixed_p): Declare.
157 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
158 (resolve_expression): Likewise.
159
a02728c8
BW		 1602006-04-03 Sterling Augustine <sterling@tensilica.com>
161
162 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
163 of the same length but different numbers of slots.
164
9dfde49d
AS		 1652006-03-30 Andreas Schwab <schwab@suse.de>
166
167 * configure.in: Fix help string for --enable-targets option.
168 * configure: Regenerate.
169
2da12c60
NS		 1702006-03-28 Nathan Sidwell <nathan@codesourcery.com>
171
6d89cc8f
NS		 172 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
173 (m68k_ip): ... here. Use for all chips. Protect against buffer
174 overrun and avoid excessive copying.
175
2da12c60
NS		 176 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
177 m68020_control_regs, m68040_control_regs, m68060_control_regs,
178 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
179 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
180 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
181 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
182 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
183 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
184 mcf5282_ctrl, mcfv4e_ctrl): ... these.
185 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
186 (struct m68k_cpu): Change chip field to control_regs.
187 (current_chip): Remove.
188 (control_regs): New.
189 (m68k_archs, m68k_extensions): Adjust.
190 (m68k_cpus): Reorder to be in cpu number order. Adjust.
191 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
192 (find_cf_chip): Reimplement for new organization of cpu table.
193 (select_control_regs): Remove.
194 (mri_chip): Adjust.
195 (struct save_opts): Save control regs, not chip.
196 (s_save, s_restore): Adjust.
197 (m68k_lookup_cpu): Give deprecated warning when necessary.
198 (m68k_init_arch): Adjust.
199 (md_show_usage): Adjust for new cpu table organization.
200
1ac4baed
BS		 2012006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
202
203 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
204 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
205 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
206 "elf/bfin.h".
207 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
208 (any_gotrel): New rule.
209 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
210 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
211 "elf/bfin.h".
212 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
213 (bfin_pic_ptr): New function.
214 (md_pseudo_table): Add it for ".picptr".
215 (OPTION_FDPIC): New macro.
216 (md_longopts): Add -mfdpic.
217 (md_parse_option): Handle it.
218 (md_begin): Set BFD flags.
219 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
220 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
221 us for GOT relocs.
222 * Makefile.am (bfin-parse.o): Update dependencies.
223 (DEPTC_bfin_elf): Likewise.
224 * Makefile.in: Regenerate.
225
a9d34880
RS		 2262006-03-25 Richard Sandiford <richard@codesourcery.com>
227
228 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
229 mcfemac instead of mcfmac.
230
9ca26584
AJ		 2312006-03-23 Michael Matz <matz@suse.de>
232
233 * config/tc-i386.c (type_names): Correct placement of 'static'.
234 (reloc): Map some more relocs to their 64 bit counterpart when
235 size is 8.
236 (output_insn): Work around breakage if DEBUG386 is defined.
237 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
238 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
239 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
240 different from i386.
241 (output_imm): Ditto.
242 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
243 Imm64.
244 (md_convert_frag): Jumps can now be larger than 2GB away, error
245 out in that case.
246 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
247 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
248
0a44bf69
RS		 2492006-03-22 Richard Sandiford <richard@codesourcery.com>
250 Daniel Jacobowitz <dan@codesourcery.com>
251 Phil Edwards <phil@codesourcery.com>
252 Zack Weinberg <zack@codesourcery.com>
253 Mark Mitchell <mark@codesourcery.com>
254 Nathan Sidwell <nathan@codesourcery.com>
255
256 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
257 (md_begin): Complain about -G being used for PIC. Don't change
258 the text, data and bss alignments on VxWorks.
259 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
260 generating VxWorks PIC.
261 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
262 (macro): Likewise, but do not treat la $25 specially for
263 VxWorks PIC, and do not handle jal.
264 (OPTION_MVXWORKS_PIC): New macro.
265 (md_longopts): Add -mvxworks-pic.
266 (md_parse_option): Don't complain about using PIC and -G together here.
267 Handle OPTION_MVXWORKS_PIC.
268 (md_estimate_size_before_relax): Always use the first relaxation
269 sequence on VxWorks.
270 * config/tc-mips.h (VXWORKS_PIC): New.
271
080eb7fe
PB		 2722006-03-21 Paul Brook <paul@codesourcery.com>
273
274 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
275
03aaa593
BW		 2762006-03-21 Sterling Augustine <sterling@tensilica.com>
277
278 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
279 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
280 (get_loop_align_size): New.
281 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
282 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
283 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
284 (get_noop_aligned_address): Use get_loop_align_size.
285 (get_aligned_diff): Likewise.
286
3e94bf1a
PB		 2872006-03-21 Paul Brook <paul@codesourcery.com>
288
289 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
290
dfa9f0d5
PB		 2912006-03-20 Paul Brook <paul@codesourcery.com>
292
293 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
294 (do_t_branch): Encode branches inside IT blocks as unconditional.
295 (do_t_cps): New function.
296 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
297 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
298 (opcode_lookup): Allow conditional suffixes on all instructions in
299 Thumb mode.
300 (md_assemble): Advance condexec state before checking for errors.
301 (insns): Use do_t_cps.
302
6e1cb1a6
PB		 3032006-03-20 Paul Brook <paul@codesourcery.com>
304
305 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
306 outputting the insn.
307
0a966e2d
JBG		 3082006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
309
310 * config/tc-vax.c: Update copyright year.
311 * config/tc-vax.h: Likewise.
312
a49fcc17
JBG		 3132006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
314
315 * config/tc-vax.c (md_chars_to_number): Used only locally, so
316 make it static.
317 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
318
f5208ef2
PB		 3192006-03-17 Paul Brook <paul@codesourcery.com>
320
321 * config/tc-arm.c (insns): Add ldm and stm.
322
cb4c78d6
BE		 3232006-03-17 Ben Elliston <bje@au.ibm.com>
324
325 PR gas/2446
326 * doc/as.texinfo (Ident): Document this directive more thoroughly.
327
c16d2bf0
PB		 3282006-03-16 Paul Brook <paul@codesourcery.com>
329
330 * config/tc-arm.c (insns): Add "svc".
331
80ca4e2c
BW		 3322006-03-13 Bob Wilson <bob.wilson@acm.org>
333
334 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
335 flag and avoid double underscore prefixes.
336
3a4a14e9
PB		 3372006-03-10 Paul Brook <paul@codesourcery.com>
338
339 * config/tc-arm.c (md_begin): Handle EABIv5.
340 (arm_eabis): Add EF_ARM_EABI_VER5.
341 * doc/c-arm.texi: Document -meabi=5.
342
518051dc
BE		 3432006-03-10 Ben Elliston <bje@au.ibm.com>
344
345 * app.c (do_scrub_chars): Simplify string handling.
346
00a97672
RS		 3472006-03-07 Richard Sandiford <richard@codesourcery.com>
348 Daniel Jacobowitz <dan@codesourcery.com>
349 Zack Weinberg <zack@codesourcery.com>
350 Nathan Sidwell <nathan@codesourcery.com>
351 Paul Brook <paul@codesourcery.com>
352 Ricardo Anguiano <anguiano@codesourcery.com>
353 Phil Edwards <phil@codesourcery.com>
354
355 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
356 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
357 R_ARM_ABS12 reloc.
358 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
359 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
360 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
361
b29757dc
BW		 3622006-03-06 Bob Wilson <bob.wilson@acm.org>
363
364 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
365 even when using the text-section-literals option.
366
0b2e31dc
NS		 3672006-03-06 Nathan Sidwell <nathan@codesourcery.com>
368
369 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
370 and cf.
371 (m68k_ip): <case 'J'> Check we have some control regs.
372 (md_parse_option): Allow raw arch switch.
373 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
374 whether 68881 or cfloat was meant by -mfloat.
375 (md_show_usage): Adjust extension display.
376 (m68k_elf_final_processing): Adjust.
377
df406460
NC		 3782006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
379
380 * config/tc-avr.c (avr_mod_hash_value): New function.
381 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
382 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
383 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
384 instead of int avr_ldi_expression: use avr_mod_hash_value instead
385 of (int).
386 (tc_gen_reloc): Handle substractions of symbols, if possible do
387 fixups, abort otherwise.
388 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
389 tc_fix_adjustable): Define.
390
53022e4a
JW		 3912006-03-02 James E Wilson <wilson@specifix.com>
392
393 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
394 change the template, then clear md.slot[curr].end_of_insn_group.
395
9f6f925e
JB		 3962006-02-28 Jan Beulich <jbeulich@novell.com>
397
398 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
399
0e31b3e1
JB		 4002006-02-28 Jan Beulich <jbeulich@novell.com>
401
402 PR/1070
403 * macro.c (getstring): Don't treat parentheses special anymore.
404 (get_any_string): Don't consider '(' and ')' as quoting anymore.
405 Special-case '(', ')', '[', and ']' when dealing with non-quoting
406 characters.
407
10cd14b4
AM		 4082006-02-28 Mat <mat@csail.mit.edu>
409
410 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
411
63752a75
JJ		 4122006-02-27 Jakub Jelinek <jakub@redhat.com>
413
414 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
415 field.
416 (CFI_signal_frame): Define.
417 (cfi_pseudo_table): Add .cfi_signal_frame.
418 (dot_cfi): Handle CFI_signal_frame.
419 (output_cie): Handle cie->signal_frame.
420 (select_cie_for_fde): Don't share CIE if signal_frame flag is
421 different. Copy signal_frame from FDE to newly created CIE.
422 * doc/as.texinfo: Document .cfi_signal_frame.
423
f7d9e5c3
CD		 4242006-02-27 Carlos O'Donell <carlos@codesourcery.com>
425
426 * doc/Makefile.am: Add html target.
427 * doc/Makefile.in: Regenerate.
428 * po/Make-in: Add html target.
429
331d2d0d
L		 4302006-02-27 H.J. Lu <hongjiu.lu@intel.com>
431
8502d882 432 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L		 433 Instructions.
434
8502d882 435 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L		 436 (CpuUnknownFlags): Add CpuMNI.
437
10156f83
DM		 4382006-02-24 David S. Miller <davem@sunset.davemloft.net>
439
440 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
441 (hpriv_reg_table): New table for hyperprivileged registers.
442 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
443 register encoding.
444
6772dd07
DD		 4452006-02-24 DJ Delorie <dj@redhat.com>
446
447 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
448 (tc_gen_reloc): Don't define.
449 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
450 (OPTION_LINKRELAX): New.
451 (md_longopts): Add it.
452 (m32c_relax): New.
453 (md_parse_options): Set it.
454 (md_assemble): Emit relaxation relocs as needed.
455 (md_convert_frag): Emit relaxation relocs as needed.
456 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
457 (m32c_apply_fix): New.
458 (tc_gen_reloc): New.
459 (m32c_force_relocation): Force out jump relocs when relaxing.
460 (m32c_fix_adjustable): Return false if relaxing.
461
62b3e311
PB		 4622006-02-24 Paul Brook <paul@codesourcery.com>
463
464 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
465 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
466 (struct asm_barrier_opt): Define.
467 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
468 (parse_psr): Accept V7M psr names.
469 (parse_barrier): New function.
470 (enum operand_parse_code): Add OP_oBARRIER.
471 (parse_operands): Implement OP_oBARRIER.
472 (do_barrier): New function.
473 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
474 (do_t_cpsi): Add V7M restrictions.
475 (do_t_mrs, do_t_msr): Validate V7M variants.
476 (md_assemble): Check for NULL variants.
477 (v7m_psrs, barrier_opt_names): New tables.
478 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
479 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
480 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
481 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
482 (struct cpu_arch_ver_table): Define.
483 (cpu_arch_ver): New.
484 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
485 Tag_CPU_arch_profile.
486 * doc/c-arm.texi: Document new cpu and arch options.
487
59cf82fe
L		 4882006-02-23 H.J. Lu <hongjiu.lu@intel.com>
489
490 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
491
19a7219f
L		 4922006-02-23 H.J. Lu <hongjiu.lu@intel.com>
493
494 * config/tc-ia64.c: Update copyright years.
495
7f3dfb9c
L		 4962006-02-22 H.J. Lu <hongjiu.lu@intel.com>
497
498 * config/tc-ia64.c (specify_resource): Add the rule 17 from
499 SDM 2.2.
500
f40d1643
PB		 5012005-02-22 Paul Brook <paul@codesourcery.com>
502
503 * config/tc-arm.c (do_pld): Remove incorrect write to
504 inst.instruction.
505 (encode_thumb32_addr_mode): Use correct operand.
506
216d22bc
PB		 5072006-02-21 Paul Brook <paul@codesourcery.com>
508
509 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
510
d70c5fc7
NC		 5112006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
512 Anil Paranjape <anilp1@kpitcummins.com>
513 Shilin Shakti <shilins@kpitcummins.com>
514
515 * Makefile.am: Add xc16x related entry.
516 * Makefile.in: Regenerate.
517 * configure.in: Added xc16x related entry.
518 * configure: Regenerate.
519 * config/tc-xc16x.h: New file
520 * config/tc-xc16x.c: New file
521 * doc/c-xc16x.texi: New file for xc16x
522 * doc/all.texi: Entry for xc16x
523 * doc/Makefile.texi: Added c-xc16x.texi
524 * NEWS: Announce the support for the new target.
525
aaa2ab3d
NH		 5262006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
527
528 * configure.tgt: set emulation for mips-*-netbsd*
529
82de001f
JJ		 5302006-02-14 Jakub Jelinek <jakub@redhat.com>
531
532 * config.in: Rebuilt.
533
431ad2d0
BW		 5342006-02-13 Bob Wilson <bob.wilson@acm.org>
535
536 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
537 from 1, not 0, in error messages.
538 (md_assemble): Simplify special-case check for ENTRY instructions.
539 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
540 operand in error message.
541
94089a50
JM		 5422006-02-13 Joseph S. Myers <joseph@codesourcery.com>
543
544 * configure.tgt (arm-*-linux-gnueabi*): Change to
545 arm-*-linux-*eabi*.
546
52de4c06
NC		 5472006-02-10 Nick Clifton <nickc@redhat.com>
548
70e45ad9
NC		 549 * config/tc-crx.c (check_range): Ensure that the sign bit of a
550 32-bit value is propagated into the upper bits of a 64-bit long.
551
52de4c06
NC		 552 * config/tc-arc.c (init_opcode_tables): Fix cast.
553 (arc_extoper, md_operand): Likewise.
554
21af2bbd
BW		 5552006-02-09 David Heine <dlheine@tensilica.com>
556
557 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
558 each relaxation step.
559
75a706fc
L		 5602006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
561
562 * configure.in (CHECK_DECLS): Add vsnprintf.
563 * configure: Regenerate.
564 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
565 include/declare here, but...
566 * as.h: Move code detecting VARARGS idiom to the top.
567 (errno.h, stdarg.h, varargs.h, va_list): ...here.
568 (vsnprintf): Declare if not already declared.
569
0d474464
L		 5702006-02-08 H.J. Lu <hongjiu.lu@intel.com>
571
572 * as.c (close_output_file): New.
573 (main): Register close_output_file with xatexit before
574 dump_statistics. Don't call output_file_close.
575
266abb8f
NS		 5762006-02-07 Nathan Sidwell <nathan@codesourcery.com>
577
578 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
579 mcf5329_control_regs): New.
580 (not_current_architecture, selected_arch, selected_cpu): New.
581 (m68k_archs, m68k_extensions): New.
582 (archs): Renamed to ...
583 (m68k_cpus): ... here. Adjust.
584 (n_arches): Remove.
585 (md_pseudo_table): Add arch and cpu directives.
586 (find_cf_chip, m68k_ip): Adjust table scanning.
587 (no_68851, no_68881): Remove.
588 (md_assemble): Lazily initialize.
589 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
590 (md_init_after_args): Move functionality to m68k_init_arch.
591 (mri_chip): Adjust table scanning.
592 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
593 options with saner parsing.
594 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
595 m68k_init_arch): New.
596 (s_m68k_cpu, s_m68k_arch): New.
597 (md_show_usage): Adjust.
598 (m68k_elf_final_processing): Set CF EF flags.
599 * config/tc-m68k.h (m68k_init_after_args): Remove.
600 (tc_init_after_args): Remove.
601 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
602 (M68k-Directives): Document .arch and .cpu directives.
603
134dcee5
AM		 6042006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
605
606 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
607 synonyms for equ and defl.
608 (z80_cons_fix_new): New function.
609 (emit_byte): Disallow relative jumps to absolute locations.
610 (emit_data): Only handle defb, prototype changed, because defb is
611 now handled as pseudo-op rather than an instruction.
612 (instab): Entries for defb,defw,db,dw moved from here...
613 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
614 Add entries for def24,def32,d24,d32.
615 (md_assemble): Improved error handling.
616 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
617 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
618 (z80_cons_fix_new): Declare.
619 * doc/c-z80.texi (defb, db): Mention warning on overflow.
620 (def24,d24,def32,d32): New pseudo-ops.
621
a9931606
PB		 6222006-02-02 Paul Brook <paul@codesourcery.com>
623
624 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
625
ef8d22e6
PB		 6262005-02-02 Paul Brook <paul@codesourcery.com>
627
628 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
629 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
630 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
631 T2_OPCODE_RSB): Define.
632 (thumb32_negate_data_op): New function.
633 (md_apply_fix): Use it.
634
e7da6241
BW		 6352006-01-31 Bob Wilson <bob.wilson@acm.org>
636
637 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
638 fields.
639 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
640 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
641 subtracted symbols.
642 (relaxation_requirements): Add pfinish_frag argument and use it to
643 replace setting tinsn->record_fix fields.
644 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
645 and vinsn_to_insnbuf. Remove references to record_fix and
646 slot_sub_symbols fields.
647 (xtensa_mark_narrow_branches): Delete unused code.
648 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
649 a symbol.
650 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
651 record_fix fields.
652 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
653 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
654 of the record_fix field. Simplify error messages for unexpected
655 symbolic operands.
656 (set_expr_symbol_offset_diff): Delete.
657
79134647
PB		 6582006-01-31 Paul Brook <paul@codesourcery.com>
659
660 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
661
e74cfd16
PB		 6622006-01-31 Paul Brook <paul@codesourcery.com>
663 Richard Earnshaw <rearnsha@arm.com>
664
665 * config/tc-arm.c: Use arm_feature_set.
666 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
667 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
668 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
669 New variables.
670 (insns): Use them.
671 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
672 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
673 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
674 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
675 feature flags.
676 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
677 (arm_opts): Move old cpu/arch options from here...
678 (arm_legacy_opts): ... to here.
679 (md_parse_option): Search arm_legacy_opts.
680 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
681 (arm_float_abis, arm_eabis): Make const.
682
d47d412e
BW		 6832006-01-25 Bob Wilson <bob.wilson@acm.org>
684
685 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
686
b14273fe
JZ		 6872006-01-21 Jie Zhang <jie.zhang@analog.com>
688
689 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
690 in load immediate intruction.
691
39cd1c76
JZ		 6922006-01-21 Jie Zhang <jie.zhang@analog.com>
693
694 * config/bfin-parse.y (value_match): Use correct conversion
695 specifications in template string for __FILE__ and __LINE__.
696 (binary): Ditto.
697 (unary): Ditto.
698
67a4f2b7
AO		 6992006-01-18 Alexandre Oliva <aoliva@redhat.com>
700
701 Introduce TLS descriptors for i386 and x86_64.
702 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
703 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
704 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
705 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
706 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
707 displacement bits.
708 (build_modrm_byte): Set up zero modrm for TLS desc calls.
709 (lex_got): Handle @tlsdesc and @tlscall.
710 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
711
8ad7c533
NC		 7122006-01-11 Nick Clifton <nickc@redhat.com>
713
714 Fixes for building on 64-bit hosts:
715 * config/tc-avr.c (mod_index): New union to allow conversion
716 between pointers and integers.
717 (md_begin, avr_ldi_expression): Use it.
718 * config/tc-i370.c (md_assemble): Add cast for argument to print
719 statement.
720 * config/tc-tic54x.c (subsym_substitute): Likewise.
721 * config/tc-mn10200.c (md_assemble): Use a union to convert the
722 opindex field of fr_cgen structure into a pointer so that it can
723 be stored in a frag.
724 * config/tc-mn10300.c (md_assemble): Likewise.
725 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
726 types.
727 * config/tc-v850.c: Replace uses of (int) casts with correct
728 types.
729
4dcb3903
L		 7302006-01-09 H.J. Lu <hongjiu.lu@intel.com>
731
732 PR gas/2117
733 * symbols.c (snapshot_symbol): Don't change a defined symbol.
734
e0f6ea40
HPN		 7352006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
736
737 PR gas/2101
738 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
739 a local-label reference.
740
e88d958a 741For older changes see ChangeLog-2005
08d56133
NC		 742\f
743Local Variables:
744mode: change-log
745left-margin: 8
746fill-column: 74
747version-control: never
748End:
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