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* mi/mi-cmds.h (mi_execute_command): Make "cmd" const.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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dad60f8e
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12013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
2
3 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
4 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
5
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62013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7
8 * config/tc-arm.c (crc_ext_armv8): New feature set.
9 (UNPRED_REG): New macro.
10 (do_crc32_1): New function.
11 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
12 do_crc32ch, do_crc32cw): Likewise.
13 (TUEc): New macro.
14 (insns): Add entries for crc32 mnemonics.
15 (arm_extensions): Add entry for crc.
16
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172013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
18
19 * write.h (struct fix): Add fx_dot_frag field.
20 (dot_frag): Declare.
21 * write.c (dot_frag): New variable.
22 (fix_new_internal): Set fx_dot_frag field with dot_frag.
23 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
24 * expr.c (expr): Save value of frag_now in dot_frag when setting
25 dot_value.
26 * read.c (emit_expr): Likewise. Delete comments.
27
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282013-03-07 H.J. Lu <hongjiu.lu@intel.com>
29
30 * config/tc-i386.c (flag_code_names): Removed.
31 (i386_index_check): Rewrote.
32
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332013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
34
35 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
36 add comment.
37 (aarch64_double_precision_fmovable): New function.
38 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
39 function; handle hexadecimal representation of IEEE754 encoding.
40 (parse_operands): Update the call to parse_aarch64_imm_float.
41
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422013-02-28 H.J. Lu <hongjiu.lu@intel.com>
43
44 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
45 (check_hle): Updated.
46 (md_assemble): Likewise.
47 (parse_insn): Likewise.
48
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492013-02-28 H.J. Lu <hongjiu.lu@intel.com>
50
51 * config/tc-i386.c (_i386_insn): Add rep_prefix.
52 (md_assemble): Check if REP prefix is OK.
53 (parse_insn): Remove expecting_string_instruction. Set
54 i.rep_prefix.
55
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562013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
57
58 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
59
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602013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
61
62 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
63 for system registers.
64
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652013-02-27 DJ Delorie <dj@redhat.com>
66
67 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
68 (rl78_op): Handle %code().
69 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
70 (tc_gen_reloc): Likwise; convert to a computed reloc.
71 (md_apply_fix): Likewise.
72
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732013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
74
75 * config/rl78-parse.y: Fix encoding of DIVWU insn.
76
70a8bc5b 772013-02-25 Terry Guo <terry.guo@arm.com>
78
79 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
80 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
81 list of accepted CPUs.
82
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832013-02-19 H.J. Lu <hongjiu.lu@intel.com>
84
85 PR gas/15159
86 * config/tc-i386.c (cpu_arch): Add ".smap".
87
88 * doc/c-i386.texi: Document smap.
89
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902013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
91
92 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
93 mips_assembling_insn appropriately.
94 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
95
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962013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
97
cf29fc61 98 * config/tc-mips.c (append_insn): Correct indentation, remove
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99 extraneous braces.
100
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1012013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
102
5c111e37 103 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 104
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1052013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
106
107 * configure.tgt: Add nios2-*-rtems*.
108
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1092013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
110
111 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
112 NULL.
113
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1142013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
115
116 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
117 (macro): Use it. Assert that trunc.w.s is not used for r5900.
118
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1192013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
120
121 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
122 core.
123
36591ba1 1242013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 125 Andrew Jenner <andrew@codesourcery.com>
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126
127 Based on patches from Altera Corporation.
128
129 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
130 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
131 * Makefile.in: Regenerated.
132 * configure.tgt: Add case for nios2*-linux*.
133 * config/obj-elf.c: Conditionally include elf/nios2.h.
134 * config/tc-nios2.c: New file.
135 * config/tc-nios2.h: New file.
136 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
137 * doc/Makefile.in: Regenerated.
138 * doc/all.texi: Set NIOSII.
139 * doc/as.texinfo (Overview): Add Nios II options.
140 (Machine Dependencies): Include c-nios2.texi.
141 * doc/c-nios2.texi: New file.
142 * NEWS: Note Altera Nios II support.
143
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1442013-02-06 Alan Modra <amodra@gmail.com>
145
146 PR gas/14255
147 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
148 Don't skip fixups with fx_subsy non-NULL.
149 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
150 with fx_subsy non-NULL.
151
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1522013-02-04 H.J. Lu <hongjiu.lu@intel.com>
153
154 * doc/c-metag.texi: Add "@c man" markers.
155
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1562013-02-04 Alan Modra <amodra@gmail.com>
157
158 * write.c (fixup_segment): Return void. Delete seg_reloc_count
159 related code.
160 (TC_ADJUST_RELOC_COUNT): Delete.
161 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
162
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1632013-02-04 Alan Modra <amodra@gmail.com>
164
165 * po/POTFILES.in: Regenerate.
166
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1672013-01-30 Markos Chandras <markos.chandras@imgtec.com>
168
169 * config/tc-metag.c: Make SWAP instruction less permissive with
170 its operands.
171
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1722013-01-29 DJ Delorie <dj@redhat.com>
173
174 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
175 relocs in .word/.etc statements.
176
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1772013-01-29 Roland McGrath <mcgrathr@google.com>
178
179 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
180 immediate value for 8-bit offset" error so it shows line info.
181
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1822013-01-24 Joseph Myers <joseph@codesourcery.com>
183
184 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
185 for 64-bit output.
186
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1872013-01-24 Nick Clifton <nickc@redhat.com>
188
189 * config/tc-v850.c: Add support for e3v5 architecture.
190 * doc/c-v850.texi: Mention new support.
191
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1922013-01-23 Nick Clifton <nickc@redhat.com>
193
194 PR gas/15039
195 * config/tc-avr.c: Include dwarf2dbg.h.
196
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1972013-01-18 H.J. Lu <hongjiu.lu@intel.com>
198
199 * config/tc-i386.c (reloc): Support size relocation only for ELF.
200 (tc_i386_fix_adjustable): Likewise.
201 (lex_got): Likewise.
202 (tc_gen_reloc): Likewise.
203
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2042013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
205
206 * config/tc-aarch64.c (output_operand_error_record): Change to output
207 the out-of-range error message as value-expected message if there is
208 only one single value in the expected range.
209 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
210 LSL #0 as a programmer-friendly feature.
211
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2122013-01-16 H.J. Lu <hongjiu.lu@intel.com>
213
214 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
215 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
216 BFD_RELOC_64_SIZE relocations.
217 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
218 for it.
219 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
220 relocations against local symbols.
221
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2222013-01-16 Alan Modra <amodra@gmail.com>
223
224 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
225 finding some sort of toc syntax error, and break to avoid
226 compiler uninit warning.
227
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2282013-01-15 H.J. Lu <hongjiu.lu@intel.com>
229
230 PR gas/15019
231 * config/tc-i386.c (lex_got): Increment length by 1 if the
232 relocation token is removed.
233
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2342013-01-15 Nick Clifton <nickc@redhat.com>
235
236 * config/tc-v850.c (md_assemble): Allow signed values for
237 V850E_IMMEDIATE.
238
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2392013-01-11 Sean Keys <skeys@ipdatasys.com>
240
241 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 242 git to cvs.
464e3686 243
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2442013-01-10 Peter Bergner <bergner@vnet.ibm.com>
245
246 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
247 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
248 * config/tc-ppc.c (md_show_usage): Likewise.
249 (ppc_handle_align): Handle power8's group ending nop.
250
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2512013-01-10 Sean Keys <skeys@ipdatasys.com>
252
253 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 254 that the assember exits after the opcodes have been printed.
f4b1f6a9 255
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2562013-01-10 H.J. Lu <hongjiu.lu@intel.com>
257
258 * app.c: Remove trailing white spaces.
259 * as.c: Likewise.
260 * as.h: Likewise.
261 * cond.c: Likewise.
262 * dw2gencfi.c: Likewise.
263 * dwarf2dbg.h: Likewise.
264 * ecoff.c: Likewise.
265 * input-file.c: Likewise.
266 * itbl-lex.h: Likewise.
267 * output-file.c: Likewise.
268 * read.c: Likewise.
269 * sb.c: Likewise.
270 * subsegs.c: Likewise.
271 * symbols.c: Likewise.
272 * write.c: Likewise.
273 * config/tc-i386.c: Likewise.
274 * doc/Makefile.am: Likewise.
275 * doc/Makefile.in: Likewise.
276 * doc/c-aarch64.texi: Likewise.
277 * doc/c-alpha.texi: Likewise.
278 * doc/c-arc.texi: Likewise.
279 * doc/c-arm.texi: Likewise.
280 * doc/c-avr.texi: Likewise.
281 * doc/c-bfin.texi: Likewise.
282 * doc/c-cr16.texi: Likewise.
283 * doc/c-d10v.texi: Likewise.
284 * doc/c-d30v.texi: Likewise.
285 * doc/c-h8300.texi: Likewise.
286 * doc/c-hppa.texi: Likewise.
287 * doc/c-i370.texi: Likewise.
288 * doc/c-i386.texi: Likewise.
289 * doc/c-i860.texi: Likewise.
290 * doc/c-m32c.texi: Likewise.
291 * doc/c-m32r.texi: Likewise.
292 * doc/c-m68hc11.texi: Likewise.
293 * doc/c-m68k.texi: Likewise.
294 * doc/c-microblaze.texi: Likewise.
295 * doc/c-mips.texi: Likewise.
296 * doc/c-msp430.texi: Likewise.
297 * doc/c-mt.texi: Likewise.
298 * doc/c-s390.texi: Likewise.
299 * doc/c-score.texi: Likewise.
300 * doc/c-sh.texi: Likewise.
301 * doc/c-sh64.texi: Likewise.
302 * doc/c-tic54x.texi: Likewise.
303 * doc/c-tic6x.texi: Likewise.
304 * doc/c-v850.texi: Likewise.
305 * doc/c-xc16x.texi: Likewise.
306 * doc/c-xgate.texi: Likewise.
307 * doc/c-xtensa.texi: Likewise.
308 * doc/c-z80.texi: Likewise.
309 * doc/internals.texi: Likewise.
310
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3112013-01-10 Roland McGrath <mcgrathr@google.com>
312
313 * hash.c (hash_new_sized): Make it global.
314 * hash.h: Declare it.
315 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
316 pass a small size.
317
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3182013-01-10 Will Newton <will.newton@imgtec.com>
319
320 * Makefile.am: Add Meta.
321 * Makefile.in: Regenerate.
322 * config/tc-metag.c: New file.
323 * config/tc-metag.h: New file.
324 * configure.tgt: Add Meta.
325 * doc/Makefile.am: Add Meta.
326 * doc/Makefile.in: Regenerate.
327 * doc/all.texi: Add Meta.
328 * doc/as.texiinfo: Document Meta options.
329 * doc/c-metag.texi: New file.
330
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3312013-01-09 Steve Ellcey <sellcey@mips.com>
332
333 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
334 calls.
335 * config/tc-mips.c (internalError): Remove, replace with abort.
336
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3372013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
338
339 * config/tc-aarch64.c (parse_operands): Change to compare the result
340 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
341
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3422013-01-07 Nick Clifton <nickc@redhat.com>
343
344 PR gas/14887
345 * config/tc-arm.c (skip_past_char): Skip whitespace before the
346 anticipated character.
347 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
348 here as it is no longer needed.
349
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3502013-01-06 Andreas Schwab <schwab@linux-m68k.org>
351
352 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
353 * doc/c-score.texi (SCORE-Opts): Likewise.
354 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
355
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3562013-01-04 Juergen Urban <JuergenUrban@gmx.de>
357
358 * config/tc-mips.c: Add support for MIPS r5900.
359 Add M_LQ_AB and M_SQ_AB to support large values for instructions
360 lq and sq.
361 (can_swap_branch_p, get_append_method): Detect some conditional
362 short loops to fix a bug on the r5900 by NOP in the branch delay
363 slot.
364 (M_MUL): Support 3 operands in multu on r5900.
365 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
366 (s_mipsset): Force 32 bit floating point on r5900.
367 (mips_ip): Check parameter range of instructions mfps and mtps on
368 r5900.
369 * configure.in: Detect CPU type when target string contains r5900
370 (e.g. mips64r5900el-linux-gnu).
371
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3722013-01-02 H.J. Lu <hongjiu.lu@intel.com>
373
374 * as.c (parse_args): Update copyright year to 2013.
375
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3762013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
377
378 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
379 and "cortex57".
380
517bb291 3812013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 382
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383 PR gas/14987
384 * config/tc-arm.c (parse_address_main): Skip whitespace before a
385 closing bracket.
d709e4e6 386
517bb291 387For older changes see ChangeLog-2012
08d56133 388\f
517bb291 389Copyright (C) 2013 Free Software Foundation, Inc.
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390
391Copying and distribution of this file, with or without modification,
392are permitted in any medium without royalty provided the copyright
393notice and this notice are preserved.
394
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395Local Variables:
396mode: change-log
397left-margin: 8
398fill-column: 74
399version-control: never
400End: