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12013-08-23 Yuri Chornoivan <yurchor@ukr.net>
2
3 PR binutils/15834
4 * config/tc-ia64.c: Fix typos.
5 * config/tc-sparc.c: Likewise.
6 * config/tc-z80.c: Likewise.
7 * doc/c-i386.texi: Likewise.
8 * doc/c-m32r.texi: Likewise.
9
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102013-08-23 Will Newton <will.newton@linaro.org>
11
9aff4b7a 12 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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13 for pre-indexed addressing modes.
14
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152013-08-21 Alan Modra <amodra@gmail.com>
16
17 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
18 range check label number for use with fb_low_counter array.
19
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202013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
21
22 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
23 (mips_parse_argument_token, validate_micromips_insn, md_begin)
24 (check_regno, match_float_constant, check_completed_insn, append_insn)
25 (match_insn, match_mips16_insn, match_insns, macro_start)
26 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
27 (mips16_ip, mips_set_option_string, md_parse_option)
28 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
29 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
30 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
31 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
32 Start error messages with a lower-case letter. Do not end error
33 messages with a period. Wrap long messages to 80 character-lines.
34 Use "cannot" instead of "can't" and "can not".
35
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362013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
37
38 * config/tc-mips.c (imm_expr): Expand comment.
39 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
40 when populated.
41
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422013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
43
44 * config/tc-mips.c (imm2_expr): Delete.
45 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
46
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472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
50 (macro): Remove M_DEXT and M_DINS handling.
51
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522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
55 lax_max with lax_match.
56 (match_int_operand): Update accordingly. Don't report an error
57 for !lax_match-only cases.
58 (match_insn): Replace more_alts with lax_match and use it to
59 initialize the mips_arg_info field. Add a complete_p parameter.
60 Handle implicit VU0 suffixes here.
61 (match_invalid_for_isa, match_insns, match_mips16_insns): New
62 functions.
63 (mips_ip, mips16_ip): Use them.
64
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652013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
66
67 * config/tc-mips.c (match_expression): Report uses of registers here.
68 Add a "must be an immediate expression" error. Handle elided offsets
69 here rather than...
70 (match_int_operand): ...here.
71
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722013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c (mips_arg_info): Remove soft_match.
75 (match_out_of_range, match_not_constant): New functions.
76 (match_const_int): Remove fallback parameter and check for soft_match.
77 Use match_not_constant.
78 (match_mapped_int_operand, match_addiusp_operand)
79 (match_perf_reg_operand, match_save_restore_list_operand)
80 (match_mdmx_imm_reg_operand): Update accordingly. Use
81 match_out_of_range and set_insn_error* instead of as_bad.
82 (match_int_operand): Likewise. Use match_not_constant in the
83 !allows_nonconst case.
84 (match_float_constant): Report invalid float constants.
85 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
86 match_float_constant to check for invalid constants. Fail the
87 match if match_const_int or match_float_constant return false.
88 (mips_ip): Update accordingly.
89 (mips16_ip): Likewise. Undo null termination of instruction name
90 once lookup is complete.
91
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922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
93
94 * config/tc-mips.c (mips_insn_error_format): New enum.
95 (mips_insn_error): New struct.
96 (insn_error): Change to a mips_insn_error.
97 (clear_insn_error, set_insn_error_format, set_insn_error)
98 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
99 functions.
100 (mips_parse_argument_token, md_assemble, match_insn)
101 (match_mips16_insn): Use them instead of manipulating insn_error
102 directly.
103 (mips_ip, mips16_ip): Likewise. Simplify control flow.
104
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1052013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
106
107 * config/tc-mips.c (normalize_constant_expr): Move further up file.
108 (normalize_address_expr): Likewise.
109 (match_insn, match_mips16_insn): New functions, split out from...
110 (mips_ip, mips16_ip): ...here.
111
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1122013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
113
114 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
115 OP_OPTIONAL_REG.
116 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
117 for optional operands.
118
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1192013-08-16 Alan Modra <amodra@gmail.com>
120
121 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
122 modifiers generally.
123
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1242013-08-16 Alan Modra <amodra@gmail.com>
125
126 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
127
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1282013-08-14 David Edelsohn <dje.gcc@gmail.com>
129
130 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
131 argument as alignment.
132
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1332013-08-09 Nick Clifton <nickc@redhat.com>
134
135 * config/tc-rl78.c (elf_flags): New variable.
136 (enum options): Add OPTION_G10.
137 (md_longopts): Add mg10.
138 (md_parse_option): Parse -mg10.
139 (rl78_elf_final_processing): New function.
140 * config/tc-rl78.c (tc_final_processing): Define.
141 * doc/c-rl78.texi: Document -mg10 option.
142
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1432013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
144
145 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
146 suffixes to be elided too.
147 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
148 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
149 to be omitted too.
150
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1512013-08-05 John Tytgat <john@bass-software.com>
152
153 * po/POTFILES.in: Regenerate.
154
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1552013-08-05 Eric Botcazou <ebotcazou@adacore.com>
156 Konrad Eisele <konrad@gaisler.com>
157
158 * config/tc-sparc.c (sparc_arch_types): Add leon.
159 (sparc_arch): Move sparc4 around and add leon.
160 (sparc_target_format): Document -Aleon.
161 * doc/c-sparc.texi: Likewise.
162
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1632013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
166
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1672013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
168 Richard Sandiford <rdsandiford@googlemail.com>
169
170 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
171 (RWARN): Bump to 0x8000000.
172 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
173 (RTYPE_R5900_ACC): New register types.
174 (RTYPE_MASK): Include them.
175 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
176 macros.
177 (reg_names): Include them.
178 (mips_parse_register_1): New function, split out from...
179 (mips_parse_register): ...here. Add a channels_ptr parameter.
180 Look for VU0 channel suffixes when nonnull.
181 (reg_lookup): Update the call to mips_parse_register.
182 (mips_parse_vu0_channels): New function.
183 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
184 (mips_operand_token): Add a "channels" field to the union.
185 Extend the comment above "ch" to OT_DOUBLE_CHAR.
186 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
187 (mips_parse_argument_token): Handle channel suffixes here too.
188 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
189 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
190 Handle '#' formats.
191 (md_begin): Register $vfN and $vfI registers.
192 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
193 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
194 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
195 (match_vu0_suffix_operand): New function.
196 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
197 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
198 (mips_lookup_insn): New function.
199 (mips_ip): Use it. Allow "+K" operands to be elided at the end
200 of an instruction. Handle '#' sequences.
201
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2022013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
205 values and use it instead of sreg, treg, xreg, etc.
206
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2072013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
208
209 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
210 and mips_int_operand_max.
211 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
212 Delete.
213 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
214 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
215 instead of mips16_immed_operand.
216
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2172013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
218
219 * config/tc-mips.c (mips16_macro): Don't use move_register.
220 (mips16_ip): Allow macros to use 'p'.
221
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2222013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
223
224 * config/tc-mips.c (MAX_OPERANDS): New macro.
225 (mips_operand_array): New structure.
226 (mips_operands, mips16_operands, micromips_operands): New arrays.
227 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
228 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
229 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
230 (micromips_to_32_reg_q_map): Delete.
231 (insn_operands, insn_opno, insn_extract_operand): New functions.
232 (validate_mips_insn): Take a mips_operand_array as argument and
233 use it to build up a list of operands. Extend to handle INSN_MACRO
234 and MIPS16.
235 (validate_mips16_insn): New function.
236 (validate_micromips_insn): Take a mips_operand_array as argument.
237 Handle INSN_MACRO.
238 (md_begin): Initialize mips_operands, mips16_operands and
239 micromips_operands. Call validate_mips_insn and
240 validate_micromips_insn for macro instructions too.
241 Call validate_mips16_insn for MIPS16 instructions.
242 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
243 New functions.
244 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
245 them. Handle INSN_UDI.
246 (get_append_method): Use gpr_read_mask.
247
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2482013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
249
250 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
251 flags for MIPS16 and non-MIPS16 instructions.
252 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
253 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
254 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
255 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
256 and non-MIPS16 instructions. Fix formatting.
257
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2582013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
259
260 * config/tc-mips.c (reg_needs_delay): Move later in file.
261 Use gpr_write_mask.
262 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
263
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2642013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
265 Alexander Ivchenko <alexander.ivchenko@intel.com>
266 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
267 Sergey Lega <sergey.s.lega@intel.com>
268 Anna Tikhonova <anna.tikhonova@intel.com>
269 Ilya Tocar <ilya.tocar@intel.com>
270 Andrey Turetskiy <andrey.turetskiy@intel.com>
271 Ilya Verbin <ilya.verbin@intel.com>
272 Kirill Yukhin <kirill.yukhin@intel.com>
273 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
274
275 * config/tc-i386-intel.c (O_zmmword_ptr): New.
276 (i386_types): Add zmmword.
277 (i386_intel_simplify_register): Allow regzmm.
278 (i386_intel_simplify): Handle zmmwords.
279 (i386_intel_operand): Handle RC/SAE, vector operations and
280 zmmwords.
281 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
282 (struct RC_Operation): New.
283 (struct Mask_Operation): New.
284 (struct Broadcast_Operation): New.
285 (vex_prefix): Size of bytes increased to 4 to support EVEX
286 encoding.
287 (enum i386_error): Add new error codes: unsupported_broadcast,
288 broadcast_not_on_src_operand, broadcast_needed,
289 unsupported_masking, mask_not_on_destination, no_default_mask,
290 unsupported_rc_sae, rc_sae_operand_not_last_imm,
291 invalid_register_operand, try_vector_disp8.
292 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
293 rounding, broadcast, memshift.
294 (struct RC_name): New.
295 (RC_NamesTable): New.
296 (evexlig): New.
297 (evexwig): New.
298 (extra_symbol_chars): Add '{'.
299 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
300 (i386_operand_type): Add regzmm, regmask and vec_disp8.
301 (match_mem_size): Handle zmmwords.
302 (operand_type_match): Handle zmm-registers.
303 (mode_from_disp_size): Handle vec_disp8.
304 (fits_in_vec_disp8): New.
305 (md_begin): Handle {} properly.
306 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
307 (build_vex_prefix): Handle vrex.
308 (build_evex_prefix): New.
309 (process_immext): Adjust to properly handle EVEX.
310 (md_assemble): Add EVEX encoding support.
311 (swap_2_operands): Correctly handle operands with masking,
312 broadcasting or RC/SAE.
313 (check_VecOperands): Support EVEX features.
314 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
315 (match_template): Support regzmm and handle new error codes.
316 (process_suffix): Handle zmmwords and zmm-registers.
317 (check_byte_reg): Extend to zmm-registers.
318 (process_operands): Extend to zmm-registers.
319 (build_modrm_byte): Handle EVEX.
320 (output_insn): Adjust to properly handle EVEX case.
321 (disp_size): Handle vec_disp8.
322 (output_disp): Support compressed disp8*N evex feature.
323 (output_imm): Handle RC/SAE immediates properly.
324 (check_VecOperations): New.
325 (i386_immediate): Handle EVEX features.
326 (i386_index_check): Handle zmmwords and zmm-registers.
327 (RC_SAE_immediate): New.
328 (i386_att_operand): Handle EVEX features.
329 (parse_real_register): Add a check for ZMM/Mask registers.
330 (OPTION_MEVEXLIG): New.
331 (OPTION_MEVEXWIG): New.
332 (md_longopts): Add mevexlig and mevexwig.
333 (md_parse_option): Handle mevexlig and mevexwig options.
334 (md_show_usage): Add description for mevexlig and mevexwig.
335 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
336 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
337
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3382013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
339
340 * config/tc-i386.c (cpu_arch): Add .sha.
341 * doc/c-i386.texi: Document sha/.sha.
342
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3432013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
344 Kirill Yukhin <kirill.yukhin@intel.com>
345 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
346
347 * config/tc-i386.c (BND_PREFIX): New.
348 (struct _i386_insn): Add new field bnd_prefix.
349 (add_bnd_prefix): New.
350 (cpu_arch): Add MPX.
351 (i386_operand_type): Add regbnd.
352 (md_assemble): Handle BND prefixes.
353 (parse_insn): Likewise.
354 (output_branch): Likewise.
355 (output_jump): Likewise.
356 (build_modrm_byte): Handle regbnd.
357 (OPTION_MADD_BND_PREFIX): New.
358 (md_longopts): Add entry for 'madd-bnd-prefix'.
359 (md_parse_option): Handle madd-bnd-prefix option.
360 (md_show_usage): Add description for madd-bnd-prefix
361 option.
362 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
363
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3642013-07-24 Tristan Gingold <gingold@adacore.com>
365
366 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
367 xcoff targets.
368
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3692013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
370
371 * config/tc-s390.c (s390_machine): Don't force the .machine
372 argument to lower case.
373
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3742013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
375
376 * config/tc-arm.c (s_arm_arch_extension): Improve error message
377 for invalid extension.
378
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3792013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
380
381 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
382 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
383 (aarch64_abi): New variable.
384 (ilp32_p): Change to be a macro.
385 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
386 (struct aarch64_option_abi_value_table): New struct.
387 (aarch64_abis): New table.
388 (aarch64_parse_abi): New function.
389 (aarch64_long_opts): Add entry for -mabi=.
390 * doc/as.texinfo (Target AArch64 options): Document -mabi.
391 * doc/c-aarch64.texi: Likewise.
392
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3932013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
394
395 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
396 unsigned comparison.
397
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3982013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
399
cbe02d4f 400 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 401 RX610.
cbe02d4f 402 * config/rx-parse.y: (rx_check_float_support): Add function to
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403 check floating point operation support for target RX100 and
404 RX200.
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405 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
406 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
407 RX200, RX600, and RX610
f0c00282 408
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4092013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
410
411 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
412
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4132013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
414
415 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
416 * doc/c-avr.texi: Likewise.
417
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4182013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
419
420 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
421 error with older GCCs.
422 (mips16_macro_build): Dereference args.
423
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4242013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
425
426 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
427 New functions, split out from...
428 (reg_lookup): ...here. Remove itbl support.
429 (reglist_lookup): Delete.
430 (mips_operand_token_type): New enum.
431 (mips_operand_token): New structure.
432 (mips_operand_tokens): New variable.
433 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
434 (mips_parse_arguments): New functions.
435 (md_begin): Initialize mips_operand_tokens.
436 (mips_arg_info): Add a token field. Remove optional_reg field.
437 (match_char, match_expression): New functions.
438 (match_const_int): Use match_expression. Remove "s" argument
439 and return a boolean result. Remove O_register handling.
440 (match_regno, match_reg, match_reg_range): New functions.
441 (match_int_operand, match_mapped_int_operand, match_msb_operand)
442 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
443 (match_addiusp_operand, match_clo_clz_dest_operand)
444 (match_lwm_swm_list_operand, match_entry_exit_operand)
445 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
446 (match_tied_reg_operand): Remove "s" argument and return a boolean
447 result. Match tokens rather than text. Update calls to
448 match_const_int. Rely on match_regno to call check_regno.
449 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
450 "arg" argument. Return a boolean result.
451 (parse_float_constant): Replace with...
452 (match_float_constant): ...this new function.
453 (match_operand): Remove "s" argument and return a boolean result.
454 Update calls to subfunctions.
455 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
456 rather than string-parsing routines. Update handling of optional
457 registers for token scheme.
458
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RS
4592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
460
461 * config/tc-mips.c (parse_float_constant): Split out from...
462 (mips_ip): ...here.
463
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RS
4642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
465
466 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
467 Delete.
468
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RS
4692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
470
471 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
472 (match_entry_exit_operand): New function.
473 (match_save_restore_list_operand): Likewise.
474 (match_operand): Use them.
475 (check_absolute_expr): Delete.
476 (mips16_ip): Rewrite main parsing loop to use mips_operands.
477
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RS
4782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * config/tc-mips.c: Enable functions commented out in previous patch.
481 (SKIP_SPACE_TABS): Move further up file.
482 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
483 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
484 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
485 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
486 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
487 (micromips_imm_b_map, micromips_imm_c_map): Delete.
488 (mips_lookup_reg_pair): Delete.
489 (macro): Use report_bad_range and report_bad_field.
490 (mips_immed, expr_const_in_range): Delete.
491 (mips_ip): Rewrite main parsing loop to use new functions.
492
a1d78564
RS
4932013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
494
495 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
496 Change return type to bfd_boolean.
497 (report_bad_range, report_bad_field): New functions.
498 (mips_arg_info): New structure.
499 (match_const_int, convert_reg_type, check_regno, match_int_operand)
500 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
501 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
502 (match_addiusp_operand, match_clo_clz_dest_operand)
503 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
504 (match_pc_operand, match_tied_reg_operand, match_operand)
505 (check_completed_insn): New functions, commented out for now.
506
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RS
5072013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
508
509 * config/tc-mips.c (insn_insert_operand): New function.
510 (macro_build, mips16_macro_build): Put null character check
511 in the for loop and convert continues to breaks. Use operand
512 structures to handle constant operands.
513
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RS
5142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
515
516 * config/tc-mips.c (validate_mips_insn): Move further up file.
517 Add insn_bits and decode_operand arguments. Use the mips_operand
518 fields to work out which bits an operand occupies. Detect double
519 definitions.
520 (validate_micromips_insn): Move further up file. Call into
521 validate_mips_insn.
522
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RS
5232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
524
525 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
526
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RS
5272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
528
529 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
530 and "~".
531 (macro): Update accordingly.
532
77bd4346
RS
5332013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
534
535 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
536 (imm_reloc): Delete.
537 (md_assemble): Remove imm_reloc handling.
538 (mips_ip): Update commentary. Use offset_expr and offset_reloc
539 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
540 Use a temporary array rather than imm_reloc when parsing
541 constant expressions. Remove imm_reloc initialization.
542 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
543 for the relaxable field. Use a relax_char variable to track the
544 type of this field. Remove imm_reloc initialization.
545
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RS
5462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
547
548 * config/tc-mips.c (mips16_ip): Handle "I".
549
ba92f887
MR
5502013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
551
552 * config/tc-mips.c (mips_flag_nan2008): New variable.
553 (options): Add OPTION_NAN enum value.
554 (md_longopts): Handle it.
555 (md_parse_option): Likewise.
556 (s_nan): New function.
557 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
558 (md_show_usage): Add -mnan.
559
560 * doc/as.texinfo (Overview): Add -mnan.
561 * doc/c-mips.texi (MIPS Opts): Document -mnan.
562 (MIPS NaN Encodings): New node. Document .nan directive.
563 (MIPS-Dependent): List the new node.
564
c1094734
TG
5652013-07-09 Tristan Gingold <gingold@adacore.com>
566
567 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
568
0cbbe1b8
RS
5692013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
572 for 'A' and assume that the constant has been elided if the result
573 is an O_register.
574
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RS
5752013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
576
577 * config/tc-mips.c (gprel16_reloc_p): New function.
578 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
579 BFD_RELOC_UNUSED.
580 (offset_high_part, small_offset_p): New functions.
581 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
582 register load and store macros, handle the 16-bit offset case first.
583 If a 16-bit offset is not suitable for the instruction we're
584 generating, load it into the temporary register using
585 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
586 M_L_DAB code once the address has been constructed. For double load
587 and store macros, again handle the 16-bit offset case first.
588 If the second register cannot be accessed from the same high
589 part as the first, load it into AT using ADDRESS_ADDI_INSN.
590 Fix the handling of LD in cases where the first register is the
591 same as the base. Also handle the case where the offset is
592 not 16 bits and the second register cannot be accessed from the
593 same high part as the first. For unaligned loads and stores,
594 fuse the offbits == 12 and old "ab" handling. Apply this handling
595 whenever the second offset needs a different high part from the first.
596 Construct the offset using ADDRESS_ADDI_INSN where possible,
597 for offbits == 16 as well as offbits == 12. Use offset_reloc
598 when constructing the individual loads and stores.
599 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
600 and offset_reloc before matching against a particular opcode.
601 Handle elided 'A' constants. Allow 'A' constants to use
602 relocation operators.
603
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RS
6042013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
605
606 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
607 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
608 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
609
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RS
6102013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
611
612 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
613 Require the msb to be <= 31 for "+s". Check that the size is <= 31
614 for both "+s" and "+S".
615
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RS
6162013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
617
618 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
619 (mips_ip, mips16_ip): Handle "+i".
620
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RS
6212013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
622
623 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
624 (micromips_to_32_reg_h_map): Rename to...
625 (micromips_to_32_reg_h_map1): ...this.
626 (micromips_to_32_reg_i_map): Rename to...
627 (micromips_to_32_reg_h_map2): ...this.
628 (mips_lookup_reg_pair): New function.
629 (gpr_write_mask, macro): Adjust after above renaming.
630 (validate_micromips_insn): Remove "mi" handling.
631 (mips_ip): Likewise. Parse both registers in a pair for "mh".
632
fa7616a4
RS
6332013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
634
635 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
636 (mips_ip): Remove "+D" and "+T" handling.
637
fb798c50
AK
6382013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
639
640 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
641 relocs.
642
2c0a3565
MS
6432013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
644
4aa2c5e2
MS
645 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
646
6472013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
648
2c0a3565
MS
649 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
650 (aarch64_force_relocation): Likewise.
651
f40da81b
AM
6522013-07-02 Alan Modra <amodra@gmail.com>
653
654 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
655
81566a9b
MR
6562013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
657
658 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
659 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
660 Replace @sc{mips16} with literal `MIPS16'.
661 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
662
a6bb11b2
YZ
6632013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
664
665 * config/tc-aarch64.c (reloc_table): Replace
666 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
667 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
668 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
669 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
670 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
671 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
672 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
673 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
674 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
675 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
676 (aarch64_force_relocation): Likewise.
677
cec5225b
YZ
6782013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
679
680 * config/tc-aarch64.c (ilp32_p): New static variable.
681 (elf64_aarch64_target_format): Return the target according to the
682 value of 'ilp32_p'.
683 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
684 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
685 (aarch64_dwarf2_addr_size): New function.
686 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
687 (DWARF2_ADDR_SIZE): New define.
688
e335d9cb
RS
6892013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
690
691 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
692
18870af7
RS
6932013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
694
695 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
696
833794fc
MR
6972013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
698
699 * config/tc-mips.c (mips_set_options): Add insn32 member.
700 (mips_opts): Initialize it.
701 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
702 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
703 (md_longopts): Add "minsn32" and "mno-insn32" options.
704 (is_size_valid): Handle insn32 mode.
705 (md_assemble): Pass instruction string down to macro.
706 (brk_fmt): Add second dimension and insn32 mode initializers.
707 (mfhl_fmt): Likewise.
708 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
709 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
710 (macro_build_jalr, move_register): Handle insn32 mode.
711 (macro_build_branch_rs): Likewise.
712 (macro): Handle insn32 mode.
713 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
714 (mips_ip): Handle insn32 mode.
715 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
716 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
717 (mips_handle_align): Handle insn32 mode.
718 (md_show_usage): Add -minsn32 and -mno-insn32.
719
720 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
721 -mno-insn32 options.
722 (-minsn32, -mno-insn32): New options.
723 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
724 options.
725 (MIPS assembly options): New node. Document .set insn32 and
726 .set noinsn32.
727 (MIPS-Dependent): List the new node.
728
d1706f38
NC
7292013-06-25 Nick Clifton <nickc@redhat.com>
730
731 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
732 the PC in indirect addressing on 430xv2 parts.
733 (msp430_operands): Add version test to hardware bug encoding
734 restrictions.
735
477330fc
RM
7362013-06-24 Roland McGrath <mcgrathr@google.com>
737
d996d970
RM
738 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
739 so it skips whitespace before it.
740 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
741
477330fc
RM
742 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
743 (arm_reg_parse_multi): Skip whitespace first.
744 (parse_reg_list): Likewise.
745 (parse_vfp_reg_list): Likewise.
746 (s_arm_unwind_save_mmxwcg): Likewise.
747
24382199
NC
7482013-06-24 Nick Clifton <nickc@redhat.com>
749
750 PR gas/15623
751 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
752
c3678916
RS
7532013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
754
755 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
756
42429eac
RS
7572013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
758
759 * config/tc-mips.c: Assert that offsetT and valueT are at least
760 8 bytes in size.
761 (GPR_SMIN, GPR_SMAX): New macros.
762 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
763
f3ded42a
RS
7642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
765
766 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
767 conditions. Remove any code deselected by them.
768 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
769
e8044f35
RS
7702013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
771
772 * NEWS: Note removal of ECOFF support.
773 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
774 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
775 (MULTI_CFILES): Remove config/e-mipsecoff.c.
776 * Makefile.in: Regenerate.
777 * configure.in: Remove MIPS ECOFF references.
778 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
779 Delete cases.
780 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
781 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
782 (mips-*-*): ...this single case.
783 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
784 MIPS emulations to be e-mipself*.
785 * configure: Regenerate.
786 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
787 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
788 (mips-*-sysv*): Remove coff and ecoff cases.
789 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
790 * ecoff.c: Remove reference to MIPS ECOFF.
791 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
792 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
793 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
794 (mips_hi_fixup): Tweak comment.
795 (append_insn): Require a howto.
796 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
797
98508b2a
RS
7982013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
799
800 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
801 Use "CPU" instead of "cpu".
802 * doc/c-mips.texi: Likewise.
803 (MIPS Opts): Rename to MIPS Options.
804 (MIPS option stack): Rename to MIPS Option Stack.
805 (MIPS ASE instruction generation overrides): Rename to
806 MIPS ASE Instruction Generation Overrides (for now).
807 (MIPS floating-point): Rename to MIPS Floating-Point.
808
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RS
8092013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
810
811 * doc/c-mips.texi (MIPS Macros): New section.
812 (MIPS Object): Replace with...
813 (MIPS Small Data): ...this new section.
814
5a7560b5
RS
8152013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
816
817 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
818 Capitalize name. Use @kindex instead of @cindex for .set entries.
819
a1b86ab7
RS
8202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
821
822 * doc/c-mips.texi (MIPS Stabs): Remove section.
823
c6278170
RS
8242013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
825
826 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
827 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
828 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
829 (ISA_SUPPORTS_VIRT64_ASE): Delete.
830 (mips_ase): New structure.
831 (mips_ases): New table.
832 (FP64_ASES): New macro.
833 (mips_ase_groups): New array.
834 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
835 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
836 functions.
837 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
838 (md_parse_option): Use mips_ases and mips_set_ase instead of
839 separate case statements for each ASE option.
840 (mips_after_parse_args): Use FP64_ASES. Use
841 mips_check_isa_supports_ases to check the ASEs against
842 other options.
843 (s_mipsset): Use mips_ases and mips_set_ase instead of
844 separate if statements for each ASE option. Use
845 mips_check_isa_supports_ases, even when a non-ASE option
846 is specified.
847
63a4bc21
KT
8482013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
849
850 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
851
c31f3936
RS
8522013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
853
854 * config/tc-mips.c (md_shortopts, options, md_longopts)
855 (md_longopts_size): Move earlier in file.
856
846ef2d0
RS
8572013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
858
859 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
860 with a single "ase" bitmask.
861 (mips_opts): Update accordingly.
862 (file_ase, file_ase_explicit): New variables.
863 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
864 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
865 (ISA_HAS_ROR): Adjust for mips_set_options change.
866 (is_opcode_valid): Take the base ase mask directly from mips_opts.
867 (mips_ip): Adjust for mips_set_options change.
868 (md_parse_option): Likewise. Update file_ase_explicit.
869 (mips_after_parse_args): Adjust for mips_set_options change.
870 Use bitmask operations to select the default ASEs. Set file_ase
871 rather than individual per-ASE variables.
872 (s_mipsset): Adjust for mips_set_options change.
873 (mips_elf_final_processing): Test file_ase rather than
874 file_ase_mdmx. Remove commented-out code.
875
d16afab6
RS
8762013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
877
878 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
879 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
880 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
881 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
882 (mips_after_parse_args): Use the new "ase" field to choose
883 the default ASEs.
884 (mips_cpu_info_table): Move ASEs from the "flags" field to the
885 "ase" field.
886
e83a675f
RE
8872013-06-18 Richard Earnshaw <rearnsha@arm.com>
888
889 * config/tc-arm.c (symbol_preemptible): New function.
890 (relax_branch): Use it.
891
7f3c4072
CM
8922013-06-17 Catherine Moore <clm@codesourcery.com>
893 Maciej W. Rozycki <macro@codesourcery.com>
894 Chao-Ying Fu <fu@mips.com>
895
896 * config/tc-mips.c (mips_set_options): Add ase_eva.
897 (mips_set_options mips_opts): Add ase_eva.
898 (file_ase_eva): Declare.
899 (ISA_SUPPORTS_EVA_ASE): Define.
900 (IS_SEXT_9BIT_NUM): Define.
901 (MIPS_CPU_ASE_EVA): Define.
902 (is_opcode_valid): Add support for ase_eva.
903 (macro_build): Likewise.
904 (macro): Likewise.
905 (validate_mips_insn): Likewise.
906 (validate_micromips_insn): Likewise.
907 (mips_ip): Likewise.
908 (options): Add OPTION_EVA and OPTION_NO_EVA.
909 (md_longopts): Add -meva and -mno-eva.
910 (md_parse_option): Process new options.
911 (mips_after_parse_args): Check for valid EVA combinations.
912 (s_mipsset): Likewise.
913
e410add4
RS
9142013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
915
916 * dwarf2dbg.h (dwarf2_move_insn): Declare.
917 * dwarf2dbg.c (line_subseg): Add pmove_tail.
918 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
919 (dwarf2_gen_line_info_1): Update call accordingly.
920 (dwarf2_move_insn): New function.
921 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
922
6a50d470
RS
9232013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
924
925 Revert:
926
927 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
928
929 PR gas/13024
930 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
931 (dwarf2_gen_line_info_1): Delete.
932 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
933 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
934 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
935 (dwarf2_directive_loc): Push previous .locs instead of generating
936 them immediately.
937
f122319e
CF
9382013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
939
940 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
941 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
942
909c7f9c
NC
9432013-06-13 Nick Clifton <nickc@redhat.com>
944
945 PR gas/15602
946 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
947 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
948 function. Generates an error if the adjusted offset is out of a
949 16-bit range.
950
5d5755a7
SL
9512013-06-12 Sandra Loosemore <sandra@codesourcery.com>
952
953 * config/tc-nios2.c (md_apply_fix): Mask constant
954 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
955
3bf0dbfb
MR
9562013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
957
958 * config/tc-mips.c (append_insn): Don't do branch relaxation for
959 MIPS-3D instructions either.
960 (md_convert_frag): Update the COPx branch mask accordingly.
961
962 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
963 option.
964 * doc/as.texinfo (Overview): Add --relax-branch and
965 --no-relax-branch.
966 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
967 --no-relax-branch.
968
9daf7bab
SL
9692013-06-09 Sandra Loosemore <sandra@codesourcery.com>
970
971 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
972 omitted.
973
d301a56b
RS
9742013-06-08 Catherine Moore <clm@codesourcery.com>
975
976 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
977 (is_opcode_valid_16): Pass ase value to opcode_is_member.
978 (append_insn): Change INSN_xxxx to ASE_xxxx.
979
7bab7634
DC
9802013-06-01 George Thomas <george.thomas@atmel.com>
981
cbe02d4f 982 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
983 AVR_ISA_XMEGAU
984
f60cf82f
L
9852013-05-31 H.J. Lu <hongjiu.lu@intel.com>
986
987 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
988 for ELF.
989
a3f278e2
CM
9902013-05-31 Paul Brook <paul@codesourcery.com>
991
a3f278e2
CM
992 * config/tc-mips.c (s_ehword): New.
993
067ec077
CM
9942013-05-30 Paul Brook <paul@codesourcery.com>
995
996 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
997
d6101ac2
MR
9982013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
999
1000 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1001 convert relocs who have no relocatable field either. Rephrase
1002 the conditional so that the PC-relative check is only applied
1003 for REL targets.
1004
f19ccbda
MR
10052013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1006
1007 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1008 calculation.
1009
418009c2
YZ
10102013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1011
1012 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1013 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1014 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1015 (md_apply_fix): Likewise.
1016 (aarch64_force_relocation): Likewise.
1017
0a8897c7
KT
10182013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1019
1020 * config/tc-arm.c (it_fsm_post_encode): Improve
1021 warning messages about deprecated IT block formats.
1022
89d2a2a3
MS
10232013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1024
1025 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1026 inside fx_done condition.
1027
c77c0862
RS
10282013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1029
1030 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1031
c0637f3a
PB
10322013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1033
1034 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1035 and clean up warning when using PRINT_OPCODE_TABLE.
1036
5656a981
AM
10372013-05-20 Alan Modra <amodra@gmail.com>
1038
1039 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1040 and data fixups performing shift/high adjust/sign extension on
1041 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1042 when writing data fixups rather than recalculating size.
1043
997b26e8
JBG
10442013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1045
1046 * doc/c-msp430.texi: Fix typo.
1047
9f6e76f4
TG
10482013-05-16 Tristan Gingold <gingold@adacore.com>
1049
1050 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1051 are also TOC symbols.
1052
638d3803
NC
10532013-05-16 Nick Clifton <nickc@redhat.com>
1054
1055 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1056 Add -mcpu command to specify core type.
997b26e8 1057 * doc/c-msp430.texi: Update documentation.
638d3803 1058
b015e599
AP
10592013-05-09 Andrew Pinski <apinski@cavium.com>
1060
1061 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1062 (mips_opts): Update for the new field.
1063 (file_ase_virt): New variable.
1064 (ISA_SUPPORTS_VIRT_ASE): New macro.
1065 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1066 (MIPS_CPU_ASE_VIRT): New define.
1067 (is_opcode_valid): Handle ase_virt.
1068 (macro_build): Handle "+J".
1069 (validate_mips_insn): Likewise.
1070 (mips_ip): Likewise.
1071 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1072 (md_longopts): Add mvirt and mnovirt
1073 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1074 (mips_after_parse_args): Handle ase_virt field.
1075 (s_mipsset): Handle "virt" and "novirt".
1076 (mips_elf_final_processing): Add a comment about virt ASE might need
1077 a new flag.
1078 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1079 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1080 Document ".set virt" and ".set novirt".
1081
da8094d7
AM
10822013-05-09 Alan Modra <amodra@gmail.com>
1083
1084 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1085 control of operand flag bits.
1086
c5f8c205
AM
10872013-05-07 Alan Modra <amodra@gmail.com>
1088
1089 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1090 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1091 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1092 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1093 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1094 Shift and sign-extend fieldval for use by some VLE reloc
1095 operand->insert functions.
1096
b47468a6
CM
10972013-05-06 Paul Brook <paul@codesourcery.com>
1098 Catherine Moore <clm@codesourcery.com>
1099
c5f8c205
AM
1100 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1101 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1102 (md_apply_fix): Likewise.
1103 (tc_gen_reloc): Likewise.
1104
2de39019
CM
11052013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1106
1107 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1108 (mips_fix_adjustable): Adjust pc-relative check to use
1109 limited_pc_reloc_p.
1110
754e2bb9
RS
11112013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1112
1113 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1114 (s_mips_stab): Do not restrict to stabn only.
1115
13761a11
NC
11162013-05-02 Nick Clifton <nickc@redhat.com>
1117
1118 * config/tc-msp430.c: Add support for the MSP430X architecture.
1119 Add code to insert a NOP instruction after any instruction that
1120 might change the interrupt state.
1121 Add support for the LARGE memory model.
1122 Add code to initialise the .MSP430.attributes section.
1123 * config/tc-msp430.h: Add support for the MSP430X architecture.
1124 * doc/c-msp430.texi: Document the new -mL and -mN command line
1125 options.
1126 * NEWS: Mention support for the MSP430X architecture.
1127
df26367c
MR
11282013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1129
1130 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1131 alpha*-*-linux*ecoff*.
1132
f02d8318
CF
11332013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1134
1135 * config/tc-mips.c (mips_ip): Add sizelo.
1136 For "+C", "+G", and "+H", set sizelo and compare against it.
1137
b40bf0a2
NC
11382013-04-29 Nick Clifton <nickc@redhat.com>
1139
1140 * as.c (Options): Add -gdwarf-sections.
1141 (parse_args): Likewise.
1142 * as.h (flag_dwarf_sections): Declare.
1143 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1144 (process_entries): When -gdwarf-sections is enabled generate
1145 fragmentary .debug_line sections.
1146 (out_debug_line): Set the section for the .debug_line section end
1147 symbol.
1148 * doc/as.texinfo: Document -gdwarf-sections.
1149 * NEWS: Mention -gdwarf-sections.
1150
8eeccb77 11512013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1152
1153 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1154 according to the target parameter. Don't call s_segm since s_segm
1155 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1156 initialized yet.
1157 (md_begin): Call s_segm according to target parameter from command
1158 line.
1159
49926cd0
AM
11602013-04-25 Alan Modra <amodra@gmail.com>
1161
1162 * configure.in: Allow little-endian linux.
1163 * configure: Regenerate.
1164
e3031850
SL
11652013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1166
1167 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1168 "fstatus" control register to "eccinj".
1169
cb948fc0
KT
11702013-04-19 Kai Tietz <ktietz@redhat.com>
1171
1172 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1173
4455e9ad
JB
11742013-04-15 Julian Brown <julian@codesourcery.com>
1175
1176 * expr.c (add_to_result, subtract_from_result): Make global.
1177 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1178 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1179 subtract_from_result to handle extra bit of precision for .sleb128
1180 directive operands.
1181
956a6ba3
JB
11822013-04-10 Julian Brown <julian@codesourcery.com>
1183
1184 * read.c (convert_to_bignum): Add sign parameter. Use it
1185 instead of X_unsigned to determine sign of resulting bignum.
1186 (emit_expr): Pass extra argument to convert_to_bignum.
1187 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1188 X_extrabit to convert_to_bignum.
1189 (parse_bitfield_cons): Set X_extrabit.
1190 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1191 Initialise X_extrabit field as appropriate.
1192 (add_to_result): New.
1193 (subtract_from_result): New.
1194 (expr): Use above.
1195 * expr.h (expressionS): Add X_extrabit field.
1196
eb9f3f00
JB
11972013-04-10 Jan Beulich <jbeulich@suse.com>
1198
1199 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1200 register being PC when is_t or writeback, and use distinct
1201 diagnostic for the latter case.
1202
ccb84d65
JB
12032013-04-10 Jan Beulich <jbeulich@suse.com>
1204
1205 * gas/config/tc-arm.c (parse_operands): Re-write
1206 po_barrier_or_imm().
1207 (do_barrier): Remove bogus constraint().
1208 (do_t_barrier): Remove.
1209
4d13caa0
NC
12102013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1211
1212 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1213 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1214 ATmega2564RFR2
1215 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1216
16d02dc9
JB
12172013-04-09 Jan Beulich <jbeulich@suse.com>
1218
1219 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1220 Use local variable Rt in more places.
1221 (do_vmsr): Accept all control registers.
1222
05ac0ffb
JB
12232013-04-09 Jan Beulich <jbeulich@suse.com>
1224
1225 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1226 if there was none specified for moves between scalar and core
1227 register.
1228
2d51fb74
JB
12292013-04-09 Jan Beulich <jbeulich@suse.com>
1230
1231 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1232 NEON_ALL_LANES case.
1233
94dcf8bf
JB
12342013-04-08 Jan Beulich <jbeulich@suse.com>
1235
1236 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1237 PC-relative VSTR.
1238
1472d06f
JB
12392013-04-08 Jan Beulich <jbeulich@suse.com>
1240
1241 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1242 entry to sp_fiq.
1243
0c76cae8
AM
12442013-04-03 Alan Modra <amodra@gmail.com>
1245
1246 * doc/as.texinfo: Add support to generate man options for h8300.
1247 * doc/c-h8300.texi: Likewise.
1248
92eb40d9
RR
12492013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1250
1251 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1252 Cortex-A57.
1253
51dcdd4d
NC
12542013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1255
1256 PR binutils/15068
1257 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1258
c5d685bf
NC
12592013-03-26 Nick Clifton <nickc@redhat.com>
1260
9b978282
NC
1261 PR gas/15295
1262 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1263 start of the file each time.
1264
c5d685bf
NC
1265 PR gas/15178
1266 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1267 FreeBSD targets.
1268
9699c833
TG
12692013-03-26 Douglas B Rupp <rupp@gnat.com>
1270
1271 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1272 after fixup.
1273
4755303e
WN
12742013-03-21 Will Newton <will.newton@linaro.org>
1275
1276 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1277 pc-relative str instructions in Thumb mode.
1278
81f5558e
NC
12792013-03-21 Michael Schewe <michael.schewe@gmx.net>
1280
1281 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1282 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1283 R_H8_DISP32A16.
1284 * config/tc-h8300.h: Remove duplicated defines.
1285
71863e73
NC
12862013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1287
1288 PR gas/15282
1289 * tc-avr.c (mcu_has_3_byte_pc): New function.
1290 (tc_cfi_frame_initial_instructions): Call it to find return
1291 address size.
1292
795b8e6b
NC
12932013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1294
1295 PR gas/15095
1296 * config/tc-tic6x.c (tic6x_try_encode): Handle
1297 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1298 encode register pair numbers when required.
1299
ba86b375
WN
13002013-03-15 Will Newton <will.newton@linaro.org>
1301
1302 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1303 in vstr in Thumb mode for pre-ARMv7 cores.
1304
9e6f3811
AS
13052013-03-14 Andreas Schwab <schwab@suse.de>
1306
1307 * doc/c-arc.texi (ARC Directives): Revert last change and use
1308 @itemize instead of @table.
1309 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1310
b10bf8c5
NC
13112013-03-14 Nick Clifton <nickc@redhat.com>
1312
1313 PR gas/15273
1314 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1315 NULL message, instead just check ARM_CPU_IS_ANY directly.
1316
ba724cfc
NC
13172013-03-14 Nick Clifton <nickc@redhat.com>
1318
1319 PR gas/15212
9e6f3811 1320 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1321 for table format.
1322 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1323 to the @item directives.
1324 (ARM-Neon-Alignment): Move to correct place in the document.
1325 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1326 formatting.
1327 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1328 @smallexample.
1329
531a94fd
SL
13302013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1331
1332 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1333 case. Add default BAD_CASE to switch.
1334
dad60f8e
SL
13352013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1336
1337 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1338 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1339
dd5181d5
KT
13402013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1341
1342 * config/tc-arm.c (crc_ext_armv8): New feature set.
1343 (UNPRED_REG): New macro.
1344 (do_crc32_1): New function.
1345 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1346 do_crc32ch, do_crc32cw): Likewise.
1347 (TUEc): New macro.
1348 (insns): Add entries for crc32 mnemonics.
1349 (arm_extensions): Add entry for crc.
1350
8e723a10
CLT
13512013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1352
1353 * write.h (struct fix): Add fx_dot_frag field.
1354 (dot_frag): Declare.
1355 * write.c (dot_frag): New variable.
1356 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1357 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1358 * expr.c (expr): Save value of frag_now in dot_frag when setting
1359 dot_value.
1360 * read.c (emit_expr): Likewise. Delete comments.
1361
be05d201
L
13622013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1363
1364 * config/tc-i386.c (flag_code_names): Removed.
1365 (i386_index_check): Rewrote.
1366
62b0d0d5
YZ
13672013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1368
1369 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1370 add comment.
1371 (aarch64_double_precision_fmovable): New function.
1372 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1373 function; handle hexadecimal representation of IEEE754 encoding.
1374 (parse_operands): Update the call to parse_aarch64_imm_float.
1375
165de32a
L
13762013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1377
1378 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1379 (check_hle): Updated.
1380 (md_assemble): Likewise.
1381 (parse_insn): Likewise.
1382
d5de92cf
L
13832013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1384
1385 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1386 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1387 (parse_insn): Remove expecting_string_instruction. Set
1388 i.rep_prefix.
1389
e60bb1dd
YZ
13902013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1391
1392 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1393
aeebdd9b
YZ
13942013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1395
1396 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1397 for system registers.
1398
4107ae22
DD
13992013-02-27 DJ Delorie <dj@redhat.com>
1400
1401 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1402 (rl78_op): Handle %code().
1403 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1404 (tc_gen_reloc): Likwise; convert to a computed reloc.
1405 (md_apply_fix): Likewise.
1406
151fa98f
NC
14072013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1408
1409 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1410
70a8bc5b 14112013-02-25 Terry Guo <terry.guo@arm.com>
1412
1413 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1414 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1415 list of accepted CPUs.
1416
5c111e37
L
14172013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1418
1419 PR gas/15159
1420 * config/tc-i386.c (cpu_arch): Add ".smap".
1421
1422 * doc/c-i386.texi: Document smap.
1423
8a75745d
MR
14242013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1425
1426 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1427 mips_assembling_insn appropriately.
1428 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1429
79850f26
MR
14302013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1431
cf29fc61 1432 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1433 extraneous braces.
1434
4c261dff
NC
14352013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1436
5c111e37 1437 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1438
ea33f281
NC
14392013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1440
1441 * configure.tgt: Add nios2-*-rtems*.
1442
a1ccaec9
YZ
14432013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1444
1445 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1446 NULL.
1447
0aa27725
RS
14482013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1449
1450 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1451 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1452
da4339ed
NC
14532013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1454
1455 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1456 core.
1457
36591ba1 14582013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1459 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1460
1461 Based on patches from Altera Corporation.
1462
1463 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1464 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1465 * Makefile.in: Regenerated.
1466 * configure.tgt: Add case for nios2*-linux*.
1467 * config/obj-elf.c: Conditionally include elf/nios2.h.
1468 * config/tc-nios2.c: New file.
1469 * config/tc-nios2.h: New file.
1470 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1471 * doc/Makefile.in: Regenerated.
1472 * doc/all.texi: Set NIOSII.
1473 * doc/as.texinfo (Overview): Add Nios II options.
1474 (Machine Dependencies): Include c-nios2.texi.
1475 * doc/c-nios2.texi: New file.
1476 * NEWS: Note Altera Nios II support.
1477
94d4433a
AM
14782013-02-06 Alan Modra <amodra@gmail.com>
1479
1480 PR gas/14255
1481 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1482 Don't skip fixups with fx_subsy non-NULL.
1483 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1484 with fx_subsy non-NULL.
1485
ace9af6f
L
14862013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1487
1488 * doc/c-metag.texi: Add "@c man" markers.
1489
89d67ed9
AM
14902013-02-04 Alan Modra <amodra@gmail.com>
1491
1492 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1493 related code.
1494 (TC_ADJUST_RELOC_COUNT): Delete.
1495 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1496
89072bd6
AM
14972013-02-04 Alan Modra <amodra@gmail.com>
1498
1499 * po/POTFILES.in: Regenerate.
1500
f9b2d544
NC
15012013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1502
1503 * config/tc-metag.c: Make SWAP instruction less permissive with
1504 its operands.
1505
392ca752
DD
15062013-01-29 DJ Delorie <dj@redhat.com>
1507
1508 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1509 relocs in .word/.etc statements.
1510
427d0db6
RM
15112013-01-29 Roland McGrath <mcgrathr@google.com>
1512
1513 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1514 immediate value for 8-bit offset" error so it shows line info.
1515
4faf939a
JM
15162013-01-24 Joseph Myers <joseph@codesourcery.com>
1517
1518 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1519 for 64-bit output.
1520
78c8d46c
NC
15212013-01-24 Nick Clifton <nickc@redhat.com>
1522
1523 * config/tc-v850.c: Add support for e3v5 architecture.
1524 * doc/c-v850.texi: Mention new support.
1525
fb5b7503
NC
15262013-01-23 Nick Clifton <nickc@redhat.com>
1527
1528 PR gas/15039
1529 * config/tc-avr.c: Include dwarf2dbg.h.
1530
8ce3d284
L
15312013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1532
1533 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1534 (tc_i386_fix_adjustable): Likewise.
1535 (lex_got): Likewise.
1536 (tc_gen_reloc): Likewise.
1537
f5555712
YZ
15382013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1539
1540 * config/tc-aarch64.c (output_operand_error_record): Change to output
1541 the out-of-range error message as value-expected message if there is
1542 only one single value in the expected range.
1543 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1544 LSL #0 as a programmer-friendly feature.
1545
8fd4256d
L
15462013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1547
1548 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1549 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1550 BFD_RELOC_64_SIZE relocations.
1551 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1552 for it.
1553 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1554 relocations against local symbols.
1555
a5840dce
AM
15562013-01-16 Alan Modra <amodra@gmail.com>
1557
1558 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1559 finding some sort of toc syntax error, and break to avoid
1560 compiler uninit warning.
1561
af89796a
L
15622013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1563
1564 PR gas/15019
1565 * config/tc-i386.c (lex_got): Increment length by 1 if the
1566 relocation token is removed.
1567
dd42f060
NC
15682013-01-15 Nick Clifton <nickc@redhat.com>
1569
1570 * config/tc-v850.c (md_assemble): Allow signed values for
1571 V850E_IMMEDIATE.
1572
464e3686
SK
15732013-01-11 Sean Keys <skeys@ipdatasys.com>
1574
1575 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1576 git to cvs.
464e3686 1577
5817ffd1
PB
15782013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1579
1580 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1581 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1582 * config/tc-ppc.c (md_show_usage): Likewise.
1583 (ppc_handle_align): Handle power8's group ending nop.
1584
f4b1f6a9
SK
15852013-01-10 Sean Keys <skeys@ipdatasys.com>
1586
1587 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1588 that the assember exits after the opcodes have been printed.
f4b1f6a9 1589
34bca508
L
15902013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1591
1592 * app.c: Remove trailing white spaces.
1593 * as.c: Likewise.
1594 * as.h: Likewise.
1595 * cond.c: Likewise.
1596 * dw2gencfi.c: Likewise.
1597 * dwarf2dbg.h: Likewise.
1598 * ecoff.c: Likewise.
1599 * input-file.c: Likewise.
1600 * itbl-lex.h: Likewise.
1601 * output-file.c: Likewise.
1602 * read.c: Likewise.
1603 * sb.c: Likewise.
1604 * subsegs.c: Likewise.
1605 * symbols.c: Likewise.
1606 * write.c: Likewise.
1607 * config/tc-i386.c: Likewise.
1608 * doc/Makefile.am: Likewise.
1609 * doc/Makefile.in: Likewise.
1610 * doc/c-aarch64.texi: Likewise.
1611 * doc/c-alpha.texi: Likewise.
1612 * doc/c-arc.texi: Likewise.
1613 * doc/c-arm.texi: Likewise.
1614 * doc/c-avr.texi: Likewise.
1615 * doc/c-bfin.texi: Likewise.
1616 * doc/c-cr16.texi: Likewise.
1617 * doc/c-d10v.texi: Likewise.
1618 * doc/c-d30v.texi: Likewise.
1619 * doc/c-h8300.texi: Likewise.
1620 * doc/c-hppa.texi: Likewise.
1621 * doc/c-i370.texi: Likewise.
1622 * doc/c-i386.texi: Likewise.
1623 * doc/c-i860.texi: Likewise.
1624 * doc/c-m32c.texi: Likewise.
1625 * doc/c-m32r.texi: Likewise.
1626 * doc/c-m68hc11.texi: Likewise.
1627 * doc/c-m68k.texi: Likewise.
1628 * doc/c-microblaze.texi: Likewise.
1629 * doc/c-mips.texi: Likewise.
1630 * doc/c-msp430.texi: Likewise.
1631 * doc/c-mt.texi: Likewise.
1632 * doc/c-s390.texi: Likewise.
1633 * doc/c-score.texi: Likewise.
1634 * doc/c-sh.texi: Likewise.
1635 * doc/c-sh64.texi: Likewise.
1636 * doc/c-tic54x.texi: Likewise.
1637 * doc/c-tic6x.texi: Likewise.
1638 * doc/c-v850.texi: Likewise.
1639 * doc/c-xc16x.texi: Likewise.
1640 * doc/c-xgate.texi: Likewise.
1641 * doc/c-xtensa.texi: Likewise.
1642 * doc/c-z80.texi: Likewise.
1643 * doc/internals.texi: Likewise.
1644
4c665b71
RM
16452013-01-10 Roland McGrath <mcgrathr@google.com>
1646
1647 * hash.c (hash_new_sized): Make it global.
1648 * hash.h: Declare it.
1649 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1650 pass a small size.
1651
a3c62988
NC
16522013-01-10 Will Newton <will.newton@imgtec.com>
1653
1654 * Makefile.am: Add Meta.
1655 * Makefile.in: Regenerate.
1656 * config/tc-metag.c: New file.
1657 * config/tc-metag.h: New file.
1658 * configure.tgt: Add Meta.
1659 * doc/Makefile.am: Add Meta.
1660 * doc/Makefile.in: Regenerate.
1661 * doc/all.texi: Add Meta.
1662 * doc/as.texiinfo: Document Meta options.
1663 * doc/c-metag.texi: New file.
1664
b37df7c4
SE
16652013-01-09 Steve Ellcey <sellcey@mips.com>
1666
1667 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1668 calls.
1669 * config/tc-mips.c (internalError): Remove, replace with abort.
1670
a3251895
YZ
16712013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1672
1673 * config/tc-aarch64.c (parse_operands): Change to compare the result
1674 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1675
8ab8155f
NC
16762013-01-07 Nick Clifton <nickc@redhat.com>
1677
1678 PR gas/14887
1679 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1680 anticipated character.
1681 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1682 here as it is no longer needed.
1683
a4ac1c42
AS
16842013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1685
1686 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1687 * doc/c-score.texi (SCORE-Opts): Likewise.
1688 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1689
e407c74b
NC
16902013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1691
1692 * config/tc-mips.c: Add support for MIPS r5900.
1693 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1694 lq and sq.
1695 (can_swap_branch_p, get_append_method): Detect some conditional
1696 short loops to fix a bug on the r5900 by NOP in the branch delay
1697 slot.
1698 (M_MUL): Support 3 operands in multu on r5900.
1699 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1700 (s_mipsset): Force 32 bit floating point on r5900.
1701 (mips_ip): Check parameter range of instructions mfps and mtps on
1702 r5900.
1703 * configure.in: Detect CPU type when target string contains r5900
1704 (e.g. mips64r5900el-linux-gnu).
1705
62658407
L
17062013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1707
1708 * as.c (parse_args): Update copyright year to 2013.
1709
95830fd1
YZ
17102013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1711
1712 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1713 and "cortex57".
1714
517bb291 17152013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1716
517bb291
NC
1717 PR gas/14987
1718 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1719 closing bracket.
d709e4e6 1720
517bb291 1721For older changes see ChangeLog-2012
08d56133 1722\f
517bb291 1723Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1724
1725Copying and distribution of this file, with or without modification,
1726are permitted in any medium without royalty provided the copyright
1727notice and this notice are preserved.
1728
08d56133
NC
1729Local Variables:
1730mode: change-log
1731left-margin: 8
1732fill-column: 74
1733version-control: never
1734End: