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fa7616a4
RS		 12013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
4 (mips_ip): Remove "+D" and "+T" handling.
5
fb798c50
AK		 62013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
7
8 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
9 relocs.
10
2c0a3565
MS		 112013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
12
4aa2c5e2
MS		 13 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
14
152013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
16
2c0a3565
MS		 17 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
18 (aarch64_force_relocation): Likewise.
19
f40da81b
AM		 202013-07-02 Alan Modra <amodra@gmail.com>
21
22 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
23
81566a9b
MR		 242013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
25
26 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
27 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
28 Replace @sc{mips16} with literal `MIPS16'.
29 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
30
a6bb11b2
YZ		 312013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
32
33 * config/tc-aarch64.c (reloc_table): Replace
34 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
35 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
36 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
37 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
38 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
39 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
40 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
41 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
42 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
43 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
44 (aarch64_force_relocation): Likewise.
45
cec5225b
YZ		 462013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
47
48 * config/tc-aarch64.c (ilp32_p): New static variable.
49 (elf64_aarch64_target_format): Return the target according to the
50 value of 'ilp32_p'.
51 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
52 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
53 (aarch64_dwarf2_addr_size): New function.
54 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
55 (DWARF2_ADDR_SIZE): New define.
56
e335d9cb
RS		 572013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
60
18870af7
RS		 612013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
64
833794fc
MR		 652013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
66
67 * config/tc-mips.c (mips_set_options): Add insn32 member.
68 (mips_opts): Initialize it.
69 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
70 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
71 (md_longopts): Add "minsn32" and "mno-insn32" options.
72 (is_size_valid): Handle insn32 mode.
73 (md_assemble): Pass instruction string down to macro.
74 (brk_fmt): Add second dimension and insn32 mode initializers.
75 (mfhl_fmt): Likewise.
76 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
77 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
78 (macro_build_jalr, move_register): Handle insn32 mode.
79 (macro_build_branch_rs): Likewise.
80 (macro): Handle insn32 mode.
81 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
82 (mips_ip): Handle insn32 mode.
83 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
84 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
85 (mips_handle_align): Handle insn32 mode.
86 (md_show_usage): Add -minsn32 and -mno-insn32.
87
88 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
89 -mno-insn32 options.
90 (-minsn32, -mno-insn32): New options.
91 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
92 options.
93 (MIPS assembly options): New node. Document .set insn32 and
94 .set noinsn32.
95 (MIPS-Dependent): List the new node.
96
d1706f38
NC		 972013-06-25 Nick Clifton <nickc@redhat.com>
98
99 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
100 the PC in indirect addressing on 430xv2 parts.
101 (msp430_operands): Add version test to hardware bug encoding
102 restrictions.
103
477330fc
RM		 1042013-06-24 Roland McGrath <mcgrathr@google.com>
105
d996d970
RM		 106 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
107 so it skips whitespace before it.
108 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
109
477330fc
RM		 110 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
111 (arm_reg_parse_multi): Skip whitespace first.
112 (parse_reg_list): Likewise.
113 (parse_vfp_reg_list): Likewise.
114 (s_arm_unwind_save_mmxwcg): Likewise.
115
24382199
NC		 1162013-06-24 Nick Clifton <nickc@redhat.com>
117
118 PR gas/15623
119 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
120
c3678916
RS		 1212013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
122
123 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
124
42429eac
RS		 1252013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * config/tc-mips.c: Assert that offsetT and valueT are at least
128 8 bytes in size.
129 (GPR_SMIN, GPR_SMAX): New macros.
130 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
131
f3ded42a
RS		 1322013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
135 conditions. Remove any code deselected by them.
136 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
137
e8044f35
RS		 1382013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
139
140 * NEWS: Note removal of ECOFF support.
141 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
142 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
143 (MULTI_CFILES): Remove config/e-mipsecoff.c.
144 * Makefile.in: Regenerate.
145 * configure.in: Remove MIPS ECOFF references.
146 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
147 Delete cases.
148 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
149 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
150 (mips-*-*): ...this single case.
151 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
152 MIPS emulations to be e-mipself*.
153 * configure: Regenerate.
154 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
155 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
156 (mips-*-sysv*): Remove coff and ecoff cases.
157 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
158 * ecoff.c: Remove reference to MIPS ECOFF.
159 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
160 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
161 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
162 (mips_hi_fixup): Tweak comment.
163 (append_insn): Require a howto.
164 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
165
98508b2a
RS		 1662013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
167
168 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
169 Use "CPU" instead of "cpu".
170 * doc/c-mips.texi: Likewise.
171 (MIPS Opts): Rename to MIPS Options.
172 (MIPS option stack): Rename to MIPS Option Stack.
173 (MIPS ASE instruction generation overrides): Rename to
174 MIPS ASE Instruction Generation Overrides (for now).
175 (MIPS floating-point): Rename to MIPS Floating-Point.
176
fc16f8cc
RS		 1772013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
178
179 * doc/c-mips.texi (MIPS Macros): New section.
180 (MIPS Object): Replace with...
181 (MIPS Small Data): ...this new section.
182
5a7560b5
RS		 1832013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
186 Capitalize name. Use @kindex instead of @cindex for .set entries.
187
a1b86ab7
RS		 1882013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * doc/c-mips.texi (MIPS Stabs): Remove section.
191
c6278170
RS		 1922013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
193
194 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
195 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
196 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
197 (ISA_SUPPORTS_VIRT64_ASE): Delete.
198 (mips_ase): New structure.
199 (mips_ases): New table.
200 (FP64_ASES): New macro.
201 (mips_ase_groups): New array.
202 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
203 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
204 functions.
205 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
206 (md_parse_option): Use mips_ases and mips_set_ase instead of
207 separate case statements for each ASE option.
208 (mips_after_parse_args): Use FP64_ASES. Use
209 mips_check_isa_supports_ases to check the ASEs against
210 other options.
211 (s_mipsset): Use mips_ases and mips_set_ase instead of
212 separate if statements for each ASE option. Use
213 mips_check_isa_supports_ases, even when a non-ASE option
214 is specified.
215
63a4bc21
KT		 2162013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
217
218 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
219
c31f3936
RS		 2202013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
221
222 * config/tc-mips.c (md_shortopts, options, md_longopts)
223 (md_longopts_size): Move earlier in file.
224
846ef2d0
RS		 2252013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
226
227 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
228 with a single "ase" bitmask.
229 (mips_opts): Update accordingly.
230 (file_ase, file_ase_explicit): New variables.
231 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
232 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
233 (ISA_HAS_ROR): Adjust for mips_set_options change.
234 (is_opcode_valid): Take the base ase mask directly from mips_opts.
235 (mips_ip): Adjust for mips_set_options change.
236 (md_parse_option): Likewise. Update file_ase_explicit.
237 (mips_after_parse_args): Adjust for mips_set_options change.
238 Use bitmask operations to select the default ASEs. Set file_ase
239 rather than individual per-ASE variables.
240 (s_mipsset): Adjust for mips_set_options change.
241 (mips_elf_final_processing): Test file_ase rather than
242 file_ase_mdmx. Remove commented-out code.
243
d16afab6
RS		 2442013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
247 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
248 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
249 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
250 (mips_after_parse_args): Use the new "ase" field to choose
251 the default ASEs.
252 (mips_cpu_info_table): Move ASEs from the "flags" field to the
253 "ase" field.
254
e83a675f
RE		 2552013-06-18 Richard Earnshaw <rearnsha@arm.com>
256
257 * config/tc-arm.c (symbol_preemptible): New function.
258 (relax_branch): Use it.
259
7f3c4072
CM		 2602013-06-17 Catherine Moore <clm@codesourcery.com>
261 Maciej W. Rozycki <macro@codesourcery.com>
262 Chao-Ying Fu <fu@mips.com>
263
264 * config/tc-mips.c (mips_set_options): Add ase_eva.
265 (mips_set_options mips_opts): Add ase_eva.
266 (file_ase_eva): Declare.
267 (ISA_SUPPORTS_EVA_ASE): Define.
268 (IS_SEXT_9BIT_NUM): Define.
269 (MIPS_CPU_ASE_EVA): Define.
270 (is_opcode_valid): Add support for ase_eva.
271 (macro_build): Likewise.
272 (macro): Likewise.
273 (validate_mips_insn): Likewise.
274 (validate_micromips_insn): Likewise.
275 (mips_ip): Likewise.
276 (options): Add OPTION_EVA and OPTION_NO_EVA.
277 (md_longopts): Add -meva and -mno-eva.
278 (md_parse_option): Process new options.
279 (mips_after_parse_args): Check for valid EVA combinations.
280 (s_mipsset): Likewise.
281
e410add4
RS		 2822013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
283
284 * dwarf2dbg.h (dwarf2_move_insn): Declare.
285 * dwarf2dbg.c (line_subseg): Add pmove_tail.
286 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
287 (dwarf2_gen_line_info_1): Update call accordingly.
288 (dwarf2_move_insn): New function.
289 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
290
6a50d470
RS		 2912013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
292
293 Revert:
294
295 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
296
297 PR gas/13024
298 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
299 (dwarf2_gen_line_info_1): Delete.
300 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
301 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
302 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
303 (dwarf2_directive_loc): Push previous .locs instead of generating
304 them immediately.
305
f122319e
CF		 3062013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
307
308 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
309 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
310
909c7f9c
NC		 3112013-06-13 Nick Clifton <nickc@redhat.com>
312
313 PR gas/15602
314 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
315 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
316 function. Generates an error if the adjusted offset is out of a
317 16-bit range.
318
5d5755a7
SL		 3192013-06-12 Sandra Loosemore <sandra@codesourcery.com>
320
321 * config/tc-nios2.c (md_apply_fix): Mask constant
322 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
323
3bf0dbfb
MR		 3242013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
325
326 * config/tc-mips.c (append_insn): Don't do branch relaxation for
327 MIPS-3D instructions either.
328 (md_convert_frag): Update the COPx branch mask accordingly.
329
330 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
331 option.
332 * doc/as.texinfo (Overview): Add --relax-branch and
333 --no-relax-branch.
334 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
335 --no-relax-branch.
336
9daf7bab
SL		 3372013-06-09 Sandra Loosemore <sandra@codesourcery.com>
338
339 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
340 omitted.
341
d301a56b
RS		 3422013-06-08 Catherine Moore <clm@codesourcery.com>
343
344 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
345 (is_opcode_valid_16): Pass ase value to opcode_is_member.
346 (append_insn): Change INSN_xxxx to ASE_xxxx.
347
7bab7634
DC		 3482013-06-01 George Thomas <george.thomas@atmel.com>
349
350 * gas/config/tc-avr.c: Change ISA for devices with USB support to
351 AVR_ISA_XMEGAU
352
f60cf82f
L		 3532013-05-31 H.J. Lu <hongjiu.lu@intel.com>
354
355 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
356 for ELF.
357
a3f278e2
CM		 3582013-05-31 Paul Brook <paul@codesourcery.com>
359
360 gas/
361 * config/tc-mips.c (s_ehword): New.
362
067ec077
CM		 3632013-05-30 Paul Brook <paul@codesourcery.com>
364
365 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
366
d6101ac2
MR		 3672013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
368
369 * write.c (resolve_reloc_expr_symbols): On REL targets don't
370 convert relocs who have no relocatable field either. Rephrase
371 the conditional so that the PC-relative check is only applied
372 for REL targets.
373
f19ccbda
MR		 3742013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
375
376 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
377 calculation.
378
418009c2
YZ		 3792013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
380
381 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 382 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 383 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
384 (md_apply_fix): Likewise.
385 (aarch64_force_relocation): Likewise.
386
0a8897c7
KT		 3872013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
388
389 * config/tc-arm.c (it_fsm_post_encode): Improve
390 warning messages about deprecated IT block formats.
391
89d2a2a3
MS		 3922013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
393
394 * config/tc-aarch64.c (md_apply_fix): Move value range checking
395 inside fx_done condition.
396
c77c0862
RS		 3972013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
398
399 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
400
c0637f3a
PB		 4012013-05-20 Peter Bergner <bergner@vnet.ibm.com>
402
403 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
404 and clean up warning when using PRINT_OPCODE_TABLE.
405
5656a981
AM		 4062013-05-20 Alan Modra <amodra@gmail.com>
407
408 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
409 and data fixups performing shift/high adjust/sign extension on
410 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
411 when writing data fixups rather than recalculating size.
412
997b26e8
JBG		 4132013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
414
415 * doc/c-msp430.texi: Fix typo.
416
9f6e76f4
TG		 4172013-05-16 Tristan Gingold <gingold@adacore.com>
418
419 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
420 are also TOC symbols.
421
638d3803
NC		 4222013-05-16 Nick Clifton <nickc@redhat.com>
423
424 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
425 Add -mcpu command to specify core type.
997b26e8 426 * doc/c-msp430.texi: Update documentation.
638d3803 427
b015e599
AP		 4282013-05-09 Andrew Pinski <apinski@cavium.com>
429
430 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
431 (mips_opts): Update for the new field.
432 (file_ase_virt): New variable.
433 (ISA_SUPPORTS_VIRT_ASE): New macro.
434 (ISA_SUPPORTS_VIRT64_ASE): New macro.
435 (MIPS_CPU_ASE_VIRT): New define.
436 (is_opcode_valid): Handle ase_virt.
437 (macro_build): Handle "+J".
438 (validate_mips_insn): Likewise.
439 (mips_ip): Likewise.
440 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
441 (md_longopts): Add mvirt and mnovirt
442 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
443 (mips_after_parse_args): Handle ase_virt field.
444 (s_mipsset): Handle "virt" and "novirt".
445 (mips_elf_final_processing): Add a comment about virt ASE might need
446 a new flag.
447 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
448 * doc/c-mips.texi: Document -mvirt and -mno-virt.
449 Document ".set virt" and ".set novirt".
450
da8094d7
AM		 4512013-05-09 Alan Modra <amodra@gmail.com>
452
453 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
454 control of operand flag bits.
455
c5f8c205
AM		 4562013-05-07 Alan Modra <amodra@gmail.com>
457
458 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
459 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
460 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
461 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
462 (md_apply_fix): Set fx_no_overflow for assorted relocations.
463 Shift and sign-extend fieldval for use by some VLE reloc
464 operand->insert functions.
465
b47468a6
CM		 4662013-05-06 Paul Brook <paul@codesourcery.com>
467 Catherine Moore <clm@codesourcery.com>
468
c5f8c205
AM		 469 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
470 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 471 (md_apply_fix): Likewise.
472 (tc_gen_reloc): Likewise.
473
2de39019
CM		 4742013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
475
476 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
477 (mips_fix_adjustable): Adjust pc-relative check to use
478 limited_pc_reloc_p.
479
754e2bb9
RS		 4802013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
481
482 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
483 (s_mips_stab): Do not restrict to stabn only.
484
13761a11
NC		 4852013-05-02 Nick Clifton <nickc@redhat.com>
486
487 * config/tc-msp430.c: Add support for the MSP430X architecture.
488 Add code to insert a NOP instruction after any instruction that
489 might change the interrupt state.
490 Add support for the LARGE memory model.
491 Add code to initialise the .MSP430.attributes section.
492 * config/tc-msp430.h: Add support for the MSP430X architecture.
493 * doc/c-msp430.texi: Document the new -mL and -mN command line
494 options.
495 * NEWS: Mention support for the MSP430X architecture.
496
df26367c
MR		 4972013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
498
499 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
500 alpha*-*-linux*ecoff*.
501
f02d8318
CF		 5022013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
503
504 * config/tc-mips.c (mips_ip): Add sizelo.
505 For "+C", "+G", and "+H", set sizelo and compare against it.
506
b40bf0a2
NC		 5072013-04-29 Nick Clifton <nickc@redhat.com>
508
509 * as.c (Options): Add -gdwarf-sections.
510 (parse_args): Likewise.
511 * as.h (flag_dwarf_sections): Declare.
512 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
513 (process_entries): When -gdwarf-sections is enabled generate
514 fragmentary .debug_line sections.
515 (out_debug_line): Set the section for the .debug_line section end
516 symbol.
517 * doc/as.texinfo: Document -gdwarf-sections.
518 * NEWS: Mention -gdwarf-sections.
519
8eeccb77 5202013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 521
522 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
523 according to the target parameter. Don't call s_segm since s_segm
524 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
525 initialized yet.
526 (md_begin): Call s_segm according to target parameter from command
527 line.
528
49926cd0
AM		 5292013-04-25 Alan Modra <amodra@gmail.com>
530
531 * configure.in: Allow little-endian linux.
532 * configure: Regenerate.
533
e3031850
SL		 5342013-04-24 Sandra Loosemore <sandra@codesourcery.com>
535
536 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
537 "fstatus" control register to "eccinj".
538
cb948fc0
KT		 5392013-04-19 Kai Tietz <ktietz@redhat.com>
540
541 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
542
4455e9ad
JB		 5432013-04-15 Julian Brown <julian@codesourcery.com>
544
545 * expr.c (add_to_result, subtract_from_result): Make global.
546 * expr.h (add_to_result, subtract_from_result): Add prototypes.
547 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
548 subtract_from_result to handle extra bit of precision for .sleb128
549 directive operands.
550
956a6ba3
JB		 5512013-04-10 Julian Brown <julian@codesourcery.com>
552
553 * read.c (convert_to_bignum): Add sign parameter. Use it
554 instead of X_unsigned to determine sign of resulting bignum.
555 (emit_expr): Pass extra argument to convert_to_bignum.
556 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
557 X_extrabit to convert_to_bignum.
558 (parse_bitfield_cons): Set X_extrabit.
559 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
560 Initialise X_extrabit field as appropriate.
561 (add_to_result): New.
562 (subtract_from_result): New.
563 (expr): Use above.
564 * expr.h (expressionS): Add X_extrabit field.
565
eb9f3f00
JB		 5662013-04-10 Jan Beulich <jbeulich@suse.com>
567
568 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
569 register being PC when is_t or writeback, and use distinct
570 diagnostic for the latter case.
571
ccb84d65
JB		 5722013-04-10 Jan Beulich <jbeulich@suse.com>
573
574 * gas/config/tc-arm.c (parse_operands): Re-write
575 po_barrier_or_imm().
576 (do_barrier): Remove bogus constraint().
577 (do_t_barrier): Remove.
578
4d13caa0
NC		 5792013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
580
581 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
582 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
583 ATmega2564RFR2
584 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
585
16d02dc9
JB		 5862013-04-09 Jan Beulich <jbeulich@suse.com>
587
588 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
589 Use local variable Rt in more places.
590 (do_vmsr): Accept all control registers.
591
05ac0ffb
JB		 5922013-04-09 Jan Beulich <jbeulich@suse.com>
593
594 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
595 if there was none specified for moves between scalar and core
596 register.
597
2d51fb74
JB		 5982013-04-09 Jan Beulich <jbeulich@suse.com>
599
600 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
601 NEON_ALL_LANES case.
602
94dcf8bf
JB		 6032013-04-08 Jan Beulich <jbeulich@suse.com>
604
605 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
606 PC-relative VSTR.
607
1472d06f
JB		 6082013-04-08 Jan Beulich <jbeulich@suse.com>
609
610 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
611 entry to sp_fiq.
612
0c76cae8
AM		 6132013-04-03 Alan Modra <amodra@gmail.com>
614
615 * doc/as.texinfo: Add support to generate man options for h8300.
616 * doc/c-h8300.texi: Likewise.
617
92eb40d9
RR		 6182013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
619
620 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
621 Cortex-A57.
622
51dcdd4d
NC		 6232013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
624
625 PR binutils/15068
626 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
627
c5d685bf
NC		 6282013-03-26 Nick Clifton <nickc@redhat.com>
629
9b978282
NC		 630 PR gas/15295
631 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
632 start of the file each time.
633
c5d685bf
NC		 634 PR gas/15178
635 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
636 FreeBSD targets.
637
9699c833
TG		 6382013-03-26 Douglas B Rupp <rupp@gnat.com>
639
640 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
641 after fixup.
642
4755303e
WN		 6432013-03-21 Will Newton <will.newton@linaro.org>
644
645 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
646 pc-relative str instructions in Thumb mode.
647
81f5558e
NC		 6482013-03-21 Michael Schewe <michael.schewe@gmx.net>
649
650 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
651 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
652 R_H8_DISP32A16.
653 * config/tc-h8300.h: Remove duplicated defines.
654
71863e73
NC		 6552013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
656
657 PR gas/15282
658 * tc-avr.c (mcu_has_3_byte_pc): New function.
659 (tc_cfi_frame_initial_instructions): Call it to find return
660 address size.
661
795b8e6b
NC		 6622013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
663
664 PR gas/15095
665 * config/tc-tic6x.c (tic6x_try_encode): Handle
666 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
667 encode register pair numbers when required.
668
ba86b375
WN		 6692013-03-15 Will Newton <will.newton@linaro.org>
670
671 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
672 in vstr in Thumb mode for pre-ARMv7 cores.
673
9e6f3811
AS		 6742013-03-14 Andreas Schwab <schwab@suse.de>
675
676 * doc/c-arc.texi (ARC Directives): Revert last change and use
677 @itemize instead of @table.
678 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
679
b10bf8c5
NC		 6802013-03-14 Nick Clifton <nickc@redhat.com>
681
682 PR gas/15273
683 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
684 NULL message, instead just check ARM_CPU_IS_ANY directly.
685
ba724cfc
NC		 6862013-03-14 Nick Clifton <nickc@redhat.com>
687
688 PR gas/15212
9e6f3811 689 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 690 for table format.
691 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
692 to the @item directives.
693 (ARM-Neon-Alignment): Move to correct place in the document.
694 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
695 formatting.
696 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
697 @smallexample.
698
531a94fd
SL		 6992013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
700
701 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
702 case. Add default BAD_CASE to switch.
703
dad60f8e
SL		 7042013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
705
706 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
707 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
708
dd5181d5
KT		 7092013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
710
711 * config/tc-arm.c (crc_ext_armv8): New feature set.
712 (UNPRED_REG): New macro.
713 (do_crc32_1): New function.
714 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
715 do_crc32ch, do_crc32cw): Likewise.
716 (TUEc): New macro.
717 (insns): Add entries for crc32 mnemonics.
718 (arm_extensions): Add entry for crc.
719
8e723a10
CLT		 7202013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
721
722 * write.h (struct fix): Add fx_dot_frag field.
723 (dot_frag): Declare.
724 * write.c (dot_frag): New variable.
725 (fix_new_internal): Set fx_dot_frag field with dot_frag.
726 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
727 * expr.c (expr): Save value of frag_now in dot_frag when setting
728 dot_value.
729 * read.c (emit_expr): Likewise. Delete comments.
730
be05d201
L		 7312013-03-07 H.J. Lu <hongjiu.lu@intel.com>
732
733 * config/tc-i386.c (flag_code_names): Removed.
734 (i386_index_check): Rewrote.
735
62b0d0d5
YZ		 7362013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
737
738 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
739 add comment.
740 (aarch64_double_precision_fmovable): New function.
741 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
742 function; handle hexadecimal representation of IEEE754 encoding.
743 (parse_operands): Update the call to parse_aarch64_imm_float.
744
165de32a
L		 7452013-02-28 H.J. Lu <hongjiu.lu@intel.com>
746
747 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
748 (check_hle): Updated.
749 (md_assemble): Likewise.
750 (parse_insn): Likewise.
751
d5de92cf
L		 7522013-02-28 H.J. Lu <hongjiu.lu@intel.com>
753
754 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 755 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 756 (parse_insn): Remove expecting_string_instruction. Set
757 i.rep_prefix.
758
e60bb1dd
YZ		 7592013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
760
761 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
762
aeebdd9b
YZ		 7632013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
764
765 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
766 for system registers.
767
4107ae22
DD		 7682013-02-27 DJ Delorie <dj@redhat.com>
769
770 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
771 (rl78_op): Handle %code().
772 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
773 (tc_gen_reloc): Likwise; convert to a computed reloc.
774 (md_apply_fix): Likewise.
775
151fa98f
NC		 7762013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
777
778 * config/rl78-parse.y: Fix encoding of DIVWU insn.
779
70a8bc5b 7802013-02-25 Terry Guo <terry.guo@arm.com>
781
782 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
783 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
784 list of accepted CPUs.
785
5c111e37
L		 7862013-02-19 H.J. Lu <hongjiu.lu@intel.com>
787
788 PR gas/15159
789 * config/tc-i386.c (cpu_arch): Add ".smap".
790
791 * doc/c-i386.texi: Document smap.
792
8a75745d
MR		 7932013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
794
795 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
796 mips_assembling_insn appropriately.
797 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
798
79850f26
MR		 7992013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
800
cf29fc61 801 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 802 extraneous braces.
803
4c261dff
NC		 8042013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
805
5c111e37 806 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 807
ea33f281
NC		 8082013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
809
810 * configure.tgt: Add nios2-*-rtems*.
811
a1ccaec9
YZ		 8122013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
813
814 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
815 NULL.
816
0aa27725
RS		 8172013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
818
819 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
820 (macro): Use it. Assert that trunc.w.s is not used for r5900.
821
da4339ed
NC		 8222013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
823
824 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
825 core.
826
36591ba1 8272013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 828 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 829
830 Based on patches from Altera Corporation.
831
832 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
833 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
834 * Makefile.in: Regenerated.
835 * configure.tgt: Add case for nios2*-linux*.
836 * config/obj-elf.c: Conditionally include elf/nios2.h.
837 * config/tc-nios2.c: New file.
838 * config/tc-nios2.h: New file.
839 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
840 * doc/Makefile.in: Regenerated.
841 * doc/all.texi: Set NIOSII.
842 * doc/as.texinfo (Overview): Add Nios II options.
843 (Machine Dependencies): Include c-nios2.texi.
844 * doc/c-nios2.texi: New file.
845 * NEWS: Note Altera Nios II support.
846
94d4433a
AM		 8472013-02-06 Alan Modra <amodra@gmail.com>
848
849 PR gas/14255
850 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
851 Don't skip fixups with fx_subsy non-NULL.
852 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
853 with fx_subsy non-NULL.
854
ace9af6f
L		 8552013-02-04 H.J. Lu <hongjiu.lu@intel.com>
856
857 * doc/c-metag.texi: Add "@c man" markers.
858
89d67ed9
AM		 8592013-02-04 Alan Modra <amodra@gmail.com>
860
861 * write.c (fixup_segment): Return void. Delete seg_reloc_count
862 related code.
863 (TC_ADJUST_RELOC_COUNT): Delete.
864 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
865
89072bd6
AM		 8662013-02-04 Alan Modra <amodra@gmail.com>
867
868 * po/POTFILES.in: Regenerate.
869
f9b2d544
NC		 8702013-01-30 Markos Chandras <markos.chandras@imgtec.com>
871
872 * config/tc-metag.c: Make SWAP instruction less permissive with
873 its operands.
874
392ca752
DD		 8752013-01-29 DJ Delorie <dj@redhat.com>
876
877 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
878 relocs in .word/.etc statements.
879
427d0db6
RM		 8802013-01-29 Roland McGrath <mcgrathr@google.com>
881
882 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
883 immediate value for 8-bit offset" error so it shows line info.
884
4faf939a
JM		 8852013-01-24 Joseph Myers <joseph@codesourcery.com>
886
887 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
888 for 64-bit output.
889
78c8d46c
NC		 8902013-01-24 Nick Clifton <nickc@redhat.com>
891
892 * config/tc-v850.c: Add support for e3v5 architecture.
893 * doc/c-v850.texi: Mention new support.
894
fb5b7503
NC		 8952013-01-23 Nick Clifton <nickc@redhat.com>
896
897 PR gas/15039
898 * config/tc-avr.c: Include dwarf2dbg.h.
899
8ce3d284
L		 9002013-01-18 H.J. Lu <hongjiu.lu@intel.com>
901
902 * config/tc-i386.c (reloc): Support size relocation only for ELF.
903 (tc_i386_fix_adjustable): Likewise.
904 (lex_got): Likewise.
905 (tc_gen_reloc): Likewise.
906
f5555712
YZ		 9072013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
908
909 * config/tc-aarch64.c (output_operand_error_record): Change to output
910 the out-of-range error message as value-expected message if there is
911 only one single value in the expected range.
912 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
913 LSL #0 as a programmer-friendly feature.
914
8fd4256d
L		 9152013-01-16 H.J. Lu <hongjiu.lu@intel.com>
916
917 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
918 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
919 BFD_RELOC_64_SIZE relocations.
920 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
921 for it.
922 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
923 relocations against local symbols.
924
a5840dce
AM		 9252013-01-16 Alan Modra <amodra@gmail.com>
926
927 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
928 finding some sort of toc syntax error, and break to avoid
929 compiler uninit warning.
930
af89796a
L		 9312013-01-15 H.J. Lu <hongjiu.lu@intel.com>
932
933 PR gas/15019
934 * config/tc-i386.c (lex_got): Increment length by 1 if the
935 relocation token is removed.
936
dd42f060
NC		 9372013-01-15 Nick Clifton <nickc@redhat.com>
938
939 * config/tc-v850.c (md_assemble): Allow signed values for
940 V850E_IMMEDIATE.
941
464e3686
SK		 9422013-01-11 Sean Keys <skeys@ipdatasys.com>
943
944 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 945 git to cvs.
464e3686 946
5817ffd1
PB		 9472013-01-10 Peter Bergner <bergner@vnet.ibm.com>
948
949 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
950 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
951 * config/tc-ppc.c (md_show_usage): Likewise.
952 (ppc_handle_align): Handle power8's group ending nop.
953
f4b1f6a9
SK		 9542013-01-10 Sean Keys <skeys@ipdatasys.com>
955
956 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 957 that the assember exits after the opcodes have been printed.
f4b1f6a9 958
34bca508
L		 9592013-01-10 H.J. Lu <hongjiu.lu@intel.com>
960
961 * app.c: Remove trailing white spaces.
962 * as.c: Likewise.
963 * as.h: Likewise.
964 * cond.c: Likewise.
965 * dw2gencfi.c: Likewise.
966 * dwarf2dbg.h: Likewise.
967 * ecoff.c: Likewise.
968 * input-file.c: Likewise.
969 * itbl-lex.h: Likewise.
970 * output-file.c: Likewise.
971 * read.c: Likewise.
972 * sb.c: Likewise.
973 * subsegs.c: Likewise.
974 * symbols.c: Likewise.
975 * write.c: Likewise.
976 * config/tc-i386.c: Likewise.
977 * doc/Makefile.am: Likewise.
978 * doc/Makefile.in: Likewise.
979 * doc/c-aarch64.texi: Likewise.
980 * doc/c-alpha.texi: Likewise.
981 * doc/c-arc.texi: Likewise.
982 * doc/c-arm.texi: Likewise.
983 * doc/c-avr.texi: Likewise.
984 * doc/c-bfin.texi: Likewise.
985 * doc/c-cr16.texi: Likewise.
986 * doc/c-d10v.texi: Likewise.
987 * doc/c-d30v.texi: Likewise.
988 * doc/c-h8300.texi: Likewise.
989 * doc/c-hppa.texi: Likewise.
990 * doc/c-i370.texi: Likewise.
991 * doc/c-i386.texi: Likewise.
992 * doc/c-i860.texi: Likewise.
993 * doc/c-m32c.texi: Likewise.
994 * doc/c-m32r.texi: Likewise.
995 * doc/c-m68hc11.texi: Likewise.
996 * doc/c-m68k.texi: Likewise.
997 * doc/c-microblaze.texi: Likewise.
998 * doc/c-mips.texi: Likewise.
999 * doc/c-msp430.texi: Likewise.
1000 * doc/c-mt.texi: Likewise.
1001 * doc/c-s390.texi: Likewise.
1002 * doc/c-score.texi: Likewise.
1003 * doc/c-sh.texi: Likewise.
1004 * doc/c-sh64.texi: Likewise.
1005 * doc/c-tic54x.texi: Likewise.
1006 * doc/c-tic6x.texi: Likewise.
1007 * doc/c-v850.texi: Likewise.
1008 * doc/c-xc16x.texi: Likewise.
1009 * doc/c-xgate.texi: Likewise.
1010 * doc/c-xtensa.texi: Likewise.
1011 * doc/c-z80.texi: Likewise.
1012 * doc/internals.texi: Likewise.
1013
4c665b71
RM		 10142013-01-10 Roland McGrath <mcgrathr@google.com>
1015
1016 * hash.c (hash_new_sized): Make it global.
1017 * hash.h: Declare it.
1018 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1019 pass a small size.
1020
a3c62988
NC		 10212013-01-10 Will Newton <will.newton@imgtec.com>
1022
1023 * Makefile.am: Add Meta.
1024 * Makefile.in: Regenerate.
1025 * config/tc-metag.c: New file.
1026 * config/tc-metag.h: New file.
1027 * configure.tgt: Add Meta.
1028 * doc/Makefile.am: Add Meta.
1029 * doc/Makefile.in: Regenerate.
1030 * doc/all.texi: Add Meta.
1031 * doc/as.texiinfo: Document Meta options.
1032 * doc/c-metag.texi: New file.
1033
b37df7c4
SE		 10342013-01-09 Steve Ellcey <sellcey@mips.com>
1035
1036 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1037 calls.
1038 * config/tc-mips.c (internalError): Remove, replace with abort.
1039
a3251895
YZ		 10402013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1041
1042 * config/tc-aarch64.c (parse_operands): Change to compare the result
1043 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1044
8ab8155f
NC		 10452013-01-07 Nick Clifton <nickc@redhat.com>
1046
1047 PR gas/14887
1048 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1049 anticipated character.
1050 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1051 here as it is no longer needed.
1052
a4ac1c42
AS		 10532013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1054
1055 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1056 * doc/c-score.texi (SCORE-Opts): Likewise.
1057 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1058
e407c74b
NC		 10592013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1060
1061 * config/tc-mips.c: Add support for MIPS r5900.
1062 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1063 lq and sq.
1064 (can_swap_branch_p, get_append_method): Detect some conditional
1065 short loops to fix a bug on the r5900 by NOP in the branch delay
1066 slot.
1067 (M_MUL): Support 3 operands in multu on r5900.
1068 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1069 (s_mipsset): Force 32 bit floating point on r5900.
1070 (mips_ip): Check parameter range of instructions mfps and mtps on
1071 r5900.
1072 * configure.in: Detect CPU type when target string contains r5900
1073 (e.g. mips64r5900el-linux-gnu).
1074
62658407
L		 10752013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1076
1077 * as.c (parse_args): Update copyright year to 2013.
1078
95830fd1
YZ		 10792013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1080
1081 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1082 and "cortex57".
1083
517bb291 10842013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1085
517bb291
NC		 1086 PR gas/14987
1087 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1088 closing bracket.
d709e4e6 1089
517bb291 1090For older changes see ChangeLog-2012
08d56133 1091\f
517bb291 1092Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1093
1094Copying and distribution of this file, with or without modification,
1095are permitted in any medium without royalty provided the copyright
1096notice and this notice are preserved.
1097
08d56133
NC		 1098Local Variables:
1099mode: change-log
1100left-margin: 8
1101fill-column: 74
1102version-control: never
1103End:
A mirror of the official binutils-gdb repository