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fc16f8cc
RS
12013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * doc/c-mips.texi (MIPS Macros): New section.
4 (MIPS Object): Replace with...
5 (MIPS Small Data): ...this new section.
6
5a7560b5
RS
72013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
8
9 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
10 Capitalize name. Use @kindex instead of @cindex for .set entries.
11
a1b86ab7
RS
122013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
13
14 * doc/c-mips.texi (MIPS Stabs): Remove section.
15
c6278170
RS
162013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
17
18 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
19 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
20 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
21 (ISA_SUPPORTS_VIRT64_ASE): Delete.
22 (mips_ase): New structure.
23 (mips_ases): New table.
24 (FP64_ASES): New macro.
25 (mips_ase_groups): New array.
26 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
27 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
28 functions.
29 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
30 (md_parse_option): Use mips_ases and mips_set_ase instead of
31 separate case statements for each ASE option.
32 (mips_after_parse_args): Use FP64_ASES. Use
33 mips_check_isa_supports_ases to check the ASEs against
34 other options.
35 (s_mipsset): Use mips_ases and mips_set_ase instead of
36 separate if statements for each ASE option. Use
37 mips_check_isa_supports_ases, even when a non-ASE option
38 is specified.
39
63a4bc21
KT
402013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
41
42 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
43
c31f3936
RS
442013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
45
46 * config/tc-mips.c (md_shortopts, options, md_longopts)
47 (md_longopts_size): Move earlier in file.
48
846ef2d0
RS
492013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
50
51 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
52 with a single "ase" bitmask.
53 (mips_opts): Update accordingly.
54 (file_ase, file_ase_explicit): New variables.
55 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
56 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
57 (ISA_HAS_ROR): Adjust for mips_set_options change.
58 (is_opcode_valid): Take the base ase mask directly from mips_opts.
59 (mips_ip): Adjust for mips_set_options change.
60 (md_parse_option): Likewise. Update file_ase_explicit.
61 (mips_after_parse_args): Adjust for mips_set_options change.
62 Use bitmask operations to select the default ASEs. Set file_ase
63 rather than individual per-ASE variables.
64 (s_mipsset): Adjust for mips_set_options change.
65 (mips_elf_final_processing): Test file_ase rather than
66 file_ase_mdmx. Remove commented-out code.
67
d16afab6
RS
682013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
69
70 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
71 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
72 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
73 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
74 (mips_after_parse_args): Use the new "ase" field to choose
75 the default ASEs.
76 (mips_cpu_info_table): Move ASEs from the "flags" field to the
77 "ase" field.
78
e83a675f
RE
792013-06-18 Richard Earnshaw <rearnsha@arm.com>
80
81 * config/tc-arm.c (symbol_preemptible): New function.
82 (relax_branch): Use it.
83
7f3c4072
CM
842013-06-17 Catherine Moore <clm@codesourcery.com>
85 Maciej W. Rozycki <macro@codesourcery.com>
86 Chao-Ying Fu <fu@mips.com>
87
88 * config/tc-mips.c (mips_set_options): Add ase_eva.
89 (mips_set_options mips_opts): Add ase_eva.
90 (file_ase_eva): Declare.
91 (ISA_SUPPORTS_EVA_ASE): Define.
92 (IS_SEXT_9BIT_NUM): Define.
93 (MIPS_CPU_ASE_EVA): Define.
94 (is_opcode_valid): Add support for ase_eva.
95 (macro_build): Likewise.
96 (macro): Likewise.
97 (validate_mips_insn): Likewise.
98 (validate_micromips_insn): Likewise.
99 (mips_ip): Likewise.
100 (options): Add OPTION_EVA and OPTION_NO_EVA.
101 (md_longopts): Add -meva and -mno-eva.
102 (md_parse_option): Process new options.
103 (mips_after_parse_args): Check for valid EVA combinations.
104 (s_mipsset): Likewise.
105
e410add4
RS
1062013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
107
108 * dwarf2dbg.h (dwarf2_move_insn): Declare.
109 * dwarf2dbg.c (line_subseg): Add pmove_tail.
110 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
111 (dwarf2_gen_line_info_1): Update call accordingly.
112 (dwarf2_move_insn): New function.
113 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
114
6a50d470
RS
1152013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
116
117 Revert:
118
119 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
120
121 PR gas/13024
122 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
123 (dwarf2_gen_line_info_1): Delete.
124 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
125 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
126 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
127 (dwarf2_directive_loc): Push previous .locs instead of generating
128 them immediately.
129
f122319e
CF
1302013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
131
132 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
133 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
134
909c7f9c
NC
1352013-06-13 Nick Clifton <nickc@redhat.com>
136
137 PR gas/15602
138 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
139 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
140 function. Generates an error if the adjusted offset is out of a
141 16-bit range.
142
5d5755a7
SL
1432013-06-12 Sandra Loosemore <sandra@codesourcery.com>
144
145 * config/tc-nios2.c (md_apply_fix): Mask constant
146 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
147
3bf0dbfb
MR
1482013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
149
150 * config/tc-mips.c (append_insn): Don't do branch relaxation for
151 MIPS-3D instructions either.
152 (md_convert_frag): Update the COPx branch mask accordingly.
153
154 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
155 option.
156 * doc/as.texinfo (Overview): Add --relax-branch and
157 --no-relax-branch.
158 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
159 --no-relax-branch.
160
9daf7bab
SL
1612013-06-09 Sandra Loosemore <sandra@codesourcery.com>
162
163 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
164 omitted.
165
d301a56b
RS
1662013-06-08 Catherine Moore <clm@codesourcery.com>
167
168 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
169 (is_opcode_valid_16): Pass ase value to opcode_is_member.
170 (append_insn): Change INSN_xxxx to ASE_xxxx.
171
7bab7634
DC
1722013-06-01 George Thomas <george.thomas@atmel.com>
173
174 * gas/config/tc-avr.c: Change ISA for devices with USB support to
175 AVR_ISA_XMEGAU
176
f60cf82f
L
1772013-05-31 H.J. Lu <hongjiu.lu@intel.com>
178
179 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
180 for ELF.
181
a3f278e2
CM
1822013-05-31 Paul Brook <paul@codesourcery.com>
183
184 gas/
185 * config/tc-mips.c (s_ehword): New.
186
067ec077
CM
1872013-05-30 Paul Brook <paul@codesourcery.com>
188
189 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
190
d6101ac2
MR
1912013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
192
193 * write.c (resolve_reloc_expr_symbols): On REL targets don't
194 convert relocs who have no relocatable field either. Rephrase
195 the conditional so that the PC-relative check is only applied
196 for REL targets.
197
f19ccbda
MR
1982013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
199
200 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
201 calculation.
202
418009c2
YZ
2032013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
204
205 * config/tc-aarch64.c (reloc_table): Update to use
206 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
207 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
208 (md_apply_fix): Likewise.
209 (aarch64_force_relocation): Likewise.
210
0a8897c7
KT
2112013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
212
213 * config/tc-arm.c (it_fsm_post_encode): Improve
214 warning messages about deprecated IT block formats.
215
89d2a2a3
MS
2162013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
217
218 * config/tc-aarch64.c (md_apply_fix): Move value range checking
219 inside fx_done condition.
220
c77c0862
RS
2212013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
222
223 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
224
c0637f3a
PB
2252013-05-20 Peter Bergner <bergner@vnet.ibm.com>
226
227 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
228 and clean up warning when using PRINT_OPCODE_TABLE.
229
5656a981
AM
2302013-05-20 Alan Modra <amodra@gmail.com>
231
232 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
233 and data fixups performing shift/high adjust/sign extension on
234 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
235 when writing data fixups rather than recalculating size.
236
997b26e8
JBG
2372013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
238
239 * doc/c-msp430.texi: Fix typo.
240
9f6e76f4
TG
2412013-05-16 Tristan Gingold <gingold@adacore.com>
242
243 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
244 are also TOC symbols.
245
638d3803
NC
2462013-05-16 Nick Clifton <nickc@redhat.com>
247
248 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
249 Add -mcpu command to specify core type.
997b26e8 250 * doc/c-msp430.texi: Update documentation.
638d3803 251
b015e599
AP
2522013-05-09 Andrew Pinski <apinski@cavium.com>
253
254 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
255 (mips_opts): Update for the new field.
256 (file_ase_virt): New variable.
257 (ISA_SUPPORTS_VIRT_ASE): New macro.
258 (ISA_SUPPORTS_VIRT64_ASE): New macro.
259 (MIPS_CPU_ASE_VIRT): New define.
260 (is_opcode_valid): Handle ase_virt.
261 (macro_build): Handle "+J".
262 (validate_mips_insn): Likewise.
263 (mips_ip): Likewise.
264 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
265 (md_longopts): Add mvirt and mnovirt
266 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
267 (mips_after_parse_args): Handle ase_virt field.
268 (s_mipsset): Handle "virt" and "novirt".
269 (mips_elf_final_processing): Add a comment about virt ASE might need
270 a new flag.
271 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
272 * doc/c-mips.texi: Document -mvirt and -mno-virt.
273 Document ".set virt" and ".set novirt".
274
da8094d7
AM
2752013-05-09 Alan Modra <amodra@gmail.com>
276
277 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
278 control of operand flag bits.
279
c5f8c205
AM
2802013-05-07 Alan Modra <amodra@gmail.com>
281
282 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
283 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
284 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
285 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
286 (md_apply_fix): Set fx_no_overflow for assorted relocations.
287 Shift and sign-extend fieldval for use by some VLE reloc
288 operand->insert functions.
289
b47468a6
CM
2902013-05-06 Paul Brook <paul@codesourcery.com>
291 Catherine Moore <clm@codesourcery.com>
292
c5f8c205
AM
293 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
294 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
295 (md_apply_fix): Likewise.
296 (tc_gen_reloc): Likewise.
297
2de39019
CM
2982013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
301 (mips_fix_adjustable): Adjust pc-relative check to use
302 limited_pc_reloc_p.
303
754e2bb9
RS
3042013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
305
306 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
307 (s_mips_stab): Do not restrict to stabn only.
308
13761a11
NC
3092013-05-02 Nick Clifton <nickc@redhat.com>
310
311 * config/tc-msp430.c: Add support for the MSP430X architecture.
312 Add code to insert a NOP instruction after any instruction that
313 might change the interrupt state.
314 Add support for the LARGE memory model.
315 Add code to initialise the .MSP430.attributes section.
316 * config/tc-msp430.h: Add support for the MSP430X architecture.
317 * doc/c-msp430.texi: Document the new -mL and -mN command line
318 options.
319 * NEWS: Mention support for the MSP430X architecture.
320
df26367c
MR
3212013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
322
323 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
324 alpha*-*-linux*ecoff*.
325
f02d8318
CF
3262013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
327
328 * config/tc-mips.c (mips_ip): Add sizelo.
329 For "+C", "+G", and "+H", set sizelo and compare against it.
330
b40bf0a2
NC
3312013-04-29 Nick Clifton <nickc@redhat.com>
332
333 * as.c (Options): Add -gdwarf-sections.
334 (parse_args): Likewise.
335 * as.h (flag_dwarf_sections): Declare.
336 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
337 (process_entries): When -gdwarf-sections is enabled generate
338 fragmentary .debug_line sections.
339 (out_debug_line): Set the section for the .debug_line section end
340 symbol.
341 * doc/as.texinfo: Document -gdwarf-sections.
342 * NEWS: Mention -gdwarf-sections.
343
8eeccb77 3442013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
345
346 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
347 according to the target parameter. Don't call s_segm since s_segm
348 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
349 initialized yet.
350 (md_begin): Call s_segm according to target parameter from command
351 line.
352
49926cd0
AM
3532013-04-25 Alan Modra <amodra@gmail.com>
354
355 * configure.in: Allow little-endian linux.
356 * configure: Regenerate.
357
e3031850
SL
3582013-04-24 Sandra Loosemore <sandra@codesourcery.com>
359
360 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
361 "fstatus" control register to "eccinj".
362
cb948fc0
KT
3632013-04-19 Kai Tietz <ktietz@redhat.com>
364
365 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
366
4455e9ad
JB
3672013-04-15 Julian Brown <julian@codesourcery.com>
368
369 * expr.c (add_to_result, subtract_from_result): Make global.
370 * expr.h (add_to_result, subtract_from_result): Add prototypes.
371 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
372 subtract_from_result to handle extra bit of precision for .sleb128
373 directive operands.
374
956a6ba3
JB
3752013-04-10 Julian Brown <julian@codesourcery.com>
376
377 * read.c (convert_to_bignum): Add sign parameter. Use it
378 instead of X_unsigned to determine sign of resulting bignum.
379 (emit_expr): Pass extra argument to convert_to_bignum.
380 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
381 X_extrabit to convert_to_bignum.
382 (parse_bitfield_cons): Set X_extrabit.
383 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
384 Initialise X_extrabit field as appropriate.
385 (add_to_result): New.
386 (subtract_from_result): New.
387 (expr): Use above.
388 * expr.h (expressionS): Add X_extrabit field.
389
eb9f3f00
JB
3902013-04-10 Jan Beulich <jbeulich@suse.com>
391
392 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
393 register being PC when is_t or writeback, and use distinct
394 diagnostic for the latter case.
395
ccb84d65
JB
3962013-04-10 Jan Beulich <jbeulich@suse.com>
397
398 * gas/config/tc-arm.c (parse_operands): Re-write
399 po_barrier_or_imm().
400 (do_barrier): Remove bogus constraint().
401 (do_t_barrier): Remove.
402
4d13caa0
NC
4032013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
404
405 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
406 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
407 ATmega2564RFR2
408 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
409
16d02dc9
JB
4102013-04-09 Jan Beulich <jbeulich@suse.com>
411
412 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
413 Use local variable Rt in more places.
414 (do_vmsr): Accept all control registers.
415
05ac0ffb
JB
4162013-04-09 Jan Beulich <jbeulich@suse.com>
417
418 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
419 if there was none specified for moves between scalar and core
420 register.
421
2d51fb74
JB
4222013-04-09 Jan Beulich <jbeulich@suse.com>
423
424 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
425 NEON_ALL_LANES case.
426
94dcf8bf
JB
4272013-04-08 Jan Beulich <jbeulich@suse.com>
428
429 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
430 PC-relative VSTR.
431
1472d06f
JB
4322013-04-08 Jan Beulich <jbeulich@suse.com>
433
434 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
435 entry to sp_fiq.
436
0c76cae8
AM
4372013-04-03 Alan Modra <amodra@gmail.com>
438
439 * doc/as.texinfo: Add support to generate man options for h8300.
440 * doc/c-h8300.texi: Likewise.
441
92eb40d9
RR
4422013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
443
444 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
445 Cortex-A57.
446
51dcdd4d
NC
4472013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
448
449 PR binutils/15068
450 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
451
c5d685bf
NC
4522013-03-26 Nick Clifton <nickc@redhat.com>
453
9b978282
NC
454 PR gas/15295
455 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
456 start of the file each time.
457
c5d685bf
NC
458 PR gas/15178
459 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
460 FreeBSD targets.
461
9699c833
TG
4622013-03-26 Douglas B Rupp <rupp@gnat.com>
463
464 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
465 after fixup.
466
4755303e
WN
4672013-03-21 Will Newton <will.newton@linaro.org>
468
469 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
470 pc-relative str instructions in Thumb mode.
471
81f5558e
NC
4722013-03-21 Michael Schewe <michael.schewe@gmx.net>
473
474 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
475 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
476 R_H8_DISP32A16.
477 * config/tc-h8300.h: Remove duplicated defines.
478
71863e73
NC
4792013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
480
481 PR gas/15282
482 * tc-avr.c (mcu_has_3_byte_pc): New function.
483 (tc_cfi_frame_initial_instructions): Call it to find return
484 address size.
485
795b8e6b
NC
4862013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
487
488 PR gas/15095
489 * config/tc-tic6x.c (tic6x_try_encode): Handle
490 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
491 encode register pair numbers when required.
492
ba86b375
WN
4932013-03-15 Will Newton <will.newton@linaro.org>
494
495 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
496 in vstr in Thumb mode for pre-ARMv7 cores.
497
9e6f3811
AS
4982013-03-14 Andreas Schwab <schwab@suse.de>
499
500 * doc/c-arc.texi (ARC Directives): Revert last change and use
501 @itemize instead of @table.
502 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
503
b10bf8c5
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5042013-03-14 Nick Clifton <nickc@redhat.com>
505
506 PR gas/15273
507 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
508 NULL message, instead just check ARM_CPU_IS_ANY directly.
509
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NC
5102013-03-14 Nick Clifton <nickc@redhat.com>
511
512 PR gas/15212
9e6f3811 513 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
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514 for table format.
515 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
516 to the @item directives.
517 (ARM-Neon-Alignment): Move to correct place in the document.
518 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
519 formatting.
520 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
521 @smallexample.
522
531a94fd
SL
5232013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
524
525 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
526 case. Add default BAD_CASE to switch.
527
dad60f8e
SL
5282013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
529
530 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
531 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
532
dd5181d5
KT
5332013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
534
535 * config/tc-arm.c (crc_ext_armv8): New feature set.
536 (UNPRED_REG): New macro.
537 (do_crc32_1): New function.
538 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
539 do_crc32ch, do_crc32cw): Likewise.
540 (TUEc): New macro.
541 (insns): Add entries for crc32 mnemonics.
542 (arm_extensions): Add entry for crc.
543
8e723a10
CLT
5442013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
545
546 * write.h (struct fix): Add fx_dot_frag field.
547 (dot_frag): Declare.
548 * write.c (dot_frag): New variable.
549 (fix_new_internal): Set fx_dot_frag field with dot_frag.
550 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
551 * expr.c (expr): Save value of frag_now in dot_frag when setting
552 dot_value.
553 * read.c (emit_expr): Likewise. Delete comments.
554
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5552013-03-07 H.J. Lu <hongjiu.lu@intel.com>
556
557 * config/tc-i386.c (flag_code_names): Removed.
558 (i386_index_check): Rewrote.
559
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YZ
5602013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
561
562 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
563 add comment.
564 (aarch64_double_precision_fmovable): New function.
565 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
566 function; handle hexadecimal representation of IEEE754 encoding.
567 (parse_operands): Update the call to parse_aarch64_imm_float.
568
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5692013-02-28 H.J. Lu <hongjiu.lu@intel.com>
570
571 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
572 (check_hle): Updated.
573 (md_assemble): Likewise.
574 (parse_insn): Likewise.
575
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5762013-02-28 H.J. Lu <hongjiu.lu@intel.com>
577
578 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 579 (md_assemble): Check if REP prefix is OK.
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580 (parse_insn): Remove expecting_string_instruction. Set
581 i.rep_prefix.
582
e60bb1dd
YZ
5832013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
584
585 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
586
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5872013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
588
589 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
590 for system registers.
591
4107ae22
DD
5922013-02-27 DJ Delorie <dj@redhat.com>
593
594 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
595 (rl78_op): Handle %code().
596 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
597 (tc_gen_reloc): Likwise; convert to a computed reloc.
598 (md_apply_fix): Likewise.
599
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6002013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
601
602 * config/rl78-parse.y: Fix encoding of DIVWU insn.
603
70a8bc5b 6042013-02-25 Terry Guo <terry.guo@arm.com>
605
606 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
607 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
608 list of accepted CPUs.
609
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6102013-02-19 H.J. Lu <hongjiu.lu@intel.com>
611
612 PR gas/15159
613 * config/tc-i386.c (cpu_arch): Add ".smap".
614
615 * doc/c-i386.texi: Document smap.
616
8a75745d
MR
6172013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
618
619 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
620 mips_assembling_insn appropriately.
621 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
622
79850f26
MR
6232013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
624
cf29fc61 625 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
626 extraneous braces.
627
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NC
6282013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
629
5c111e37 630 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 631
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NC
6322013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
633
634 * configure.tgt: Add nios2-*-rtems*.
635
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6362013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
637
638 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
639 NULL.
640
0aa27725
RS
6412013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
642
643 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
644 (macro): Use it. Assert that trunc.w.s is not used for r5900.
645
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6462013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
647
648 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
649 core.
650
36591ba1 6512013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 652 Andrew Jenner <andrew@codesourcery.com>
36591ba1
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653
654 Based on patches from Altera Corporation.
655
656 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
657 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
658 * Makefile.in: Regenerated.
659 * configure.tgt: Add case for nios2*-linux*.
660 * config/obj-elf.c: Conditionally include elf/nios2.h.
661 * config/tc-nios2.c: New file.
662 * config/tc-nios2.h: New file.
663 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
664 * doc/Makefile.in: Regenerated.
665 * doc/all.texi: Set NIOSII.
666 * doc/as.texinfo (Overview): Add Nios II options.
667 (Machine Dependencies): Include c-nios2.texi.
668 * doc/c-nios2.texi: New file.
669 * NEWS: Note Altera Nios II support.
670
94d4433a
AM
6712013-02-06 Alan Modra <amodra@gmail.com>
672
673 PR gas/14255
674 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
675 Don't skip fixups with fx_subsy non-NULL.
676 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
677 with fx_subsy non-NULL.
678
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6792013-02-04 H.J. Lu <hongjiu.lu@intel.com>
680
681 * doc/c-metag.texi: Add "@c man" markers.
682
89d67ed9
AM
6832013-02-04 Alan Modra <amodra@gmail.com>
684
685 * write.c (fixup_segment): Return void. Delete seg_reloc_count
686 related code.
687 (TC_ADJUST_RELOC_COUNT): Delete.
688 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
689
89072bd6
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6902013-02-04 Alan Modra <amodra@gmail.com>
691
692 * po/POTFILES.in: Regenerate.
693
f9b2d544
NC
6942013-01-30 Markos Chandras <markos.chandras@imgtec.com>
695
696 * config/tc-metag.c: Make SWAP instruction less permissive with
697 its operands.
698
392ca752
DD
6992013-01-29 DJ Delorie <dj@redhat.com>
700
701 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
702 relocs in .word/.etc statements.
703
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7042013-01-29 Roland McGrath <mcgrathr@google.com>
705
706 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
707 immediate value for 8-bit offset" error so it shows line info.
708
4faf939a
JM
7092013-01-24 Joseph Myers <joseph@codesourcery.com>
710
711 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
712 for 64-bit output.
713
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7142013-01-24 Nick Clifton <nickc@redhat.com>
715
716 * config/tc-v850.c: Add support for e3v5 architecture.
717 * doc/c-v850.texi: Mention new support.
718
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NC
7192013-01-23 Nick Clifton <nickc@redhat.com>
720
721 PR gas/15039
722 * config/tc-avr.c: Include dwarf2dbg.h.
723
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7242013-01-18 H.J. Lu <hongjiu.lu@intel.com>
725
726 * config/tc-i386.c (reloc): Support size relocation only for ELF.
727 (tc_i386_fix_adjustable): Likewise.
728 (lex_got): Likewise.
729 (tc_gen_reloc): Likewise.
730
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7312013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
732
733 * config/tc-aarch64.c (output_operand_error_record): Change to output
734 the out-of-range error message as value-expected message if there is
735 only one single value in the expected range.
736 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
737 LSL #0 as a programmer-friendly feature.
738
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7392013-01-16 H.J. Lu <hongjiu.lu@intel.com>
740
741 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
742 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
743 BFD_RELOC_64_SIZE relocations.
744 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
745 for it.
746 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
747 relocations against local symbols.
748
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7492013-01-16 Alan Modra <amodra@gmail.com>
750
751 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
752 finding some sort of toc syntax error, and break to avoid
753 compiler uninit warning.
754
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7552013-01-15 H.J. Lu <hongjiu.lu@intel.com>
756
757 PR gas/15019
758 * config/tc-i386.c (lex_got): Increment length by 1 if the
759 relocation token is removed.
760
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7612013-01-15 Nick Clifton <nickc@redhat.com>
762
763 * config/tc-v850.c (md_assemble): Allow signed values for
764 V850E_IMMEDIATE.
765
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SK
7662013-01-11 Sean Keys <skeys@ipdatasys.com>
767
768 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 769 git to cvs.
464e3686 770
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7712013-01-10 Peter Bergner <bergner@vnet.ibm.com>
772
773 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
774 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
775 * config/tc-ppc.c (md_show_usage): Likewise.
776 (ppc_handle_align): Handle power8's group ending nop.
777
f4b1f6a9
SK
7782013-01-10 Sean Keys <skeys@ipdatasys.com>
779
780 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 781 that the assember exits after the opcodes have been printed.
f4b1f6a9 782
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7832013-01-10 H.J. Lu <hongjiu.lu@intel.com>
784
785 * app.c: Remove trailing white spaces.
786 * as.c: Likewise.
787 * as.h: Likewise.
788 * cond.c: Likewise.
789 * dw2gencfi.c: Likewise.
790 * dwarf2dbg.h: Likewise.
791 * ecoff.c: Likewise.
792 * input-file.c: Likewise.
793 * itbl-lex.h: Likewise.
794 * output-file.c: Likewise.
795 * read.c: Likewise.
796 * sb.c: Likewise.
797 * subsegs.c: Likewise.
798 * symbols.c: Likewise.
799 * write.c: Likewise.
800 * config/tc-i386.c: Likewise.
801 * doc/Makefile.am: Likewise.
802 * doc/Makefile.in: Likewise.
803 * doc/c-aarch64.texi: Likewise.
804 * doc/c-alpha.texi: Likewise.
805 * doc/c-arc.texi: Likewise.
806 * doc/c-arm.texi: Likewise.
807 * doc/c-avr.texi: Likewise.
808 * doc/c-bfin.texi: Likewise.
809 * doc/c-cr16.texi: Likewise.
810 * doc/c-d10v.texi: Likewise.
811 * doc/c-d30v.texi: Likewise.
812 * doc/c-h8300.texi: Likewise.
813 * doc/c-hppa.texi: Likewise.
814 * doc/c-i370.texi: Likewise.
815 * doc/c-i386.texi: Likewise.
816 * doc/c-i860.texi: Likewise.
817 * doc/c-m32c.texi: Likewise.
818 * doc/c-m32r.texi: Likewise.
819 * doc/c-m68hc11.texi: Likewise.
820 * doc/c-m68k.texi: Likewise.
821 * doc/c-microblaze.texi: Likewise.
822 * doc/c-mips.texi: Likewise.
823 * doc/c-msp430.texi: Likewise.
824 * doc/c-mt.texi: Likewise.
825 * doc/c-s390.texi: Likewise.
826 * doc/c-score.texi: Likewise.
827 * doc/c-sh.texi: Likewise.
828 * doc/c-sh64.texi: Likewise.
829 * doc/c-tic54x.texi: Likewise.
830 * doc/c-tic6x.texi: Likewise.
831 * doc/c-v850.texi: Likewise.
832 * doc/c-xc16x.texi: Likewise.
833 * doc/c-xgate.texi: Likewise.
834 * doc/c-xtensa.texi: Likewise.
835 * doc/c-z80.texi: Likewise.
836 * doc/internals.texi: Likewise.
837
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8382013-01-10 Roland McGrath <mcgrathr@google.com>
839
840 * hash.c (hash_new_sized): Make it global.
841 * hash.h: Declare it.
842 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
843 pass a small size.
844
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8452013-01-10 Will Newton <will.newton@imgtec.com>
846
847 * Makefile.am: Add Meta.
848 * Makefile.in: Regenerate.
849 * config/tc-metag.c: New file.
850 * config/tc-metag.h: New file.
851 * configure.tgt: Add Meta.
852 * doc/Makefile.am: Add Meta.
853 * doc/Makefile.in: Regenerate.
854 * doc/all.texi: Add Meta.
855 * doc/as.texiinfo: Document Meta options.
856 * doc/c-metag.texi: New file.
857
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SE
8582013-01-09 Steve Ellcey <sellcey@mips.com>
859
860 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
861 calls.
862 * config/tc-mips.c (internalError): Remove, replace with abort.
863
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8642013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
865
866 * config/tc-aarch64.c (parse_operands): Change to compare the result
867 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
868
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8692013-01-07 Nick Clifton <nickc@redhat.com>
870
871 PR gas/14887
872 * config/tc-arm.c (skip_past_char): Skip whitespace before the
873 anticipated character.
874 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
875 here as it is no longer needed.
876
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8772013-01-06 Andreas Schwab <schwab@linux-m68k.org>
878
879 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
880 * doc/c-score.texi (SCORE-Opts): Likewise.
881 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
882
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8832013-01-04 Juergen Urban <JuergenUrban@gmx.de>
884
885 * config/tc-mips.c: Add support for MIPS r5900.
886 Add M_LQ_AB and M_SQ_AB to support large values for instructions
887 lq and sq.
888 (can_swap_branch_p, get_append_method): Detect some conditional
889 short loops to fix a bug on the r5900 by NOP in the branch delay
890 slot.
891 (M_MUL): Support 3 operands in multu on r5900.
892 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
893 (s_mipsset): Force 32 bit floating point on r5900.
894 (mips_ip): Check parameter range of instructions mfps and mtps on
895 r5900.
896 * configure.in: Detect CPU type when target string contains r5900
897 (e.g. mips64r5900el-linux-gnu).
898
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8992013-01-02 H.J. Lu <hongjiu.lu@intel.com>
900
901 * as.c (parse_args): Update copyright year to 2013.
902
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9032013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
904
905 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
906 and "cortex57".
907
517bb291 9082013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 909
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910 PR gas/14987
911 * config/tc-arm.c (parse_address_main): Skip whitespace before a
912 closing bracket.
d709e4e6 913
517bb291 914For older changes see ChangeLog-2012
08d56133 915\f
517bb291 916Copyright (C) 2013 Free Software Foundation, Inc.
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917
918Copying and distribution of this file, with or without modification,
919are permitted in any medium without royalty provided the copyright
920notice and this notice are preserved.
921
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922Local Variables:
923mode: change-log
924left-margin: 8
925fill-column: 74
926version-control: never
927End: