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13896403
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12013-08-05 John Tytgat <john@bass-software.com>
2
3 * po/POTFILES.in: Regenerate.
4
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52013-08-05 Eric Botcazou <ebotcazou@adacore.com>
6 Konrad Eisele <konrad@gaisler.com>
7
8 * config/tc-sparc.c (sparc_arch_types): Add leon.
9 (sparc_arch): Move sparc4 around and add leon.
10 (sparc_target_format): Document -Aleon.
11 * doc/c-sparc.texi: Likewise.
12
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132013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
14
15 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
16
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172013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
18 Richard Sandiford <rdsandiford@googlemail.com>
19
20 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
21 (RWARN): Bump to 0x8000000.
22 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
23 (RTYPE_R5900_ACC): New register types.
24 (RTYPE_MASK): Include them.
25 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
26 macros.
27 (reg_names): Include them.
28 (mips_parse_register_1): New function, split out from...
29 (mips_parse_register): ...here. Add a channels_ptr parameter.
30 Look for VU0 channel suffixes when nonnull.
31 (reg_lookup): Update the call to mips_parse_register.
32 (mips_parse_vu0_channels): New function.
33 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
34 (mips_operand_token): Add a "channels" field to the union.
35 Extend the comment above "ch" to OT_DOUBLE_CHAR.
36 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
37 (mips_parse_argument_token): Handle channel suffixes here too.
38 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
39 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
40 Handle '#' formats.
41 (md_begin): Register $vfN and $vfI registers.
42 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
43 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
44 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
45 (match_vu0_suffix_operand): New function.
46 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
47 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
48 (mips_lookup_insn): New function.
49 (mips_ip): Use it. Allow "+K" operands to be elided at the end
50 of an instruction. Handle '#' sequences.
51
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522013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
55 values and use it instead of sreg, treg, xreg, etc.
56
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572013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
60 and mips_int_operand_max.
61 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
62 Delete.
63 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
64 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
65 instead of mips16_immed_operand.
66
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672013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
68
69 * config/tc-mips.c (mips16_macro): Don't use move_register.
70 (mips16_ip): Allow macros to use 'p'.
71
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722013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c (MAX_OPERANDS): New macro.
75 (mips_operand_array): New structure.
76 (mips_operands, mips16_operands, micromips_operands): New arrays.
77 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
78 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
79 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
80 (micromips_to_32_reg_q_map): Delete.
81 (insn_operands, insn_opno, insn_extract_operand): New functions.
82 (validate_mips_insn): Take a mips_operand_array as argument and
83 use it to build up a list of operands. Extend to handle INSN_MACRO
84 and MIPS16.
85 (validate_mips16_insn): New function.
86 (validate_micromips_insn): Take a mips_operand_array as argument.
87 Handle INSN_MACRO.
88 (md_begin): Initialize mips_operands, mips16_operands and
89 micromips_operands. Call validate_mips_insn and
90 validate_micromips_insn for macro instructions too.
91 Call validate_mips16_insn for MIPS16 instructions.
92 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
93 New functions.
94 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
95 them. Handle INSN_UDI.
96 (get_append_method): Use gpr_read_mask.
97
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982013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
99
100 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
101 flags for MIPS16 and non-MIPS16 instructions.
102 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
103 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
104 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
105 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
106 and non-MIPS16 instructions. Fix formatting.
107
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1082013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
109
110 * config/tc-mips.c (reg_needs_delay): Move later in file.
111 Use gpr_write_mask.
112 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
113
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1142013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
115 Alexander Ivchenko <alexander.ivchenko@intel.com>
116 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
117 Sergey Lega <sergey.s.lega@intel.com>
118 Anna Tikhonova <anna.tikhonova@intel.com>
119 Ilya Tocar <ilya.tocar@intel.com>
120 Andrey Turetskiy <andrey.turetskiy@intel.com>
121 Ilya Verbin <ilya.verbin@intel.com>
122 Kirill Yukhin <kirill.yukhin@intel.com>
123 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
124
125 * config/tc-i386-intel.c (O_zmmword_ptr): New.
126 (i386_types): Add zmmword.
127 (i386_intel_simplify_register): Allow regzmm.
128 (i386_intel_simplify): Handle zmmwords.
129 (i386_intel_operand): Handle RC/SAE, vector operations and
130 zmmwords.
131 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
132 (struct RC_Operation): New.
133 (struct Mask_Operation): New.
134 (struct Broadcast_Operation): New.
135 (vex_prefix): Size of bytes increased to 4 to support EVEX
136 encoding.
137 (enum i386_error): Add new error codes: unsupported_broadcast,
138 broadcast_not_on_src_operand, broadcast_needed,
139 unsupported_masking, mask_not_on_destination, no_default_mask,
140 unsupported_rc_sae, rc_sae_operand_not_last_imm,
141 invalid_register_operand, try_vector_disp8.
142 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
143 rounding, broadcast, memshift.
144 (struct RC_name): New.
145 (RC_NamesTable): New.
146 (evexlig): New.
147 (evexwig): New.
148 (extra_symbol_chars): Add '{'.
149 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
150 (i386_operand_type): Add regzmm, regmask and vec_disp8.
151 (match_mem_size): Handle zmmwords.
152 (operand_type_match): Handle zmm-registers.
153 (mode_from_disp_size): Handle vec_disp8.
154 (fits_in_vec_disp8): New.
155 (md_begin): Handle {} properly.
156 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
157 (build_vex_prefix): Handle vrex.
158 (build_evex_prefix): New.
159 (process_immext): Adjust to properly handle EVEX.
160 (md_assemble): Add EVEX encoding support.
161 (swap_2_operands): Correctly handle operands with masking,
162 broadcasting or RC/SAE.
163 (check_VecOperands): Support EVEX features.
164 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
165 (match_template): Support regzmm and handle new error codes.
166 (process_suffix): Handle zmmwords and zmm-registers.
167 (check_byte_reg): Extend to zmm-registers.
168 (process_operands): Extend to zmm-registers.
169 (build_modrm_byte): Handle EVEX.
170 (output_insn): Adjust to properly handle EVEX case.
171 (disp_size): Handle vec_disp8.
172 (output_disp): Support compressed disp8*N evex feature.
173 (output_imm): Handle RC/SAE immediates properly.
174 (check_VecOperations): New.
175 (i386_immediate): Handle EVEX features.
176 (i386_index_check): Handle zmmwords and zmm-registers.
177 (RC_SAE_immediate): New.
178 (i386_att_operand): Handle EVEX features.
179 (parse_real_register): Add a check for ZMM/Mask registers.
180 (OPTION_MEVEXLIG): New.
181 (OPTION_MEVEXWIG): New.
182 (md_longopts): Add mevexlig and mevexwig.
183 (md_parse_option): Handle mevexlig and mevexwig options.
184 (md_show_usage): Add description for mevexlig and mevexwig.
185 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
186 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
187
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1882013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
189
190 * config/tc-i386.c (cpu_arch): Add .sha.
191 * doc/c-i386.texi: Document sha/.sha.
192
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1932013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
194 Kirill Yukhin <kirill.yukhin@intel.com>
195 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
196
197 * config/tc-i386.c (BND_PREFIX): New.
198 (struct _i386_insn): Add new field bnd_prefix.
199 (add_bnd_prefix): New.
200 (cpu_arch): Add MPX.
201 (i386_operand_type): Add regbnd.
202 (md_assemble): Handle BND prefixes.
203 (parse_insn): Likewise.
204 (output_branch): Likewise.
205 (output_jump): Likewise.
206 (build_modrm_byte): Handle regbnd.
207 (OPTION_MADD_BND_PREFIX): New.
208 (md_longopts): Add entry for 'madd-bnd-prefix'.
209 (md_parse_option): Handle madd-bnd-prefix option.
210 (md_show_usage): Add description for madd-bnd-prefix
211 option.
212 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
213
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2142013-07-24 Tristan Gingold <gingold@adacore.com>
215
216 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
217 xcoff targets.
218
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2192013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
220
221 * config/tc-s390.c (s390_machine): Don't force the .machine
222 argument to lower case.
223
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2242013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
225
226 * config/tc-arm.c (s_arm_arch_extension): Improve error message
227 for invalid extension.
228
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2292013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
230
231 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
232 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
233 (aarch64_abi): New variable.
234 (ilp32_p): Change to be a macro.
235 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
236 (struct aarch64_option_abi_value_table): New struct.
237 (aarch64_abis): New table.
238 (aarch64_parse_abi): New function.
239 (aarch64_long_opts): Add entry for -mabi=.
240 * doc/as.texinfo (Target AArch64 options): Document -mabi.
241 * doc/c-aarch64.texi: Likewise.
242
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2432013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
244
245 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
246 unsigned comparison.
247
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2482013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
249
250 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
251 RX610.
252 * config/rx-parse.y: (rx_check_float_support): Add function to
253 check floating point operation support for target RX100 and
254 RX200.
255 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
256 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
257 RX200, RX600, and RX610
258
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2592013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
260
261 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
262
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2632013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
264
265 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
266 * doc/c-avr.texi: Likewise.
267
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2682013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
271 error with older GCCs.
272 (mips16_macro_build): Dereference args.
273
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2742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
275
276 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
277 New functions, split out from...
278 (reg_lookup): ...here. Remove itbl support.
279 (reglist_lookup): Delete.
280 (mips_operand_token_type): New enum.
281 (mips_operand_token): New structure.
282 (mips_operand_tokens): New variable.
283 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
284 (mips_parse_arguments): New functions.
285 (md_begin): Initialize mips_operand_tokens.
286 (mips_arg_info): Add a token field. Remove optional_reg field.
287 (match_char, match_expression): New functions.
288 (match_const_int): Use match_expression. Remove "s" argument
289 and return a boolean result. Remove O_register handling.
290 (match_regno, match_reg, match_reg_range): New functions.
291 (match_int_operand, match_mapped_int_operand, match_msb_operand)
292 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
293 (match_addiusp_operand, match_clo_clz_dest_operand)
294 (match_lwm_swm_list_operand, match_entry_exit_operand)
295 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
296 (match_tied_reg_operand): Remove "s" argument and return a boolean
297 result. Match tokens rather than text. Update calls to
298 match_const_int. Rely on match_regno to call check_regno.
299 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
300 "arg" argument. Return a boolean result.
301 (parse_float_constant): Replace with...
302 (match_float_constant): ...this new function.
303 (match_operand): Remove "s" argument and return a boolean result.
304 Update calls to subfunctions.
305 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
306 rather than string-parsing routines. Update handling of optional
307 registers for token scheme.
308
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3092013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
310
311 * config/tc-mips.c (parse_float_constant): Split out from...
312 (mips_ip): ...here.
313
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3142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
315
316 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
317 Delete.
318
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3192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
320
321 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
322 (match_entry_exit_operand): New function.
323 (match_save_restore_list_operand): Likewise.
324 (match_operand): Use them.
325 (check_absolute_expr): Delete.
326 (mips16_ip): Rewrite main parsing loop to use mips_operands.
327
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3282013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
329
330 * config/tc-mips.c: Enable functions commented out in previous patch.
331 (SKIP_SPACE_TABS): Move further up file.
332 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
333 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
334 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
335 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
336 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
337 (micromips_imm_b_map, micromips_imm_c_map): Delete.
338 (mips_lookup_reg_pair): Delete.
339 (macro): Use report_bad_range and report_bad_field.
340 (mips_immed, expr_const_in_range): Delete.
341 (mips_ip): Rewrite main parsing loop to use new functions.
342
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3432013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
344
345 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
346 Change return type to bfd_boolean.
347 (report_bad_range, report_bad_field): New functions.
348 (mips_arg_info): New structure.
349 (match_const_int, convert_reg_type, check_regno, match_int_operand)
350 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
351 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
352 (match_addiusp_operand, match_clo_clz_dest_operand)
353 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
354 (match_pc_operand, match_tied_reg_operand, match_operand)
355 (check_completed_insn): New functions, commented out for now.
356
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3572013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
358
359 * config/tc-mips.c (insn_insert_operand): New function.
360 (macro_build, mips16_macro_build): Put null character check
361 in the for loop and convert continues to breaks. Use operand
362 structures to handle constant operands.
363
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3642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
365
366 * config/tc-mips.c (validate_mips_insn): Move further up file.
367 Add insn_bits and decode_operand arguments. Use the mips_operand
368 fields to work out which bits an operand occupies. Detect double
369 definitions.
370 (validate_micromips_insn): Move further up file. Call into
371 validate_mips_insn.
372
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3732013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
374
375 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
376
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3772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
378
379 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
380 and "~".
381 (macro): Update accordingly.
382
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3832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
384
385 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
386 (imm_reloc): Delete.
387 (md_assemble): Remove imm_reloc handling.
388 (mips_ip): Update commentary. Use offset_expr and offset_reloc
389 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
390 Use a temporary array rather than imm_reloc when parsing
391 constant expressions. Remove imm_reloc initialization.
392 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
393 for the relaxable field. Use a relax_char variable to track the
394 type of this field. Remove imm_reloc initialization.
395
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3962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
397
398 * config/tc-mips.c (mips16_ip): Handle "I".
399
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4002013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
401
402 * config/tc-mips.c (mips_flag_nan2008): New variable.
403 (options): Add OPTION_NAN enum value.
404 (md_longopts): Handle it.
405 (md_parse_option): Likewise.
406 (s_nan): New function.
407 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
408 (md_show_usage): Add -mnan.
409
410 * doc/as.texinfo (Overview): Add -mnan.
411 * doc/c-mips.texi (MIPS Opts): Document -mnan.
412 (MIPS NaN Encodings): New node. Document .nan directive.
413 (MIPS-Dependent): List the new node.
414
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4152013-07-09 Tristan Gingold <gingold@adacore.com>
416
417 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
418
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4192013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
420
421 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
422 for 'A' and assume that the constant has been elided if the result
423 is an O_register.
424
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4252013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
426
427 * config/tc-mips.c (gprel16_reloc_p): New function.
428 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
429 BFD_RELOC_UNUSED.
430 (offset_high_part, small_offset_p): New functions.
431 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
432 register load and store macros, handle the 16-bit offset case first.
433 If a 16-bit offset is not suitable for the instruction we're
434 generating, load it into the temporary register using
435 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
436 M_L_DAB code once the address has been constructed. For double load
437 and store macros, again handle the 16-bit offset case first.
438 If the second register cannot be accessed from the same high
439 part as the first, load it into AT using ADDRESS_ADDI_INSN.
440 Fix the handling of LD in cases where the first register is the
441 same as the base. Also handle the case where the offset is
442 not 16 bits and the second register cannot be accessed from the
443 same high part as the first. For unaligned loads and stores,
444 fuse the offbits == 12 and old "ab" handling. Apply this handling
445 whenever the second offset needs a different high part from the first.
446 Construct the offset using ADDRESS_ADDI_INSN where possible,
447 for offbits == 16 as well as offbits == 12. Use offset_reloc
448 when constructing the individual loads and stores.
449 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
450 and offset_reloc before matching against a particular opcode.
451 Handle elided 'A' constants. Allow 'A' constants to use
452 relocation operators.
453
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4542013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
455
456 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
457 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
458 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
459
23e69e47
RS
4602013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
461
462 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
463 Require the msb to be <= 31 for "+s". Check that the size is <= 31
464 for both "+s" and "+S".
465
27c5c572
RS
4662013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
467
468 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
469 (mips_ip, mips16_ip): Handle "+i".
470
e76ff5ab
RS
4712013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
472
473 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
474 (micromips_to_32_reg_h_map): Rename to...
475 (micromips_to_32_reg_h_map1): ...this.
476 (micromips_to_32_reg_i_map): Rename to...
477 (micromips_to_32_reg_h_map2): ...this.
478 (mips_lookup_reg_pair): New function.
479 (gpr_write_mask, macro): Adjust after above renaming.
480 (validate_micromips_insn): Remove "mi" handling.
481 (mips_ip): Likewise. Parse both registers in a pair for "mh".
482
fa7616a4
RS
4832013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
484
485 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
486 (mips_ip): Remove "+D" and "+T" handling.
487
fb798c50
AK
4882013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
489
490 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
491 relocs.
492
2c0a3565
MS
4932013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
494
4aa2c5e2
MS
495 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
496
4972013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
498
2c0a3565
MS
499 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
500 (aarch64_force_relocation): Likewise.
501
f40da81b
AM
5022013-07-02 Alan Modra <amodra@gmail.com>
503
504 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
505
81566a9b
MR
5062013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
507
508 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
509 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
510 Replace @sc{mips16} with literal `MIPS16'.
511 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
512
a6bb11b2
YZ
5132013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
514
515 * config/tc-aarch64.c (reloc_table): Replace
516 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
517 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
518 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
519 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
520 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
521 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
522 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
523 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
524 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
525 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
526 (aarch64_force_relocation): Likewise.
527
cec5225b
YZ
5282013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
529
530 * config/tc-aarch64.c (ilp32_p): New static variable.
531 (elf64_aarch64_target_format): Return the target according to the
532 value of 'ilp32_p'.
533 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
534 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
535 (aarch64_dwarf2_addr_size): New function.
536 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
537 (DWARF2_ADDR_SIZE): New define.
538
e335d9cb
RS
5392013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
540
541 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
542
18870af7
RS
5432013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
544
545 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
546
833794fc
MR
5472013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
548
549 * config/tc-mips.c (mips_set_options): Add insn32 member.
550 (mips_opts): Initialize it.
551 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
552 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
553 (md_longopts): Add "minsn32" and "mno-insn32" options.
554 (is_size_valid): Handle insn32 mode.
555 (md_assemble): Pass instruction string down to macro.
556 (brk_fmt): Add second dimension and insn32 mode initializers.
557 (mfhl_fmt): Likewise.
558 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
559 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
560 (macro_build_jalr, move_register): Handle insn32 mode.
561 (macro_build_branch_rs): Likewise.
562 (macro): Handle insn32 mode.
563 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
564 (mips_ip): Handle insn32 mode.
565 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
566 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
567 (mips_handle_align): Handle insn32 mode.
568 (md_show_usage): Add -minsn32 and -mno-insn32.
569
570 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
571 -mno-insn32 options.
572 (-minsn32, -mno-insn32): New options.
573 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
574 options.
575 (MIPS assembly options): New node. Document .set insn32 and
576 .set noinsn32.
577 (MIPS-Dependent): List the new node.
578
d1706f38
NC
5792013-06-25 Nick Clifton <nickc@redhat.com>
580
581 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
582 the PC in indirect addressing on 430xv2 parts.
583 (msp430_operands): Add version test to hardware bug encoding
584 restrictions.
585
477330fc
RM
5862013-06-24 Roland McGrath <mcgrathr@google.com>
587
d996d970
RM
588 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
589 so it skips whitespace before it.
590 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
591
477330fc
RM
592 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
593 (arm_reg_parse_multi): Skip whitespace first.
594 (parse_reg_list): Likewise.
595 (parse_vfp_reg_list): Likewise.
596 (s_arm_unwind_save_mmxwcg): Likewise.
597
24382199
NC
5982013-06-24 Nick Clifton <nickc@redhat.com>
599
600 PR gas/15623
601 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
602
c3678916
RS
6032013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
604
605 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
606
42429eac
RS
6072013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
608
609 * config/tc-mips.c: Assert that offsetT and valueT are at least
610 8 bytes in size.
611 (GPR_SMIN, GPR_SMAX): New macros.
612 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
613
f3ded42a
RS
6142013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
617 conditions. Remove any code deselected by them.
618 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
619
e8044f35
RS
6202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
621
622 * NEWS: Note removal of ECOFF support.
623 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
624 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
625 (MULTI_CFILES): Remove config/e-mipsecoff.c.
626 * Makefile.in: Regenerate.
627 * configure.in: Remove MIPS ECOFF references.
628 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
629 Delete cases.
630 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
631 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
632 (mips-*-*): ...this single case.
633 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
634 MIPS emulations to be e-mipself*.
635 * configure: Regenerate.
636 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
637 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
638 (mips-*-sysv*): Remove coff and ecoff cases.
639 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
640 * ecoff.c: Remove reference to MIPS ECOFF.
641 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
642 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
643 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
644 (mips_hi_fixup): Tweak comment.
645 (append_insn): Require a howto.
646 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
647
98508b2a
RS
6482013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
649
650 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
651 Use "CPU" instead of "cpu".
652 * doc/c-mips.texi: Likewise.
653 (MIPS Opts): Rename to MIPS Options.
654 (MIPS option stack): Rename to MIPS Option Stack.
655 (MIPS ASE instruction generation overrides): Rename to
656 MIPS ASE Instruction Generation Overrides (for now).
657 (MIPS floating-point): Rename to MIPS Floating-Point.
658
fc16f8cc
RS
6592013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
660
661 * doc/c-mips.texi (MIPS Macros): New section.
662 (MIPS Object): Replace with...
663 (MIPS Small Data): ...this new section.
664
5a7560b5
RS
6652013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
666
667 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
668 Capitalize name. Use @kindex instead of @cindex for .set entries.
669
a1b86ab7
RS
6702013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
671
672 * doc/c-mips.texi (MIPS Stabs): Remove section.
673
c6278170
RS
6742013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
675
676 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
677 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
678 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
679 (ISA_SUPPORTS_VIRT64_ASE): Delete.
680 (mips_ase): New structure.
681 (mips_ases): New table.
682 (FP64_ASES): New macro.
683 (mips_ase_groups): New array.
684 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
685 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
686 functions.
687 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
688 (md_parse_option): Use mips_ases and mips_set_ase instead of
689 separate case statements for each ASE option.
690 (mips_after_parse_args): Use FP64_ASES. Use
691 mips_check_isa_supports_ases to check the ASEs against
692 other options.
693 (s_mipsset): Use mips_ases and mips_set_ase instead of
694 separate if statements for each ASE option. Use
695 mips_check_isa_supports_ases, even when a non-ASE option
696 is specified.
697
63a4bc21
KT
6982013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
699
700 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
701
c31f3936
RS
7022013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
703
704 * config/tc-mips.c (md_shortopts, options, md_longopts)
705 (md_longopts_size): Move earlier in file.
706
846ef2d0
RS
7072013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
708
709 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
710 with a single "ase" bitmask.
711 (mips_opts): Update accordingly.
712 (file_ase, file_ase_explicit): New variables.
713 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
714 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
715 (ISA_HAS_ROR): Adjust for mips_set_options change.
716 (is_opcode_valid): Take the base ase mask directly from mips_opts.
717 (mips_ip): Adjust for mips_set_options change.
718 (md_parse_option): Likewise. Update file_ase_explicit.
719 (mips_after_parse_args): Adjust for mips_set_options change.
720 Use bitmask operations to select the default ASEs. Set file_ase
721 rather than individual per-ASE variables.
722 (s_mipsset): Adjust for mips_set_options change.
723 (mips_elf_final_processing): Test file_ase rather than
724 file_ase_mdmx. Remove commented-out code.
725
d16afab6
RS
7262013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
727
728 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
729 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
730 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
731 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
732 (mips_after_parse_args): Use the new "ase" field to choose
733 the default ASEs.
734 (mips_cpu_info_table): Move ASEs from the "flags" field to the
735 "ase" field.
736
e83a675f
RE
7372013-06-18 Richard Earnshaw <rearnsha@arm.com>
738
739 * config/tc-arm.c (symbol_preemptible): New function.
740 (relax_branch): Use it.
741
7f3c4072
CM
7422013-06-17 Catherine Moore <clm@codesourcery.com>
743 Maciej W. Rozycki <macro@codesourcery.com>
744 Chao-Ying Fu <fu@mips.com>
745
746 * config/tc-mips.c (mips_set_options): Add ase_eva.
747 (mips_set_options mips_opts): Add ase_eva.
748 (file_ase_eva): Declare.
749 (ISA_SUPPORTS_EVA_ASE): Define.
750 (IS_SEXT_9BIT_NUM): Define.
751 (MIPS_CPU_ASE_EVA): Define.
752 (is_opcode_valid): Add support for ase_eva.
753 (macro_build): Likewise.
754 (macro): Likewise.
755 (validate_mips_insn): Likewise.
756 (validate_micromips_insn): Likewise.
757 (mips_ip): Likewise.
758 (options): Add OPTION_EVA and OPTION_NO_EVA.
759 (md_longopts): Add -meva and -mno-eva.
760 (md_parse_option): Process new options.
761 (mips_after_parse_args): Check for valid EVA combinations.
762 (s_mipsset): Likewise.
763
e410add4
RS
7642013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
765
766 * dwarf2dbg.h (dwarf2_move_insn): Declare.
767 * dwarf2dbg.c (line_subseg): Add pmove_tail.
768 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
769 (dwarf2_gen_line_info_1): Update call accordingly.
770 (dwarf2_move_insn): New function.
771 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
772
6a50d470
RS
7732013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
774
775 Revert:
776
777 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
778
779 PR gas/13024
780 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
781 (dwarf2_gen_line_info_1): Delete.
782 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
783 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
784 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
785 (dwarf2_directive_loc): Push previous .locs instead of generating
786 them immediately.
787
f122319e
CF
7882013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
789
790 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
791 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
792
909c7f9c
NC
7932013-06-13 Nick Clifton <nickc@redhat.com>
794
795 PR gas/15602
796 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
797 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
798 function. Generates an error if the adjusted offset is out of a
799 16-bit range.
800
5d5755a7
SL
8012013-06-12 Sandra Loosemore <sandra@codesourcery.com>
802
803 * config/tc-nios2.c (md_apply_fix): Mask constant
804 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
805
3bf0dbfb
MR
8062013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
807
808 * config/tc-mips.c (append_insn): Don't do branch relaxation for
809 MIPS-3D instructions either.
810 (md_convert_frag): Update the COPx branch mask accordingly.
811
812 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
813 option.
814 * doc/as.texinfo (Overview): Add --relax-branch and
815 --no-relax-branch.
816 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
817 --no-relax-branch.
818
9daf7bab
SL
8192013-06-09 Sandra Loosemore <sandra@codesourcery.com>
820
821 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
822 omitted.
823
d301a56b
RS
8242013-06-08 Catherine Moore <clm@codesourcery.com>
825
826 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
827 (is_opcode_valid_16): Pass ase value to opcode_is_member.
828 (append_insn): Change INSN_xxxx to ASE_xxxx.
829
7bab7634
DC
8302013-06-01 George Thomas <george.thomas@atmel.com>
831
832 * gas/config/tc-avr.c: Change ISA for devices with USB support to
833 AVR_ISA_XMEGAU
834
f60cf82f
L
8352013-05-31 H.J. Lu <hongjiu.lu@intel.com>
836
837 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
838 for ELF.
839
a3f278e2
CM
8402013-05-31 Paul Brook <paul@codesourcery.com>
841
842 gas/
843 * config/tc-mips.c (s_ehword): New.
844
067ec077
CM
8452013-05-30 Paul Brook <paul@codesourcery.com>
846
847 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
848
d6101ac2
MR
8492013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
850
851 * write.c (resolve_reloc_expr_symbols): On REL targets don't
852 convert relocs who have no relocatable field either. Rephrase
853 the conditional so that the PC-relative check is only applied
854 for REL targets.
855
f19ccbda
MR
8562013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
857
858 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
859 calculation.
860
418009c2
YZ
8612013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
862
863 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 864 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
865 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
866 (md_apply_fix): Likewise.
867 (aarch64_force_relocation): Likewise.
868
0a8897c7
KT
8692013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
870
871 * config/tc-arm.c (it_fsm_post_encode): Improve
872 warning messages about deprecated IT block formats.
873
89d2a2a3
MS
8742013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
875
876 * config/tc-aarch64.c (md_apply_fix): Move value range checking
877 inside fx_done condition.
878
c77c0862
RS
8792013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
880
881 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
882
c0637f3a
PB
8832013-05-20 Peter Bergner <bergner@vnet.ibm.com>
884
885 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
886 and clean up warning when using PRINT_OPCODE_TABLE.
887
5656a981
AM
8882013-05-20 Alan Modra <amodra@gmail.com>
889
890 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
891 and data fixups performing shift/high adjust/sign extension on
892 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
893 when writing data fixups rather than recalculating size.
894
997b26e8
JBG
8952013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
896
897 * doc/c-msp430.texi: Fix typo.
898
9f6e76f4
TG
8992013-05-16 Tristan Gingold <gingold@adacore.com>
900
901 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
902 are also TOC symbols.
903
638d3803
NC
9042013-05-16 Nick Clifton <nickc@redhat.com>
905
906 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
907 Add -mcpu command to specify core type.
997b26e8 908 * doc/c-msp430.texi: Update documentation.
638d3803 909
b015e599
AP
9102013-05-09 Andrew Pinski <apinski@cavium.com>
911
912 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
913 (mips_opts): Update for the new field.
914 (file_ase_virt): New variable.
915 (ISA_SUPPORTS_VIRT_ASE): New macro.
916 (ISA_SUPPORTS_VIRT64_ASE): New macro.
917 (MIPS_CPU_ASE_VIRT): New define.
918 (is_opcode_valid): Handle ase_virt.
919 (macro_build): Handle "+J".
920 (validate_mips_insn): Likewise.
921 (mips_ip): Likewise.
922 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
923 (md_longopts): Add mvirt and mnovirt
924 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
925 (mips_after_parse_args): Handle ase_virt field.
926 (s_mipsset): Handle "virt" and "novirt".
927 (mips_elf_final_processing): Add a comment about virt ASE might need
928 a new flag.
929 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
930 * doc/c-mips.texi: Document -mvirt and -mno-virt.
931 Document ".set virt" and ".set novirt".
932
da8094d7
AM
9332013-05-09 Alan Modra <amodra@gmail.com>
934
935 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
936 control of operand flag bits.
937
c5f8c205
AM
9382013-05-07 Alan Modra <amodra@gmail.com>
939
940 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
941 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
942 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
943 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
944 (md_apply_fix): Set fx_no_overflow for assorted relocations.
945 Shift and sign-extend fieldval for use by some VLE reloc
946 operand->insert functions.
947
b47468a6
CM
9482013-05-06 Paul Brook <paul@codesourcery.com>
949 Catherine Moore <clm@codesourcery.com>
950
c5f8c205
AM
951 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
952 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
953 (md_apply_fix): Likewise.
954 (tc_gen_reloc): Likewise.
955
2de39019
CM
9562013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
957
958 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
959 (mips_fix_adjustable): Adjust pc-relative check to use
960 limited_pc_reloc_p.
961
754e2bb9
RS
9622013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
963
964 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
965 (s_mips_stab): Do not restrict to stabn only.
966
13761a11
NC
9672013-05-02 Nick Clifton <nickc@redhat.com>
968
969 * config/tc-msp430.c: Add support for the MSP430X architecture.
970 Add code to insert a NOP instruction after any instruction that
971 might change the interrupt state.
972 Add support for the LARGE memory model.
973 Add code to initialise the .MSP430.attributes section.
974 * config/tc-msp430.h: Add support for the MSP430X architecture.
975 * doc/c-msp430.texi: Document the new -mL and -mN command line
976 options.
977 * NEWS: Mention support for the MSP430X architecture.
978
df26367c
MR
9792013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
980
981 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
982 alpha*-*-linux*ecoff*.
983
f02d8318
CF
9842013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
985
986 * config/tc-mips.c (mips_ip): Add sizelo.
987 For "+C", "+G", and "+H", set sizelo and compare against it.
988
b40bf0a2
NC
9892013-04-29 Nick Clifton <nickc@redhat.com>
990
991 * as.c (Options): Add -gdwarf-sections.
992 (parse_args): Likewise.
993 * as.h (flag_dwarf_sections): Declare.
994 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
995 (process_entries): When -gdwarf-sections is enabled generate
996 fragmentary .debug_line sections.
997 (out_debug_line): Set the section for the .debug_line section end
998 symbol.
999 * doc/as.texinfo: Document -gdwarf-sections.
1000 * NEWS: Mention -gdwarf-sections.
1001
8eeccb77 10022013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1003
1004 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1005 according to the target parameter. Don't call s_segm since s_segm
1006 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1007 initialized yet.
1008 (md_begin): Call s_segm according to target parameter from command
1009 line.
1010
49926cd0
AM
10112013-04-25 Alan Modra <amodra@gmail.com>
1012
1013 * configure.in: Allow little-endian linux.
1014 * configure: Regenerate.
1015
e3031850
SL
10162013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1017
1018 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1019 "fstatus" control register to "eccinj".
1020
cb948fc0
KT
10212013-04-19 Kai Tietz <ktietz@redhat.com>
1022
1023 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1024
4455e9ad
JB
10252013-04-15 Julian Brown <julian@codesourcery.com>
1026
1027 * expr.c (add_to_result, subtract_from_result): Make global.
1028 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1029 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1030 subtract_from_result to handle extra bit of precision for .sleb128
1031 directive operands.
1032
956a6ba3
JB
10332013-04-10 Julian Brown <julian@codesourcery.com>
1034
1035 * read.c (convert_to_bignum): Add sign parameter. Use it
1036 instead of X_unsigned to determine sign of resulting bignum.
1037 (emit_expr): Pass extra argument to convert_to_bignum.
1038 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1039 X_extrabit to convert_to_bignum.
1040 (parse_bitfield_cons): Set X_extrabit.
1041 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1042 Initialise X_extrabit field as appropriate.
1043 (add_to_result): New.
1044 (subtract_from_result): New.
1045 (expr): Use above.
1046 * expr.h (expressionS): Add X_extrabit field.
1047
eb9f3f00
JB
10482013-04-10 Jan Beulich <jbeulich@suse.com>
1049
1050 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1051 register being PC when is_t or writeback, and use distinct
1052 diagnostic for the latter case.
1053
ccb84d65
JB
10542013-04-10 Jan Beulich <jbeulich@suse.com>
1055
1056 * gas/config/tc-arm.c (parse_operands): Re-write
1057 po_barrier_or_imm().
1058 (do_barrier): Remove bogus constraint().
1059 (do_t_barrier): Remove.
1060
4d13caa0
NC
10612013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1062
1063 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1064 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1065 ATmega2564RFR2
1066 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1067
16d02dc9
JB
10682013-04-09 Jan Beulich <jbeulich@suse.com>
1069
1070 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1071 Use local variable Rt in more places.
1072 (do_vmsr): Accept all control registers.
1073
05ac0ffb
JB
10742013-04-09 Jan Beulich <jbeulich@suse.com>
1075
1076 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1077 if there was none specified for moves between scalar and core
1078 register.
1079
2d51fb74
JB
10802013-04-09 Jan Beulich <jbeulich@suse.com>
1081
1082 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1083 NEON_ALL_LANES case.
1084
94dcf8bf
JB
10852013-04-08 Jan Beulich <jbeulich@suse.com>
1086
1087 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1088 PC-relative VSTR.
1089
1472d06f
JB
10902013-04-08 Jan Beulich <jbeulich@suse.com>
1091
1092 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1093 entry to sp_fiq.
1094
0c76cae8
AM
10952013-04-03 Alan Modra <amodra@gmail.com>
1096
1097 * doc/as.texinfo: Add support to generate man options for h8300.
1098 * doc/c-h8300.texi: Likewise.
1099
92eb40d9
RR
11002013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1101
1102 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1103 Cortex-A57.
1104
51dcdd4d
NC
11052013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1106
1107 PR binutils/15068
1108 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1109
c5d685bf
NC
11102013-03-26 Nick Clifton <nickc@redhat.com>
1111
9b978282
NC
1112 PR gas/15295
1113 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1114 start of the file each time.
1115
c5d685bf
NC
1116 PR gas/15178
1117 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1118 FreeBSD targets.
1119
9699c833
TG
11202013-03-26 Douglas B Rupp <rupp@gnat.com>
1121
1122 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1123 after fixup.
1124
4755303e
WN
11252013-03-21 Will Newton <will.newton@linaro.org>
1126
1127 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1128 pc-relative str instructions in Thumb mode.
1129
81f5558e
NC
11302013-03-21 Michael Schewe <michael.schewe@gmx.net>
1131
1132 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1133 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1134 R_H8_DISP32A16.
1135 * config/tc-h8300.h: Remove duplicated defines.
1136
71863e73
NC
11372013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1138
1139 PR gas/15282
1140 * tc-avr.c (mcu_has_3_byte_pc): New function.
1141 (tc_cfi_frame_initial_instructions): Call it to find return
1142 address size.
1143
795b8e6b
NC
11442013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1145
1146 PR gas/15095
1147 * config/tc-tic6x.c (tic6x_try_encode): Handle
1148 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1149 encode register pair numbers when required.
1150
ba86b375
WN
11512013-03-15 Will Newton <will.newton@linaro.org>
1152
1153 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1154 in vstr in Thumb mode for pre-ARMv7 cores.
1155
9e6f3811
AS
11562013-03-14 Andreas Schwab <schwab@suse.de>
1157
1158 * doc/c-arc.texi (ARC Directives): Revert last change and use
1159 @itemize instead of @table.
1160 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1161
b10bf8c5
NC
11622013-03-14 Nick Clifton <nickc@redhat.com>
1163
1164 PR gas/15273
1165 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1166 NULL message, instead just check ARM_CPU_IS_ANY directly.
1167
ba724cfc
NC
11682013-03-14 Nick Clifton <nickc@redhat.com>
1169
1170 PR gas/15212
9e6f3811 1171 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1172 for table format.
1173 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1174 to the @item directives.
1175 (ARM-Neon-Alignment): Move to correct place in the document.
1176 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1177 formatting.
1178 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1179 @smallexample.
1180
531a94fd
SL
11812013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1182
1183 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1184 case. Add default BAD_CASE to switch.
1185
dad60f8e
SL
11862013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1187
1188 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1189 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1190
dd5181d5
KT
11912013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1192
1193 * config/tc-arm.c (crc_ext_armv8): New feature set.
1194 (UNPRED_REG): New macro.
1195 (do_crc32_1): New function.
1196 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1197 do_crc32ch, do_crc32cw): Likewise.
1198 (TUEc): New macro.
1199 (insns): Add entries for crc32 mnemonics.
1200 (arm_extensions): Add entry for crc.
1201
8e723a10
CLT
12022013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1203
1204 * write.h (struct fix): Add fx_dot_frag field.
1205 (dot_frag): Declare.
1206 * write.c (dot_frag): New variable.
1207 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1208 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1209 * expr.c (expr): Save value of frag_now in dot_frag when setting
1210 dot_value.
1211 * read.c (emit_expr): Likewise. Delete comments.
1212
be05d201
L
12132013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1214
1215 * config/tc-i386.c (flag_code_names): Removed.
1216 (i386_index_check): Rewrote.
1217
62b0d0d5
YZ
12182013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1219
1220 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1221 add comment.
1222 (aarch64_double_precision_fmovable): New function.
1223 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1224 function; handle hexadecimal representation of IEEE754 encoding.
1225 (parse_operands): Update the call to parse_aarch64_imm_float.
1226
165de32a
L
12272013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1228
1229 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1230 (check_hle): Updated.
1231 (md_assemble): Likewise.
1232 (parse_insn): Likewise.
1233
d5de92cf
L
12342013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1235
1236 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1237 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1238 (parse_insn): Remove expecting_string_instruction. Set
1239 i.rep_prefix.
1240
e60bb1dd
YZ
12412013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1242
1243 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1244
aeebdd9b
YZ
12452013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1246
1247 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1248 for system registers.
1249
4107ae22
DD
12502013-02-27 DJ Delorie <dj@redhat.com>
1251
1252 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1253 (rl78_op): Handle %code().
1254 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1255 (tc_gen_reloc): Likwise; convert to a computed reloc.
1256 (md_apply_fix): Likewise.
1257
151fa98f
NC
12582013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1259
1260 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1261
70a8bc5b 12622013-02-25 Terry Guo <terry.guo@arm.com>
1263
1264 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1265 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1266 list of accepted CPUs.
1267
5c111e37
L
12682013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1269
1270 PR gas/15159
1271 * config/tc-i386.c (cpu_arch): Add ".smap".
1272
1273 * doc/c-i386.texi: Document smap.
1274
8a75745d
MR
12752013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1276
1277 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1278 mips_assembling_insn appropriately.
1279 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1280
79850f26
MR
12812013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1282
cf29fc61 1283 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1284 extraneous braces.
1285
4c261dff
NC
12862013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1287
5c111e37 1288 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1289
ea33f281
NC
12902013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1291
1292 * configure.tgt: Add nios2-*-rtems*.
1293
a1ccaec9
YZ
12942013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1295
1296 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1297 NULL.
1298
0aa27725
RS
12992013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1300
1301 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1302 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1303
da4339ed
NC
13042013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1305
1306 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1307 core.
1308
36591ba1 13092013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1310 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1311
1312 Based on patches from Altera Corporation.
1313
1314 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1315 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1316 * Makefile.in: Regenerated.
1317 * configure.tgt: Add case for nios2*-linux*.
1318 * config/obj-elf.c: Conditionally include elf/nios2.h.
1319 * config/tc-nios2.c: New file.
1320 * config/tc-nios2.h: New file.
1321 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1322 * doc/Makefile.in: Regenerated.
1323 * doc/all.texi: Set NIOSII.
1324 * doc/as.texinfo (Overview): Add Nios II options.
1325 (Machine Dependencies): Include c-nios2.texi.
1326 * doc/c-nios2.texi: New file.
1327 * NEWS: Note Altera Nios II support.
1328
94d4433a
AM
13292013-02-06 Alan Modra <amodra@gmail.com>
1330
1331 PR gas/14255
1332 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1333 Don't skip fixups with fx_subsy non-NULL.
1334 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1335 with fx_subsy non-NULL.
1336
ace9af6f
L
13372013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1338
1339 * doc/c-metag.texi: Add "@c man" markers.
1340
89d67ed9
AM
13412013-02-04 Alan Modra <amodra@gmail.com>
1342
1343 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1344 related code.
1345 (TC_ADJUST_RELOC_COUNT): Delete.
1346 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1347
89072bd6
AM
13482013-02-04 Alan Modra <amodra@gmail.com>
1349
1350 * po/POTFILES.in: Regenerate.
1351
f9b2d544
NC
13522013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1353
1354 * config/tc-metag.c: Make SWAP instruction less permissive with
1355 its operands.
1356
392ca752
DD
13572013-01-29 DJ Delorie <dj@redhat.com>
1358
1359 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1360 relocs in .word/.etc statements.
1361
427d0db6
RM
13622013-01-29 Roland McGrath <mcgrathr@google.com>
1363
1364 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1365 immediate value for 8-bit offset" error so it shows line info.
1366
4faf939a
JM
13672013-01-24 Joseph Myers <joseph@codesourcery.com>
1368
1369 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1370 for 64-bit output.
1371
78c8d46c
NC
13722013-01-24 Nick Clifton <nickc@redhat.com>
1373
1374 * config/tc-v850.c: Add support for e3v5 architecture.
1375 * doc/c-v850.texi: Mention new support.
1376
fb5b7503
NC
13772013-01-23 Nick Clifton <nickc@redhat.com>
1378
1379 PR gas/15039
1380 * config/tc-avr.c: Include dwarf2dbg.h.
1381
8ce3d284
L
13822013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1383
1384 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1385 (tc_i386_fix_adjustable): Likewise.
1386 (lex_got): Likewise.
1387 (tc_gen_reloc): Likewise.
1388
f5555712
YZ
13892013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1390
1391 * config/tc-aarch64.c (output_operand_error_record): Change to output
1392 the out-of-range error message as value-expected message if there is
1393 only one single value in the expected range.
1394 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1395 LSL #0 as a programmer-friendly feature.
1396
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13972013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1398
1399 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1400 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1401 BFD_RELOC_64_SIZE relocations.
1402 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1403 for it.
1404 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1405 relocations against local symbols.
1406
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AM
14072013-01-16 Alan Modra <amodra@gmail.com>
1408
1409 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1410 finding some sort of toc syntax error, and break to avoid
1411 compiler uninit warning.
1412
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14132013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1414
1415 PR gas/15019
1416 * config/tc-i386.c (lex_got): Increment length by 1 if the
1417 relocation token is removed.
1418
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14192013-01-15 Nick Clifton <nickc@redhat.com>
1420
1421 * config/tc-v850.c (md_assemble): Allow signed values for
1422 V850E_IMMEDIATE.
1423
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SK
14242013-01-11 Sean Keys <skeys@ipdatasys.com>
1425
1426 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1427 git to cvs.
464e3686 1428
5817ffd1
PB
14292013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1430
1431 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1432 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1433 * config/tc-ppc.c (md_show_usage): Likewise.
1434 (ppc_handle_align): Handle power8's group ending nop.
1435
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SK
14362013-01-10 Sean Keys <skeys@ipdatasys.com>
1437
1438 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1439 that the assember exits after the opcodes have been printed.
f4b1f6a9 1440
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14412013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1442
1443 * app.c: Remove trailing white spaces.
1444 * as.c: Likewise.
1445 * as.h: Likewise.
1446 * cond.c: Likewise.
1447 * dw2gencfi.c: Likewise.
1448 * dwarf2dbg.h: Likewise.
1449 * ecoff.c: Likewise.
1450 * input-file.c: Likewise.
1451 * itbl-lex.h: Likewise.
1452 * output-file.c: Likewise.
1453 * read.c: Likewise.
1454 * sb.c: Likewise.
1455 * subsegs.c: Likewise.
1456 * symbols.c: Likewise.
1457 * write.c: Likewise.
1458 * config/tc-i386.c: Likewise.
1459 * doc/Makefile.am: Likewise.
1460 * doc/Makefile.in: Likewise.
1461 * doc/c-aarch64.texi: Likewise.
1462 * doc/c-alpha.texi: Likewise.
1463 * doc/c-arc.texi: Likewise.
1464 * doc/c-arm.texi: Likewise.
1465 * doc/c-avr.texi: Likewise.
1466 * doc/c-bfin.texi: Likewise.
1467 * doc/c-cr16.texi: Likewise.
1468 * doc/c-d10v.texi: Likewise.
1469 * doc/c-d30v.texi: Likewise.
1470 * doc/c-h8300.texi: Likewise.
1471 * doc/c-hppa.texi: Likewise.
1472 * doc/c-i370.texi: Likewise.
1473 * doc/c-i386.texi: Likewise.
1474 * doc/c-i860.texi: Likewise.
1475 * doc/c-m32c.texi: Likewise.
1476 * doc/c-m32r.texi: Likewise.
1477 * doc/c-m68hc11.texi: Likewise.
1478 * doc/c-m68k.texi: Likewise.
1479 * doc/c-microblaze.texi: Likewise.
1480 * doc/c-mips.texi: Likewise.
1481 * doc/c-msp430.texi: Likewise.
1482 * doc/c-mt.texi: Likewise.
1483 * doc/c-s390.texi: Likewise.
1484 * doc/c-score.texi: Likewise.
1485 * doc/c-sh.texi: Likewise.
1486 * doc/c-sh64.texi: Likewise.
1487 * doc/c-tic54x.texi: Likewise.
1488 * doc/c-tic6x.texi: Likewise.
1489 * doc/c-v850.texi: Likewise.
1490 * doc/c-xc16x.texi: Likewise.
1491 * doc/c-xgate.texi: Likewise.
1492 * doc/c-xtensa.texi: Likewise.
1493 * doc/c-z80.texi: Likewise.
1494 * doc/internals.texi: Likewise.
1495
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RM
14962013-01-10 Roland McGrath <mcgrathr@google.com>
1497
1498 * hash.c (hash_new_sized): Make it global.
1499 * hash.h: Declare it.
1500 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1501 pass a small size.
1502
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15032013-01-10 Will Newton <will.newton@imgtec.com>
1504
1505 * Makefile.am: Add Meta.
1506 * Makefile.in: Regenerate.
1507 * config/tc-metag.c: New file.
1508 * config/tc-metag.h: New file.
1509 * configure.tgt: Add Meta.
1510 * doc/Makefile.am: Add Meta.
1511 * doc/Makefile.in: Regenerate.
1512 * doc/all.texi: Add Meta.
1513 * doc/as.texiinfo: Document Meta options.
1514 * doc/c-metag.texi: New file.
1515
b37df7c4
SE
15162013-01-09 Steve Ellcey <sellcey@mips.com>
1517
1518 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1519 calls.
1520 * config/tc-mips.c (internalError): Remove, replace with abort.
1521
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YZ
15222013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1523
1524 * config/tc-aarch64.c (parse_operands): Change to compare the result
1525 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1526
8ab8155f
NC
15272013-01-07 Nick Clifton <nickc@redhat.com>
1528
1529 PR gas/14887
1530 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1531 anticipated character.
1532 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1533 here as it is no longer needed.
1534
a4ac1c42
AS
15352013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1536
1537 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1538 * doc/c-score.texi (SCORE-Opts): Likewise.
1539 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1540
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NC
15412013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1542
1543 * config/tc-mips.c: Add support for MIPS r5900.
1544 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1545 lq and sq.
1546 (can_swap_branch_p, get_append_method): Detect some conditional
1547 short loops to fix a bug on the r5900 by NOP in the branch delay
1548 slot.
1549 (M_MUL): Support 3 operands in multu on r5900.
1550 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1551 (s_mipsset): Force 32 bit floating point on r5900.
1552 (mips_ip): Check parameter range of instructions mfps and mtps on
1553 r5900.
1554 * configure.in: Detect CPU type when target string contains r5900
1555 (e.g. mips64r5900el-linux-gnu).
1556
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15572013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1558
1559 * as.c (parse_args): Update copyright year to 2013.
1560
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15612013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1562
1563 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1564 and "cortex57".
1565
517bb291 15662013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1567
517bb291
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1568 PR gas/14987
1569 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1570 closing bracket.
d709e4e6 1571
517bb291 1572For older changes see ChangeLog-2012
08d56133 1573\f
517bb291 1574Copyright (C) 2013 Free Software Foundation, Inc.
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1575
1576Copying and distribution of this file, with or without modification,
1577are permitted in any medium without royalty provided the copyright
1578notice and this notice are preserved.
1579
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1580Local Variables:
1581mode: change-log
1582left-margin: 8
1583fill-column: 74
1584version-control: never
1585End: