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arm: Add support for Armv8.7-A and Armv8.8-A
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252b5132 1-*- text -*-
6d96a594 2
36cb9e7e
RS
3* Add support for AArch64 system registers that were missing in previous
4 releases.
5
4462d7c4 6* Add support for the LoongArch instruction set.
7
c8480b58
L
8* Add a command-line option, -muse-unaligned-vector-move, for x86 target
9 to encode aligned vector move as unaligned vector move.
10
80cfde76
PW
11* Add support for Cortex-R52+ for Arm.
12
50aaf5e6 13* Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
98ab23ab 14
14f45859
PW
15* Add support for Cortex-A710 for Arm.
16
57f02370
PW
17* Add support for Scalable Matrix Extension (SME) for AArch64.
18
578c64a4
NC
19* The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
20 assembler what to when it encoutners multibyte characters in the input. The
21 default is to allow them. Setting the option to "warn" will generate a
22 warning message whenever any multibyte character is encountered. Using the
23 option to "warn-sym-only" will make the assembler generate a warning whenever a
24 symbol is defined containing multibyte characters. (References to undefined
25 symbols will not generate warnings).
26
ff01bb6c
L
27* Outputs of .ds.x directive and .tfloat directive with hex input from
28 x86 assembler have been reduced from 12 bytes to 10 bytes to match the
29 output of .tfloat directive.
30
35180222
RS
31* Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
32 'armv9.3-a' for -march in AArch64 GAS.
d5007f02 33
b3e4d932
RS
34* Add support for 'armv8.7-a', 'armv8.8-a', and 'armv9-a' for -march
35 in Arm GAS.
3197e593 36
0cc78721
CL
37* Add support for Intel AVX512_FP16 instructions.
38
51419248
NC
39Changes in 2.37:
40
933feaf3
AM
41* arm-symbianelf support removed.
42
02202574
PW
43* Add support for Realm Management Extension (RME) for AArch64.
44
055bc77a
NC
45Changes in 2.36:
46
58bf9b6a
L
47* Add support for Intel AVX VNNI instructions.
48
c1fa250a
LC
49* Add support for Intel HRESET instruction.
50
f64c42a9
LC
51* Add support for Intel UINTR instructions.
52
6d96a594
C
53* Support non-absolute segment values for i386 lcall and ljmp.
54
b71702f1
NC
55* When setting the link order attribute of ELF sections, it is now possible to
56 use a numeric section index instead of symbol name.
42c36b73 57
a3a02fe8
PW
58* Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
59 AArch64 and ARM.
b71702f1 60 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 61
b71702f1 62* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
82c70b08
KT
63 Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
64 Extension) system registers for AArch64.
c81946ef 65
8926e54e 66* Add support for Armv8-R and Armv8.7-A AArch64.
c81946ef 67
a984d94a 68* Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
82503ca7 69 AArch64.
fd195909 70
e64441b1 71* Add support for +flagm feature for -march in Armv8.4 AArch64.
dd4a72c8 72
fd65497d
PW
73* Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
74 64-byte load/store instructions for this feature.
75
3f4ff088
PW
76* Add support for +pauth (Pointer Authentication) feature for -march in
77 AArch64.
78
81d54bb7 79* Add support for Intel TDX instructions.
96a84ea3 80
c4694f17
TG
81* Add support for Intel Key Locker instructions.
82
b1766e7c
NC
83* Added a .nop directive to generate a single no-op instruction in a target
84 neutral manner. This instruction does have an effect on DWARF line number
85 generation, if that is active.
86
a0522545
ML
87* Removed --reduce-memory-overheads and --hash-size as gas now
88 uses hash tables that can be expand and shrink automatically.
89
789198ca
L
90* Add {disp16} pseudo prefix to x86 assembler.
91
260cd341
LC
92* Add support for Intel AMX instructions.
93
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L
94* Configure with --enable-x86-used-note by default for Linux/x86.
95
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JL
96* Add support for the SHF_GNU_RETAIN flag, which can be applied to
97 sections using the 'R' flag in the .section directive.
98 SHF_GNU_RETAIN specifies that the section should not be garbage
99 collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
100
b115b9fd
NC
101Changes in 2.35:
102
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L
103* X86 NaCl target support is removed.
104
6914be53
L
105* Extend .symver directive to update visibility of the original symbol
106 and assign one original symbol to different versioned symbols.
107
6e0e8b45
L
108* Add support for Intel SERIALIZE and TSXLDTRK instructions.
109
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L
110* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
111 -mlfence-before-ret= options to x86 assembler to help mitigate
112 CVE-2020-0551.
113
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NC
114* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
115 (if such output is being generated). Added the ability to generate
116 version 5 .debug_line sections.
117
251dae91
TC
118* Add -mbig-obj support to i386 MingW targets.
119
ae774686
NC
120Changes in 2.34:
121
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L
122* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
123 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
124 options to x86 assembler to align branches within a fixed boundary
125 with segment prefixes or NOPs.
126
6655dba2
SB
127* Add support for Zilog eZ80 and Zilog Z180 CPUs.
128
129* Add support for z80-elf target.
130
131* Add support for relocation of each byte or word of multibyte value to Z80
132 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
133 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
134
135* Add SDCC support for Z80 targets.
136
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PB
137Changes in 2.33:
138
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MM
139* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
140 instructions.
141
142* Add support for the Arm Transactional Memory Extension (TME)
143 instructions.
144
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AV
145* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
146 instructions.
147
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BW
148* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
149 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
150 time option to set the default behavior. Set the default if the configure
151 option is not used to "no".
6f2117ba 152
546053ac
DZ
153* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
154 processors.
155
156* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
157 Cortex-A76AE, and Cortex-A77 processors.
158
b20d3859
BW
159* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
160 floating point literals. Add .float16_format directive and
161 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
162 encoding.
163
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AB
164* Add --gdwarf-cie-version command line flag. This allows control over which
165 version of DWARF CIE the assembler creates.
166
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NC
167Changes in 2.32:
168
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L
169* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
170 VEX.W-ignored (WIG) VEX instructions.
171
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L
172* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
173 notes. Add a --enable-x86-used-note configure time option to set the
174 default behavior. Set the default if the configure option is not used
175 to "no".
176
a693765e
CX
177* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
178
bdc6c06e
CX
179* Add support for the MIPS Loongson EXTensions (EXT) instructions.
180
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CX
181* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
182
b8891f8d
AJ
183* Add support for the C-SKY processor series.
184
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CX
185* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
186 ASE.
187
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NC
188Changes in 2.31:
189
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NC
190* The ADR and ADRL pseudo-instructions supported by the ARM assembler
191 now only set the bottom bit of the address of thumb function symbols
192 if the -mthumb-interwork command line option is active.
193
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FS
194* Add support for the MIPS Global INValidate (GINV) ASE.
195
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SE
196* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
197
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JD
198* Add support for the Freescale S12Z architecture.
199
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NC
200* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
201 Build Attribute notes if none are present in the input sources. Add a
202 --enable-generate-build-notes=[yes|no] configure time option to set the
203 default behaviour. Set the default if the configure option is not used
204 to "no".
205
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L
206* Remove -mold-gcc command-line option for x86 targets.
207
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L
208* Add -O[2|s] command-line options to x86 assembler to enable alternate
209 shorter instruction encoding.
210
8f065d3b 211* Add support for .nops directive. It is currently supported only for
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L
212 x86 targets.
213
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NC
214Changes in 2.30:
215
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AO
216* Add support for loaction views in DWARF debug line information.
217
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TG
218Changes in 2.29:
219
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L
220* Add support for ELF SHF_GNU_MBIND.
221
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PC
222* Add support for the WebAssembly file format and wasm32 ELF conversion.
223
7e0de605 224* PowerPC gas now checks that the correct register class is used in
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AM
225 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
226 that the registers are invalid.
7e0de605 227
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DD
228* Add support for the Texas Instruments PRU processor.
229
0cda1e19
TP
230* Support for the ARMv8-R architecture and Cortex-R52 processor has been
231 added to the ARM port.
ced40572 232
9703a4ef
TG
233Changes in 2.28:
234
e23eba97
NC
235* Add support for the RISC-V architecture.
236
b19ea8d2 237* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 238
96a84ea3
TG
239Changes in 2.27:
240
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L
241* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
242
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NC
243* Add --no-pad-sections to stop the assembler from padding the end of output
244 sections up to their alignment boundary.
245
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TP
246* Support for the ARMv8-M architecture has been added to the ARM port. Support
247 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
248 port.
249
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CZ
250* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
251 .extCoreRegister pseudo-ops that allow an user to define custom
252 instructions, conditional codes, auxiliary and core registers.
253
b8871f35
L
254* Add a configure option --enable-elf-stt-common to decide whether ELF
255 assembler should generate common symbols with the STT_COMMON type by
256 default. Default to no.
257
a05a5b64 258* New command-line option --elf-stt-common= for ELF targets to control
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L
259 whether to generate common symbols with the STT_COMMON type.
260
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NC
261* Add ability to set section flags and types via numeric values for ELF
262 based targets.
81c23f82 263
0cb4071e
L
264* Add a configure option --enable-x86-relax-relocations to decide whether
265 x86 assembler should generate relax relocations by default. Default to
266 yes, except for x86 Solaris targets older than Solaris 12.
267
a05a5b64 268* New command-line option -mrelax-relocations= for x86 target to control
0cb4071e
L
269 whether to generate relax relocations.
270
a05a5b64 271* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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L
272 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
273
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CZ
274* Add assembly-time relaxation option for ARC cpus.
275
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AB
276* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
277 cpu type to be adjusted at configure time.
278
7feec526
TG
279Changes in 2.26:
280
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L
281* Add a configure option --enable-compressed-debug-sections={all,gas} to
282 decide whether DWARF debug sections should be compressed by default.
e12fe555 283
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NC
284* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
285 assembler support for Argonaut RISC architectures.
286
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NC
287* Symbol and label names can now be enclosed in double quotes (") which allows
288 them to contain characters that are not part of valid symbol names in high
289 level languages.
290
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MW
291* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
292 previous spelling, -march=armv6zk, is still accepted.
293
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MW
294* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
295 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
296 extensions has also been added to the Aarch64 port.
297
a5932920
MW
298* Support for the ARMv8.1 architecture has been added to the ARM port. Support
299 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
300 been added to the ARM port.
301
ea556d25
L
302* Extend --compress-debug-sections option to support
303 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
304 targets.
305
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L
306* --compress-debug-sections is turned on for Linux/x86 by default.
307
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TG
308Changes in 2.25:
309
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BS
310* Add support for the AVR Tiny microcontrollers.
311
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CS
312* Replace support for openrisc and or32 with support for or1k.
313
2e6976a8 314* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 315 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 316
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KLC
317* Add support for the Andes NDS32.
318
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TG
319Changes in 2.24:
320
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NC
321* Add support for the Texas Instruments MSP430X processor.
322
a05a5b64 323* Add -gdwarf-sections command-line option to enable per-code-section
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NC
324 generation of DWARF .debug_line sections.
325
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SL
326* Add support for Altera Nios II.
327
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NC
328* Add support for the Imagination Technologies Meta processor.
329
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NC
330* Add support for the v850e3v5.
331
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RS
332* Remove assembler support for MIPS ECOFF targets.
333
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TG
334Changes in 2.23:
335
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NC
336* Add support for the 64-bit ARM architecture: AArch64.
337
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NC
338* Add support for S12X processor.
339
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JL
340* Add support for the VLE extension to the PowerPC architecture.
341
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NC
342* Add support for the Freescale XGATE architecture.
343
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RM
344* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
345 directives. These are currently available only for x86 and ARM targets.
346
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DD
347* Add support for the Renesas RL78 architecture.
348
cfb8c092
NC
349* Add support for the Adapteva EPIPHANY architecture.
350
fe13e45b 351* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 352
a7142d94
TG
353Changes in 2.22:
354
69f56ae1 355* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 356
90b3661c 357Changes in 2.21:
44f45767 358
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L
359* Gas no longer requires doubling of ampersands in macros.
360
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JM
361* Add support for the TMS320C6000 (TI C6X) processor family.
362
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DK
363* GAS now understands an extended syntax in the .section directive flags
364 for COFF targets that allows the section's alignment to be specified. This
365 feature has also been backported to the 2.20 release series, starting with
366 2.20.1.
367
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NC
368* Add support for the Renesas RX processor.
369
a05a5b64 370* New command-line option, --compress-debug-sections, which requests
700c4060
CC
371 compression of DWARF debug information sections in the relocatable output
372 file. Compressed debug sections are supported by readelf, objdump, and
373 gold, but not currently by Gnu ld.
374
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TG
375Changes in 2.20:
376
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NC
377* Added support for v850e2 and v850e2v3.
378
3e7a7d11
NC
379* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
380 pseudo op. It marks the symbol as being globally unique in the entire
381 process.
382
c921be7d
NC
383* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
384 in binary rather than text.
6e33da12 385
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DK
386* Add support for common symbol alignment to PE formats.
387
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CC
388* Add support for the new discriminator column in the DWARF line table,
389 with a discriminator operand for the .loc directive.
390
c3b7224a
NC
391* Add support for Sunplus score architecture.
392
d8045f23
NC
393* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
394 indicate that if the symbol is the target of a relocation, its value should
395 not be use. Instead the function should be invoked and its result used as
396 the value.
fa94de6b 397
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NC
398* Add support for Lattice Mico32 (lm32) architecture.
399
fa94de6b 400* Add support for Xilinx MicroBlaze architecture.
caa03924 401
6e33da12
TG
402Changes in 2.19:
403
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DJ
404* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
405 tables without runtime relocation.
406
a05a5b64 407* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
408 adds compatibility with H'00 style hex constants.
409
a05a5b64 410* New command-line option, -msse-check=[none|error|warning], for x86
daf50ae7
L
411 targets.
412
a05a5b64 413* New sub-option added to the assembler's -a command-line switch to
83f10cb2
NC
414 generate a listing output. The 'g' sub-option will insert into the listing
415 various information about the assembly, such as assembler version, the
a05a5b64 416 command-line options used, and a time stamp.
83f10cb2 417
a05a5b64 418* New command-line option -msse2avx for x86 target to encode SSE
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L
419 instructions with VEX prefix.
420
f1f8f695 421* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 422
a05a5b64 423* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
ae40c993
L
424 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
425 -mnaked-reg and -mold-gcc, for x86 targets.
426
38a57ae7
NC
427* Support for generating wide character strings has been added via the new
428 pseudo ops: .string16, .string32 and .string64.
429
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MM
430* Support for SSE5 has been added to the i386 port.
431
7c3d153f
NC
432Changes in 2.18:
433
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NC
434* The GAS sources are now released under the GPLv3.
435
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NC
436* Support for the National Semiconductor CR16 target has been added.
437
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AM
438* Added gas .reloc pseudo. This is a low-level interface for creating
439 relocations.
440
99ad8390
NC
441* Add support for x86_64 PE+ target.
442
1c0d3aa6 443* Add support for Score target.
83518699 444
ec2655a6
NC
445Changes in 2.17:
446
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NC
447* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
448
08333dc4
NS
449* Support for ms2 architecture has been added.
450
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NC
451* Support for the Z80 processor family has been added.
452
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MM
453* Add support for the "@<file>" syntax to the command line, so that extra
454 switches can be read from <file>.
455
a05a5b64 456* The SH target supports a new command-line switch --enable-reg-prefix which,
37dedf66
NC
457 if enabled, will allow register names to be optionally prefixed with a $
458 character. This allows register names to be distinguished from label names.
fa94de6b 459
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JB
460* Macros with a variable number of arguments are now supported. See the
461 documentation for how this works.
462
4bdd3565
NC
463* Added --reduce-memory-overheads switch to reduce the size of the hash
464 tables used, at the expense of longer assembly times, and
465 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
466
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JB
467* Macro names and macro parameter names can now be any identifier that would
468 also be legal as a symbol elsewhere. For macro parameter names, this is
469 known to cause problems in certain sources when the respective target uses
470 characters inconsistently, and thus macro parameter references may no longer
471 be recognized as such (see the documentation for details).
fa94de6b 472
d2c5f73e
NC
473* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
474 for the VAX target in order to be more compatible with the VAX MACRO
475 assembler.
476
a05a5b64 477* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 478
957d91c1
NC
479Changes in 2.16:
480
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JB
481* Redefinition of macros now results in an error.
482
a05a5b64 483* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 484
a05a5b64 485* New command-line option -munwind-check=[warning|error] for IA64
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L
486 targets.
487
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JB
488* The IA64 port now uses automatic dependency violation removal as its default
489 mode.
490
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NC
491* Port to MAXQ processor contributed by HCL Tech.
492
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NC
493* Added support for generating unwind tables for ARM ELF targets.
494
a05a5b64 495* Add a -g command-line option to generate debug information in the target's
329e276d
NC
496 preferred debug format.
497
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NC
498* Support for the crx-elf target added.
499
1a320fbb 500* Support for the sh-symbianelf target added.
1fe1f39c 501
0503b355
BF
502* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
503 on pe[i]-i386; required for this target's DWARF 2 support.
504
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NC
505* Support for Motorola MCF521x/5249/547x/548x added.
506
fd99574b
NC
507* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
508 instrucitons.
509
a05a5b64 510* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 511
a05a5b64 512* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
caa32fe5
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513 added to enter (and leave) alternate macro syntax mode.
514
0477af35
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515Changes in 2.15:
516
7a7f4e42
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517* The MIPS -membedded-pic option (Embedded-PIC code generation) is
518 deprecated and will be removed in a future release.
519
6edf0760
NC
520* Added PIC m32r Linux (ELF) and support to M32R assembler.
521
09d92015
MM
522* Added support for ARM V6.
523
88da98f3
MS
524* Added support for sh4a and variants.
525
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526* Support for Renesas M32R2 added.
527
88da98f3
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528* Limited support for Mapping Symbols as specified in the ARM ELF
529 specification has been added to the arm assembler.
ed769ec1 530
0bbf2aa4
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531* On ARM architectures, added a new gas directive ".unreq" that undoes
532 definitions created by ".req".
533
3e602632
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534* Support for Motorola ColdFire MCF528x added.
535
05da4302
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536* Added --gstabs+ switch to enable the generation of STABS debug format
537 information with GNU extensions.
fa94de6b 538
6a265366
CD
539* Added support for MIPS64 Release 2.
540
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NC
541* Added support for v850e1.
542
12b55ccc
L
543* Added -n switch for x86 assembler. By default, x86 GAS replaces
544 multiple nop instructions used for alignment within code sections
545 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
546 switch disables the optimization.
547
78849248
ILT
548* Removed -n option from MIPS assembler. It was not useful, and confused the
549 existing -non_shared option.
550
43c58ae6
CD
551Changes in 2.14:
552
69be0a2b
CD
553* Added support for MIPS32 Release 2.
554
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555* Added support for Xtensa architecture.
556
e16bb312
NC
557* Support for Intel's iWMMXt processor (an ARM variant) added.
558
cce4814f
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559* An assembler test generator has been contributed and an example file that
560 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 561
5177500f
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562* Support for SH2E added.
563
fea17916
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564* GASP has now been removed.
565
004d9caf
NC
566* Support for Texas Instruments TMS320C4x and TMS320C3x series of
567 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 568
a40cbfa3
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569* Support for the Ubicom IP2xxx microcontroller added.
570
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571Changes in 2.13:
572
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573* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
574 and FR500 included.
0ebb9a87 575
a40cbfa3 576* Support for DLX processor added.
52216602 577
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578* GASP has now been deprecated and will be removed in a future release. Use
579 the macro facilities in GAS instead.
3f965e60 580
a40cbfa3
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581* GASP now correctly parses floating point numbers. Unless the base is
582 explicitly specified, they are interpreted as decimal numbers regardless of
583 the currently specified base.
1ac57253 584
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585Changes in 2.12:
586
a40cbfa3 587* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 588
a40cbfa3 589* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 590
fa94de6b
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591* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
592 specifying the target instruction set. The old method of specifying the
a40cbfa3
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593 target processor has been deprecated, but is still accepted for
594 compatibility.
03b1477f 595
a40cbfa3
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596* Support for the VFP floating-point instruction set has been added to
597 the ARM assembler.
252b5132 598
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599* New psuedo op: .incbin to include a set of binary data at a given point
600 in the assembly. Contributed by Anders Norlander.
7e005732 601
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602* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
603 but still works for compatability.
ec68c924 604
fa94de6b 605* The MIPS assembler no longer issues a warning by default when it
a05a5b64 606 generates a nop instruction from a macro. The new command-line option
a40cbfa3 607 -n will turn on the warning.
63486801 608
2dac7317
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609Changes in 2.11:
610
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611* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
612
a40cbfa3 613* x86 gas now supports the full Pentium4 instruction set.
a167610d 614
a40cbfa3 615* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 616
a40cbfa3 617* Support for Motorola 68HC11 and 68HC12.
df86943d 618
a40cbfa3 619* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 620
a40cbfa3 621* Support for IA-64.
2dac7317 622
a40cbfa3 623* Support for i860, by Jason Eckhardt.
22b36938 624
a40cbfa3 625* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 626
a40cbfa3 627* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 628
a05a5b64 629* x86 gas -q command-line option quietens warnings about register size changes
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630 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
631 translating various deprecated floating point instructions.
a38cf1db 632
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633Changes in 2.10:
634
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635* Support for the ARM msr instruction was changed to only allow an immediate
636 operand when altering the flags field.
d14442f4 637
a40cbfa3 638* Support for ATMEL AVR.
adde6300 639
a40cbfa3 640* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 641
a40cbfa3 642* Support for numbers with suffixes.
3fd9f047 643
a40cbfa3 644* Added support for breaking to the end of repeat loops.
6a6987a9 645
a40cbfa3 646* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 647
a40cbfa3 648* New .elseif pseudo-op added.
3fd9f047 649
a40cbfa3 650* New --fatal-warnings option.
1f776aa5 651
a40cbfa3 652* picoJava architecture support added.
252b5132 653
a40cbfa3 654* Motorola MCore 210 processor support added.
041dd5a9 655
fa94de6b 656* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 657 assembly programs with intel syntax.
252b5132 658
a40cbfa3 659* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 660
a40cbfa3 661* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 662
a40cbfa3 663* Full 16-bit mode support for i386.
252b5132 664
fa94de6b 665* Greatly improved instruction operand checking for i386. This change will
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666 produce errors or warnings on incorrect assembly code that previous versions
667 of gas accepted. If you get unexpected messages from code that worked with
668 older versions of gas, please double check the code before reporting a bug.
252b5132 669
a40cbfa3 670* Weak symbol support added for COFF targets.
252b5132 671
a40cbfa3 672* Mitsubishi D30V support added.
252b5132 673
a40cbfa3 674* Texas Instruments c80 (tms320c80) support added.
252b5132 675
a40cbfa3 676* i960 ELF support added.
bedf545c 677
a40cbfa3 678* ARM ELF support added.
a057431b 679
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680Changes in 2.9:
681
a40cbfa3 682* Texas Instruments c30 (tms320c30) support added.
252b5132 683
fa94de6b 684* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 685 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 686
a40cbfa3 687* Added --gstabs option to generate stabs debugging information.
252b5132 688
fa94de6b 689* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 690 listing.
252b5132 691
a40cbfa3 692* Added -MD option to print dependencies.
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693
694Changes in 2.8:
695
a40cbfa3 696* BeOS support added.
252b5132 697
a40cbfa3 698* MIPS16 support added.
252b5132 699
a40cbfa3 700* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 701
a40cbfa3 702* Alpha/VMS support added.
252b5132 703
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704* m68k options --base-size-default-16, --base-size-default-32,
705 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 706
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707* The alignment directives now take an optional third argument, which is the
708 maximum number of bytes to skip. If doing the alignment would require
709 skipping more than the given number of bytes, the alignment is not done at
710 all.
252b5132 711
a40cbfa3 712* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 713
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714* The -a option takes a new suboption, c (e.g., -alc), to skip false
715 conditionals in listings.
252b5132 716
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717* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
718 the symbol is already defined.
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719
720Changes in 2.7:
721
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722* The PowerPC assembler now allows the use of symbolic register names (r0,
723 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
724 can be used any time. PowerPC 860 move to/from SPR instructions have been
725 added.
252b5132 726
a40cbfa3 727* Alpha Linux (ELF) support added.
252b5132 728
a40cbfa3 729* PowerPC ELF support added.
252b5132 730
a40cbfa3 731* m68k Linux (ELF) support added.
252b5132 732
a40cbfa3 733* i960 Hx/Jx support added.
252b5132 734
a40cbfa3 735* i386/PowerPC gnu-win32 support added.
252b5132 736
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737* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
738 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 739 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 740 target=i386-unknown-sco3.2v5elf.
252b5132 741
a40cbfa3 742* m88k-motorola-sysv3* support added.
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743
744Changes in 2.6:
745
a40cbfa3 746* Gas now directly supports macros, without requiring GASP.
252b5132 747
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748* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
749 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
750 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 751
a40cbfa3 752* Added --defsym SYM=VALUE option.
252b5132 753
a40cbfa3 754* Added -mips4 support to MIPS assembler.
252b5132 755
a40cbfa3 756* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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757
758Changes in 2.4:
759
a40cbfa3 760* Converted this directory to use an autoconf-generated configure script.
252b5132 761
a40cbfa3 762* ARM support, from Richard Earnshaw.
252b5132 763
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764* Updated VMS support, from Pat Rankin, including considerably improved
765 debugging support.
252b5132 766
a40cbfa3 767* Support for the control registers in the 68060.
252b5132 768
a40cbfa3 769* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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RM
770 provide for possible future gcc changes, for targets where gas provides some
771 features not available in the native assembler. If the native assembler is
a40cbfa3 772 used, it should become obvious pretty quickly what the problem is.
252b5132 773
a40cbfa3 774* Usage message is available with "--help".
252b5132 775
fa94de6b 776* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 777 also, but didn't get into the NEWS file.)
252b5132 778
a40cbfa3 779* Weak symbol support for a.out.
252b5132 780
fa94de6b 781* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 782 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 783
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NC
784* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
785 Paul Kranenburg.
252b5132 786
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787* Improved Alpha support. Immediate constants can have a much larger range
788 now. Support for the 21164 has been contributed by Digital.
252b5132 789
a40cbfa3 790* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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791
792Changes in 2.3:
793
a40cbfa3 794* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 795
a40cbfa3 796* RS/6000 and PowerPC support by Ian Taylor.
252b5132 797
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798* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
799 based on mail received from various people. The `-h#' option should work
800 again too.
252b5132 801
a40cbfa3 802* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 803 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
a40cbfa3
NC
804 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
805 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
806 in the "dist" directory.
252b5132 807
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808* Vax support in gas fixed for BSD, so it builds and seems to run a couple
809 simple tests okay. I haven't put it through extensive testing. (GNU make is
810 currently required for BSD 4.3 builds.)
252b5132 811
fa94de6b 812* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
a40cbfa3
NC
813 based on code donated by CMU, which used an a.out-based format. I'm afraid
814 the alpha-a.out support is pretty badly mangled, and much of it removed;
815 making it work will require rewriting it as BFD support for the format anyways.
252b5132 816
a40cbfa3 817* Irix 5 support.
252b5132 818
fa94de6b 819* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 820 couple different versions of expect and dejagnu.
252b5132 821
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822* Symbols' values are now handled internally as expressions, permitting more
823 flexibility in evaluating them in some cases. Some details of relocation
a40cbfa3
NC
824 handling have also changed, and simple constant pool management has been
825 added, to make the Alpha port easier.
252b5132 826
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827* New option "--statistics" for printing out program run times. This is
828 intended to be used with the gcc "-Q" option, which prints out times spent in
829 various phases of compilation. (You should be able to get all of them
830 printed out with "gcc -Q -Wa,--statistics", I think.)
252b5132
RH
831
832Changes in 2.2:
833
a40cbfa3 834* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 835
fa94de6b
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836* Configurations that are still in development (and therefore are convenient to
837 have listed in configure.in) still get rejected without a minor change to
a40cbfa3
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838 gas/Makefile.in, so people not doing development work shouldn't get the
839 impression that support for such configurations is actually believed to be
840 reliable.
252b5132 841
fa94de6b 842* The program name (usually "as") is printed when a fatal error message is
a40cbfa3
NC
843 displayed. This should prevent some confusion about the source of occasional
844 messages about "internal errors".
252b5132 845
fa94de6b 846* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 847 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 848
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NC
849* Symbol values are maintained as expressions instead of being immediately
850 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
851 more complex calculations involving symbols whose values are not alreadey
852 known.
252b5132 853
a40cbfa3 854* DBX-style debugging info ("stabs") is now supported for COFF formats.
fa94de6b
RM
855 If any stabs directives are seen in the source, GAS will create two new
856 sections: a ".stab" and a ".stabstr" section. The format of the .stab
a40cbfa3
NC
857 section is nearly identical to the a.out symbol format, and .stabstr is
858 its string table. For this to be useful, you must have configured GCC
859 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
860 that can use the stab sections (4.11 or later).
252b5132 861
fa94de6b 862* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 863 support is in progress.
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864
865Changes in 2.1:
866
fa94de6b 867* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 868 incorporated, but not well tested yet.
252b5132 869
fa94de6b 870* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 871 with gcc now.
252b5132 872
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873* Some minor adjustments to add (Convergent Technologies') Miniframe support,
874 suggested by Ronald Cole.
252b5132 875
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876* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
877 includes improved ELF support, which I've started adapting for SPARC Solaris
878 2.x. Integration isn't completely, so it probably won't work.
252b5132 879
a40cbfa3 880* HP9000/300 support, donated by HP, has been merged in.
252b5132 881
a40cbfa3 882* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 883
a40cbfa3 884* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 885
a40cbfa3 886* Test suite framework is starting to become reasonable.
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887
888Changes in 2.0:
889
a40cbfa3 890* Mostly bug fixes.
252b5132 891
a40cbfa3 892* Some more merging of BFD and ELF code, but ELF still doesn't work.
252b5132
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893
894Changes in 1.94:
895
a40cbfa3
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896* BFD merge is partly done. Adventurous souls may try giving configure the
897 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
898 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
899 or "solaris". (ELF isn't really supported yet. It needs work. I've got
900 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
901 fully merged yet.)
252b5132 902
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903* The 68K opcode table has been split in half. It should now compile under gcc
904 without consuming ridiculous amounts of memory.
252b5132 905
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906* A couple data structures have been reduced in size. This should result in
907 saving a little bit of space at runtime.
252b5132 908
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909* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
910 code provided ROSE format support, which I haven't merged in yet. (I can
911 make it available, if anyone wants to try it out.) Ralph's code, for BSD
912 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
913 coming.
252b5132 914
a40cbfa3 915* Support for the Hitachi H8/500 has been added.
252b5132 916
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917* VMS host and target support should be working now, thanks chiefly to Eric
918 Youngdale.
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919
920Changes in 1.93.01:
921
a40cbfa3 922* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 923
a40cbfa3 924* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 925
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926* For m68k, "%" is now accepted before register names. For COFF format, which
927 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
928 can be distinguished from the register.
252b5132 929
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930* Last public release was 1.38. Lots of configuration changes since then, lots
931 of new CPUs and formats, lots of bugs fixed.
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932
933\f
250d07de 934Copyright (C) 2012-2021 Free Software Foundation, Inc.
5bf135a7
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935
936Copying and distribution of this file, with or without modification,
937are permitted in any medium without royalty provided the copyright
938notice and this notice are preserved.
939
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940Local variables:
941fill-column: 79
942End: