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252b5132 1-*- text -*-
6d96a594 2
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L
3* Add a command-line option, -muse-unaligned-vector-move, for x86 target
4 to encode aligned vector move as unaligned vector move.
5
80cfde76
PW
6* Add support for Cortex-R52+ for Arm.
7
50aaf5e6 8* Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
98ab23ab 9
ff01bb6c
L
10* Outputs of .ds.x directive and .tfloat directive with hex input from
11 x86 assembler have been reduced from 12 bytes to 10 bytes to match the
12 output of .tfloat directive.
13
d5007f02
PW
14* Add support for 'armv9-a' for -march in AArch64 GAS.
15
0cc78721
CL
16* Add support for Intel AVX512_FP16 instructions.
17
51419248
NC
18Changes in 2.37:
19
933feaf3
AM
20* arm-symbianelf support removed.
21
02202574
PW
22* Add support for Realm Management Extension (RME) for AArch64.
23
055bc77a
NC
24Changes in 2.36:
25
58bf9b6a
L
26* Add support for Intel AVX VNNI instructions.
27
c1fa250a
LC
28* Add support for Intel HRESET instruction.
29
f64c42a9
LC
30* Add support for Intel UINTR instructions.
31
6d96a594
C
32* Support non-absolute segment values for i386 lcall and ljmp.
33
b71702f1
NC
34* When setting the link order attribute of ELF sections, it is now possible to
35 use a numeric section index instead of symbol name.
42c36b73 36
a3a02fe8
PW
37* Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
38 AArch64 and ARM.
b71702f1 39 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 40
b71702f1 41* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
82c70b08
KT
42 Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
43 Extension) system registers for AArch64.
c81946ef 44
8926e54e 45* Add support for Armv8-R and Armv8.7-A AArch64.
c81946ef 46
a984d94a 47* Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
82503ca7 48 AArch64.
fd195909 49
e64441b1 50* Add support for +flagm feature for -march in Armv8.4 AArch64.
dd4a72c8 51
fd65497d
PW
52* Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
53 64-byte load/store instructions for this feature.
54
3f4ff088
PW
55* Add support for +pauth (Pointer Authentication) feature for -march in
56 AArch64.
57
81d54bb7 58* Add support for Intel TDX instructions.
96a84ea3 59
c4694f17
TG
60* Add support for Intel Key Locker instructions.
61
b1766e7c
NC
62* Added a .nop directive to generate a single no-op instruction in a target
63 neutral manner. This instruction does have an effect on DWARF line number
64 generation, if that is active.
65
a0522545
ML
66* Removed --reduce-memory-overheads and --hash-size as gas now
67 uses hash tables that can be expand and shrink automatically.
68
789198ca
L
69* Add {disp16} pseudo prefix to x86 assembler.
70
260cd341
LC
71* Add support for Intel AMX instructions.
72
939b95c7
L
73* Configure with --enable-x86-used-note by default for Linux/x86.
74
99fabbc9
JL
75* Add support for the SHF_GNU_RETAIN flag, which can be applied to
76 sections using the 'R' flag in the .section directive.
77 SHF_GNU_RETAIN specifies that the section should not be garbage
78 collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
79
b115b9fd
NC
80Changes in 2.35:
81
bbd19b19
L
82* X86 NaCl target support is removed.
83
6914be53
L
84* Extend .symver directive to update visibility of the original symbol
85 and assign one original symbol to different versioned symbols.
86
6e0e8b45
L
87* Add support for Intel SERIALIZE and TSXLDTRK instructions.
88
9e8f1c90
L
89* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
90 -mlfence-before-ret= options to x86 assembler to help mitigate
91 CVE-2020-0551.
92
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NC
93* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
94 (if such output is being generated). Added the ability to generate
95 version 5 .debug_line sections.
96
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TC
97* Add -mbig-obj support to i386 MingW targets.
98
ae774686
NC
99Changes in 2.34:
100
5eb617a7
L
101* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
102 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
103 options to x86 assembler to align branches within a fixed boundary
104 with segment prefixes or NOPs.
105
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SB
106* Add support for Zilog eZ80 and Zilog Z180 CPUs.
107
108* Add support for z80-elf target.
109
110* Add support for relocation of each byte or word of multibyte value to Z80
111 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
112 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
113
114* Add SDCC support for Z80 targets.
115
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PB
116Changes in 2.33:
117
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MM
118* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
119 instructions.
120
121* Add support for the Arm Transactional Memory Extension (TME)
122 instructions.
123
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124* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
125 instructions.
126
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127* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
128 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
129 time option to set the default behavior. Set the default if the configure
130 option is not used to "no".
6f2117ba 131
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DZ
132* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
133 processors.
134
135* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
136 Cortex-A76AE, and Cortex-A77 processors.
137
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138* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
139 floating point literals. Add .float16_format directive and
140 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
141 encoding.
142
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AB
143* Add --gdwarf-cie-version command line flag. This allows control over which
144 version of DWARF CIE the assembler creates.
145
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NC
146Changes in 2.32:
147
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148* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
149 VEX.W-ignored (WIG) VEX instructions.
150
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L
151* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
152 notes. Add a --enable-x86-used-note configure time option to set the
153 default behavior. Set the default if the configure option is not used
154 to "no".
155
a693765e
CX
156* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
157
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CX
158* Add support for the MIPS Loongson EXTensions (EXT) instructions.
159
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CX
160* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
161
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AJ
162* Add support for the C-SKY processor series.
163
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CX
164* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
165 ASE.
166
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NC
167Changes in 2.31:
168
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NC
169* The ADR and ADRL pseudo-instructions supported by the ARM assembler
170 now only set the bottom bit of the address of thumb function symbols
171 if the -mthumb-interwork command line option is active.
172
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FS
173* Add support for the MIPS Global INValidate (GINV) ASE.
174
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SE
175* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
176
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JD
177* Add support for the Freescale S12Z architecture.
178
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NC
179* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
180 Build Attribute notes if none are present in the input sources. Add a
181 --enable-generate-build-notes=[yes|no] configure time option to set the
182 default behaviour. Set the default if the configure option is not used
183 to "no".
184
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L
185* Remove -mold-gcc command-line option for x86 targets.
186
b6f8c7c4
L
187* Add -O[2|s] command-line options to x86 assembler to enable alternate
188 shorter instruction encoding.
189
8f065d3b 190* Add support for .nops directive. It is currently supported only for
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L
191 x86 targets.
192
9176ac5b
NC
193Changes in 2.30:
194
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AO
195* Add support for loaction views in DWARF debug line information.
196
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TG
197Changes in 2.29:
198
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L
199* Add support for ELF SHF_GNU_MBIND.
200
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PC
201* Add support for the WebAssembly file format and wasm32 ELF conversion.
202
7e0de605 203* PowerPC gas now checks that the correct register class is used in
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AM
204 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
205 that the registers are invalid.
7e0de605 206
93f11b16
DD
207* Add support for the Texas Instruments PRU processor.
208
0cda1e19
TP
209* Support for the ARMv8-R architecture and Cortex-R52 processor has been
210 added to the ARM port.
ced40572 211
9703a4ef
TG
212Changes in 2.28:
213
e23eba97
NC
214* Add support for the RISC-V architecture.
215
b19ea8d2 216* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 217
96a84ea3
TG
218Changes in 2.27:
219
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L
220* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
221
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NC
222* Add --no-pad-sections to stop the assembler from padding the end of output
223 sections up to their alignment boundary.
224
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TP
225* Support for the ARMv8-M architecture has been added to the ARM port. Support
226 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
227 port.
228
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CZ
229* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
230 .extCoreRegister pseudo-ops that allow an user to define custom
231 instructions, conditional codes, auxiliary and core registers.
232
b8871f35
L
233* Add a configure option --enable-elf-stt-common to decide whether ELF
234 assembler should generate common symbols with the STT_COMMON type by
235 default. Default to no.
236
a05a5b64 237* New command-line option --elf-stt-common= for ELF targets to control
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L
238 whether to generate common symbols with the STT_COMMON type.
239
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NC
240* Add ability to set section flags and types via numeric values for ELF
241 based targets.
81c23f82 242
0cb4071e
L
243* Add a configure option --enable-x86-relax-relocations to decide whether
244 x86 assembler should generate relax relocations by default. Default to
245 yes, except for x86 Solaris targets older than Solaris 12.
246
a05a5b64 247* New command-line option -mrelax-relocations= for x86 target to control
0cb4071e
L
248 whether to generate relax relocations.
249
a05a5b64 250* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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251 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
252
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CZ
253* Add assembly-time relaxation option for ARC cpus.
254
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AB
255* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
256 cpu type to be adjusted at configure time.
257
7feec526
TG
258Changes in 2.26:
259
edeefb67
L
260* Add a configure option --enable-compressed-debug-sections={all,gas} to
261 decide whether DWARF debug sections should be compressed by default.
e12fe555 262
886a2506
NC
263* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
264 assembler support for Argonaut RISC architectures.
265
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NC
266* Symbol and label names can now be enclosed in double quotes (") which allows
267 them to contain characters that are not part of valid symbol names in high
268 level languages.
269
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MW
270* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
271 previous spelling, -march=armv6zk, is still accepted.
272
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MW
273* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
274 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
275 extensions has also been added to the Aarch64 port.
276
a5932920
MW
277* Support for the ARMv8.1 architecture has been added to the ARM port. Support
278 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
279 been added to the ARM port.
280
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L
281* Extend --compress-debug-sections option to support
282 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
283 targets.
284
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L
285* --compress-debug-sections is turned on for Linux/x86 by default.
286
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TG
287Changes in 2.25:
288
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BS
289* Add support for the AVR Tiny microcontrollers.
290
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CS
291* Replace support for openrisc and or32 with support for or1k.
292
2e6976a8 293* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 294 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 295
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KLC
296* Add support for the Andes NDS32.
297
58ca03a2
TG
298Changes in 2.24:
299
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NC
300* Add support for the Texas Instruments MSP430X processor.
301
a05a5b64 302* Add -gdwarf-sections command-line option to enable per-code-section
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303 generation of DWARF .debug_line sections.
304
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SL
305* Add support for Altera Nios II.
306
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NC
307* Add support for the Imagination Technologies Meta processor.
308
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NC
309* Add support for the v850e3v5.
310
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RS
311* Remove assembler support for MIPS ECOFF targets.
312
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TG
313Changes in 2.23:
314
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NC
315* Add support for the 64-bit ARM architecture: AArch64.
316
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NC
317* Add support for S12X processor.
318
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JL
319* Add support for the VLE extension to the PowerPC architecture.
320
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NC
321* Add support for the Freescale XGATE architecture.
322
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RM
323* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
324 directives. These are currently available only for x86 and ARM targets.
325
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DD
326* Add support for the Renesas RL78 architecture.
327
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NC
328* Add support for the Adapteva EPIPHANY architecture.
329
fe13e45b 330* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 331
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TG
332Changes in 2.22:
333
69f56ae1 334* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 335
90b3661c 336Changes in 2.21:
44f45767 337
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L
338* Gas no longer requires doubling of ampersands in macros.
339
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JM
340* Add support for the TMS320C6000 (TI C6X) processor family.
341
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DK
342* GAS now understands an extended syntax in the .section directive flags
343 for COFF targets that allows the section's alignment to be specified. This
344 feature has also been backported to the 2.20 release series, starting with
345 2.20.1.
346
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NC
347* Add support for the Renesas RX processor.
348
a05a5b64 349* New command-line option, --compress-debug-sections, which requests
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CC
350 compression of DWARF debug information sections in the relocatable output
351 file. Compressed debug sections are supported by readelf, objdump, and
352 gold, but not currently by Gnu ld.
353
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TG
354Changes in 2.20:
355
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NC
356* Added support for v850e2 and v850e2v3.
357
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NC
358* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
359 pseudo op. It marks the symbol as being globally unique in the entire
360 process.
361
c921be7d
NC
362* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
363 in binary rather than text.
6e33da12 364
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DK
365* Add support for common symbol alignment to PE formats.
366
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CC
367* Add support for the new discriminator column in the DWARF line table,
368 with a discriminator operand for the .loc directive.
369
c3b7224a
NC
370* Add support for Sunplus score architecture.
371
d8045f23
NC
372* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
373 indicate that if the symbol is the target of a relocation, its value should
374 not be use. Instead the function should be invoked and its result used as
375 the value.
fa94de6b 376
84e94c90
NC
377* Add support for Lattice Mico32 (lm32) architecture.
378
fa94de6b 379* Add support for Xilinx MicroBlaze architecture.
caa03924 380
6e33da12
TG
381Changes in 2.19:
382
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DJ
383* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
384 tables without runtime relocation.
385
a05a5b64 386* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
6fd4f6cc
DD
387 adds compatibility with H'00 style hex constants.
388
a05a5b64 389* New command-line option, -msse-check=[none|error|warning], for x86
daf50ae7
L
390 targets.
391
a05a5b64 392* New sub-option added to the assembler's -a command-line switch to
83f10cb2
NC
393 generate a listing output. The 'g' sub-option will insert into the listing
394 various information about the assembly, such as assembler version, the
a05a5b64 395 command-line options used, and a time stamp.
83f10cb2 396
a05a5b64 397* New command-line option -msse2avx for x86 target to encode SSE
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L
398 instructions with VEX prefix.
399
f1f8f695 400* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 401
a05a5b64 402* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
ae40c993
L
403 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
404 -mnaked-reg and -mold-gcc, for x86 targets.
405
38a57ae7
NC
406* Support for generating wide character strings has been added via the new
407 pseudo ops: .string16, .string32 and .string64.
408
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MM
409* Support for SSE5 has been added to the i386 port.
410
7c3d153f
NC
411Changes in 2.18:
412
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NC
413* The GAS sources are now released under the GPLv3.
414
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NC
415* Support for the National Semiconductor CR16 target has been added.
416
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AM
417* Added gas .reloc pseudo. This is a low-level interface for creating
418 relocations.
419
99ad8390
NC
420* Add support for x86_64 PE+ target.
421
1c0d3aa6 422* Add support for Score target.
83518699 423
ec2655a6
NC
424Changes in 2.17:
425
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NC
426* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
427
08333dc4
NS
428* Support for ms2 architecture has been added.
429
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NC
430* Support for the Z80 processor family has been added.
431
3e8a519c
MM
432* Add support for the "@<file>" syntax to the command line, so that extra
433 switches can be read from <file>.
434
a05a5b64 435* The SH target supports a new command-line switch --enable-reg-prefix which,
37dedf66
NC
436 if enabled, will allow register names to be optionally prefixed with a $
437 character. This allows register names to be distinguished from label names.
fa94de6b 438
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JB
439* Macros with a variable number of arguments are now supported. See the
440 documentation for how this works.
441
4bdd3565
NC
442* Added --reduce-memory-overheads switch to reduce the size of the hash
443 tables used, at the expense of longer assembly times, and
444 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
445
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JB
446* Macro names and macro parameter names can now be any identifier that would
447 also be legal as a symbol elsewhere. For macro parameter names, this is
448 known to cause problems in certain sources when the respective target uses
449 characters inconsistently, and thus macro parameter references may no longer
450 be recognized as such (see the documentation for details).
fa94de6b 451
d2c5f73e
NC
452* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
453 for the VAX target in order to be more compatible with the VAX MACRO
454 assembler.
455
a05a5b64 456* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 457
957d91c1
NC
458Changes in 2.16:
459
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JB
460* Redefinition of macros now results in an error.
461
a05a5b64 462* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 463
a05a5b64 464* New command-line option -munwind-check=[warning|error] for IA64
970d6792
L
465 targets.
466
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JB
467* The IA64 port now uses automatic dependency violation removal as its default
468 mode.
469
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NC
470* Port to MAXQ processor contributed by HCL Tech.
471
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NC
472* Added support for generating unwind tables for ARM ELF targets.
473
a05a5b64 474* Add a -g command-line option to generate debug information in the target's
329e276d
NC
475 preferred debug format.
476
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NC
477* Support for the crx-elf target added.
478
1a320fbb 479* Support for the sh-symbianelf target added.
1fe1f39c 480
0503b355
BF
481* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
482 on pe[i]-i386; required for this target's DWARF 2 support.
483
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NC
484* Support for Motorola MCF521x/5249/547x/548x added.
485
fd99574b
NC
486* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
487 instrucitons.
488
a05a5b64 489* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 490
a05a5b64 491* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
caa32fe5
NC
492 added to enter (and leave) alternate macro syntax mode.
493
0477af35
NC
494Changes in 2.15:
495
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CD
496* The MIPS -membedded-pic option (Embedded-PIC code generation) is
497 deprecated and will be removed in a future release.
498
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NC
499* Added PIC m32r Linux (ELF) and support to M32R assembler.
500
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MM
501* Added support for ARM V6.
502
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MS
503* Added support for sh4a and variants.
504
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NC
505* Support for Renesas M32R2 added.
506
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MS
507* Limited support for Mapping Symbols as specified in the ARM ELF
508 specification has been added to the arm assembler.
ed769ec1 509
0bbf2aa4
NC
510* On ARM architectures, added a new gas directive ".unreq" that undoes
511 definitions created by ".req".
512
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NC
513* Support for Motorola ColdFire MCF528x added.
514
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515* Added --gstabs+ switch to enable the generation of STABS debug format
516 information with GNU extensions.
fa94de6b 517
6a265366
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518* Added support for MIPS64 Release 2.
519
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520* Added support for v850e1.
521
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522* Added -n switch for x86 assembler. By default, x86 GAS replaces
523 multiple nop instructions used for alignment within code sections
524 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
525 switch disables the optimization.
526
78849248
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527* Removed -n option from MIPS assembler. It was not useful, and confused the
528 existing -non_shared option.
529
43c58ae6
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530Changes in 2.14:
531
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532* Added support for MIPS32 Release 2.
533
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534* Added support for Xtensa architecture.
535
e16bb312
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536* Support for Intel's iWMMXt processor (an ARM variant) added.
537
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538* An assembler test generator has been contributed and an example file that
539 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 540
5177500f
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541* Support for SH2E added.
542
fea17916
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543* GASP has now been removed.
544
004d9caf
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545* Support for Texas Instruments TMS320C4x and TMS320C3x series of
546 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 547
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548* Support for the Ubicom IP2xxx microcontroller added.
549
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550Changes in 2.13:
551
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552* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
553 and FR500 included.
0ebb9a87 554
a40cbfa3 555* Support for DLX processor added.
52216602 556
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557* GASP has now been deprecated and will be removed in a future release. Use
558 the macro facilities in GAS instead.
3f965e60 559
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560* GASP now correctly parses floating point numbers. Unless the base is
561 explicitly specified, they are interpreted as decimal numbers regardless of
562 the currently specified base.
1ac57253 563
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564Changes in 2.12:
565
a40cbfa3 566* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 567
a40cbfa3 568* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 569
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570* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
571 specifying the target instruction set. The old method of specifying the
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572 target processor has been deprecated, but is still accepted for
573 compatibility.
03b1477f 574
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575* Support for the VFP floating-point instruction set has been added to
576 the ARM assembler.
252b5132 577
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578* New psuedo op: .incbin to include a set of binary data at a given point
579 in the assembly. Contributed by Anders Norlander.
7e005732 580
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581* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
582 but still works for compatability.
ec68c924 583
fa94de6b 584* The MIPS assembler no longer issues a warning by default when it
a05a5b64 585 generates a nop instruction from a macro. The new command-line option
a40cbfa3 586 -n will turn on the warning.
63486801 587
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588Changes in 2.11:
589
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590* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
591
a40cbfa3 592* x86 gas now supports the full Pentium4 instruction set.
a167610d 593
a40cbfa3 594* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 595
a40cbfa3 596* Support for Motorola 68HC11 and 68HC12.
df86943d 597
a40cbfa3 598* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 599
a40cbfa3 600* Support for IA-64.
2dac7317 601
a40cbfa3 602* Support for i860, by Jason Eckhardt.
22b36938 603
a40cbfa3 604* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 605
a40cbfa3 606* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 607
a05a5b64 608* x86 gas -q command-line option quietens warnings about register size changes
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609 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
610 translating various deprecated floating point instructions.
a38cf1db 611
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612Changes in 2.10:
613
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614* Support for the ARM msr instruction was changed to only allow an immediate
615 operand when altering the flags field.
d14442f4 616
a40cbfa3 617* Support for ATMEL AVR.
adde6300 618
a40cbfa3 619* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 620
a40cbfa3 621* Support for numbers with suffixes.
3fd9f047 622
a40cbfa3 623* Added support for breaking to the end of repeat loops.
6a6987a9 624
a40cbfa3 625* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 626
a40cbfa3 627* New .elseif pseudo-op added.
3fd9f047 628
a40cbfa3 629* New --fatal-warnings option.
1f776aa5 630
a40cbfa3 631* picoJava architecture support added.
252b5132 632
a40cbfa3 633* Motorola MCore 210 processor support added.
041dd5a9 634
fa94de6b 635* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 636 assembly programs with intel syntax.
252b5132 637
a40cbfa3 638* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 639
a40cbfa3 640* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 641
a40cbfa3 642* Full 16-bit mode support for i386.
252b5132 643
fa94de6b 644* Greatly improved instruction operand checking for i386. This change will
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645 produce errors or warnings on incorrect assembly code that previous versions
646 of gas accepted. If you get unexpected messages from code that worked with
647 older versions of gas, please double check the code before reporting a bug.
252b5132 648
a40cbfa3 649* Weak symbol support added for COFF targets.
252b5132 650
a40cbfa3 651* Mitsubishi D30V support added.
252b5132 652
a40cbfa3 653* Texas Instruments c80 (tms320c80) support added.
252b5132 654
a40cbfa3 655* i960 ELF support added.
bedf545c 656
a40cbfa3 657* ARM ELF support added.
a057431b 658
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659Changes in 2.9:
660
a40cbfa3 661* Texas Instruments c30 (tms320c30) support added.
252b5132 662
fa94de6b 663* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 664 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 665
a40cbfa3 666* Added --gstabs option to generate stabs debugging information.
252b5132 667
fa94de6b 668* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 669 listing.
252b5132 670
a40cbfa3 671* Added -MD option to print dependencies.
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672
673Changes in 2.8:
674
a40cbfa3 675* BeOS support added.
252b5132 676
a40cbfa3 677* MIPS16 support added.
252b5132 678
a40cbfa3 679* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 680
a40cbfa3 681* Alpha/VMS support added.
252b5132 682
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683* m68k options --base-size-default-16, --base-size-default-32,
684 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 685
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686* The alignment directives now take an optional third argument, which is the
687 maximum number of bytes to skip. If doing the alignment would require
688 skipping more than the given number of bytes, the alignment is not done at
689 all.
252b5132 690
a40cbfa3 691* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 692
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693* The -a option takes a new suboption, c (e.g., -alc), to skip false
694 conditionals in listings.
252b5132 695
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696* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
697 the symbol is already defined.
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698
699Changes in 2.7:
700
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701* The PowerPC assembler now allows the use of symbolic register names (r0,
702 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
703 can be used any time. PowerPC 860 move to/from SPR instructions have been
704 added.
252b5132 705
a40cbfa3 706* Alpha Linux (ELF) support added.
252b5132 707
a40cbfa3 708* PowerPC ELF support added.
252b5132 709
a40cbfa3 710* m68k Linux (ELF) support added.
252b5132 711
a40cbfa3 712* i960 Hx/Jx support added.
252b5132 713
a40cbfa3 714* i386/PowerPC gnu-win32 support added.
252b5132 715
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716* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
717 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 718 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 719 target=i386-unknown-sco3.2v5elf.
252b5132 720
a40cbfa3 721* m88k-motorola-sysv3* support added.
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722
723Changes in 2.6:
724
a40cbfa3 725* Gas now directly supports macros, without requiring GASP.
252b5132 726
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727* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
728 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
729 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 730
a40cbfa3 731* Added --defsym SYM=VALUE option.
252b5132 732
a40cbfa3 733* Added -mips4 support to MIPS assembler.
252b5132 734
a40cbfa3 735* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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736
737Changes in 2.4:
738
a40cbfa3 739* Converted this directory to use an autoconf-generated configure script.
252b5132 740
a40cbfa3 741* ARM support, from Richard Earnshaw.
252b5132 742
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743* Updated VMS support, from Pat Rankin, including considerably improved
744 debugging support.
252b5132 745
a40cbfa3 746* Support for the control registers in the 68060.
252b5132 747
a40cbfa3 748* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
fa94de6b
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749 provide for possible future gcc changes, for targets where gas provides some
750 features not available in the native assembler. If the native assembler is
a40cbfa3 751 used, it should become obvious pretty quickly what the problem is.
252b5132 752
a40cbfa3 753* Usage message is available with "--help".
252b5132 754
fa94de6b 755* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 756 also, but didn't get into the NEWS file.)
252b5132 757
a40cbfa3 758* Weak symbol support for a.out.
252b5132 759
fa94de6b 760* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 761 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 762
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763* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
764 Paul Kranenburg.
252b5132 765
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766* Improved Alpha support. Immediate constants can have a much larger range
767 now. Support for the 21164 has been contributed by Digital.
252b5132 768
a40cbfa3 769* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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770
771Changes in 2.3:
772
a40cbfa3 773* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 774
a40cbfa3 775* RS/6000 and PowerPC support by Ian Taylor.
252b5132 776
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777* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
778 based on mail received from various people. The `-h#' option should work
779 again too.
252b5132 780
a40cbfa3 781* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 782 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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783 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
784 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
785 in the "dist" directory.
252b5132 786
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787* Vax support in gas fixed for BSD, so it builds and seems to run a couple
788 simple tests okay. I haven't put it through extensive testing. (GNU make is
789 currently required for BSD 4.3 builds.)
252b5132 790
fa94de6b 791* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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792 based on code donated by CMU, which used an a.out-based format. I'm afraid
793 the alpha-a.out support is pretty badly mangled, and much of it removed;
794 making it work will require rewriting it as BFD support for the format anyways.
252b5132 795
a40cbfa3 796* Irix 5 support.
252b5132 797
fa94de6b 798* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 799 couple different versions of expect and dejagnu.
252b5132 800
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801* Symbols' values are now handled internally as expressions, permitting more
802 flexibility in evaluating them in some cases. Some details of relocation
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803 handling have also changed, and simple constant pool management has been
804 added, to make the Alpha port easier.
252b5132 805
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806* New option "--statistics" for printing out program run times. This is
807 intended to be used with the gcc "-Q" option, which prints out times spent in
808 various phases of compilation. (You should be able to get all of them
809 printed out with "gcc -Q -Wa,--statistics", I think.)
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810
811Changes in 2.2:
812
a40cbfa3 813* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 814
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815* Configurations that are still in development (and therefore are convenient to
816 have listed in configure.in) still get rejected without a minor change to
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817 gas/Makefile.in, so people not doing development work shouldn't get the
818 impression that support for such configurations is actually believed to be
819 reliable.
252b5132 820
fa94de6b 821* The program name (usually "as") is printed when a fatal error message is
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822 displayed. This should prevent some confusion about the source of occasional
823 messages about "internal errors".
252b5132 824
fa94de6b 825* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 826 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 827
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828* Symbol values are maintained as expressions instead of being immediately
829 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
830 more complex calculations involving symbols whose values are not alreadey
831 known.
252b5132 832
a40cbfa3 833* DBX-style debugging info ("stabs") is now supported for COFF formats.
fa94de6b
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834 If any stabs directives are seen in the source, GAS will create two new
835 sections: a ".stab" and a ".stabstr" section. The format of the .stab
a40cbfa3
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836 section is nearly identical to the a.out symbol format, and .stabstr is
837 its string table. For this to be useful, you must have configured GCC
838 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
839 that can use the stab sections (4.11 or later).
252b5132 840
fa94de6b 841* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 842 support is in progress.
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843
844Changes in 2.1:
845
fa94de6b 846* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 847 incorporated, but not well tested yet.
252b5132 848
fa94de6b 849* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 850 with gcc now.
252b5132 851
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852* Some minor adjustments to add (Convergent Technologies') Miniframe support,
853 suggested by Ronald Cole.
252b5132 854
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855* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
856 includes improved ELF support, which I've started adapting for SPARC Solaris
857 2.x. Integration isn't completely, so it probably won't work.
252b5132 858
a40cbfa3 859* HP9000/300 support, donated by HP, has been merged in.
252b5132 860
a40cbfa3 861* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 862
a40cbfa3 863* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 864
a40cbfa3 865* Test suite framework is starting to become reasonable.
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866
867Changes in 2.0:
868
a40cbfa3 869* Mostly bug fixes.
252b5132 870
a40cbfa3 871* Some more merging of BFD and ELF code, but ELF still doesn't work.
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872
873Changes in 1.94:
874
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875* BFD merge is partly done. Adventurous souls may try giving configure the
876 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
877 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
878 or "solaris". (ELF isn't really supported yet. It needs work. I've got
879 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
880 fully merged yet.)
252b5132 881
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882* The 68K opcode table has been split in half. It should now compile under gcc
883 without consuming ridiculous amounts of memory.
252b5132 884
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885* A couple data structures have been reduced in size. This should result in
886 saving a little bit of space at runtime.
252b5132 887
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888* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
889 code provided ROSE format support, which I haven't merged in yet. (I can
890 make it available, if anyone wants to try it out.) Ralph's code, for BSD
891 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
892 coming.
252b5132 893
a40cbfa3 894* Support for the Hitachi H8/500 has been added.
252b5132 895
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896* VMS host and target support should be working now, thanks chiefly to Eric
897 Youngdale.
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898
899Changes in 1.93.01:
900
a40cbfa3 901* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 902
a40cbfa3 903* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 904
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905* For m68k, "%" is now accepted before register names. For COFF format, which
906 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
907 can be distinguished from the register.
252b5132 908
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909* Last public release was 1.38. Lots of configuration changes since then, lots
910 of new CPUs and formats, lots of bugs fixed.
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911
912\f
250d07de 913Copyright (C) 2012-2021 Free Software Foundation, Inc.
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914
915Copying and distribution of this file, with or without modification,
916are permitted in any medium without royalty provided the copyright
917notice and this notice are preserved.
918
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919Local variables:
920fill-column: 79
921End: