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ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
f09c1772 2 Copyright 2009, 2010
ee86248c
JB
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22static struct
23 {
24 operatorT op_modifier; /* Operand modifier. */
25 int is_mem; /* 1 if operand is memory reference. */
25303607 26 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 27 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
28 unsigned int in_offset; /* >=1 if processing operand of offset. */
29 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
30 unsigned int in_scale; /* >=1 if processing multipication operand
31 * in brackets. */
32 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
33 const reg_entry *base; /* Base register (if any). */
34 const reg_entry *index; /* Index register (if any). */
35 offsetT scale_factor; /* Accumulated scale factor. */
36 symbolS *seg;
37 }
38intel_state;
39
40/* offset X_add_symbol */
41#define O_offset O_md32
7ac3eb25
L
42/* offset X_add_symbol */
43#define O_short O_md31
44/* near ptr X_add_symbol */
45#define O_near_ptr O_md30
46/* far ptr X_add_symbol */
47#define O_far_ptr O_md29
ee86248c 48/* byte ptr X_add_symbol */
7ac3eb25 49#define O_byte_ptr O_md28
ee86248c 50/* word ptr X_add_symbol */
7ac3eb25 51#define O_word_ptr O_md27
ee86248c 52/* dword ptr X_add_symbol */
7ac3eb25 53#define O_dword_ptr O_md26
ee86248c 54/* qword ptr X_add_symbol */
7ac3eb25 55#define O_qword_ptr O_md25
ee86248c 56/* oword ptr X_add_symbol */
7ac3eb25 57#define O_oword_ptr O_md24
ee86248c 58/* fword ptr X_add_symbol */
7ac3eb25 59#define O_fword_ptr O_md23
ee86248c 60/* tbyte ptr X_add_symbol */
7ac3eb25 61#define O_tbyte_ptr O_md22
ee86248c 62/* xmmword ptr X_add_symbol */
7ac3eb25 63#define O_xmmword_ptr O_md21
ee86248c 64/* ymmword ptr X_add_symbol */
7ac3eb25 65#define O_ymmword_ptr O_md20
ee86248c
JB
66
67static struct
68 {
69 const char *name;
1e9cc1c2 70 operatorT op;
ee86248c
JB
71 unsigned int operands;
72 }
73const i386_operators[] =
74 {
75 { "and", O_bit_and, 2 },
76 { "eq", O_eq, 2 },
77 { "ge", O_ge, 2 },
78 { "gt", O_gt, 2 },
79 { "le", O_le, 2 },
80 { "lt", O_lt, 2 },
81 { "mod", O_modulus, 2 },
82 { "ne", O_ne, 2 },
83 { "not", O_bit_not, 1 },
84 { "offset", O_offset, 1 },
85 { "or", O_bit_inclusive_or, 2 },
86 { "shl", O_left_shift, 2 },
87 { "short", O_short, 1 },
88 { "shr", O_right_shift, 2 },
89 { "xor", O_bit_exclusive_or, 2 },
90 { NULL, O_illegal, 0 }
91 };
92
93static struct
94 {
95 const char *name;
1e9cc1c2 96 operatorT op;
ee86248c
JB
97 unsigned short sz[3];
98 }
99const i386_types[] =
100 {
101#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
102 I386_TYPE(byte, 1),
103 I386_TYPE(word, 2),
104 I386_TYPE(dword, 4),
105 I386_TYPE(fword, 6),
106 I386_TYPE(qword, 8),
107 I386_TYPE(tbyte, 10),
108 I386_TYPE(oword, 16),
109 I386_TYPE(xmmword, 16),
110 I386_TYPE(ymmword, 32),
111#undef I386_TYPE
112 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
113 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
114 { NULL, O_illegal, { 0, 0, 0 } }
115 };
116
117operatorT i386_operator (const char *name, unsigned int operands, char *pc)
118{
119 unsigned int j;
120
121 if (!intel_syntax)
122 return O_absent;
123
124 if (!name)
125 {
126 if (operands != 2)
127 return O_illegal;
128 switch (*input_line_pointer)
129 {
130 case ':':
131 ++input_line_pointer;
132 return O_full_ptr;
133 case '[':
134 ++input_line_pointer;
135 return O_index;
136 case '@':
137 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
138 {
139 int adjust = 0;
140 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
141 &adjust,
142 &intel_state.reloc_types);
143
144 if (!gotfree_input_line)
145 break;
146 free (gotfree_input_line);
147 *input_line_pointer++ = '+';
148 memset (input_line_pointer, '0', adjust - 1);
149 input_line_pointer[adjust - 1] = ' ';
150 return O_add;
151 }
152 break;
153 }
154 return O_illegal;
155 }
156
157 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 158 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
159 {
160 if (i386_operators[j].operands
161 && i386_operators[j].operands != operands)
162 return O_illegal;
1e9cc1c2 163 return i386_operators[j].op;
ee86248c
JB
164 }
165
166 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 167 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c
JB
168 break;
169 if (i386_types[j].name && *pc == ' ')
170 {
91d6fa6a 171 char *pname = ++input_line_pointer;
ee86248c
JB
172 char c = get_symbol_end ();
173
91d6fa6a 174 if (strcasecmp (pname, "ptr") == 0)
ee86248c 175 {
91d6fa6a 176 pname[-1] = *pc;
ee86248c
JB
177 *pc = c;
178 if (intel_syntax > 0 || operands != 1)
179 return O_illegal;
1e9cc1c2 180 return i386_types[j].op;
ee86248c
JB
181 }
182
183 *input_line_pointer = c;
91d6fa6a 184 input_line_pointer = pname - 1;
ee86248c
JB
185 }
186
187 return O_absent;
188}
189
190static int i386_intel_parse_name (const char *name, expressionS *e)
191{
91d6fa6a 192 unsigned int j;
ee86248c 193
b7adb16d
JB
194 if (! strcmp (name, "$"))
195 {
196 current_location (e);
197 return 1;
198 }
199
91d6fa6a
NC
200 for (j = 0; i386_types[j].name; ++j)
201 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
202 {
203 e->X_op = O_constant;
91d6fa6a 204 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
205 e->X_add_symbol = NULL;
206 e->X_op_symbol = NULL;
207 return 1;
208 }
209
210 return 0;
211}
212
91d6fa6a 213static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 214 const reg_entry *base,
91d6fa6a 215 const reg_entry *iindex)
ee86248c 216{
f09c1772
L
217 if ((this_operand >= 0
218 && rreg != i.op[this_operand].regs)
219 || base != intel_state.base
220 || iindex != intel_state.index)
ee86248c
JB
221 {
222 as_bad (_("invalid use of register"));
223 return 0;
224 }
225 return 1;
226}
227
228static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
229{
27dee630 230 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
231 if (S_GET_SEGMENT (sym) == absolute_section)
232 {
233 offsetT val = e->X_add_number;
234
27dee630 235 *e = *exp;
ee86248c
JB
236 e->X_add_number += val;
237 }
238 else
239 {
27dee630
L
240 if (exp->X_op == O_symbol
241 && strcmp (S_GET_NAME (exp->X_add_symbol),
242 GLOBAL_OFFSET_TABLE_NAME) == 0)
243 sym = exp->X_add_symbol;
ee86248c
JB
244 e->X_add_symbol = sym;
245 e->X_op_symbol = NULL;
246 e->X_op = O_symbol;
247 }
248}
249
3c7b9c2c
L
250static int
251i386_intel_simplify_register (expressionS *e)
252{
253 int reg_num;
254
255 if (this_operand < 0 || intel_state.in_offset)
256 {
257 as_bad (_("invalid use of register"));
258 return 0;
259 }
260
261 if (e->X_op == O_register)
262 reg_num = e->X_add_number;
263 else
264 reg_num = e->X_md - 1;
265
266 if (!intel_state.in_bracket)
267 {
268 if (i.op[this_operand].regs)
269 {
270 as_bad (_("invalid use of register"));
271 return 0;
272 }
273 if (i386_regtab[reg_num].reg_type.bitfield.sreg3
274 && i386_regtab[reg_num].reg_num == RegFlat)
275 {
276 as_bad (_("invalid use of pseudo-register"));
277 return 0;
278 }
279 i.op[this_operand].regs = i386_regtab + reg_num;
280 }
9e2934f7
JB
281 else if (!intel_state.index
282 && (i386_regtab[reg_num].reg_type.bitfield.regxmm
283 || i386_regtab[reg_num].reg_type.bitfield.regymm))
284 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
285 else if (!intel_state.base && !intel_state.in_scale)
286 intel_state.base = i386_regtab + reg_num;
287 else if (!intel_state.index)
9e2934f7
JB
288 {
289 if (intel_state.in_scale
290 || i386_regtab[reg_num].reg_type.bitfield.baseindex)
291 intel_state.index = i386_regtab + reg_num;
292 else
293 {
294 /* Convert base to index and make ESP/RSP the base. */
295 intel_state.index = intel_state.base;
296 intel_state.base = i386_regtab + reg_num;
297 }
298 }
3c7b9c2c
L
299 else
300 {
301 /* esp is invalid as index */
8280f326 302 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
3c7b9c2c
L
303 }
304 return 2;
305}
306
ee86248c
JB
307static int i386_intel_simplify (expressionS *);
308
309static INLINE int i386_intel_simplify_symbol(symbolS *sym)
310{
311 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
312
313 if (ret == 2)
314 {
315 S_SET_SEGMENT(sym, absolute_section);
316 ret = 1;
317 }
318 return ret;
319}
320
321static int i386_intel_simplify (expressionS *e)
322{
f09c1772
L
323 const reg_entry *the_reg = (this_operand >= 0
324 ? i.op[this_operand].regs : NULL);
ee86248c 325 const reg_entry *base = intel_state.base;
91d6fa6a 326 const reg_entry *state_index = intel_state.index;
ee86248c
JB
327 int ret;
328
329 if (!intel_syntax)
330 return 1;
331
332 switch (e->X_op)
333 {
334 case O_index:
335 if (e->X_add_symbol)
336 {
337 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
338 || !i386_intel_check(the_reg, intel_state.base,
339 intel_state.index))
5bb3703f 340 return 0;
ee86248c
JB
341 }
342 if (!intel_state.in_offset)
343 ++intel_state.in_bracket;
344 ret = i386_intel_simplify_symbol (e->X_op_symbol);
345 if (!intel_state.in_offset)
346 --intel_state.in_bracket;
347 if (!ret)
348 return 0;
349 if (e->X_add_symbol)
350 e->X_op = O_add;
351 else
352 i386_intel_fold (e, e->X_op_symbol);
353 break;
354
355 case O_offset:
6cee4cda 356 intel_state.has_offset = 1;
ee86248c
JB
357 ++intel_state.in_offset;
358 ret = i386_intel_simplify_symbol (e->X_add_symbol);
359 --intel_state.in_offset;
91d6fa6a 360 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
361 return 0;
362 i386_intel_fold (e, e->X_add_symbol);
363 return ret;
364
365 case O_byte_ptr:
366 case O_word_ptr:
367 case O_dword_ptr:
368 case O_fword_ptr:
369 case O_qword_ptr:
370 case O_tbyte_ptr:
371 case O_oword_ptr:
372 case O_xmmword_ptr:
373 case O_ymmword_ptr:
374 case O_near_ptr:
375 case O_far_ptr:
376 if (intel_state.op_modifier == O_absent)
377 intel_state.op_modifier = e->X_op;
378 /* FALLTHROUGH */
379 case O_short:
f09c1772
L
380 if (symbol_get_value_expression (e->X_add_symbol)->X_op
381 == O_register)
ee86248c
JB
382 {
383 as_bad (_("invalid use of register"));
384 return 0;
385 }
386 if (!i386_intel_simplify_symbol (e->X_add_symbol))
387 return 0;
388 i386_intel_fold (e, e->X_add_symbol);
389 break;
390
391 case O_full_ptr:
f09c1772
L
392 if (symbol_get_value_expression (e->X_op_symbol)->X_op
393 == O_register)
ee86248c
JB
394 {
395 as_bad (_("invalid use of register"));
396 return 0;
397 }
398 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
399 || !i386_intel_check(the_reg, intel_state.base,
400 intel_state.index))
ee86248c
JB
401 return 0;
402 if (!intel_state.in_offset)
403 intel_state.seg = e->X_add_symbol;
404 i386_intel_fold (e, e->X_op_symbol);
405 break;
406
ee86248c
JB
407 case O_multiply:
408 if (this_operand >= 0 && intel_state.in_bracket)
409 {
410 expressionS *scale = NULL;
411
412 if (intel_state.index)
413 --scale;
414
415 if (!intel_state.in_scale++)
416 intel_state.scale_factor = 1;
417
418 ret = i386_intel_simplify_symbol (e->X_add_symbol);
419 if (ret && !scale && intel_state.index)
420 scale = symbol_get_value_expression (e->X_op_symbol);
421
422 if (ret)
423 ret = i386_intel_simplify_symbol (e->X_op_symbol);
424 if (ret && !scale && intel_state.index)
425 scale = symbol_get_value_expression (e->X_add_symbol);
426
427 if (ret && scale && (scale + 1))
428 {
429 resolve_expression (scale);
430 if (scale->X_op != O_constant
431 || intel_state.index->reg_type.bitfield.reg16)
432 scale->X_add_number = 0;
433 intel_state.scale_factor *= scale->X_add_number;
434 }
435
436 --intel_state.in_scale;
437 if (!ret)
438 return 0;
439
440 if (!intel_state.in_scale)
441 switch (intel_state.scale_factor)
442 {
443 case 1:
444 i.log2_scale_factor = 0;
445 break;
446 case 2:
447 i.log2_scale_factor = 1;
448 break;
449 case 4:
450 i.log2_scale_factor = 2;
451 break;
452 case 8:
453 i.log2_scale_factor = 3;
454 break;
455 default:
456 /* esp is invalid as index */
8280f326 457 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
ee86248c
JB
458 break;
459 }
460
461 break;
462 }
92b4f90c 463 goto fallthrough;
3c7b9c2c
L
464
465 case O_register:
466 ret = i386_intel_simplify_register (e);
467 if (ret == 2)
468 {
469 gas_assert (e->X_add_number < (unsigned short) -1);
470 e->X_md = (unsigned short) e->X_add_number + 1;
471 e->X_op = O_constant;
472 e->X_add_number = 0;
473 }
474 return ret;
475
476 case O_constant:
477 if (e->X_md)
478 return i386_intel_simplify_register (e);
479
ee86248c
JB
480 /* FALLTHROUGH */
481 default:
92b4f90c 482fallthrough:
f09c1772
L
483 if (e->X_add_symbol
484 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c
JB
485 return 0;
486 if (e->X_op == O_add || e->X_op == O_subtract)
487 {
488 base = intel_state.base;
91d6fa6a 489 state_index = intel_state.index;
ee86248c 490 }
91d6fa6a 491 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
492 || (e->X_op_symbol
493 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 494 || !i386_intel_check (the_reg,
f09c1772
L
495 (e->X_op != O_add
496 ? base : intel_state.base),
497 (e->X_op != O_add
498 ? state_index : intel_state.index)))
ee86248c
JB
499 return 0;
500 break;
501 }
502
f09c1772
L
503 if (this_operand >= 0
504 && e->X_op == O_symbol
505 && !intel_state.in_offset)
ee86248c
JB
506 {
507 segT seg = S_GET_SEGMENT (e->X_add_symbol);
508
509 if (seg != absolute_section
510 && seg != reg_section
511 && seg != expr_section)
512 intel_state.is_mem |= 2 - !intel_state.in_bracket;
513 }
514
515 return 1;
516}
517
518int i386_need_index_operator (void)
519{
520 return intel_syntax < 0;
521}
522
523static int
524i386_intel_operand (char *operand_string, int got_a_float)
525{
526 char *saved_input_line_pointer, *buf;
527 segT exp_seg;
528 expressionS exp, *expP;
529 char suffix = 0;
530 int ret;
531
532 /* Initialize state structure. */
533 intel_state.op_modifier = O_absent;
534 intel_state.is_mem = 0;
25303607 535 intel_state.is_indirect = 0;
1acf546e 536 intel_state.has_offset = 0;
ee86248c
JB
537 intel_state.base = NULL;
538 intel_state.index = NULL;
539 intel_state.seg = NULL;
540 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
541 gas_assert (!intel_state.in_offset);
542 gas_assert (!intel_state.in_bracket);
543 gas_assert (!intel_state.in_scale);
ee86248c
JB
544
545 saved_input_line_pointer = input_line_pointer;
546 input_line_pointer = buf = xstrdup (operand_string);
547
548 intel_syntax = -1;
549 memset (&exp, 0, sizeof(exp));
550 exp_seg = expression (&exp);
551 ret = i386_intel_simplify (&exp);
552 intel_syntax = 1;
553
554 SKIP_WHITESPACE ();
555 if (!is_end_of_line[(unsigned char) *input_line_pointer])
556 {
557 as_bad (_("junk `%s' after expression"), input_line_pointer);
558 ret = 0;
559 }
560 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
561 {
562 as_bad (_("invalid expression"));
563 ret = 0;
564 }
6cee4cda
L
565 else if (!intel_state.has_offset
566 && input_line_pointer > buf
567 && *(input_line_pointer - 1) == ']')
25303607
L
568 {
569 intel_state.is_mem |= 1;
570 intel_state.is_indirect = 1;
571 }
ee86248c
JB
572
573 input_line_pointer = saved_input_line_pointer;
574 free (buf);
575
9c2799c2
NC
576 gas_assert (!intel_state.in_offset);
577 gas_assert (!intel_state.in_bracket);
578 gas_assert (!intel_state.in_scale);
ee86248c
JB
579
580 if (!ret)
581 return 0;
582
583 if (intel_state.op_modifier != O_absent
584 && current_templates->start->base_opcode != 0x8d /* lea */)
585 {
586 i.types[this_operand].bitfield.unspecified = 0;
587
588 switch (intel_state.op_modifier)
589 {
590 case O_byte_ptr:
591 i.types[this_operand].bitfield.byte = 1;
592 suffix = BYTE_MNEM_SUFFIX;
593 break;
594
595 case O_word_ptr:
596 i.types[this_operand].bitfield.word = 1;
597 if ((current_templates->start->name[0] == 'l'
598 && current_templates->start->name[2] == 's'
599 && current_templates->start->name[3] == 0)
600 || current_templates->start->base_opcode == 0x62 /* bound */)
601 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
602 else if (got_a_float == 2) /* "fi..." */
603 suffix = SHORT_MNEM_SUFFIX;
604 else
605 suffix = WORD_MNEM_SUFFIX;
606 break;
607
608 case O_dword_ptr:
609 i.types[this_operand].bitfield.dword = 1;
610 if ((current_templates->start->name[0] == 'l'
611 && current_templates->start->name[2] == 's'
612 && current_templates->start->name[3] == 0)
613 || current_templates->start->base_opcode == 0x62 /* bound */)
614 suffix = WORD_MNEM_SUFFIX;
615 else if (flag_code == CODE_16BIT
616 && (current_templates->start->opcode_modifier.jump
617 || current_templates->start->opcode_modifier.jumpdword))
618 suffix = LONG_DOUBLE_MNEM_SUFFIX;
619 else if (got_a_float == 1) /* "f..." */
620 suffix = SHORT_MNEM_SUFFIX;
621 else
622 suffix = LONG_MNEM_SUFFIX;
623 break;
624
625 case O_fword_ptr:
626 i.types[this_operand].bitfield.fword = 1;
627 if (current_templates->start->name[0] == 'l'
628 && current_templates->start->name[2] == 's'
629 && current_templates->start->name[3] == 0)
630 suffix = LONG_MNEM_SUFFIX;
631 else if (!got_a_float)
632 {
633 if (flag_code == CODE_16BIT)
634 add_prefix (DATA_PREFIX_OPCODE);
635 suffix = LONG_DOUBLE_MNEM_SUFFIX;
636 }
637 else
638 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
639 break;
640
641 case O_qword_ptr:
642 i.types[this_operand].bitfield.qword = 1;
643 if (current_templates->start->base_opcode == 0x62 /* bound */
644 || got_a_float == 1) /* "f..." */
645 suffix = LONG_MNEM_SUFFIX;
646 else
647 suffix = QWORD_MNEM_SUFFIX;
648 break;
649
650 case O_tbyte_ptr:
651 i.types[this_operand].bitfield.tbyte = 1;
652 if (got_a_float == 1)
653 suffix = LONG_DOUBLE_MNEM_SUFFIX;
654 else
655 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
656 break;
657
658 case O_oword_ptr:
659 case O_xmmword_ptr:
660 i.types[this_operand].bitfield.xmmword = 1;
661 suffix = XMMWORD_MNEM_SUFFIX;
662 break;
663
664 case O_ymmword_ptr:
665 i.types[this_operand].bitfield.ymmword = 1;
666 suffix = YMMWORD_MNEM_SUFFIX;
667 break;
668
669 case O_far_ptr:
670 suffix = LONG_DOUBLE_MNEM_SUFFIX;
671 /* FALLTHROUGH */
672 case O_near_ptr:
673 if (!current_templates->start->opcode_modifier.jump
674 && !current_templates->start->opcode_modifier.jumpdword)
675 suffix = got_a_float /* so it will cause an error */
676 ? BYTE_MNEM_SUFFIX
677 : LONG_DOUBLE_MNEM_SUFFIX;
678 break;
679
680 default:
681 BAD_CASE (intel_state.op_modifier);
682 break;
683 }
684
685 if (!i.suffix)
686 i.suffix = suffix;
687 else if (i.suffix != suffix)
688 {
689 as_bad (_("conflicting operand size modifiers"));
690 return 0;
691 }
692 }
693
694 /* Operands for jump/call need special consideration. */
695 if (current_templates->start->opcode_modifier.jump
696 || current_templates->start->opcode_modifier.jumpdword
697 || current_templates->start->opcode_modifier.jumpintersegment)
698 {
f09c1772
L
699 if (i.op[this_operand].regs
700 || intel_state.base
701 || intel_state.index
ee86248c
JB
702 || intel_state.is_mem > 1)
703 i.types[this_operand].bitfield.jumpabsolute = 1;
704 else
705 switch (intel_state.op_modifier)
706 {
707 case O_near_ptr:
708 if (intel_state.seg)
709 i.types[this_operand].bitfield.jumpabsolute = 1;
710 else
711 intel_state.is_mem = 1;
712 break;
713 case O_far_ptr:
714 case O_absent:
715 if (!intel_state.seg)
716 {
717 intel_state.is_mem = 1;
718 if (intel_state.op_modifier == O_absent)
25303607
L
719 {
720 if (intel_state.is_indirect == 1)
721 i.types[this_operand].bitfield.jumpabsolute = 1;
722 break;
723 }
ee86248c
JB
724 as_bad (_("cannot infer the segment part of the operand"));
725 return 0;
726 }
727 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
728 i.types[this_operand].bitfield.jumpabsolute = 1;
729 else
730 {
731 i386_operand_type types;
732
733 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
734 {
735 as_bad (_("at most %d immediate operands are allowed"),
736 MAX_IMMEDIATE_OPERANDS);
737 return 0;
738 }
739 expP = &im_expressions[i.imm_operands++];
740 memset (expP, 0, sizeof(*expP));
741 expP->X_op = O_symbol;
742 expP->X_add_symbol = intel_state.seg;
743 i.op[this_operand].imms = expP;
744
745 resolve_expression (expP);
746 operand_type_set (&types, ~0);
747 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
748 expP, types, operand_string))
749 return 0;
750 if (i.operands < MAX_OPERANDS)
751 {
752 this_operand = i.operands++;
753 i.types[this_operand].bitfield.unspecified = 1;
754 }
755 if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
756 i.suffix = 0;
757 intel_state.seg = NULL;
758 intel_state.is_mem = 0;
759 }
760 break;
761 default:
762 i.types[this_operand].bitfield.jumpabsolute = 1;
763 break;
764 }
765 if (i.types[this_operand].bitfield.jumpabsolute)
766 intel_state.is_mem |= 1;
767 }
768 else if (intel_state.seg)
769 intel_state.is_mem |= 1;
770
771 if (i.op[this_operand].regs)
772 {
773 i386_operand_type temp;
774
775 /* Register operand. */
776 if (intel_state.base || intel_state.index || intel_state.seg)
777 {
778 as_bad (_("invalid operand"));
779 return 0;
780 }
781
782 temp = i.op[this_operand].regs->reg_type;
783 temp.bitfield.baseindex = 0;
f09c1772
L
784 i.types[this_operand] = operand_type_or (i.types[this_operand],
785 temp);
ee86248c
JB
786 i.types[this_operand].bitfield.unspecified = 0;
787 ++i.reg_operands;
788 }
f09c1772
L
789 else if (intel_state.base
790 || intel_state.index
791 || intel_state.seg
ee86248c
JB
792 || intel_state.is_mem)
793 {
794 /* Memory operand. */
faf786e6 795 if ((int) i.mem_operands
ee86248c
JB
796 >= 2 - !current_templates->start->opcode_modifier.isstring)
797 {
313c53d1
L
798 /* Handle
799
800 call 0x9090,0x90909090
801 lcall 0x9090,0x90909090
802 jmp 0x9090,0x90909090
803 ljmp 0x9090,0x90909090
804 */
805
806 if ((current_templates->start->opcode_modifier.jumpintersegment
807 || current_templates->start->opcode_modifier.jumpdword
808 || current_templates->start->opcode_modifier.jump)
809 && this_operand == 1
810 && intel_state.seg == NULL
811 && i.mem_operands == 1
812 && i.disp_operands == 1
813 && intel_state.op_modifier == O_absent)
814 {
815 /* Try to process the first operand as immediate, */
816 this_operand = 0;
817 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
818 intel_state.reloc_types,
819 NULL))
820 {
821 this_operand = 1;
822 expP = &im_expressions[0];
823 i.op[this_operand].imms = expP;
824 *expP = exp;
825
826 /* Try to process the second operand as immediate, */
827 if (i386_finalize_immediate (exp_seg, expP,
828 intel_state.reloc_types,
829 NULL))
830 {
831 i.mem_operands = 0;
832 i.disp_operands = 0;
833 i.imm_operands = 2;
834 i.types[0].bitfield.mem = 0;
835 i.types[0].bitfield.disp16 = 0;
836 i.types[0].bitfield.disp32 = 0;
837 i.types[0].bitfield.disp32s = 0;
838 return 1;
839 }
840 }
841 }
842
ee86248c
JB
843 as_bad (_("too many memory references for `%s'"),
844 current_templates->start->name);
845 return 0;
846 }
847
848 expP = &disp_expressions[i.disp_operands];
849 memcpy (expP, &exp, sizeof(exp));
850 resolve_expression (expP);
851
f09c1772
L
852 if (expP->X_op != O_constant
853 || expP->X_add_number
854 || (!intel_state.base
855 && !intel_state.index))
ee86248c
JB
856 {
857 i.op[this_operand].disps = expP;
858 i.disp_operands++;
859
860 if (flag_code == CODE_64BIT)
861 {
862 i.types[this_operand].bitfield.disp32 = 1;
863 if (!i.prefix[ADDR_PREFIX])
864 {
865 i.types[this_operand].bitfield.disp64 = 1;
866 i.types[this_operand].bitfield.disp32s = 1;
867 }
868 }
869 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
870 i.types[this_operand].bitfield.disp32 = 1;
871 else
872 i.types[this_operand].bitfield.disp16 = 1;
873
874#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
875 /*
876 * exp_seg is used only for verification in
877 * i386_finalize_displacement, and we can end up seeing reg_section
878 * here - but we know we removed all registers from the expression
879 * (or error-ed on any remaining ones) in i386_intel_simplify. I
880 * consider the check in i386_finalize_displacement bogus anyway, in
881 * particular because it doesn't allow for expr_section, so I'd
882 * rather see that check (and the similar one in
883 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
884 * expert I can't really say whether that would have other bad side
885 * effects.
886 */
887 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
888 && exp_seg == reg_section)
889 exp_seg = expP->X_op != O_constant ? undefined_section
890 : absolute_section;
891#endif
892
893 if (!i386_finalize_displacement (exp_seg, expP,
894 intel_state.reloc_types,
895 operand_string))
896 return 0;
897 }
898
899 if (intel_state.base || intel_state.index)
900 i.types[this_operand].bitfield.baseindex = 1;
901
902 if (intel_state.seg)
903 {
904 for (;;)
905 {
906 expP = symbol_get_value_expression (intel_state.seg);
907 if (expP->X_op != O_full_ptr)
908 break;
909 intel_state.seg = expP->X_add_symbol;
910 }
0398aac5 911 if (expP->X_op != O_register)
ee86248c
JB
912 {
913 as_bad (_("segment register name expected"));
914 return 0;
915 }
916 if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2
917 && !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3)
918 {
919 as_bad (_("invalid use of register"));
920 return 0;
921 }
922 switch (i386_regtab[expP->X_add_number].reg_num)
923 {
924 case 0: i.seg[i.mem_operands] = &es; break;
925 case 1: i.seg[i.mem_operands] = &cs; break;
926 case 2: i.seg[i.mem_operands] = &ss; break;
927 case 3: i.seg[i.mem_operands] = &ds; break;
928 case 4: i.seg[i.mem_operands] = &fs; break;
929 case 5: i.seg[i.mem_operands] = &gs; break;
930 case RegFlat: i.seg[i.mem_operands] = NULL; break;
931 }
932 }
933
934 /* Swap base and index in 16-bit memory operands like
935 [si+bx]. Since i386_index_check is also used in AT&T
936 mode we have to do that here. */
937 if (intel_state.base
938 && intel_state.index
939 && intel_state.base->reg_type.bitfield.reg16
940 && intel_state.index->reg_type.bitfield.reg16
941 && intel_state.base->reg_num >= 6
942 && intel_state.index->reg_num < 6)
943 {
944 i.base_reg = intel_state.index;
945 i.index_reg = intel_state.base;
946 }
947 else
948 {
949 i.base_reg = intel_state.base;
950 i.index_reg = intel_state.index;
951 }
952
953 if (!i386_index_check (operand_string))
954 return 0;
955
956 i.types[this_operand].bitfield.mem = 1;
957 ++i.mem_operands;
958 }
959 else
960 {
961 /* Immediate. */
962 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
963 {
964 as_bad (_("at most %d immediate operands are allowed"),
965 MAX_IMMEDIATE_OPERANDS);
966 return 0;
967 }
968
969 expP = &im_expressions[i.imm_operands++];
970 i.op[this_operand].imms = expP;
971 *expP = exp;
972
973 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
974 operand_string);
975 }
976
977 return 1;
978}