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ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
fd67aa11 2 Copyright (C) 2009-2024 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
33eaf5de 29 unsigned int in_scale; /* >=1 if processing multiplication operand
ee86248c
JB
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
f2f5811f
JB
55/* mmword ptr X_add_symbol */
56#define O_mmword_ptr O_qword_ptr
ee86248c 57/* fword ptr X_add_symbol */
7456d03d 58#define O_fword_ptr O_md24
ee86248c 59/* tbyte ptr X_add_symbol */
7456d03d
JB
60#define O_tbyte_ptr O_md23
61/* oword ptr X_add_symbol */
62#define O_oword_ptr O_md22
ee86248c 63/* xmmword ptr X_add_symbol */
7456d03d 64#define O_xmmword_ptr O_oword_ptr
ee86248c 65/* ymmword ptr X_add_symbol */
7456d03d 66#define O_ymmword_ptr O_md21
43234a1e 67/* zmmword ptr X_add_symbol */
7456d03d 68#define O_zmmword_ptr O_md20
ee86248c
JB
69
70static struct
71 {
72 const char *name;
1e9cc1c2 73 operatorT op;
ee86248c
JB
74 unsigned int operands;
75 }
76const i386_operators[] =
77 {
78 { "and", O_bit_and, 2 },
79 { "eq", O_eq, 2 },
80 { "ge", O_ge, 2 },
81 { "gt", O_gt, 2 },
82 { "le", O_le, 2 },
83 { "lt", O_lt, 2 },
84 { "mod", O_modulus, 2 },
85 { "ne", O_ne, 2 },
86 { "not", O_bit_not, 1 },
87 { "offset", O_offset, 1 },
88 { "or", O_bit_inclusive_or, 2 },
89 { "shl", O_left_shift, 2 },
90 { "short", O_short, 1 },
91 { "shr", O_right_shift, 2 },
92 { "xor", O_bit_exclusive_or, 2 },
93 { NULL, O_illegal, 0 }
94 };
95
96static struct
97 {
98 const char *name;
1e9cc1c2 99 operatorT op;
ee86248c
JB
100 unsigned short sz[3];
101 }
102const i386_types[] =
103 {
104#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
105 I386_TYPE(byte, 1),
106 I386_TYPE(word, 2),
107 I386_TYPE(dword, 4),
108 I386_TYPE(fword, 6),
109 I386_TYPE(qword, 8),
f2f5811f 110 I386_TYPE(mmword, 8),
ee86248c
JB
111 I386_TYPE(tbyte, 10),
112 I386_TYPE(oword, 16),
113 I386_TYPE(xmmword, 16),
114 I386_TYPE(ymmword, 32),
43234a1e 115 I386_TYPE(zmmword, 64),
ee86248c
JB
116#undef I386_TYPE
117 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
118 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
119 { NULL, O_illegal, { 0, 0, 0 } }
120 };
121
122operatorT i386_operator (const char *name, unsigned int operands, char *pc)
123{
124 unsigned int j;
125
b3983e5f
JB
126#ifdef SVR4_COMMENT_CHARS
127 if (!name && operands == 2 && *input_line_pointer == '\\')
128 switch (input_line_pointer[1])
129 {
130 case '/': input_line_pointer += 2; return O_divide;
131 case '%': input_line_pointer += 2; return O_modulus;
132 case '*': input_line_pointer += 2; return O_multiply;
133 }
134#endif
135
ee86248c
JB
136 if (!intel_syntax)
137 return O_absent;
138
139 if (!name)
140 {
141 if (operands != 2)
142 return O_illegal;
143 switch (*input_line_pointer)
144 {
145 case ':':
146 ++input_line_pointer;
147 return O_full_ptr;
148 case '[':
149 ++input_line_pointer;
150 return O_index;
151 case '@':
152 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
153 {
154 int adjust = 0;
155 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
156 &adjust,
d258b828 157 &intel_state.reloc_types);
ee86248c
JB
158
159 if (!gotfree_input_line)
160 break;
161 free (gotfree_input_line);
162 *input_line_pointer++ = '+';
163 memset (input_line_pointer, '0', adjust - 1);
164 input_line_pointer[adjust - 1] = ' ';
165 return O_add;
166 }
167 break;
168 }
169 return O_illegal;
170 }
171
6acf9130
JB
172 /* See the quotation related comment in i386_parse_name(). */
173 if (*pc == '"')
174 return O_absent;
175
ee86248c 176 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 177 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
178 {
179 if (i386_operators[j].operands
180 && i386_operators[j].operands != operands)
181 return O_illegal;
1e9cc1c2 182 return i386_operators[j].op;
ee86248c
JB
183 }
184
185 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 186 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c 187 break;
d02603dc 188
ee86248c
JB
189 if (i386_types[j].name && *pc == ' ')
190 {
a4f8c177 191 const char *start = ++input_line_pointer;
d02603dc 192 char *pname;
a4f8c177 193 char c = get_symbol_name (&pname);
d02603dc 194
a4f8c177 195 if (strcasecmp (pname, "ptr") == 0 && (c != '"' || pname == start))
ee86248c 196 {
91d6fa6a 197 pname[-1] = *pc;
ee86248c
JB
198 *pc = c;
199 if (intel_syntax > 0 || operands != 1)
200 return O_illegal;
1e9cc1c2 201 return i386_types[j].op;
ee86248c
JB
202 }
203
a4f8c177 204 if (strcasecmp (pname, "bcst") == 0 && (c != '"' || pname == start))
a5748e0d 205 {
a5748e0d
JB
206 pname[-1] = *pc;
207 *pc = c;
208 if (intel_syntax > 0 || operands != 1
209 || i386_types[j].sz[0] > 8
210 || (i386_types[j].sz[0] & (i386_types[j].sz[0] - 1)))
211 return O_illegal;
eb3f3841
JB
212 switch (i.encoding)
213 {
214 case encoding_default:
215 case encoding_egpr:
216 i.encoding = encoding_evex;
217 break;
218 case encoding_evex:
219 case encoding_evex512:
220 break;
221 default:
222 return O_illegal;
223 }
a5748e0d
JB
224 if (!i.broadcast.bytes && !i.broadcast.type)
225 {
226 i.broadcast.bytes = i386_types[j].sz[0];
227 i.broadcast.operand = this_operand;
228 }
229 return i386_types[j].op;
230 }
231
d02603dc 232 (void) restore_line_pointer (c);
91d6fa6a 233 input_line_pointer = pname - 1;
ee86248c
JB
234 }
235
236 return O_absent;
237}
238
239static int i386_intel_parse_name (const char *name, expressionS *e)
240{
91d6fa6a 241 unsigned int j;
ee86248c 242
b7adb16d
JB
243 if (! strcmp (name, "$"))
244 {
245 current_location (e);
246 return 1;
247 }
248
91d6fa6a
NC
249 for (j = 0; i386_types[j].name; ++j)
250 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
251 {
252 e->X_op = O_constant;
91d6fa6a 253 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
254 e->X_add_symbol = NULL;
255 e->X_op_symbol = NULL;
256 return 1;
257 }
258
259 return 0;
260}
261
91d6fa6a 262static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 263 const reg_entry *base,
91d6fa6a 264 const reg_entry *iindex)
ee86248c 265{
f09c1772
L
266 if ((this_operand >= 0
267 && rreg != i.op[this_operand].regs)
268 || base != intel_state.base
269 || iindex != intel_state.index)
ee86248c
JB
270 {
271 as_bad (_("invalid use of register"));
272 return 0;
273 }
274 return 1;
275}
276
277static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
278{
27dee630 279 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
280 if (S_GET_SEGMENT (sym) == absolute_section)
281 {
282 offsetT val = e->X_add_number;
283
27dee630 284 *e = *exp;
ee86248c
JB
285 e->X_add_number += val;
286 }
287 else
288 {
27dee630
L
289 if (exp->X_op == O_symbol
290 && strcmp (S_GET_NAME (exp->X_add_symbol),
291 GLOBAL_OFFSET_TABLE_NAME) == 0)
292 sym = exp->X_add_symbol;
ee86248c
JB
293 e->X_add_symbol = sym;
294 e->X_op_symbol = NULL;
295 e->X_op = O_symbol;
296 }
297}
298
3c7b9c2c
L
299static int
300i386_intel_simplify_register (expressionS *e)
301{
302 int reg_num;
303
304 if (this_operand < 0 || intel_state.in_offset)
305 {
306 as_bad (_("invalid use of register"));
307 return 0;
308 }
309
310 if (e->X_op == O_register)
311 reg_num = e->X_add_number;
312 else
313 reg_num = e->X_md - 1;
314
35015cd1
NC
315 if (reg_num < 0 || reg_num >= (int) i386_regtab_size)
316 {
317 as_bad (_("invalid register number"));
318 return 0;
319 }
320
4faaa10f
JB
321 if (!check_register (&i386_regtab[reg_num]))
322 {
323 as_bad (_("register '%s%s' cannot be used here"),
324 register_prefix, i386_regtab[reg_num].reg_name);
325 return 0;
326 }
327
3c7b9c2c
L
328 if (!intel_state.in_bracket)
329 {
330 if (i.op[this_operand].regs)
331 {
332 as_bad (_("invalid use of register"));
333 return 0;
334 }
0ff3b7d0
JB
335 if ((i386_regtab[reg_num].reg_type.bitfield.class == SReg
336 && i386_regtab[reg_num].reg_num == RegFlat)
337 || (dot_insn ()
338 && i386_regtab[reg_num].reg_type.bitfield.class == ClassNone))
3c7b9c2c
L
339 {
340 as_bad (_("invalid use of pseudo-register"));
341 return 0;
342 }
343 i.op[this_operand].regs = i386_regtab + reg_num;
344 }
9e2934f7 345 else if (!intel_state.index
1b54b8d7
JB
346 && (i386_regtab[reg_num].reg_type.bitfield.xmmword
347 || i386_regtab[reg_num].reg_type.bitfield.ymmword
348 || i386_regtab[reg_num].reg_type.bitfield.zmmword
e968fc9b 349 || i386_regtab[reg_num].reg_num == RegIZ))
9e2934f7 350 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
351 else if (!intel_state.base && !intel_state.in_scale)
352 intel_state.base = i386_regtab + reg_num;
353 else if (!intel_state.index)
9e2934f7 354 {
d3b01414 355 const insn_template *t = current_templates.start;
a152332d 356
9e2934f7 357 if (intel_state.in_scale
c47b4d71 358 || i386_regtab[reg_num].reg_type.bitfield.baseindex
0ff3b7d0 359 || dot_insn ()
c47b4d71
JB
360 || t->mnem_off == MN_bndmk
361 || t->mnem_off == MN_bndldx
362 || t->mnem_off == MN_bndstx)
9e2934f7
JB
363 intel_state.index = i386_regtab + reg_num;
364 else
365 {
366 /* Convert base to index and make ESP/RSP the base. */
367 intel_state.index = intel_state.base;
368 intel_state.base = i386_regtab + reg_num;
369 }
370 }
3c7b9c2c
L
371 else
372 {
373 /* esp is invalid as index */
34684862 374 intel_state.index = reg_eax + ESP_REG_NUM;
3c7b9c2c
L
375 }
376 return 2;
377}
378
2fbbadc2
AM
379static int
380i386_intel_simplify_symbol (symbolS *sym)
ee86248c 381{
2fbbadc2
AM
382 if (symbol_resolving_p (sym))
383 return 1;
ee86248c 384
2fbbadc2
AM
385 symbol_mark_resolving (sym);
386 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
ee86248c 387 if (ret == 2)
2fbbadc2
AM
388 {
389 S_SET_SEGMENT (sym, absolute_section);
390 ret = 1;
391 }
392 symbol_clear_resolving (sym);
ee86248c
JB
393 return ret;
394}
395
2fbbadc2
AM
396static int
397i386_intel_simplify (expressionS *e)
ee86248c 398{
f09c1772
L
399 const reg_entry *the_reg = (this_operand >= 0
400 ? i.op[this_operand].regs : NULL);
ee86248c 401 const reg_entry *base = intel_state.base;
91d6fa6a 402 const reg_entry *state_index = intel_state.index;
ee86248c
JB
403 int ret;
404
405 if (!intel_syntax)
406 return 1;
407
408 switch (e->X_op)
409 {
410 case O_index:
411 if (e->X_add_symbol)
412 {
413 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
414 || !i386_intel_check(the_reg, intel_state.base,
415 intel_state.index))
5bb3703f 416 return 0;
ee86248c
JB
417 }
418 if (!intel_state.in_offset)
419 ++intel_state.in_bracket;
420 ret = i386_intel_simplify_symbol (e->X_op_symbol);
421 if (!intel_state.in_offset)
422 --intel_state.in_bracket;
423 if (!ret)
424 return 0;
425 if (e->X_add_symbol)
426 e->X_op = O_add;
427 else
428 i386_intel_fold (e, e->X_op_symbol);
429 break;
430
431 case O_offset:
6cee4cda 432 intel_state.has_offset = 1;
ee86248c
JB
433 ++intel_state.in_offset;
434 ret = i386_intel_simplify_symbol (e->X_add_symbol);
435 --intel_state.in_offset;
91d6fa6a 436 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
437 return 0;
438 i386_intel_fold (e, e->X_add_symbol);
439 return ret;
440
441 case O_byte_ptr:
442 case O_word_ptr:
443 case O_dword_ptr:
444 case O_fword_ptr:
f2f5811f 445 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 446 case O_tbyte_ptr:
7456d03d 447 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 448 case O_ymmword_ptr:
43234a1e 449 case O_zmmword_ptr:
ee86248c
JB
450 case O_near_ptr:
451 case O_far_ptr:
452 if (intel_state.op_modifier == O_absent)
453 intel_state.op_modifier = e->X_op;
454 /* FALLTHROUGH */
455 case O_short:
f09c1772
L
456 if (symbol_get_value_expression (e->X_add_symbol)->X_op
457 == O_register)
ee86248c
JB
458 {
459 as_bad (_("invalid use of register"));
460 return 0;
461 }
462 if (!i386_intel_simplify_symbol (e->X_add_symbol))
463 return 0;
464 i386_intel_fold (e, e->X_add_symbol);
465 break;
466
467 case O_full_ptr:
f09c1772
L
468 if (symbol_get_value_expression (e->X_op_symbol)->X_op
469 == O_register)
ee86248c
JB
470 {
471 as_bad (_("invalid use of register"));
472 return 0;
473 }
474 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
475 || !i386_intel_check(the_reg, intel_state.base,
476 intel_state.index))
ee86248c
JB
477 return 0;
478 if (!intel_state.in_offset)
fd4e0347
JB
479 {
480 if (!intel_state.seg)
481 intel_state.seg = e->X_add_symbol;
482 else
483 {
484 expressionS exp;
485
486 exp.X_op = O_full_ptr;
487 exp.X_add_symbol = e->X_add_symbol;
488 exp.X_op_symbol = intel_state.seg;
489 intel_state.seg = make_expr_symbol (&exp);
490 }
491 }
ee86248c
JB
492 i386_intel_fold (e, e->X_op_symbol);
493 break;
494
ee86248c
JB
495 case O_multiply:
496 if (this_operand >= 0 && intel_state.in_bracket)
497 {
498 expressionS *scale = NULL;
c2a5914e 499 int has_index = (intel_state.index != NULL);
ee86248c
JB
500
501 if (!intel_state.in_scale++)
502 intel_state.scale_factor = 1;
503
504 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 505 if (ret && !has_index && intel_state.index)
ee86248c
JB
506 scale = symbol_get_value_expression (e->X_op_symbol);
507
508 if (ret)
509 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 510 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
511 scale = symbol_get_value_expression (e->X_add_symbol);
512
c2a5914e 513 if (ret && scale)
ee86248c
JB
514 {
515 resolve_expression (scale);
516 if (scale->X_op != O_constant
dc821c5f 517 || intel_state.index->reg_type.bitfield.word)
ee86248c
JB
518 scale->X_add_number = 0;
519 intel_state.scale_factor *= scale->X_add_number;
520 }
521
522 --intel_state.in_scale;
523 if (!ret)
524 return 0;
525
526 if (!intel_state.in_scale)
527 switch (intel_state.scale_factor)
528 {
529 case 1:
530 i.log2_scale_factor = 0;
531 break;
532 case 2:
533 i.log2_scale_factor = 1;
534 break;
535 case 4:
536 i.log2_scale_factor = 2;
537 break;
538 case 8:
539 i.log2_scale_factor = 3;
540 break;
541 default:
542 /* esp is invalid as index */
34684862 543 intel_state.index = reg_eax + ESP_REG_NUM;
ee86248c
JB
544 break;
545 }
546
547 break;
548 }
92b4f90c 549 goto fallthrough;
3c7b9c2c
L
550
551 case O_register:
552 ret = i386_intel_simplify_register (e);
553 if (ret == 2)
554 {
555 gas_assert (e->X_add_number < (unsigned short) -1);
556 e->X_md = (unsigned short) e->X_add_number + 1;
557 e->X_op = O_constant;
558 e->X_add_number = 0;
559 }
560 return ret;
561
562 case O_constant:
563 if (e->X_md)
564 return i386_intel_simplify_register (e);
565
ee86248c
JB
566 /* FALLTHROUGH */
567 default:
dc1e8a47 568 fallthrough:
f09c1772
L
569 if (e->X_add_symbol
570 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c 571 return 0;
64d23078
JB
572 if (!the_reg && this_operand >= 0
573 && e->X_op == O_symbol && !e->X_add_number)
574 the_reg = i.op[this_operand].regs;
ee86248c
JB
575 if (e->X_op == O_add || e->X_op == O_subtract)
576 {
577 base = intel_state.base;
91d6fa6a 578 state_index = intel_state.index;
ee86248c 579 }
91d6fa6a 580 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
581 || (e->X_op_symbol
582 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 583 || !i386_intel_check (the_reg,
f09c1772
L
584 (e->X_op != O_add
585 ? base : intel_state.base),
586 (e->X_op != O_add
587 ? state_index : intel_state.index)))
ee86248c
JB
588 return 0;
589 break;
590 }
591
f09c1772
L
592 if (this_operand >= 0
593 && e->X_op == O_symbol
594 && !intel_state.in_offset)
ee86248c
JB
595 {
596 segT seg = S_GET_SEGMENT (e->X_add_symbol);
597
598 if (seg != absolute_section
599 && seg != reg_section
600 && seg != expr_section)
601 intel_state.is_mem |= 2 - !intel_state.in_bracket;
602 }
603
604 return 1;
605}
606
607int i386_need_index_operator (void)
608{
609 return intel_syntax < 0;
610}
611
612static int
613i386_intel_operand (char *operand_string, int got_a_float)
614{
615 char *saved_input_line_pointer, *buf;
616 segT exp_seg;
617 expressionS exp, *expP;
618 char suffix = 0;
7063667e 619 bool rc_sae_modifier = i.rounding.type != rc_none && i.rounding.modifier;
ee86248c
JB
620 int ret;
621
43234a1e
L
622 /* Handle vector immediates. */
623 if (RC_SAE_immediate (operand_string))
cf665fee
JB
624 {
625 if (i.imm_operands)
626 {
627 as_bad (_("`%s': RC/SAE operand must precede immediate operands"),
d3b01414 628 insn_name (current_templates.start));
cf665fee
JB
629 return 0;
630 }
631
632 return 1;
633 }
43234a1e 634
ee86248c
JB
635 /* Initialize state structure. */
636 intel_state.op_modifier = O_absent;
637 intel_state.is_mem = 0;
25303607 638 intel_state.is_indirect = 0;
1acf546e 639 intel_state.has_offset = 0;
ee86248c
JB
640 intel_state.base = NULL;
641 intel_state.index = NULL;
642 intel_state.seg = NULL;
643 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
644 gas_assert (!intel_state.in_offset);
645 gas_assert (!intel_state.in_bracket);
646 gas_assert (!intel_state.in_scale);
ee86248c
JB
647
648 saved_input_line_pointer = input_line_pointer;
649 input_line_pointer = buf = xstrdup (operand_string);
650
651 intel_syntax = -1;
5cc00775 652 expr_mode = expr_operator_none;
ee86248c
JB
653 memset (&exp, 0, sizeof(exp));
654 exp_seg = expression (&exp);
655 ret = i386_intel_simplify (&exp);
656 intel_syntax = 1;
657
658 SKIP_WHITESPACE ();
43234a1e
L
659
660 /* Handle vector operations. */
661 if (*input_line_pointer == '{')
662 {
f70c6814 663 char *end = check_VecOperations (input_line_pointer);
43234a1e
L
664 if (end)
665 input_line_pointer = end;
666 else
667 ret = 0;
668 }
669
ee86248c
JB
670 if (!is_end_of_line[(unsigned char) *input_line_pointer])
671 {
38bf5113
JB
672 if (ret)
673 as_bad (_("junk `%s' after expression"), input_line_pointer);
ee86248c
JB
674 ret = 0;
675 }
676 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
677 {
38bf5113
JB
678 if (ret)
679 as_bad (_("invalid expression"));
ee86248c
JB
680 ret = 0;
681 }
6cee4cda
L
682 else if (!intel_state.has_offset
683 && input_line_pointer > buf
684 && *(input_line_pointer - 1) == ']')
25303607
L
685 {
686 intel_state.is_mem |= 1;
687 intel_state.is_indirect = 1;
688 }
ee86248c
JB
689
690 input_line_pointer = saved_input_line_pointer;
691 free (buf);
692
9c2799c2
NC
693 gas_assert (!intel_state.in_offset);
694 gas_assert (!intel_state.in_bracket);
695 gas_assert (!intel_state.in_scale);
ee86248c
JB
696
697 if (!ret)
698 return 0;
699
700 if (intel_state.op_modifier != O_absent
d3b01414 701 && current_templates.start->mnem_off != MN_lea)
ee86248c
JB
702 {
703 i.types[this_operand].bitfield.unspecified = 0;
704
705 switch (intel_state.op_modifier)
706 {
707 case O_byte_ptr:
708 i.types[this_operand].bitfield.byte = 1;
709 suffix = BYTE_MNEM_SUFFIX;
710 break;
711
712 case O_word_ptr:
713 i.types[this_operand].bitfield.word = 1;
37404387 714 if (got_a_float == 2) /* "fi..." */
ee86248c 715 suffix = SHORT_MNEM_SUFFIX;
d3b01414
JB
716 else if (current_templates.start->mnem_off != MN_lar
717 && current_templates.start->mnem_off != MN_lsl
718 && current_templates.start->mnem_off != MN_arpl)
ee86248c
JB
719 suffix = WORD_MNEM_SUFFIX;
720 break;
721
722 case O_dword_ptr:
723 i.types[this_operand].bitfield.dword = 1;
d3b01414
JB
724 if ((insn_name (current_templates.start)[0] == 'l'
725 && insn_name (current_templates.start)[2] == 's'
726 && insn_name (current_templates.start)[3] == 0)
727 || current_templates.start->mnem_off == MN_bound)
ee86248c 728 suffix = WORD_MNEM_SUFFIX;
d488367a 729 else if (flag_code != CODE_32BIT
d3b01414
JB
730 && (current_templates.start->opcode_modifier.jump == JUMP
731 || current_templates.start->opcode_modifier.jump
0cfa3eb3 732 == JUMP_DWORD))
a4d3acd2
JB
733 {
734 i.far_branch = true;
735 suffix = WORD_MNEM_SUFFIX;
736 }
ee86248c
JB
737 else if (got_a_float == 1) /* "f..." */
738 suffix = SHORT_MNEM_SUFFIX;
739 else
740 suffix = LONG_MNEM_SUFFIX;
741 break;
742
743 case O_fword_ptr:
744 i.types[this_operand].bitfield.fword = 1;
d3b01414
JB
745 if (current_templates.start->mnem_off == MN_les
746 || current_templates.start->mnem_off == MN_lds
747 || current_templates.start->mnem_off == MN_lss
748 || current_templates.start->mnem_off == MN_lfs
749 || current_templates.start->mnem_off == MN_lgs)
ee86248c
JB
750 suffix = LONG_MNEM_SUFFIX;
751 else if (!got_a_float)
752 {
753 if (flag_code == CODE_16BIT)
754 add_prefix (DATA_PREFIX_OPCODE);
a4d3acd2 755 i.far_branch = true;
ee86248c 756 }
ee86248c
JB
757 break;
758
f2f5811f 759 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 760 i.types[this_operand].bitfield.qword = 1;
d3b01414 761 if (current_templates.start->mnem_off == MN_bound
ee86248c
JB
762 || got_a_float == 1) /* "f..." */
763 suffix = LONG_MNEM_SUFFIX;
764 else
765 suffix = QWORD_MNEM_SUFFIX;
766 break;
767
768 case O_tbyte_ptr:
769 i.types[this_operand].bitfield.tbyte = 1;
f210f0a0
JB
770 if (got_a_float)
771 break;
772 if (flag_code == CODE_64BIT
d3b01414
JB
773 && (current_templates.start->operand_types[0].bitfield.fword
774 || current_templates.start->operand_types[0].bitfield.tbyte
775 || current_templates.start->opcode_modifier.jump == JUMP_DWORD
776 || current_templates.start->opcode_modifier.jump == JUMP))
5990e377 777 suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt, call, jmp */
ee86248c 778 else
a8f4f6b9 779 i.types[this_operand].bitfield.byte = 1; /* cause an error */
ee86248c
JB
780 break;
781
7456d03d 782 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 783 i.types[this_operand].bitfield.xmmword = 1;
ee86248c
JB
784 break;
785
786 case O_ymmword_ptr:
4fc85f37
JB
787 if (vector_size < VSZ256)
788 {
789 as_bad (_("256-bit operands disabled"));
790 return 0;
791 }
ee86248c 792 i.types[this_operand].bitfield.ymmword = 1;
ee86248c
JB
793 break;
794
43234a1e 795 case O_zmmword_ptr:
4fc85f37
JB
796 if (vector_size < VSZ512)
797 {
798 as_bad (_("512-bit operands disabled"));
799 return 0;
800 }
43234a1e 801 i.types[this_operand].bitfield.zmmword = 1;
43234a1e
L
802 break;
803
ee86248c 804 case O_far_ptr:
a4d3acd2 805 i.far_branch = true;
ee86248c
JB
806 /* FALLTHROUGH */
807 case O_near_ptr:
d3b01414
JB
808 if (current_templates.start->opcode_modifier.jump != JUMP
809 && current_templates.start->opcode_modifier.jump != JUMP_DWORD)
164d49cb
JB
810 {
811 /* cause an error */
812 i.types[this_operand].bitfield.byte = 1;
813 i.types[this_operand].bitfield.tbyte = 1;
814 suffix = i.suffix;
815 }
ee86248c
JB
816 break;
817
818 default:
819 BAD_CASE (intel_state.op_modifier);
820 break;
821 }
822
1cb0ab18
JB
823 /* Now check whether we actually want to infer an AT&T-like suffix.
824 We really only need to do this when operand size determination (incl.
825 REX.W) is going to be derived from it. For this we check whether the
826 given suffix is valid for any of the candidate templates. */
827 if (suffix && suffix != i.suffix
d3b01414 828 && current_templates.start->mnem_off != MN_bound)
1cb0ab18
JB
829 {
830 const insn_template *t;
831
d3b01414 832 for (t = current_templates.start; t < current_templates.end; ++t)
1cb0ab18
JB
833 {
834 /* Operands haven't been swapped yet. */
835 unsigned int op = t->operands - 1 - this_operand;
836
837 /* Easy checks to skip templates which won't match anyway. */
7d3182d6 838 if (this_operand >= t->operands
35266cb1 839 || t->opcode_modifier.dialect >= ATT_SYNTAX)
1cb0ab18
JB
840 continue;
841
842 switch (suffix)
843 {
844 case BYTE_MNEM_SUFFIX:
845 if (t->opcode_modifier.no_bsuf)
846 continue;
847 break;
848 case WORD_MNEM_SUFFIX:
849 if (t->opcode_modifier.no_wsuf)
850 continue;
851 break;
852 case LONG_MNEM_SUFFIX:
853 if (t->opcode_modifier.no_lsuf)
854 continue;
855 break;
856 case QWORD_MNEM_SUFFIX:
9db83a32 857 if (t->opcode_modifier.no_qsuf || !q_suffix_allowed (t))
1cb0ab18
JB
858 continue;
859 break;
860 case SHORT_MNEM_SUFFIX:
861 if (t->opcode_modifier.no_ssuf)
862 continue;
863 break;
1cb0ab18
JB
864 default:
865 abort ();
866 }
867
fcaf78fe
JB
868 /* We can skip templates with swappable operands here, as one
869 operand will be a register, which operand size can be
870 determined from. */
871 if (t->opcode_modifier.d)
872 continue;
873
1cb0ab18
JB
874 /* In a few cases suffixes are permitted, but we can nevertheless
875 derive that these aren't going to be needed. This is only of
fcaf78fe
JB
876 interest for insns using ModR/M. */
877 if (!t->opcode_modifier.modrm)
1cb0ab18
JB
878 break;
879
880 if (!t->operand_types[op].bitfield.baseindex)
881 continue;
882
883 switch (t->operand_types[op].bitfield.class)
884 {
885 case RegMMX:
886 case RegSIMD:
887 case RegMask:
888 continue;
889 }
890
891 break;
892 }
893
d3b01414 894 if (t == current_templates.end)
1cb0ab18
JB
895 suffix = 0;
896 }
897
ee86248c
JB
898 if (!i.suffix)
899 i.suffix = suffix;
1cb0ab18 900 else if (suffix && i.suffix != suffix)
ee86248c
JB
901 {
902 as_bad (_("conflicting operand size modifiers"));
903 return 0;
904 }
905 }
906
907 /* Operands for jump/call need special consideration. */
d3b01414
JB
908 if (current_templates.start->opcode_modifier.jump == JUMP
909 || current_templates.start->opcode_modifier.jump == JUMP_DWORD
910 || current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT)
ee86248c 911 {
5b7c81bd 912 bool jumpabsolute = false;
6f2f06be 913
f09c1772
L
914 if (i.op[this_operand].regs
915 || intel_state.base
916 || intel_state.index
ee86248c 917 || intel_state.is_mem > 1)
5b7c81bd 918 jumpabsolute = true;
ee86248c
JB
919 else
920 switch (intel_state.op_modifier)
921 {
922 case O_near_ptr:
923 if (intel_state.seg)
5b7c81bd 924 jumpabsolute = true;
ee86248c
JB
925 else
926 intel_state.is_mem = 1;
927 break;
928 case O_far_ptr:
929 case O_absent:
930 if (!intel_state.seg)
931 {
932 intel_state.is_mem = 1;
933 if (intel_state.op_modifier == O_absent)
25303607
L
934 {
935 if (intel_state.is_indirect == 1)
5b7c81bd 936 jumpabsolute = true;
25303607
L
937 break;
938 }
ee86248c
JB
939 as_bad (_("cannot infer the segment part of the operand"));
940 return 0;
941 }
942 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
a4d3acd2
JB
943 {
944 jumpabsolute = true;
945 if (intel_state.op_modifier == O_far_ptr)
946 i.far_branch = true;
947 }
ee86248c
JB
948 else
949 {
950 i386_operand_type types;
951
952 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
953 {
954 as_bad (_("at most %d immediate operands are allowed"),
955 MAX_IMMEDIATE_OPERANDS);
956 return 0;
957 }
958 expP = &im_expressions[i.imm_operands++];
959 memset (expP, 0, sizeof(*expP));
960 expP->X_op = O_symbol;
961 expP->X_add_symbol = intel_state.seg;
962 i.op[this_operand].imms = expP;
963
964 resolve_expression (expP);
965 operand_type_set (&types, ~0);
966 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
967 expP, types, operand_string))
968 return 0;
969 if (i.operands < MAX_OPERANDS)
970 {
971 this_operand = i.operands++;
972 i.types[this_operand].bitfield.unspecified = 1;
973 }
ee86248c
JB
974 intel_state.seg = NULL;
975 intel_state.is_mem = 0;
976 }
977 break;
978 default:
5b7c81bd 979 jumpabsolute = true;
ee86248c
JB
980 break;
981 }
6f2f06be
JB
982 if (jumpabsolute)
983 {
5b7c81bd 984 i.jumpabsolute = true;
6f2f06be
JB
985 intel_state.is_mem |= 1;
986 }
ee86248c
JB
987 }
988 else if (intel_state.seg)
989 intel_state.is_mem |= 1;
990
991 if (i.op[this_operand].regs)
992 {
993 i386_operand_type temp;
994
995 /* Register operand. */
c032bc4f
JB
996 if (intel_state.base || intel_state.index || intel_state.seg
997 || i.imm_bits[this_operand])
ee86248c
JB
998 {
999 as_bad (_("invalid operand"));
1000 return 0;
1001 }
1002
1003 temp = i.op[this_operand].regs->reg_type;
1004 temp.bitfield.baseindex = 0;
f09c1772
L
1005 i.types[this_operand] = operand_type_or (i.types[this_operand],
1006 temp);
ee86248c
JB
1007 i.types[this_operand].bitfield.unspecified = 0;
1008 ++i.reg_operands;
cf665fee 1009
7063667e
JB
1010 if ((i.rounding.type != rc_none && !i.rounding.modifier
1011 && temp.bitfield.class != Reg)
1012 || rc_sae_modifier)
cf665fee
JB
1013 {
1014 unsigned int j;
1015
1016 for (j = 0; j < ARRAY_SIZE (RC_NamesTable); ++j)
1017 if (i.rounding.type == RC_NamesTable[j].type)
1018 break;
1019 as_bad (_("`%s': misplaced `{%s}'"),
d3b01414 1020 insn_name (current_templates.start), RC_NamesTable[j].name);
cf665fee
JB
1021 return 0;
1022 }
ee86248c 1023 }
f09c1772
L
1024 else if (intel_state.base
1025 || intel_state.index
1026 || intel_state.seg
ee86248c
JB
1027 || intel_state.is_mem)
1028 {
1029 /* Memory operand. */
c032bc4f
JB
1030 if (i.imm_bits[this_operand])
1031 {
1032 as_bad (_("invalid operand"));
1033 return 0;
1034 }
1035
04784e33 1036 if (i.mem_operands)
ee86248c 1037 {
313c53d1
L
1038 /* Handle
1039
1040 call 0x9090,0x90909090
1041 lcall 0x9090,0x90909090
1042 jmp 0x9090,0x90909090
1043 ljmp 0x9090,0x90909090
1044 */
1045
d3b01414
JB
1046 if ((current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT
1047 || current_templates.start->opcode_modifier.jump == JUMP_DWORD
1048 || current_templates.start->opcode_modifier.jump == JUMP)
313c53d1
L
1049 && this_operand == 1
1050 && intel_state.seg == NULL
1051 && i.mem_operands == 1
1052 && i.disp_operands == 1
1053 && intel_state.op_modifier == O_absent)
1054 {
1055 /* Try to process the first operand as immediate, */
1056 this_operand = 0;
1057 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
1058 intel_state.reloc_types,
1059 NULL))
1060 {
1061 this_operand = 1;
1062 expP = &im_expressions[0];
1063 i.op[this_operand].imms = expP;
1064 *expP = exp;
1065
1066 /* Try to process the second operand as immediate, */
1067 if (i386_finalize_immediate (exp_seg, expP,
1068 intel_state.reloc_types,
1069 NULL))
1070 {
1071 i.mem_operands = 0;
1072 i.disp_operands = 0;
1073 i.imm_operands = 2;
c48dadc9 1074 i.flags[0] &= ~Operand_Mem;
313c53d1
L
1075 i.types[0].bitfield.disp16 = 0;
1076 i.types[0].bitfield.disp32 = 0;
313c53d1
L
1077 return 1;
1078 }
1079 }
1080 }
ee86248c
JB
1081 }
1082
2abc2bec
JB
1083 /* Swap base and index in 16-bit memory operands like
1084 [si+bx]. Since i386_index_check is also used in AT&T
1085 mode we have to do this here. */
1086 if (intel_state.base
1087 && intel_state.index
dc821c5f
JB
1088 && intel_state.base->reg_type.bitfield.word
1089 && intel_state.index->reg_type.bitfield.word
2abc2bec
JB
1090 && intel_state.base->reg_num >= 6
1091 && intel_state.index->reg_num < 6)
1092 {
1093 i.base_reg = intel_state.index;
1094 i.index_reg = intel_state.base;
1095 }
1096 else
1097 {
1098 i.base_reg = intel_state.base;
1099 i.index_reg = intel_state.index;
1100 }
1101
1102 if (i.base_reg || i.index_reg)
1103 i.types[this_operand].bitfield.baseindex = 1;
1104
ee86248c
JB
1105 expP = &disp_expressions[i.disp_operands];
1106 memcpy (expP, &exp, sizeof(exp));
1107 resolve_expression (expP);
1108
f09c1772
L
1109 if (expP->X_op != O_constant
1110 || expP->X_add_number
2abc2bec 1111 || !i.types[this_operand].bitfield.baseindex)
ee86248c
JB
1112 {
1113 i.op[this_operand].disps = expP;
1114 i.disp_operands++;
1115
2abc2bec
JB
1116 i386_addressing_mode ();
1117
ee86248c
JB
1118 if (flag_code == CODE_64BIT)
1119 {
a775efc8 1120 i.types[this_operand].bitfield.disp32 = 1;
ee86248c 1121 if (!i.prefix[ADDR_PREFIX])
a775efc8 1122 i.types[this_operand].bitfield.disp64 = 1;
ee86248c
JB
1123 }
1124 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
1125 i.types[this_operand].bitfield.disp32 = 1;
1126 else
1127 i.types[this_operand].bitfield.disp16 = 1;
1128
1129#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
1130 /*
1131 * exp_seg is used only for verification in
1132 * i386_finalize_displacement, and we can end up seeing reg_section
1133 * here - but we know we removed all registers from the expression
1134 * (or error-ed on any remaining ones) in i386_intel_simplify. I
1135 * consider the check in i386_finalize_displacement bogus anyway, in
1136 * particular because it doesn't allow for expr_section, so I'd
1137 * rather see that check (and the similar one in
1138 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
1139 * expert I can't really say whether that would have other bad side
1140 * effects.
1141 */
1142 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
1143 && exp_seg == reg_section)
1144 exp_seg = expP->X_op != O_constant ? undefined_section
1145 : absolute_section;
1146#endif
1147
1148 if (!i386_finalize_displacement (exp_seg, expP,
1149 intel_state.reloc_types,
1150 operand_string))
1151 return 0;
1152 }
1153
ee86248c
JB
1154 if (intel_state.seg)
1155 {
fd4e0347 1156 for (ret = check_none; ; ret = operand_check)
e21440ba
JB
1157 {
1158 expP = symbol_get_value_expression (intel_state.seg);
fd4e0347
JB
1159 if (expP->X_op != O_full_ptr
1160 || symbol_get_value_expression (expP->X_op_symbol)->X_op
1161 != O_register)
e21440ba
JB
1162 break;
1163 intel_state.seg = expP->X_add_symbol;
1164 }
0398aac5 1165 if (expP->X_op != O_register)
ee86248c
JB
1166 {
1167 as_bad (_("segment register name expected"));
1168 return 0;
1169 }
00cee14f 1170 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg)
ee86248c
JB
1171 {
1172 as_bad (_("invalid use of register"));
1173 return 0;
1174 }
fd4e0347
JB
1175 switch (ret)
1176 {
1177 case check_error:
1178 as_bad (_("redundant segment overrides"));
1179 return 0;
1180 case check_warning:
1181 as_warn (_("redundant segment overrides"));
1182 break;
1183 }
5e042380
JB
1184 if (i386_regtab[expP->X_add_number].reg_num == RegFlat)
1185 i.seg[i.mem_operands] = NULL;
1186 else
1187 i.seg[i.mem_operands] = &i386_regtab[expP->X_add_number];
ee86248c
JB
1188 }
1189
ee86248c
JB
1190 if (!i386_index_check (operand_string))
1191 return 0;
1192
c48dadc9 1193 i.flags[this_operand] |= Operand_Mem;
ee86248c
JB
1194 ++i.mem_operands;
1195 }
1196 else
1197 {
1198 /* Immediate. */
1199 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
1200 {
1201 as_bad (_("at most %d immediate operands are allowed"),
1202 MAX_IMMEDIATE_OPERANDS);
1203 return 0;
1204 }
1205
1206 expP = &im_expressions[i.imm_operands++];
1207 i.op[this_operand].imms = expP;
1208 *expP = exp;
1209
1210 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
1211 operand_string);
1212 }
1213
1214 return 1;
1215}