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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
d6afba4b JJ |
2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
3 | Free Software Foundation, Inc. | |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
54 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) | |
55 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) | |
56 | ||
57 | #define NUM_SLOTS 4 | |
58 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
59 | #define CURR_SLOT md.slot[md.curr_slot] | |
60 | ||
61 | #define O_pseudo_fixup (O_max + 1) | |
62 | ||
63 | enum special_section | |
64 | { | |
557debba | 65 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
66 | SPECIAL_SECTION_BSS = 0, |
67 | SPECIAL_SECTION_SBSS, | |
68 | SPECIAL_SECTION_SDATA, | |
69 | SPECIAL_SECTION_RODATA, | |
70 | SPECIAL_SECTION_COMMENT, | |
71 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
72 | SPECIAL_SECTION_UNWIND_INFO, |
73 | /* HPUX specific section pseudo-ops. */ | |
74 | SPECIAL_SECTION_INIT_ARRAY, | |
75 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
76 | }; |
77 | ||
78 | enum reloc_func | |
79 | { | |
13ae64f3 JJ |
80 | FUNC_DTP_MODULE, |
81 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
82 | FUNC_FPTR_RELATIVE, |
83 | FUNC_GP_RELATIVE, | |
84 | FUNC_LT_RELATIVE, | |
fa2c7eff | 85 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 86 | FUNC_PC_RELATIVE, |
800eeca4 JW |
87 | FUNC_PLT_RELATIVE, |
88 | FUNC_SEC_RELATIVE, | |
89 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 90 | FUNC_TP_RELATIVE, |
800eeca4 JW |
91 | FUNC_LTV_RELATIVE, |
92 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
93 | FUNC_LT_DTP_MODULE, |
94 | FUNC_LT_DTP_RELATIVE, | |
95 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 96 | FUNC_IPLT_RELOC, |
800eeca4 JW |
97 | }; |
98 | ||
99 | enum reg_symbol | |
100 | { | |
101 | REG_GR = 0, | |
102 | REG_FR = (REG_GR + 128), | |
103 | REG_AR = (REG_FR + 128), | |
104 | REG_CR = (REG_AR + 128), | |
105 | REG_P = (REG_CR + 128), | |
106 | REG_BR = (REG_P + 64), | |
107 | REG_IP = (REG_BR + 8), | |
108 | REG_CFM, | |
109 | REG_PR, | |
110 | REG_PR_ROT, | |
111 | REG_PSR, | |
112 | REG_PSR_L, | |
113 | REG_PSR_UM, | |
114 | /* The following are pseudo-registers for use by gas only. */ | |
115 | IND_CPUID, | |
116 | IND_DBR, | |
117 | IND_DTR, | |
118 | IND_ITR, | |
119 | IND_IBR, | |
120 | IND_MEM, | |
121 | IND_MSR, | |
122 | IND_PKR, | |
123 | IND_PMC, | |
124 | IND_PMD, | |
125 | IND_RR, | |
542d6675 | 126 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
127 | REG_PSP, |
128 | REG_PRIUNAT, | |
800eeca4 JW |
129 | REG_NUM |
130 | }; | |
131 | ||
132 | enum dynreg_type | |
133 | { | |
134 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
135 | DYNREG_FR, /* dynamic floating point register */ | |
136 | DYNREG_PR, /* dynamic predicate register */ | |
137 | DYNREG_NUM_TYPES | |
138 | }; | |
139 | ||
87f8eb97 JW |
140 | enum operand_match_result |
141 | { | |
142 | OPERAND_MATCH, | |
143 | OPERAND_OUT_OF_RANGE, | |
144 | OPERAND_MISMATCH | |
145 | }; | |
146 | ||
800eeca4 JW |
147 | /* On the ia64, we can't know the address of a text label until the |
148 | instructions are packed into a bundle. To handle this, we keep | |
149 | track of the list of labels that appear in front of each | |
150 | instruction. */ | |
151 | struct label_fix | |
542d6675 KH |
152 | { |
153 | struct label_fix *next; | |
154 | struct symbol *sym; | |
155 | }; | |
800eeca4 | 156 | |
549f748d | 157 | /* This is the endianness of the current section. */ |
800eeca4 JW |
158 | extern int target_big_endian; |
159 | ||
549f748d JW |
160 | /* This is the default endianness. */ |
161 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
162 | ||
10a98291 L |
163 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
164 | ||
165 | static void ia64_float_to_chars_bigendian | |
166 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
167 | static void ia64_float_to_chars_littleendian | |
168 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
169 | static void (*ia64_float_to_chars) | |
170 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
171 | ||
35f5df7f L |
172 | static struct hash_control *alias_hash; |
173 | static struct hash_control *alias_name_hash; | |
174 | static struct hash_control *secalias_hash; | |
175 | static struct hash_control *secalias_name_hash; | |
176 | ||
2fac3d48 JB |
177 | /* List of chars besides those in app.c:symbol_chars that can start an |
178 | operand. Used to prevent the scrubber eating vital white-space. */ | |
179 | const char ia64_symbol_chars[] = "@?"; | |
180 | ||
800eeca4 JW |
181 | /* Characters which always start a comment. */ |
182 | const char comment_chars[] = ""; | |
183 | ||
184 | /* Characters which start a comment at the beginning of a line. */ | |
185 | const char line_comment_chars[] = "#"; | |
186 | ||
187 | /* Characters which may be used to separate multiple commands on a | |
188 | single line. */ | |
189 | const char line_separator_chars[] = ";"; | |
190 | ||
191 | /* Characters which are used to indicate an exponent in a floating | |
192 | point number. */ | |
193 | const char EXP_CHARS[] = "eE"; | |
194 | ||
195 | /* Characters which mean that a number is a floating point constant, | |
196 | as in 0d1.0. */ | |
197 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
198 | ||
542d6675 | 199 | /* ia64-specific option processing: */ |
800eeca4 | 200 | |
44f5c83a | 201 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
202 | |
203 | struct option md_longopts[] = | |
204 | { | |
c43c2cc5 JW |
205 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
206 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
207 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
208 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
209 | }; |
210 | ||
211 | size_t md_longopts_size = sizeof (md_longopts); | |
212 | ||
213 | static struct | |
214 | { | |
215 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
216 | struct hash_control *reg_hash; /* register name hash table */ | |
217 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
218 | struct hash_control *const_hash; /* constant hash table */ | |
219 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
220 | ||
221 | symbolS *regsym[REG_NUM]; | |
222 | ||
223 | /* If X_op is != O_absent, the registername for the instruction's | |
224 | qualifying predicate. If NULL, p0 is assumed for instructions | |
225 | that are predicatable. */ | |
226 | expressionS qp; | |
227 | ||
228 | unsigned int | |
197865e8 | 229 | manual_bundling : 1, |
800eeca4 JW |
230 | debug_dv: 1, |
231 | detect_dv: 1, | |
232 | explicit_mode : 1, /* which mode we're in */ | |
233 | default_explicit_mode : 1, /* which mode is the default */ | |
234 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
235 | auto_align : 1, |
236 | keep_pending_output : 1; | |
800eeca4 | 237 | |
970d6792 L |
238 | /* What to do when something is wrong with unwind directives. */ |
239 | enum | |
240 | { | |
241 | unwind_check_warning, | |
242 | unwind_check_error | |
243 | } unwind_check; | |
244 | ||
800eeca4 JW |
245 | /* Each bundle consists of up to three instructions. We keep |
246 | track of four most recent instructions so we can correctly set | |
197865e8 | 247 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
248 | int curr_slot; |
249 | int num_slots_in_use; | |
250 | struct slot | |
251 | { | |
252 | unsigned int | |
253 | end_of_insn_group : 1, | |
254 | manual_bundling_on : 1, | |
196e8040 JW |
255 | manual_bundling_off : 1, |
256 | loc_directive_seen : 1; | |
800eeca4 JW |
257 | signed char user_template; /* user-selected template, if any */ |
258 | unsigned char qp_regno; /* qualifying predicate */ | |
259 | /* This duplicates a good fraction of "struct fix" but we | |
260 | can't use a "struct fix" instead since we can't call | |
261 | fix_new_exp() until we know the address of the instruction. */ | |
262 | int num_fixups; | |
263 | struct insn_fix | |
264 | { | |
265 | bfd_reloc_code_real_type code; | |
266 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
267 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
268 | expressionS expr; /* the value to be inserted */ | |
269 | } | |
270 | fixup[2]; /* at most two fixups per insn */ | |
271 | struct ia64_opcode *idesc; | |
272 | struct label_fix *label_fixups; | |
f1bcba5b | 273 | struct label_fix *tag_fixups; |
800eeca4 JW |
274 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
275 | expressionS opnd[6]; | |
276 | char *src_file; | |
277 | unsigned int src_line; | |
278 | struct dwarf2_line_info debug_line; | |
279 | } | |
280 | slot[NUM_SLOTS]; | |
281 | ||
282 | segT last_text_seg; | |
283 | ||
284 | struct dynreg | |
285 | { | |
286 | struct dynreg *next; /* next dynamic register */ | |
287 | const char *name; | |
288 | unsigned short base; /* the base register number */ | |
289 | unsigned short num_regs; /* # of registers in this set */ | |
290 | } | |
291 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
292 | ||
293 | flagword flags; /* ELF-header flags */ | |
294 | ||
295 | struct mem_offset { | |
296 | unsigned hint:1; /* is this hint currently valid? */ | |
297 | bfd_vma offset; /* mem.offset offset */ | |
298 | bfd_vma base; /* mem.offset base */ | |
299 | } mem_offset; | |
300 | ||
301 | int path; /* number of alt. entry points seen */ | |
302 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 303 | the current DV-checking block. */ |
800eeca4 | 304 | int maxpaths; /* size currently allocated for |
542d6675 | 305 | entry_labels */ |
557debba JW |
306 | |
307 | int pointer_size; /* size in bytes of a pointer */ | |
308 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
309 | } |
310 | md; | |
311 | ||
542d6675 | 312 | /* application registers: */ |
800eeca4 | 313 | |
e0c9811a JW |
314 | #define AR_K0 0 |
315 | #define AR_K7 7 | |
316 | #define AR_RSC 16 | |
317 | #define AR_BSP 17 | |
318 | #define AR_BSPSTORE 18 | |
319 | #define AR_RNAT 19 | |
320 | #define AR_UNAT 36 | |
321 | #define AR_FPSR 40 | |
322 | #define AR_ITC 44 | |
323 | #define AR_PFS 64 | |
324 | #define AR_LC 65 | |
800eeca4 JW |
325 | |
326 | static const struct | |
327 | { | |
328 | const char *name; | |
329 | int regnum; | |
330 | } | |
331 | ar[] = | |
332 | { | |
333 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
334 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
335 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
336 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
337 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
338 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
339 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
340 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
341 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
342 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
343 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 344 | {"ar.ec", 66}, |
800eeca4 JW |
345 | }; |
346 | ||
347 | #define CR_IPSR 16 | |
348 | #define CR_ISR 17 | |
349 | #define CR_IIP 19 | |
350 | #define CR_IFA 20 | |
351 | #define CR_ITIR 21 | |
352 | #define CR_IIPA 22 | |
353 | #define CR_IFS 23 | |
354 | #define CR_IIM 24 | |
355 | #define CR_IHA 25 | |
356 | #define CR_IVR 65 | |
357 | #define CR_TPR 66 | |
358 | #define CR_EOI 67 | |
359 | #define CR_IRR0 68 | |
360 | #define CR_IRR3 71 | |
361 | #define CR_LRR0 80 | |
362 | #define CR_LRR1 81 | |
363 | ||
542d6675 | 364 | /* control registers: */ |
800eeca4 JW |
365 | static const struct |
366 | { | |
367 | const char *name; | |
368 | int regnum; | |
369 | } | |
370 | cr[] = | |
371 | { | |
372 | {"cr.dcr", 0}, | |
373 | {"cr.itm", 1}, | |
374 | {"cr.iva", 2}, | |
375 | {"cr.pta", 8}, | |
376 | {"cr.gpta", 9}, | |
377 | {"cr.ipsr", 16}, | |
378 | {"cr.isr", 17}, | |
379 | {"cr.iip", 19}, | |
380 | {"cr.ifa", 20}, | |
381 | {"cr.itir", 21}, | |
382 | {"cr.iipa", 22}, | |
383 | {"cr.ifs", 23}, | |
384 | {"cr.iim", 24}, | |
385 | {"cr.iha", 25}, | |
386 | {"cr.lid", 64}, | |
387 | {"cr.ivr", 65}, | |
388 | {"cr.tpr", 66}, | |
389 | {"cr.eoi", 67}, | |
390 | {"cr.irr0", 68}, | |
391 | {"cr.irr1", 69}, | |
392 | {"cr.irr2", 70}, | |
393 | {"cr.irr3", 71}, | |
394 | {"cr.itv", 72}, | |
395 | {"cr.pmv", 73}, | |
396 | {"cr.cmcv", 74}, | |
397 | {"cr.lrr0", 80}, | |
398 | {"cr.lrr1", 81} | |
399 | }; | |
400 | ||
401 | #define PSR_MFL 4 | |
402 | #define PSR_IC 13 | |
403 | #define PSR_DFL 18 | |
404 | #define PSR_CPL 32 | |
405 | ||
406 | static const struct const_desc | |
407 | { | |
408 | const char *name; | |
409 | valueT value; | |
410 | } | |
411 | const_bits[] = | |
412 | { | |
542d6675 | 413 | /* PSR constant masks: */ |
800eeca4 JW |
414 | |
415 | /* 0: reserved */ | |
416 | {"psr.be", ((valueT) 1) << 1}, | |
417 | {"psr.up", ((valueT) 1) << 2}, | |
418 | {"psr.ac", ((valueT) 1) << 3}, | |
419 | {"psr.mfl", ((valueT) 1) << 4}, | |
420 | {"psr.mfh", ((valueT) 1) << 5}, | |
421 | /* 6-12: reserved */ | |
422 | {"psr.ic", ((valueT) 1) << 13}, | |
423 | {"psr.i", ((valueT) 1) << 14}, | |
424 | {"psr.pk", ((valueT) 1) << 15}, | |
425 | /* 16: reserved */ | |
426 | {"psr.dt", ((valueT) 1) << 17}, | |
427 | {"psr.dfl", ((valueT) 1) << 18}, | |
428 | {"psr.dfh", ((valueT) 1) << 19}, | |
429 | {"psr.sp", ((valueT) 1) << 20}, | |
430 | {"psr.pp", ((valueT) 1) << 21}, | |
431 | {"psr.di", ((valueT) 1) << 22}, | |
432 | {"psr.si", ((valueT) 1) << 23}, | |
433 | {"psr.db", ((valueT) 1) << 24}, | |
434 | {"psr.lp", ((valueT) 1) << 25}, | |
435 | {"psr.tb", ((valueT) 1) << 26}, | |
436 | {"psr.rt", ((valueT) 1) << 27}, | |
437 | /* 28-31: reserved */ | |
438 | /* 32-33: cpl (current privilege level) */ | |
439 | {"psr.is", ((valueT) 1) << 34}, | |
440 | {"psr.mc", ((valueT) 1) << 35}, | |
441 | {"psr.it", ((valueT) 1) << 36}, | |
442 | {"psr.id", ((valueT) 1) << 37}, | |
443 | {"psr.da", ((valueT) 1) << 38}, | |
444 | {"psr.dd", ((valueT) 1) << 39}, | |
445 | {"psr.ss", ((valueT) 1) << 40}, | |
446 | /* 41-42: ri (restart instruction) */ | |
447 | {"psr.ed", ((valueT) 1) << 43}, | |
448 | {"psr.bn", ((valueT) 1) << 44}, | |
449 | }; | |
450 | ||
542d6675 | 451 | /* indirect register-sets/memory: */ |
800eeca4 JW |
452 | |
453 | static const struct | |
454 | { | |
455 | const char *name; | |
456 | int regnum; | |
457 | } | |
458 | indirect_reg[] = | |
459 | { | |
460 | { "CPUID", IND_CPUID }, | |
461 | { "cpuid", IND_CPUID }, | |
462 | { "dbr", IND_DBR }, | |
463 | { "dtr", IND_DTR }, | |
464 | { "itr", IND_ITR }, | |
465 | { "ibr", IND_IBR }, | |
466 | { "msr", IND_MSR }, | |
467 | { "pkr", IND_PKR }, | |
468 | { "pmc", IND_PMC }, | |
469 | { "pmd", IND_PMD }, | |
470 | { "rr", IND_RR }, | |
471 | }; | |
472 | ||
473 | /* Pseudo functions used to indicate relocation types (these functions | |
474 | start with an at sign (@). */ | |
475 | static struct | |
476 | { | |
477 | const char *name; | |
478 | enum pseudo_type | |
479 | { | |
480 | PSEUDO_FUNC_NONE, | |
481 | PSEUDO_FUNC_RELOC, | |
482 | PSEUDO_FUNC_CONST, | |
e0c9811a | 483 | PSEUDO_FUNC_REG, |
800eeca4 JW |
484 | PSEUDO_FUNC_FLOAT |
485 | } | |
486 | type; | |
487 | union | |
488 | { | |
489 | unsigned long ival; | |
490 | symbolS *sym; | |
491 | } | |
492 | u; | |
493 | } | |
494 | pseudo_func[] = | |
495 | { | |
542d6675 | 496 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
497 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
498 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
499 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
500 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
501 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 502 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
503 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
504 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
505 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
506 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 507 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 508 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
509 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
510 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
511 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
512 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 513 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 514 | |
542d6675 | 515 | /* mbtype4 constants: */ |
800eeca4 JW |
516 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
517 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
518 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
519 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
520 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
521 | ||
542d6675 | 522 | /* fclass constants: */ |
bf3ca999 | 523 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
524 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
525 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
526 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
527 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
528 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
529 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
530 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
531 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
532 | |
533 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 534 | |
c10d9d8f JW |
535 | /* hint constants: */ |
536 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
537 | ||
542d6675 | 538 | /* unwind-related constants: */ |
041340ad JW |
539 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
540 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
541 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
542 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
543 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
544 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
545 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 546 | |
542d6675 | 547 | /* unwind-related registers: */ |
e0c9811a | 548 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
549 | }; |
550 | ||
542d6675 | 551 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
552 | static const bfd_vma nop[IA64_NUM_UNITS] = |
553 | { | |
554 | 0x0000000000LL, /* NIL => break 0 */ | |
555 | 0x0008000000LL, /* I-unit nop */ | |
556 | 0x0008000000LL, /* M-unit nop */ | |
557 | 0x4000000000LL, /* B-unit nop */ | |
558 | 0x0008000000LL, /* F-unit nop */ | |
559 | 0x0008000000LL, /* L-"unit" nop */ | |
560 | 0x0008000000LL, /* X-unit nop */ | |
561 | }; | |
562 | ||
563 | /* Can't be `const' as it's passed to input routines (which have the | |
564 | habit of setting temporary sentinels. */ | |
565 | static char special_section_name[][20] = | |
566 | { | |
567 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
568 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
569 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
570 | }; |
571 | ||
572 | /* The best template for a particular sequence of up to three | |
573 | instructions: */ | |
574 | #define N IA64_NUM_TYPES | |
575 | static unsigned char best_template[N][N][N]; | |
576 | #undef N | |
577 | ||
578 | /* Resource dependencies currently in effect */ | |
579 | static struct rsrc { | |
580 | int depind; /* dependency index */ | |
581 | const struct ia64_dependency *dependency; /* actual dependency */ | |
582 | unsigned specific:1, /* is this a specific bit/regno? */ | |
583 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
584 | int index; /* specific regno/bit within dependency */ | |
585 | int note; /* optional qualifying note (0 if none) */ | |
586 | #define STATE_NONE 0 | |
587 | #define STATE_STOP 1 | |
588 | #define STATE_SRLZ 2 | |
589 | int insn_srlz; /* current insn serialization state */ | |
590 | int data_srlz; /* current data serialization state */ | |
591 | int qp_regno; /* qualifying predicate for this usage */ | |
592 | char *file; /* what file marked this dependency */ | |
2434f565 | 593 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 594 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 595 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
596 | int path; /* corresponding code entry index */ |
597 | } *regdeps = NULL; | |
598 | static int regdepslen = 0; | |
599 | static int regdepstotlen = 0; | |
600 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
601 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 602 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 603 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
604 | |
605 | /* Current state of PR mutexation */ | |
606 | static struct qpmutex { | |
607 | valueT prmask; | |
608 | int path; | |
609 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
610 | static int qp_mutexeslen = 0; | |
611 | static int qp_mutexestotlen = 0; | |
197865e8 | 612 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
613 | |
614 | /* Current state of PR implications */ | |
615 | static struct qp_imply { | |
616 | unsigned p1:6; | |
617 | unsigned p2:6; | |
618 | unsigned p2_branched:1; | |
619 | int path; | |
620 | } *qp_implies = NULL; | |
621 | static int qp_implieslen = 0; | |
622 | static int qp_impliestotlen = 0; | |
623 | ||
197865e8 KH |
624 | /* Keep track of static GR values so that indirect register usage can |
625 | sometimes be tracked. */ | |
800eeca4 JW |
626 | static struct gr { |
627 | unsigned known:1; | |
628 | int path; | |
629 | valueT value; | |
2434f565 | 630 | } gr_values[128] = {{ 1, 0, 0 }}; |
800eeca4 | 631 | |
9545c4ce L |
632 | /* Remember the alignment frag. */ |
633 | static fragS *align_frag; | |
634 | ||
800eeca4 JW |
635 | /* These are the routines required to output the various types of |
636 | unwind records. */ | |
637 | ||
f5a30c2e JW |
638 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
639 | frag address here so that if there is a section switch in the middle of | |
640 | a function, then instructions emitted to a different section are not | |
641 | counted. Since there may be more than one frag for a function, this | |
642 | means we also need to keep track of which frag this address belongs to | |
643 | so we can compute inter-frag distances. This also nicely solves the | |
644 | problem with nops emitted for align directives, which can't easily be | |
645 | counted, but can easily be derived from frag sizes. */ | |
646 | ||
800eeca4 JW |
647 | typedef struct unw_rec_list { |
648 | unwind_record r; | |
e0c9811a | 649 | unsigned long slot_number; |
f5a30c2e | 650 | fragS *slot_frag; |
73f20958 L |
651 | unsigned long next_slot_number; |
652 | fragS *next_slot_frag; | |
800eeca4 JW |
653 | struct unw_rec_list *next; |
654 | } unw_rec_list; | |
655 | ||
2434f565 | 656 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 657 | |
6290819d NC |
658 | /* Linked list of saved prologue counts. A very poor |
659 | implementation of a map from label numbers to prologue counts. */ | |
660 | typedef struct label_prologue_count | |
661 | { | |
662 | struct label_prologue_count *next; | |
663 | unsigned long label_number; | |
664 | unsigned int prologue_count; | |
665 | } label_prologue_count; | |
666 | ||
e0c9811a JW |
667 | static struct |
668 | { | |
e0c9811a JW |
669 | /* Maintain a list of unwind entries for the current function. */ |
670 | unw_rec_list *list; | |
671 | unw_rec_list *tail; | |
800eeca4 | 672 | |
e0c9811a JW |
673 | /* Any unwind entires that should be attached to the current slot |
674 | that an insn is being constructed for. */ | |
675 | unw_rec_list *current_entry; | |
800eeca4 | 676 | |
e0c9811a JW |
677 | /* These are used to create the unwind table entry for this function. */ |
678 | symbolS *proc_start; | |
e0c9811a JW |
679 | symbolS *info; /* pointer to unwind info */ |
680 | symbolS *personality_routine; | |
91a2ae2a RH |
681 | segT saved_text_seg; |
682 | subsegT saved_text_subseg; | |
683 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 684 | |
e0c9811a | 685 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
686 | unsigned int prologue : 1; |
687 | unsigned int prologue_mask : 4; | |
688 | unsigned int body : 1; | |
689 | unsigned int insn : 1; | |
33d01f33 | 690 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
691 | /* Prologue counts at previous .label_state directives. */ |
692 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 693 | } unwind; |
800eeca4 | 694 | |
9f9a069e JW |
695 | /* The input value is a negated offset from psp, and specifies an address |
696 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
697 | must add 16 and divide by 4 to get the encoded value. */ | |
698 | ||
699 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
700 | ||
800eeca4 JW |
701 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
702 | ||
0234cb7c | 703 | /* Forward declarations: */ |
800eeca4 JW |
704 | static void set_section PARAMS ((char *name)); |
705 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
706 | unsigned int, unsigned int)); | |
d9201763 | 707 | static void dot_align (int); |
800eeca4 JW |
708 | static void dot_radix PARAMS ((int)); |
709 | static void dot_special_section PARAMS ((int)); | |
710 | static void dot_proc PARAMS ((int)); | |
711 | static void dot_fframe PARAMS ((int)); | |
712 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
713 | static void dot_vframesp PARAMS ((int)); |
714 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
715 | static void dot_save PARAMS ((int)); |
716 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
717 | static void dot_restorereg PARAMS ((int)); |
718 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
719 | static void dot_handlerdata PARAMS ((int)); |
720 | static void dot_unwentry PARAMS ((int)); | |
721 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 722 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
723 | static void dot_saveg PARAMS ((int)); |
724 | static void dot_savef PARAMS ((int)); | |
725 | static void dot_saveb PARAMS ((int)); | |
726 | static void dot_savegf PARAMS ((int)); | |
727 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
728 | static void dot_spillreg PARAMS ((int)); |
729 | static void dot_spillmem PARAMS ((int)); | |
730 | static void dot_spillreg_p PARAMS ((int)); | |
731 | static void dot_spillmem_p PARAMS ((int)); | |
732 | static void dot_label_state PARAMS ((int)); | |
733 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
734 | static void dot_unwabi PARAMS ((int)); |
735 | static void dot_personality PARAMS ((int)); | |
736 | static void dot_body PARAMS ((int)); | |
737 | static void dot_prologue PARAMS ((int)); | |
738 | static void dot_endp PARAMS ((int)); | |
739 | static void dot_template PARAMS ((int)); | |
740 | static void dot_regstk PARAMS ((int)); | |
741 | static void dot_rot PARAMS ((int)); | |
742 | static void dot_byteorder PARAMS ((int)); | |
743 | static void dot_psr PARAMS ((int)); | |
744 | static void dot_alias PARAMS ((int)); | |
745 | static void dot_ln PARAMS ((int)); | |
746 | static char *parse_section_name PARAMS ((void)); | |
747 | static void dot_xdata PARAMS ((int)); | |
748 | static void stmt_float_cons PARAMS ((int)); | |
749 | static void stmt_cons_ua PARAMS ((int)); | |
750 | static void dot_xfloat_cons PARAMS ((int)); | |
751 | static void dot_xstringer PARAMS ((int)); | |
752 | static void dot_xdata_ua PARAMS ((int)); | |
753 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 754 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
755 | static void dot_pred_rel PARAMS ((int)); |
756 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 757 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
758 | static void dot_dv_mode PARAMS ((int)); |
759 | static void dot_entry PARAMS ((int)); | |
760 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 761 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 762 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
763 | static void declare_register_set PARAMS ((const char *, int, int)); |
764 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
765 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
766 | int index, | |
767 | expressionS *e)); | |
800eeca4 JW |
768 | static int parse_operand PARAMS ((expressionS *e)); |
769 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
770 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); | |
771 | static void emit_one_bundle PARAMS ((void)); | |
772 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 773 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
774 | bfd_reloc_code_real_type r_type)); |
775 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
776 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
777 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
778 | static void add_qp_mutex PARAMS((valueT mask)); |
779 | static void add_qp_imply PARAMS((int p1, int p2)); | |
780 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
781 | static void clear_qp_mutex PARAMS((valueT mask)); | |
782 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 783 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
784 | static void clear_register_values PARAMS ((void)); |
785 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
786 | static void instruction_serialization PARAMS ((void)); |
787 | static void data_serialization PARAMS ((void)); | |
788 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 789 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 790 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 791 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
792 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
793 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
794 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
795 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
796 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
797 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
798 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
799 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
800 | static int qp_mutex PARAMS ((int, int, int)); |
801 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
802 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
803 | static void count_output PARAMS ((int, char *, char *)); | |
804 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
805 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 806 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
807 | static void output_P1_format PARAMS ((vbyte_func, int)); |
808 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
809 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
810 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
811 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
812 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
813 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
814 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
815 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
816 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
817 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
818 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
819 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
820 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
821 | static char format_ab_reg PARAMS ((int, int)); |
822 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
823 | unsigned long)); | |
824 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
825 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
826 | unsigned long)); | |
827 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 828 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
829 | static unw_rec_list *output_prologue PARAMS ((void)); |
830 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
831 | static unw_rec_list *output_body PARAMS ((void)); | |
832 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
833 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
834 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
835 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
836 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
837 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
838 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
839 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
840 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
841 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
842 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
843 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
844 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
845 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
846 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
847 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
848 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
849 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
850 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
851 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
852 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
853 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
854 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
855 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
856 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
857 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
858 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
859 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
860 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
861 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
862 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
863 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
864 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
865 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
866 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
867 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
868 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
869 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
870 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
871 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
872 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
873 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
874 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
875 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
876 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
877 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
878 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
879 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
881 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
882 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
883 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
884 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
885 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
886 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
887 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
888 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
889 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
890 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
891 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
892 | unsigned int)); | |
893 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
894 | unsigned int)); | |
895 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
896 | unsigned int)); | |
897 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
898 | unsigned int, unsigned int)); | |
899 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
900 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
901 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
902 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 903 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
904 | unsigned long, fragS *, |
905 | int)); | |
91a2ae2a | 906 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 907 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
150f24a2 JW |
908 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
909 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
6290819d NC |
910 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
911 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
912 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 913 | |
652ca075 | 914 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
915 | unit (as opposed to the memory unit). */ |
916 | static int | |
652ca075 | 917 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
918 | { |
919 | reg -= REG_AR; | |
652ca075 L |
920 | return reg >= 64 && reg <= 111; |
921 | } | |
800eeca4 | 922 | |
652ca075 L |
923 | /* Determine if application register REGNUM resides only in the memory |
924 | unit (as opposed to the integer unit). */ | |
925 | static int | |
926 | ar_is_only_in_memory_unit (int reg) | |
927 | { | |
928 | reg -= REG_AR; | |
929 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
930 | } |
931 | ||
932 | /* Switch to section NAME and create section if necessary. It's | |
933 | rather ugly that we have to manipulate input_line_pointer but I | |
934 | don't see any other way to accomplish the same thing without | |
935 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
936 | static void | |
937 | set_section (name) | |
938 | char *name; | |
939 | { | |
940 | char *saved_input_line_pointer; | |
941 | ||
942 | saved_input_line_pointer = input_line_pointer; | |
943 | input_line_pointer = name; | |
944 | obj_elf_section (0); | |
945 | input_line_pointer = saved_input_line_pointer; | |
946 | } | |
947 | ||
d61a78a7 RH |
948 | /* Map 's' to SHF_IA_64_SHORT. */ |
949 | ||
950 | int | |
951 | ia64_elf_section_letter (letter, ptr_msg) | |
952 | int letter; | |
953 | char **ptr_msg; | |
954 | { | |
955 | if (letter == 's') | |
956 | return SHF_IA_64_SHORT; | |
711ef82f L |
957 | else if (letter == 'o') |
958 | return SHF_LINK_ORDER; | |
d61a78a7 | 959 | |
711ef82f L |
960 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
961 | return -1; | |
d61a78a7 RH |
962 | } |
963 | ||
800eeca4 JW |
964 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
965 | ||
966 | flagword | |
967 | ia64_elf_section_flags (flags, attr, type) | |
968 | flagword flags; | |
2434f565 | 969 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
970 | { |
971 | if (attr & SHF_IA_64_SHORT) | |
972 | flags |= SEC_SMALL_DATA; | |
973 | return flags; | |
974 | } | |
975 | ||
91a2ae2a RH |
976 | int |
977 | ia64_elf_section_type (str, len) | |
40449e9f KH |
978 | const char *str; |
979 | size_t len; | |
91a2ae2a | 980 | { |
1cd8ff38 | 981 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 982 | |
1cd8ff38 | 983 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
984 | return SHT_PROGBITS; |
985 | ||
1cd8ff38 | 986 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
987 | return SHT_PROGBITS; |
988 | ||
1cd8ff38 | 989 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
990 | return SHT_IA_64_UNWIND; |
991 | ||
1cd8ff38 | 992 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
993 | return SHT_IA_64_UNWIND; |
994 | ||
711ef82f L |
995 | if (STREQ ("unwind")) |
996 | return SHT_IA_64_UNWIND; | |
997 | ||
91a2ae2a | 998 | return -1; |
1cd8ff38 | 999 | #undef STREQ |
91a2ae2a RH |
1000 | } |
1001 | ||
800eeca4 JW |
1002 | static unsigned int |
1003 | set_regstack (ins, locs, outs, rots) | |
1004 | unsigned int ins, locs, outs, rots; | |
1005 | { | |
542d6675 KH |
1006 | /* Size of frame. */ |
1007 | unsigned int sof; | |
800eeca4 JW |
1008 | |
1009 | sof = ins + locs + outs; | |
1010 | if (sof > 96) | |
1011 | { | |
1012 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1013 | return 0; | |
1014 | } | |
1015 | if (rots > sof) | |
1016 | { | |
1017 | as_warn ("Size of rotating registers exceeds frame size"); | |
1018 | return 0; | |
1019 | } | |
1020 | md.in.base = REG_GR + 32; | |
1021 | md.loc.base = md.in.base + ins; | |
1022 | md.out.base = md.loc.base + locs; | |
1023 | ||
1024 | md.in.num_regs = ins; | |
1025 | md.loc.num_regs = locs; | |
1026 | md.out.num_regs = outs; | |
1027 | md.rot.num_regs = rots; | |
1028 | return sof; | |
1029 | } | |
1030 | ||
1031 | void | |
1032 | ia64_flush_insns () | |
1033 | { | |
1034 | struct label_fix *lfix; | |
1035 | segT saved_seg; | |
1036 | subsegT saved_subseg; | |
b44b1b85 | 1037 | unw_rec_list *ptr; |
800eeca4 JW |
1038 | |
1039 | if (!md.last_text_seg) | |
1040 | return; | |
1041 | ||
1042 | saved_seg = now_seg; | |
1043 | saved_subseg = now_subseg; | |
1044 | ||
1045 | subseg_set (md.last_text_seg, 0); | |
1046 | ||
1047 | while (md.num_slots_in_use > 0) | |
1048 | emit_one_bundle (); /* force out queued instructions */ | |
1049 | ||
1050 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1051 | those now: */ |
800eeca4 JW |
1052 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1053 | { | |
1054 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1055 | symbol_set_frag (lfix->sym, frag_now); | |
1056 | } | |
1057 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1058 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1059 | { | |
1060 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1061 | symbol_set_frag (lfix->sym, frag_now); | |
1062 | } | |
1063 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1064 | |
b44b1b85 | 1065 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1066 | resolve those now. We only handle prologue, body, and endp directives |
1067 | here. Give an error for others. */ | |
b44b1b85 JW |
1068 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1069 | { | |
9c59842f | 1070 | switch (ptr->r.type) |
b44b1b85 | 1071 | { |
9c59842f JW |
1072 | case prologue: |
1073 | case prologue_gr: | |
1074 | case body: | |
1075 | case endp: | |
b44b1b85 JW |
1076 | ptr->slot_number = (unsigned long) frag_more (0); |
1077 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1078 | break; |
1079 | ||
1080 | /* Allow any record which doesn't have a "t" field (i.e., | |
1081 | doesn't relate to a particular instruction). */ | |
1082 | case unwabi: | |
1083 | case br_gr: | |
1084 | case copy_state: | |
1085 | case fr_mem: | |
1086 | case frgr_mem: | |
1087 | case gr_gr: | |
1088 | case gr_mem: | |
1089 | case label_state: | |
1090 | case rp_br: | |
1091 | case spill_base: | |
1092 | case spill_mask: | |
1093 | /* nothing */ | |
1094 | break; | |
1095 | ||
1096 | default: | |
1097 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1098 | break; | |
b44b1b85 | 1099 | } |
b44b1b85 JW |
1100 | } |
1101 | unwind.current_entry = NULL; | |
1102 | ||
800eeca4 | 1103 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1104 | |
1105 | if (md.qp.X_op == O_register) | |
1106 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1107 | } |
1108 | ||
d9201763 L |
1109 | static void |
1110 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1111 | { |
1112 | char *saved_input_line_pointer = input_line_pointer; | |
1113 | ||
1114 | input_line_pointer = ""; | |
1115 | s_align_bytes (nbytes); | |
1116 | input_line_pointer = saved_input_line_pointer; | |
1117 | } | |
1118 | ||
1119 | void | |
1120 | ia64_cons_align (nbytes) | |
1121 | int nbytes; | |
1122 | { | |
1123 | if (md.auto_align) | |
1124 | { | |
1125 | char *saved_input_line_pointer = input_line_pointer; | |
1126 | input_line_pointer = ""; | |
1127 | s_align_bytes (nbytes); | |
1128 | input_line_pointer = saved_input_line_pointer; | |
1129 | } | |
1130 | } | |
1131 | ||
1132 | /* Output COUNT bytes to a memory location. */ | |
1133 | static unsigned char *vbyte_mem_ptr = NULL; | |
1134 | ||
197865e8 | 1135 | void |
800eeca4 JW |
1136 | output_vbyte_mem (count, ptr, comment) |
1137 | int count; | |
1138 | char *ptr; | |
2434f565 | 1139 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1140 | { |
1141 | int x; | |
1142 | if (vbyte_mem_ptr == NULL) | |
1143 | abort (); | |
1144 | ||
1145 | if (count == 0) | |
1146 | return; | |
1147 | for (x = 0; x < count; x++) | |
1148 | *(vbyte_mem_ptr++) = ptr[x]; | |
1149 | } | |
1150 | ||
1151 | /* Count the number of bytes required for records. */ | |
1152 | static int vbyte_count = 0; | |
197865e8 | 1153 | void |
800eeca4 JW |
1154 | count_output (count, ptr, comment) |
1155 | int count; | |
2434f565 JW |
1156 | char *ptr ATTRIBUTE_UNUSED; |
1157 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1158 | { |
1159 | vbyte_count += count; | |
1160 | } | |
1161 | ||
1162 | static void | |
1163 | output_R1_format (f, rtype, rlen) | |
1164 | vbyte_func f; | |
1165 | unw_record_type rtype; | |
1166 | int rlen; | |
1167 | { | |
e0c9811a | 1168 | int r = 0; |
800eeca4 JW |
1169 | char byte; |
1170 | if (rlen > 0x1f) | |
1171 | { | |
1172 | output_R3_format (f, rtype, rlen); | |
1173 | return; | |
1174 | } | |
197865e8 | 1175 | |
e0c9811a JW |
1176 | if (rtype == body) |
1177 | r = 1; | |
1178 | else if (rtype != prologue) | |
1179 | as_bad ("record type is not valid"); | |
1180 | ||
800eeca4 JW |
1181 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1182 | (*f) (1, &byte, NULL); | |
1183 | } | |
1184 | ||
1185 | static void | |
1186 | output_R2_format (f, mask, grsave, rlen) | |
1187 | vbyte_func f; | |
1188 | int mask, grsave; | |
1189 | unsigned long rlen; | |
1190 | { | |
1191 | char bytes[20]; | |
1192 | int count = 2; | |
1193 | mask = (mask & 0x0f); | |
1194 | grsave = (grsave & 0x7f); | |
1195 | ||
1196 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1197 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1198 | count += output_leb128 (bytes + 2, rlen, 0); | |
1199 | (*f) (count, bytes, NULL); | |
1200 | } | |
1201 | ||
1202 | static void | |
1203 | output_R3_format (f, rtype, rlen) | |
1204 | vbyte_func f; | |
1205 | unw_record_type rtype; | |
1206 | unsigned long rlen; | |
1207 | { | |
e0c9811a | 1208 | int r = 0, count; |
800eeca4 JW |
1209 | char bytes[20]; |
1210 | if (rlen <= 0x1f) | |
1211 | { | |
1212 | output_R1_format (f, rtype, rlen); | |
1213 | return; | |
1214 | } | |
197865e8 | 1215 | |
e0c9811a JW |
1216 | if (rtype == body) |
1217 | r = 1; | |
1218 | else if (rtype != prologue) | |
1219 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1220 | bytes[0] = (UNW_R3 | r); |
1221 | count = output_leb128 (bytes + 1, rlen, 0); | |
1222 | (*f) (count + 1, bytes, NULL); | |
1223 | } | |
1224 | ||
1225 | static void | |
1226 | output_P1_format (f, brmask) | |
1227 | vbyte_func f; | |
1228 | int brmask; | |
1229 | { | |
1230 | char byte; | |
1231 | byte = UNW_P1 | (brmask & 0x1f); | |
1232 | (*f) (1, &byte, NULL); | |
1233 | } | |
1234 | ||
1235 | static void | |
1236 | output_P2_format (f, brmask, gr) | |
1237 | vbyte_func f; | |
1238 | int brmask; | |
1239 | int gr; | |
1240 | { | |
1241 | char bytes[2]; | |
1242 | brmask = (brmask & 0x1f); | |
1243 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1244 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1245 | (*f) (2, bytes, NULL); | |
1246 | } | |
1247 | ||
1248 | static void | |
1249 | output_P3_format (f, rtype, reg) | |
1250 | vbyte_func f; | |
1251 | unw_record_type rtype; | |
1252 | int reg; | |
1253 | { | |
1254 | char bytes[2]; | |
e0c9811a | 1255 | int r = 0; |
800eeca4 JW |
1256 | reg = (reg & 0x7f); |
1257 | switch (rtype) | |
542d6675 | 1258 | { |
800eeca4 JW |
1259 | case psp_gr: |
1260 | r = 0; | |
1261 | break; | |
1262 | case rp_gr: | |
1263 | r = 1; | |
1264 | break; | |
1265 | case pfs_gr: | |
1266 | r = 2; | |
1267 | break; | |
1268 | case preds_gr: | |
1269 | r = 3; | |
1270 | break; | |
1271 | case unat_gr: | |
1272 | r = 4; | |
1273 | break; | |
1274 | case lc_gr: | |
1275 | r = 5; | |
1276 | break; | |
1277 | case rp_br: | |
1278 | r = 6; | |
1279 | break; | |
1280 | case rnat_gr: | |
1281 | r = 7; | |
1282 | break; | |
1283 | case bsp_gr: | |
1284 | r = 8; | |
1285 | break; | |
1286 | case bspstore_gr: | |
1287 | r = 9; | |
1288 | break; | |
1289 | case fpsr_gr: | |
1290 | r = 10; | |
1291 | break; | |
1292 | case priunat_gr: | |
1293 | r = 11; | |
1294 | break; | |
1295 | default: | |
1296 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1297 | } |
800eeca4 JW |
1298 | bytes[0] = (UNW_P3 | (r >> 1)); |
1299 | bytes[1] = (((r & 1) << 7) | reg); | |
1300 | (*f) (2, bytes, NULL); | |
1301 | } | |
1302 | ||
800eeca4 | 1303 | static void |
e0c9811a | 1304 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1305 | vbyte_func f; |
e0c9811a JW |
1306 | unsigned char *imask; |
1307 | unsigned long imask_size; | |
800eeca4 | 1308 | { |
e0c9811a JW |
1309 | imask[0] = UNW_P4; |
1310 | (*f) (imask_size, imask, NULL); | |
800eeca4 JW |
1311 | } |
1312 | ||
1313 | static void | |
1314 | output_P5_format (f, grmask, frmask) | |
1315 | vbyte_func f; | |
1316 | int grmask; | |
1317 | unsigned long frmask; | |
1318 | { | |
1319 | char bytes[4]; | |
1320 | grmask = (grmask & 0x0f); | |
1321 | ||
1322 | bytes[0] = UNW_P5; | |
1323 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1324 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1325 | bytes[3] = (frmask & 0x000000ff); | |
1326 | (*f) (4, bytes, NULL); | |
1327 | } | |
1328 | ||
1329 | static void | |
1330 | output_P6_format (f, rtype, rmask) | |
1331 | vbyte_func f; | |
1332 | unw_record_type rtype; | |
1333 | int rmask; | |
1334 | { | |
1335 | char byte; | |
e0c9811a | 1336 | int r = 0; |
197865e8 | 1337 | |
e0c9811a JW |
1338 | if (rtype == gr_mem) |
1339 | r = 1; | |
1340 | else if (rtype != fr_mem) | |
1341 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1342 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1343 | (*f) (1, &byte, NULL); | |
1344 | } | |
1345 | ||
1346 | static void | |
1347 | output_P7_format (f, rtype, w1, w2) | |
1348 | vbyte_func f; | |
1349 | unw_record_type rtype; | |
1350 | unsigned long w1; | |
1351 | unsigned long w2; | |
1352 | { | |
1353 | char bytes[20]; | |
1354 | int count = 1; | |
e0c9811a | 1355 | int r = 0; |
800eeca4 JW |
1356 | count += output_leb128 (bytes + 1, w1, 0); |
1357 | switch (rtype) | |
1358 | { | |
542d6675 KH |
1359 | case mem_stack_f: |
1360 | r = 0; | |
1361 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1362 | break; | |
1363 | case mem_stack_v: | |
1364 | r = 1; | |
1365 | break; | |
1366 | case spill_base: | |
1367 | r = 2; | |
1368 | break; | |
1369 | case psp_sprel: | |
1370 | r = 3; | |
1371 | break; | |
1372 | case rp_when: | |
1373 | r = 4; | |
1374 | break; | |
1375 | case rp_psprel: | |
1376 | r = 5; | |
1377 | break; | |
1378 | case pfs_when: | |
1379 | r = 6; | |
1380 | break; | |
1381 | case pfs_psprel: | |
1382 | r = 7; | |
1383 | break; | |
1384 | case preds_when: | |
1385 | r = 8; | |
1386 | break; | |
1387 | case preds_psprel: | |
1388 | r = 9; | |
1389 | break; | |
1390 | case lc_when: | |
1391 | r = 10; | |
1392 | break; | |
1393 | case lc_psprel: | |
1394 | r = 11; | |
1395 | break; | |
1396 | case unat_when: | |
1397 | r = 12; | |
1398 | break; | |
1399 | case unat_psprel: | |
1400 | r = 13; | |
1401 | break; | |
1402 | case fpsr_when: | |
1403 | r = 14; | |
1404 | break; | |
1405 | case fpsr_psprel: | |
1406 | r = 15; | |
1407 | break; | |
1408 | default: | |
1409 | break; | |
800eeca4 JW |
1410 | } |
1411 | bytes[0] = (UNW_P7 | r); | |
1412 | (*f) (count, bytes, NULL); | |
1413 | } | |
1414 | ||
1415 | static void | |
1416 | output_P8_format (f, rtype, t) | |
1417 | vbyte_func f; | |
1418 | unw_record_type rtype; | |
1419 | unsigned long t; | |
1420 | { | |
1421 | char bytes[20]; | |
e0c9811a | 1422 | int r = 0; |
800eeca4 JW |
1423 | int count = 2; |
1424 | bytes[0] = UNW_P8; | |
1425 | switch (rtype) | |
1426 | { | |
542d6675 KH |
1427 | case rp_sprel: |
1428 | r = 1; | |
1429 | break; | |
1430 | case pfs_sprel: | |
1431 | r = 2; | |
1432 | break; | |
1433 | case preds_sprel: | |
1434 | r = 3; | |
1435 | break; | |
1436 | case lc_sprel: | |
1437 | r = 4; | |
1438 | break; | |
1439 | case unat_sprel: | |
1440 | r = 5; | |
1441 | break; | |
1442 | case fpsr_sprel: | |
1443 | r = 6; | |
1444 | break; | |
1445 | case bsp_when: | |
1446 | r = 7; | |
1447 | break; | |
1448 | case bsp_psprel: | |
1449 | r = 8; | |
1450 | break; | |
1451 | case bsp_sprel: | |
1452 | r = 9; | |
1453 | break; | |
1454 | case bspstore_when: | |
1455 | r = 10; | |
1456 | break; | |
1457 | case bspstore_psprel: | |
1458 | r = 11; | |
1459 | break; | |
1460 | case bspstore_sprel: | |
1461 | r = 12; | |
1462 | break; | |
1463 | case rnat_when: | |
1464 | r = 13; | |
1465 | break; | |
1466 | case rnat_psprel: | |
1467 | r = 14; | |
1468 | break; | |
1469 | case rnat_sprel: | |
1470 | r = 15; | |
1471 | break; | |
1472 | case priunat_when_gr: | |
1473 | r = 16; | |
1474 | break; | |
1475 | case priunat_psprel: | |
1476 | r = 17; | |
1477 | break; | |
1478 | case priunat_sprel: | |
1479 | r = 18; | |
1480 | break; | |
1481 | case priunat_when_mem: | |
1482 | r = 19; | |
1483 | break; | |
1484 | default: | |
1485 | break; | |
800eeca4 JW |
1486 | } |
1487 | bytes[1] = r; | |
1488 | count += output_leb128 (bytes + 2, t, 0); | |
1489 | (*f) (count, bytes, NULL); | |
1490 | } | |
1491 | ||
1492 | static void | |
1493 | output_P9_format (f, grmask, gr) | |
1494 | vbyte_func f; | |
1495 | int grmask; | |
1496 | int gr; | |
1497 | { | |
1498 | char bytes[3]; | |
1499 | bytes[0] = UNW_P9; | |
1500 | bytes[1] = (grmask & 0x0f); | |
1501 | bytes[2] = (gr & 0x7f); | |
1502 | (*f) (3, bytes, NULL); | |
1503 | } | |
1504 | ||
1505 | static void | |
1506 | output_P10_format (f, abi, context) | |
1507 | vbyte_func f; | |
1508 | int abi; | |
1509 | int context; | |
1510 | { | |
1511 | char bytes[3]; | |
1512 | bytes[0] = UNW_P10; | |
1513 | bytes[1] = (abi & 0xff); | |
1514 | bytes[2] = (context & 0xff); | |
1515 | (*f) (3, bytes, NULL); | |
1516 | } | |
1517 | ||
1518 | static void | |
1519 | output_B1_format (f, rtype, label) | |
1520 | vbyte_func f; | |
1521 | unw_record_type rtype; | |
1522 | unsigned long label; | |
1523 | { | |
1524 | char byte; | |
e0c9811a | 1525 | int r = 0; |
197865e8 | 1526 | if (label > 0x1f) |
800eeca4 JW |
1527 | { |
1528 | output_B4_format (f, rtype, label); | |
1529 | return; | |
1530 | } | |
e0c9811a JW |
1531 | if (rtype == copy_state) |
1532 | r = 1; | |
1533 | else if (rtype != label_state) | |
1534 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1535 | |
1536 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1537 | (*f) (1, &byte, NULL); | |
1538 | } | |
1539 | ||
1540 | static void | |
1541 | output_B2_format (f, ecount, t) | |
1542 | vbyte_func f; | |
1543 | unsigned long ecount; | |
1544 | unsigned long t; | |
1545 | { | |
1546 | char bytes[20]; | |
1547 | int count = 1; | |
1548 | if (ecount > 0x1f) | |
1549 | { | |
1550 | output_B3_format (f, ecount, t); | |
1551 | return; | |
1552 | } | |
1553 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1554 | count += output_leb128 (bytes + 1, t, 0); | |
1555 | (*f) (count, bytes, NULL); | |
1556 | } | |
1557 | ||
1558 | static void | |
1559 | output_B3_format (f, ecount, t) | |
1560 | vbyte_func f; | |
1561 | unsigned long ecount; | |
1562 | unsigned long t; | |
1563 | { | |
1564 | char bytes[20]; | |
1565 | int count = 1; | |
1566 | if (ecount <= 0x1f) | |
1567 | { | |
1568 | output_B2_format (f, ecount, t); | |
1569 | return; | |
1570 | } | |
1571 | bytes[0] = UNW_B3; | |
1572 | count += output_leb128 (bytes + 1, t, 0); | |
1573 | count += output_leb128 (bytes + count, ecount, 0); | |
1574 | (*f) (count, bytes, NULL); | |
1575 | } | |
1576 | ||
1577 | static void | |
1578 | output_B4_format (f, rtype, label) | |
1579 | vbyte_func f; | |
1580 | unw_record_type rtype; | |
1581 | unsigned long label; | |
1582 | { | |
1583 | char bytes[20]; | |
e0c9811a | 1584 | int r = 0; |
800eeca4 | 1585 | int count = 1; |
197865e8 | 1586 | if (label <= 0x1f) |
800eeca4 JW |
1587 | { |
1588 | output_B1_format (f, rtype, label); | |
1589 | return; | |
1590 | } | |
197865e8 | 1591 | |
e0c9811a JW |
1592 | if (rtype == copy_state) |
1593 | r = 1; | |
1594 | else if (rtype != label_state) | |
1595 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1596 | |
1597 | bytes[0] = (UNW_B4 | (r << 3)); | |
1598 | count += output_leb128 (bytes + 1, label, 0); | |
1599 | (*f) (count, bytes, NULL); | |
1600 | } | |
1601 | ||
1602 | static char | |
e0c9811a | 1603 | format_ab_reg (ab, reg) |
542d6675 KH |
1604 | int ab; |
1605 | int reg; | |
800eeca4 JW |
1606 | { |
1607 | int ret; | |
e0c9811a | 1608 | ab = (ab & 3); |
800eeca4 | 1609 | reg = (reg & 0x1f); |
e0c9811a | 1610 | ret = (ab << 5) | reg; |
800eeca4 JW |
1611 | return ret; |
1612 | } | |
1613 | ||
1614 | static void | |
e0c9811a | 1615 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1616 | vbyte_func f; |
1617 | unw_record_type rtype; | |
e0c9811a | 1618 | int ab, reg; |
800eeca4 JW |
1619 | unsigned long t; |
1620 | unsigned long w1; | |
1621 | { | |
1622 | char bytes[20]; | |
e0c9811a | 1623 | int r = 0; |
800eeca4 JW |
1624 | int count = 2; |
1625 | bytes[0] = UNW_X1; | |
197865e8 | 1626 | |
e0c9811a JW |
1627 | if (rtype == spill_sprel) |
1628 | r = 1; | |
1629 | else if (rtype != spill_psprel) | |
1630 | as_bad ("Invalid record type for format X1"); | |
1631 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1632 | count += output_leb128 (bytes + 2, t, 0); |
1633 | count += output_leb128 (bytes + count, w1, 0); | |
1634 | (*f) (count, bytes, NULL); | |
1635 | } | |
1636 | ||
1637 | static void | |
e0c9811a | 1638 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1639 | vbyte_func f; |
e0c9811a | 1640 | int ab, reg; |
800eeca4 JW |
1641 | int x, y, treg; |
1642 | unsigned long t; | |
1643 | { | |
1644 | char bytes[20]; | |
800eeca4 JW |
1645 | int count = 3; |
1646 | bytes[0] = UNW_X2; | |
e0c9811a | 1647 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1648 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1649 | count += output_leb128 (bytes + 3, t, 0); | |
1650 | (*f) (count, bytes, NULL); | |
1651 | } | |
1652 | ||
1653 | static void | |
e0c9811a | 1654 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1655 | vbyte_func f; |
1656 | unw_record_type rtype; | |
1657 | int qp; | |
e0c9811a | 1658 | int ab, reg; |
800eeca4 JW |
1659 | unsigned long t; |
1660 | unsigned long w1; | |
1661 | { | |
1662 | char bytes[20]; | |
e0c9811a | 1663 | int r = 0; |
800eeca4 | 1664 | int count = 3; |
e0c9811a JW |
1665 | bytes[0] = UNW_X3; |
1666 | ||
1667 | if (rtype == spill_sprel_p) | |
1668 | r = 1; | |
1669 | else if (rtype != spill_psprel_p) | |
1670 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1671 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1672 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1673 | count += output_leb128 (bytes + 3, t, 0); |
1674 | count += output_leb128 (bytes + count, w1, 0); | |
1675 | (*f) (count, bytes, NULL); | |
1676 | } | |
1677 | ||
1678 | static void | |
e0c9811a | 1679 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1680 | vbyte_func f; |
1681 | int qp; | |
e0c9811a | 1682 | int ab, reg; |
800eeca4 JW |
1683 | int x, y, treg; |
1684 | unsigned long t; | |
1685 | { | |
1686 | char bytes[20]; | |
800eeca4 | 1687 | int count = 4; |
e0c9811a | 1688 | bytes[0] = UNW_X4; |
800eeca4 | 1689 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1690 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1691 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1692 | count += output_leb128 (bytes + 4, t, 0); | |
1693 | (*f) (count, bytes, NULL); | |
1694 | } | |
1695 | ||
1696 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1697 | |
800eeca4 | 1698 | static unw_rec_list * |
197865e8 | 1699 | alloc_record (unw_record_type t) |
800eeca4 JW |
1700 | { |
1701 | unw_rec_list *ptr; | |
1702 | ptr = xmalloc (sizeof (*ptr)); | |
1703 | ptr->next = NULL; | |
1704 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1705 | ptr->r.type = t; | |
73f20958 L |
1706 | ptr->next_slot_number = 0; |
1707 | ptr->next_slot_frag = 0; | |
800eeca4 JW |
1708 | return ptr; |
1709 | } | |
1710 | ||
5738bc24 JW |
1711 | /* Dummy unwind record used for calculating the length of the last prologue or |
1712 | body region. */ | |
1713 | ||
1714 | static unw_rec_list * | |
1715 | output_endp () | |
1716 | { | |
1717 | unw_rec_list *ptr = alloc_record (endp); | |
1718 | return ptr; | |
1719 | } | |
1720 | ||
800eeca4 JW |
1721 | static unw_rec_list * |
1722 | output_prologue () | |
1723 | { | |
1724 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1725 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1726 | return ptr; |
1727 | } | |
1728 | ||
1729 | static unw_rec_list * | |
1730 | output_prologue_gr (saved_mask, reg) | |
1731 | unsigned int saved_mask; | |
1732 | unsigned int reg; | |
1733 | { | |
1734 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1735 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1736 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1737 | ptr->r.record.r.grsave = reg; |
1738 | return ptr; | |
1739 | } | |
1740 | ||
1741 | static unw_rec_list * | |
1742 | output_body () | |
1743 | { | |
1744 | unw_rec_list *ptr = alloc_record (body); | |
1745 | return ptr; | |
1746 | } | |
1747 | ||
1748 | static unw_rec_list * | |
1749 | output_mem_stack_f (size) | |
1750 | unsigned int size; | |
1751 | { | |
1752 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1753 | ptr->r.record.p.size = size; | |
1754 | return ptr; | |
1755 | } | |
1756 | ||
1757 | static unw_rec_list * | |
1758 | output_mem_stack_v () | |
1759 | { | |
1760 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1761 | return ptr; | |
1762 | } | |
1763 | ||
1764 | static unw_rec_list * | |
1765 | output_psp_gr (gr) | |
1766 | unsigned int gr; | |
1767 | { | |
1768 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1769 | ptr->r.record.p.gr = gr; | |
1770 | return ptr; | |
1771 | } | |
1772 | ||
1773 | static unw_rec_list * | |
1774 | output_psp_sprel (offset) | |
1775 | unsigned int offset; | |
1776 | { | |
1777 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1778 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1779 | return ptr; |
1780 | } | |
1781 | ||
1782 | static unw_rec_list * | |
1783 | output_rp_when () | |
1784 | { | |
1785 | unw_rec_list *ptr = alloc_record (rp_when); | |
1786 | return ptr; | |
1787 | } | |
1788 | ||
1789 | static unw_rec_list * | |
1790 | output_rp_gr (gr) | |
1791 | unsigned int gr; | |
1792 | { | |
1793 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1794 | ptr->r.record.p.gr = gr; | |
1795 | return ptr; | |
1796 | } | |
1797 | ||
1798 | static unw_rec_list * | |
1799 | output_rp_br (br) | |
1800 | unsigned int br; | |
1801 | { | |
1802 | unw_rec_list *ptr = alloc_record (rp_br); | |
1803 | ptr->r.record.p.br = br; | |
1804 | return ptr; | |
1805 | } | |
1806 | ||
1807 | static unw_rec_list * | |
1808 | output_rp_psprel (offset) | |
1809 | unsigned int offset; | |
1810 | { | |
1811 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
9f9a069e | 1812 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1813 | return ptr; |
1814 | } | |
1815 | ||
1816 | static unw_rec_list * | |
1817 | output_rp_sprel (offset) | |
1818 | unsigned int offset; | |
1819 | { | |
1820 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1821 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1822 | return ptr; |
1823 | } | |
1824 | ||
1825 | static unw_rec_list * | |
1826 | output_pfs_when () | |
1827 | { | |
1828 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1829 | return ptr; | |
1830 | } | |
1831 | ||
1832 | static unw_rec_list * | |
1833 | output_pfs_gr (gr) | |
1834 | unsigned int gr; | |
1835 | { | |
1836 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1837 | ptr->r.record.p.gr = gr; | |
1838 | return ptr; | |
1839 | } | |
1840 | ||
1841 | static unw_rec_list * | |
1842 | output_pfs_psprel (offset) | |
1843 | unsigned int offset; | |
1844 | { | |
1845 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
9f9a069e | 1846 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1847 | return ptr; |
1848 | } | |
1849 | ||
1850 | static unw_rec_list * | |
1851 | output_pfs_sprel (offset) | |
1852 | unsigned int offset; | |
1853 | { | |
1854 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1855 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1856 | return ptr; |
1857 | } | |
1858 | ||
1859 | static unw_rec_list * | |
1860 | output_preds_when () | |
1861 | { | |
1862 | unw_rec_list *ptr = alloc_record (preds_when); | |
1863 | return ptr; | |
1864 | } | |
1865 | ||
1866 | static unw_rec_list * | |
1867 | output_preds_gr (gr) | |
1868 | unsigned int gr; | |
1869 | { | |
1870 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1871 | ptr->r.record.p.gr = gr; | |
1872 | return ptr; | |
1873 | } | |
1874 | ||
1875 | static unw_rec_list * | |
1876 | output_preds_psprel (offset) | |
1877 | unsigned int offset; | |
1878 | { | |
1879 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
9f9a069e | 1880 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1881 | return ptr; |
1882 | } | |
1883 | ||
1884 | static unw_rec_list * | |
1885 | output_preds_sprel (offset) | |
1886 | unsigned int offset; | |
1887 | { | |
1888 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1889 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1890 | return ptr; |
1891 | } | |
1892 | ||
1893 | static unw_rec_list * | |
1894 | output_fr_mem (mask) | |
1895 | unsigned int mask; | |
1896 | { | |
1897 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1898 | ptr->r.record.p.rmask = mask; | |
1899 | return ptr; | |
1900 | } | |
1901 | ||
1902 | static unw_rec_list * | |
1903 | output_frgr_mem (gr_mask, fr_mask) | |
1904 | unsigned int gr_mask; | |
1905 | unsigned int fr_mask; | |
1906 | { | |
1907 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1908 | ptr->r.record.p.grmask = gr_mask; | |
1909 | ptr->r.record.p.frmask = fr_mask; | |
1910 | return ptr; | |
1911 | } | |
1912 | ||
1913 | static unw_rec_list * | |
1914 | output_gr_gr (mask, reg) | |
1915 | unsigned int mask; | |
1916 | unsigned int reg; | |
1917 | { | |
1918 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1919 | ptr->r.record.p.grmask = mask; | |
1920 | ptr->r.record.p.gr = reg; | |
1921 | return ptr; | |
1922 | } | |
1923 | ||
1924 | static unw_rec_list * | |
1925 | output_gr_mem (mask) | |
1926 | unsigned int mask; | |
1927 | { | |
1928 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1929 | ptr->r.record.p.rmask = mask; | |
1930 | return ptr; | |
1931 | } | |
1932 | ||
1933 | static unw_rec_list * | |
1934 | output_br_mem (unsigned int mask) | |
1935 | { | |
1936 | unw_rec_list *ptr = alloc_record (br_mem); | |
1937 | ptr->r.record.p.brmask = mask; | |
1938 | return ptr; | |
1939 | } | |
1940 | ||
1941 | static unw_rec_list * | |
1942 | output_br_gr (save_mask, reg) | |
1943 | unsigned int save_mask; | |
1944 | unsigned int reg; | |
1945 | { | |
1946 | unw_rec_list *ptr = alloc_record (br_gr); | |
1947 | ptr->r.record.p.brmask = save_mask; | |
1948 | ptr->r.record.p.gr = reg; | |
1949 | return ptr; | |
1950 | } | |
1951 | ||
1952 | static unw_rec_list * | |
1953 | output_spill_base (offset) | |
1954 | unsigned int offset; | |
1955 | { | |
1956 | unw_rec_list *ptr = alloc_record (spill_base); | |
9f9a069e | 1957 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1958 | return ptr; |
1959 | } | |
1960 | ||
1961 | static unw_rec_list * | |
1962 | output_unat_when () | |
1963 | { | |
1964 | unw_rec_list *ptr = alloc_record (unat_when); | |
1965 | return ptr; | |
1966 | } | |
1967 | ||
1968 | static unw_rec_list * | |
1969 | output_unat_gr (gr) | |
1970 | unsigned int gr; | |
1971 | { | |
1972 | unw_rec_list *ptr = alloc_record (unat_gr); | |
1973 | ptr->r.record.p.gr = gr; | |
1974 | return ptr; | |
1975 | } | |
1976 | ||
1977 | static unw_rec_list * | |
1978 | output_unat_psprel (offset) | |
1979 | unsigned int offset; | |
1980 | { | |
1981 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
9f9a069e | 1982 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1983 | return ptr; |
1984 | } | |
1985 | ||
1986 | static unw_rec_list * | |
1987 | output_unat_sprel (offset) | |
1988 | unsigned int offset; | |
1989 | { | |
1990 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 1991 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1992 | return ptr; |
1993 | } | |
1994 | ||
1995 | static unw_rec_list * | |
1996 | output_lc_when () | |
1997 | { | |
1998 | unw_rec_list *ptr = alloc_record (lc_when); | |
1999 | return ptr; | |
2000 | } | |
2001 | ||
2002 | static unw_rec_list * | |
2003 | output_lc_gr (gr) | |
2004 | unsigned int gr; | |
2005 | { | |
2006 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2007 | ptr->r.record.p.gr = gr; | |
2008 | return ptr; | |
2009 | } | |
2010 | ||
2011 | static unw_rec_list * | |
2012 | output_lc_psprel (offset) | |
2013 | unsigned int offset; | |
2014 | { | |
2015 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
9f9a069e | 2016 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2017 | return ptr; |
2018 | } | |
2019 | ||
2020 | static unw_rec_list * | |
2021 | output_lc_sprel (offset) | |
2022 | unsigned int offset; | |
2023 | { | |
2024 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2025 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2026 | return ptr; |
2027 | } | |
2028 | ||
2029 | static unw_rec_list * | |
2030 | output_fpsr_when () | |
2031 | { | |
2032 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2033 | return ptr; | |
2034 | } | |
2035 | ||
2036 | static unw_rec_list * | |
2037 | output_fpsr_gr (gr) | |
2038 | unsigned int gr; | |
2039 | { | |
2040 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2041 | ptr->r.record.p.gr = gr; | |
2042 | return ptr; | |
2043 | } | |
2044 | ||
2045 | static unw_rec_list * | |
2046 | output_fpsr_psprel (offset) | |
2047 | unsigned int offset; | |
2048 | { | |
2049 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
9f9a069e | 2050 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2051 | return ptr; |
2052 | } | |
2053 | ||
2054 | static unw_rec_list * | |
2055 | output_fpsr_sprel (offset) | |
2056 | unsigned int offset; | |
2057 | { | |
2058 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2059 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2060 | return ptr; |
2061 | } | |
2062 | ||
2063 | static unw_rec_list * | |
2064 | output_priunat_when_gr () | |
2065 | { | |
2066 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2067 | return ptr; | |
2068 | } | |
2069 | ||
2070 | static unw_rec_list * | |
2071 | output_priunat_when_mem () | |
2072 | { | |
2073 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2074 | return ptr; | |
2075 | } | |
2076 | ||
2077 | static unw_rec_list * | |
2078 | output_priunat_gr (gr) | |
2079 | unsigned int gr; | |
2080 | { | |
2081 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2082 | ptr->r.record.p.gr = gr; | |
2083 | return ptr; | |
2084 | } | |
2085 | ||
2086 | static unw_rec_list * | |
2087 | output_priunat_psprel (offset) | |
2088 | unsigned int offset; | |
2089 | { | |
2090 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
9f9a069e | 2091 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2092 | return ptr; |
2093 | } | |
2094 | ||
2095 | static unw_rec_list * | |
2096 | output_priunat_sprel (offset) | |
2097 | unsigned int offset; | |
2098 | { | |
2099 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2100 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2101 | return ptr; |
2102 | } | |
2103 | ||
2104 | static unw_rec_list * | |
2105 | output_bsp_when () | |
2106 | { | |
2107 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2108 | return ptr; | |
2109 | } | |
2110 | ||
2111 | static unw_rec_list * | |
2112 | output_bsp_gr (gr) | |
2113 | unsigned int gr; | |
2114 | { | |
2115 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2116 | ptr->r.record.p.gr = gr; | |
2117 | return ptr; | |
2118 | } | |
2119 | ||
2120 | static unw_rec_list * | |
2121 | output_bsp_psprel (offset) | |
2122 | unsigned int offset; | |
2123 | { | |
2124 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
9f9a069e | 2125 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2126 | return ptr; |
2127 | } | |
2128 | ||
2129 | static unw_rec_list * | |
2130 | output_bsp_sprel (offset) | |
2131 | unsigned int offset; | |
2132 | { | |
2133 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2134 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2135 | return ptr; |
2136 | } | |
2137 | ||
2138 | static unw_rec_list * | |
2139 | output_bspstore_when () | |
2140 | { | |
2141 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2142 | return ptr; | |
2143 | } | |
2144 | ||
2145 | static unw_rec_list * | |
2146 | output_bspstore_gr (gr) | |
2147 | unsigned int gr; | |
2148 | { | |
2149 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2150 | ptr->r.record.p.gr = gr; | |
2151 | return ptr; | |
2152 | } | |
2153 | ||
2154 | static unw_rec_list * | |
2155 | output_bspstore_psprel (offset) | |
2156 | unsigned int offset; | |
2157 | { | |
2158 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
9f9a069e | 2159 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2160 | return ptr; |
2161 | } | |
2162 | ||
2163 | static unw_rec_list * | |
2164 | output_bspstore_sprel (offset) | |
2165 | unsigned int offset; | |
2166 | { | |
2167 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2168 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2169 | return ptr; |
2170 | } | |
2171 | ||
2172 | static unw_rec_list * | |
2173 | output_rnat_when () | |
2174 | { | |
2175 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2176 | return ptr; | |
2177 | } | |
2178 | ||
2179 | static unw_rec_list * | |
2180 | output_rnat_gr (gr) | |
2181 | unsigned int gr; | |
2182 | { | |
2183 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2184 | ptr->r.record.p.gr = gr; | |
2185 | return ptr; | |
2186 | } | |
2187 | ||
2188 | static unw_rec_list * | |
2189 | output_rnat_psprel (offset) | |
2190 | unsigned int offset; | |
2191 | { | |
2192 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
9f9a069e | 2193 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2194 | return ptr; |
2195 | } | |
2196 | ||
2197 | static unw_rec_list * | |
2198 | output_rnat_sprel (offset) | |
2199 | unsigned int offset; | |
2200 | { | |
2201 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2202 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2203 | return ptr; |
2204 | } | |
2205 | ||
2206 | static unw_rec_list * | |
e0c9811a JW |
2207 | output_unwabi (abi, context) |
2208 | unsigned long abi; | |
2209 | unsigned long context; | |
800eeca4 | 2210 | { |
e0c9811a JW |
2211 | unw_rec_list *ptr = alloc_record (unwabi); |
2212 | ptr->r.record.p.abi = abi; | |
2213 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2214 | return ptr; |
2215 | } | |
2216 | ||
2217 | static unw_rec_list * | |
e0c9811a | 2218 | output_epilogue (unsigned long ecount) |
800eeca4 | 2219 | { |
e0c9811a JW |
2220 | unw_rec_list *ptr = alloc_record (epilogue); |
2221 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2222 | return ptr; |
2223 | } | |
2224 | ||
2225 | static unw_rec_list * | |
e0c9811a | 2226 | output_label_state (unsigned long label) |
800eeca4 | 2227 | { |
e0c9811a JW |
2228 | unw_rec_list *ptr = alloc_record (label_state); |
2229 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2230 | return ptr; |
2231 | } | |
2232 | ||
2233 | static unw_rec_list * | |
e0c9811a JW |
2234 | output_copy_state (unsigned long label) |
2235 | { | |
2236 | unw_rec_list *ptr = alloc_record (copy_state); | |
2237 | ptr->r.record.b.label = label; | |
2238 | return ptr; | |
2239 | } | |
2240 | ||
2241 | static unw_rec_list * | |
2242 | output_spill_psprel (ab, reg, offset) | |
2243 | unsigned int ab; | |
800eeca4 JW |
2244 | unsigned int reg; |
2245 | unsigned int offset; | |
2246 | { | |
2247 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2248 | ptr->r.record.x.ab = ab; |
800eeca4 | 2249 | ptr->r.record.x.reg = reg; |
9f9a069e | 2250 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2251 | return ptr; |
2252 | } | |
2253 | ||
2254 | static unw_rec_list * | |
e0c9811a JW |
2255 | output_spill_sprel (ab, reg, offset) |
2256 | unsigned int ab; | |
800eeca4 JW |
2257 | unsigned int reg; |
2258 | unsigned int offset; | |
2259 | { | |
2260 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2261 | ptr->r.record.x.ab = ab; |
800eeca4 | 2262 | ptr->r.record.x.reg = reg; |
542d6675 | 2263 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2264 | return ptr; |
2265 | } | |
2266 | ||
2267 | static unw_rec_list * | |
e0c9811a JW |
2268 | output_spill_psprel_p (ab, reg, offset, predicate) |
2269 | unsigned int ab; | |
800eeca4 JW |
2270 | unsigned int reg; |
2271 | unsigned int offset; | |
2272 | unsigned int predicate; | |
2273 | { | |
2274 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2275 | ptr->r.record.x.ab = ab; |
800eeca4 | 2276 | ptr->r.record.x.reg = reg; |
9f9a069e | 2277 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2278 | ptr->r.record.x.qp = predicate; |
2279 | return ptr; | |
2280 | } | |
2281 | ||
2282 | static unw_rec_list * | |
e0c9811a JW |
2283 | output_spill_sprel_p (ab, reg, offset, predicate) |
2284 | unsigned int ab; | |
800eeca4 JW |
2285 | unsigned int reg; |
2286 | unsigned int offset; | |
2287 | unsigned int predicate; | |
2288 | { | |
2289 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2290 | ptr->r.record.x.ab = ab; |
800eeca4 | 2291 | ptr->r.record.x.reg = reg; |
542d6675 | 2292 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2293 | ptr->r.record.x.qp = predicate; |
2294 | return ptr; | |
2295 | } | |
2296 | ||
2297 | static unw_rec_list * | |
e0c9811a JW |
2298 | output_spill_reg (ab, reg, targ_reg, xy) |
2299 | unsigned int ab; | |
800eeca4 JW |
2300 | unsigned int reg; |
2301 | unsigned int targ_reg; | |
2302 | unsigned int xy; | |
2303 | { | |
2304 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2305 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2306 | ptr->r.record.x.reg = reg; |
2307 | ptr->r.record.x.treg = targ_reg; | |
2308 | ptr->r.record.x.xy = xy; | |
2309 | return ptr; | |
2310 | } | |
2311 | ||
2312 | static unw_rec_list * | |
e0c9811a JW |
2313 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2314 | unsigned int ab; | |
800eeca4 JW |
2315 | unsigned int reg; |
2316 | unsigned int targ_reg; | |
2317 | unsigned int xy; | |
2318 | unsigned int predicate; | |
2319 | { | |
2320 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2321 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2322 | ptr->r.record.x.reg = reg; |
2323 | ptr->r.record.x.treg = targ_reg; | |
2324 | ptr->r.record.x.xy = xy; | |
2325 | ptr->r.record.x.qp = predicate; | |
2326 | return ptr; | |
2327 | } | |
2328 | ||
197865e8 | 2329 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2330 | specified function. */ |
542d6675 | 2331 | |
800eeca4 JW |
2332 | static void |
2333 | process_one_record (ptr, f) | |
2334 | unw_rec_list *ptr; | |
2335 | vbyte_func f; | |
2336 | { | |
e0c9811a JW |
2337 | unsigned long fr_mask, gr_mask; |
2338 | ||
197865e8 | 2339 | switch (ptr->r.type) |
800eeca4 | 2340 | { |
5738bc24 JW |
2341 | /* This is a dummy record that takes up no space in the output. */ |
2342 | case endp: | |
2343 | break; | |
2344 | ||
542d6675 KH |
2345 | case gr_mem: |
2346 | case fr_mem: | |
2347 | case br_mem: | |
2348 | case frgr_mem: | |
2349 | /* These are taken care of by prologue/prologue_gr. */ | |
2350 | break; | |
e0c9811a | 2351 | |
542d6675 KH |
2352 | case prologue_gr: |
2353 | case prologue: | |
2354 | if (ptr->r.type == prologue_gr) | |
2355 | output_R2_format (f, ptr->r.record.r.grmask, | |
2356 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2357 | else | |
800eeca4 | 2358 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2359 | |
2360 | /* Output descriptor(s) for union of register spills (if any). */ | |
2361 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2362 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2363 | if (fr_mask) | |
2364 | { | |
2365 | if ((fr_mask & ~0xfUL) == 0) | |
2366 | output_P6_format (f, fr_mem, fr_mask); | |
2367 | else | |
2368 | { | |
2369 | output_P5_format (f, gr_mask, fr_mask); | |
2370 | gr_mask = 0; | |
2371 | } | |
2372 | } | |
2373 | if (gr_mask) | |
2374 | output_P6_format (f, gr_mem, gr_mask); | |
2375 | if (ptr->r.record.r.mask.br_mem) | |
2376 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2377 | ||
2378 | /* output imask descriptor if necessary: */ | |
2379 | if (ptr->r.record.r.mask.i) | |
2380 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2381 | ptr->r.record.r.imask_size); | |
2382 | break; | |
2383 | ||
2384 | case body: | |
2385 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2386 | break; | |
2387 | case mem_stack_f: | |
2388 | case mem_stack_v: | |
2389 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2390 | ptr->r.record.p.size); | |
2391 | break; | |
2392 | case psp_gr: | |
2393 | case rp_gr: | |
2394 | case pfs_gr: | |
2395 | case preds_gr: | |
2396 | case unat_gr: | |
2397 | case lc_gr: | |
2398 | case fpsr_gr: | |
2399 | case priunat_gr: | |
2400 | case bsp_gr: | |
2401 | case bspstore_gr: | |
2402 | case rnat_gr: | |
2403 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2404 | break; | |
2405 | case rp_br: | |
2406 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2407 | break; | |
2408 | case psp_sprel: | |
2409 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2410 | break; | |
2411 | case rp_when: | |
2412 | case pfs_when: | |
2413 | case preds_when: | |
2414 | case unat_when: | |
2415 | case lc_when: | |
2416 | case fpsr_when: | |
2417 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2418 | break; | |
2419 | case rp_psprel: | |
2420 | case pfs_psprel: | |
2421 | case preds_psprel: | |
2422 | case unat_psprel: | |
2423 | case lc_psprel: | |
2424 | case fpsr_psprel: | |
2425 | case spill_base: | |
2426 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2427 | break; | |
2428 | case rp_sprel: | |
2429 | case pfs_sprel: | |
2430 | case preds_sprel: | |
2431 | case unat_sprel: | |
2432 | case lc_sprel: | |
2433 | case fpsr_sprel: | |
2434 | case priunat_sprel: | |
2435 | case bsp_sprel: | |
2436 | case bspstore_sprel: | |
2437 | case rnat_sprel: | |
2438 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2439 | break; | |
2440 | case gr_gr: | |
2441 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2442 | break; | |
2443 | case br_gr: | |
2444 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2445 | break; | |
2446 | case spill_mask: | |
2447 | as_bad ("spill_mask record unimplemented."); | |
2448 | break; | |
2449 | case priunat_when_gr: | |
2450 | case priunat_when_mem: | |
2451 | case bsp_when: | |
2452 | case bspstore_when: | |
2453 | case rnat_when: | |
2454 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2455 | break; | |
2456 | case priunat_psprel: | |
2457 | case bsp_psprel: | |
2458 | case bspstore_psprel: | |
2459 | case rnat_psprel: | |
2460 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2461 | break; | |
2462 | case unwabi: | |
2463 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2464 | break; | |
2465 | case epilogue: | |
2466 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2467 | break; | |
2468 | case label_state: | |
2469 | case copy_state: | |
2470 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2471 | break; | |
2472 | case spill_psprel: | |
2473 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2474 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2475 | ptr->r.record.x.pspoff); | |
2476 | break; | |
2477 | case spill_sprel: | |
2478 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2479 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2480 | ptr->r.record.x.spoff); | |
2481 | break; | |
2482 | case spill_reg: | |
2483 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2484 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2485 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2486 | break; | |
2487 | case spill_psprel_p: | |
2488 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2489 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2490 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2491 | break; | |
2492 | case spill_sprel_p: | |
2493 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2494 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2495 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2496 | break; | |
2497 | case spill_reg_p: | |
2498 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2499 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2500 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2501 | ptr->r.record.x.t); | |
2502 | break; | |
2503 | default: | |
2504 | as_bad ("record_type_not_valid"); | |
2505 | break; | |
800eeca4 JW |
2506 | } |
2507 | } | |
2508 | ||
197865e8 | 2509 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2510 | the specified function. */ |
2511 | static void | |
2512 | process_unw_records (list, f) | |
2513 | unw_rec_list *list; | |
2514 | vbyte_func f; | |
2515 | { | |
2516 | unw_rec_list *ptr; | |
2517 | for (ptr = list; ptr; ptr = ptr->next) | |
2518 | process_one_record (ptr, f); | |
2519 | } | |
2520 | ||
2521 | /* Determine the size of a record list in bytes. */ | |
2522 | static int | |
2523 | calc_record_size (list) | |
2524 | unw_rec_list *list; | |
2525 | { | |
2526 | vbyte_count = 0; | |
2527 | process_unw_records (list, count_output); | |
2528 | return vbyte_count; | |
2529 | } | |
2530 | ||
e0c9811a JW |
2531 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2532 | of type TYPE are saved starting at instruction with index T. If N | |
2533 | bits are set in REGMASK, it is assumed that instructions T through | |
2534 | T+N-1 save these registers. | |
2535 | ||
2536 | TYPE values: | |
2537 | 0: no save | |
2538 | 1: instruction saves next fp reg | |
2539 | 2: instruction saves next general reg | |
2540 | 3: instruction saves next branch reg */ | |
2541 | static void | |
2542 | set_imask (region, regmask, t, type) | |
2543 | unw_rec_list *region; | |
2544 | unsigned long regmask; | |
2545 | unsigned long t; | |
2546 | unsigned int type; | |
2547 | { | |
2548 | unsigned char *imask; | |
2549 | unsigned long imask_size; | |
2550 | unsigned int i; | |
2551 | int pos; | |
2552 | ||
2553 | imask = region->r.record.r.mask.i; | |
2554 | imask_size = region->r.record.r.imask_size; | |
2555 | if (!imask) | |
2556 | { | |
542d6675 | 2557 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2558 | imask = xmalloc (imask_size); |
2559 | memset (imask, 0, imask_size); | |
2560 | ||
2561 | region->r.record.r.imask_size = imask_size; | |
2562 | region->r.record.r.mask.i = imask; | |
2563 | } | |
2564 | ||
542d6675 KH |
2565 | i = (t / 4) + 1; |
2566 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2567 | while (regmask) |
2568 | { | |
2569 | if (i >= imask_size) | |
2570 | { | |
2571 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2572 | return; | |
2573 | } | |
2574 | ||
2575 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2576 | |
e0c9811a JW |
2577 | regmask &= (regmask - 1); |
2578 | pos -= 2; | |
2579 | if (pos < 0) | |
2580 | { | |
2581 | pos = 0; | |
2582 | ++i; | |
2583 | } | |
2584 | } | |
2585 | } | |
2586 | ||
f5a30c2e JW |
2587 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2588 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2589 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2590 | for frag sizes. */ | |
f5a30c2e | 2591 | |
e0c9811a | 2592 | unsigned long |
b5e0fabd | 2593 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2594 | unsigned long slot_addr; |
2595 | fragS *slot_frag; | |
2596 | unsigned long first_addr; | |
2597 | fragS *first_frag; | |
b5e0fabd | 2598 | int before_relax; |
e0c9811a | 2599 | { |
f5a30c2e JW |
2600 | unsigned long index = 0; |
2601 | ||
2602 | /* First time we are called, the initial address and frag are invalid. */ | |
2603 | if (first_addr == 0) | |
2604 | return 0; | |
2605 | ||
2606 | /* If the two addresses are in different frags, then we need to add in | |
2607 | the remaining size of this frag, and then the entire size of intermediate | |
2608 | frags. */ | |
2609 | while (slot_frag != first_frag) | |
2610 | { | |
2611 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2612 | ||
b5e0fabd | 2613 | if (! before_relax) |
73f20958 | 2614 | { |
b5e0fabd JW |
2615 | /* We can get the final addresses only during and after |
2616 | relaxation. */ | |
73f20958 L |
2617 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2618 | index += 3 * ((first_frag->fr_next->fr_address | |
2619 | - first_frag->fr_address | |
2620 | - first_frag->fr_fix) >> 4); | |
2621 | } | |
2622 | else | |
2623 | /* We don't know what the final addresses will be. We try our | |
2624 | best to estimate. */ | |
2625 | switch (first_frag->fr_type) | |
2626 | { | |
2627 | default: | |
2628 | break; | |
2629 | ||
2630 | case rs_space: | |
2631 | as_fatal ("only constant space allocation is supported"); | |
2632 | break; | |
2633 | ||
2634 | case rs_align: | |
2635 | case rs_align_code: | |
2636 | case rs_align_test: | |
2637 | /* Take alignment into account. Assume the worst case | |
2638 | before relaxation. */ | |
2639 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2640 | break; | |
2641 | ||
2642 | case rs_org: | |
2643 | if (first_frag->fr_symbol) | |
2644 | { | |
2645 | as_fatal ("only constant offsets are supported"); | |
2646 | break; | |
2647 | } | |
2648 | case rs_fill: | |
2649 | index += 3 * (first_frag->fr_offset >> 4); | |
2650 | break; | |
2651 | } | |
2652 | ||
f5a30c2e JW |
2653 | /* Add in the full size of the frag converted to instruction slots. */ |
2654 | index += 3 * (first_frag->fr_fix >> 4); | |
2655 | /* Subtract away the initial part before first_addr. */ | |
2656 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2657 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2658 | |
f5a30c2e JW |
2659 | /* Move to the beginning of the next frag. */ |
2660 | first_frag = first_frag->fr_next; | |
2661 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2662 | } | |
2663 | ||
2664 | /* Add in the used part of the last frag. */ | |
2665 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2666 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2667 | return index; | |
2668 | } | |
4a1805b1 | 2669 | |
91a2ae2a RH |
2670 | /* Optimize unwind record directives. */ |
2671 | ||
2672 | static unw_rec_list * | |
2673 | optimize_unw_records (list) | |
2674 | unw_rec_list *list; | |
2675 | { | |
2676 | if (!list) | |
2677 | return NULL; | |
2678 | ||
2679 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2680 | by ".body", then we can optimize the unwind directives away. */ | |
2681 | if (list->r.type == prologue | |
5738bc24 JW |
2682 | && (list->next->r.type == endp |
2683 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2684 | return NULL; |
2685 | ||
2686 | return list; | |
2687 | } | |
2688 | ||
800eeca4 JW |
2689 | /* Given a complete record list, process any records which have |
2690 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2691 | this has been run, all necessary information should be available |
800eeca4 | 2692 | within each record to generate an image. */ |
542d6675 | 2693 | |
800eeca4 | 2694 | static void |
b5e0fabd | 2695 | fixup_unw_records (list, before_relax) |
800eeca4 | 2696 | unw_rec_list *list; |
b5e0fabd | 2697 | int before_relax; |
800eeca4 | 2698 | { |
e0c9811a JW |
2699 | unw_rec_list *ptr, *region = 0; |
2700 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2701 | fragS *first_frag = 0; |
e0c9811a | 2702 | |
800eeca4 JW |
2703 | for (ptr = list; ptr; ptr = ptr->next) |
2704 | { | |
2705 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2706 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2707 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2708 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2709 | switch (ptr->r.type) |
2710 | { | |
542d6675 KH |
2711 | case prologue: |
2712 | case prologue_gr: | |
2713 | case body: | |
2714 | { | |
2715 | unw_rec_list *last; | |
5738bc24 JW |
2716 | int size; |
2717 | unsigned long last_addr = 0; | |
2718 | fragS *last_frag = NULL; | |
542d6675 KH |
2719 | |
2720 | first_addr = ptr->slot_number; | |
f5a30c2e | 2721 | first_frag = ptr->slot_frag; |
542d6675 | 2722 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2723 | the function, and determine the size of the region. */ |
542d6675 KH |
2724 | for (last = ptr->next; last != NULL; last = last->next) |
2725 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2726 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2727 | { |
2728 | last_addr = last->slot_number; | |
f5a30c2e | 2729 | last_frag = last->slot_frag; |
542d6675 KH |
2730 | break; |
2731 | } | |
b5e0fabd JW |
2732 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2733 | before_relax); | |
542d6675 | 2734 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2735 | if (ptr->r.type == body) |
2736 | /* End of region. */ | |
2737 | region = 0; | |
2738 | else | |
2739 | region = ptr; | |
e0c9811a | 2740 | break; |
542d6675 KH |
2741 | } |
2742 | case epilogue: | |
ed7af9f9 L |
2743 | if (t < rlen) |
2744 | ptr->r.record.b.t = rlen - 1 - t; | |
2745 | else | |
2746 | /* This happens when a memory-stack-less procedure uses a | |
2747 | ".restore sp" directive at the end of a region to pop | |
2748 | the frame state. */ | |
2749 | ptr->r.record.b.t = 0; | |
542d6675 | 2750 | break; |
e0c9811a | 2751 | |
542d6675 KH |
2752 | case mem_stack_f: |
2753 | case mem_stack_v: | |
2754 | case rp_when: | |
2755 | case pfs_when: | |
2756 | case preds_when: | |
2757 | case unat_when: | |
2758 | case lc_when: | |
2759 | case fpsr_when: | |
2760 | case priunat_when_gr: | |
2761 | case priunat_when_mem: | |
2762 | case bsp_when: | |
2763 | case bspstore_when: | |
2764 | case rnat_when: | |
2765 | ptr->r.record.p.t = t; | |
2766 | break; | |
e0c9811a | 2767 | |
542d6675 KH |
2768 | case spill_reg: |
2769 | case spill_sprel: | |
2770 | case spill_psprel: | |
2771 | case spill_reg_p: | |
2772 | case spill_sprel_p: | |
2773 | case spill_psprel_p: | |
2774 | ptr->r.record.x.t = t; | |
2775 | break; | |
e0c9811a | 2776 | |
542d6675 KH |
2777 | case frgr_mem: |
2778 | if (!region) | |
2779 | { | |
75e09913 | 2780 | as_bad ("frgr_mem record before region record!"); |
542d6675 KH |
2781 | return; |
2782 | } | |
2783 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2784 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2785 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2786 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2787 | break; | |
2788 | case fr_mem: | |
2789 | if (!region) | |
2790 | { | |
75e09913 | 2791 | as_bad ("fr_mem record before region record!"); |
542d6675 KH |
2792 | return; |
2793 | } | |
2794 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2795 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2796 | break; | |
2797 | case gr_mem: | |
2798 | if (!region) | |
2799 | { | |
75e09913 | 2800 | as_bad ("gr_mem record before region record!"); |
542d6675 KH |
2801 | return; |
2802 | } | |
2803 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2804 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2805 | break; | |
2806 | case br_mem: | |
2807 | if (!region) | |
2808 | { | |
75e09913 | 2809 | as_bad ("br_mem record before region record!"); |
542d6675 KH |
2810 | return; |
2811 | } | |
2812 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2813 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2814 | break; | |
e0c9811a | 2815 | |
542d6675 KH |
2816 | case gr_gr: |
2817 | if (!region) | |
2818 | { | |
75e09913 | 2819 | as_bad ("gr_gr record before region record!"); |
542d6675 KH |
2820 | return; |
2821 | } | |
2822 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2823 | break; | |
2824 | case br_gr: | |
2825 | if (!region) | |
2826 | { | |
75e09913 | 2827 | as_bad ("br_gr record before region record!"); |
542d6675 KH |
2828 | return; |
2829 | } | |
2830 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2831 | break; | |
e0c9811a | 2832 | |
542d6675 KH |
2833 | default: |
2834 | break; | |
800eeca4 JW |
2835 | } |
2836 | } | |
2837 | } | |
2838 | ||
b5e0fabd JW |
2839 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2840 | to handle here, which is the unwind info frag. */ | |
2841 | ||
2842 | int | |
2843 | ia64_estimate_size_before_relax (fragS *frag, | |
2844 | asection *segtype ATTRIBUTE_UNUSED) | |
2845 | { | |
2846 | unw_rec_list *list; | |
2847 | int len, size, pad; | |
2848 | ||
2849 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2850 | list = (unw_rec_list *) frag->fr_opcode; | |
2851 | fixup_unw_records (list, 0); | |
2852 | ||
2853 | len = calc_record_size (list); | |
2854 | /* pad to pointer-size boundary. */ | |
2855 | pad = len % md.pointer_size; | |
2856 | if (pad != 0) | |
2857 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2858 | /* Add 8 for the header. */ |
2859 | size = len + 8; | |
2860 | /* Add a pointer for the personality offset. */ | |
2861 | if (frag->fr_offset) | |
2862 | size += md.pointer_size; | |
b5e0fabd JW |
2863 | |
2864 | /* fr_var carries the max_chars that we created the fragment with. | |
2865 | We must, of course, have allocated enough memory earlier. */ | |
2866 | assert (frag->fr_var >= size); | |
2867 | ||
2868 | return frag->fr_fix + size; | |
2869 | } | |
2870 | ||
73f20958 L |
2871 | /* This function converts a rs_machine_dependent variant frag into a |
2872 | normal fill frag with the unwind image from the the record list. */ | |
2873 | void | |
2874 | ia64_convert_frag (fragS *frag) | |
557debba | 2875 | { |
73f20958 L |
2876 | unw_rec_list *list; |
2877 | int len, size, pad; | |
1cd8ff38 | 2878 | valueT flag_value; |
557debba | 2879 | |
b5e0fabd | 2880 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2881 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2882 | fixup_unw_records (list, 0); |
1cd8ff38 | 2883 | |
73f20958 L |
2884 | len = calc_record_size (list); |
2885 | /* pad to pointer-size boundary. */ | |
2886 | pad = len % md.pointer_size; | |
2887 | if (pad != 0) | |
2888 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2889 | /* Add 8 for the header. */ |
2890 | size = len + 8; | |
2891 | /* Add a pointer for the personality offset. */ | |
2892 | if (frag->fr_offset) | |
2893 | size += md.pointer_size; | |
73f20958 L |
2894 | |
2895 | /* fr_var carries the max_chars that we created the fragment with. | |
2896 | We must, of course, have allocated enough memory earlier. */ | |
2897 | assert (frag->fr_var >= size); | |
2898 | ||
2899 | /* Initialize the header area. fr_offset is initialized with | |
2900 | unwind.personality_routine. */ | |
2901 | if (frag->fr_offset) | |
1cd8ff38 NC |
2902 | { |
2903 | if (md.flags & EF_IA_64_ABI64) | |
2904 | flag_value = (bfd_vma) 3 << 32; | |
2905 | else | |
2906 | /* 32-bit unwind info block. */ | |
2907 | flag_value = (bfd_vma) 0x1003 << 32; | |
2908 | } | |
2909 | else | |
2910 | flag_value = 0; | |
557debba | 2911 | |
73f20958 L |
2912 | md_number_to_chars (frag->fr_literal, |
2913 | (((bfd_vma) 1 << 48) /* Version. */ | |
2914 | | flag_value /* U & E handler flags. */ | |
2915 | | (len / md.pointer_size)), /* Length. */ | |
2916 | 8); | |
557debba | 2917 | |
73f20958 L |
2918 | /* Skip the header. */ |
2919 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2920 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2921 | |
2922 | /* Fill the padding bytes with zeros. */ | |
2923 | if (pad != 0) | |
2924 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2925 | md.pointer_size - pad); | |
2926 | ||
73f20958 L |
2927 | frag->fr_fix += size; |
2928 | frag->fr_type = rs_fill; | |
2929 | frag->fr_var = 0; | |
2930 | frag->fr_offset = 0; | |
800eeca4 JW |
2931 | } |
2932 | ||
e0c9811a JW |
2933 | static int |
2934 | convert_expr_to_ab_reg (e, ab, regp) | |
2935 | expressionS *e; | |
2936 | unsigned int *ab; | |
2937 | unsigned int *regp; | |
2938 | { | |
2939 | unsigned int reg; | |
2940 | ||
2941 | if (e->X_op != O_register) | |
2942 | return 0; | |
2943 | ||
2944 | reg = e->X_add_number; | |
2434f565 | 2945 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2946 | { |
2947 | *ab = 0; | |
2948 | *regp = reg - REG_GR; | |
2949 | } | |
2434f565 JW |
2950 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2951 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2952 | { |
2953 | *ab = 1; | |
2954 | *regp = reg - REG_FR; | |
2955 | } | |
2434f565 | 2956 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2957 | { |
2958 | *ab = 2; | |
2959 | *regp = reg - REG_BR; | |
2960 | } | |
2961 | else | |
2962 | { | |
2963 | *ab = 3; | |
2964 | switch (reg) | |
2965 | { | |
2966 | case REG_PR: *regp = 0; break; | |
2967 | case REG_PSP: *regp = 1; break; | |
2968 | case REG_PRIUNAT: *regp = 2; break; | |
2969 | case REG_BR + 0: *regp = 3; break; | |
2970 | case REG_AR + AR_BSP: *regp = 4; break; | |
2971 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2972 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2973 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2974 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2975 | case REG_AR + AR_PFS: *regp = 9; break; | |
2976 | case REG_AR + AR_LC: *regp = 10; break; | |
2977 | ||
2978 | default: | |
2979 | return 0; | |
2980 | } | |
2981 | } | |
2982 | return 1; | |
197865e8 | 2983 | } |
e0c9811a JW |
2984 | |
2985 | static int | |
2986 | convert_expr_to_xy_reg (e, xy, regp) | |
2987 | expressionS *e; | |
2988 | unsigned int *xy; | |
2989 | unsigned int *regp; | |
2990 | { | |
2991 | unsigned int reg; | |
2992 | ||
2993 | if (e->X_op != O_register) | |
2994 | return 0; | |
2995 | ||
2996 | reg = e->X_add_number; | |
2997 | ||
2434f565 | 2998 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
2999 | { |
3000 | *xy = 0; | |
3001 | *regp = reg - REG_GR; | |
3002 | } | |
2434f565 | 3003 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
3004 | { |
3005 | *xy = 1; | |
3006 | *regp = reg - REG_FR; | |
3007 | } | |
2434f565 | 3008 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3009 | { |
3010 | *xy = 2; | |
3011 | *regp = reg - REG_BR; | |
3012 | } | |
3013 | else | |
3014 | return -1; | |
3015 | return 1; | |
197865e8 | 3016 | } |
e0c9811a | 3017 | |
d9201763 L |
3018 | static void |
3019 | dot_align (int arg) | |
3020 | { | |
3021 | /* The current frag is an alignment frag. */ | |
3022 | align_frag = frag_now; | |
3023 | s_align_bytes (arg); | |
3024 | } | |
3025 | ||
800eeca4 JW |
3026 | static void |
3027 | dot_radix (dummy) | |
2434f565 | 3028 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3029 | { |
3030 | int radix; | |
3031 | ||
3032 | SKIP_WHITESPACE (); | |
3033 | radix = *input_line_pointer++; | |
3034 | ||
3035 | if (radix != 'C' && !is_end_of_line[(unsigned char) radix]) | |
3036 | { | |
3037 | as_bad ("Radix `%c' unsupported", *input_line_pointer); | |
542d6675 | 3038 | ignore_rest_of_line (); |
800eeca4 JW |
3039 | return; |
3040 | } | |
3041 | } | |
3042 | ||
196e8040 JW |
3043 | /* Helper function for .loc directives. If the assembler is not generating |
3044 | line number info, then we need to remember which instructions have a .loc | |
3045 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3046 | ||
3047 | static void | |
3048 | dot_loc (int x) | |
3049 | { | |
3050 | CURR_SLOT.loc_directive_seen = 1; | |
3051 | dwarf2_directive_loc (x); | |
3052 | } | |
3053 | ||
800eeca4 JW |
3054 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3055 | static void | |
3056 | dot_special_section (which) | |
3057 | int which; | |
3058 | { | |
3059 | set_section ((char *) special_section_name[which]); | |
3060 | } | |
3061 | ||
07450571 L |
3062 | /* Return -1 for warning and 0 for error. */ |
3063 | ||
3064 | static int | |
970d6792 L |
3065 | unwind_diagnostic (const char * region, const char *directive) |
3066 | { | |
3067 | if (md.unwind_check == unwind_check_warning) | |
07450571 L |
3068 | { |
3069 | as_warn (".%s outside of %s", directive, region); | |
3070 | return -1; | |
3071 | } | |
970d6792 L |
3072 | else |
3073 | { | |
3074 | as_bad (".%s outside of %s", directive, region); | |
3075 | ignore_rest_of_line (); | |
07450571 | 3076 | return 0; |
970d6792 L |
3077 | } |
3078 | } | |
3079 | ||
07450571 L |
3080 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3081 | a procedure but the unwind directive check is set to warning, 0 if | |
3082 | a directive isn't in a procedure and the unwind directive check is set | |
3083 | to error. */ | |
3084 | ||
75e09913 JB |
3085 | static int |
3086 | in_procedure (const char *directive) | |
3087 | { | |
3088 | if (unwind.proc_start | |
3089 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) | |
3090 | return 1; | |
07450571 | 3091 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3092 | } |
3093 | ||
07450571 L |
3094 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3095 | a prologue but the unwind directive check is set to warning, 0 if | |
3096 | a directive isn't in a prologue and the unwind directive check is set | |
3097 | to error. */ | |
3098 | ||
75e09913 JB |
3099 | static int |
3100 | in_prologue (const char *directive) | |
3101 | { | |
07450571 L |
3102 | int in = in_procedure (directive); |
3103 | if (in) | |
75e09913 | 3104 | { |
970d6792 | 3105 | /* We are in a procedure. Check if we are in a prologue. */ |
75e09913 JB |
3106 | if (unwind.prologue) |
3107 | return 1; | |
07450571 L |
3108 | /* We only want to issue one message. */ |
3109 | if (in == 1) | |
3110 | return unwind_diagnostic ("prologue", directive); | |
3111 | else | |
3112 | return -1; | |
75e09913 JB |
3113 | } |
3114 | return 0; | |
3115 | } | |
3116 | ||
07450571 L |
3117 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3118 | a body but the unwind directive check is set to warning, 0 if | |
3119 | a directive isn't in a body and the unwind directive check is set | |
3120 | to error. */ | |
3121 | ||
75e09913 JB |
3122 | static int |
3123 | in_body (const char *directive) | |
3124 | { | |
07450571 L |
3125 | int in = in_procedure (directive); |
3126 | if (in) | |
75e09913 | 3127 | { |
970d6792 | 3128 | /* We are in a procedure. Check if we are in a body. */ |
75e09913 JB |
3129 | if (unwind.body) |
3130 | return 1; | |
07450571 L |
3131 | /* We only want to issue one message. */ |
3132 | if (in == 1) | |
3133 | return unwind_diagnostic ("body region", directive); | |
3134 | else | |
3135 | return -1; | |
75e09913 JB |
3136 | } |
3137 | return 0; | |
3138 | } | |
3139 | ||
800eeca4 JW |
3140 | static void |
3141 | add_unwind_entry (ptr) | |
3142 | unw_rec_list *ptr; | |
3143 | { | |
e0c9811a JW |
3144 | if (unwind.tail) |
3145 | unwind.tail->next = ptr; | |
800eeca4 | 3146 | else |
e0c9811a JW |
3147 | unwind.list = ptr; |
3148 | unwind.tail = ptr; | |
800eeca4 JW |
3149 | |
3150 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3151 | if (unwind.current_entry == NULL) |
3152 | unwind.current_entry = ptr; | |
800eeca4 JW |
3153 | } |
3154 | ||
197865e8 | 3155 | static void |
800eeca4 | 3156 | dot_fframe (dummy) |
2434f565 | 3157 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3158 | { |
3159 | expressionS e; | |
e0c9811a | 3160 | |
75e09913 JB |
3161 | if (!in_prologue ("fframe")) |
3162 | return; | |
3163 | ||
800eeca4 | 3164 | parse_operand (&e); |
197865e8 | 3165 | |
800eeca4 JW |
3166 | if (e.X_op != O_constant) |
3167 | as_bad ("Operand to .fframe must be a constant"); | |
3168 | else | |
e0c9811a JW |
3169 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3170 | } | |
3171 | ||
197865e8 | 3172 | static void |
e0c9811a | 3173 | dot_vframe (dummy) |
2434f565 | 3174 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3175 | { |
3176 | expressionS e; | |
3177 | unsigned reg; | |
3178 | ||
75e09913 JB |
3179 | if (!in_prologue ("vframe")) |
3180 | return; | |
3181 | ||
e0c9811a JW |
3182 | parse_operand (&e); |
3183 | reg = e.X_add_number - REG_GR; | |
3184 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3185 | { |
e0c9811a | 3186 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3187 | if (! (unwind.prologue_mask & 2)) |
3188 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3189 | } |
e0c9811a JW |
3190 | else |
3191 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3192 | } |
3193 | ||
197865e8 | 3194 | static void |
e0c9811a | 3195 | dot_vframesp (dummy) |
2434f565 | 3196 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3197 | { |
e0c9811a JW |
3198 | expressionS e; |
3199 | ||
75e09913 JB |
3200 | if (!in_prologue ("vframesp")) |
3201 | return; | |
3202 | ||
e0c9811a JW |
3203 | parse_operand (&e); |
3204 | if (e.X_op == O_constant) | |
3205 | { | |
3206 | add_unwind_entry (output_mem_stack_v ()); | |
3207 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3208 | } | |
3209 | else | |
69906a9b | 3210 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3211 | } |
3212 | ||
197865e8 | 3213 | static void |
e0c9811a | 3214 | dot_vframepsp (dummy) |
2434f565 | 3215 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3216 | { |
3217 | expressionS e; | |
3218 | ||
75e09913 JB |
3219 | if (!in_prologue ("vframepsp")) |
3220 | return; | |
3221 | ||
e0c9811a JW |
3222 | parse_operand (&e); |
3223 | if (e.X_op == O_constant) | |
3224 | { | |
3225 | add_unwind_entry (output_mem_stack_v ()); | |
3226 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3227 | } | |
3228 | else | |
69906a9b | 3229 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3230 | } |
3231 | ||
197865e8 | 3232 | static void |
800eeca4 | 3233 | dot_save (dummy) |
2434f565 | 3234 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3235 | { |
3236 | expressionS e1, e2; | |
3237 | int sep; | |
3238 | int reg1, reg2; | |
3239 | ||
75e09913 JB |
3240 | if (!in_prologue ("save")) |
3241 | return; | |
3242 | ||
800eeca4 JW |
3243 | sep = parse_operand (&e1); |
3244 | if (sep != ',') | |
3245 | as_bad ("No second operand to .save"); | |
3246 | sep = parse_operand (&e2); | |
3247 | ||
e0c9811a | 3248 | reg1 = e1.X_add_number; |
800eeca4 | 3249 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3250 | |
800eeca4 | 3251 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3252 | if (e1.X_op == O_register) |
800eeca4 | 3253 | { |
542d6675 | 3254 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3255 | { |
3256 | switch (reg1) | |
3257 | { | |
542d6675 KH |
3258 | case REG_AR + AR_BSP: |
3259 | add_unwind_entry (output_bsp_when ()); | |
3260 | add_unwind_entry (output_bsp_gr (reg2)); | |
3261 | break; | |
3262 | case REG_AR + AR_BSPSTORE: | |
3263 | add_unwind_entry (output_bspstore_when ()); | |
3264 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3265 | break; | |
3266 | case REG_AR + AR_RNAT: | |
3267 | add_unwind_entry (output_rnat_when ()); | |
3268 | add_unwind_entry (output_rnat_gr (reg2)); | |
3269 | break; | |
3270 | case REG_AR + AR_UNAT: | |
3271 | add_unwind_entry (output_unat_when ()); | |
3272 | add_unwind_entry (output_unat_gr (reg2)); | |
3273 | break; | |
3274 | case REG_AR + AR_FPSR: | |
3275 | add_unwind_entry (output_fpsr_when ()); | |
3276 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3277 | break; | |
3278 | case REG_AR + AR_PFS: | |
3279 | add_unwind_entry (output_pfs_when ()); | |
3280 | if (! (unwind.prologue_mask & 4)) | |
3281 | add_unwind_entry (output_pfs_gr (reg2)); | |
3282 | break; | |
3283 | case REG_AR + AR_LC: | |
3284 | add_unwind_entry (output_lc_when ()); | |
3285 | add_unwind_entry (output_lc_gr (reg2)); | |
3286 | break; | |
3287 | case REG_BR: | |
3288 | add_unwind_entry (output_rp_when ()); | |
3289 | if (! (unwind.prologue_mask & 8)) | |
3290 | add_unwind_entry (output_rp_gr (reg2)); | |
3291 | break; | |
3292 | case REG_PR: | |
3293 | add_unwind_entry (output_preds_when ()); | |
3294 | if (! (unwind.prologue_mask & 1)) | |
3295 | add_unwind_entry (output_preds_gr (reg2)); | |
3296 | break; | |
3297 | case REG_PRIUNAT: | |
3298 | add_unwind_entry (output_priunat_when_gr ()); | |
3299 | add_unwind_entry (output_priunat_gr (reg2)); | |
3300 | break; | |
3301 | default: | |
3302 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3303 | } |
3304 | } | |
3305 | else | |
3306 | as_bad (" Second operand not a valid register"); | |
3307 | } | |
3308 | else | |
e0c9811a | 3309 | as_bad ("First operand not a register"); |
800eeca4 JW |
3310 | } |
3311 | ||
197865e8 | 3312 | static void |
800eeca4 | 3313 | dot_restore (dummy) |
2434f565 | 3314 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3315 | { |
e0c9811a | 3316 | expressionS e1, e2; |
33d01f33 | 3317 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3318 | int sep; |
3319 | ||
75e09913 JB |
3320 | if (!in_body ("restore")) |
3321 | return; | |
3322 | ||
e0c9811a JW |
3323 | sep = parse_operand (&e1); |
3324 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3325 | { | |
3326 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3327 | return; | |
3328 | } | |
3329 | ||
3330 | if (sep == ',') | |
3331 | { | |
3332 | parse_operand (&e2); | |
33d01f33 | 3333 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3334 | { |
33d01f33 | 3335 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3336 | return; |
3337 | } | |
33d01f33 | 3338 | ecount = e2.X_add_number; |
e0c9811a | 3339 | } |
33d01f33 JW |
3340 | else |
3341 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3342 | |
3343 | if (ecount >= unwind.prologue_count) | |
3344 | { | |
3345 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3346 | ecount + 1, unwind.prologue_count); | |
3347 | return; | |
3348 | } | |
3349 | ||
e0c9811a | 3350 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3351 | |
3352 | if (ecount < unwind.prologue_count) | |
3353 | unwind.prologue_count -= ecount + 1; | |
3354 | else | |
3355 | unwind.prologue_count = 0; | |
e0c9811a JW |
3356 | } |
3357 | ||
197865e8 | 3358 | static void |
e0c9811a | 3359 | dot_restorereg (dummy) |
2434f565 | 3360 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3361 | { |
3362 | unsigned int ab, reg; | |
3363 | expressionS e; | |
3364 | ||
75e09913 JB |
3365 | if (!in_procedure ("restorereg")) |
3366 | return; | |
3367 | ||
e0c9811a JW |
3368 | parse_operand (&e); |
3369 | ||
3370 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3371 | { | |
3372 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3373 | return; | |
3374 | } | |
3375 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3376 | } | |
3377 | ||
197865e8 | 3378 | static void |
e0c9811a | 3379 | dot_restorereg_p (dummy) |
2434f565 | 3380 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3381 | { |
3382 | unsigned int qp, ab, reg; | |
3383 | expressionS e1, e2; | |
3384 | int sep; | |
3385 | ||
75e09913 JB |
3386 | if (!in_procedure ("restorereg.p")) |
3387 | return; | |
3388 | ||
e0c9811a JW |
3389 | sep = parse_operand (&e1); |
3390 | if (sep != ',') | |
3391 | { | |
3392 | as_bad ("No second operand to .restorereg.p"); | |
3393 | return; | |
3394 | } | |
3395 | ||
3396 | parse_operand (&e2); | |
3397 | ||
3398 | qp = e1.X_add_number - REG_P; | |
3399 | if (e1.X_op != O_register || qp > 63) | |
3400 | { | |
3401 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3402 | return; | |
3403 | } | |
3404 | ||
3405 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3406 | { | |
3407 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3408 | return; | |
3409 | } | |
3410 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3411 | } |
3412 | ||
2d6ed997 L |
3413 | static char *special_linkonce_name[] = |
3414 | { | |
3415 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3416 | }; | |
3417 | ||
3418 | static void | |
d6afba4b | 3419 | start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty) |
2d6ed997 L |
3420 | { |
3421 | /* | |
3422 | Use a slightly ugly scheme to derive the unwind section names from | |
3423 | the text section name: | |
3424 | ||
3425 | text sect. unwind table sect. | |
3426 | name: name: comments: | |
3427 | ---------- ----------------- -------------------------------- | |
3428 | .text .IA_64.unwind | |
3429 | .text.foo .IA_64.unwind.text.foo | |
3430 | .foo .IA_64.unwind.foo | |
3431 | .gnu.linkonce.t.foo | |
3432 | .gnu.linkonce.ia64unw.foo | |
3433 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3434 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3435 | ||
3436 | This mapping is done so that: | |
3437 | ||
3438 | (a) An object file with unwind info only in .text will use | |
3439 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3440 | This follows the letter of the ABI and also ensures backwards | |
3441 | compatibility with older toolchains. | |
3442 | ||
3443 | (b) An object file with unwind info in multiple text sections | |
3444 | will use separate unwind sections for each text section. | |
3445 | This allows us to properly set the "sh_info" and "sh_link" | |
3446 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3447 | lets GNU ld support programs with multiple segments | |
3448 | containing unwind info (as might be the case for certain | |
3449 | embedded applications). | |
3450 | ||
3451 | (c) An error is issued if there would be a name clash. | |
3452 | */ | |
3453 | ||
3454 | const char *text_name, *sec_text_name; | |
3455 | char *sec_name; | |
3456 | const char *prefix = special_section_name [sec_index]; | |
3457 | const char *suffix; | |
3458 | size_t prefix_len, suffix_len, sec_name_len; | |
3459 | ||
3460 | sec_text_name = segment_name (text_seg); | |
3461 | text_name = sec_text_name; | |
3462 | if (strncmp (text_name, "_info", 5) == 0) | |
3463 | { | |
3464 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3465 | text_name); | |
3466 | ignore_rest_of_line (); | |
3467 | return; | |
3468 | } | |
3469 | if (strcmp (text_name, ".text") == 0) | |
3470 | text_name = ""; | |
3471 | ||
3472 | /* Build the unwind section name by appending the (possibly stripped) | |
3473 | text section name to the unwind prefix. */ | |
3474 | suffix = text_name; | |
3475 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3476 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3477 | { | |
3478 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3479 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3480 | } | |
d6afba4b JJ |
3481 | else if (linkonce_empty) |
3482 | return; | |
2d6ed997 L |
3483 | |
3484 | prefix_len = strlen (prefix); | |
3485 | suffix_len = strlen (suffix); | |
3486 | sec_name_len = prefix_len + suffix_len; | |
3487 | sec_name = alloca (sec_name_len + 1); | |
3488 | memcpy (sec_name, prefix, prefix_len); | |
3489 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3490 | sec_name [sec_name_len] = '\0'; | |
3491 | ||
3492 | /* Handle COMDAT group. */ | |
3493 | if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0) | |
3494 | { | |
3495 | char *section; | |
3496 | size_t len, group_name_len; | |
3497 | const char *group_name = elf_group_name (text_seg); | |
3498 | ||
3499 | if (group_name == NULL) | |
3500 | { | |
3501 | as_bad ("Group section `%s' has no group signature", | |
3502 | sec_text_name); | |
3503 | ignore_rest_of_line (); | |
3504 | return; | |
3505 | } | |
3506 | /* We have to construct a fake section directive. */ | |
3507 | group_name_len = strlen (group_name); | |
3508 | len = (sec_name_len | |
3509 | + 16 /* ,"aG",@progbits, */ | |
3510 | + group_name_len /* ,group_name */ | |
3511 | + 7); /* ,comdat */ | |
3512 | ||
3513 | section = alloca (len + 1); | |
3514 | memcpy (section, sec_name, sec_name_len); | |
3515 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3516 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3517 | memcpy (section + len - 7, ",comdat", 7); | |
3518 | section [len] = '\0'; | |
3519 | set_section (section); | |
3520 | } | |
3521 | else | |
3522 | { | |
3523 | set_section (sec_name); | |
3524 | bfd_set_section_flags (stdoutput, now_seg, | |
3525 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3526 | } | |
38ce5b11 L |
3527 | |
3528 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3529 | } |
3530 | ||
73f20958 | 3531 | static void |
2d6ed997 | 3532 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3533 | { |
73f20958 L |
3534 | int size, pad; |
3535 | unw_rec_list *list; | |
800eeca4 | 3536 | |
c97b7ef6 JW |
3537 | /* Mark the end of the unwind info, so that we can compute the size of the |
3538 | last unwind region. */ | |
3539 | add_unwind_entry (output_endp ()); | |
3540 | ||
10850f29 JW |
3541 | /* Force out pending instructions, to make sure all unwind records have |
3542 | a valid slot_number field. */ | |
3543 | ia64_flush_insns (); | |
3544 | ||
800eeca4 | 3545 | /* Generate the unwind record. */ |
73f20958 | 3546 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3547 | fixup_unw_records (list, 1); |
73f20958 L |
3548 | size = calc_record_size (list); |
3549 | ||
3550 | if (size > 0 || unwind.force_unwind_entry) | |
3551 | { | |
3552 | unwind.force_unwind_entry = 0; | |
3553 | /* pad to pointer-size boundary. */ | |
3554 | pad = size % md.pointer_size; | |
3555 | if (pad != 0) | |
3556 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3557 | /* Add 8 for the header. */ |
3558 | size += 8; | |
3559 | /* Add a pointer for the personality offset. */ | |
3560 | if (unwind.personality_routine) | |
3561 | size += md.pointer_size; | |
73f20958 | 3562 | } |
6290819d | 3563 | |
800eeca4 JW |
3564 | /* If there are unwind records, switch sections, and output the info. */ |
3565 | if (size != 0) | |
3566 | { | |
800eeca4 | 3567 | expressionS exp; |
1cd8ff38 | 3568 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3569 | |
d6afba4b | 3570 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0); |
800eeca4 | 3571 | |
557debba JW |
3572 | /* Make sure the section has 4 byte alignment for ILP32 and |
3573 | 8 byte alignment for LP64. */ | |
3574 | frag_align (md.pointer_size_shift, 0, 0); | |
3575 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3576 | |
800eeca4 | 3577 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3578 | unwind.info = expr_build_dot (); |
73f20958 L |
3579 | |
3580 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3581 | (offsetT) (long) unwind.personality_routine, |
3582 | (char *) list); | |
91a2ae2a | 3583 | |
800eeca4 | 3584 | /* Add the personality address to the image. */ |
e0c9811a | 3585 | if (unwind.personality_routine != 0) |
542d6675 | 3586 | { |
40449e9f | 3587 | exp.X_op = O_symbol; |
e0c9811a | 3588 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3589 | exp.X_add_number = 0; |
1cd8ff38 NC |
3590 | |
3591 | if (md.flags & EF_IA_64_BE) | |
3592 | { | |
3593 | if (md.flags & EF_IA_64_ABI64) | |
3594 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3595 | else | |
3596 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3597 | } | |
40449e9f | 3598 | else |
1cd8ff38 NC |
3599 | { |
3600 | if (md.flags & EF_IA_64_ABI64) | |
3601 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3602 | else | |
3603 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3604 | } | |
3605 | ||
3606 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3607 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3608 | unwind.personality_routine = 0; |
542d6675 | 3609 | } |
800eeca4 | 3610 | } |
d6afba4b JJ |
3611 | else |
3612 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1); | |
800eeca4 | 3613 | |
6290819d | 3614 | free_saved_prologue_counts (); |
e0c9811a | 3615 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3616 | } |
3617 | ||
197865e8 | 3618 | static void |
542d6675 | 3619 | dot_handlerdata (dummy) |
2434f565 | 3620 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3621 | { |
75e09913 JB |
3622 | if (!in_procedure ("handlerdata")) |
3623 | return; | |
91a2ae2a RH |
3624 | unwind.force_unwind_entry = 1; |
3625 | ||
3626 | /* Remember which segment we're in so we can switch back after .endp */ | |
3627 | unwind.saved_text_seg = now_seg; | |
3628 | unwind.saved_text_subseg = now_subseg; | |
3629 | ||
3630 | /* Generate unwind info into unwind-info section and then leave that | |
3631 | section as the currently active one so dataXX directives go into | |
3632 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3633 | generate_unwind_image (now_seg); |
e0c9811a | 3634 | demand_empty_rest_of_line (); |
800eeca4 JW |
3635 | } |
3636 | ||
197865e8 | 3637 | static void |
800eeca4 | 3638 | dot_unwentry (dummy) |
2434f565 | 3639 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3640 | { |
75e09913 JB |
3641 | if (!in_procedure ("unwentry")) |
3642 | return; | |
91a2ae2a | 3643 | unwind.force_unwind_entry = 1; |
e0c9811a | 3644 | demand_empty_rest_of_line (); |
800eeca4 JW |
3645 | } |
3646 | ||
197865e8 | 3647 | static void |
800eeca4 | 3648 | dot_altrp (dummy) |
2434f565 | 3649 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3650 | { |
e0c9811a JW |
3651 | expressionS e; |
3652 | unsigned reg; | |
3653 | ||
75e09913 JB |
3654 | if (!in_prologue ("altrp")) |
3655 | return; | |
3656 | ||
e0c9811a JW |
3657 | parse_operand (&e); |
3658 | reg = e.X_add_number - REG_BR; | |
3659 | if (e.X_op == O_register && reg < 8) | |
3660 | add_unwind_entry (output_rp_br (reg)); | |
3661 | else | |
3662 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3663 | } |
3664 | ||
197865e8 | 3665 | static void |
e0c9811a JW |
3666 | dot_savemem (psprel) |
3667 | int psprel; | |
800eeca4 JW |
3668 | { |
3669 | expressionS e1, e2; | |
3670 | int sep; | |
3671 | int reg1, val; | |
3672 | ||
75e09913 JB |
3673 | if (!in_prologue (psprel ? "savepsp" : "savesp")) |
3674 | return; | |
3675 | ||
800eeca4 JW |
3676 | sep = parse_operand (&e1); |
3677 | if (sep != ',') | |
e0c9811a | 3678 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3679 | sep = parse_operand (&e2); |
3680 | ||
e0c9811a | 3681 | reg1 = e1.X_add_number; |
800eeca4 | 3682 | val = e2.X_add_number; |
197865e8 | 3683 | |
800eeca4 | 3684 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3685 | if (e1.X_op == O_register) |
800eeca4 JW |
3686 | { |
3687 | if (e2.X_op == O_constant) | |
3688 | { | |
3689 | switch (reg1) | |
3690 | { | |
542d6675 KH |
3691 | case REG_AR + AR_BSP: |
3692 | add_unwind_entry (output_bsp_when ()); | |
3693 | add_unwind_entry ((psprel | |
3694 | ? output_bsp_psprel | |
3695 | : output_bsp_sprel) (val)); | |
3696 | break; | |
3697 | case REG_AR + AR_BSPSTORE: | |
3698 | add_unwind_entry (output_bspstore_when ()); | |
3699 | add_unwind_entry ((psprel | |
3700 | ? output_bspstore_psprel | |
3701 | : output_bspstore_sprel) (val)); | |
3702 | break; | |
3703 | case REG_AR + AR_RNAT: | |
3704 | add_unwind_entry (output_rnat_when ()); | |
3705 | add_unwind_entry ((psprel | |
3706 | ? output_rnat_psprel | |
3707 | : output_rnat_sprel) (val)); | |
3708 | break; | |
3709 | case REG_AR + AR_UNAT: | |
3710 | add_unwind_entry (output_unat_when ()); | |
3711 | add_unwind_entry ((psprel | |
3712 | ? output_unat_psprel | |
3713 | : output_unat_sprel) (val)); | |
3714 | break; | |
3715 | case REG_AR + AR_FPSR: | |
3716 | add_unwind_entry (output_fpsr_when ()); | |
3717 | add_unwind_entry ((psprel | |
3718 | ? output_fpsr_psprel | |
3719 | : output_fpsr_sprel) (val)); | |
3720 | break; | |
3721 | case REG_AR + AR_PFS: | |
3722 | add_unwind_entry (output_pfs_when ()); | |
3723 | add_unwind_entry ((psprel | |
3724 | ? output_pfs_psprel | |
3725 | : output_pfs_sprel) (val)); | |
3726 | break; | |
3727 | case REG_AR + AR_LC: | |
3728 | add_unwind_entry (output_lc_when ()); | |
3729 | add_unwind_entry ((psprel | |
3730 | ? output_lc_psprel | |
3731 | : output_lc_sprel) (val)); | |
3732 | break; | |
3733 | case REG_BR: | |
3734 | add_unwind_entry (output_rp_when ()); | |
3735 | add_unwind_entry ((psprel | |
3736 | ? output_rp_psprel | |
3737 | : output_rp_sprel) (val)); | |
3738 | break; | |
3739 | case REG_PR: | |
3740 | add_unwind_entry (output_preds_when ()); | |
3741 | add_unwind_entry ((psprel | |
3742 | ? output_preds_psprel | |
3743 | : output_preds_sprel) (val)); | |
3744 | break; | |
3745 | case REG_PRIUNAT: | |
3746 | add_unwind_entry (output_priunat_when_mem ()); | |
3747 | add_unwind_entry ((psprel | |
3748 | ? output_priunat_psprel | |
3749 | : output_priunat_sprel) (val)); | |
3750 | break; | |
3751 | default: | |
3752 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3753 | } |
3754 | } | |
3755 | else | |
3756 | as_bad (" Second operand not a valid constant"); | |
3757 | } | |
3758 | else | |
e0c9811a | 3759 | as_bad ("First operand not a register"); |
800eeca4 JW |
3760 | } |
3761 | ||
197865e8 | 3762 | static void |
800eeca4 | 3763 | dot_saveg (dummy) |
2434f565 | 3764 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3765 | { |
3766 | expressionS e1, e2; | |
3767 | int sep; | |
75e09913 JB |
3768 | |
3769 | if (!in_prologue ("save.g")) | |
3770 | return; | |
3771 | ||
800eeca4 JW |
3772 | sep = parse_operand (&e1); |
3773 | if (sep == ',') | |
3774 | parse_operand (&e2); | |
197865e8 | 3775 | |
800eeca4 JW |
3776 | if (e1.X_op != O_constant) |
3777 | as_bad ("First operand to .save.g must be a constant."); | |
3778 | else | |
3779 | { | |
3780 | int grmask = e1.X_add_number; | |
3781 | if (sep != ',') | |
3782 | add_unwind_entry (output_gr_mem (grmask)); | |
3783 | else | |
542d6675 | 3784 | { |
800eeca4 | 3785 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3786 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3787 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3788 | else | |
3789 | as_bad ("Second operand is an invalid register."); | |
3790 | } | |
3791 | } | |
3792 | } | |
3793 | ||
197865e8 | 3794 | static void |
800eeca4 | 3795 | dot_savef (dummy) |
2434f565 | 3796 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3797 | { |
e0c9811a | 3798 | expressionS e1; |
800eeca4 | 3799 | int sep; |
75e09913 JB |
3800 | |
3801 | if (!in_prologue ("save.f")) | |
3802 | return; | |
3803 | ||
800eeca4 | 3804 | sep = parse_operand (&e1); |
197865e8 | 3805 | |
800eeca4 JW |
3806 | if (e1.X_op != O_constant) |
3807 | as_bad ("Operand to .save.f must be a constant."); | |
3808 | else | |
e0c9811a | 3809 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3810 | } |
3811 | ||
197865e8 | 3812 | static void |
800eeca4 | 3813 | dot_saveb (dummy) |
2434f565 | 3814 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3815 | { |
e0c9811a JW |
3816 | expressionS e1, e2; |
3817 | unsigned int reg; | |
3818 | unsigned char sep; | |
3819 | int brmask; | |
3820 | ||
75e09913 JB |
3821 | if (!in_prologue ("save.b")) |
3822 | return; | |
3823 | ||
800eeca4 | 3824 | sep = parse_operand (&e1); |
800eeca4 | 3825 | if (e1.X_op != O_constant) |
800eeca4 | 3826 | { |
e0c9811a JW |
3827 | as_bad ("First operand to .save.b must be a constant."); |
3828 | return; | |
800eeca4 | 3829 | } |
e0c9811a JW |
3830 | brmask = e1.X_add_number; |
3831 | ||
3832 | if (sep == ',') | |
3833 | { | |
3834 | sep = parse_operand (&e2); | |
3835 | reg = e2.X_add_number - REG_GR; | |
3836 | if (e2.X_op != O_register || reg > 127) | |
3837 | { | |
3838 | as_bad ("Second operand to .save.b must be a general register."); | |
3839 | return; | |
3840 | } | |
3841 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3842 | } | |
3843 | else | |
3844 | add_unwind_entry (output_br_mem (brmask)); | |
3845 | ||
3846 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3847 | demand_empty_rest_of_line (); |
800eeca4 JW |
3848 | } |
3849 | ||
197865e8 | 3850 | static void |
800eeca4 | 3851 | dot_savegf (dummy) |
2434f565 | 3852 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3853 | { |
3854 | expressionS e1, e2; | |
3855 | int sep; | |
75e09913 JB |
3856 | |
3857 | if (!in_prologue ("save.gf")) | |
3858 | return; | |
3859 | ||
800eeca4 JW |
3860 | sep = parse_operand (&e1); |
3861 | if (sep == ',') | |
3862 | parse_operand (&e2); | |
197865e8 | 3863 | |
800eeca4 JW |
3864 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3865 | as_bad ("Both operands of .save.gf must be constants."); | |
3866 | else | |
3867 | { | |
3868 | int grmask = e1.X_add_number; | |
3869 | int frmask = e2.X_add_number; | |
3870 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3871 | } | |
3872 | } | |
3873 | ||
197865e8 | 3874 | static void |
800eeca4 | 3875 | dot_spill (dummy) |
2434f565 | 3876 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3877 | { |
3878 | expressionS e; | |
e0c9811a JW |
3879 | unsigned char sep; |
3880 | ||
75e09913 JB |
3881 | if (!in_prologue ("spill")) |
3882 | return; | |
3883 | ||
e0c9811a JW |
3884 | sep = parse_operand (&e); |
3885 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3886 | demand_empty_rest_of_line (); |
197865e8 | 3887 | |
800eeca4 JW |
3888 | if (e.X_op != O_constant) |
3889 | as_bad ("Operand to .spill must be a constant"); | |
3890 | else | |
e0c9811a JW |
3891 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3892 | } | |
3893 | ||
3894 | static void | |
3895 | dot_spillreg (dummy) | |
2434f565 | 3896 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3897 | { |
3898 | int sep, ab, xy, reg, treg; | |
3899 | expressionS e1, e2; | |
3900 | ||
75e09913 JB |
3901 | if (!in_procedure ("spillreg")) |
3902 | return; | |
3903 | ||
e0c9811a JW |
3904 | sep = parse_operand (&e1); |
3905 | if (sep != ',') | |
3906 | { | |
3907 | as_bad ("No second operand to .spillreg"); | |
3908 | return; | |
3909 | } | |
3910 | ||
3911 | parse_operand (&e2); | |
3912 | ||
3913 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3914 | { |
e0c9811a JW |
3915 | as_bad ("First operand to .spillreg must be a preserved register"); |
3916 | return; | |
800eeca4 | 3917 | } |
e0c9811a JW |
3918 | |
3919 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3920 | { | |
3921 | as_bad ("Second operand to .spillreg must be a register"); | |
3922 | return; | |
3923 | } | |
3924 | ||
3925 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3926 | } | |
3927 | ||
3928 | static void | |
3929 | dot_spillmem (psprel) | |
3930 | int psprel; | |
3931 | { | |
3932 | expressionS e1, e2; | |
3933 | int sep, ab, reg; | |
3934 | ||
75e09913 JB |
3935 | if (!in_procedure ("spillmem")) |
3936 | return; | |
3937 | ||
e0c9811a JW |
3938 | sep = parse_operand (&e1); |
3939 | if (sep != ',') | |
3940 | { | |
3941 | as_bad ("Second operand missing"); | |
3942 | return; | |
3943 | } | |
3944 | ||
3945 | parse_operand (&e2); | |
3946 | ||
3947 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3948 | { | |
3949 | as_bad ("First operand to .spill%s must be a preserved register", | |
3950 | psprel ? "psp" : "sp"); | |
3951 | return; | |
3952 | } | |
3953 | ||
3954 | if (e2.X_op != O_constant) | |
3955 | { | |
3956 | as_bad ("Second operand to .spill%s must be a constant", | |
3957 | psprel ? "psp" : "sp"); | |
3958 | return; | |
3959 | } | |
3960 | ||
3961 | if (psprel) | |
3962 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
3963 | else | |
3964 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
3965 | } | |
3966 | ||
3967 | static void | |
3968 | dot_spillreg_p (dummy) | |
2434f565 | 3969 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3970 | { |
3971 | int sep, ab, xy, reg, treg; | |
3972 | expressionS e1, e2, e3; | |
3973 | unsigned int qp; | |
3974 | ||
75e09913 JB |
3975 | if (!in_procedure ("spillreg.p")) |
3976 | return; | |
3977 | ||
e0c9811a JW |
3978 | sep = parse_operand (&e1); |
3979 | if (sep != ',') | |
3980 | { | |
3981 | as_bad ("No second and third operand to .spillreg.p"); | |
3982 | return; | |
3983 | } | |
3984 | ||
3985 | sep = parse_operand (&e2); | |
3986 | if (sep != ',') | |
3987 | { | |
3988 | as_bad ("No third operand to .spillreg.p"); | |
3989 | return; | |
3990 | } | |
3991 | ||
3992 | parse_operand (&e3); | |
3993 | ||
3994 | qp = e1.X_add_number - REG_P; | |
3995 | ||
3996 | if (e1.X_op != O_register || qp > 63) | |
3997 | { | |
3998 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
3999 | return; | |
4000 | } | |
4001 | ||
4002 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4003 | { | |
4004 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
4005 | return; | |
4006 | } | |
4007 | ||
4008 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
4009 | { | |
4010 | as_bad ("Third operand to .spillreg.p must be a register"); | |
4011 | return; | |
4012 | } | |
4013 | ||
4014 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
4015 | } | |
4016 | ||
4017 | static void | |
4018 | dot_spillmem_p (psprel) | |
4019 | int psprel; | |
4020 | { | |
4021 | expressionS e1, e2, e3; | |
4022 | int sep, ab, reg; | |
4023 | unsigned int qp; | |
4024 | ||
75e09913 JB |
4025 | if (!in_procedure ("spillmem.p")) |
4026 | return; | |
4027 | ||
e0c9811a JW |
4028 | sep = parse_operand (&e1); |
4029 | if (sep != ',') | |
4030 | { | |
4031 | as_bad ("Second operand missing"); | |
4032 | return; | |
4033 | } | |
4034 | ||
4035 | parse_operand (&e2); | |
4036 | if (sep != ',') | |
4037 | { | |
4038 | as_bad ("Second operand missing"); | |
4039 | return; | |
4040 | } | |
4041 | ||
4042 | parse_operand (&e3); | |
4043 | ||
4044 | qp = e1.X_add_number - REG_P; | |
4045 | if (e1.X_op != O_register || qp > 63) | |
4046 | { | |
4047 | as_bad ("First operand to .spill%s_p must be a predicate", | |
4048 | psprel ? "psp" : "sp"); | |
4049 | return; | |
4050 | } | |
4051 | ||
4052 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4053 | { | |
4054 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
4055 | psprel ? "psp" : "sp"); | |
4056 | return; | |
4057 | } | |
4058 | ||
4059 | if (e3.X_op != O_constant) | |
4060 | { | |
4061 | as_bad ("Third operand to .spill%s_p must be a constant", | |
4062 | psprel ? "psp" : "sp"); | |
4063 | return; | |
4064 | } | |
4065 | ||
4066 | if (psprel) | |
fa7fda74 | 4067 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 4068 | else |
fa7fda74 | 4069 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
4070 | } |
4071 | ||
6290819d NC |
4072 | static unsigned int |
4073 | get_saved_prologue_count (lbl) | |
4074 | unsigned long lbl; | |
4075 | { | |
4076 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4077 | ||
4078 | while (lpc != NULL && lpc->label_number != lbl) | |
4079 | lpc = lpc->next; | |
4080 | ||
4081 | if (lpc != NULL) | |
4082 | return lpc->prologue_count; | |
4083 | ||
4084 | as_bad ("Missing .label_state %ld", lbl); | |
4085 | return 1; | |
4086 | } | |
4087 | ||
4088 | static void | |
4089 | save_prologue_count (lbl, count) | |
4090 | unsigned long lbl; | |
4091 | unsigned int count; | |
4092 | { | |
4093 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4094 | ||
4095 | while (lpc != NULL && lpc->label_number != lbl) | |
4096 | lpc = lpc->next; | |
4097 | ||
4098 | if (lpc != NULL) | |
4099 | lpc->prologue_count = count; | |
4100 | else | |
4101 | { | |
40449e9f | 4102 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4103 | |
4104 | new_lpc->next = unwind.saved_prologue_counts; | |
4105 | new_lpc->label_number = lbl; | |
4106 | new_lpc->prologue_count = count; | |
4107 | unwind.saved_prologue_counts = new_lpc; | |
4108 | } | |
4109 | } | |
4110 | ||
4111 | static void | |
4112 | free_saved_prologue_counts () | |
4113 | { | |
40449e9f KH |
4114 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4115 | label_prologue_count *next; | |
6290819d NC |
4116 | |
4117 | while (lpc != NULL) | |
4118 | { | |
4119 | next = lpc->next; | |
4120 | free (lpc); | |
4121 | lpc = next; | |
4122 | } | |
4123 | ||
4124 | unwind.saved_prologue_counts = NULL; | |
4125 | } | |
4126 | ||
e0c9811a JW |
4127 | static void |
4128 | dot_label_state (dummy) | |
2434f565 | 4129 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4130 | { |
4131 | expressionS e; | |
4132 | ||
75e09913 JB |
4133 | if (!in_body ("label_state")) |
4134 | return; | |
4135 | ||
e0c9811a JW |
4136 | parse_operand (&e); |
4137 | if (e.X_op != O_constant) | |
4138 | { | |
4139 | as_bad ("Operand to .label_state must be a constant"); | |
4140 | return; | |
4141 | } | |
4142 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 4143 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
4144 | } |
4145 | ||
4146 | static void | |
4147 | dot_copy_state (dummy) | |
2434f565 | 4148 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4149 | { |
4150 | expressionS e; | |
4151 | ||
75e09913 JB |
4152 | if (!in_body ("copy_state")) |
4153 | return; | |
4154 | ||
e0c9811a JW |
4155 | parse_operand (&e); |
4156 | if (e.X_op != O_constant) | |
4157 | { | |
4158 | as_bad ("Operand to .copy_state must be a constant"); | |
4159 | return; | |
4160 | } | |
4161 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 4162 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
4163 | } |
4164 | ||
197865e8 | 4165 | static void |
800eeca4 | 4166 | dot_unwabi (dummy) |
2434f565 | 4167 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4168 | { |
e0c9811a JW |
4169 | expressionS e1, e2; |
4170 | unsigned char sep; | |
4171 | ||
75e09913 JB |
4172 | if (!in_procedure ("unwabi")) |
4173 | return; | |
4174 | ||
e0c9811a JW |
4175 | sep = parse_operand (&e1); |
4176 | if (sep != ',') | |
4177 | { | |
4178 | as_bad ("Second operand to .unwabi missing"); | |
4179 | return; | |
4180 | } | |
4181 | sep = parse_operand (&e2); | |
4182 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 4183 | demand_empty_rest_of_line (); |
e0c9811a JW |
4184 | |
4185 | if (e1.X_op != O_constant) | |
4186 | { | |
4187 | as_bad ("First operand to .unwabi must be a constant"); | |
4188 | return; | |
4189 | } | |
4190 | ||
4191 | if (e2.X_op != O_constant) | |
4192 | { | |
4193 | as_bad ("Second operand to .unwabi must be a constant"); | |
4194 | return; | |
4195 | } | |
4196 | ||
4197 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
4198 | } |
4199 | ||
197865e8 | 4200 | static void |
800eeca4 | 4201 | dot_personality (dummy) |
2434f565 | 4202 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4203 | { |
4204 | char *name, *p, c; | |
75e09913 JB |
4205 | if (!in_procedure ("personality")) |
4206 | return; | |
800eeca4 JW |
4207 | SKIP_WHITESPACE (); |
4208 | name = input_line_pointer; | |
4209 | c = get_symbol_end (); | |
4210 | p = input_line_pointer; | |
e0c9811a | 4211 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4212 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4213 | *p = c; |
4214 | SKIP_WHITESPACE (); | |
4215 | demand_empty_rest_of_line (); | |
4216 | } | |
4217 | ||
4218 | static void | |
4219 | dot_proc (dummy) | |
2434f565 | 4220 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4221 | { |
4222 | char *name, *p, c; | |
4223 | symbolS *sym; | |
4224 | ||
75e09913 | 4225 | unwind.proc_start = 0; |
e0c9811a | 4226 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4227 | function symbols: */ |
800eeca4 JW |
4228 | while (1) |
4229 | { | |
4230 | SKIP_WHITESPACE (); | |
4231 | name = input_line_pointer; | |
4232 | c = get_symbol_end (); | |
4233 | p = input_line_pointer; | |
75e09913 JB |
4234 | if (!*name) |
4235 | as_bad ("Empty argument of .proc"); | |
4236 | else | |
542d6675 | 4237 | { |
75e09913 JB |
4238 | sym = symbol_find_or_make (name); |
4239 | if (S_IS_DEFINED (sym)) | |
4240 | as_bad ("`%s' was already defined", name); | |
4241 | else if (unwind.proc_start == 0) | |
4242 | { | |
4243 | unwind.proc_start = sym; | |
4244 | } | |
4245 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4246 | } |
800eeca4 JW |
4247 | *p = c; |
4248 | SKIP_WHITESPACE (); | |
4249 | if (*input_line_pointer != ',') | |
4250 | break; | |
4251 | ++input_line_pointer; | |
4252 | } | |
75e09913 JB |
4253 | if (unwind.proc_start == 0) |
4254 | unwind.proc_start = expr_build_dot (); | |
800eeca4 JW |
4255 | demand_empty_rest_of_line (); |
4256 | ia64_do_align (16); | |
4257 | ||
75e09913 | 4258 | unwind.prologue = 0; |
33d01f33 | 4259 | unwind.prologue_count = 0; |
75e09913 JB |
4260 | unwind.body = 0; |
4261 | unwind.insn = 0; | |
e0c9811a JW |
4262 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4263 | unwind.personality_routine = 0; | |
800eeca4 JW |
4264 | } |
4265 | ||
4266 | static void | |
4267 | dot_body (dummy) | |
2434f565 | 4268 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4269 | { |
75e09913 JB |
4270 | if (!in_procedure ("body")) |
4271 | return; | |
4272 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
4273 | as_warn ("Initial .body should precede any instructions"); | |
4274 | ||
e0c9811a | 4275 | unwind.prologue = 0; |
30d25259 | 4276 | unwind.prologue_mask = 0; |
75e09913 | 4277 | unwind.body = 1; |
30d25259 | 4278 | |
800eeca4 | 4279 | add_unwind_entry (output_body ()); |
e0c9811a | 4280 | demand_empty_rest_of_line (); |
800eeca4 JW |
4281 | } |
4282 | ||
4283 | static void | |
4284 | dot_prologue (dummy) | |
2434f565 | 4285 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4286 | { |
e0c9811a | 4287 | unsigned char sep; |
2434f565 | 4288 | int mask = 0, grsave = 0; |
e0c9811a | 4289 | |
75e09913 JB |
4290 | if (!in_procedure ("prologue")) |
4291 | return; | |
4292 | if (unwind.prologue) | |
4293 | { | |
4294 | as_bad (".prologue within prologue"); | |
4295 | ignore_rest_of_line (); | |
4296 | return; | |
4297 | } | |
4298 | if (!unwind.body && unwind.insn) | |
4299 | as_warn ("Initial .prologue should precede any instructions"); | |
4300 | ||
e0c9811a | 4301 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
4302 | { |
4303 | expressionS e1, e2; | |
800eeca4 JW |
4304 | sep = parse_operand (&e1); |
4305 | if (sep != ',') | |
4306 | as_bad ("No second operand to .prologue"); | |
4307 | sep = parse_operand (&e2); | |
e0c9811a | 4308 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
c95b35a9 | 4309 | demand_empty_rest_of_line (); |
800eeca4 JW |
4310 | |
4311 | if (e1.X_op == O_constant) | |
542d6675 | 4312 | { |
30d25259 RH |
4313 | mask = e1.X_add_number; |
4314 | ||
800eeca4 | 4315 | if (e2.X_op == O_constant) |
30d25259 RH |
4316 | grsave = e2.X_add_number; |
4317 | else if (e2.X_op == O_register | |
4318 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
4319 | ; | |
800eeca4 | 4320 | else |
30d25259 RH |
4321 | as_bad ("Second operand not a constant or general register"); |
4322 | ||
4323 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
4324 | } |
4325 | else | |
4326 | as_bad ("First operand not a constant"); | |
4327 | } | |
4328 | else | |
4329 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4330 | |
4331 | unwind.prologue = 1; | |
4332 | unwind.prologue_mask = mask; | |
75e09913 | 4333 | unwind.body = 0; |
33d01f33 | 4334 | ++unwind.prologue_count; |
800eeca4 JW |
4335 | } |
4336 | ||
4337 | static void | |
4338 | dot_endp (dummy) | |
2434f565 | 4339 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4340 | { |
4341 | expressionS e; | |
4342 | unsigned char *ptr; | |
44f5c83a | 4343 | int bytes_per_address; |
800eeca4 JW |
4344 | long where; |
4345 | segT saved_seg; | |
4346 | subsegT saved_subseg; | |
970d6792 | 4347 | char *name, *default_name, *p, c; |
c538998c | 4348 | symbolS *sym; |
970d6792 | 4349 | int unwind_check = md.unwind_check; |
800eeca4 | 4350 | |
970d6792 | 4351 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4352 | if (!in_procedure ("endp")) |
4353 | return; | |
970d6792 | 4354 | md.unwind_check = unwind_check; |
75e09913 | 4355 | |
91a2ae2a RH |
4356 | if (unwind.saved_text_seg) |
4357 | { | |
4358 | saved_seg = unwind.saved_text_seg; | |
4359 | saved_subseg = unwind.saved_text_subseg; | |
4360 | unwind.saved_text_seg = NULL; | |
4361 | } | |
4362 | else | |
4363 | { | |
4364 | saved_seg = now_seg; | |
4365 | saved_subseg = now_subseg; | |
4366 | } | |
4367 | ||
800eeca4 | 4368 | insn_group_break (1, 0, 0); |
800eeca4 | 4369 | |
91a2ae2a RH |
4370 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4371 | if (!unwind.info) | |
2d6ed997 | 4372 | generate_unwind_image (saved_seg); |
800eeca4 | 4373 | |
91a2ae2a RH |
4374 | if (unwind.info || unwind.force_unwind_entry) |
4375 | { | |
75e09913 JB |
4376 | symbolS *proc_end; |
4377 | ||
91a2ae2a | 4378 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4379 | proc_end = expr_build_dot (); |
5e7474a7 | 4380 | |
d6afba4b | 4381 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0); |
5e7474a7 | 4382 | |
557debba JW |
4383 | /* Make sure that section has 4 byte alignment for ILP32 and |
4384 | 8 byte alignment for LP64. */ | |
4385 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4386 | |
557debba JW |
4387 | /* Need space for 3 pointers for procedure start, procedure end, |
4388 | and unwind info. */ | |
4389 | ptr = frag_more (3 * md.pointer_size); | |
4390 | where = frag_now_fix () - (3 * md.pointer_size); | |
91a2ae2a | 4391 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4392 | |
40449e9f | 4393 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4394 | e.X_op = O_pseudo_fixup; |
4395 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4396 | e.X_add_number = 0; | |
4397 | e.X_add_symbol = unwind.proc_start; | |
4398 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); | |
800eeca4 | 4399 | |
800eeca4 JW |
4400 | e.X_op = O_pseudo_fixup; |
4401 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4402 | e.X_add_number = 0; | |
75e09913 | 4403 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4404 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4405 | bytes_per_address, &e); | |
4406 | ||
4407 | if (unwind.info) | |
4408 | { | |
4409 | e.X_op = O_pseudo_fixup; | |
4410 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4411 | e.X_add_number = 0; | |
4412 | e.X_add_symbol = unwind.info; | |
4413 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4414 | bytes_per_address, &e); | |
4415 | } | |
4416 | else | |
4417 | md_number_to_chars (ptr + (bytes_per_address * 2), 0, | |
4418 | bytes_per_address); | |
800eeca4 | 4419 | |
91a2ae2a | 4420 | } |
d6afba4b JJ |
4421 | else |
4422 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1); | |
4423 | ||
800eeca4 | 4424 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4425 | |
970d6792 L |
4426 | if (unwind.proc_start) |
4427 | default_name = (char *) S_GET_NAME (unwind.proc_start); | |
4428 | else | |
4429 | default_name = NULL; | |
4430 | ||
c538998c JJ |
4431 | /* Parse names of main and alternate entry points and set symbol sizes. */ |
4432 | while (1) | |
4433 | { | |
4434 | SKIP_WHITESPACE (); | |
4435 | name = input_line_pointer; | |
4436 | c = get_symbol_end (); | |
4437 | p = input_line_pointer; | |
75e09913 | 4438 | if (!*name) |
970d6792 L |
4439 | { |
4440 | if (md.unwind_check == unwind_check_warning) | |
4441 | { | |
4442 | if (default_name) | |
4443 | { | |
4444 | as_warn ("Empty argument of .endp. Use the default name `%s'", | |
4445 | default_name); | |
4446 | name = default_name; | |
4447 | } | |
4448 | else | |
4449 | as_warn ("Empty argument of .endp"); | |
4450 | } | |
4451 | else | |
4452 | as_bad ("Empty argument of .endp"); | |
4453 | } | |
4454 | if (*name) | |
75e09913 JB |
4455 | { |
4456 | sym = symbol_find (name); | |
970d6792 L |
4457 | if (!sym |
4458 | && md.unwind_check == unwind_check_warning | |
4459 | && default_name | |
4460 | && default_name != name) | |
4461 | { | |
4462 | /* We have a bad name. Try the default one if needed. */ | |
4463 | as_warn ("`%s' was not defined within procedure. Use the default name `%s'", | |
4464 | name, default_name); | |
4465 | name = default_name; | |
4466 | sym = symbol_find (name); | |
4467 | } | |
75e09913 JB |
4468 | if (!sym || !S_IS_DEFINED (sym)) |
4469 | as_bad ("`%s' was not defined within procedure", name); | |
4470 | else if (unwind.proc_start | |
4471 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4472 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4473 | { | |
4474 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4475 | fragS *frag = symbol_get_frag (sym); | |
4476 | ||
4477 | /* Check whether the function label is at or beyond last | |
4478 | .proc directive. */ | |
4479 | while (fr && fr != frag) | |
4480 | fr = fr->fr_next; | |
4481 | if (fr) | |
c538998c | 4482 | { |
75e09913 JB |
4483 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4484 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4485 | else | |
4486 | { | |
4487 | symbol_get_obj (sym)->size = | |
4488 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4489 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4490 | symbol_get_obj (sym)->size->X_add_symbol | |
4491 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4492 | frag_now_fix (), frag_now); | |
4493 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4494 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4495 | } | |
c538998c JJ |
4496 | } |
4497 | } | |
4498 | } | |
4499 | *p = c; | |
4500 | SKIP_WHITESPACE (); | |
4501 | if (*input_line_pointer != ',') | |
4502 | break; | |
4503 | ++input_line_pointer; | |
4504 | } | |
4505 | demand_empty_rest_of_line (); | |
75e09913 | 4506 | unwind.proc_start = unwind.info = 0; |
800eeca4 JW |
4507 | } |
4508 | ||
4509 | static void | |
4510 | dot_template (template) | |
4511 | int template; | |
4512 | { | |
4513 | CURR_SLOT.user_template = template; | |
4514 | } | |
4515 | ||
4516 | static void | |
4517 | dot_regstk (dummy) | |
2434f565 | 4518 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4519 | { |
4520 | int ins, locs, outs, rots; | |
4521 | ||
4522 | if (is_it_end_of_statement ()) | |
4523 | ins = locs = outs = rots = 0; | |
4524 | else | |
4525 | { | |
4526 | ins = get_absolute_expression (); | |
4527 | if (*input_line_pointer++ != ',') | |
4528 | goto err; | |
4529 | locs = get_absolute_expression (); | |
4530 | if (*input_line_pointer++ != ',') | |
4531 | goto err; | |
4532 | outs = get_absolute_expression (); | |
4533 | if (*input_line_pointer++ != ',') | |
4534 | goto err; | |
4535 | rots = get_absolute_expression (); | |
4536 | } | |
4537 | set_regstack (ins, locs, outs, rots); | |
4538 | return; | |
4539 | ||
4540 | err: | |
4541 | as_bad ("Comma expected"); | |
4542 | ignore_rest_of_line (); | |
4543 | } | |
4544 | ||
4545 | static void | |
4546 | dot_rot (type) | |
4547 | int type; | |
4548 | { | |
4549 | unsigned num_regs, num_alloced = 0; | |
4550 | struct dynreg **drpp, *dr; | |
4551 | int ch, base_reg = 0; | |
4552 | char *name, *start; | |
4553 | size_t len; | |
4554 | ||
4555 | switch (type) | |
4556 | { | |
4557 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4558 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4559 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4560 | default: break; | |
4561 | } | |
4562 | ||
542d6675 | 4563 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4564 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4565 | { | |
4566 | hash_delete (md.dynreg_hash, dr->name); | |
20b36a95 | 4567 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4568 | dr->num_regs = 0; |
4569 | } | |
4570 | ||
4571 | drpp = &md.dynreg[type]; | |
4572 | while (1) | |
4573 | { | |
4574 | start = input_line_pointer; | |
4575 | ch = get_symbol_end (); | |
20b36a95 | 4576 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4577 | *input_line_pointer = ch; |
800eeca4 JW |
4578 | |
4579 | SKIP_WHITESPACE (); | |
4580 | if (*input_line_pointer != '[') | |
4581 | { | |
4582 | as_bad ("Expected '['"); | |
4583 | goto err; | |
4584 | } | |
4585 | ++input_line_pointer; /* skip '[' */ | |
4586 | ||
4587 | num_regs = get_absolute_expression (); | |
4588 | ||
4589 | if (*input_line_pointer++ != ']') | |
4590 | { | |
4591 | as_bad ("Expected ']'"); | |
4592 | goto err; | |
4593 | } | |
4594 | SKIP_WHITESPACE (); | |
4595 | ||
4596 | num_alloced += num_regs; | |
4597 | switch (type) | |
4598 | { | |
4599 | case DYNREG_GR: | |
4600 | if (num_alloced > md.rot.num_regs) | |
4601 | { | |
4602 | as_bad ("Used more than the declared %d rotating registers", | |
4603 | md.rot.num_regs); | |
4604 | goto err; | |
4605 | } | |
4606 | break; | |
4607 | case DYNREG_FR: | |
4608 | if (num_alloced > 96) | |
4609 | { | |
4610 | as_bad ("Used more than the available 96 rotating registers"); | |
4611 | goto err; | |
4612 | } | |
4613 | break; | |
4614 | case DYNREG_PR: | |
4615 | if (num_alloced > 48) | |
4616 | { | |
4617 | as_bad ("Used more than the available 48 rotating registers"); | |
4618 | goto err; | |
4619 | } | |
4620 | break; | |
4621 | ||
4622 | default: | |
4623 | break; | |
4624 | } | |
4625 | ||
800eeca4 JW |
4626 | if (!*drpp) |
4627 | { | |
4628 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4629 | memset (*drpp, 0, sizeof (*dr)); | |
4630 | } | |
4631 | ||
20b36a95 JB |
4632 | name = obstack_alloc (¬es, len + 1); |
4633 | memcpy (name, start, len); | |
4634 | name[len] = '\0'; | |
4635 | ||
800eeca4 JW |
4636 | dr = *drpp; |
4637 | dr->name = name; | |
4638 | dr->num_regs = num_regs; | |
4639 | dr->base = base_reg; | |
4640 | drpp = &dr->next; | |
4641 | base_reg += num_regs; | |
4642 | ||
4643 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4644 | { | |
4645 | as_bad ("Attempt to redefine register set `%s'", name); | |
20b36a95 | 4646 | obstack_free (¬es, name); |
800eeca4 JW |
4647 | goto err; |
4648 | } | |
4649 | ||
4650 | if (*input_line_pointer != ',') | |
4651 | break; | |
4652 | ++input_line_pointer; /* skip comma */ | |
4653 | SKIP_WHITESPACE (); | |
4654 | } | |
4655 | demand_empty_rest_of_line (); | |
4656 | return; | |
4657 | ||
4658 | err: | |
4659 | ignore_rest_of_line (); | |
4660 | } | |
4661 | ||
4662 | static void | |
4663 | dot_byteorder (byteorder) | |
4664 | int byteorder; | |
4665 | { | |
10a98291 L |
4666 | segment_info_type *seginfo = seg_info (now_seg); |
4667 | ||
4668 | if (byteorder == -1) | |
4669 | { | |
4670 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4671 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4672 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4673 | } | |
4674 | else | |
4675 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4676 | ||
4677 | if (target_big_endian != byteorder) | |
4678 | { | |
4679 | target_big_endian = byteorder; | |
4680 | if (target_big_endian) | |
4681 | { | |
4682 | ia64_number_to_chars = number_to_chars_bigendian; | |
4683 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4684 | } | |
4685 | else | |
4686 | { | |
4687 | ia64_number_to_chars = number_to_chars_littleendian; | |
4688 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4689 | } | |
4690 | } | |
800eeca4 JW |
4691 | } |
4692 | ||
4693 | static void | |
4694 | dot_psr (dummy) | |
2434f565 | 4695 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4696 | { |
4697 | char *option; | |
4698 | int ch; | |
4699 | ||
4700 | while (1) | |
4701 | { | |
4702 | option = input_line_pointer; | |
4703 | ch = get_symbol_end (); | |
4704 | if (strcmp (option, "lsb") == 0) | |
4705 | md.flags &= ~EF_IA_64_BE; | |
4706 | else if (strcmp (option, "msb") == 0) | |
4707 | md.flags |= EF_IA_64_BE; | |
4708 | else if (strcmp (option, "abi32") == 0) | |
4709 | md.flags &= ~EF_IA_64_ABI64; | |
4710 | else if (strcmp (option, "abi64") == 0) | |
4711 | md.flags |= EF_IA_64_ABI64; | |
4712 | else | |
4713 | as_bad ("Unknown psr option `%s'", option); | |
4714 | *input_line_pointer = ch; | |
4715 | ||
4716 | SKIP_WHITESPACE (); | |
4717 | if (*input_line_pointer != ',') | |
4718 | break; | |
4719 | ||
4720 | ++input_line_pointer; | |
4721 | SKIP_WHITESPACE (); | |
4722 | } | |
4723 | demand_empty_rest_of_line (); | |
4724 | } | |
4725 | ||
800eeca4 JW |
4726 | static void |
4727 | dot_ln (dummy) | |
2434f565 | 4728 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4729 | { |
4730 | new_logical_line (0, get_absolute_expression ()); | |
4731 | demand_empty_rest_of_line (); | |
4732 | } | |
4733 | ||
542d6675 | 4734 | static char * |
800eeca4 JW |
4735 | parse_section_name () |
4736 | { | |
4737 | char *name; | |
4738 | int len; | |
4739 | ||
4740 | SKIP_WHITESPACE (); | |
b3f19c14 JB |
4741 | if (*input_line_pointer == '"') |
4742 | name = demand_copy_C_string (&len); | |
4743 | else | |
800eeca4 | 4744 | { |
b3f19c14 JB |
4745 | char *start = input_line_pointer; |
4746 | char c = get_symbol_end (); | |
4747 | ||
4748 | if (input_line_pointer == start) | |
4749 | { | |
4750 | as_bad ("Missing section name"); | |
4751 | ignore_rest_of_line (); | |
4752 | return 0; | |
4753 | } | |
4754 | name = obstack_copy (¬es, start, input_line_pointer - start + 1); | |
4755 | *input_line_pointer = c; | |
800eeca4 | 4756 | } |
800eeca4 JW |
4757 | if (!name) |
4758 | { | |
4759 | ignore_rest_of_line (); | |
4760 | return 0; | |
4761 | } | |
4762 | SKIP_WHITESPACE (); | |
4763 | if (*input_line_pointer != ',') | |
4764 | { | |
4765 | as_bad ("Comma expected after section name"); | |
4766 | ignore_rest_of_line (); | |
4767 | return 0; | |
4768 | } | |
4769 | ++input_line_pointer; /* skip comma */ | |
4770 | return name; | |
4771 | } | |
4772 | ||
4773 | static void | |
4774 | dot_xdata (size) | |
4775 | int size; | |
4776 | { | |
4777 | char *name = parse_section_name (); | |
4778 | if (!name) | |
4779 | return; | |
4780 | ||
4d5a53ff | 4781 | md.keep_pending_output = 1; |
800eeca4 JW |
4782 | set_section (name); |
4783 | cons (size); | |
4784 | obj_elf_previous (0); | |
4d5a53ff | 4785 | md.keep_pending_output = 0; |
800eeca4 JW |
4786 | } |
4787 | ||
4788 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4789 | |
800eeca4 JW |
4790 | static void |
4791 | stmt_float_cons (kind) | |
4792 | int kind; | |
4793 | { | |
165a7f90 | 4794 | size_t alignment; |
800eeca4 JW |
4795 | |
4796 | switch (kind) | |
4797 | { | |
165a7f90 L |
4798 | case 'd': |
4799 | alignment = 8; | |
4800 | break; | |
4801 | ||
4802 | case 'x': | |
4803 | case 'X': | |
4804 | alignment = 16; | |
4805 | break; | |
800eeca4 JW |
4806 | |
4807 | case 'f': | |
4808 | default: | |
165a7f90 | 4809 | alignment = 4; |
800eeca4 JW |
4810 | break; |
4811 | } | |
165a7f90 | 4812 | ia64_do_align (alignment); |
800eeca4 JW |
4813 | float_cons (kind); |
4814 | } | |
4815 | ||
4816 | static void | |
4817 | stmt_cons_ua (size) | |
4818 | int size; | |
4819 | { | |
4820 | int saved_auto_align = md.auto_align; | |
4821 | ||
4822 | md.auto_align = 0; | |
4823 | cons (size); | |
4824 | md.auto_align = saved_auto_align; | |
4825 | } | |
4826 | ||
4827 | static void | |
4828 | dot_xfloat_cons (kind) | |
4829 | int kind; | |
4830 | { | |
4831 | char *name = parse_section_name (); | |
4832 | if (!name) | |
4833 | return; | |
4834 | ||
4d5a53ff | 4835 | md.keep_pending_output = 1; |
800eeca4 JW |
4836 | set_section (name); |
4837 | stmt_float_cons (kind); | |
4838 | obj_elf_previous (0); | |
4d5a53ff | 4839 | md.keep_pending_output = 0; |
800eeca4 JW |
4840 | } |
4841 | ||
4842 | static void | |
4843 | dot_xstringer (zero) | |
4844 | int zero; | |
4845 | { | |
4846 | char *name = parse_section_name (); | |
4847 | if (!name) | |
4848 | return; | |
4849 | ||
4d5a53ff | 4850 | md.keep_pending_output = 1; |
800eeca4 JW |
4851 | set_section (name); |
4852 | stringer (zero); | |
4853 | obj_elf_previous (0); | |
4d5a53ff | 4854 | md.keep_pending_output = 0; |
800eeca4 JW |
4855 | } |
4856 | ||
4857 | static void | |
4858 | dot_xdata_ua (size) | |
4859 | int size; | |
4860 | { | |
4861 | int saved_auto_align = md.auto_align; | |
4862 | char *name = parse_section_name (); | |
4863 | if (!name) | |
4864 | return; | |
4865 | ||
4d5a53ff | 4866 | md.keep_pending_output = 1; |
800eeca4 JW |
4867 | set_section (name); |
4868 | md.auto_align = 0; | |
4869 | cons (size); | |
4870 | md.auto_align = saved_auto_align; | |
4871 | obj_elf_previous (0); | |
4d5a53ff | 4872 | md.keep_pending_output = 0; |
800eeca4 JW |
4873 | } |
4874 | ||
4875 | static void | |
4876 | dot_xfloat_cons_ua (kind) | |
4877 | int kind; | |
4878 | { | |
4879 | int saved_auto_align = md.auto_align; | |
4880 | char *name = parse_section_name (); | |
4881 | if (!name) | |
4882 | return; | |
4883 | ||
4d5a53ff | 4884 | md.keep_pending_output = 1; |
800eeca4 JW |
4885 | set_section (name); |
4886 | md.auto_align = 0; | |
4887 | stmt_float_cons (kind); | |
4888 | md.auto_align = saved_auto_align; | |
4889 | obj_elf_previous (0); | |
4d5a53ff | 4890 | md.keep_pending_output = 0; |
800eeca4 JW |
4891 | } |
4892 | ||
4893 | /* .reg.val <regname>,value */ | |
542d6675 | 4894 | |
800eeca4 JW |
4895 | static void |
4896 | dot_reg_val (dummy) | |
2434f565 | 4897 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4898 | { |
4899 | expressionS reg; | |
4900 | ||
4901 | expression (®); | |
4902 | if (reg.X_op != O_register) | |
4903 | { | |
4904 | as_bad (_("Register name expected")); | |
4905 | ignore_rest_of_line (); | |
4906 | } | |
4907 | else if (*input_line_pointer++ != ',') | |
4908 | { | |
4909 | as_bad (_("Comma expected")); | |
4910 | ignore_rest_of_line (); | |
4911 | } | |
197865e8 | 4912 | else |
800eeca4 JW |
4913 | { |
4914 | valueT value = get_absolute_expression (); | |
4915 | int regno = reg.X_add_number; | |
542d6675 KH |
4916 | if (regno < REG_GR || regno > REG_GR + 128) |
4917 | as_warn (_("Register value annotation ignored")); | |
800eeca4 | 4918 | else |
542d6675 KH |
4919 | { |
4920 | gr_values[regno - REG_GR].known = 1; | |
4921 | gr_values[regno - REG_GR].value = value; | |
4922 | gr_values[regno - REG_GR].path = md.path; | |
4923 | } | |
800eeca4 JW |
4924 | } |
4925 | demand_empty_rest_of_line (); | |
4926 | } | |
4927 | ||
5e819f9c JW |
4928 | /* |
4929 | .serialize.data | |
4930 | .serialize.instruction | |
4931 | */ | |
4932 | static void | |
4933 | dot_serialize (type) | |
4934 | int type; | |
4935 | { | |
4936 | insn_group_break (0, 0, 0); | |
4937 | if (type) | |
4938 | instruction_serialization (); | |
4939 | else | |
4940 | data_serialization (); | |
4941 | insn_group_break (0, 0, 0); | |
4942 | demand_empty_rest_of_line (); | |
4943 | } | |
4944 | ||
197865e8 | 4945 | /* select dv checking mode |
800eeca4 JW |
4946 | .auto |
4947 | .explicit | |
4948 | .default | |
4949 | ||
197865e8 | 4950 | A stop is inserted when changing modes |
800eeca4 | 4951 | */ |
542d6675 | 4952 | |
800eeca4 JW |
4953 | static void |
4954 | dot_dv_mode (type) | |
542d6675 | 4955 | int type; |
800eeca4 JW |
4956 | { |
4957 | if (md.manual_bundling) | |
4958 | as_warn (_("Directive invalid within a bundle")); | |
4959 | ||
4960 | if (type == 'E' || type == 'A') | |
4961 | md.mode_explicitly_set = 0; | |
4962 | else | |
4963 | md.mode_explicitly_set = 1; | |
4964 | ||
4965 | md.detect_dv = 1; | |
4966 | switch (type) | |
4967 | { | |
4968 | case 'A': | |
4969 | case 'a': | |
4970 | if (md.explicit_mode) | |
542d6675 | 4971 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4972 | md.explicit_mode = 0; |
4973 | break; | |
4974 | case 'E': | |
4975 | case 'e': | |
4976 | if (!md.explicit_mode) | |
542d6675 | 4977 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4978 | md.explicit_mode = 1; |
4979 | break; | |
4980 | default: | |
4981 | case 'd': | |
4982 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4983 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4984 | md.explicit_mode = md.default_explicit_mode; |
4985 | md.mode_explicitly_set = 0; | |
4986 | break; | |
4987 | } | |
4988 | } | |
4989 | ||
4990 | static void | |
4991 | print_prmask (mask) | |
542d6675 | 4992 | valueT mask; |
800eeca4 JW |
4993 | { |
4994 | int regno; | |
4995 | char *comma = ""; | |
542d6675 | 4996 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4997 | { |
542d6675 KH |
4998 | if (mask & ((valueT) 1 << regno)) |
4999 | { | |
5000 | fprintf (stderr, "%s p%d", comma, regno); | |
5001 | comma = ","; | |
5002 | } | |
800eeca4 JW |
5003 | } |
5004 | } | |
5005 | ||
5006 | /* | |
05ee4b0f JB |
5007 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5008 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5009 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5010 | .pred.safe_across_calls p1 [, p2 [,...]] |
5011 | */ | |
542d6675 | 5012 | |
800eeca4 JW |
5013 | static void |
5014 | dot_pred_rel (type) | |
542d6675 | 5015 | int type; |
800eeca4 JW |
5016 | { |
5017 | valueT mask = 0; | |
5018 | int count = 0; | |
5019 | int p1 = -1, p2 = -1; | |
5020 | ||
5021 | if (type == 0) | |
5022 | { | |
05ee4b0f | 5023 | if (*input_line_pointer == '"') |
542d6675 KH |
5024 | { |
5025 | int len; | |
5026 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5027 | |
542d6675 KH |
5028 | if (strcmp (form, "mutex") == 0) |
5029 | type = 'm'; | |
5030 | else if (strcmp (form, "clear") == 0) | |
5031 | type = 'c'; | |
5032 | else if (strcmp (form, "imply") == 0) | |
5033 | type = 'i'; | |
05ee4b0f JB |
5034 | obstack_free (¬es, form); |
5035 | } | |
5036 | else if (*input_line_pointer == '@') | |
5037 | { | |
5038 | char *form = ++input_line_pointer; | |
5039 | char c = get_symbol_end(); | |
5040 | ||
5041 | if (strcmp (form, "mutex") == 0) | |
5042 | type = 'm'; | |
5043 | else if (strcmp (form, "clear") == 0) | |
5044 | type = 'c'; | |
5045 | else if (strcmp (form, "imply") == 0) | |
5046 | type = 'i'; | |
5047 | *input_line_pointer = c; | |
5048 | } | |
5049 | else | |
5050 | { | |
5051 | as_bad (_("Missing predicate relation type")); | |
5052 | ignore_rest_of_line (); | |
5053 | return; | |
5054 | } | |
5055 | if (type == 0) | |
5056 | { | |
5057 | as_bad (_("Unrecognized predicate relation type")); | |
5058 | ignore_rest_of_line (); | |
5059 | return; | |
542d6675 | 5060 | } |
800eeca4 | 5061 | if (*input_line_pointer == ',') |
542d6675 | 5062 | ++input_line_pointer; |
800eeca4 JW |
5063 | SKIP_WHITESPACE (); |
5064 | } | |
5065 | ||
5066 | SKIP_WHITESPACE (); | |
5067 | while (1) | |
5068 | { | |
20b36a95 | 5069 | valueT bits = 1; |
800eeca4 | 5070 | int regno; |
20b36a95 JB |
5071 | expressionS pr, *pr1, *pr2; |
5072 | ||
5073 | expression (&pr); | |
5074 | if (pr.X_op == O_register | |
5075 | && pr.X_add_number >= REG_P | |
5076 | && pr.X_add_number <= REG_P + 63) | |
5077 | { | |
5078 | regno = pr.X_add_number - REG_P; | |
5079 | bits <<= regno; | |
5080 | count++; | |
5081 | if (p1 == -1) | |
5082 | p1 = regno; | |
5083 | else if (p2 == -1) | |
5084 | p2 = regno; | |
5085 | } | |
5086 | else if (type != 'i' | |
5087 | && pr.X_op == O_subtract | |
5088 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5089 | && pr1->X_op == O_register | |
5090 | && pr1->X_add_number >= REG_P | |
5091 | && pr1->X_add_number <= REG_P + 63 | |
5092 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5093 | && pr2->X_op == O_register | |
5094 | && pr2->X_add_number >= REG_P | |
5095 | && pr2->X_add_number <= REG_P + 63) | |
5096 | { | |
5097 | /* It's a range. */ | |
5098 | int stop; | |
5099 | ||
5100 | regno = pr1->X_add_number - REG_P; | |
5101 | stop = pr2->X_add_number - REG_P; | |
5102 | if (regno >= stop) | |
542d6675 KH |
5103 | { |
5104 | as_bad (_("Bad register range")); | |
5105 | ignore_rest_of_line (); | |
5106 | return; | |
5107 | } | |
20b36a95 JB |
5108 | bits = ((bits << stop) << 1) - (bits << regno); |
5109 | count += stop - regno + 1; | |
5110 | } | |
5111 | else | |
5112 | { | |
5113 | as_bad (_("Predicate register expected")); | |
5114 | ignore_rest_of_line (); | |
5115 | return; | |
542d6675 | 5116 | } |
20b36a95 JB |
5117 | if (mask & bits) |
5118 | as_warn (_("Duplicate predicate register ignored")); | |
5119 | mask |= bits; | |
800eeca4 | 5120 | if (*input_line_pointer != ',') |
542d6675 | 5121 | break; |
800eeca4 JW |
5122 | ++input_line_pointer; |
5123 | SKIP_WHITESPACE (); | |
5124 | } | |
5125 | ||
5126 | switch (type) | |
5127 | { | |
5128 | case 'c': | |
5129 | if (count == 0) | |
542d6675 | 5130 | mask = ~(valueT) 0; |
800eeca4 | 5131 | clear_qp_mutex (mask); |
197865e8 | 5132 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5133 | break; |
5134 | case 'i': | |
5135 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5136 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5137 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5138 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5139 | else |
542d6675 | 5140 | add_qp_imply (p1, p2); |
800eeca4 JW |
5141 | break; |
5142 | case 'm': | |
5143 | if (count < 2) | |
542d6675 KH |
5144 | { |
5145 | as_bad (_("At least two PR arguments expected")); | |
5146 | break; | |
5147 | } | |
800eeca4 | 5148 | else if (mask & 1) |
542d6675 KH |
5149 | { |
5150 | as_bad (_("Use of p0 is not valid in this context")); | |
5151 | break; | |
5152 | } | |
800eeca4 JW |
5153 | add_qp_mutex (mask); |
5154 | break; | |
5155 | case 's': | |
5156 | /* note that we don't override any existing relations */ | |
5157 | if (count == 0) | |
542d6675 KH |
5158 | { |
5159 | as_bad (_("At least one PR argument expected")); | |
5160 | break; | |
5161 | } | |
800eeca4 | 5162 | if (md.debug_dv) |
542d6675 KH |
5163 | { |
5164 | fprintf (stderr, "Safe across calls: "); | |
5165 | print_prmask (mask); | |
5166 | fprintf (stderr, "\n"); | |
5167 | } | |
800eeca4 JW |
5168 | qp_safe_across_calls = mask; |
5169 | break; | |
5170 | } | |
5171 | demand_empty_rest_of_line (); | |
5172 | } | |
5173 | ||
5174 | /* .entry label [, label [, ...]] | |
5175 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5176 | Otherwise, only global labels are considered entry points. */ |
5177 | ||
800eeca4 JW |
5178 | static void |
5179 | dot_entry (dummy) | |
2434f565 | 5180 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5181 | { |
5182 | const char *err; | |
5183 | char *name; | |
5184 | int c; | |
5185 | symbolS *symbolP; | |
5186 | ||
5187 | do | |
5188 | { | |
5189 | name = input_line_pointer; | |
5190 | c = get_symbol_end (); | |
5191 | symbolP = symbol_find_or_make (name); | |
5192 | ||
5193 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
5194 | if (err) | |
542d6675 KH |
5195 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5196 | name, err); | |
800eeca4 JW |
5197 | |
5198 | *input_line_pointer = c; | |
5199 | SKIP_WHITESPACE (); | |
5200 | c = *input_line_pointer; | |
5201 | if (c == ',') | |
5202 | { | |
5203 | input_line_pointer++; | |
5204 | SKIP_WHITESPACE (); | |
5205 | if (*input_line_pointer == '\n') | |
5206 | c = '\n'; | |
5207 | } | |
5208 | } | |
5209 | while (c == ','); | |
5210 | ||
5211 | demand_empty_rest_of_line (); | |
5212 | } | |
5213 | ||
197865e8 | 5214 | /* .mem.offset offset, base |
542d6675 KH |
5215 | "base" is used to distinguish between offsets from a different base. */ |
5216 | ||
800eeca4 JW |
5217 | static void |
5218 | dot_mem_offset (dummy) | |
2434f565 | 5219 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5220 | { |
5221 | md.mem_offset.hint = 1; | |
5222 | md.mem_offset.offset = get_absolute_expression (); | |
5223 | if (*input_line_pointer != ',') | |
5224 | { | |
5225 | as_bad (_("Comma expected")); | |
5226 | ignore_rest_of_line (); | |
5227 | return; | |
5228 | } | |
5229 | ++input_line_pointer; | |
5230 | md.mem_offset.base = get_absolute_expression (); | |
5231 | demand_empty_rest_of_line (); | |
5232 | } | |
5233 | ||
542d6675 | 5234 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5235 | const pseudo_typeS md_pseudo_table[] = |
5236 | { | |
5237 | { "radix", dot_radix, 0 }, | |
5238 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5239 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5240 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5241 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5242 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5243 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5244 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5245 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5246 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5247 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5248 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5249 | { "proc", dot_proc, 0 }, |
5250 | { "body", dot_body, 0 }, | |
5251 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5252 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5253 | |
5254 | { "fframe", dot_fframe, 0 }, | |
5255 | { "vframe", dot_vframe, 0 }, | |
5256 | { "vframesp", dot_vframesp, 0 }, | |
5257 | { "vframepsp", dot_vframepsp, 0 }, | |
5258 | { "save", dot_save, 0 }, | |
5259 | { "restore", dot_restore, 0 }, | |
5260 | { "restorereg", dot_restorereg, 0 }, | |
5261 | { "restorereg.p", dot_restorereg_p, 0 }, | |
5262 | { "handlerdata", dot_handlerdata, 0 }, | |
5263 | { "unwentry", dot_unwentry, 0 }, | |
5264 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5265 | { "savesp", dot_savemem, 0 }, |
5266 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5267 | { "save.g", dot_saveg, 0 }, |
5268 | { "save.f", dot_savef, 0 }, | |
5269 | { "save.b", dot_saveb, 0 }, | |
5270 | { "save.gf", dot_savegf, 0 }, | |
5271 | { "spill", dot_spill, 0 }, | |
5272 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5273 | { "spillsp", dot_spillmem, 0 }, |
5274 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 5275 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
5276 | { "spillsp.p", dot_spillmem_p, 0 }, |
5277 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
5278 | { "label_state", dot_label_state, 0 }, |
5279 | { "copy_state", dot_copy_state, 0 }, | |
5280 | { "unwabi", dot_unwabi, 0 }, | |
5281 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5282 | { "mii", dot_template, 0x0 }, |
5283 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5284 | { "mlx", dot_template, 0x2 }, | |
5285 | { "mmi", dot_template, 0x4 }, | |
5286 | { "mfi", dot_template, 0x6 }, | |
5287 | { "mmf", dot_template, 0x7 }, | |
5288 | { "mib", dot_template, 0x8 }, | |
5289 | { "mbb", dot_template, 0x9 }, | |
5290 | { "bbb", dot_template, 0xb }, | |
5291 | { "mmb", dot_template, 0xc }, | |
5292 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5293 | { "align", dot_align, 0 }, |
800eeca4 JW |
5294 | { "regstk", dot_regstk, 0 }, |
5295 | { "rotr", dot_rot, DYNREG_GR }, | |
5296 | { "rotf", dot_rot, DYNREG_FR }, | |
5297 | { "rotp", dot_rot, DYNREG_PR }, | |
5298 | { "lsb", dot_byteorder, 0 }, | |
5299 | { "msb", dot_byteorder, 1 }, | |
5300 | { "psr", dot_psr, 0 }, | |
5301 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5302 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5303 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5304 | ||
5305 | { "xdata1", dot_xdata, 1 }, | |
5306 | { "xdata2", dot_xdata, 2 }, | |
5307 | { "xdata4", dot_xdata, 4 }, | |
5308 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5309 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5310 | { "xreal4", dot_xfloat_cons, 'f' }, |
5311 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5312 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5313 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5314 | { "xstring", dot_xstringer, 0 }, |
5315 | { "xstringz", dot_xstringer, 1 }, | |
5316 | ||
542d6675 | 5317 | /* unaligned versions: */ |
800eeca4 JW |
5318 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5319 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5320 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5321 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5322 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5323 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5324 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5325 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5326 | |
5327 | /* annotations/DV checking support */ | |
5328 | { "entry", dot_entry, 0 }, | |
2434f565 | 5329 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5330 | { "pred.rel", dot_pred_rel, 0 }, |
5331 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5332 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5333 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5334 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5335 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5336 | { "serialize.data", dot_serialize, 0 }, |
5337 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5338 | { "auto", dot_dv_mode, 'a' }, |
5339 | { "explicit", dot_dv_mode, 'e' }, | |
5340 | { "default", dot_dv_mode, 'd' }, | |
5341 | ||
87885043 JW |
5342 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5343 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5344 | tell it that these ones are supposed to be unaligned. Long term, | |
5345 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5346 | are aligned by default. */ | |
5347 | {"2byte", stmt_cons_ua, 2}, | |
5348 | {"4byte", stmt_cons_ua, 4}, | |
5349 | {"8byte", stmt_cons_ua, 8}, | |
5350 | ||
800eeca4 JW |
5351 | { NULL, 0, 0 } |
5352 | }; | |
5353 | ||
5354 | static const struct pseudo_opcode | |
5355 | { | |
5356 | const char *name; | |
5357 | void (*handler) (int); | |
5358 | int arg; | |
5359 | } | |
5360 | pseudo_opcode[] = | |
5361 | { | |
5362 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5363 | { "data1", cons, 1 }, | |
5364 | { "data2", cons, 2 }, | |
5365 | { "data4", cons, 4 }, | |
5366 | { "data8", cons, 8 }, | |
3969b680 | 5367 | { "data16", cons, 16 }, |
800eeca4 JW |
5368 | { "real4", stmt_float_cons, 'f' }, |
5369 | { "real8", stmt_float_cons, 'd' }, | |
5370 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5371 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5372 | { "string", stringer, 0 }, |
5373 | { "stringz", stringer, 1 }, | |
5374 | ||
542d6675 | 5375 | /* unaligned versions: */ |
800eeca4 JW |
5376 | { "data2.ua", stmt_cons_ua, 2 }, |
5377 | { "data4.ua", stmt_cons_ua, 4 }, | |
5378 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5379 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5380 | { "real4.ua", float_cons, 'f' }, |
5381 | { "real8.ua", float_cons, 'd' }, | |
5382 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5383 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5384 | }; |
5385 | ||
5386 | /* Declare a register by creating a symbol for it and entering it in | |
5387 | the symbol table. */ | |
542d6675 KH |
5388 | |
5389 | static symbolS * | |
800eeca4 JW |
5390 | declare_register (name, regnum) |
5391 | const char *name; | |
5392 | int regnum; | |
5393 | { | |
5394 | const char *err; | |
5395 | symbolS *sym; | |
5396 | ||
5397 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5398 | ||
5399 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5400 | if (err) | |
5401 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5402 | name, err); | |
5403 | ||
5404 | return sym; | |
5405 | } | |
5406 | ||
5407 | static void | |
5408 | declare_register_set (prefix, num_regs, base_regnum) | |
5409 | const char *prefix; | |
5410 | int num_regs; | |
5411 | int base_regnum; | |
5412 | { | |
5413 | char name[8]; | |
5414 | int i; | |
5415 | ||
5416 | for (i = 0; i < num_regs; ++i) | |
5417 | { | |
5418 | sprintf (name, "%s%u", prefix, i); | |
5419 | declare_register (name, base_regnum + i); | |
5420 | } | |
5421 | } | |
5422 | ||
5423 | static unsigned int | |
5424 | operand_width (opnd) | |
5425 | enum ia64_opnd opnd; | |
5426 | { | |
5427 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5428 | unsigned int bits = 0; | |
5429 | int i; | |
5430 | ||
5431 | bits = 0; | |
5432 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5433 | bits += odesc->field[i].bits; | |
5434 | ||
5435 | return bits; | |
5436 | } | |
5437 | ||
87f8eb97 | 5438 | static enum operand_match_result |
800eeca4 JW |
5439 | operand_match (idesc, index, e) |
5440 | const struct ia64_opcode *idesc; | |
5441 | int index; | |
5442 | expressionS *e; | |
5443 | { | |
5444 | enum ia64_opnd opnd = idesc->operands[index]; | |
5445 | int bits, relocatable = 0; | |
5446 | struct insn_fix *fix; | |
5447 | bfd_signed_vma val; | |
5448 | ||
5449 | switch (opnd) | |
5450 | { | |
542d6675 | 5451 | /* constants: */ |
800eeca4 JW |
5452 | |
5453 | case IA64_OPND_AR_CCV: | |
5454 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5455 | return OPERAND_MATCH; |
800eeca4 JW |
5456 | break; |
5457 | ||
c10d9d8f JW |
5458 | case IA64_OPND_AR_CSD: |
5459 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5460 | return OPERAND_MATCH; | |
5461 | break; | |
5462 | ||
800eeca4 JW |
5463 | case IA64_OPND_AR_PFS: |
5464 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5465 | return OPERAND_MATCH; |
800eeca4 JW |
5466 | break; |
5467 | ||
5468 | case IA64_OPND_GR0: | |
5469 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5470 | return OPERAND_MATCH; |
800eeca4 JW |
5471 | break; |
5472 | ||
5473 | case IA64_OPND_IP: | |
5474 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5475 | return OPERAND_MATCH; |
800eeca4 JW |
5476 | break; |
5477 | ||
5478 | case IA64_OPND_PR: | |
5479 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5480 | return OPERAND_MATCH; |
800eeca4 JW |
5481 | break; |
5482 | ||
5483 | case IA64_OPND_PR_ROT: | |
5484 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5485 | return OPERAND_MATCH; |
800eeca4 JW |
5486 | break; |
5487 | ||
5488 | case IA64_OPND_PSR: | |
5489 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5490 | return OPERAND_MATCH; |
800eeca4 JW |
5491 | break; |
5492 | ||
5493 | case IA64_OPND_PSR_L: | |
5494 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5495 | return OPERAND_MATCH; |
800eeca4 JW |
5496 | break; |
5497 | ||
5498 | case IA64_OPND_PSR_UM: | |
5499 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5500 | return OPERAND_MATCH; |
800eeca4 JW |
5501 | break; |
5502 | ||
5503 | case IA64_OPND_C1: | |
87f8eb97 JW |
5504 | if (e->X_op == O_constant) |
5505 | { | |
5506 | if (e->X_add_number == 1) | |
5507 | return OPERAND_MATCH; | |
5508 | else | |
5509 | return OPERAND_OUT_OF_RANGE; | |
5510 | } | |
800eeca4 JW |
5511 | break; |
5512 | ||
5513 | case IA64_OPND_C8: | |
87f8eb97 JW |
5514 | if (e->X_op == O_constant) |
5515 | { | |
5516 | if (e->X_add_number == 8) | |
5517 | return OPERAND_MATCH; | |
5518 | else | |
5519 | return OPERAND_OUT_OF_RANGE; | |
5520 | } | |
800eeca4 JW |
5521 | break; |
5522 | ||
5523 | case IA64_OPND_C16: | |
87f8eb97 JW |
5524 | if (e->X_op == O_constant) |
5525 | { | |
5526 | if (e->X_add_number == 16) | |
5527 | return OPERAND_MATCH; | |
5528 | else | |
5529 | return OPERAND_OUT_OF_RANGE; | |
5530 | } | |
800eeca4 JW |
5531 | break; |
5532 | ||
542d6675 | 5533 | /* register operands: */ |
800eeca4 JW |
5534 | |
5535 | case IA64_OPND_AR3: | |
5536 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5537 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5538 | return OPERAND_MATCH; |
800eeca4 JW |
5539 | break; |
5540 | ||
5541 | case IA64_OPND_B1: | |
5542 | case IA64_OPND_B2: | |
5543 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5544 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5545 | return OPERAND_MATCH; |
800eeca4 JW |
5546 | break; |
5547 | ||
5548 | case IA64_OPND_CR3: | |
5549 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5550 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5551 | return OPERAND_MATCH; |
800eeca4 JW |
5552 | break; |
5553 | ||
5554 | case IA64_OPND_F1: | |
5555 | case IA64_OPND_F2: | |
5556 | case IA64_OPND_F3: | |
5557 | case IA64_OPND_F4: | |
5558 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5559 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5560 | return OPERAND_MATCH; |
800eeca4 JW |
5561 | break; |
5562 | ||
5563 | case IA64_OPND_P1: | |
5564 | case IA64_OPND_P2: | |
5565 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5566 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5567 | return OPERAND_MATCH; |
800eeca4 JW |
5568 | break; |
5569 | ||
5570 | case IA64_OPND_R1: | |
5571 | case IA64_OPND_R2: | |
5572 | case IA64_OPND_R3: | |
5573 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5574 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5575 | return OPERAND_MATCH; |
800eeca4 JW |
5576 | break; |
5577 | ||
5578 | case IA64_OPND_R3_2: | |
87f8eb97 | 5579 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5580 | { |
87f8eb97 JW |
5581 | if (e->X_add_number < REG_GR + 4) |
5582 | return OPERAND_MATCH; | |
5583 | else if (e->X_add_number < REG_GR + 128) | |
5584 | return OPERAND_OUT_OF_RANGE; | |
5585 | } | |
800eeca4 JW |
5586 | break; |
5587 | ||
542d6675 | 5588 | /* indirect operands: */ |
800eeca4 JW |
5589 | case IA64_OPND_CPUID_R3: |
5590 | case IA64_OPND_DBR_R3: | |
5591 | case IA64_OPND_DTR_R3: | |
5592 | case IA64_OPND_ITR_R3: | |
5593 | case IA64_OPND_IBR_R3: | |
5594 | case IA64_OPND_MSR_R3: | |
5595 | case IA64_OPND_PKR_R3: | |
5596 | case IA64_OPND_PMC_R3: | |
5597 | case IA64_OPND_PMD_R3: | |
5598 | case IA64_OPND_RR_R3: | |
5599 | if (e->X_op == O_index && e->X_op_symbol | |
5600 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5601 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5602 | return OPERAND_MATCH; |
800eeca4 JW |
5603 | break; |
5604 | ||
5605 | case IA64_OPND_MR3: | |
5606 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5607 | return OPERAND_MATCH; |
800eeca4 JW |
5608 | break; |
5609 | ||
542d6675 | 5610 | /* immediate operands: */ |
800eeca4 JW |
5611 | case IA64_OPND_CNT2a: |
5612 | case IA64_OPND_LEN4: | |
5613 | case IA64_OPND_LEN6: | |
5614 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5615 | if (e->X_op == O_constant) |
5616 | { | |
5617 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5618 | return OPERAND_MATCH; | |
5619 | else | |
5620 | return OPERAND_OUT_OF_RANGE; | |
5621 | } | |
800eeca4 JW |
5622 | break; |
5623 | ||
5624 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5625 | if (e->X_op == O_constant) |
5626 | { | |
5627 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5628 | return OPERAND_MATCH; | |
5629 | else | |
5630 | return OPERAND_OUT_OF_RANGE; | |
5631 | } | |
800eeca4 JW |
5632 | break; |
5633 | ||
5634 | case IA64_OPND_CNT2c: | |
5635 | val = e->X_add_number; | |
87f8eb97 JW |
5636 | if (e->X_op == O_constant) |
5637 | { | |
5638 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5639 | return OPERAND_MATCH; | |
5640 | else | |
5641 | return OPERAND_OUT_OF_RANGE; | |
5642 | } | |
800eeca4 JW |
5643 | break; |
5644 | ||
5645 | case IA64_OPND_SOR: | |
5646 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5647 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5648 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5649 | case IA64_OPND_SOF: |
5650 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5651 | if (e->X_op == O_constant) |
5652 | { | |
5653 | if ((bfd_vma) e->X_add_number <= 96) | |
5654 | return OPERAND_MATCH; | |
5655 | else | |
5656 | return OPERAND_OUT_OF_RANGE; | |
5657 | } | |
800eeca4 JW |
5658 | break; |
5659 | ||
5660 | case IA64_OPND_IMMU62: | |
5661 | if (e->X_op == O_constant) | |
542d6675 | 5662 | { |
800eeca4 | 5663 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5664 | return OPERAND_MATCH; |
5665 | else | |
5666 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5667 | } |
197865e8 | 5668 | else |
542d6675 KH |
5669 | { |
5670 | /* FIXME -- need 62-bit relocation type */ | |
5671 | as_bad (_("62-bit relocation not yet implemented")); | |
5672 | } | |
800eeca4 JW |
5673 | break; |
5674 | ||
5675 | case IA64_OPND_IMMU64: | |
5676 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5677 | || e->X_op == O_subtract) | |
5678 | { | |
5679 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5680 | fix->code = BFD_RELOC_IA64_IMM64; | |
5681 | if (e->X_op != O_subtract) | |
5682 | { | |
5683 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5684 | if (e->X_op == O_pseudo_fixup) | |
5685 | e->X_op = O_symbol; | |
5686 | } | |
5687 | ||
5688 | fix->opnd = idesc->operands[index]; | |
5689 | fix->expr = *e; | |
5690 | fix->is_pcrel = 0; | |
5691 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5692 | return OPERAND_MATCH; |
800eeca4 JW |
5693 | } |
5694 | else if (e->X_op == O_constant) | |
87f8eb97 | 5695 | return OPERAND_MATCH; |
800eeca4 JW |
5696 | break; |
5697 | ||
5698 | case IA64_OPND_CCNT5: | |
5699 | case IA64_OPND_CNT5: | |
5700 | case IA64_OPND_CNT6: | |
5701 | case IA64_OPND_CPOS6a: | |
5702 | case IA64_OPND_CPOS6b: | |
5703 | case IA64_OPND_CPOS6c: | |
5704 | case IA64_OPND_IMMU2: | |
5705 | case IA64_OPND_IMMU7a: | |
5706 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5707 | case IA64_OPND_IMMU21: |
5708 | case IA64_OPND_IMMU24: | |
5709 | case IA64_OPND_MBTYPE4: | |
5710 | case IA64_OPND_MHTYPE8: | |
5711 | case IA64_OPND_POS6: | |
5712 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5713 | if (e->X_op == O_constant) |
5714 | { | |
5715 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5716 | return OPERAND_MATCH; | |
5717 | else | |
5718 | return OPERAND_OUT_OF_RANGE; | |
5719 | } | |
800eeca4 JW |
5720 | break; |
5721 | ||
bf3ca999 TW |
5722 | case IA64_OPND_IMMU9: |
5723 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5724 | if (e->X_op == O_constant) |
542d6675 | 5725 | { |
87f8eb97 JW |
5726 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5727 | { | |
5728 | int lobits = e->X_add_number & 0x3; | |
5729 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5730 | e->X_add_number |= (bfd_vma) 0x3; | |
5731 | return OPERAND_MATCH; | |
5732 | } | |
5733 | else | |
5734 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5735 | } |
bf3ca999 TW |
5736 | break; |
5737 | ||
800eeca4 JW |
5738 | case IA64_OPND_IMM44: |
5739 | /* least 16 bits must be zero */ | |
5740 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5741 | /* XXX technically, this is wrong: we should not be issuing warning |
5742 | messages until we're sure this instruction pattern is going to | |
5743 | be used! */ | |
542d6675 | 5744 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5745 | |
87f8eb97 | 5746 | if (e->X_op == O_constant) |
542d6675 | 5747 | { |
87f8eb97 JW |
5748 | if (((e->X_add_number >= 0 |
5749 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5750 | || (e->X_add_number < 0 | |
5751 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5752 | { |
87f8eb97 JW |
5753 | /* sign-extend */ |
5754 | if (e->X_add_number >= 0 | |
5755 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5756 | { | |
5757 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5758 | } | |
5759 | return OPERAND_MATCH; | |
542d6675 | 5760 | } |
87f8eb97 JW |
5761 | else |
5762 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5763 | } |
800eeca4 JW |
5764 | break; |
5765 | ||
5766 | case IA64_OPND_IMM17: | |
5767 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5768 | if (e->X_op == O_constant) |
542d6675 | 5769 | { |
87f8eb97 JW |
5770 | if (((e->X_add_number >= 0 |
5771 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5772 | || (e->X_add_number < 0 | |
5773 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5774 | { |
87f8eb97 JW |
5775 | /* sign-extend */ |
5776 | if (e->X_add_number >= 0 | |
5777 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5778 | { | |
5779 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5780 | } | |
5781 | return OPERAND_MATCH; | |
542d6675 | 5782 | } |
87f8eb97 JW |
5783 | else |
5784 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5785 | } |
800eeca4 JW |
5786 | break; |
5787 | ||
5788 | case IA64_OPND_IMM14: | |
5789 | case IA64_OPND_IMM22: | |
5790 | relocatable = 1; | |
5791 | case IA64_OPND_IMM1: | |
5792 | case IA64_OPND_IMM8: | |
5793 | case IA64_OPND_IMM8U4: | |
5794 | case IA64_OPND_IMM8M1: | |
5795 | case IA64_OPND_IMM8M1U4: | |
5796 | case IA64_OPND_IMM8M1U8: | |
5797 | case IA64_OPND_IMM9a: | |
5798 | case IA64_OPND_IMM9b: | |
5799 | bits = operand_width (idesc->operands[index]); | |
5800 | if (relocatable && (e->X_op == O_symbol | |
5801 | || e->X_op == O_subtract | |
5802 | || e->X_op == O_pseudo_fixup)) | |
5803 | { | |
5804 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5805 | ||
5806 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5807 | fix->code = BFD_RELOC_IA64_IMM14; | |
5808 | else | |
5809 | fix->code = BFD_RELOC_IA64_IMM22; | |
5810 | ||
5811 | if (e->X_op != O_subtract) | |
5812 | { | |
5813 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5814 | if (e->X_op == O_pseudo_fixup) | |
5815 | e->X_op = O_symbol; | |
5816 | } | |
5817 | ||
5818 | fix->opnd = idesc->operands[index]; | |
5819 | fix->expr = *e; | |
5820 | fix->is_pcrel = 0; | |
5821 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5822 | return OPERAND_MATCH; |
800eeca4 JW |
5823 | } |
5824 | else if (e->X_op != O_constant | |
5825 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5826 | return OPERAND_MISMATCH; |
800eeca4 JW |
5827 | |
5828 | if (opnd == IA64_OPND_IMM8M1U4) | |
5829 | { | |
5830 | /* Zero is not valid for unsigned compares that take an adjusted | |
5831 | constant immediate range. */ | |
5832 | if (e->X_add_number == 0) | |
87f8eb97 | 5833 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5834 | |
5835 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5836 | checks will work. */ | |
5837 | val = e->X_add_number; | |
197865e8 KH |
5838 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5839 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5840 | val = ((val << 32) >> 32); |
5841 | ||
5842 | /* Check for 0x100000000. This is valid because | |
5843 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5844 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5845 | return OPERAND_MATCH; |
800eeca4 JW |
5846 | |
5847 | val = val - 1; | |
5848 | } | |
5849 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5850 | { | |
5851 | /* Zero is not valid for unsigned compares that take an adjusted | |
5852 | constant immediate range. */ | |
5853 | if (e->X_add_number == 0) | |
87f8eb97 | 5854 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5855 | |
5856 | /* Check for 0x10000000000000000. */ | |
5857 | if (e->X_op == O_big) | |
5858 | { | |
5859 | if (generic_bignum[0] == 0 | |
5860 | && generic_bignum[1] == 0 | |
5861 | && generic_bignum[2] == 0 | |
5862 | && generic_bignum[3] == 0 | |
5863 | && generic_bignum[4] == 1) | |
87f8eb97 | 5864 | return OPERAND_MATCH; |
800eeca4 | 5865 | else |
87f8eb97 | 5866 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5867 | } |
5868 | else | |
5869 | val = e->X_add_number - 1; | |
5870 | } | |
5871 | else if (opnd == IA64_OPND_IMM8M1) | |
5872 | val = e->X_add_number - 1; | |
5873 | else if (opnd == IA64_OPND_IMM8U4) | |
5874 | { | |
5875 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5876 | checks will work. */ | |
5877 | val = e->X_add_number; | |
197865e8 KH |
5878 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5879 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5880 | val = ((val << 32) >> 32); |
5881 | } | |
5882 | else | |
5883 | val = e->X_add_number; | |
5884 | ||
2434f565 JW |
5885 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5886 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5887 | return OPERAND_MATCH; |
5888 | else | |
5889 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5890 | |
5891 | case IA64_OPND_INC3: | |
5892 | /* +/- 1, 4, 8, 16 */ | |
5893 | val = e->X_add_number; | |
5894 | if (val < 0) | |
5895 | val = -val; | |
87f8eb97 JW |
5896 | if (e->X_op == O_constant) |
5897 | { | |
5898 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5899 | return OPERAND_MATCH; | |
5900 | else | |
5901 | return OPERAND_OUT_OF_RANGE; | |
5902 | } | |
800eeca4 JW |
5903 | break; |
5904 | ||
5905 | case IA64_OPND_TGT25: | |
5906 | case IA64_OPND_TGT25b: | |
5907 | case IA64_OPND_TGT25c: | |
5908 | case IA64_OPND_TGT64: | |
5909 | if (e->X_op == O_symbol) | |
5910 | { | |
5911 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5912 | if (opnd == IA64_OPND_TGT25) | |
5913 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5914 | else if (opnd == IA64_OPND_TGT25b) | |
5915 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5916 | else if (opnd == IA64_OPND_TGT25c) | |
5917 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5918 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5919 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5920 | else | |
5921 | abort (); | |
5922 | ||
800eeca4 JW |
5923 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5924 | fix->opnd = idesc->operands[index]; | |
5925 | fix->expr = *e; | |
5926 | fix->is_pcrel = 1; | |
5927 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5928 | return OPERAND_MATCH; |
800eeca4 JW |
5929 | } |
5930 | case IA64_OPND_TAG13: | |
5931 | case IA64_OPND_TAG13b: | |
5932 | switch (e->X_op) | |
5933 | { | |
5934 | case O_constant: | |
87f8eb97 | 5935 | return OPERAND_MATCH; |
800eeca4 JW |
5936 | |
5937 | case O_symbol: | |
5938 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5939 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5940 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5941 | fix->code = BFD_RELOC_UNUSED; | |
5942 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5943 | fix->opnd = idesc->operands[index]; |
5944 | fix->expr = *e; | |
5945 | fix->is_pcrel = 1; | |
5946 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5947 | return OPERAND_MATCH; |
800eeca4 JW |
5948 | |
5949 | default: | |
5950 | break; | |
5951 | } | |
5952 | break; | |
5953 | ||
a823923b RH |
5954 | case IA64_OPND_LDXMOV: |
5955 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5956 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5957 | fix->opnd = idesc->operands[index]; | |
5958 | fix->expr = *e; | |
5959 | fix->is_pcrel = 0; | |
5960 | ++CURR_SLOT.num_fixups; | |
5961 | return OPERAND_MATCH; | |
5962 | ||
800eeca4 JW |
5963 | default: |
5964 | break; | |
5965 | } | |
87f8eb97 | 5966 | return OPERAND_MISMATCH; |
800eeca4 JW |
5967 | } |
5968 | ||
5969 | static int | |
5970 | parse_operand (e) | |
5971 | expressionS *e; | |
5972 | { | |
5973 | int sep = '\0'; | |
5974 | ||
5975 | memset (e, 0, sizeof (*e)); | |
5976 | e->X_op = O_absent; | |
5977 | SKIP_WHITESPACE (); | |
5978 | if (*input_line_pointer != '}') | |
5979 | expression (e); | |
5980 | sep = *input_line_pointer++; | |
5981 | ||
5982 | if (sep == '}') | |
5983 | { | |
5984 | if (!md.manual_bundling) | |
5985 | as_warn ("Found '}' when manual bundling is off"); | |
5986 | else | |
5987 | CURR_SLOT.manual_bundling_off = 1; | |
5988 | md.manual_bundling = 0; | |
5989 | sep = '\0'; | |
5990 | } | |
5991 | return sep; | |
5992 | } | |
5993 | ||
5994 | /* Returns the next entry in the opcode table that matches the one in | |
5995 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5996 | found, NULL is returned instead. */ |
800eeca4 JW |
5997 | |
5998 | static struct ia64_opcode * | |
5999 | get_next_opcode (struct ia64_opcode *idesc) | |
6000 | { | |
6001 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6002 | ia64_free_opcode (idesc); | |
6003 | return next; | |
6004 | } | |
6005 | ||
6006 | /* Parse the operands for the opcode and find the opcode variant that | |
6007 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6008 | |
6009 | static struct ia64_opcode * | |
800eeca4 JW |
6010 | parse_operands (idesc) |
6011 | struct ia64_opcode *idesc; | |
6012 | { | |
6013 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6014 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
800eeca4 | 6015 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6016 | enum operand_match_result result; |
800eeca4 JW |
6017 | char mnemonic[129]; |
6018 | char *first_arg = 0, *end, *saved_input_pointer; | |
6019 | unsigned int sof; | |
6020 | ||
6021 | assert (strlen (idesc->name) <= 128); | |
6022 | ||
6023 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6024 | if (idesc->operands[2] == IA64_OPND_SOF |
6025 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6026 | { |
6027 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6028 | can't parse the first operand until we have parsed the | |
6029 | remaining operands of the "alloc" instruction. */ | |
6030 | SKIP_WHITESPACE (); | |
6031 | first_arg = input_line_pointer; | |
6032 | end = strchr (input_line_pointer, '='); | |
6033 | if (!end) | |
6034 | { | |
6035 | as_bad ("Expected separator `='"); | |
6036 | return 0; | |
6037 | } | |
6038 | input_line_pointer = end + 1; | |
6039 | ++i; | |
6040 | ++num_outputs; | |
6041 | } | |
6042 | ||
d3156ecc | 6043 | for (; ; ++i) |
800eeca4 | 6044 | { |
d3156ecc JB |
6045 | if (i < NELEMS (CURR_SLOT.opnd)) |
6046 | { | |
6047 | sep = parse_operand (CURR_SLOT.opnd + i); | |
6048 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
6049 | break; | |
6050 | } | |
6051 | else | |
6052 | { | |
6053 | expressionS dummy; | |
6054 | ||
6055 | sep = parse_operand (&dummy); | |
6056 | if (dummy.X_op == O_absent) | |
6057 | break; | |
6058 | } | |
800eeca4 JW |
6059 | |
6060 | ++num_operands; | |
6061 | ||
6062 | if (sep != '=' && sep != ',') | |
6063 | break; | |
6064 | ||
6065 | if (sep == '=') | |
6066 | { | |
6067 | if (num_outputs > 0) | |
6068 | as_bad ("Duplicate equal sign (=) in instruction"); | |
6069 | else | |
6070 | num_outputs = i + 1; | |
6071 | } | |
6072 | } | |
6073 | if (sep != '\0') | |
6074 | { | |
6075 | as_bad ("Illegal operand separator `%c'", sep); | |
6076 | return 0; | |
6077 | } | |
197865e8 | 6078 | |
60b9a617 JB |
6079 | if (idesc->operands[2] == IA64_OPND_SOF |
6080 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6081 | { |
6082 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
6083 | know (strcmp (idesc->name, "alloc") == 0); | |
60b9a617 JB |
6084 | i = (CURR_SLOT.opnd[1].X_op == O_register |
6085 | && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1; | |
6086 | if (num_operands == i + 3 /* first_arg not included in this count! */ | |
6087 | && CURR_SLOT.opnd[i].X_op == O_constant | |
6088 | && CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6089 | && CURR_SLOT.opnd[i + 2].X_op == O_constant | |
6090 | && CURR_SLOT.opnd[i + 3].X_op == O_constant) | |
800eeca4 | 6091 | { |
60b9a617 JB |
6092 | sof = set_regstack (CURR_SLOT.opnd[i].X_add_number, |
6093 | CURR_SLOT.opnd[i + 1].X_add_number, | |
6094 | CURR_SLOT.opnd[i + 2].X_add_number, | |
6095 | CURR_SLOT.opnd[i + 3].X_add_number); | |
800eeca4 | 6096 | |
542d6675 | 6097 | /* now we can parse the first arg: */ |
800eeca4 JW |
6098 | saved_input_pointer = input_line_pointer; |
6099 | input_line_pointer = first_arg; | |
6100 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
6101 | if (sep != '=') | |
6102 | --num_outputs; /* force error */ | |
6103 | input_line_pointer = saved_input_pointer; | |
6104 | ||
60b9a617 JB |
6105 | CURR_SLOT.opnd[i].X_add_number = sof; |
6106 | CURR_SLOT.opnd[i + 1].X_add_number | |
6107 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6108 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6109 | } |
6110 | } | |
6111 | ||
d3156ecc | 6112 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6113 | curr_out_of_range_pos = -1; |
6114 | error_pos = 0; | |
800eeca4 JW |
6115 | for (; idesc; idesc = get_next_opcode (idesc)) |
6116 | { | |
6117 | if (num_outputs != idesc->num_outputs) | |
6118 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6119 | if (highest_unmatched_operand < 0) |
6120 | highest_unmatched_operand |= 1; | |
6121 | if (num_operands > NELEMS (idesc->operands) | |
6122 | || (num_operands < NELEMS (idesc->operands) | |
6123 | && idesc->operands[num_operands]) | |
6124 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6125 | continue; /* mismatch in number of arguments */ | |
6126 | if (highest_unmatched_operand < 0) | |
6127 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6128 | |
6129 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6130 | |
6131 | /* Try to match all operands. If we see an out-of-range operand, | |
6132 | then continue trying to match the rest of the operands, since if | |
6133 | the rest match, then this idesc will give the best error message. */ | |
6134 | ||
6135 | out_of_range_pos = -1; | |
800eeca4 | 6136 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6137 | { |
6138 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6139 | if (result != OPERAND_MATCH) | |
6140 | { | |
6141 | if (result != OPERAND_OUT_OF_RANGE) | |
6142 | break; | |
6143 | if (out_of_range_pos < 0) | |
6144 | /* remember position of the first out-of-range operand: */ | |
6145 | out_of_range_pos = i; | |
6146 | } | |
6147 | } | |
800eeca4 | 6148 | |
87f8eb97 JW |
6149 | /* If we did not match all operands, or if at least one operand was |
6150 | out-of-range, then this idesc does not match. Keep track of which | |
6151 | idesc matched the most operands before failing. If we have two | |
6152 | idescs that failed at the same position, and one had an out-of-range | |
6153 | operand, then prefer the out-of-range operand. Thus if we have | |
6154 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6155 | of range instead of an error saying that the constant should have been | |
6156 | a register. */ | |
6157 | ||
6158 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6159 | { |
87f8eb97 JW |
6160 | if (i > highest_unmatched_operand |
6161 | || (i == highest_unmatched_operand | |
6162 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6163 | { |
6164 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6165 | if (out_of_range_pos >= 0) |
6166 | { | |
6167 | expected_operand = idesc->operands[out_of_range_pos]; | |
6168 | error_pos = out_of_range_pos; | |
6169 | } | |
6170 | else | |
6171 | { | |
6172 | expected_operand = idesc->operands[i]; | |
6173 | error_pos = i; | |
6174 | } | |
6175 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6176 | } |
6177 | continue; | |
6178 | } | |
6179 | ||
800eeca4 JW |
6180 | break; |
6181 | } | |
6182 | if (!idesc) | |
6183 | { | |
6184 | if (expected_operand) | |
6185 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 6186 | error_pos + 1, mnemonic, |
800eeca4 | 6187 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc JB |
6188 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
6189 | as_bad ("Wrong number of output operands"); | |
6190 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) | |
6191 | as_bad ("Wrong number of input operands"); | |
800eeca4 JW |
6192 | else |
6193 | as_bad ("Operand mismatch"); | |
6194 | return 0; | |
6195 | } | |
6196 | return idesc; | |
6197 | } | |
6198 | ||
6199 | static void | |
6200 | build_insn (slot, insnp) | |
6201 | struct slot *slot; | |
6202 | bfd_vma *insnp; | |
6203 | { | |
6204 | const struct ia64_operand *odesc, *o2desc; | |
6205 | struct ia64_opcode *idesc = slot->idesc; | |
6206 | bfd_signed_vma insn, val; | |
6207 | const char *err; | |
6208 | int i; | |
6209 | ||
6210 | insn = idesc->opcode | slot->qp_regno; | |
6211 | ||
6212 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6213 | { | |
c67e42c9 RH |
6214 | if (slot->opnd[i].X_op == O_register |
6215 | || slot->opnd[i].X_op == O_constant | |
6216 | || slot->opnd[i].X_op == O_index) | |
6217 | val = slot->opnd[i].X_add_number; | |
6218 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6219 | { |
c67e42c9 RH |
6220 | /* This must be the value 0x10000000000000000. */ |
6221 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6222 | val = 0; | |
6223 | } | |
6224 | else | |
6225 | val = 0; | |
6226 | ||
6227 | switch (idesc->operands[i]) | |
6228 | { | |
6229 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6230 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6231 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6232 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6233 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6234 | continue; |
6235 | ||
6236 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6237 | val &= 0x3fffffffffffffffULL; |
6238 | if (val != slot->opnd[i].X_add_number) | |
6239 | as_warn (_("Value truncated to 62 bits")); | |
6240 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6241 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6242 | continue; |
800eeca4 | 6243 | |
c67e42c9 RH |
6244 | case IA64_OPND_TGT64: |
6245 | val >>= 4; | |
6246 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6247 | insn |= ((((val >> 59) & 0x1) << 36) | |
6248 | | (((val >> 0) & 0xfffff) << 13)); | |
6249 | continue; | |
800eeca4 | 6250 | |
c67e42c9 RH |
6251 | case IA64_OPND_AR3: |
6252 | val -= REG_AR; | |
6253 | break; | |
6254 | ||
6255 | case IA64_OPND_B1: | |
6256 | case IA64_OPND_B2: | |
6257 | val -= REG_BR; | |
6258 | break; | |
6259 | ||
6260 | case IA64_OPND_CR3: | |
6261 | val -= REG_CR; | |
6262 | break; | |
6263 | ||
6264 | case IA64_OPND_F1: | |
6265 | case IA64_OPND_F2: | |
6266 | case IA64_OPND_F3: | |
6267 | case IA64_OPND_F4: | |
6268 | val -= REG_FR; | |
6269 | break; | |
6270 | ||
6271 | case IA64_OPND_P1: | |
6272 | case IA64_OPND_P2: | |
6273 | val -= REG_P; | |
6274 | break; | |
6275 | ||
6276 | case IA64_OPND_R1: | |
6277 | case IA64_OPND_R2: | |
6278 | case IA64_OPND_R3: | |
6279 | case IA64_OPND_R3_2: | |
6280 | case IA64_OPND_CPUID_R3: | |
6281 | case IA64_OPND_DBR_R3: | |
6282 | case IA64_OPND_DTR_R3: | |
6283 | case IA64_OPND_ITR_R3: | |
6284 | case IA64_OPND_IBR_R3: | |
6285 | case IA64_OPND_MR3: | |
6286 | case IA64_OPND_MSR_R3: | |
6287 | case IA64_OPND_PKR_R3: | |
6288 | case IA64_OPND_PMC_R3: | |
6289 | case IA64_OPND_PMD_R3: | |
197865e8 | 6290 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6291 | val -= REG_GR; |
6292 | break; | |
6293 | ||
6294 | default: | |
6295 | break; | |
6296 | } | |
6297 | ||
6298 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6299 | err = (*odesc->insert) (odesc, val, &insn); | |
6300 | if (err) | |
6301 | as_bad_where (slot->src_file, slot->src_line, | |
6302 | "Bad operand value: %s", err); | |
6303 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6304 | { | |
6305 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6306 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6307 | { | |
6308 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6309 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6310 | } |
c67e42c9 RH |
6311 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6312 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6313 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6314 | { |
c67e42c9 RH |
6315 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6316 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6317 | } |
6318 | } | |
6319 | } | |
6320 | *insnp = insn; | |
6321 | } | |
6322 | ||
6323 | static void | |
6324 | emit_one_bundle () | |
6325 | { | |
f4660e2c | 6326 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6327 | enum ia64_unit required_unit, insn_unit = 0; |
6328 | enum ia64_insn_type type[3], insn_type; | |
6329 | unsigned int template, orig_template; | |
542d6675 | 6330 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6331 | struct ia64_opcode *idesc; |
6332 | int end_of_insn_group = 0, user_template = -1; | |
6333 | int n, i, j, first, curr; | |
d6e78c11 | 6334 | unw_rec_list *ptr, *last_ptr, *end_ptr; |
800eeca4 JW |
6335 | bfd_vma t0 = 0, t1 = 0; |
6336 | struct label_fix *lfix; | |
6337 | struct insn_fix *ifix; | |
6338 | char mnemonic[16]; | |
6339 | fixS *fix; | |
6340 | char *f; | |
5a9ff93d | 6341 | int addr_mod; |
800eeca4 JW |
6342 | |
6343 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6344 | know (first >= 0 & first < NUM_SLOTS); | |
6345 | n = MIN (3, md.num_slots_in_use); | |
6346 | ||
6347 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6348 | otherwise: */ |
800eeca4 JW |
6349 | |
6350 | if (md.slot[first].user_template >= 0) | |
6351 | user_template = template = md.slot[first].user_template; | |
6352 | else | |
6353 | { | |
032efc85 | 6354 | /* Auto select appropriate template. */ |
800eeca4 JW |
6355 | memset (type, 0, sizeof (type)); |
6356 | curr = first; | |
6357 | for (i = 0; i < n; ++i) | |
6358 | { | |
032efc85 RH |
6359 | if (md.slot[curr].label_fixups && i != 0) |
6360 | break; | |
800eeca4 JW |
6361 | type[i] = md.slot[curr].idesc->type; |
6362 | curr = (curr + 1) % NUM_SLOTS; | |
6363 | } | |
6364 | template = best_template[type[0]][type[1]][type[2]]; | |
6365 | } | |
6366 | ||
542d6675 | 6367 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6368 | for (i = 0; i < 3; ++i) |
6369 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6370 | ||
6371 | f = frag_more (16); | |
6372 | ||
5a9ff93d JW |
6373 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6374 | from the start of the frag. */ | |
6375 | addr_mod = frag_now_fix () & 15; | |
6376 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6377 | as_bad (_("instruction address is not a multiple of 16")); | |
6378 | frag_now->insn_addr = addr_mod; | |
6379 | frag_now->has_code = 1; | |
6380 | ||
542d6675 | 6381 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6382 | curr = first; |
6383 | idesc = md.slot[curr].idesc; | |
6384 | end_of_insn_group = 0; | |
6385 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) | |
6386 | { | |
d6e78c11 JW |
6387 | /* If we have unwind records, we may need to update some now. */ |
6388 | ptr = md.slot[curr].unwind_record; | |
6389 | if (ptr) | |
6390 | { | |
6391 | /* Find the last prologue/body record in the list for the current | |
6392 | insn, and set the slot number for all records up to that point. | |
6393 | This needs to be done now, because prologue/body records refer to | |
6394 | the current point, not the point after the instruction has been | |
6395 | issued. This matters because there may have been nops emitted | |
6396 | meanwhile. Any non-prologue non-body record followed by a | |
6397 | prologue/body record must also refer to the current point. */ | |
6398 | last_ptr = NULL; | |
6399 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6400 | for (; ptr != end_ptr; ptr = ptr->next) | |
6401 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
6402 | || ptr->r.type == body) | |
6403 | last_ptr = ptr; | |
6404 | if (last_ptr) | |
6405 | { | |
6406 | /* Make last_ptr point one after the last prologue/body | |
6407 | record. */ | |
6408 | last_ptr = last_ptr->next; | |
6409 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6410 | ptr = ptr->next) | |
6411 | { | |
6412 | ptr->slot_number = (unsigned long) f + i; | |
6413 | ptr->slot_frag = frag_now; | |
6414 | } | |
6415 | /* Remove the initialized records, so that we won't accidentally | |
6416 | update them again if we insert a nop and continue. */ | |
6417 | md.slot[curr].unwind_record = last_ptr; | |
6418 | } | |
6419 | } | |
e0c9811a | 6420 | |
f4660e2c JB |
6421 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6422 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6423 | { |
f4660e2c JB |
6424 | if (curr == first) |
6425 | manual_bundling = 1; | |
800eeca4 | 6426 | else |
f4660e2c JB |
6427 | break; /* Need to start a new bundle. */ |
6428 | } | |
6429 | ||
6430 | if (idesc->flags & IA64_OPCODE_SLOT2) | |
6431 | { | |
6432 | if (manual_bundling && !manual_bundling_off) | |
6433 | { | |
6434 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6435 | "`%s' must be last in bundle", idesc->name); | |
6436 | if (i < 2) | |
6437 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6438 | } | |
6439 | i = 2; | |
800eeca4 JW |
6440 | } |
6441 | if (idesc->flags & IA64_OPCODE_LAST) | |
6442 | { | |
2434f565 JW |
6443 | int required_slot; |
6444 | unsigned int required_template; | |
800eeca4 JW |
6445 | |
6446 | /* If we need a stop bit after an M slot, our only choice is | |
6447 | template 5 (M;;MI). If we need a stop bit after a B | |
6448 | slot, our only choice is to place it at the end of the | |
6449 | bundle, because the only available templates are MIB, | |
6450 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6451 | than M and B slots because these are the only kind of | |
6452 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6453 | required_template = template; | |
6454 | switch (idesc->type) | |
6455 | { | |
6456 | case IA64_TYPE_M: | |
6457 | required_slot = 0; | |
6458 | required_template = 5; | |
6459 | break; | |
6460 | ||
6461 | case IA64_TYPE_B: | |
6462 | required_slot = 2; | |
6463 | break; | |
6464 | ||
6465 | default: | |
6466 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6467 | "Internal error: don't know how to force %s to end" | |
6468 | "of instruction group", idesc->name); | |
6469 | required_slot = i; | |
6470 | break; | |
6471 | } | |
f4660e2c JB |
6472 | if (manual_bundling |
6473 | && (i > required_slot | |
6474 | || (required_slot == 2 && !manual_bundling_off) | |
6475 | || (user_template >= 0 | |
6476 | /* Changing from MMI to M;MI is OK. */ | |
6477 | && (template ^ required_template) > 1))) | |
6478 | { | |
6479 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6480 | "`%s' must be last in instruction group", | |
6481 | idesc->name); | |
6482 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6483 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6484 | } | |
800eeca4 JW |
6485 | if (required_slot < i) |
6486 | /* Can't fit this instruction. */ | |
6487 | break; | |
6488 | ||
6489 | i = required_slot; | |
6490 | if (required_template != template) | |
6491 | { | |
6492 | /* If we switch the template, we need to reset the NOPs | |
6493 | after slot i. The slot-types of the instructions ahead | |
6494 | of i never change, so we don't need to worry about | |
6495 | changing NOPs in front of this slot. */ | |
6496 | for (j = i; j < 3; ++j) | |
6497 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6498 | } | |
6499 | template = required_template; | |
6500 | } | |
6501 | if (curr != first && md.slot[curr].label_fixups) | |
6502 | { | |
f4660e2c JB |
6503 | if (manual_bundling) |
6504 | { | |
6505 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
800eeca4 | 6506 | "Label must be first in a bundle"); |
f4660e2c JB |
6507 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6508 | } | |
800eeca4 JW |
6509 | /* This insn must go into the first slot of a bundle. */ |
6510 | break; | |
6511 | } | |
6512 | ||
800eeca4 JW |
6513 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6514 | { | |
6515 | /* We need an instruction group boundary in the middle of a | |
6516 | bundle. See if we can switch to an other template with | |
6517 | an appropriate boundary. */ | |
6518 | ||
6519 | orig_template = template; | |
6520 | if (i == 1 && (user_template == 4 | |
6521 | || (user_template < 0 | |
6522 | && (ia64_templ_desc[template].exec_unit[0] | |
6523 | == IA64_UNIT_M)))) | |
6524 | { | |
6525 | template = 5; | |
6526 | end_of_insn_group = 0; | |
6527 | } | |
6528 | else if (i == 2 && (user_template == 0 | |
6529 | || (user_template < 0 | |
6530 | && (ia64_templ_desc[template].exec_unit[1] | |
6531 | == IA64_UNIT_I))) | |
6532 | /* This test makes sure we don't switch the template if | |
6533 | the next instruction is one that needs to be first in | |
6534 | an instruction group. Since all those instructions are | |
6535 | in the M group, there is no way such an instruction can | |
6536 | fit in this bundle even if we switch the template. The | |
6537 | reason we have to check for this is that otherwise we | |
6538 | may end up generating "MI;;I M.." which has the deadly | |
6539 | effect that the second M instruction is no longer the | |
f4660e2c | 6540 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6541 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6542 | { | |
6543 | template = 1; | |
6544 | end_of_insn_group = 0; | |
6545 | } | |
f4660e2c JB |
6546 | else if (i == 1 |
6547 | && user_template == 0 | |
6548 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6549 | /* Use the next slot. */ | |
6550 | continue; | |
800eeca4 JW |
6551 | else if (curr != first) |
6552 | /* can't fit this insn */ | |
6553 | break; | |
6554 | ||
6555 | if (template != orig_template) | |
6556 | /* if we switch the template, we need to reset the NOPs | |
6557 | after slot i. The slot-types of the instructions ahead | |
6558 | of i never change, so we don't need to worry about | |
6559 | changing NOPs in front of this slot. */ | |
6560 | for (j = i; j < 3; ++j) | |
6561 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6562 | } | |
6563 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6564 | ||
c10d9d8f | 6565 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6566 | if (idesc->type == IA64_TYPE_DYN) |
6567 | { | |
97762d08 JB |
6568 | enum ia64_opnd opnd1, opnd2; |
6569 | ||
800eeca4 | 6570 | if ((strcmp (idesc->name, "nop") == 0) |
c10d9d8f | 6571 | || (strcmp (idesc->name, "hint") == 0) |
800eeca4 JW |
6572 | || (strcmp (idesc->name, "break") == 0)) |
6573 | insn_unit = required_unit; | |
97762d08 JB |
6574 | else if (strcmp (idesc->name, "chk.s") == 0 |
6575 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6576 | { |
6577 | insn_unit = IA64_UNIT_M; | |
97762d08 JB |
6578 | if (required_unit == IA64_UNIT_I |
6579 | || (required_unit == IA64_UNIT_F && template == 6)) | |
800eeca4 JW |
6580 | insn_unit = IA64_UNIT_I; |
6581 | } | |
6582 | else | |
6583 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6584 | ||
09124b3f | 6585 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]); |
97762d08 JB |
6586 | opnd1 = idesc->operands[0]; |
6587 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6588 | ia64_free_opcode (idesc); |
97762d08 JB |
6589 | idesc = ia64_find_opcode (mnemonic); |
6590 | /* moves to/from ARs have collisions */ | |
6591 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6592 | { | |
6593 | while (idesc != NULL | |
6594 | && (idesc->operands[0] != opnd1 | |
6595 | || idesc->operands[1] != opnd2)) | |
6596 | idesc = get_next_opcode (idesc); | |
6597 | } | |
97762d08 | 6598 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6599 | } |
6600 | else | |
6601 | { | |
6602 | insn_type = idesc->type; | |
6603 | insn_unit = IA64_UNIT_NIL; | |
6604 | switch (insn_type) | |
6605 | { | |
6606 | case IA64_TYPE_A: | |
6607 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6608 | insn_unit = required_unit; | |
6609 | break; | |
542d6675 | 6610 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6611 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6612 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6613 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6614 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6615 | default: break; | |
6616 | } | |
6617 | } | |
6618 | ||
6619 | if (insn_unit != required_unit) | |
6620 | { | |
6621 | if (required_unit == IA64_UNIT_L | |
542d6675 | 6622 | && insn_unit == IA64_UNIT_I |
800eeca4 JW |
6623 | && !(idesc->flags & IA64_OPCODE_X_IN_MLX)) |
6624 | { | |
6625 | /* we got ourselves an MLX template but the current | |
197865e8 | 6626 | instruction isn't an X-unit, or an I-unit instruction |
800eeca4 JW |
6627 | that can go into the X slot of an MLX template. Duh. */ |
6628 | if (md.num_slots_in_use >= NUM_SLOTS) | |
6629 | { | |
6630 | as_bad_where (md.slot[curr].src_file, | |
6631 | md.slot[curr].src_line, | |
6632 | "`%s' can't go in X slot of " | |
6633 | "MLX template", idesc->name); | |
542d6675 | 6634 | /* drop this insn so we don't livelock: */ |
800eeca4 JW |
6635 | --md.num_slots_in_use; |
6636 | } | |
6637 | break; | |
6638 | } | |
6639 | continue; /* try next slot */ | |
6640 | } | |
6641 | ||
196e8040 JW |
6642 | if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen) |
6643 | { | |
6644 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6645 | |
196e8040 JW |
6646 | md.slot[curr].loc_directive_seen = 0; |
6647 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6648 | } | |
800eeca4 JW |
6649 | |
6650 | build_insn (md.slot + curr, insn + i); | |
6651 | ||
d6e78c11 JW |
6652 | ptr = md.slot[curr].unwind_record; |
6653 | if (ptr) | |
6654 | { | |
6655 | /* Set slot numbers for all remaining unwind records belonging to the | |
6656 | current insn. There can not be any prologue/body unwind records | |
6657 | here. */ | |
6658 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6659 | for (; ptr != end_ptr; ptr = ptr->next) | |
6660 | { | |
6661 | ptr->slot_number = (unsigned long) f + i; | |
6662 | ptr->slot_frag = frag_now; | |
6663 | } | |
6664 | md.slot[curr].unwind_record = NULL; | |
6665 | } | |
10850f29 | 6666 | |
800eeca4 JW |
6667 | if (required_unit == IA64_UNIT_L) |
6668 | { | |
6669 | know (i == 1); | |
6670 | /* skip one slot for long/X-unit instructions */ | |
6671 | ++i; | |
6672 | } | |
6673 | --md.num_slots_in_use; | |
6674 | ||
542d6675 | 6675 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6676 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6677 | { | |
6678 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6679 | symbol_set_frag (lfix->sym, frag_now); | |
6680 | } | |
f1bcba5b JW |
6681 | /* and fix up the tags also. */ |
6682 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6683 | { | |
6684 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6685 | symbol_set_frag (lfix->sym, frag_now); | |
6686 | } | |
800eeca4 JW |
6687 | |
6688 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6689 | { | |
6690 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6691 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6692 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6693 | fix->tc_fix_data.opnd = ifix->opnd; | |
6694 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6695 | fix->fx_file = md.slot[curr].src_file; | |
6696 | fix->fx_line = md.slot[curr].src_line; | |
6697 | } | |
6698 | ||
6699 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6700 | ||
542d6675 | 6701 | /* clear slot: */ |
800eeca4 JW |
6702 | ia64_free_opcode (md.slot[curr].idesc); |
6703 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6704 | md.slot[curr].user_template = -1; | |
6705 | ||
6706 | if (manual_bundling_off) | |
6707 | { | |
6708 | manual_bundling = 0; | |
6709 | break; | |
6710 | } | |
6711 | curr = (curr + 1) % NUM_SLOTS; | |
6712 | idesc = md.slot[curr].idesc; | |
6713 | } | |
f4660e2c | 6714 | if (manual_bundling > 0) |
800eeca4 JW |
6715 | { |
6716 | if (md.num_slots_in_use > 0) | |
ac025970 L |
6717 | { |
6718 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6719 | "`%s' does not fit into %s template", | |
6720 | idesc->name, ia64_templ_desc[template].name); | |
6721 | --md.num_slots_in_use; | |
6722 | } | |
800eeca4 JW |
6723 | else |
6724 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6725 | "Missing '}' at end of file"); | |
6726 | } | |
6727 | know (md.num_slots_in_use < NUM_SLOTS); | |
6728 | ||
6729 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6730 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6731 | ||
44f5c83a JW |
6732 | number_to_chars_littleendian (f + 0, t0, 8); |
6733 | number_to_chars_littleendian (f + 8, t1, 8); | |
f5a30c2e | 6734 | |
73f20958 L |
6735 | if (unwind.list) |
6736 | { | |
127cab00 L |
6737 | unwind.list->next_slot_number = (unsigned long) f + 16; |
6738 | unwind.list->next_slot_frag = frag_now; | |
73f20958 | 6739 | } |
800eeca4 JW |
6740 | } |
6741 | ||
6742 | int | |
6743 | md_parse_option (c, arg) | |
6744 | int c; | |
6745 | char *arg; | |
6746 | { | |
7463c317 | 6747 | |
800eeca4 JW |
6748 | switch (c) |
6749 | { | |
c43c2cc5 | 6750 | /* Switches from the Intel assembler. */ |
44f5c83a | 6751 | case 'm': |
800eeca4 JW |
6752 | if (strcmp (arg, "ilp64") == 0 |
6753 | || strcmp (arg, "lp64") == 0 | |
6754 | || strcmp (arg, "p64") == 0) | |
6755 | { | |
6756 | md.flags |= EF_IA_64_ABI64; | |
6757 | } | |
6758 | else if (strcmp (arg, "ilp32") == 0) | |
6759 | { | |
6760 | md.flags &= ~EF_IA_64_ABI64; | |
6761 | } | |
6762 | else if (strcmp (arg, "le") == 0) | |
6763 | { | |
6764 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6765 | default_big_endian = 0; |
800eeca4 JW |
6766 | } |
6767 | else if (strcmp (arg, "be") == 0) | |
6768 | { | |
6769 | md.flags |= EF_IA_64_BE; | |
549f748d | 6770 | default_big_endian = 1; |
800eeca4 | 6771 | } |
970d6792 L |
6772 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6773 | { | |
6774 | arg += 13; | |
6775 | if (strcmp (arg, "warning") == 0) | |
6776 | md.unwind_check = unwind_check_warning; | |
6777 | else if (strcmp (arg, "error") == 0) | |
6778 | md.unwind_check = unwind_check_error; | |
6779 | else | |
6780 | return 0; | |
6781 | } | |
800eeca4 JW |
6782 | else |
6783 | return 0; | |
6784 | break; | |
6785 | ||
6786 | case 'N': | |
6787 | if (strcmp (arg, "so") == 0) | |
6788 | { | |
542d6675 | 6789 | /* Suppress signon message. */ |
800eeca4 JW |
6790 | } |
6791 | else if (strcmp (arg, "pi") == 0) | |
6792 | { | |
6793 | /* Reject privileged instructions. FIXME */ | |
6794 | } | |
6795 | else if (strcmp (arg, "us") == 0) | |
6796 | { | |
6797 | /* Allow union of signed and unsigned range. FIXME */ | |
6798 | } | |
6799 | else if (strcmp (arg, "close_fcalls") == 0) | |
6800 | { | |
6801 | /* Do not resolve global function calls. */ | |
6802 | } | |
6803 | else | |
6804 | return 0; | |
6805 | break; | |
6806 | ||
6807 | case 'C': | |
6808 | /* temp[="prefix"] Insert temporary labels into the object file | |
6809 | symbol table prefixed by "prefix". | |
6810 | Default prefix is ":temp:". | |
6811 | */ | |
6812 | break; | |
6813 | ||
6814 | case 'a': | |
800eeca4 JW |
6815 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6816 | according to <tgt> -- | |
6817 | exit: branch out from the current context (default) | |
6818 | labels: all labels in context may be branch targets | |
6819 | */ | |
85b40035 L |
6820 | if (strncmp (arg, "indirect=", 9) != 0) |
6821 | return 0; | |
800eeca4 JW |
6822 | break; |
6823 | ||
6824 | case 'x': | |
6825 | /* -X conflicts with an ignored option, use -x instead */ | |
6826 | md.detect_dv = 1; | |
6827 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6828 | { |
6829 | /* set default mode to explicit */ | |
6830 | md.default_explicit_mode = 1; | |
6831 | break; | |
6832 | } | |
800eeca4 | 6833 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6834 | { |
6835 | md.default_explicit_mode = 0; | |
6836 | } | |
f1dab70d JB |
6837 | else if (strcmp (arg, "none") == 0) |
6838 | { | |
6839 | md.detect_dv = 0; | |
6840 | } | |
800eeca4 | 6841 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6842 | { |
6843 | md.debug_dv = 1; | |
6844 | } | |
800eeca4 | 6845 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6846 | { |
6847 | md.default_explicit_mode = 1; | |
6848 | md.debug_dv = 1; | |
6849 | } | |
f1dab70d JB |
6850 | else if (strcmp (arg, "debugn") == 0) |
6851 | { | |
6852 | md.debug_dv = 1; | |
6853 | md.detect_dv = 0; | |
6854 | } | |
800eeca4 | 6855 | else |
542d6675 KH |
6856 | { |
6857 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6858 | } | |
800eeca4 JW |
6859 | break; |
6860 | ||
6861 | case 'S': | |
6862 | /* nops Print nops statistics. */ | |
6863 | break; | |
6864 | ||
c43c2cc5 JW |
6865 | /* GNU specific switches for gcc. */ |
6866 | case OPTION_MCONSTANT_GP: | |
6867 | md.flags |= EF_IA_64_CONS_GP; | |
6868 | break; | |
6869 | ||
6870 | case OPTION_MAUTO_PIC: | |
6871 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6872 | break; | |
6873 | ||
800eeca4 JW |
6874 | default: |
6875 | return 0; | |
6876 | } | |
6877 | ||
6878 | return 1; | |
6879 | } | |
6880 | ||
6881 | void | |
6882 | md_show_usage (stream) | |
6883 | FILE *stream; | |
6884 | { | |
542d6675 | 6885 | fputs (_("\ |
800eeca4 | 6886 | IA-64 options:\n\ |
6290819d NC |
6887 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6888 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6889 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6890 | without function descriptors (sets ELF header flag\n\ | |
6891 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6892 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6893 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
970d6792 L |
6894 | -munwind-check=[warning|error]\n\ |
6895 | unwind directive check (default -munwind-check=warning)\n\ | |
f1dab70d JB |
6896 | -x | -xexplicit turn on dependency violation checking\n\ |
6897 | -xauto automagically remove dependency violations (default)\n\ | |
6898 | -xnone turn off dependency violation checking\n\ | |
6899 | -xdebug debug dependency violation checker\n\ | |
6900 | -xdebugn debug dependency violation checker but turn off\n\ | |
6901 | dependency violation checking\n\ | |
6902 | -xdebugx debug dependency violation checker and turn on\n\ | |
6903 | dependency violation checking\n"), | |
800eeca4 JW |
6904 | stream); |
6905 | } | |
6906 | ||
acebd4ce AS |
6907 | void |
6908 | ia64_after_parse_args () | |
6909 | { | |
6910 | if (debug_type == DEBUG_STABS) | |
6911 | as_fatal (_("--gstabs is not supported for ia64")); | |
6912 | } | |
6913 | ||
44576e1f RH |
6914 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
6915 | ||
6916 | static int | |
800eeca4 JW |
6917 | match (int templ, int type, int slot) |
6918 | { | |
6919 | enum ia64_unit unit; | |
6920 | int result; | |
6921 | ||
6922 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
6923 | switch (type) | |
6924 | { | |
6925 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
6926 | case IA64_TYPE_A: | |
6927 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
6928 | break; | |
6929 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
6930 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
6931 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
6932 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
6933 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
6934 | default: result = 0; break; | |
6935 | } | |
6936 | return result; | |
6937 | } | |
6938 | ||
44576e1f RH |
6939 | /* Add a bit of extra goodness if a nop of type F or B would fit |
6940 | in TEMPL at SLOT. */ | |
6941 | ||
6942 | static inline int | |
6943 | extra_goodness (int templ, int slot) | |
6944 | { | |
ebeeafe6 | 6945 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) |
44576e1f | 6946 | return 2; |
ebeeafe6 | 6947 | if (slot == 2 && match (templ, IA64_TYPE_B, slot)) |
44576e1f RH |
6948 | return 1; |
6949 | return 0; | |
6950 | } | |
6951 | ||
800eeca4 JW |
6952 | /* This function is called once, at assembler startup time. It sets |
6953 | up all the tables, etc. that the MD part of the assembler will need | |
6954 | that can be determined before arguments are parsed. */ | |
6955 | void | |
6956 | md_begin () | |
6957 | { | |
44f5c83a | 6958 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
6959 | const char *err; |
6960 | char name[8]; | |
6961 | ||
6962 | md.auto_align = 1; | |
6963 | md.explicit_mode = md.default_explicit_mode; | |
6964 | ||
6965 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
6966 | ||
0234cb7c | 6967 | /* Make sure function pointers get initialized. */ |
10a98291 | 6968 | target_big_endian = -1; |
549f748d | 6969 | dot_byteorder (default_big_endian); |
10a98291 | 6970 | |
35f5df7f L |
6971 | alias_hash = hash_new (); |
6972 | alias_name_hash = hash_new (); | |
6973 | secalias_hash = hash_new (); | |
6974 | secalias_name_hash = hash_new (); | |
6975 | ||
13ae64f3 JJ |
6976 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
6977 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
6978 | &zero_address_frag); | |
6979 | ||
6980 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
6981 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
6982 | &zero_address_frag); | |
6983 | ||
800eeca4 | 6984 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
6985 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
6986 | &zero_address_frag); | |
800eeca4 JW |
6987 | |
6988 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
6989 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
6990 | &zero_address_frag); | |
800eeca4 JW |
6991 | |
6992 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
6993 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
6994 | &zero_address_frag); | |
800eeca4 | 6995 | |
fa2c7eff RH |
6996 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
6997 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
6998 | &zero_address_frag); | |
6999 | ||
c67e42c9 | 7000 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7001 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7002 | &zero_address_frag); | |
c67e42c9 | 7003 | |
800eeca4 | 7004 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7005 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7006 | &zero_address_frag); | |
800eeca4 JW |
7007 | |
7008 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7009 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7010 | &zero_address_frag); | |
800eeca4 JW |
7011 | |
7012 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7013 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7014 | &zero_address_frag); | |
800eeca4 | 7015 | |
13ae64f3 JJ |
7016 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7017 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7018 | &zero_address_frag); | |
7019 | ||
800eeca4 | 7020 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7021 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7022 | &zero_address_frag); | |
800eeca4 JW |
7023 | |
7024 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7025 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7026 | &zero_address_frag); | |
800eeca4 | 7027 | |
13ae64f3 JJ |
7028 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7029 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7030 | &zero_address_frag); | |
7031 | ||
7032 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7033 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7034 | &zero_address_frag); | |
7035 | ||
7036 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7037 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7038 | &zero_address_frag); | |
7039 | ||
3969b680 RH |
7040 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7041 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7042 | &zero_address_frag); | |
7043 | ||
197865e8 | 7044 | /* Compute the table of best templates. We compute goodness as a |
44576e1f RH |
7045 | base 4 value, in which each match counts for 3, each F counts |
7046 | for 2, each B counts for 1. This should maximize the number of | |
7047 | F and B nops in the chosen bundles, which is good because these | |
7048 | pipelines are least likely to be overcommitted. */ | |
800eeca4 JW |
7049 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7050 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7051 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7052 | { | |
7053 | best = 0; | |
7054 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7055 | { | |
7056 | goodness = 0; | |
7057 | if (match (t, i, 0)) | |
7058 | { | |
7059 | if (match (t, j, 1)) | |
7060 | { | |
7061 | if (match (t, k, 2)) | |
44576e1f | 7062 | goodness = 3 + 3 + 3; |
800eeca4 | 7063 | else |
44576e1f | 7064 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7065 | } |
7066 | else if (match (t, j, 2)) | |
44576e1f | 7067 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7068 | else |
44576e1f RH |
7069 | { |
7070 | goodness = 3; | |
7071 | goodness += extra_goodness (t, 1); | |
7072 | goodness += extra_goodness (t, 2); | |
7073 | } | |
800eeca4 JW |
7074 | } |
7075 | else if (match (t, i, 1)) | |
7076 | { | |
7077 | if (match (t, j, 2)) | |
44576e1f | 7078 | goodness = 3 + 3; |
800eeca4 | 7079 | else |
44576e1f | 7080 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7081 | } |
7082 | else if (match (t, i, 2)) | |
44576e1f | 7083 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7084 | |
7085 | if (goodness > best) | |
7086 | { | |
7087 | best = goodness; | |
7088 | best_template[i][j][k] = t; | |
7089 | } | |
7090 | } | |
7091 | } | |
7092 | ||
7093 | for (i = 0; i < NUM_SLOTS; ++i) | |
7094 | md.slot[i].user_template = -1; | |
7095 | ||
7096 | md.pseudo_hash = hash_new (); | |
7097 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7098 | { | |
7099 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7100 | (void *) (pseudo_opcode + i)); | |
7101 | if (err) | |
7102 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
7103 | pseudo_opcode[i].name, err); | |
7104 | } | |
7105 | ||
7106 | md.reg_hash = hash_new (); | |
7107 | md.dynreg_hash = hash_new (); | |
7108 | md.const_hash = hash_new (); | |
7109 | md.entry_hash = hash_new (); | |
7110 | ||
542d6675 | 7111 | /* general registers: */ |
800eeca4 JW |
7112 | |
7113 | total = 128; | |
7114 | for (i = 0; i < total; ++i) | |
7115 | { | |
7116 | sprintf (name, "r%d", i - REG_GR); | |
7117 | md.regsym[i] = declare_register (name, i); | |
7118 | } | |
7119 | ||
542d6675 | 7120 | /* floating point registers: */ |
800eeca4 JW |
7121 | total += 128; |
7122 | for (; i < total; ++i) | |
7123 | { | |
7124 | sprintf (name, "f%d", i - REG_FR); | |
7125 | md.regsym[i] = declare_register (name, i); | |
7126 | } | |
7127 | ||
542d6675 | 7128 | /* application registers: */ |
800eeca4 JW |
7129 | total += 128; |
7130 | ar_base = i; | |
7131 | for (; i < total; ++i) | |
7132 | { | |
7133 | sprintf (name, "ar%d", i - REG_AR); | |
7134 | md.regsym[i] = declare_register (name, i); | |
7135 | } | |
7136 | ||
542d6675 | 7137 | /* control registers: */ |
800eeca4 JW |
7138 | total += 128; |
7139 | cr_base = i; | |
7140 | for (; i < total; ++i) | |
7141 | { | |
7142 | sprintf (name, "cr%d", i - REG_CR); | |
7143 | md.regsym[i] = declare_register (name, i); | |
7144 | } | |
7145 | ||
542d6675 | 7146 | /* predicate registers: */ |
800eeca4 JW |
7147 | total += 64; |
7148 | for (; i < total; ++i) | |
7149 | { | |
7150 | sprintf (name, "p%d", i - REG_P); | |
7151 | md.regsym[i] = declare_register (name, i); | |
7152 | } | |
7153 | ||
542d6675 | 7154 | /* branch registers: */ |
800eeca4 JW |
7155 | total += 8; |
7156 | for (; i < total; ++i) | |
7157 | { | |
7158 | sprintf (name, "b%d", i - REG_BR); | |
7159 | md.regsym[i] = declare_register (name, i); | |
7160 | } | |
7161 | ||
7162 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
7163 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
7164 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
7165 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
7166 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
7167 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
7168 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
7169 | ||
7170 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7171 | { | |
7172 | regnum = indirect_reg[i].regnum; | |
7173 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
7174 | } | |
7175 | ||
542d6675 | 7176 | /* define synonyms for application registers: */ |
800eeca4 JW |
7177 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
7178 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
7179 | REG_AR + ar[i - REG_AR].regnum); | |
7180 | ||
542d6675 | 7181 | /* define synonyms for control registers: */ |
800eeca4 JW |
7182 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
7183 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
7184 | REG_CR + cr[i - REG_CR].regnum); | |
7185 | ||
7186 | declare_register ("gp", REG_GR + 1); | |
7187 | declare_register ("sp", REG_GR + 12); | |
7188 | declare_register ("rp", REG_BR + 0); | |
7189 | ||
542d6675 | 7190 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7191 | declare_register ("psp", REG_PSP); |
7192 | ||
800eeca4 JW |
7193 | declare_register_set ("ret", 4, REG_GR + 8); |
7194 | declare_register_set ("farg", 8, REG_FR + 8); | |
7195 | declare_register_set ("fret", 8, REG_FR + 8); | |
7196 | ||
7197 | for (i = 0; i < NELEMS (const_bits); ++i) | |
7198 | { | |
7199 | err = hash_insert (md.const_hash, const_bits[i].name, | |
7200 | (PTR) (const_bits + i)); | |
7201 | if (err) | |
7202 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
7203 | name, err); | |
7204 | } | |
7205 | ||
44f5c83a JW |
7206 | /* Set the architecture and machine depending on defaults and command line |
7207 | options. */ | |
7208 | if (md.flags & EF_IA_64_ABI64) | |
7209 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7210 | else | |
7211 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7212 | ||
7213 | if (! ok) | |
7214 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7215 | |
557debba JW |
7216 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7217 | ||
7218 | if (md.flags & EF_IA_64_ABI64) | |
7219 | { | |
7220 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7221 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7222 | } | |
7223 | else | |
7224 | { | |
7225 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7226 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7227 | } | |
7228 | ||
800eeca4 JW |
7229 | md.mem_offset.hint = 0; |
7230 | md.path = 0; | |
7231 | md.maxpaths = 0; | |
7232 | md.entry_labels = NULL; | |
7233 | } | |
7234 | ||
970d6792 L |
7235 | /* Set the default options in md. Cannot do this in md_begin because |
7236 | that is called after md_parse_option which is where we set the | |
7237 | options in md based on command line options. */ | |
44f5c83a JW |
7238 | |
7239 | void | |
7240 | ia64_init (argc, argv) | |
2434f565 JW |
7241 | int argc ATTRIBUTE_UNUSED; |
7242 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7243 | { |
1cd8ff38 | 7244 | md.flags = MD_FLAGS_DEFAULT; |
f1dab70d | 7245 | md.detect_dv = 1; |
970d6792 L |
7246 | /* FIXME: We should change it to unwind_check_error someday. */ |
7247 | md.unwind_check = unwind_check_warning; | |
44f5c83a JW |
7248 | } |
7249 | ||
7250 | /* Return a string for the target object file format. */ | |
7251 | ||
7252 | const char * | |
7253 | ia64_target_format () | |
7254 | { | |
7255 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7256 | { | |
72a76794 JW |
7257 | if (md.flags & EF_IA_64_BE) |
7258 | { | |
7259 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7260 | #if defined(TE_AIX50) |
7463c317 | 7261 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7262 | #elif defined(TE_HPUX) |
7263 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7264 | #else |
72a76794 | 7265 | return "elf64-ia64-big"; |
7463c317 | 7266 | #endif |
72a76794 | 7267 | else |
1cd8ff38 | 7268 | #if defined(TE_AIX50) |
7463c317 | 7269 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7270 | #elif defined(TE_HPUX) |
7271 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7272 | #else |
72a76794 | 7273 | return "elf32-ia64-big"; |
7463c317 | 7274 | #endif |
72a76794 | 7275 | } |
44f5c83a | 7276 | else |
72a76794 JW |
7277 | { |
7278 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7279 | #ifdef TE_AIX50 |
7280 | return "elf64-ia64-aix-little"; | |
7281 | #else | |
72a76794 | 7282 | return "elf64-ia64-little"; |
7463c317 | 7283 | #endif |
72a76794 | 7284 | else |
7463c317 TW |
7285 | #ifdef TE_AIX50 |
7286 | return "elf32-ia64-aix-little"; | |
7287 | #else | |
72a76794 | 7288 | return "elf32-ia64-little"; |
7463c317 | 7289 | #endif |
72a76794 | 7290 | } |
44f5c83a JW |
7291 | } |
7292 | else | |
7293 | return "unknown-format"; | |
7294 | } | |
7295 | ||
800eeca4 JW |
7296 | void |
7297 | ia64_end_of_source () | |
7298 | { | |
542d6675 | 7299 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7300 | insn_group_break (1, 0, 0); |
7301 | ||
542d6675 | 7302 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7303 | ia64_flush_insns (); |
7304 | ||
7305 | bfd_set_private_flags (stdoutput, md.flags); | |
7306 | ||
800eeca4 JW |
7307 | md.mem_offset.hint = 0; |
7308 | } | |
7309 | ||
7310 | void | |
7311 | ia64_start_line () | |
7312 | { | |
f1bcba5b JW |
7313 | if (md.qp.X_op == O_register) |
7314 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7315 | md.qp.X_op = O_absent; |
7316 | ||
7317 | if (ignore_input ()) | |
7318 | return; | |
7319 | ||
7320 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7321 | { | |
7322 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7323 | { |
7324 | static int warned; | |
7325 | ||
7326 | if (!warned) | |
7327 | { | |
7328 | warned = 1; | |
7329 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7330 | } | |
7331 | } | |
800eeca4 | 7332 | else |
542d6675 | 7333 | insn_group_break (1, 0, 0); |
800eeca4 JW |
7334 | } |
7335 | } | |
7336 | ||
f1bcba5b JW |
7337 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7338 | labels. */ | |
7339 | static int defining_tag = 0; | |
7340 | ||
800eeca4 JW |
7341 | int |
7342 | ia64_unrecognized_line (ch) | |
7343 | int ch; | |
7344 | { | |
7345 | switch (ch) | |
7346 | { | |
7347 | case '(': | |
7348 | expression (&md.qp); | |
7349 | if (*input_line_pointer++ != ')') | |
7350 | { | |
7351 | as_bad ("Expected ')'"); | |
7352 | return 0; | |
7353 | } | |
7354 | if (md.qp.X_op != O_register) | |
7355 | { | |
7356 | as_bad ("Qualifying predicate expected"); | |
7357 | return 0; | |
7358 | } | |
7359 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7360 | { | |
7361 | as_bad ("Predicate register expected"); | |
7362 | return 0; | |
7363 | } | |
7364 | return 1; | |
7365 | ||
7366 | case '{': | |
7367 | if (md.manual_bundling) | |
7368 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7369 | else | |
7370 | CURR_SLOT.manual_bundling_on = 1; | |
7371 | md.manual_bundling = 1; | |
7372 | ||
542d6675 KH |
7373 | /* Bundling is only acceptable in explicit mode |
7374 | or when in default automatic mode. */ | |
800eeca4 | 7375 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7376 | { |
7377 | if (!md.mode_explicitly_set | |
7378 | && !md.default_explicit_mode) | |
7379 | dot_dv_mode ('E'); | |
7380 | else | |
7381 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7382 | } | |
800eeca4 JW |
7383 | return 1; |
7384 | ||
7385 | case '}': | |
7386 | if (!md.manual_bundling) | |
7387 | as_warn ("Found '}' when manual bundling is off"); | |
7388 | else | |
7389 | PREV_SLOT.manual_bundling_off = 1; | |
7390 | md.manual_bundling = 0; | |
7391 | ||
7392 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7393 | if (md.detect_dv |
542d6675 KH |
7394 | && md.explicit_mode |
7395 | && !md.mode_explicitly_set | |
7396 | && !md.default_explicit_mode) | |
7397 | dot_dv_mode ('A'); | |
800eeca4 JW |
7398 | |
7399 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7400 | happens automatically because ';' is an end of line marker. */ | |
7401 | SKIP_WHITESPACE (); | |
7402 | if (input_line_pointer[0] == '{') | |
7403 | { | |
7404 | input_line_pointer++; | |
7405 | return ia64_unrecognized_line ('{'); | |
7406 | } | |
7407 | ||
7408 | demand_empty_rest_of_line (); | |
7409 | return 1; | |
7410 | ||
f1bcba5b JW |
7411 | case '[': |
7412 | { | |
7413 | char *s; | |
7414 | char c; | |
7415 | symbolS *tag; | |
4d5a53ff | 7416 | int temp; |
f1bcba5b JW |
7417 | |
7418 | if (md.qp.X_op == O_register) | |
7419 | { | |
7420 | as_bad ("Tag must come before qualifying predicate."); | |
7421 | return 0; | |
7422 | } | |
4d5a53ff JW |
7423 | |
7424 | /* This implements just enough of read_a_source_file in read.c to | |
7425 | recognize labels. */ | |
7426 | if (is_name_beginner (*input_line_pointer)) | |
7427 | { | |
7428 | s = input_line_pointer; | |
7429 | c = get_symbol_end (); | |
7430 | } | |
7431 | else if (LOCAL_LABELS_FB | |
3882b010 | 7432 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7433 | { |
7434 | temp = 0; | |
3882b010 | 7435 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7436 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7437 | fb_label_instance_inc (temp); | |
7438 | s = fb_label_name (temp, 0); | |
7439 | c = *input_line_pointer; | |
7440 | } | |
7441 | else | |
7442 | { | |
7443 | s = NULL; | |
7444 | c = '\0'; | |
7445 | } | |
f1bcba5b JW |
7446 | if (c != ':') |
7447 | { | |
7448 | /* Put ':' back for error messages' sake. */ | |
7449 | *input_line_pointer++ = ':'; | |
7450 | as_bad ("Expected ':'"); | |
7451 | return 0; | |
7452 | } | |
4d5a53ff | 7453 | |
f1bcba5b JW |
7454 | defining_tag = 1; |
7455 | tag = colon (s); | |
7456 | defining_tag = 0; | |
7457 | /* Put ':' back for error messages' sake. */ | |
7458 | *input_line_pointer++ = ':'; | |
7459 | if (*input_line_pointer++ != ']') | |
7460 | { | |
7461 | as_bad ("Expected ']'"); | |
7462 | return 0; | |
7463 | } | |
7464 | if (! tag) | |
7465 | { | |
7466 | as_bad ("Tag name expected"); | |
7467 | return 0; | |
7468 | } | |
7469 | return 1; | |
7470 | } | |
7471 | ||
800eeca4 JW |
7472 | default: |
7473 | break; | |
7474 | } | |
542d6675 KH |
7475 | |
7476 | /* Not a valid line. */ | |
7477 | return 0; | |
800eeca4 JW |
7478 | } |
7479 | ||
7480 | void | |
7481 | ia64_frob_label (sym) | |
7482 | struct symbol *sym; | |
7483 | { | |
7484 | struct label_fix *fix; | |
7485 | ||
f1bcba5b JW |
7486 | /* Tags need special handling since they are not bundle breaks like |
7487 | labels. */ | |
7488 | if (defining_tag) | |
7489 | { | |
7490 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7491 | fix->sym = sym; | |
7492 | fix->next = CURR_SLOT.tag_fixups; | |
7493 | CURR_SLOT.tag_fixups = fix; | |
7494 | ||
7495 | return; | |
7496 | } | |
7497 | ||
800eeca4 JW |
7498 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7499 | { | |
7500 | md.last_text_seg = now_seg; | |
7501 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7502 | fix->sym = sym; | |
7503 | fix->next = CURR_SLOT.label_fixups; | |
7504 | CURR_SLOT.label_fixups = fix; | |
7505 | ||
542d6675 | 7506 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7507 | if (md.path == md.maxpaths) |
542d6675 KH |
7508 | { |
7509 | md.maxpaths += 20; | |
7510 | md.entry_labels = (const char **) | |
7511 | xrealloc ((void *) md.entry_labels, | |
7512 | md.maxpaths * sizeof (char *)); | |
7513 | } | |
800eeca4 JW |
7514 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7515 | } | |
7516 | } | |
7517 | ||
936cf02e JW |
7518 | #ifdef TE_HPUX |
7519 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7520 | that are declared but unused. This routine removes declared, | |
7521 | unused symbols from an object. */ | |
7522 | int | |
7523 | ia64_frob_symbol (sym) | |
7524 | struct symbol *sym; | |
7525 | { | |
7526 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7527 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7528 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7529 | && ! S_IS_EXTERNAL (sym))) | |
7530 | return 1; | |
7531 | return 0; | |
7532 | } | |
7533 | #endif | |
7534 | ||
800eeca4 JW |
7535 | void |
7536 | ia64_flush_pending_output () | |
7537 | { | |
4d5a53ff JW |
7538 | if (!md.keep_pending_output |
7539 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7540 | { |
7541 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7542 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7543 | insn_group_break (1, 0, 0); | |
7544 | ia64_flush_insns (); | |
7545 | } | |
7546 | } | |
7547 | ||
7548 | /* Do ia64-specific expression optimization. All that's done here is | |
7549 | to transform index expressions that are either due to the indexing | |
7550 | of rotating registers or due to the indexing of indirect register | |
7551 | sets. */ | |
7552 | int | |
7553 | ia64_optimize_expr (l, op, r) | |
7554 | expressionS *l; | |
7555 | operatorT op; | |
7556 | expressionS *r; | |
7557 | { | |
7558 | unsigned num_regs; | |
7559 | ||
7560 | if (op == O_index) | |
7561 | { | |
7562 | if (l->X_op == O_register && r->X_op == O_constant) | |
7563 | { | |
7564 | num_regs = (l->X_add_number >> 16); | |
7565 | if ((unsigned) r->X_add_number >= num_regs) | |
7566 | { | |
7567 | if (!num_regs) | |
7568 | as_bad ("No current frame"); | |
7569 | else | |
7570 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7571 | r->X_add_number = 0; | |
7572 | } | |
7573 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7574 | return 1; | |
7575 | } | |
7576 | else if (l->X_op == O_register && r->X_op == O_register) | |
7577 | { | |
7578 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7579 | || l->X_add_number == IND_MEM) | |
7580 | { | |
7581 | as_bad ("Indirect register set name expected"); | |
7582 | l->X_add_number = IND_CPUID; | |
7583 | } | |
7584 | l->X_op = O_index; | |
7585 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7586 | l->X_add_number = r->X_add_number; | |
7587 | return 1; | |
7588 | } | |
7589 | } | |
7590 | return 0; | |
7591 | } | |
7592 | ||
7593 | int | |
16a48f83 | 7594 | ia64_parse_name (name, e, nextcharP) |
800eeca4 JW |
7595 | char *name; |
7596 | expressionS *e; | |
16a48f83 | 7597 | char *nextcharP; |
800eeca4 JW |
7598 | { |
7599 | struct const_desc *cdesc; | |
7600 | struct dynreg *dr = 0; | |
7601 | unsigned int regnum; | |
16a48f83 | 7602 | unsigned int idx; |
800eeca4 JW |
7603 | struct symbol *sym; |
7604 | char *end; | |
7605 | ||
16a48f83 JB |
7606 | if (*name == '@') |
7607 | { | |
7608 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7609 | ||
7610 | /* Find what relocation pseudo-function we're dealing with. */ | |
7611 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7612 | if (pseudo_func[idx].name | |
7613 | && pseudo_func[idx].name[0] == name[1] | |
7614 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7615 | { | |
7616 | pseudo_type = pseudo_func[idx].type; | |
7617 | break; | |
7618 | } | |
7619 | switch (pseudo_type) | |
7620 | { | |
7621 | case PSEUDO_FUNC_RELOC: | |
7622 | end = input_line_pointer; | |
7623 | if (*nextcharP != '(') | |
7624 | { | |
7625 | as_bad ("Expected '('"); | |
2f6d622e | 7626 | break; |
16a48f83 JB |
7627 | } |
7628 | /* Skip '('. */ | |
7629 | ++input_line_pointer; | |
7630 | expression (e); | |
7631 | if (*input_line_pointer != ')') | |
7632 | { | |
7633 | as_bad ("Missing ')'"); | |
7634 | goto done; | |
7635 | } | |
7636 | /* Skip ')'. */ | |
7637 | ++input_line_pointer; | |
7638 | if (e->X_op != O_symbol) | |
7639 | { | |
7640 | if (e->X_op != O_pseudo_fixup) | |
7641 | { | |
7642 | as_bad ("Not a symbolic expression"); | |
7643 | goto done; | |
7644 | } | |
7645 | if (idx != FUNC_LT_RELATIVE) | |
7646 | { | |
7647 | as_bad ("Illegal combination of relocation functions"); | |
7648 | goto done; | |
7649 | } | |
7650 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7651 | { | |
7652 | case FUNC_FPTR_RELATIVE: | |
7653 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7654 | case FUNC_DTP_MODULE: | |
7655 | idx = FUNC_LT_DTP_MODULE; break; | |
7656 | case FUNC_DTP_RELATIVE: | |
7657 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7658 | case FUNC_TP_RELATIVE: | |
7659 | idx = FUNC_LT_TP_RELATIVE; break; | |
7660 | default: | |
7661 | as_bad ("Illegal combination of relocation functions"); | |
7662 | goto done; | |
7663 | } | |
7664 | } | |
7665 | /* Make sure gas doesn't get rid of local symbols that are used | |
7666 | in relocs. */ | |
7667 | e->X_op = O_pseudo_fixup; | |
7668 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7669 | done: |
7670 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7671 | break; |
7672 | ||
7673 | case PSEUDO_FUNC_CONST: | |
7674 | e->X_op = O_constant; | |
7675 | e->X_add_number = pseudo_func[idx].u.ival; | |
7676 | break; | |
7677 | ||
7678 | case PSEUDO_FUNC_REG: | |
7679 | e->X_op = O_register; | |
7680 | e->X_add_number = pseudo_func[idx].u.ival; | |
7681 | break; | |
7682 | ||
7683 | default: | |
7684 | return 0; | |
7685 | } | |
16a48f83 JB |
7686 | return 1; |
7687 | } | |
7688 | ||
542d6675 | 7689 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7690 | sym = hash_find (md.reg_hash, name); |
7691 | if (sym) | |
7692 | { | |
7693 | e->X_op = O_register; | |
7694 | e->X_add_number = S_GET_VALUE (sym); | |
7695 | return 1; | |
7696 | } | |
7697 | ||
7698 | cdesc = hash_find (md.const_hash, name); | |
7699 | if (cdesc) | |
7700 | { | |
7701 | e->X_op = O_constant; | |
7702 | e->X_add_number = cdesc->value; | |
7703 | return 1; | |
7704 | } | |
7705 | ||
542d6675 | 7706 | /* check for inN, locN, or outN: */ |
800eeca4 JW |
7707 | switch (name[0]) |
7708 | { | |
7709 | case 'i': | |
3882b010 | 7710 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7711 | { |
7712 | dr = &md.in; | |
7713 | name += 2; | |
7714 | } | |
7715 | break; | |
7716 | ||
7717 | case 'l': | |
3882b010 | 7718 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7719 | { |
7720 | dr = &md.loc; | |
7721 | name += 3; | |
7722 | } | |
7723 | break; | |
7724 | ||
7725 | case 'o': | |
3882b010 | 7726 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7727 | { |
7728 | dr = &md.out; | |
7729 | name += 3; | |
7730 | } | |
7731 | break; | |
7732 | ||
7733 | default: | |
7734 | break; | |
7735 | } | |
7736 | ||
7737 | if (dr) | |
7738 | { | |
542d6675 | 7739 | /* The name is inN, locN, or outN; parse the register number. */ |
800eeca4 JW |
7740 | regnum = strtoul (name, &end, 10); |
7741 | if (end > name && *end == '\0') | |
7742 | { | |
7743 | if ((unsigned) regnum >= dr->num_regs) | |
7744 | { | |
7745 | if (!dr->num_regs) | |
7746 | as_bad ("No current frame"); | |
7747 | else | |
542d6675 KH |
7748 | as_bad ("Register number out of range 0..%u", |
7749 | dr->num_regs - 1); | |
800eeca4 JW |
7750 | regnum = 0; |
7751 | } | |
7752 | e->X_op = O_register; | |
7753 | e->X_add_number = dr->base + regnum; | |
7754 | return 1; | |
7755 | } | |
7756 | } | |
7757 | ||
20b36a95 JB |
7758 | end = alloca (strlen (name) + 1); |
7759 | strcpy (end, name); | |
7760 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
7761 | if ((dr = hash_find (md.dynreg_hash, name))) |
7762 | { | |
7763 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7764 | Store the base register number in the low 16 bits of |
7765 | X_add_number and the size of the register set in the top 16 | |
7766 | bits. */ | |
800eeca4 JW |
7767 | e->X_op = O_register; |
7768 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7769 | return 1; | |
7770 | } | |
7771 | return 0; | |
7772 | } | |
7773 | ||
7774 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7775 | ||
7776 | char * | |
7777 | ia64_canonicalize_symbol_name (name) | |
7778 | char *name; | |
7779 | { | |
20b36a95 JB |
7780 | size_t len = strlen (name), full = len; |
7781 | ||
7782 | while (len > 0 && name[len - 1] == '#') | |
7783 | --len; | |
7784 | if (len <= 0) | |
7785 | { | |
7786 | if (full > 0) | |
7787 | as_bad ("Standalone `#' is illegal"); | |
7788 | else | |
7789 | as_bad ("Zero-length symbol is illegal"); | |
7790 | } | |
7791 | else if (len < full - 1) | |
7792 | as_warn ("Redundant `#' suffix operators"); | |
7793 | name[len] = '\0'; | |
800eeca4 JW |
7794 | return name; |
7795 | } | |
7796 | ||
3e37788f JW |
7797 | /* Return true if idesc is a conditional branch instruction. This excludes |
7798 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7799 | because they always read/write resources regardless of the value of the | |
7800 | qualifying predicate. br.ia must always use p0, and hence is always | |
7801 | taken. Thus this function returns true for branches which can fall | |
7802 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7803 | |
800eeca4 JW |
7804 | static int |
7805 | is_conditional_branch (idesc) | |
542d6675 | 7806 | struct ia64_opcode *idesc; |
800eeca4 | 7807 | { |
1deb8127 | 7808 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7809 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7810 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7811 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7812 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7813 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7814 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7815 | || idesc->name[2] == 'l' | |
7816 | /* br.cond, br.call, br.clr */ | |
7817 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7818 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7819 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7820 | } |
7821 | ||
7822 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7823 | returns zero. */ |
7824 | ||
800eeca4 JW |
7825 | static int |
7826 | is_taken_branch (idesc) | |
542d6675 | 7827 | struct ia64_opcode *idesc; |
800eeca4 JW |
7828 | { |
7829 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7830 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7831 | } |
7832 | ||
7833 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7834 | doubt, returns zero. */ |
7835 | ||
800eeca4 JW |
7836 | static int |
7837 | is_interruption_or_rfi (idesc) | |
542d6675 | 7838 | struct ia64_opcode *idesc; |
800eeca4 JW |
7839 | { |
7840 | if (strcmp (idesc->name, "rfi") == 0) | |
7841 | return 1; | |
7842 | return 0; | |
7843 | } | |
7844 | ||
7845 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7846 | -1 if there is no dependency. */ | |
542d6675 | 7847 | |
800eeca4 JW |
7848 | static int |
7849 | depends_on (depind, idesc) | |
542d6675 KH |
7850 | int depind; |
7851 | struct ia64_opcode *idesc; | |
800eeca4 JW |
7852 | { |
7853 | int i; | |
7854 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7855 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7856 | { |
542d6675 KH |
7857 | if (depind == DEP (dep->chks[i])) |
7858 | return i; | |
800eeca4 JW |
7859 | } |
7860 | return -1; | |
7861 | } | |
7862 | ||
7863 | /* Determine a set of specific resources used for a particular resource | |
7864 | class. Returns the number of specific resources identified For those | |
7865 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7866 | marked nonspecific. |
800eeca4 JW |
7867 | |
7868 | Meanings of value in 'NOTE': | |
7869 | 1) only read/write when the register number is explicitly encoded in the | |
7870 | insn. | |
7871 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 7872 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
7873 | 3) general register value is used to specify an indirect register; not |
7874 | determinable statically. | |
7875 | 4) only read the given resource when bits 7:0 of the indirect index | |
7876 | register value does not match the register number of the resource; not | |
7877 | determinable statically. | |
7878 | 5) all rules are implementation specific. | |
7879 | 6) only when both the index specified by the reader and the index specified | |
7880 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 7881 | statically. |
800eeca4 | 7882 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 7883 | set |
800eeca4 JW |
7884 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
7885 | only read when these insns reference FR2-31 | |
7886 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
7887 | written when these insns write FR32-127 | |
7888 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
7889 | instruction | |
7890 | 11) The target predicates are written independently of PR[qp], but source | |
7891 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
7892 | cannot statically be determined, all source registers are marked used. | |
7893 | 12) This insn only reads the specified predicate register when that | |
7894 | register is the PR[qp]. | |
7895 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 7896 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
7897 | 14) The RSE resource includes the implementation-specific RSE internal |
7898 | state resources. At least one (and possibly more) of these resources are | |
7899 | read by each instruction listed in IC:rse-readers. At least one (and | |
7900 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 7901 | IC:rse-writers. |
800eeca4 | 7902 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 7903 | generate. |
800eeca4 JW |
7904 | |
7905 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
7906 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
7907 | */ |
7908 | ||
7909 | #define MAX_SPECS 256 | |
7910 | #define DV_CHK 1 | |
7911 | #define DV_REG 0 | |
7912 | ||
7913 | static int | |
7914 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
7915 | const struct ia64_dependency *dep; |
7916 | struct ia64_opcode *idesc; | |
7917 | int type; /* is this a DV chk or a DV reg? */ | |
7918 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
7919 | int note; /* resource note for this insn's usage */ | |
7920 | int path; /* which execution path to examine */ | |
800eeca4 JW |
7921 | { |
7922 | int count = 0; | |
7923 | int i; | |
7924 | int rsrc_write = 0; | |
7925 | struct rsrc tmpl; | |
197865e8 | 7926 | |
800eeca4 JW |
7927 | if (dep->mode == IA64_DV_WAW |
7928 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
7929 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
7930 | rsrc_write = 1; | |
7931 | ||
7932 | /* template for any resources we identify */ | |
7933 | tmpl.dependency = dep; | |
7934 | tmpl.note = note; | |
7935 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
7936 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
7937 | tmpl.link_to_qp_branch = 1; | |
7938 | tmpl.mem_offset.hint = 0; | |
7939 | tmpl.specific = 1; | |
7940 | tmpl.index = 0; | |
7484b8e6 | 7941 | tmpl.cmp_type = CMP_NONE; |
800eeca4 JW |
7942 | |
7943 | #define UNHANDLED \ | |
7944 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
7945 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
7946 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
7947 | ||
7948 | /* we don't need to track these */ | |
7949 | if (dep->semantics == IA64_DVS_NONE) | |
7950 | return 0; | |
7951 | ||
7952 | switch (dep->specifier) | |
7953 | { | |
7954 | case IA64_RS_AR_K: | |
7955 | if (note == 1) | |
542d6675 KH |
7956 | { |
7957 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7958 | { | |
7959 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7960 | if (regno >= 0 && regno <= 7) | |
7961 | { | |
7962 | specs[count] = tmpl; | |
7963 | specs[count++].index = regno; | |
7964 | } | |
7965 | } | |
7966 | } | |
800eeca4 | 7967 | else if (note == 0) |
542d6675 KH |
7968 | { |
7969 | for (i = 0; i < 8; i++) | |
7970 | { | |
7971 | specs[count] = tmpl; | |
7972 | specs[count++].index = i; | |
7973 | } | |
7974 | } | |
800eeca4 | 7975 | else |
542d6675 KH |
7976 | { |
7977 | UNHANDLED; | |
7978 | } | |
800eeca4 JW |
7979 | break; |
7980 | ||
7981 | case IA64_RS_AR_UNAT: | |
7982 | /* This is a mov =AR or mov AR= instruction. */ | |
7983 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7984 | { | |
7985 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7986 | if (regno == AR_UNAT) | |
7987 | { | |
7988 | specs[count++] = tmpl; | |
7989 | } | |
7990 | } | |
7991 | else | |
7992 | { | |
7993 | /* This is a spill/fill, or other instruction that modifies the | |
7994 | unat register. */ | |
7995 | ||
7996 | /* Unless we can determine the specific bits used, mark the whole | |
7997 | thing; bits 8:3 of the memory address indicate the bit used in | |
7998 | UNAT. The .mem.offset hint may be used to eliminate a small | |
7999 | subset of conflicts. */ | |
8000 | specs[count] = tmpl; | |
8001 | if (md.mem_offset.hint) | |
8002 | { | |
542d6675 KH |
8003 | if (md.debug_dv) |
8004 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8005 | /* The index isn't actually used, just set it to something | |
8006 | approximating the bit index. */ | |
800eeca4 JW |
8007 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8008 | specs[count].mem_offset.hint = 1; | |
8009 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8010 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8011 | } | |
8012 | else | |
8013 | { | |
8014 | specs[count++].specific = 0; | |
8015 | } | |
8016 | } | |
8017 | break; | |
8018 | ||
8019 | case IA64_RS_AR: | |
8020 | if (note == 1) | |
542d6675 KH |
8021 | { |
8022 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8023 | { | |
8024 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8025 | if ((regno >= 8 && regno <= 15) | |
8026 | || (regno >= 20 && regno <= 23) | |
8027 | || (regno >= 31 && regno <= 39) | |
8028 | || (regno >= 41 && regno <= 47) | |
8029 | || (regno >= 67 && regno <= 111)) | |
8030 | { | |
8031 | specs[count] = tmpl; | |
8032 | specs[count++].index = regno; | |
8033 | } | |
8034 | } | |
8035 | } | |
800eeca4 | 8036 | else |
542d6675 KH |
8037 | { |
8038 | UNHANDLED; | |
8039 | } | |
800eeca4 JW |
8040 | break; |
8041 | ||
8042 | case IA64_RS_ARb: | |
8043 | if (note == 1) | |
542d6675 KH |
8044 | { |
8045 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8046 | { | |
8047 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8048 | if ((regno >= 48 && regno <= 63) | |
8049 | || (regno >= 112 && regno <= 127)) | |
8050 | { | |
8051 | specs[count] = tmpl; | |
8052 | specs[count++].index = regno; | |
8053 | } | |
8054 | } | |
8055 | } | |
800eeca4 | 8056 | else if (note == 0) |
542d6675 KH |
8057 | { |
8058 | for (i = 48; i < 64; i++) | |
8059 | { | |
8060 | specs[count] = tmpl; | |
8061 | specs[count++].index = i; | |
8062 | } | |
8063 | for (i = 112; i < 128; i++) | |
8064 | { | |
8065 | specs[count] = tmpl; | |
8066 | specs[count++].index = i; | |
8067 | } | |
8068 | } | |
197865e8 | 8069 | else |
542d6675 KH |
8070 | { |
8071 | UNHANDLED; | |
8072 | } | |
800eeca4 JW |
8073 | break; |
8074 | ||
8075 | case IA64_RS_BR: | |
8076 | if (note != 1) | |
542d6675 KH |
8077 | { |
8078 | UNHANDLED; | |
8079 | } | |
800eeca4 | 8080 | else |
542d6675 KH |
8081 | { |
8082 | if (rsrc_write) | |
8083 | { | |
8084 | for (i = 0; i < idesc->num_outputs; i++) | |
8085 | if (idesc->operands[i] == IA64_OPND_B1 | |
8086 | || idesc->operands[i] == IA64_OPND_B2) | |
8087 | { | |
8088 | specs[count] = tmpl; | |
8089 | specs[count++].index = | |
8090 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8091 | } | |
8092 | } | |
8093 | else | |
8094 | { | |
40449e9f | 8095 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8096 | if (idesc->operands[i] == IA64_OPND_B1 |
8097 | || idesc->operands[i] == IA64_OPND_B2) | |
8098 | { | |
8099 | specs[count] = tmpl; | |
8100 | specs[count++].index = | |
8101 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8102 | } | |
8103 | } | |
8104 | } | |
800eeca4 JW |
8105 | break; |
8106 | ||
8107 | case IA64_RS_CPUID: /* four or more registers */ | |
8108 | if (note == 3) | |
542d6675 KH |
8109 | { |
8110 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8111 | { | |
8112 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8113 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8114 | && KNOWN (regno)) | |
8115 | { | |
8116 | specs[count] = tmpl; | |
8117 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8118 | } | |
8119 | else | |
8120 | { | |
8121 | specs[count] = tmpl; | |
8122 | specs[count++].specific = 0; | |
8123 | } | |
8124 | } | |
8125 | } | |
800eeca4 | 8126 | else |
542d6675 KH |
8127 | { |
8128 | UNHANDLED; | |
8129 | } | |
800eeca4 JW |
8130 | break; |
8131 | ||
8132 | case IA64_RS_DBR: /* four or more registers */ | |
8133 | if (note == 3) | |
542d6675 KH |
8134 | { |
8135 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8136 | { | |
8137 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8138 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8139 | && KNOWN (regno)) | |
8140 | { | |
8141 | specs[count] = tmpl; | |
8142 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8143 | } | |
8144 | else | |
8145 | { | |
8146 | specs[count] = tmpl; | |
8147 | specs[count++].specific = 0; | |
8148 | } | |
8149 | } | |
8150 | } | |
800eeca4 | 8151 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8152 | { |
8153 | specs[count] = tmpl; | |
8154 | specs[count++].specific = 0; | |
8155 | } | |
800eeca4 | 8156 | else |
542d6675 KH |
8157 | { |
8158 | UNHANDLED; | |
8159 | } | |
800eeca4 JW |
8160 | break; |
8161 | ||
8162 | case IA64_RS_IBR: /* four or more registers */ | |
8163 | if (note == 3) | |
542d6675 KH |
8164 | { |
8165 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8166 | { | |
8167 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8168 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8169 | && KNOWN (regno)) | |
8170 | { | |
8171 | specs[count] = tmpl; | |
8172 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8173 | } | |
8174 | else | |
8175 | { | |
8176 | specs[count] = tmpl; | |
8177 | specs[count++].specific = 0; | |
8178 | } | |
8179 | } | |
8180 | } | |
800eeca4 | 8181 | else |
542d6675 KH |
8182 | { |
8183 | UNHANDLED; | |
8184 | } | |
800eeca4 JW |
8185 | break; |
8186 | ||
8187 | case IA64_RS_MSR: | |
8188 | if (note == 5) | |
8189 | { | |
8190 | /* These are implementation specific. Force all references to | |
8191 | conflict with all other references. */ | |
8192 | specs[count] = tmpl; | |
8193 | specs[count++].specific = 0; | |
8194 | } | |
8195 | else | |
8196 | { | |
8197 | UNHANDLED; | |
8198 | } | |
8199 | break; | |
8200 | ||
8201 | case IA64_RS_PKR: /* 16 or more registers */ | |
8202 | if (note == 3 || note == 4) | |
542d6675 KH |
8203 | { |
8204 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8205 | { | |
8206 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8207 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8208 | && KNOWN (regno)) | |
8209 | { | |
8210 | if (note == 3) | |
8211 | { | |
8212 | specs[count] = tmpl; | |
8213 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8214 | } | |
8215 | else | |
8216 | for (i = 0; i < NELEMS (gr_values); i++) | |
8217 | { | |
8218 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8219 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8220 | { |
8221 | specs[count] = tmpl; | |
8222 | specs[count++].index = i; | |
8223 | } | |
8224 | } | |
8225 | } | |
8226 | else | |
8227 | { | |
8228 | specs[count] = tmpl; | |
8229 | specs[count++].specific = 0; | |
8230 | } | |
8231 | } | |
8232 | } | |
8233 | else if (note == 0) | |
8234 | { | |
8235 | /* probe et al. */ | |
8236 | specs[count] = tmpl; | |
8237 | specs[count++].specific = 0; | |
8238 | } | |
8239 | break; | |
8240 | ||
8241 | case IA64_RS_PMC: /* four or more registers */ | |
8242 | if (note == 3) | |
8243 | { | |
8244 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8245 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8246 | ||
8247 | { | |
8248 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8249 | ? 1 : !rsrc_write); | |
8250 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8251 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8252 | && KNOWN (regno)) | |
8253 | { | |
8254 | specs[count] = tmpl; | |
8255 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8256 | } | |
8257 | else | |
8258 | { | |
8259 | specs[count] = tmpl; | |
8260 | specs[count++].specific = 0; | |
8261 | } | |
8262 | } | |
8263 | } | |
8264 | else | |
8265 | { | |
8266 | UNHANDLED; | |
8267 | } | |
800eeca4 JW |
8268 | break; |
8269 | ||
8270 | case IA64_RS_PMD: /* four or more registers */ | |
8271 | if (note == 3) | |
542d6675 KH |
8272 | { |
8273 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8274 | { | |
8275 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8276 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8277 | && KNOWN (regno)) | |
8278 | { | |
8279 | specs[count] = tmpl; | |
8280 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8281 | } | |
8282 | else | |
8283 | { | |
8284 | specs[count] = tmpl; | |
8285 | specs[count++].specific = 0; | |
8286 | } | |
8287 | } | |
8288 | } | |
800eeca4 | 8289 | else |
542d6675 KH |
8290 | { |
8291 | UNHANDLED; | |
8292 | } | |
800eeca4 JW |
8293 | break; |
8294 | ||
8295 | case IA64_RS_RR: /* eight registers */ | |
8296 | if (note == 6) | |
542d6675 KH |
8297 | { |
8298 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8299 | { | |
8300 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8301 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8302 | && KNOWN (regno)) | |
8303 | { | |
8304 | specs[count] = tmpl; | |
8305 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8306 | } | |
8307 | else | |
8308 | { | |
8309 | specs[count] = tmpl; | |
8310 | specs[count++].specific = 0; | |
8311 | } | |
8312 | } | |
8313 | } | |
800eeca4 | 8314 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8315 | { |
8316 | specs[count] = tmpl; | |
8317 | specs[count++].specific = 0; | |
8318 | } | |
197865e8 | 8319 | else |
542d6675 KH |
8320 | { |
8321 | UNHANDLED; | |
8322 | } | |
800eeca4 JW |
8323 | break; |
8324 | ||
8325 | case IA64_RS_CR_IRR: | |
197865e8 | 8326 | if (note == 0) |
542d6675 KH |
8327 | { |
8328 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8329 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8330 | if (rsrc_write | |
8331 | && idesc->operands[1] == IA64_OPND_CR3 | |
8332 | && regno == CR_IVR) | |
8333 | { | |
8334 | for (i = 0; i < 4; i++) | |
8335 | { | |
8336 | specs[count] = tmpl; | |
8337 | specs[count++].index = CR_IRR0 + i; | |
8338 | } | |
8339 | } | |
8340 | } | |
800eeca4 | 8341 | else if (note == 1) |
542d6675 KH |
8342 | { |
8343 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8344 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8345 | && regno >= CR_IRR0 | |
8346 | && regno <= CR_IRR3) | |
8347 | { | |
8348 | specs[count] = tmpl; | |
8349 | specs[count++].index = regno; | |
8350 | } | |
8351 | } | |
800eeca4 | 8352 | else |
542d6675 KH |
8353 | { |
8354 | UNHANDLED; | |
8355 | } | |
800eeca4 JW |
8356 | break; |
8357 | ||
8358 | case IA64_RS_CR_LRR: | |
8359 | if (note != 1) | |
542d6675 KH |
8360 | { |
8361 | UNHANDLED; | |
8362 | } | |
197865e8 | 8363 | else |
542d6675 KH |
8364 | { |
8365 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8366 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8367 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8368 | { | |
8369 | specs[count] = tmpl; | |
8370 | specs[count++].index = regno; | |
8371 | } | |
8372 | } | |
800eeca4 JW |
8373 | break; |
8374 | ||
8375 | case IA64_RS_CR: | |
8376 | if (note == 1) | |
542d6675 KH |
8377 | { |
8378 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8379 | { | |
8380 | specs[count] = tmpl; | |
8381 | specs[count++].index = | |
8382 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8383 | } | |
8384 | } | |
800eeca4 | 8385 | else |
542d6675 KH |
8386 | { |
8387 | UNHANDLED; | |
8388 | } | |
800eeca4 JW |
8389 | break; |
8390 | ||
8391 | case IA64_RS_FR: | |
8392 | case IA64_RS_FRb: | |
8393 | if (note != 1) | |
542d6675 KH |
8394 | { |
8395 | UNHANDLED; | |
8396 | } | |
800eeca4 | 8397 | else if (rsrc_write) |
542d6675 KH |
8398 | { |
8399 | if (dep->specifier == IA64_RS_FRb | |
8400 | && idesc->operands[0] == IA64_OPND_F1) | |
8401 | { | |
8402 | specs[count] = tmpl; | |
8403 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8404 | } | |
8405 | } | |
800eeca4 | 8406 | else |
542d6675 KH |
8407 | { |
8408 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8409 | { | |
8410 | if (idesc->operands[i] == IA64_OPND_F2 | |
8411 | || idesc->operands[i] == IA64_OPND_F3 | |
8412 | || idesc->operands[i] == IA64_OPND_F4) | |
8413 | { | |
8414 | specs[count] = tmpl; | |
8415 | specs[count++].index = | |
8416 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8417 | } | |
8418 | } | |
8419 | } | |
800eeca4 JW |
8420 | break; |
8421 | ||
8422 | case IA64_RS_GR: | |
8423 | if (note == 13) | |
542d6675 KH |
8424 | { |
8425 | /* This reference applies only to the GR whose value is loaded with | |
8426 | data returned from memory. */ | |
8427 | specs[count] = tmpl; | |
8428 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8429 | } | |
800eeca4 | 8430 | else if (note == 1) |
542d6675 KH |
8431 | { |
8432 | if (rsrc_write) | |
8433 | { | |
8434 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8435 | if (idesc->operands[i] == IA64_OPND_R1 |
8436 | || idesc->operands[i] == IA64_OPND_R2 | |
8437 | || idesc->operands[i] == IA64_OPND_R3) | |
8438 | { | |
8439 | specs[count] = tmpl; | |
197865e8 | 8440 | specs[count++].index = |
50b81f19 JW |
8441 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8442 | } | |
8443 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8444 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8445 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8446 | { | |
8447 | specs[count] = tmpl; | |
8448 | specs[count++].index = | |
8449 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8450 | } | |
542d6675 KH |
8451 | } |
8452 | else | |
8453 | { | |
8454 | /* Look for anything that reads a GR. */ | |
8455 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8456 | { | |
8457 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8458 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8459 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8460 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8461 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8462 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8463 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8464 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8465 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8466 | || ((i >= idesc->num_outputs) | |
8467 | && (idesc->operands[i] == IA64_OPND_R1 | |
8468 | || idesc->operands[i] == IA64_OPND_R2 | |
8469 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8470 | /* addl source register. */ |
8471 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8472 | { |
8473 | specs[count] = tmpl; | |
8474 | specs[count++].index = | |
8475 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8476 | } | |
8477 | } | |
8478 | } | |
8479 | } | |
197865e8 | 8480 | else |
542d6675 KH |
8481 | { |
8482 | UNHANDLED; | |
8483 | } | |
800eeca4 JW |
8484 | break; |
8485 | ||
139368c9 JW |
8486 | /* This is the same as IA64_RS_PRr, except that the register range is |
8487 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8488 | case IA64_RS_PR: |
8489 | if (note == 0) | |
542d6675 | 8490 | { |
139368c9 | 8491 | for (i = 1; i < 16; i++) |
542d6675 | 8492 | { |
139368c9 JW |
8493 | specs[count] = tmpl; |
8494 | specs[count++].index = i; | |
8495 | } | |
8496 | } | |
8497 | else if (note == 7) | |
8498 | { | |
8499 | valueT mask = 0; | |
8500 | /* Mark only those registers indicated by the mask. */ | |
8501 | if (rsrc_write) | |
8502 | { | |
8503 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8504 | for (i = 1; i < 16; i++) | |
8505 | if (mask & ((valueT) 1 << i)) | |
8506 | { | |
8507 | specs[count] = tmpl; | |
8508 | specs[count++].index = i; | |
8509 | } | |
8510 | } | |
8511 | else | |
8512 | { | |
8513 | UNHANDLED; | |
8514 | } | |
8515 | } | |
8516 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8517 | { | |
8518 | if (rsrc_write) | |
8519 | { | |
8520 | for (i = 0; i < idesc->num_outputs; i++) | |
8521 | { | |
8522 | if (idesc->operands[i] == IA64_OPND_P1 | |
8523 | || idesc->operands[i] == IA64_OPND_P2) | |
8524 | { | |
8525 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8526 | if (regno >= 1 && regno < 16) | |
8527 | { | |
8528 | specs[count] = tmpl; | |
8529 | specs[count++].index = regno; | |
8530 | } | |
8531 | } | |
8532 | } | |
8533 | } | |
8534 | else | |
8535 | { | |
8536 | UNHANDLED; | |
8537 | } | |
8538 | } | |
8539 | else if (note == 12) | |
8540 | { | |
8541 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8542 | { | |
8543 | specs[count] = tmpl; | |
8544 | specs[count++].index = CURR_SLOT.qp_regno; | |
8545 | } | |
8546 | } | |
8547 | else if (note == 1) | |
8548 | { | |
8549 | if (rsrc_write) | |
8550 | { | |
8551 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8552 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8553 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8554 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8555 | |
8556 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8557 | || idesc->operands[0] == IA64_OPND_P2) | |
8558 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8559 | { |
8560 | specs[count] = tmpl; | |
139368c9 JW |
8561 | specs[count].cmp_type = |
8562 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8563 | specs[count++].index = p1; | |
8564 | } | |
8565 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8566 | || idesc->operands[1] == IA64_OPND_P2) | |
8567 | && p2 >= 1 && p2 < 16) | |
8568 | { | |
8569 | specs[count] = tmpl; | |
8570 | specs[count].cmp_type = | |
8571 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8572 | specs[count++].index = p2; | |
542d6675 KH |
8573 | } |
8574 | } | |
8575 | else | |
8576 | { | |
139368c9 | 8577 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8578 | { |
8579 | specs[count] = tmpl; | |
139368c9 JW |
8580 | specs[count++].index = CURR_SLOT.qp_regno; |
8581 | } | |
8582 | if (idesc->operands[1] == IA64_OPND_PR) | |
8583 | { | |
8584 | for (i = 1; i < 16; i++) | |
8585 | { | |
8586 | specs[count] = tmpl; | |
8587 | specs[count++].index = i; | |
8588 | } | |
542d6675 KH |
8589 | } |
8590 | } | |
8591 | } | |
139368c9 JW |
8592 | else |
8593 | { | |
8594 | UNHANDLED; | |
8595 | } | |
8596 | break; | |
8597 | ||
8598 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8599 | simplified cases of this. */ | |
8600 | case IA64_RS_PRr: | |
8601 | if (note == 0) | |
8602 | { | |
8603 | for (i = 16; i < 63; i++) | |
8604 | { | |
8605 | specs[count] = tmpl; | |
8606 | specs[count++].index = i; | |
8607 | } | |
8608 | } | |
800eeca4 | 8609 | else if (note == 7) |
542d6675 KH |
8610 | { |
8611 | valueT mask = 0; | |
8612 | /* Mark only those registers indicated by the mask. */ | |
8613 | if (rsrc_write | |
8614 | && idesc->operands[0] == IA64_OPND_PR) | |
8615 | { | |
8616 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8617 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8618 | for (i = 16; i < 63; i++) |
8619 | { | |
8620 | specs[count] = tmpl; | |
8621 | specs[count++].index = i; | |
8622 | } | |
542d6675 KH |
8623 | } |
8624 | else if (rsrc_write | |
8625 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8626 | { | |
8627 | for (i = 16; i < 63; i++) | |
8628 | { | |
8629 | specs[count] = tmpl; | |
8630 | specs[count++].index = i; | |
8631 | } | |
8632 | } | |
8633 | else | |
8634 | { | |
8635 | UNHANDLED; | |
8636 | } | |
8637 | } | |
800eeca4 | 8638 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8639 | { |
8640 | if (rsrc_write) | |
8641 | { | |
8642 | for (i = 0; i < idesc->num_outputs; i++) | |
8643 | { | |
8644 | if (idesc->operands[i] == IA64_OPND_P1 | |
8645 | || idesc->operands[i] == IA64_OPND_P2) | |
8646 | { | |
8647 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8648 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8649 | { |
8650 | specs[count] = tmpl; | |
8651 | specs[count++].index = regno; | |
8652 | } | |
8653 | } | |
8654 | } | |
8655 | } | |
8656 | else | |
8657 | { | |
8658 | UNHANDLED; | |
8659 | } | |
8660 | } | |
800eeca4 | 8661 | else if (note == 12) |
542d6675 | 8662 | { |
139368c9 | 8663 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8664 | { |
8665 | specs[count] = tmpl; | |
8666 | specs[count++].index = CURR_SLOT.qp_regno; | |
8667 | } | |
8668 | } | |
800eeca4 | 8669 | else if (note == 1) |
542d6675 KH |
8670 | { |
8671 | if (rsrc_write) | |
8672 | { | |
8673 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8674 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8675 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8676 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8677 | |
542d6675 KH |
8678 | if ((idesc->operands[0] == IA64_OPND_P1 |
8679 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8680 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8681 | { |
8682 | specs[count] = tmpl; | |
4a4f25cf | 8683 | specs[count].cmp_type = |
7484b8e6 | 8684 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8685 | specs[count++].index = p1; |
8686 | } | |
8687 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8688 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8689 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8690 | { |
8691 | specs[count] = tmpl; | |
4a4f25cf | 8692 | specs[count].cmp_type = |
7484b8e6 | 8693 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8694 | specs[count++].index = p2; |
8695 | } | |
8696 | } | |
8697 | else | |
8698 | { | |
139368c9 | 8699 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8700 | { |
8701 | specs[count] = tmpl; | |
8702 | specs[count++].index = CURR_SLOT.qp_regno; | |
8703 | } | |
8704 | if (idesc->operands[1] == IA64_OPND_PR) | |
8705 | { | |
139368c9 | 8706 | for (i = 16; i < 63; i++) |
542d6675 KH |
8707 | { |
8708 | specs[count] = tmpl; | |
8709 | specs[count++].index = i; | |
8710 | } | |
8711 | } | |
8712 | } | |
8713 | } | |
197865e8 | 8714 | else |
542d6675 KH |
8715 | { |
8716 | UNHANDLED; | |
8717 | } | |
800eeca4 JW |
8718 | break; |
8719 | ||
8720 | case IA64_RS_PSR: | |
197865e8 | 8721 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8722 | dep->regindex. */ |
800eeca4 | 8723 | if (note == 0) |
542d6675 KH |
8724 | { |
8725 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8726 | { | |
8727 | if (dep->regindex < 6) | |
8728 | { | |
8729 | specs[count++] = tmpl; | |
8730 | } | |
8731 | } | |
8732 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8733 | { | |
8734 | if (dep->regindex < 32 | |
8735 | || dep->regindex == 35 | |
8736 | || dep->regindex == 36 | |
8737 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8738 | { | |
8739 | specs[count++] = tmpl; | |
8740 | } | |
8741 | } | |
8742 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8743 | { | |
8744 | if (dep->regindex < 32 | |
8745 | || dep->regindex == 35 | |
8746 | || dep->regindex == 36 | |
8747 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8748 | { | |
8749 | specs[count++] = tmpl; | |
8750 | } | |
8751 | } | |
8752 | else | |
8753 | { | |
8754 | /* Several PSR bits have very specific dependencies. */ | |
8755 | switch (dep->regindex) | |
8756 | { | |
8757 | default: | |
8758 | specs[count++] = tmpl; | |
8759 | break; | |
8760 | case PSR_IC: | |
8761 | if (rsrc_write) | |
8762 | { | |
8763 | specs[count++] = tmpl; | |
8764 | } | |
8765 | else | |
8766 | { | |
8767 | /* Only certain CR accesses use PSR.ic */ | |
8768 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8769 | || idesc->operands[1] == IA64_OPND_CR3) | |
8770 | { | |
8771 | int index = | |
8772 | ((idesc->operands[0] == IA64_OPND_CR3) | |
8773 | ? 0 : 1); | |
8774 | int regno = | |
8775 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
8776 | ||
8777 | switch (regno) | |
8778 | { | |
8779 | default: | |
8780 | break; | |
8781 | case CR_ITIR: | |
8782 | case CR_IFS: | |
8783 | case CR_IIM: | |
8784 | case CR_IIP: | |
8785 | case CR_IPSR: | |
8786 | case CR_ISR: | |
8787 | case CR_IFA: | |
8788 | case CR_IHA: | |
8789 | case CR_IIPA: | |
8790 | specs[count++] = tmpl; | |
8791 | break; | |
8792 | } | |
8793 | } | |
8794 | } | |
8795 | break; | |
8796 | case PSR_CPL: | |
8797 | if (rsrc_write) | |
8798 | { | |
8799 | specs[count++] = tmpl; | |
8800 | } | |
8801 | else | |
8802 | { | |
8803 | /* Only some AR accesses use cpl */ | |
8804 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8805 | || idesc->operands[1] == IA64_OPND_AR3) | |
8806 | { | |
8807 | int index = | |
8808 | ((idesc->operands[0] == IA64_OPND_AR3) | |
8809 | ? 0 : 1); | |
8810 | int regno = | |
8811 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
8812 | ||
8813 | if (regno == AR_ITC | |
8814 | || (index == 0 | |
8815 | && (regno == AR_ITC | |
8816 | || regno == AR_RSC | |
8817 | || (regno >= AR_K0 | |
8818 | && regno <= AR_K7)))) | |
8819 | { | |
8820 | specs[count++] = tmpl; | |
8821 | } | |
8822 | } | |
8823 | else | |
8824 | { | |
8825 | specs[count++] = tmpl; | |
8826 | } | |
8827 | break; | |
8828 | } | |
8829 | } | |
8830 | } | |
8831 | } | |
800eeca4 | 8832 | else if (note == 7) |
542d6675 KH |
8833 | { |
8834 | valueT mask = 0; | |
8835 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8836 | { | |
8837 | mask = CURR_SLOT.opnd[0].X_add_number; | |
8838 | } | |
8839 | else | |
8840 | { | |
8841 | UNHANDLED; | |
8842 | } | |
8843 | if (mask & ((valueT) 1 << dep->regindex)) | |
8844 | { | |
8845 | specs[count++] = tmpl; | |
8846 | } | |
8847 | } | |
800eeca4 | 8848 | else if (note == 8) |
542d6675 KH |
8849 | { |
8850 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
8851 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
8852 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
8853 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8854 | { | |
8855 | if (idesc->operands[i] == IA64_OPND_F1 | |
8856 | || idesc->operands[i] == IA64_OPND_F2 | |
8857 | || idesc->operands[i] == IA64_OPND_F3 | |
8858 | || idesc->operands[i] == IA64_OPND_F4) | |
8859 | { | |
8860 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8861 | if (reg >= min && reg <= max) | |
8862 | { | |
8863 | specs[count++] = tmpl; | |
8864 | } | |
8865 | } | |
8866 | } | |
8867 | } | |
800eeca4 | 8868 | else if (note == 9) |
542d6675 KH |
8869 | { |
8870 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
8871 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
8872 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
8873 | FR2-31 */ | |
8874 | for (i = 0; i < idesc->num_outputs; i++) | |
8875 | { | |
8876 | if (idesc->operands[i] == IA64_OPND_F1) | |
8877 | { | |
8878 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8879 | if (reg >= min && reg <= max) | |
8880 | { | |
8881 | specs[count++] = tmpl; | |
8882 | } | |
8883 | } | |
8884 | } | |
8885 | } | |
800eeca4 | 8886 | else if (note == 10) |
542d6675 KH |
8887 | { |
8888 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8889 | { | |
8890 | if (idesc->operands[i] == IA64_OPND_R1 | |
8891 | || idesc->operands[i] == IA64_OPND_R2 | |
8892 | || idesc->operands[i] == IA64_OPND_R3) | |
8893 | { | |
8894 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8895 | if (regno >= 16 && regno <= 31) | |
8896 | { | |
8897 | specs[count++] = tmpl; | |
8898 | } | |
8899 | } | |
8900 | } | |
8901 | } | |
800eeca4 | 8902 | else |
542d6675 KH |
8903 | { |
8904 | UNHANDLED; | |
8905 | } | |
800eeca4 JW |
8906 | break; |
8907 | ||
8908 | case IA64_RS_AR_FPSR: | |
8909 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
8910 | { |
8911 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8912 | if (regno == AR_FPSR) | |
8913 | { | |
8914 | specs[count++] = tmpl; | |
8915 | } | |
8916 | } | |
800eeca4 | 8917 | else |
542d6675 KH |
8918 | { |
8919 | specs[count++] = tmpl; | |
8920 | } | |
800eeca4 JW |
8921 | break; |
8922 | ||
197865e8 | 8923 | case IA64_RS_ARX: |
800eeca4 JW |
8924 | /* Handle all AR[REG] resources */ |
8925 | if (note == 0 || note == 1) | |
542d6675 KH |
8926 | { |
8927 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8928 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
8929 | && regno == dep->regindex) | |
8930 | { | |
8931 | specs[count++] = tmpl; | |
8932 | } | |
8933 | /* other AR[REG] resources may be affected by AR accesses */ | |
8934 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
8935 | { | |
8936 | /* AR[] writes */ | |
8937 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
8938 | switch (dep->regindex) | |
8939 | { | |
8940 | default: | |
8941 | break; | |
8942 | case AR_BSP: | |
8943 | case AR_RNAT: | |
8944 | if (regno == AR_BSPSTORE) | |
8945 | { | |
8946 | specs[count++] = tmpl; | |
8947 | } | |
8948 | case AR_RSC: | |
8949 | if (!rsrc_write && | |
8950 | (regno == AR_BSPSTORE | |
8951 | || regno == AR_RNAT)) | |
8952 | { | |
8953 | specs[count++] = tmpl; | |
8954 | } | |
8955 | break; | |
8956 | } | |
8957 | } | |
8958 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8959 | { | |
8960 | /* AR[] reads */ | |
8961 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
8962 | switch (dep->regindex) | |
8963 | { | |
8964 | default: | |
8965 | break; | |
8966 | case AR_RSC: | |
8967 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
8968 | { | |
8969 | specs[count++] = tmpl; | |
8970 | } | |
8971 | break; | |
8972 | } | |
8973 | } | |
8974 | else | |
8975 | { | |
8976 | specs[count++] = tmpl; | |
8977 | } | |
8978 | } | |
800eeca4 | 8979 | else |
542d6675 KH |
8980 | { |
8981 | UNHANDLED; | |
8982 | } | |
800eeca4 JW |
8983 | break; |
8984 | ||
8985 | case IA64_RS_CRX: | |
8986 | /* Handle all CR[REG] resources */ | |
8987 | if (note == 0 || note == 1) | |
542d6675 KH |
8988 | { |
8989 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8990 | { | |
8991 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8992 | if (regno == dep->regindex) | |
8993 | { | |
8994 | specs[count++] = tmpl; | |
8995 | } | |
8996 | else if (!rsrc_write) | |
8997 | { | |
8998 | /* Reads from CR[IVR] affect other resources. */ | |
8999 | if (regno == CR_IVR) | |
9000 | { | |
9001 | if ((dep->regindex >= CR_IRR0 | |
9002 | && dep->regindex <= CR_IRR3) | |
9003 | || dep->regindex == CR_TPR) | |
9004 | { | |
9005 | specs[count++] = tmpl; | |
9006 | } | |
9007 | } | |
9008 | } | |
9009 | } | |
9010 | else | |
9011 | { | |
9012 | specs[count++] = tmpl; | |
9013 | } | |
9014 | } | |
800eeca4 | 9015 | else |
542d6675 KH |
9016 | { |
9017 | UNHANDLED; | |
9018 | } | |
800eeca4 JW |
9019 | break; |
9020 | ||
9021 | case IA64_RS_INSERVICE: | |
9022 | /* look for write of EOI (67) or read of IVR (65) */ | |
9023 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9024 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9025 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9026 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9027 | { | |
9028 | specs[count++] = tmpl; | |
9029 | } | |
800eeca4 JW |
9030 | break; |
9031 | ||
9032 | case IA64_RS_GR0: | |
9033 | if (note == 1) | |
542d6675 KH |
9034 | { |
9035 | specs[count++] = tmpl; | |
9036 | } | |
800eeca4 | 9037 | else |
542d6675 KH |
9038 | { |
9039 | UNHANDLED; | |
9040 | } | |
800eeca4 JW |
9041 | break; |
9042 | ||
9043 | case IA64_RS_CFM: | |
9044 | if (note != 2) | |
542d6675 KH |
9045 | { |
9046 | specs[count++] = tmpl; | |
9047 | } | |
800eeca4 | 9048 | else |
542d6675 KH |
9049 | { |
9050 | /* Check if any of the registers accessed are in the rotating region. | |
9051 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9052 | region */ | |
9053 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9054 | { | |
9055 | if (idesc->operands[i] == IA64_OPND_R1 | |
9056 | || idesc->operands[i] == IA64_OPND_R2 | |
9057 | || idesc->operands[i] == IA64_OPND_R3) | |
9058 | { | |
9059 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9060 | /* Assumes that md.rot.num_regs is always valid */ | |
9061 | if (md.rot.num_regs > 0 | |
9062 | && num > 31 | |
9063 | && num < 31 + md.rot.num_regs) | |
9064 | { | |
9065 | specs[count] = tmpl; | |
9066 | specs[count++].specific = 0; | |
9067 | } | |
9068 | } | |
9069 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9070 | || idesc->operands[i] == IA64_OPND_F2 | |
9071 | || idesc->operands[i] == IA64_OPND_F3 | |
9072 | || idesc->operands[i] == IA64_OPND_F4) | |
9073 | { | |
9074 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9075 | if (num > 31) | |
9076 | { | |
9077 | specs[count] = tmpl; | |
9078 | specs[count++].specific = 0; | |
9079 | } | |
9080 | } | |
9081 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9082 | || idesc->operands[i] == IA64_OPND_P2) | |
9083 | { | |
9084 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9085 | if (num > 15) | |
9086 | { | |
9087 | specs[count] = tmpl; | |
9088 | specs[count++].specific = 0; | |
9089 | } | |
9090 | } | |
9091 | } | |
9092 | if (CURR_SLOT.qp_regno > 15) | |
9093 | { | |
9094 | specs[count] = tmpl; | |
9095 | specs[count++].specific = 0; | |
9096 | } | |
9097 | } | |
800eeca4 JW |
9098 | break; |
9099 | ||
139368c9 JW |
9100 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9101 | the fact that there is only one register. */ | |
800eeca4 JW |
9102 | case IA64_RS_PR63: |
9103 | if (note == 0) | |
542d6675 KH |
9104 | { |
9105 | specs[count++] = tmpl; | |
9106 | } | |
139368c9 | 9107 | else if (note == 7) |
40449e9f KH |
9108 | { |
9109 | valueT mask = 0; | |
9110 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9111 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9112 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9113 | specs[count++] = tmpl; |
40449e9f | 9114 | } |
800eeca4 | 9115 | else if (note == 11) |
542d6675 KH |
9116 | { |
9117 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9118 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9119 | || (idesc->operands[1] == IA64_OPND_P2 | |
9120 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9121 | { | |
9122 | specs[count++] = tmpl; | |
9123 | } | |
9124 | } | |
800eeca4 | 9125 | else if (note == 12) |
542d6675 KH |
9126 | { |
9127 | if (CURR_SLOT.qp_regno == 63) | |
9128 | { | |
9129 | specs[count++] = tmpl; | |
9130 | } | |
9131 | } | |
800eeca4 | 9132 | else if (note == 1) |
542d6675 KH |
9133 | { |
9134 | if (rsrc_write) | |
9135 | { | |
40449e9f KH |
9136 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9137 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9138 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9139 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9140 | |
4a4f25cf | 9141 | if (p1 == 63 |
7484b8e6 TW |
9142 | && (idesc->operands[0] == IA64_OPND_P1 |
9143 | || idesc->operands[0] == IA64_OPND_P2)) | |
9144 | { | |
40449e9f | 9145 | specs[count] = tmpl; |
4a4f25cf | 9146 | specs[count++].cmp_type = |
7484b8e6 TW |
9147 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9148 | } | |
9149 | if (p2 == 63 | |
9150 | && (idesc->operands[1] == IA64_OPND_P1 | |
9151 | || idesc->operands[1] == IA64_OPND_P2)) | |
9152 | { | |
40449e9f | 9153 | specs[count] = tmpl; |
4a4f25cf | 9154 | specs[count++].cmp_type = |
7484b8e6 TW |
9155 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9156 | } | |
542d6675 KH |
9157 | } |
9158 | else | |
9159 | { | |
9160 | if (CURR_SLOT.qp_regno == 63) | |
9161 | { | |
9162 | specs[count++] = tmpl; | |
9163 | } | |
9164 | } | |
9165 | } | |
800eeca4 | 9166 | else |
542d6675 KH |
9167 | { |
9168 | UNHANDLED; | |
9169 | } | |
800eeca4 JW |
9170 | break; |
9171 | ||
9172 | case IA64_RS_RSE: | |
9173 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9174 | read resources have not yet been completely identified, so for now |
9175 | treat RSE as a single resource */ | |
800eeca4 | 9176 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9177 | { |
9178 | if (rsrc_write) | |
9179 | { | |
9180 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9181 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9182 | { | |
9183 | specs[count] = tmpl; | |
9184 | specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */ | |
9185 | } | |
9186 | } | |
9187 | else | |
9188 | { | |
9189 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9190 | { | |
9191 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9192 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9193 | { | |
9194 | specs[count++] = tmpl; | |
9195 | } | |
9196 | } | |
9197 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9198 | { | |
9199 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9200 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9201 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9202 | { | |
9203 | specs[count++] = tmpl; | |
9204 | } | |
9205 | } | |
9206 | } | |
9207 | } | |
197865e8 | 9208 | else |
542d6675 KH |
9209 | { |
9210 | specs[count++] = tmpl; | |
9211 | } | |
800eeca4 JW |
9212 | break; |
9213 | ||
9214 | case IA64_RS_ANY: | |
9215 | /* FIXME -- do any of these need to be non-specific? */ | |
9216 | specs[count++] = tmpl; | |
9217 | break; | |
9218 | ||
9219 | default: | |
9220 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9221 | break; | |
9222 | } | |
9223 | ||
9224 | return count; | |
9225 | } | |
9226 | ||
9227 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9228 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9229 | ||
800eeca4 JW |
9230 | static void |
9231 | clear_qp_branch_flag (mask) | |
542d6675 | 9232 | valueT mask; |
800eeca4 JW |
9233 | { |
9234 | int i; | |
542d6675 | 9235 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9236 | { |
197865e8 | 9237 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9238 | if ((bit & mask) != 0) |
542d6675 KH |
9239 | { |
9240 | regdeps[i].link_to_qp_branch = 0; | |
9241 | } | |
800eeca4 JW |
9242 | } |
9243 | } | |
9244 | ||
5e2f6673 L |
9245 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9246 | any mutexes which contain one of the PRs and create new ones when | |
9247 | needed. */ | |
9248 | ||
9249 | static int | |
9250 | update_qp_mutex (valueT mask) | |
9251 | { | |
9252 | int i; | |
9253 | int add = 0; | |
9254 | ||
9255 | i = 0; | |
9256 | while (i < qp_mutexeslen) | |
9257 | { | |
9258 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9259 | { | |
9260 | /* If it destroys and creates the same mutex, do nothing. */ | |
9261 | if (qp_mutexes[i].prmask == mask | |
9262 | && qp_mutexes[i].path == md.path) | |
9263 | { | |
9264 | i++; | |
9265 | add = -1; | |
9266 | } | |
9267 | else | |
9268 | { | |
9269 | int keep = 0; | |
9270 | ||
9271 | if (md.debug_dv) | |
9272 | { | |
9273 | fprintf (stderr, " Clearing mutex relation"); | |
9274 | print_prmask (qp_mutexes[i].prmask); | |
9275 | fprintf (stderr, "\n"); | |
9276 | } | |
9277 | ||
9278 | /* Deal with the old mutex with more than 3+ PRs only if | |
9279 | the new mutex on the same execution path with it. | |
9280 | ||
9281 | FIXME: The 3+ mutex support is incomplete. | |
9282 | dot_pred_rel () may be a better place to fix it. */ | |
9283 | if (qp_mutexes[i].path == md.path) | |
9284 | { | |
9285 | /* If it is a proper subset of the mutex, create a | |
9286 | new mutex. */ | |
9287 | if (add == 0 | |
9288 | && (qp_mutexes[i].prmask & mask) == mask) | |
9289 | add = 1; | |
9290 | ||
9291 | qp_mutexes[i].prmask &= ~mask; | |
9292 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9293 | { | |
9294 | /* Modify the mutex if there are more than one | |
9295 | PR left. */ | |
9296 | keep = 1; | |
9297 | i++; | |
9298 | } | |
9299 | } | |
9300 | ||
9301 | if (keep == 0) | |
9302 | /* Remove the mutex. */ | |
9303 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9304 | } | |
9305 | } | |
9306 | else | |
9307 | ++i; | |
9308 | } | |
9309 | ||
9310 | if (add == 1) | |
9311 | add_qp_mutex (mask); | |
9312 | ||
9313 | return add; | |
9314 | } | |
9315 | ||
197865e8 | 9316 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9317 | |
542d6675 KH |
9318 | Any changes to a PR clears the mutex relations which include that PR. */ |
9319 | ||
800eeca4 JW |
9320 | static void |
9321 | clear_qp_mutex (mask) | |
542d6675 | 9322 | valueT mask; |
800eeca4 JW |
9323 | { |
9324 | int i; | |
9325 | ||
9326 | i = 0; | |
9327 | while (i < qp_mutexeslen) | |
9328 | { | |
9329 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9330 | { |
9331 | if (md.debug_dv) | |
9332 | { | |
9333 | fprintf (stderr, " Clearing mutex relation"); | |
9334 | print_prmask (qp_mutexes[i].prmask); | |
9335 | fprintf (stderr, "\n"); | |
9336 | } | |
9337 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9338 | } | |
800eeca4 | 9339 | else |
542d6675 | 9340 | ++i; |
800eeca4 JW |
9341 | } |
9342 | } | |
9343 | ||
9344 | /* Clear implies relations which contain PRs in the given masks. | |
9345 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9346 | indicates the implied PR. */ |
9347 | ||
800eeca4 JW |
9348 | static void |
9349 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9350 | valueT p1_mask; |
9351 | valueT p2_mask; | |
800eeca4 JW |
9352 | { |
9353 | int i; | |
9354 | ||
9355 | i = 0; | |
9356 | while (i < qp_implieslen) | |
9357 | { | |
197865e8 | 9358 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9359 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9360 | { | |
9361 | if (md.debug_dv) | |
9362 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9363 | qp_implies[i].p1, qp_implies[i].p2); | |
9364 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9365 | } | |
197865e8 | 9366 | else |
542d6675 | 9367 | ++i; |
800eeca4 JW |
9368 | } |
9369 | } | |
9370 | ||
542d6675 KH |
9371 | /* Add the PRs specified to the list of implied relations. */ |
9372 | ||
800eeca4 JW |
9373 | static void |
9374 | add_qp_imply (p1, p2) | |
542d6675 | 9375 | int p1, p2; |
800eeca4 JW |
9376 | { |
9377 | valueT mask; | |
9378 | valueT bit; | |
9379 | int i; | |
9380 | ||
542d6675 | 9381 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9382 | if (p1 == 0 || p2 == 0) |
9383 | abort (); | |
9384 | ||
9385 | if (p1 == p2) | |
9386 | return; | |
9387 | ||
542d6675 KH |
9388 | /* If it exists already, ignore it. */ |
9389 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9390 | { |
197865e8 | 9391 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9392 | && qp_implies[i].p2 == p2 |
9393 | && qp_implies[i].path == md.path | |
9394 | && !qp_implies[i].p2_branched) | |
9395 | return; | |
800eeca4 JW |
9396 | } |
9397 | ||
9398 | if (qp_implieslen == qp_impliestotlen) | |
9399 | { | |
9400 | qp_impliestotlen += 20; | |
9401 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9402 | xrealloc ((void *) qp_implies, |
9403 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9404 | } |
9405 | if (md.debug_dv) | |
9406 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9407 | qp_implies[qp_implieslen].p1 = p1; | |
9408 | qp_implies[qp_implieslen].p2 = p2; | |
9409 | qp_implies[qp_implieslen].path = md.path; | |
9410 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9411 | ||
9412 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9413 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9414 | as well. */ |
542d6675 | 9415 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9416 | { |
9417 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9418 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9419 | if (qp_implies[i].p2 == p1) |
542d6675 | 9420 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9421 | } |
9422 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9423 | relation containing p2, duplicate it and replace p2 with p1. */ |
9424 | bit = (valueT) 1 << p1; | |
9425 | mask = (valueT) 1 << p2; | |
542d6675 | 9426 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9427 | { |
9428 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9429 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9430 | } |
9431 | } | |
9432 | ||
800eeca4 JW |
9433 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9434 | one of the PRs can be true at any time. PR0 should never be included in | |
9435 | the mask. */ | |
542d6675 | 9436 | |
800eeca4 JW |
9437 | static void |
9438 | add_qp_mutex (mask) | |
542d6675 | 9439 | valueT mask; |
800eeca4 JW |
9440 | { |
9441 | if (mask & 0x1) | |
9442 | abort (); | |
9443 | ||
9444 | if (qp_mutexeslen == qp_mutexestotlen) | |
9445 | { | |
9446 | qp_mutexestotlen += 20; | |
9447 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9448 | xrealloc ((void *) qp_mutexes, |
9449 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9450 | } |
9451 | if (md.debug_dv) | |
9452 | { | |
9453 | fprintf (stderr, " Registering mutex on"); | |
9454 | print_prmask (mask); | |
9455 | fprintf (stderr, "\n"); | |
9456 | } | |
9457 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9458 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9459 | } | |
9460 | ||
cb5301b6 RH |
9461 | static int |
9462 | has_suffix_p (name, suffix) | |
40449e9f KH |
9463 | const char *name; |
9464 | const char *suffix; | |
cb5301b6 RH |
9465 | { |
9466 | size_t namelen = strlen (name); | |
9467 | size_t sufflen = strlen (suffix); | |
9468 | ||
9469 | if (namelen <= sufflen) | |
9470 | return 0; | |
9471 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9472 | } | |
9473 | ||
800eeca4 JW |
9474 | static void |
9475 | clear_register_values () | |
9476 | { | |
9477 | int i; | |
9478 | if (md.debug_dv) | |
9479 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9480 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9481 | gr_values[i].known = 0; |
9482 | } | |
9483 | ||
9484 | /* Keep track of register values/changes which affect DV tracking. | |
9485 | ||
9486 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9487 | have to examine a group of strings to identify them. */ |
800eeca4 | 9488 | |
800eeca4 JW |
9489 | static void |
9490 | note_register_values (idesc) | |
542d6675 | 9491 | struct ia64_opcode *idesc; |
800eeca4 JW |
9492 | { |
9493 | valueT qp_changemask = 0; | |
9494 | int i; | |
9495 | ||
542d6675 KH |
9496 | /* Invalidate values for registers being written to. */ |
9497 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9498 | { |
197865e8 | 9499 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9500 | || idesc->operands[i] == IA64_OPND_R2 |
9501 | || idesc->operands[i] == IA64_OPND_R3) | |
9502 | { | |
9503 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9504 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9505 | gr_values[regno].known = 0; | |
9506 | } | |
50b81f19 JW |
9507 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9508 | { | |
9509 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9510 | if (regno > 0 && regno < 4) | |
9511 | gr_values[regno].known = 0; | |
9512 | } | |
197865e8 | 9513 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9514 | || idesc->operands[i] == IA64_OPND_P2) |
9515 | { | |
9516 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9517 | qp_changemask |= (valueT) 1 << regno; | |
9518 | } | |
800eeca4 | 9519 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9520 | { |
9521 | if (idesc->operands[2] & (valueT) 0x10000) | |
9522 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9523 | else | |
9524 | qp_changemask = idesc->operands[2]; | |
9525 | break; | |
9526 | } | |
800eeca4 | 9527 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9528 | { |
9529 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9530 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9531 | else |
9532 | qp_changemask = idesc->operands[1]; | |
9533 | qp_changemask &= ~(valueT) 0xFFFF; | |
9534 | break; | |
9535 | } | |
9536 | } | |
9537 | ||
9538 | /* Always clear qp branch flags on any PR change. */ | |
9539 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9540 | clear_qp_branch_flag (qp_changemask); |
9541 | ||
542d6675 | 9542 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9543 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9544 | { | |
197865e8 | 9545 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9546 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9547 | { |
9548 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9549 | gr_values[i].known = 0; | |
9550 | } | |
800eeca4 JW |
9551 | clear_qp_mutex (qp_changemask); |
9552 | clear_qp_implies (qp_changemask, qp_changemask); | |
9553 | } | |
542d6675 KH |
9554 | /* After a call, all register values are undefined, except those marked |
9555 | as "safe". */ | |
800eeca4 | 9556 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9557 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9558 | { |
56d27c17 | 9559 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9560 | clear_register_values (); |
9561 | clear_qp_mutex (~qp_safe_across_calls); | |
9562 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9563 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9564 | } | |
e9718fe1 | 9565 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9566 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9567 | { |
9568 | clear_register_values (); | |
197865e8 KH |
9569 | clear_qp_mutex (~(valueT) 0); |
9570 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9571 | } |
542d6675 | 9572 | /* Look for mutex and implies relations. */ |
197865e8 | 9573 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9574 | || idesc->operands[0] == IA64_OPND_P2) |
9575 | && (idesc->operands[1] == IA64_OPND_P1 | |
9576 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9577 | { |
9578 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9579 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9580 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9581 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9582 | |
5e2f6673 L |
9583 | /* If both PRs are PR0, we can't really do anything. */ |
9584 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9585 | { |
9586 | if (md.debug_dv) | |
9587 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9588 | } | |
800eeca4 | 9589 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9590 | with the following exceptions. */ |
cb5301b6 RH |
9591 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9592 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9593 | { |
542d6675 KH |
9594 | clear_qp_implies (p2mask, p1mask); |
9595 | } | |
cb5301b6 RH |
9596 | else if (has_suffix_p (idesc->name, ".andcm") |
9597 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9598 | { |
9599 | clear_qp_implies (0, p1mask | p2mask); | |
9600 | } | |
cb5301b6 RH |
9601 | else if (has_suffix_p (idesc->name, ".orcm") |
9602 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9603 | { |
9604 | clear_qp_mutex (p1mask | p2mask); | |
9605 | clear_qp_implies (p1mask | p2mask, 0); | |
9606 | } | |
800eeca4 | 9607 | else |
542d6675 | 9608 | { |
5e2f6673 L |
9609 | int added = 0; |
9610 | ||
542d6675 | 9611 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9612 | |
9613 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9614 | if (p1 == 0 || p2 == 0) | |
9615 | clear_qp_mutex (p1mask | p2mask); | |
9616 | else | |
9617 | added = update_qp_mutex (p1mask | p2mask); | |
9618 | ||
9619 | if (CURR_SLOT.qp_regno == 0 | |
9620 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9621 | { |
5e2f6673 L |
9622 | if (added == 0 && p1 && p2) |
9623 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9624 | if (CURR_SLOT.qp_regno != 0) |
9625 | { | |
5e2f6673 L |
9626 | if (p1) |
9627 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9628 | if (p2) | |
9629 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9630 | } |
9631 | } | |
542d6675 KH |
9632 | } |
9633 | } | |
9634 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9635 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9636 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9637 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
9638 | && (strcmp (idesc->name, "mov") == 0 | |
9639 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9640 | { |
9641 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9642 | if (regno > 0 && regno < NELEMS (gr_values)) |
9643 | { | |
9644 | gr_values[regno].known = 1; | |
9645 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9646 | gr_values[regno].path = md.path; | |
9647 | if (md.debug_dv) | |
2434f565 JW |
9648 | { |
9649 | fprintf (stderr, " Know gr%d = ", regno); | |
9650 | fprintf_vma (stderr, gr_values[regno].value); | |
9651 | fputs ("\n", stderr); | |
9652 | } | |
542d6675 | 9653 | } |
800eeca4 | 9654 | } |
197865e8 | 9655 | else |
800eeca4 JW |
9656 | { |
9657 | clear_qp_mutex (qp_changemask); | |
9658 | clear_qp_implies (qp_changemask, qp_changemask); | |
9659 | } | |
9660 | } | |
9661 | ||
542d6675 KH |
9662 | /* Return whether the given predicate registers are currently mutex. */ |
9663 | ||
800eeca4 JW |
9664 | static int |
9665 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9666 | int p1; |
9667 | int p2; | |
9668 | int path; | |
800eeca4 JW |
9669 | { |
9670 | int i; | |
9671 | valueT mask; | |
9672 | ||
9673 | if (p1 != p2) | |
9674 | { | |
542d6675 KH |
9675 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9676 | for (i = 0; i < qp_mutexeslen; i++) | |
9677 | { | |
9678 | if (qp_mutexes[i].path >= path | |
9679 | && (qp_mutexes[i].prmask & mask) == mask) | |
9680 | return 1; | |
9681 | } | |
800eeca4 JW |
9682 | } |
9683 | return 0; | |
9684 | } | |
9685 | ||
9686 | /* Return whether the given resource is in the given insn's list of chks | |
9687 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9688 | conflict. */ |
9689 | ||
800eeca4 JW |
9690 | static int |
9691 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9692 | struct rsrc *rs; |
9693 | struct ia64_opcode *idesc; | |
9694 | int note; | |
9695 | int qp_regno; | |
9696 | int path; | |
800eeca4 JW |
9697 | { |
9698 | struct rsrc specs[MAX_SPECS]; | |
9699 | int count; | |
9700 | ||
9701 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9702 | we don't need to check. One exception is note 11, which indicates that | |
9703 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9704 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9705 | && note != 11) |
9706 | return 0; | |
9707 | ||
9708 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9709 | while (count-- > 0) | |
9710 | { | |
9711 | /* UNAT checking is a bit more specific than other resources */ | |
9712 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9713 | && specs[count].mem_offset.hint |
9714 | && rs->mem_offset.hint) | |
9715 | { | |
9716 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9717 | { | |
9718 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9719 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9720 | return 1; | |
9721 | else | |
9722 | continue; | |
9723 | } | |
9724 | } | |
800eeca4 | 9725 | |
7484b8e6 | 9726 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9727 | writes are an OR. */ |
7484b8e6 | 9728 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9729 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9730 | || rs->dependency->specifier == IA64_RS_PR63) |
9731 | { | |
9732 | if (specs[count].cmp_type != CMP_NONE | |
9733 | && specs[count].cmp_type == rs->cmp_type) | |
9734 | { | |
9735 | if (md.debug_dv) | |
9736 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9737 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9738 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9739 | specs[count].index : 63); |
9740 | continue; | |
9741 | } | |
9742 | if (md.debug_dv) | |
4a4f25cf | 9743 | fprintf (stderr, |
7484b8e6 TW |
9744 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9745 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9746 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9747 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9748 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9749 | specs[count].index : 63); |
4a4f25cf | 9750 | |
7484b8e6 TW |
9751 | } |
9752 | ||
800eeca4 | 9753 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9754 | */ |
800eeca4 | 9755 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9756 | return 2; |
800eeca4 | 9757 | else if (specs[count].index == rs->index) |
542d6675 | 9758 | return 1; |
800eeca4 | 9759 | } |
800eeca4 JW |
9760 | |
9761 | return 0; | |
9762 | } | |
9763 | ||
9764 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9765 | insert a stop to create the break. Update all resource dependencies | |
9766 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9767 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9768 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9769 | instruction. */ |
800eeca4 JW |
9770 | |
9771 | static void | |
9772 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
9773 | int insert_stop; |
9774 | int qp_regno; | |
9775 | int save_current; | |
800eeca4 JW |
9776 | { |
9777 | int i; | |
9778 | ||
9779 | if (insert_stop && md.num_slots_in_use > 0) | |
9780 | PREV_SLOT.end_of_insn_group = 1; | |
9781 | ||
9782 | if (md.debug_dv) | |
9783 | { | |
197865e8 | 9784 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9785 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9786 | if (qp_regno != 0) |
542d6675 | 9787 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9788 | fprintf (stderr, "\n"); |
9789 | } | |
9790 | ||
9791 | i = 0; | |
9792 | while (i < regdepslen) | |
9793 | { | |
9794 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9795 | ||
9796 | if (qp_regno != 0 | |
542d6675 KH |
9797 | && regdeps[i].qp_regno != qp_regno) |
9798 | { | |
9799 | ++i; | |
9800 | continue; | |
9801 | } | |
800eeca4 JW |
9802 | |
9803 | if (save_current | |
542d6675 KH |
9804 | && CURR_SLOT.src_file == regdeps[i].file |
9805 | && CURR_SLOT.src_line == regdeps[i].line) | |
9806 | { | |
9807 | ++i; | |
9808 | continue; | |
9809 | } | |
800eeca4 JW |
9810 | |
9811 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9812 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9813 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9814 | || dep->semantics == IA64_DVS_IMPLIEDF |
9815 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9816 | { | |
9817 | print_dependency ("Removing", i); | |
9818 | regdeps[i] = regdeps[--regdepslen]; | |
9819 | } | |
800eeca4 | 9820 | else |
542d6675 KH |
9821 | { |
9822 | if (dep->semantics == IA64_DVS_DATA | |
9823 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9824 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9825 | { |
9826 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9827 | regdeps[i].insn_srlz = STATE_STOP; | |
9828 | if (regdeps[i].data_srlz == STATE_NONE) | |
9829 | regdeps[i].data_srlz = STATE_STOP; | |
9830 | } | |
9831 | ++i; | |
9832 | } | |
800eeca4 JW |
9833 | } |
9834 | } | |
9835 | ||
542d6675 KH |
9836 | /* Add the given resource usage spec to the list of active dependencies. */ |
9837 | ||
197865e8 | 9838 | static void |
800eeca4 | 9839 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
9840 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
9841 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
9842 | struct rsrc *spec; |
9843 | int depind; | |
9844 | int path; | |
800eeca4 JW |
9845 | { |
9846 | if (regdepslen == regdepstotlen) | |
9847 | { | |
9848 | regdepstotlen += 20; | |
9849 | regdeps = (struct rsrc *) | |
542d6675 | 9850 | xrealloc ((void *) regdeps, |
bc805888 | 9851 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
9852 | } |
9853 | ||
9854 | regdeps[regdepslen] = *spec; | |
9855 | regdeps[regdepslen].depind = depind; | |
9856 | regdeps[regdepslen].path = path; | |
9857 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
9858 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
9859 | ||
9860 | print_dependency ("Adding", regdepslen); | |
9861 | ||
9862 | ++regdepslen; | |
9863 | } | |
9864 | ||
9865 | static void | |
9866 | print_dependency (action, depind) | |
542d6675 KH |
9867 | const char *action; |
9868 | int depind; | |
800eeca4 JW |
9869 | { |
9870 | if (md.debug_dv) | |
9871 | { | |
197865e8 | 9872 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
9873 | action, dv_mode[(regdeps[depind].dependency)->mode], |
9874 | (regdeps[depind].dependency)->name); | |
800eeca4 | 9875 | if (regdeps[depind].specific && regdeps[depind].index != 0) |
542d6675 | 9876 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 9877 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
9878 | { |
9879 | fputs (" ", stderr); | |
9880 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
9881 | fputs ("+", stderr); | |
9882 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
9883 | } | |
800eeca4 JW |
9884 | fprintf (stderr, "\n"); |
9885 | } | |
9886 | } | |
9887 | ||
9888 | static void | |
9889 | instruction_serialization () | |
9890 | { | |
9891 | int i; | |
9892 | if (md.debug_dv) | |
9893 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 9894 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
9895 | if (regdeps[i].insn_srlz == STATE_STOP) |
9896 | regdeps[i].insn_srlz = STATE_SRLZ; | |
9897 | } | |
9898 | ||
9899 | static void | |
9900 | data_serialization () | |
9901 | { | |
9902 | int i = 0; | |
9903 | if (md.debug_dv) | |
9904 | fprintf (stderr, " Data serialization\n"); | |
9905 | while (i < regdepslen) | |
9906 | { | |
9907 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
9908 | /* Note: as of 991210, all "other" dependencies are cleared by a |
9909 | data serialization. This might change with new tables */ | |
9910 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
9911 | { | |
9912 | print_dependency ("Removing", i); | |
9913 | regdeps[i] = regdeps[--regdepslen]; | |
9914 | } | |
800eeca4 | 9915 | else |
542d6675 | 9916 | ++i; |
800eeca4 JW |
9917 | } |
9918 | } | |
9919 | ||
542d6675 KH |
9920 | /* Insert stops and serializations as needed to avoid DVs. */ |
9921 | ||
800eeca4 JW |
9922 | static void |
9923 | remove_marked_resource (rs) | |
542d6675 | 9924 | struct rsrc *rs; |
800eeca4 JW |
9925 | { |
9926 | switch (rs->dependency->semantics) | |
9927 | { | |
9928 | case IA64_DVS_SPECIFIC: | |
9929 | if (md.debug_dv) | |
9930 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 9931 | /* ...fall through... */ |
800eeca4 JW |
9932 | case IA64_DVS_INSTR: |
9933 | if (md.debug_dv) | |
542d6675 | 9934 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 9935 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 9936 | insn_group_break (1, 0, 0); |
800eeca4 | 9937 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 9938 | { |
888a75be | 9939 | struct slot oldslot = CURR_SLOT; |
542d6675 | 9940 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 9941 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
542d6675 KH |
9942 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
9943 | instruction_serialization (); | |
9944 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9945 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9946 | emit_one_bundle (); | |
888a75be | 9947 | CURR_SLOT = oldslot; |
542d6675 | 9948 | } |
800eeca4 JW |
9949 | insn_group_break (1, 0, 0); |
9950 | break; | |
9951 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
9952 | "other" types of DV are eliminated |
9953 | by a data serialization */ | |
800eeca4 JW |
9954 | case IA64_DVS_DATA: |
9955 | if (md.debug_dv) | |
542d6675 | 9956 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 9957 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 9958 | insn_group_break (1, 0, 0); |
800eeca4 | 9959 | { |
888a75be | 9960 | struct slot oldslot = CURR_SLOT; |
542d6675 | 9961 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 9962 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
542d6675 KH |
9963 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
9964 | data_serialization (); | |
9965 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9966 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9967 | emit_one_bundle (); | |
888a75be | 9968 | CURR_SLOT = oldslot; |
800eeca4 JW |
9969 | } |
9970 | break; | |
9971 | case IA64_DVS_IMPLIED: | |
9972 | case IA64_DVS_IMPLIEDF: | |
9973 | if (md.debug_dv) | |
542d6675 | 9974 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
9975 | insn_group_break (1, 0, 0); |
9976 | break; | |
9977 | default: | |
9978 | break; | |
9979 | } | |
9980 | } | |
9981 | ||
9982 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 9983 | list. |
800eeca4 JW |
9984 | |
9985 | The check is run once for each execution path encountered. In this case, | |
9986 | a unique execution path is the sequence of instructions following a code | |
9987 | entry point, e.g. the following has three execution paths, one starting | |
9988 | at L0, one at L1, and one at L2. | |
197865e8 | 9989 | |
800eeca4 JW |
9990 | L0: nop |
9991 | L1: add | |
9992 | L2: add | |
197865e8 | 9993 | br.ret |
800eeca4 | 9994 | */ |
542d6675 | 9995 | |
800eeca4 JW |
9996 | static void |
9997 | check_dependencies (idesc) | |
542d6675 | 9998 | struct ia64_opcode *idesc; |
800eeca4 JW |
9999 | { |
10000 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10001 | int path; | |
10002 | int i; | |
10003 | ||
10004 | /* Note that the number of marked resources may change within the | |
197865e8 | 10005 | loop if in auto mode. */ |
800eeca4 JW |
10006 | i = 0; |
10007 | while (i < regdepslen) | |
10008 | { | |
10009 | struct rsrc *rs = ®deps[i]; | |
10010 | const struct ia64_dependency *dep = rs->dependency; | |
10011 | int chkind; | |
10012 | int note; | |
10013 | int start_over = 0; | |
10014 | ||
10015 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10016 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10017 | { | |
10018 | ++i; | |
10019 | continue; | |
10020 | } | |
10021 | ||
10022 | note = NOTE (opdeps->chks[chkind]); | |
10023 | ||
10024 | /* Check this resource against each execution path seen thus far. */ | |
10025 | for (path = 0; path <= md.path; path++) | |
10026 | { | |
10027 | int matchtype; | |
10028 | ||
10029 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10030 | if (rs->path < path) | |
10031 | continue; | |
10032 | ||
10033 | /* If the QP for this insn implies a QP which has branched, don't | |
10034 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10035 | useful; what's the point of generating code which will only be | |
10036 | reached if its QP is zero? | |
10037 | This code was specifically inserted to handle the following code, | |
10038 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10039 | ||
10040 | mov r4 = 2 | |
10041 | (p2) br.cond L | |
10042 | (p1) mov r4 = 7 | |
10043 | */ | |
10044 | if (CURR_SLOT.qp_regno != 0) | |
10045 | { | |
10046 | int skip = 0; | |
10047 | int implies; | |
10048 | for (implies = 0; implies < qp_implieslen; implies++) | |
10049 | { | |
10050 | if (qp_implies[implies].path >= path | |
10051 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10052 | && qp_implies[implies].p2_branched) | |
10053 | { | |
10054 | skip = 1; | |
10055 | break; | |
10056 | } | |
10057 | } | |
10058 | if (skip) | |
10059 | continue; | |
10060 | } | |
10061 | ||
10062 | if ((matchtype = resources_match (rs, idesc, note, | |
10063 | CURR_SLOT.qp_regno, path)) != 0) | |
10064 | { | |
10065 | char msg[1024]; | |
10066 | char pathmsg[256] = ""; | |
10067 | char indexmsg[256] = ""; | |
10068 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10069 | ||
10070 | if (path != 0) | |
10071 | sprintf (pathmsg, " when entry is at label '%s'", | |
10072 | md.entry_labels[path - 1]); | |
10073 | if (rs->specific && rs->index != 0) | |
10074 | sprintf (indexmsg, ", specific resource number is %d", | |
10075 | rs->index); | |
10076 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
10077 | idesc->name, | |
10078 | (certain ? "violates" : "may violate"), | |
10079 | dv_mode[dep->mode], dep->name, | |
10080 | dv_sem[dep->semantics], | |
10081 | pathmsg, indexmsg); | |
10082 | ||
10083 | if (md.explicit_mode) | |
10084 | { | |
10085 | as_warn ("%s", msg); | |
10086 | if (path < md.path) | |
10087 | as_warn (_("Only the first path encountering the conflict " | |
10088 | "is reported")); | |
10089 | as_warn_where (rs->file, rs->line, | |
10090 | _("This is the location of the " | |
10091 | "conflicting usage")); | |
10092 | /* Don't bother checking other paths, to avoid duplicating | |
10093 | the same warning */ | |
10094 | break; | |
10095 | } | |
10096 | else | |
10097 | { | |
10098 | if (md.debug_dv) | |
10099 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10100 | ||
10101 | remove_marked_resource (rs); | |
10102 | ||
10103 | /* since the set of dependencies has changed, start over */ | |
10104 | /* FIXME -- since we're removing dvs as we go, we | |
10105 | probably don't really need to start over... */ | |
10106 | start_over = 1; | |
10107 | break; | |
10108 | } | |
10109 | } | |
10110 | } | |
800eeca4 | 10111 | if (start_over) |
542d6675 | 10112 | i = 0; |
800eeca4 | 10113 | else |
542d6675 | 10114 | ++i; |
800eeca4 JW |
10115 | } |
10116 | } | |
10117 | ||
542d6675 KH |
10118 | /* Register new dependencies based on the given opcode. */ |
10119 | ||
800eeca4 JW |
10120 | static void |
10121 | mark_resources (idesc) | |
542d6675 | 10122 | struct ia64_opcode *idesc; |
800eeca4 JW |
10123 | { |
10124 | int i; | |
10125 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10126 | int add_only_qp_reads = 0; | |
10127 | ||
10128 | /* A conditional branch only uses its resources if it is taken; if it is | |
10129 | taken, we stop following that path. The other branch types effectively | |
10130 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10131 | reads. */ |
800eeca4 JW |
10132 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10133 | { | |
10134 | add_only_qp_reads = 1; | |
10135 | } | |
10136 | ||
10137 | if (md.debug_dv) | |
10138 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10139 | ||
542d6675 | 10140 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10141 | { |
10142 | const struct ia64_dependency *dep; | |
10143 | struct rsrc specs[MAX_SPECS]; | |
10144 | int note; | |
10145 | int path; | |
10146 | int count; | |
197865e8 | 10147 | |
800eeca4 | 10148 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10149 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10150 | |
10151 | if (add_only_qp_reads | |
542d6675 KH |
10152 | && !(dep->mode == IA64_DV_WAR |
10153 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10154 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10155 | || dep->specifier == IA64_RS_PR63))) |
10156 | continue; | |
800eeca4 JW |
10157 | |
10158 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10159 | ||
800eeca4 | 10160 | while (count-- > 0) |
542d6675 KH |
10161 | { |
10162 | mark_resource (idesc, dep, &specs[count], | |
10163 | DEP (opdeps->regs[i]), md.path); | |
10164 | } | |
800eeca4 JW |
10165 | |
10166 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10167 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10168 | switch (dep->specifier) |
542d6675 KH |
10169 | { |
10170 | default: | |
10171 | break; | |
10172 | case IA64_RS_CPUID: | |
10173 | case IA64_RS_DBR: | |
10174 | case IA64_RS_IBR: | |
800eeca4 | 10175 | case IA64_RS_MSR: |
542d6675 KH |
10176 | case IA64_RS_PKR: |
10177 | case IA64_RS_PMC: | |
10178 | case IA64_RS_PMD: | |
10179 | case IA64_RS_RR: | |
10180 | for (path = 0; path < md.path; path++) | |
10181 | { | |
10182 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10183 | while (count-- > 0) | |
10184 | mark_resource (idesc, dep, &specs[count], | |
10185 | DEP (opdeps->regs[i]), path); | |
10186 | } | |
10187 | break; | |
10188 | } | |
10189 | } | |
10190 | } | |
10191 | ||
10192 | /* Remove dependencies when they no longer apply. */ | |
10193 | ||
800eeca4 JW |
10194 | static void |
10195 | update_dependencies (idesc) | |
542d6675 | 10196 | struct ia64_opcode *idesc; |
800eeca4 JW |
10197 | { |
10198 | int i; | |
10199 | ||
10200 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10201 | { | |
10202 | instruction_serialization (); | |
10203 | } | |
10204 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10205 | { | |
10206 | data_serialization (); | |
10207 | } | |
10208 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10209 | || is_taken_branch (idesc)) |
800eeca4 | 10210 | { |
542d6675 KH |
10211 | /* Although technically the taken branch doesn't clear dependencies |
10212 | which require a srlz.[id], we don't follow the branch; the next | |
10213 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10214 | regdepslen = 0; |
800eeca4 JW |
10215 | md.path = 0; |
10216 | } | |
10217 | else if (is_conditional_branch (idesc) | |
542d6675 | 10218 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10219 | { |
10220 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10221 | ||
542d6675 KH |
10222 | for (i = 0; i < qp_implieslen; i++) |
10223 | { | |
10224 | /* If the conditional branch's predicate is implied by the predicate | |
10225 | in an existing dependency, remove that dependency. */ | |
10226 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10227 | { | |
10228 | int depind = 0; | |
10229 | /* Note that this implied predicate takes a branch so that if | |
10230 | a later insn generates a DV but its predicate implies this | |
10231 | one, we can avoid the false DV warning. */ | |
10232 | qp_implies[i].p2_branched = 1; | |
10233 | while (depind < regdepslen) | |
10234 | { | |
10235 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10236 | { | |
10237 | print_dependency ("Removing", depind); | |
10238 | regdeps[depind] = regdeps[--regdepslen]; | |
10239 | } | |
10240 | else | |
10241 | ++depind; | |
10242 | } | |
10243 | } | |
10244 | } | |
800eeca4 | 10245 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10246 | cleared, provided that the QP hasn't been modified between the |
10247 | marking instruction and the branch. */ | |
800eeca4 | 10248 | if (is_call) |
542d6675 KH |
10249 | { |
10250 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10251 | } | |
800eeca4 | 10252 | else |
542d6675 KH |
10253 | { |
10254 | i = 0; | |
10255 | while (i < regdepslen) | |
10256 | { | |
10257 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10258 | && regdeps[i].link_to_qp_branch | |
10259 | && (regdeps[i].file != CURR_SLOT.src_file | |
10260 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10261 | { | |
10262 | /* Treat like a taken branch */ | |
10263 | print_dependency ("Removing", i); | |
10264 | regdeps[i] = regdeps[--regdepslen]; | |
10265 | } | |
10266 | else | |
10267 | ++i; | |
10268 | } | |
10269 | } | |
800eeca4 JW |
10270 | } |
10271 | } | |
10272 | ||
10273 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10274 | |
800eeca4 JW |
10275 | static int |
10276 | check_dv (idesc) | |
542d6675 | 10277 | struct ia64_opcode *idesc; |
800eeca4 JW |
10278 | { |
10279 | if (md.debug_dv) | |
10280 | { | |
197865e8 | 10281 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10282 | idesc->name, CURR_SLOT.src_line, |
10283 | idesc->dependencies->nchks, | |
10284 | idesc->dependencies->nregs); | |
800eeca4 JW |
10285 | } |
10286 | ||
197865e8 | 10287 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10288 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10289 | check against the specific resources used. */ |
800eeca4 JW |
10290 | check_dependencies (idesc); |
10291 | ||
542d6675 KH |
10292 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10293 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10294 | mark_resources (idesc); |
10295 | ||
10296 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10297 | requirements for being cleared |
10298 | ||
800eeca4 JW |
10299 | Instruction serialization (insns separated by interruption, rfi, or |
10300 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10301 | ||
10302 | Data serialization (instruction serialization, or writer + srlz.d + | |
10303 | reader, where writer and srlz.d are in separate groups) clears | |
10304 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10305 | always be the case). | |
10306 | ||
10307 | Instruction group break (groups separated by stop, taken branch, | |
10308 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10309 | */ | |
10310 | update_dependencies (idesc); | |
10311 | ||
10312 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10313 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10314 | note_register_values (idesc); |
10315 | ||
197865e8 | 10316 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10317 | md.mem_offset.hint = 0; |
10318 | ||
10319 | return 0; | |
10320 | } | |
10321 | ||
10322 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10323 | here. */ | |
10324 | void | |
10325 | md_assemble (str) | |
10326 | char *str; | |
10327 | { | |
10328 | char *saved_input_line_pointer, *mnemonic; | |
10329 | const struct pseudo_opcode *pdesc; | |
10330 | struct ia64_opcode *idesc; | |
10331 | unsigned char qp_regno; | |
10332 | unsigned int flags; | |
10333 | int ch; | |
10334 | ||
10335 | saved_input_line_pointer = input_line_pointer; | |
10336 | input_line_pointer = str; | |
10337 | ||
542d6675 | 10338 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10339 | |
10340 | mnemonic = input_line_pointer; | |
10341 | ch = get_symbol_end (); | |
10342 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10343 | if (pdesc) | |
10344 | { | |
10345 | *input_line_pointer = ch; | |
10346 | (*pdesc->handler) (pdesc->arg); | |
10347 | goto done; | |
10348 | } | |
10349 | ||
542d6675 | 10350 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10351 | |
10352 | idesc = ia64_find_opcode (mnemonic); | |
10353 | *input_line_pointer = ch; | |
10354 | if (!idesc) | |
10355 | { | |
10356 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10357 | goto done; | |
10358 | } | |
10359 | ||
10360 | idesc = parse_operands (idesc); | |
10361 | if (!idesc) | |
10362 | goto done; | |
10363 | ||
542d6675 | 10364 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10365 | if (idesc->type == IA64_TYPE_DYN) |
10366 | { | |
10367 | if (strcmp (idesc->name, "add") == 0) | |
10368 | { | |
10369 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10370 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10371 | mnemonic = "addl"; | |
10372 | else | |
10373 | mnemonic = "adds"; | |
3d56ab85 | 10374 | ia64_free_opcode (idesc); |
800eeca4 | 10375 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10376 | } |
10377 | else if (strcmp (idesc->name, "mov") == 0) | |
10378 | { | |
10379 | enum ia64_opnd opnd1, opnd2; | |
10380 | int rop; | |
10381 | ||
10382 | opnd1 = idesc->operands[0]; | |
10383 | opnd2 = idesc->operands[1]; | |
10384 | if (opnd1 == IA64_OPND_AR3) | |
10385 | rop = 0; | |
10386 | else if (opnd2 == IA64_OPND_AR3) | |
10387 | rop = 1; | |
10388 | else | |
10389 | abort (); | |
652ca075 L |
10390 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10391 | { | |
10392 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10393 | mnemonic = "mov.i"; | |
97762d08 | 10394 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10395 | mnemonic = "mov.m"; |
97762d08 JB |
10396 | else |
10397 | rop = -1; | |
652ca075 | 10398 | } |
800eeca4 | 10399 | else |
652ca075 | 10400 | abort (); |
97762d08 JB |
10401 | if (rop >= 0) |
10402 | { | |
10403 | ia64_free_opcode (idesc); | |
10404 | idesc = ia64_find_opcode (mnemonic); | |
10405 | while (idesc != NULL | |
10406 | && (idesc->operands[0] != opnd1 | |
10407 | || idesc->operands[1] != opnd2)) | |
10408 | idesc = get_next_opcode (idesc); | |
10409 | } | |
800eeca4 JW |
10410 | } |
10411 | } | |
652ca075 L |
10412 | else if (strcmp (idesc->name, "mov.i") == 0 |
10413 | || strcmp (idesc->name, "mov.m") == 0) | |
10414 | { | |
10415 | enum ia64_opnd opnd1, opnd2; | |
10416 | int rop; | |
10417 | ||
10418 | opnd1 = idesc->operands[0]; | |
10419 | opnd2 = idesc->operands[1]; | |
10420 | if (opnd1 == IA64_OPND_AR3) | |
10421 | rop = 0; | |
10422 | else if (opnd2 == IA64_OPND_AR3) | |
10423 | rop = 1; | |
10424 | else | |
10425 | abort (); | |
10426 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10427 | { | |
10428 | char unit = 'a'; | |
10429 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10430 | unit = 'i'; | |
10431 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10432 | unit = 'm'; | |
10433 | if (unit != 'a' && unit != idesc->name [4]) | |
10434 | as_bad ("AR %d cannot be accessed by %c-unit", | |
10435 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), | |
10436 | TOUPPER (unit)); | |
10437 | } | |
10438 | } | |
800eeca4 JW |
10439 | |
10440 | qp_regno = 0; | |
10441 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10442 | { |
10443 | qp_regno = md.qp.X_add_number - REG_P; | |
10444 | md.qp.X_op = O_absent; | |
10445 | } | |
800eeca4 JW |
10446 | |
10447 | flags = idesc->flags; | |
10448 | ||
10449 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10450 | { |
10451 | /* The alignment frag has to end with a stop bit only if the | |
10452 | next instruction after the alignment directive has to be | |
10453 | the first instruction in an instruction group. */ | |
10454 | if (align_frag) | |
10455 | { | |
10456 | while (align_frag->fr_type != rs_align_code) | |
10457 | { | |
10458 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10459 | if (!align_frag) |
10460 | break; | |
9545c4ce | 10461 | } |
bae25f19 L |
10462 | /* align_frag can be NULL if there are directives in |
10463 | between. */ | |
10464 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10465 | align_frag->tc_frag_data = 1; |
10466 | } | |
10467 | ||
10468 | insn_group_break (1, 0, 0); | |
10469 | } | |
10470 | align_frag = NULL; | |
800eeca4 JW |
10471 | |
10472 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10473 | { | |
10474 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10475 | goto done; | |
10476 | } | |
10477 | ||
542d6675 | 10478 | /* Build the instruction. */ |
800eeca4 JW |
10479 | CURR_SLOT.qp_regno = qp_regno; |
10480 | CURR_SLOT.idesc = idesc; | |
10481 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10482 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
10483 | |
10484 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 10485 | if (unwind.current_entry) |
800eeca4 | 10486 | { |
e0c9811a JW |
10487 | CURR_SLOT.unwind_record = unwind.current_entry; |
10488 | unwind.current_entry = NULL; | |
800eeca4 | 10489 | } |
75e09913 JB |
10490 | if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start)) |
10491 | unwind.insn = 1; | |
800eeca4 | 10492 | |
542d6675 | 10493 | /* Check for dependency violations. */ |
800eeca4 | 10494 | if (md.detect_dv) |
542d6675 | 10495 | check_dv (idesc); |
800eeca4 JW |
10496 | |
10497 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10498 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10499 | emit_one_bundle (); | |
10500 | ||
10501 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10502 | insn_group_break (1, 0, 0); | |
10503 | ||
10504 | md.last_text_seg = now_seg; | |
10505 | ||
10506 | done: | |
10507 | input_line_pointer = saved_input_line_pointer; | |
10508 | } | |
10509 | ||
10510 | /* Called when symbol NAME cannot be found in the symbol table. | |
10511 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10512 | |
10513 | symbolS * | |
800eeca4 | 10514 | md_undefined_symbol (name) |
2434f565 | 10515 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10516 | { |
10517 | return 0; | |
10518 | } | |
10519 | ||
10520 | /* Called for any expression that can not be recognized. When the | |
10521 | function is called, `input_line_pointer' will point to the start of | |
10522 | the expression. */ | |
542d6675 | 10523 | |
800eeca4 JW |
10524 | void |
10525 | md_operand (e) | |
10526 | expressionS *e; | |
10527 | { | |
800eeca4 JW |
10528 | switch (*input_line_pointer) |
10529 | { | |
800eeca4 JW |
10530 | case '[': |
10531 | ++input_line_pointer; | |
10532 | expression (e); | |
10533 | if (*input_line_pointer != ']') | |
10534 | { | |
16a48f83 | 10535 | as_bad ("Closing bracket missing"); |
800eeca4 JW |
10536 | goto err; |
10537 | } | |
10538 | else | |
10539 | { | |
10540 | if (e->X_op != O_register) | |
10541 | as_bad ("Register expected as index"); | |
10542 | ||
10543 | ++input_line_pointer; | |
10544 | e->X_op = O_index; | |
10545 | } | |
10546 | break; | |
10547 | ||
10548 | default: | |
10549 | break; | |
10550 | } | |
10551 | return; | |
10552 | ||
10553 | err: | |
10554 | ignore_rest_of_line (); | |
10555 | } | |
10556 | ||
10557 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10558 | a section symbol plus some offset. For relocs involving @fptr(), | |
10559 | directives we don't want such adjustments since we need to have the | |
10560 | original symbol's name in the reloc. */ | |
10561 | int | |
10562 | ia64_fix_adjustable (fix) | |
10563 | fixS *fix; | |
10564 | { | |
10565 | /* Prevent all adjustments to global symbols */ | |
10566 | if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) | |
10567 | return 0; | |
10568 | ||
10569 | switch (fix->fx_r_type) | |
10570 | { | |
10571 | case BFD_RELOC_IA64_FPTR64I: | |
10572 | case BFD_RELOC_IA64_FPTR32MSB: | |
10573 | case BFD_RELOC_IA64_FPTR32LSB: | |
10574 | case BFD_RELOC_IA64_FPTR64MSB: | |
10575 | case BFD_RELOC_IA64_FPTR64LSB: | |
10576 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10577 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10578 | return 0; | |
10579 | default: | |
10580 | break; | |
10581 | } | |
10582 | ||
10583 | return 1; | |
10584 | } | |
10585 | ||
10586 | int | |
10587 | ia64_force_relocation (fix) | |
10588 | fixS *fix; | |
10589 | { | |
10590 | switch (fix->fx_r_type) | |
10591 | { | |
10592 | case BFD_RELOC_IA64_FPTR64I: | |
10593 | case BFD_RELOC_IA64_FPTR32MSB: | |
10594 | case BFD_RELOC_IA64_FPTR32LSB: | |
10595 | case BFD_RELOC_IA64_FPTR64MSB: | |
10596 | case BFD_RELOC_IA64_FPTR64LSB: | |
10597 | ||
10598 | case BFD_RELOC_IA64_LTOFF22: | |
10599 | case BFD_RELOC_IA64_LTOFF64I: | |
10600 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10601 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10602 | case BFD_RELOC_IA64_PLTOFF22: | |
10603 | case BFD_RELOC_IA64_PLTOFF64I: | |
10604 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10605 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10606 | |
10607 | case BFD_RELOC_IA64_LTOFF22X: | |
10608 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10609 | return 1; |
10610 | ||
10611 | default: | |
a161fe53 | 10612 | break; |
800eeca4 | 10613 | } |
a161fe53 | 10614 | |
ae6063d4 | 10615 | return generic_force_reloc (fix); |
800eeca4 JW |
10616 | } |
10617 | ||
10618 | /* Decide from what point a pc-relative relocation is relative to, | |
10619 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10620 | long | |
10621 | ia64_pcrel_from_section (fix, sec) | |
10622 | fixS *fix; | |
10623 | segT sec; | |
10624 | { | |
10625 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10626 | |
800eeca4 JW |
10627 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10628 | off &= ~0xfUL; | |
10629 | ||
10630 | return off; | |
10631 | } | |
10632 | ||
6174d9c8 RH |
10633 | |
10634 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10635 | void | |
10636 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10637 | { | |
10638 | expressionS expr; | |
10639 | ||
10640 | expr.X_op = O_pseudo_fixup; | |
10641 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10642 | expr.X_add_number = 0; | |
10643 | expr.X_add_symbol = symbol; | |
10644 | emit_expr (&expr, size); | |
10645 | } | |
10646 | ||
800eeca4 JW |
10647 | /* This is called whenever some data item (not an instruction) needs a |
10648 | fixup. We pick the right reloc code depending on the byteorder | |
10649 | currently in effect. */ | |
10650 | void | |
10651 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10652 | fragS *f; | |
10653 | int where; | |
10654 | int nbytes; | |
10655 | expressionS *exp; | |
10656 | { | |
10657 | bfd_reloc_code_real_type code; | |
10658 | fixS *fix; | |
10659 | ||
10660 | switch (nbytes) | |
10661 | { | |
10662 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10663 | them here since they will work fine as long as the expression | |
10664 | is fully defined at the end of the pass over the source file. */ | |
10665 | case 1: code = BFD_RELOC_8; break; | |
10666 | case 2: code = BFD_RELOC_16; break; | |
10667 | case 4: | |
10668 | if (target_big_endian) | |
10669 | code = BFD_RELOC_IA64_DIR32MSB; | |
10670 | else | |
10671 | code = BFD_RELOC_IA64_DIR32LSB; | |
10672 | break; | |
10673 | ||
10674 | case 8: | |
40449e9f | 10675 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10676 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10677 | && exp->X_op_symbol |
10678 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10679 | && !(md.flags & EF_IA_64_ABI64)) | |
10680 | { | |
10681 | if (target_big_endian) | |
10682 | code = BFD_RELOC_IA64_IPLTMSB; | |
10683 | else | |
10684 | code = BFD_RELOC_IA64_IPLTLSB; | |
10685 | exp->X_op = O_symbol; | |
10686 | break; | |
10687 | } | |
10688 | else | |
10689 | { | |
10690 | if (target_big_endian) | |
10691 | code = BFD_RELOC_IA64_DIR64MSB; | |
10692 | else | |
10693 | code = BFD_RELOC_IA64_DIR64LSB; | |
10694 | break; | |
10695 | } | |
800eeca4 | 10696 | |
3969b680 RH |
10697 | case 16: |
10698 | if (exp->X_op == O_pseudo_fixup | |
10699 | && exp->X_op_symbol | |
10700 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10701 | { | |
10702 | if (target_big_endian) | |
10703 | code = BFD_RELOC_IA64_IPLTMSB; | |
10704 | else | |
10705 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10706 | exp->X_op = O_symbol; |
10707 | break; | |
10708 | } | |
10709 | /* FALLTHRU */ | |
10710 | ||
800eeca4 JW |
10711 | default: |
10712 | as_bad ("Unsupported fixup size %d", nbytes); | |
10713 | ignore_rest_of_line (); | |
10714 | return; | |
10715 | } | |
6174d9c8 | 10716 | |
800eeca4 JW |
10717 | if (exp->X_op == O_pseudo_fixup) |
10718 | { | |
800eeca4 JW |
10719 | exp->X_op = O_symbol; |
10720 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10721 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10722 | } |
3969b680 | 10723 | |
800eeca4 JW |
10724 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10725 | /* We need to store the byte order in effect in case we're going | |
10726 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 10727 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
10728 | fix->tc_fix_data.bigendian = target_big_endian; |
10729 | } | |
10730 | ||
10731 | /* Return the actual relocation we wish to associate with the pseudo | |
10732 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10733 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10734 | |
10735 | static bfd_reloc_code_real_type | |
10736 | ia64_gen_real_reloc_type (sym, r_type) | |
10737 | struct symbol *sym; | |
10738 | bfd_reloc_code_real_type r_type; | |
10739 | { | |
10740 | bfd_reloc_code_real_type new = 0; | |
0ca3e455 | 10741 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
10742 | |
10743 | if (sym == NULL) | |
10744 | { | |
10745 | return r_type; | |
10746 | } | |
10747 | ||
10748 | switch (S_GET_VALUE (sym)) | |
10749 | { | |
10750 | case FUNC_FPTR_RELATIVE: | |
10751 | switch (r_type) | |
10752 | { | |
10753 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
10754 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
10755 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
10756 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
10757 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 10758 | default: type = "FPTR"; break; |
800eeca4 JW |
10759 | } |
10760 | break; | |
10761 | ||
10762 | case FUNC_GP_RELATIVE: | |
10763 | switch (r_type) | |
10764 | { | |
10765 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
10766 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
10767 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
10768 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
10769 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
10770 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 10771 | default: type = "GPREL"; break; |
800eeca4 JW |
10772 | } |
10773 | break; | |
10774 | ||
10775 | case FUNC_LT_RELATIVE: | |
10776 | switch (r_type) | |
10777 | { | |
10778 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
10779 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 10780 | default: type = "LTOFF"; break; |
800eeca4 JW |
10781 | } |
10782 | break; | |
10783 | ||
fa2c7eff RH |
10784 | case FUNC_LT_RELATIVE_X: |
10785 | switch (r_type) | |
10786 | { | |
10787 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
0ca3e455 | 10788 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
10789 | } |
10790 | break; | |
10791 | ||
c67e42c9 RH |
10792 | case FUNC_PC_RELATIVE: |
10793 | switch (r_type) | |
10794 | { | |
10795 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
10796 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
10797 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
10798 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
10799 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
10800 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 10801 | default: type = "PCREL"; break; |
c67e42c9 RH |
10802 | } |
10803 | break; | |
10804 | ||
800eeca4 JW |
10805 | case FUNC_PLT_RELATIVE: |
10806 | switch (r_type) | |
10807 | { | |
10808 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
10809 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
10810 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10811 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 10812 | default: type = "PLTOFF"; break; |
800eeca4 JW |
10813 | } |
10814 | break; | |
10815 | ||
10816 | case FUNC_SEC_RELATIVE: | |
10817 | switch (r_type) | |
10818 | { | |
10819 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
10820 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
10821 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
10822 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 10823 | default: type = "SECREL"; break; |
800eeca4 JW |
10824 | } |
10825 | break; | |
10826 | ||
10827 | case FUNC_SEG_RELATIVE: | |
10828 | switch (r_type) | |
10829 | { | |
10830 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
10831 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
10832 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
10833 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 10834 | default: type = "SEGREL"; break; |
800eeca4 JW |
10835 | } |
10836 | break; | |
10837 | ||
10838 | case FUNC_LTV_RELATIVE: | |
10839 | switch (r_type) | |
10840 | { | |
10841 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
10842 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
10843 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
10844 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 10845 | default: type = "LTV"; break; |
800eeca4 JW |
10846 | } |
10847 | break; | |
10848 | ||
10849 | case FUNC_LT_FPTR_RELATIVE: | |
10850 | switch (r_type) | |
10851 | { | |
10852 | case BFD_RELOC_IA64_IMM22: | |
10853 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
10854 | case BFD_RELOC_IA64_IMM64: | |
10855 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
0ca3e455 JB |
10856 | case BFD_RELOC_IA64_DIR32MSB: |
10857 | new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; | |
10858 | case BFD_RELOC_IA64_DIR32LSB: | |
10859 | new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; | |
10860 | case BFD_RELOC_IA64_DIR64MSB: | |
10861 | new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; | |
10862 | case BFD_RELOC_IA64_DIR64LSB: | |
10863 | new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; | |
800eeca4 | 10864 | default: |
0ca3e455 | 10865 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
10866 | } |
10867 | break; | |
3969b680 | 10868 | |
13ae64f3 JJ |
10869 | case FUNC_TP_RELATIVE: |
10870 | switch (r_type) | |
10871 | { | |
0ca3e455 JB |
10872 | case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; |
10873 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; | |
10874 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; | |
10875 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; | |
10876 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; | |
10877 | default: type = "TPREL"; break; | |
13ae64f3 JJ |
10878 | } |
10879 | break; | |
10880 | ||
10881 | case FUNC_LT_TP_RELATIVE: | |
10882 | switch (r_type) | |
10883 | { | |
10884 | case BFD_RELOC_IA64_IMM22: | |
10885 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
10886 | default: | |
0ca3e455 JB |
10887 | type = "LTOFF_TPREL"; break; |
10888 | } | |
10889 | break; | |
10890 | ||
10891 | case FUNC_DTP_MODULE: | |
10892 | switch (r_type) | |
10893 | { | |
10894 | case BFD_RELOC_IA64_DIR64MSB: | |
10895 | new = BFD_RELOC_IA64_DTPMOD64MSB; break; | |
10896 | case BFD_RELOC_IA64_DIR64LSB: | |
10897 | new = BFD_RELOC_IA64_DTPMOD64LSB; break; | |
10898 | default: | |
10899 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
10900 | } |
10901 | break; | |
10902 | ||
10903 | case FUNC_LT_DTP_MODULE: | |
10904 | switch (r_type) | |
10905 | { | |
10906 | case BFD_RELOC_IA64_IMM22: | |
10907 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
10908 | default: | |
0ca3e455 | 10909 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
10910 | } |
10911 | break; | |
10912 | ||
10913 | case FUNC_DTP_RELATIVE: | |
10914 | switch (r_type) | |
10915 | { | |
0ca3e455 JB |
10916 | case BFD_RELOC_IA64_DIR32MSB: |
10917 | new = BFD_RELOC_IA64_DTPREL32MSB; break; | |
10918 | case BFD_RELOC_IA64_DIR32LSB: | |
10919 | new = BFD_RELOC_IA64_DTPREL32LSB; break; | |
6174d9c8 RH |
10920 | case BFD_RELOC_IA64_DIR64MSB: |
10921 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
10922 | case BFD_RELOC_IA64_DIR64LSB: | |
10923 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
10924 | case BFD_RELOC_IA64_IMM14: |
10925 | new = BFD_RELOC_IA64_DTPREL14; break; | |
10926 | case BFD_RELOC_IA64_IMM22: | |
10927 | new = BFD_RELOC_IA64_DTPREL22; break; | |
10928 | case BFD_RELOC_IA64_IMM64: | |
10929 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
10930 | default: | |
0ca3e455 | 10931 | type = "DTPREL"; break; |
13ae64f3 JJ |
10932 | } |
10933 | break; | |
10934 | ||
10935 | case FUNC_LT_DTP_RELATIVE: | |
10936 | switch (r_type) | |
10937 | { | |
10938 | case BFD_RELOC_IA64_IMM22: | |
10939 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
10940 | default: | |
0ca3e455 | 10941 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
10942 | } |
10943 | break; | |
10944 | ||
40449e9f | 10945 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
10946 | switch (r_type) |
10947 | { | |
10948 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
10949 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
10950 | default: type = "IPLT"; break; | |
10951 | } | |
40449e9f | 10952 | break; |
1cd8ff38 | 10953 | |
800eeca4 JW |
10954 | default: |
10955 | abort (); | |
10956 | } | |
6174d9c8 | 10957 | |
800eeca4 JW |
10958 | if (new) |
10959 | return new; | |
10960 | else | |
0ca3e455 JB |
10961 | { |
10962 | int width; | |
10963 | ||
10964 | if (!type) | |
10965 | abort (); | |
10966 | switch (r_type) | |
10967 | { | |
10968 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
10969 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
10970 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
10971 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
10972 | case BFD_RELOC_IA64_IMM14: width = 14; break; | |
10973 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
10974 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
10975 | default: abort (); | |
10976 | } | |
10977 | ||
10978 | /* This should be an error, but since previously there wasn't any | |
10979 | diagnostic here, dont't make it fail because of this for now. */ | |
10980 | as_warn ("Cannot express %s%d%s relocation", type, width, suffix); | |
10981 | return r_type; | |
10982 | } | |
800eeca4 JW |
10983 | } |
10984 | ||
10985 | /* Here is where generate the appropriate reloc for pseudo relocation | |
10986 | functions. */ | |
10987 | void | |
10988 | ia64_validate_fix (fix) | |
10989 | fixS *fix; | |
10990 | { | |
10991 | switch (fix->fx_r_type) | |
10992 | { | |
10993 | case BFD_RELOC_IA64_FPTR64I: | |
10994 | case BFD_RELOC_IA64_FPTR32MSB: | |
10995 | case BFD_RELOC_IA64_FPTR64LSB: | |
10996 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10997 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10998 | if (fix->fx_offset != 0) | |
10999 | as_bad_where (fix->fx_file, fix->fx_line, | |
11000 | "No addend allowed in @fptr() relocation"); | |
11001 | break; | |
11002 | default: | |
11003 | break; | |
11004 | } | |
800eeca4 JW |
11005 | } |
11006 | ||
11007 | static void | |
11008 | fix_insn (fix, odesc, value) | |
11009 | fixS *fix; | |
11010 | const struct ia64_operand *odesc; | |
11011 | valueT value; | |
11012 | { | |
11013 | bfd_vma insn[3], t0, t1, control_bits; | |
11014 | const char *err; | |
11015 | char *fixpos; | |
11016 | long slot; | |
11017 | ||
11018 | slot = fix->fx_where & 0x3; | |
11019 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11020 | ||
c67e42c9 | 11021 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11022 | t0 = bfd_getl64 (fixpos); |
11023 | t1 = bfd_getl64 (fixpos + 8); | |
11024 | control_bits = t0 & 0x1f; | |
11025 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11026 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11027 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11028 | ||
c67e42c9 RH |
11029 | err = NULL; |
11030 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11031 | { |
c67e42c9 RH |
11032 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11033 | insn[2] |= (((value & 0x7f) << 13) | |
11034 | | (((value >> 7) & 0x1ff) << 27) | |
11035 | | (((value >> 16) & 0x1f) << 22) | |
11036 | | (((value >> 21) & 0x1) << 21) | |
11037 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11038 | } |
c67e42c9 RH |
11039 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11040 | { | |
11041 | if (value & ~0x3fffffffffffffffULL) | |
11042 | err = "integer operand out of range"; | |
11043 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
11044 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11045 | } | |
11046 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11047 | { | |
11048 | value >>= 4; | |
11049 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11050 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11051 | | (((value >> 0) & 0xfffff) << 13)); | |
11052 | } | |
11053 | else | |
11054 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11055 | ||
11056 | if (err) | |
11057 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
11058 | |
11059 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11060 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11061 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11062 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11063 | } |
11064 | ||
11065 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11066 | ignored; perhaps it was once meaningful, but now it is historical. | |
11067 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11068 | ||
11069 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11070 | (if possible). */ |
94f592af NC |
11071 | |
11072 | void | |
11073 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 11074 | fixS *fix; |
40449e9f | 11075 | valueT *valP; |
2434f565 | 11076 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
11077 | { |
11078 | char *fixpos; | |
40449e9f | 11079 | valueT value = *valP; |
800eeca4 JW |
11080 | |
11081 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11082 | ||
11083 | if (fix->fx_pcrel) | |
11084 | { | |
11085 | switch (fix->fx_r_type) | |
11086 | { | |
11087 | case BFD_RELOC_IA64_DIR32MSB: | |
11088 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB; | |
800eeca4 JW |
11089 | break; |
11090 | ||
11091 | case BFD_RELOC_IA64_DIR32LSB: | |
11092 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB; | |
800eeca4 JW |
11093 | break; |
11094 | ||
11095 | case BFD_RELOC_IA64_DIR64MSB: | |
11096 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB; | |
800eeca4 JW |
11097 | break; |
11098 | ||
11099 | case BFD_RELOC_IA64_DIR64LSB: | |
11100 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB; | |
800eeca4 JW |
11101 | break; |
11102 | ||
11103 | default: | |
11104 | break; | |
11105 | } | |
11106 | } | |
11107 | if (fix->fx_addsy) | |
11108 | { | |
00f7efb6 | 11109 | switch (fix->fx_r_type) |
800eeca4 | 11110 | { |
00f7efb6 | 11111 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11112 | /* This must be a TAG13 or TAG13b operand. There are no external |
11113 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
11114 | as_bad_where (fix->fx_file, fix->fx_line, |
11115 | "%s must have a constant value", | |
11116 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 11117 | fix->fx_done = 1; |
94f592af | 11118 | return; |
00f7efb6 JJ |
11119 | |
11120 | case BFD_RELOC_IA64_TPREL14: | |
11121 | case BFD_RELOC_IA64_TPREL22: | |
11122 | case BFD_RELOC_IA64_TPREL64I: | |
11123 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11124 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11125 | case BFD_RELOC_IA64_DTPREL14: | |
11126 | case BFD_RELOC_IA64_DTPREL22: | |
11127 | case BFD_RELOC_IA64_DTPREL64I: | |
11128 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11129 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11130 | break; | |
7925dd68 JJ |
11131 | |
11132 | default: | |
11133 | break; | |
800eeca4 | 11134 | } |
800eeca4 JW |
11135 | } |
11136 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11137 | { | |
11138 | if (fix->tc_fix_data.bigendian) | |
11139 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11140 | else | |
11141 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11142 | fix->fx_done = 1; | |
800eeca4 JW |
11143 | } |
11144 | else | |
11145 | { | |
11146 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11147 | fix->fx_done = 1; | |
800eeca4 | 11148 | } |
800eeca4 JW |
11149 | } |
11150 | ||
11151 | /* Generate the BFD reloc to be stuck in the object file from the | |
11152 | fixup used internally in the assembler. */ | |
542d6675 KH |
11153 | |
11154 | arelent * | |
800eeca4 | 11155 | tc_gen_reloc (sec, fixp) |
2434f565 | 11156 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
11157 | fixS *fixp; |
11158 | { | |
11159 | arelent *reloc; | |
11160 | ||
11161 | reloc = xmalloc (sizeof (*reloc)); | |
11162 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11163 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11164 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11165 | reloc->addend = fixp->fx_offset; | |
11166 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11167 | ||
11168 | if (!reloc->howto) | |
11169 | { | |
11170 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
11171 | "Cannot represent %s relocation in object file", | |
11172 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
11173 | } | |
11174 | return reloc; | |
11175 | } | |
11176 | ||
11177 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11178 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11179 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11180 | returned, or NULL on OK. */ |
11181 | ||
11182 | #define MAX_LITTLENUMS 5 | |
11183 | ||
542d6675 | 11184 | char * |
800eeca4 JW |
11185 | md_atof (type, lit, size) |
11186 | int type; | |
11187 | char *lit; | |
11188 | int *size; | |
11189 | { | |
11190 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11191 | char *t; |
11192 | int prec; | |
11193 | ||
11194 | switch (type) | |
11195 | { | |
11196 | /* IEEE floats */ | |
11197 | case 'f': | |
11198 | case 'F': | |
11199 | case 's': | |
11200 | case 'S': | |
11201 | prec = 2; | |
11202 | break; | |
11203 | ||
11204 | case 'd': | |
11205 | case 'D': | |
11206 | case 'r': | |
11207 | case 'R': | |
11208 | prec = 4; | |
11209 | break; | |
11210 | ||
11211 | case 'x': | |
11212 | case 'X': | |
11213 | case 'p': | |
11214 | case 'P': | |
11215 | prec = 5; | |
11216 | break; | |
11217 | ||
11218 | default: | |
11219 | *size = 0; | |
11220 | return "Bad call to MD_ATOF()"; | |
11221 | } | |
11222 | t = atof_ieee (input_line_pointer, type, words); | |
11223 | if (t) | |
11224 | input_line_pointer = t; | |
800eeca4 | 11225 | |
10a98291 L |
11226 | (*ia64_float_to_chars) (lit, words, prec); |
11227 | ||
165a7f90 L |
11228 | if (type == 'X') |
11229 | { | |
11230 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11231 | memset (&lit [10], 0, 6); |
165a7f90 L |
11232 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11233 | } | |
10a98291 L |
11234 | else |
11235 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11236 | ||
800eeca4 JW |
11237 | return 0; |
11238 | } | |
11239 | ||
800eeca4 JW |
11240 | /* Handle ia64 specific semantics of the align directive. */ |
11241 | ||
0a9ef439 | 11242 | void |
800eeca4 | 11243 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
11244 | int n ATTRIBUTE_UNUSED; |
11245 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 11246 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 11247 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 11248 | { |
0a9ef439 | 11249 | if (subseg_text_p (now_seg)) |
800eeca4 | 11250 | ia64_flush_insns (); |
0a9ef439 | 11251 | } |
800eeca4 | 11252 | |
0a9ef439 RH |
11253 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11254 | of an rs_align_code fragment. */ | |
800eeca4 | 11255 | |
0a9ef439 RH |
11256 | void |
11257 | ia64_handle_align (fragp) | |
11258 | fragS *fragp; | |
11259 | { | |
11260 | /* Use mfi bundle of nops with no stop bits. */ | |
0a9ef439 RH |
11261 | static const unsigned char le_nop[] |
11262 | = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
11263 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
9545c4ce L |
11264 | static const unsigned char le_nop_stop[] |
11265 | = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
11266 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
0a9ef439 RH |
11267 | |
11268 | int bytes; | |
11269 | char *p; | |
9545c4ce | 11270 | const unsigned char *nop; |
0a9ef439 RH |
11271 | |
11272 | if (fragp->fr_type != rs_align_code) | |
11273 | return; | |
11274 | ||
9545c4ce L |
11275 | /* Check if this frag has to end with a stop bit. */ |
11276 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11277 | ||
0a9ef439 RH |
11278 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11279 | p = fragp->fr_literal + fragp->fr_fix; | |
11280 | ||
d9201763 L |
11281 | /* If no paddings are needed, we check if we need a stop bit. */ |
11282 | if (!bytes && fragp->tc_frag_data) | |
11283 | { | |
11284 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11285 | #if 1 |
11286 | /* FIXME: It won't work with | |
11287 | .align 16 | |
11288 | alloc r32=ar.pfs,1,2,4,0 | |
11289 | */ | |
11290 | ; | |
11291 | #else | |
d9201763 L |
11292 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11293 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11294 | #endif |
d9201763 L |
11295 | else |
11296 | /* Bundles are always in little-endian byte order. Make sure | |
11297 | the previous bundle has the stop bit. */ | |
11298 | *(p - 16) |= 1; | |
11299 | } | |
11300 | ||
0a9ef439 RH |
11301 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11302 | putting data into a text section. */ | |
11303 | if (bytes & 15) | |
11304 | { | |
11305 | int fix = bytes & 15; | |
11306 | memset (p, 0, fix); | |
11307 | p += fix; | |
11308 | bytes -= fix; | |
11309 | fragp->fr_fix += fix; | |
800eeca4 JW |
11310 | } |
11311 | ||
012a452b | 11312 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11313 | memcpy (p, nop, 16); |
0a9ef439 | 11314 | fragp->fr_var = 16; |
800eeca4 | 11315 | } |
10a98291 L |
11316 | |
11317 | static void | |
11318 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11319 | int prec) | |
11320 | { | |
11321 | while (prec--) | |
11322 | { | |
11323 | number_to_chars_bigendian (lit, (long) (*words++), | |
11324 | sizeof (LITTLENUM_TYPE)); | |
11325 | lit += sizeof (LITTLENUM_TYPE); | |
11326 | } | |
11327 | } | |
11328 | ||
11329 | static void | |
11330 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11331 | int prec) | |
11332 | { | |
11333 | while (prec--) | |
11334 | { | |
11335 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11336 | sizeof (LITTLENUM_TYPE)); | |
11337 | lit += sizeof (LITTLENUM_TYPE); | |
11338 | } | |
11339 | } | |
11340 | ||
11341 | void | |
11342 | ia64_elf_section_change_hook (void) | |
11343 | { | |
38ce5b11 L |
11344 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11345 | && elf_linked_to_section (now_seg) == NULL) | |
11346 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11347 | dot_byteorder (-1); |
11348 | } | |
a645d1eb L |
11349 | |
11350 | /* Check if a label should be made global. */ | |
11351 | void | |
11352 | ia64_check_label (symbolS *label) | |
11353 | { | |
11354 | if (*input_line_pointer == ':') | |
11355 | { | |
11356 | S_SET_EXTERNAL (label); | |
11357 | input_line_pointer++; | |
11358 | } | |
11359 | } | |
35f5df7f L |
11360 | |
11361 | /* Used to remember where .alias and .secalias directives are seen. We | |
11362 | will rename symbol and section names when we are about to output | |
11363 | the relocatable file. */ | |
11364 | struct alias | |
11365 | { | |
11366 | char *file; /* The file where the directive is seen. */ | |
11367 | unsigned int line; /* The line number the directive is at. */ | |
11368 | const char *name; /* The orignale name of the symbol. */ | |
11369 | }; | |
11370 | ||
11371 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11372 | .secalias. Otherwise, it is .alias. */ | |
11373 | static void | |
11374 | dot_alias (int section) | |
11375 | { | |
11376 | char *name, *alias; | |
11377 | char delim; | |
11378 | char *end_name; | |
11379 | int len; | |
11380 | const char *error_string; | |
11381 | struct alias *h; | |
11382 | const char *a; | |
11383 | struct hash_control *ahash, *nhash; | |
11384 | const char *kind; | |
11385 | ||
11386 | name = input_line_pointer; | |
11387 | delim = get_symbol_end (); | |
11388 | end_name = input_line_pointer; | |
11389 | *end_name = delim; | |
11390 | ||
11391 | if (name == end_name) | |
11392 | { | |
11393 | as_bad (_("expected symbol name")); | |
11394 | discard_rest_of_line (); | |
11395 | return; | |
11396 | } | |
11397 | ||
11398 | SKIP_WHITESPACE (); | |
11399 | ||
11400 | if (*input_line_pointer != ',') | |
11401 | { | |
11402 | *end_name = 0; | |
11403 | as_bad (_("expected comma after \"%s\""), name); | |
11404 | *end_name = delim; | |
11405 | ignore_rest_of_line (); | |
11406 | return; | |
11407 | } | |
11408 | ||
11409 | input_line_pointer++; | |
11410 | *end_name = 0; | |
20b36a95 | 11411 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11412 | |
11413 | /* We call demand_copy_C_string to check if alias string is valid. | |
11414 | There should be a closing `"' and no `\0' in the string. */ | |
11415 | alias = demand_copy_C_string (&len); | |
11416 | if (alias == NULL) | |
11417 | { | |
11418 | ignore_rest_of_line (); | |
11419 | return; | |
11420 | } | |
11421 | ||
11422 | /* Make a copy of name string. */ | |
11423 | len = strlen (name) + 1; | |
11424 | obstack_grow (¬es, name, len); | |
11425 | name = obstack_finish (¬es); | |
11426 | ||
11427 | if (section) | |
11428 | { | |
11429 | kind = "section"; | |
11430 | ahash = secalias_hash; | |
11431 | nhash = secalias_name_hash; | |
11432 | } | |
11433 | else | |
11434 | { | |
11435 | kind = "symbol"; | |
11436 | ahash = alias_hash; | |
11437 | nhash = alias_name_hash; | |
11438 | } | |
11439 | ||
11440 | /* Check if alias has been used before. */ | |
11441 | h = (struct alias *) hash_find (ahash, alias); | |
11442 | if (h) | |
11443 | { | |
11444 | if (strcmp (h->name, name)) | |
11445 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11446 | alias, kind, h->name); | |
11447 | goto out; | |
11448 | } | |
11449 | ||
11450 | /* Check if name already has an alias. */ | |
11451 | a = (const char *) hash_find (nhash, name); | |
11452 | if (a) | |
11453 | { | |
11454 | if (strcmp (a, alias)) | |
11455 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11456 | goto out; | |
11457 | } | |
11458 | ||
11459 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11460 | as_where (&h->file, &h->line); | |
11461 | h->name = name; | |
11462 | ||
11463 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11464 | if (error_string) | |
11465 | { | |
11466 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11467 | alias, kind, error_string); | |
11468 | goto out; | |
11469 | } | |
11470 | ||
11471 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11472 | if (error_string) | |
11473 | { | |
11474 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11475 | alias, kind, error_string); | |
11476 | out: | |
11477 | obstack_free (¬es, name); | |
11478 | obstack_free (¬es, alias); | |
11479 | } | |
11480 | ||
11481 | demand_empty_rest_of_line (); | |
11482 | } | |
11483 | ||
11484 | /* It renames the original symbol name to its alias. */ | |
11485 | static void | |
11486 | do_alias (const char *alias, PTR value) | |
11487 | { | |
11488 | struct alias *h = (struct alias *) value; | |
11489 | symbolS *sym = symbol_find (h->name); | |
11490 | ||
11491 | if (sym == NULL) | |
11492 | as_warn_where (h->file, h->line, | |
11493 | _("symbol `%s' aliased to `%s' is not used"), | |
11494 | h->name, alias); | |
11495 | else | |
11496 | S_SET_NAME (sym, (char *) alias); | |
11497 | } | |
11498 | ||
11499 | /* Called from write_object_file. */ | |
11500 | void | |
11501 | ia64_adjust_symtab (void) | |
11502 | { | |
11503 | hash_traverse (alias_hash, do_alias); | |
11504 | } | |
11505 | ||
11506 | /* It renames the original section name to its alias. */ | |
11507 | static void | |
11508 | do_secalias (const char *alias, PTR value) | |
11509 | { | |
11510 | struct alias *h = (struct alias *) value; | |
11511 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11512 | ||
11513 | if (sec == NULL) | |
11514 | as_warn_where (h->file, h->line, | |
11515 | _("section `%s' aliased to `%s' is not used"), | |
11516 | h->name, alias); | |
11517 | else | |
11518 | sec->name = alias; | |
11519 | } | |
11520 | ||
11521 | /* Called from write_object_file. */ | |
11522 | void | |
11523 | ia64_frob_file (void) | |
11524 | { | |
11525 | hash_traverse (secalias_hash, do_secalias); | |
11526 | } |