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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
b3dfd7fe | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
800eeca4 JW |
3 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | /* | |
23 | TODO: | |
24 | ||
25 | - optional operands | |
26 | - directives: | |
800eeca4 JW |
27 | .eb |
28 | .estate | |
29 | .lb | |
30 | .popsection | |
31 | .previous | |
32 | .psr | |
33 | .pushsection | |
800eeca4 JW |
34 | - labels are wrong if automatic alignment is introduced |
35 | (e.g., checkout the second real10 definition in test-data.s) | |
36 | - DV-related stuff: | |
542d6675 KH |
37 | <reg>.safe_across_calls and any other DV-related directives I don't |
38 | have documentation for. | |
39 | verify mod-sched-brs reads/writes are checked/marked (and other | |
40 | notes) | |
800eeca4 JW |
41 | |
42 | */ | |
43 | ||
44 | #include "as.h" | |
3882b010 | 45 | #include "safe-ctype.h" |
800eeca4 JW |
46 | #include "dwarf2dbg.h" |
47 | #include "subsegs.h" | |
48 | ||
49 | #include "opcode/ia64.h" | |
50 | ||
51 | #include "elf/ia64.h" | |
52 | ||
53 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) | |
54 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) | |
55 | ||
56 | #define NUM_SLOTS 4 | |
57 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
58 | #define CURR_SLOT md.slot[md.curr_slot] | |
59 | ||
60 | #define O_pseudo_fixup (O_max + 1) | |
61 | ||
62 | enum special_section | |
63 | { | |
557debba | 64 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
65 | SPECIAL_SECTION_BSS = 0, |
66 | SPECIAL_SECTION_SBSS, | |
67 | SPECIAL_SECTION_SDATA, | |
68 | SPECIAL_SECTION_RODATA, | |
69 | SPECIAL_SECTION_COMMENT, | |
70 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
71 | SPECIAL_SECTION_UNWIND_INFO, |
72 | /* HPUX specific section pseudo-ops. */ | |
73 | SPECIAL_SECTION_INIT_ARRAY, | |
74 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
75 | }; |
76 | ||
77 | enum reloc_func | |
78 | { | |
13ae64f3 JJ |
79 | FUNC_DTP_MODULE, |
80 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
81 | FUNC_FPTR_RELATIVE, |
82 | FUNC_GP_RELATIVE, | |
83 | FUNC_LT_RELATIVE, | |
fa2c7eff | 84 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 85 | FUNC_PC_RELATIVE, |
800eeca4 JW |
86 | FUNC_PLT_RELATIVE, |
87 | FUNC_SEC_RELATIVE, | |
88 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 89 | FUNC_TP_RELATIVE, |
800eeca4 JW |
90 | FUNC_LTV_RELATIVE, |
91 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
92 | FUNC_LT_DTP_MODULE, |
93 | FUNC_LT_DTP_RELATIVE, | |
94 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 95 | FUNC_IPLT_RELOC, |
800eeca4 JW |
96 | }; |
97 | ||
98 | enum reg_symbol | |
99 | { | |
100 | REG_GR = 0, | |
101 | REG_FR = (REG_GR + 128), | |
102 | REG_AR = (REG_FR + 128), | |
103 | REG_CR = (REG_AR + 128), | |
104 | REG_P = (REG_CR + 128), | |
105 | REG_BR = (REG_P + 64), | |
106 | REG_IP = (REG_BR + 8), | |
107 | REG_CFM, | |
108 | REG_PR, | |
109 | REG_PR_ROT, | |
110 | REG_PSR, | |
111 | REG_PSR_L, | |
112 | REG_PSR_UM, | |
113 | /* The following are pseudo-registers for use by gas only. */ | |
114 | IND_CPUID, | |
115 | IND_DBR, | |
116 | IND_DTR, | |
117 | IND_ITR, | |
118 | IND_IBR, | |
119 | IND_MEM, | |
120 | IND_MSR, | |
121 | IND_PKR, | |
122 | IND_PMC, | |
123 | IND_PMD, | |
124 | IND_RR, | |
542d6675 | 125 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
126 | REG_PSP, |
127 | REG_PRIUNAT, | |
800eeca4 JW |
128 | REG_NUM |
129 | }; | |
130 | ||
131 | enum dynreg_type | |
132 | { | |
133 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
134 | DYNREG_FR, /* dynamic floating point register */ | |
135 | DYNREG_PR, /* dynamic predicate register */ | |
136 | DYNREG_NUM_TYPES | |
137 | }; | |
138 | ||
87f8eb97 JW |
139 | enum operand_match_result |
140 | { | |
141 | OPERAND_MATCH, | |
142 | OPERAND_OUT_OF_RANGE, | |
143 | OPERAND_MISMATCH | |
144 | }; | |
145 | ||
800eeca4 JW |
146 | /* On the ia64, we can't know the address of a text label until the |
147 | instructions are packed into a bundle. To handle this, we keep | |
148 | track of the list of labels that appear in front of each | |
149 | instruction. */ | |
150 | struct label_fix | |
542d6675 KH |
151 | { |
152 | struct label_fix *next; | |
153 | struct symbol *sym; | |
154 | }; | |
800eeca4 JW |
155 | |
156 | extern int target_big_endian; | |
157 | ||
10a98291 L |
158 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
159 | ||
160 | static void ia64_float_to_chars_bigendian | |
161 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
162 | static void ia64_float_to_chars_littleendian | |
163 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
164 | static void (*ia64_float_to_chars) | |
165 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
166 | ||
35f5df7f L |
167 | static struct hash_control *alias_hash; |
168 | static struct hash_control *alias_name_hash; | |
169 | static struct hash_control *secalias_hash; | |
170 | static struct hash_control *secalias_name_hash; | |
171 | ||
800eeca4 JW |
172 | /* Characters which always start a comment. */ |
173 | const char comment_chars[] = ""; | |
174 | ||
175 | /* Characters which start a comment at the beginning of a line. */ | |
176 | const char line_comment_chars[] = "#"; | |
177 | ||
178 | /* Characters which may be used to separate multiple commands on a | |
179 | single line. */ | |
180 | const char line_separator_chars[] = ";"; | |
181 | ||
182 | /* Characters which are used to indicate an exponent in a floating | |
183 | point number. */ | |
184 | const char EXP_CHARS[] = "eE"; | |
185 | ||
186 | /* Characters which mean that a number is a floating point constant, | |
187 | as in 0d1.0. */ | |
188 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
189 | ||
542d6675 | 190 | /* ia64-specific option processing: */ |
800eeca4 | 191 | |
44f5c83a | 192 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
193 | |
194 | struct option md_longopts[] = | |
195 | { | |
c43c2cc5 JW |
196 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
197 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
198 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
199 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
200 | }; |
201 | ||
202 | size_t md_longopts_size = sizeof (md_longopts); | |
203 | ||
204 | static struct | |
205 | { | |
206 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
207 | struct hash_control *reg_hash; /* register name hash table */ | |
208 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
209 | struct hash_control *const_hash; /* constant hash table */ | |
210 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
211 | ||
212 | symbolS *regsym[REG_NUM]; | |
213 | ||
214 | /* If X_op is != O_absent, the registername for the instruction's | |
215 | qualifying predicate. If NULL, p0 is assumed for instructions | |
216 | that are predicatable. */ | |
217 | expressionS qp; | |
218 | ||
219 | unsigned int | |
197865e8 | 220 | manual_bundling : 1, |
800eeca4 JW |
221 | debug_dv: 1, |
222 | detect_dv: 1, | |
223 | explicit_mode : 1, /* which mode we're in */ | |
224 | default_explicit_mode : 1, /* which mode is the default */ | |
225 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
226 | auto_align : 1, |
227 | keep_pending_output : 1; | |
800eeca4 JW |
228 | |
229 | /* Each bundle consists of up to three instructions. We keep | |
230 | track of four most recent instructions so we can correctly set | |
197865e8 | 231 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
232 | int curr_slot; |
233 | int num_slots_in_use; | |
234 | struct slot | |
235 | { | |
236 | unsigned int | |
237 | end_of_insn_group : 1, | |
238 | manual_bundling_on : 1, | |
239 | manual_bundling_off : 1; | |
240 | signed char user_template; /* user-selected template, if any */ | |
241 | unsigned char qp_regno; /* qualifying predicate */ | |
242 | /* This duplicates a good fraction of "struct fix" but we | |
243 | can't use a "struct fix" instead since we can't call | |
244 | fix_new_exp() until we know the address of the instruction. */ | |
245 | int num_fixups; | |
246 | struct insn_fix | |
247 | { | |
248 | bfd_reloc_code_real_type code; | |
249 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
250 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
251 | expressionS expr; /* the value to be inserted */ | |
252 | } | |
253 | fixup[2]; /* at most two fixups per insn */ | |
254 | struct ia64_opcode *idesc; | |
255 | struct label_fix *label_fixups; | |
f1bcba5b | 256 | struct label_fix *tag_fixups; |
800eeca4 JW |
257 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
258 | expressionS opnd[6]; | |
259 | char *src_file; | |
260 | unsigned int src_line; | |
261 | struct dwarf2_line_info debug_line; | |
262 | } | |
263 | slot[NUM_SLOTS]; | |
264 | ||
265 | segT last_text_seg; | |
266 | ||
267 | struct dynreg | |
268 | { | |
269 | struct dynreg *next; /* next dynamic register */ | |
270 | const char *name; | |
271 | unsigned short base; /* the base register number */ | |
272 | unsigned short num_regs; /* # of registers in this set */ | |
273 | } | |
274 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
275 | ||
276 | flagword flags; /* ELF-header flags */ | |
277 | ||
278 | struct mem_offset { | |
279 | unsigned hint:1; /* is this hint currently valid? */ | |
280 | bfd_vma offset; /* mem.offset offset */ | |
281 | bfd_vma base; /* mem.offset base */ | |
282 | } mem_offset; | |
283 | ||
284 | int path; /* number of alt. entry points seen */ | |
285 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 286 | the current DV-checking block. */ |
800eeca4 | 287 | int maxpaths; /* size currently allocated for |
542d6675 | 288 | entry_labels */ |
88be23ec BS |
289 | /* Support for hardware errata workarounds. */ |
290 | ||
291 | /* Record data about the last three insn groups. */ | |
292 | struct group | |
293 | { | |
294 | /* B-step workaround. | |
295 | For each predicate register, this is set if the corresponding insn | |
296 | group conditionally sets this register with one of the affected | |
297 | instructions. */ | |
298 | int p_reg_set[64]; | |
299 | /* B-step workaround. | |
300 | For each general register, this is set if the corresponding insn | |
301 | a) is conditional one one of the predicate registers for which | |
302 | P_REG_SET is 1 in the corresponding entry of the previous group, | |
303 | b) sets this general register with one of the affected | |
304 | instructions. */ | |
305 | int g_reg_set_conditionally[128]; | |
306 | } last_groups[3]; | |
307 | int group_idx; | |
557debba JW |
308 | |
309 | int pointer_size; /* size in bytes of a pointer */ | |
310 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
311 | } |
312 | md; | |
313 | ||
542d6675 | 314 | /* application registers: */ |
800eeca4 | 315 | |
e0c9811a JW |
316 | #define AR_K0 0 |
317 | #define AR_K7 7 | |
318 | #define AR_RSC 16 | |
319 | #define AR_BSP 17 | |
320 | #define AR_BSPSTORE 18 | |
321 | #define AR_RNAT 19 | |
322 | #define AR_UNAT 36 | |
323 | #define AR_FPSR 40 | |
324 | #define AR_ITC 44 | |
325 | #define AR_PFS 64 | |
326 | #define AR_LC 65 | |
800eeca4 JW |
327 | |
328 | static const struct | |
329 | { | |
330 | const char *name; | |
331 | int regnum; | |
332 | } | |
333 | ar[] = | |
334 | { | |
335 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
336 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
337 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
338 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
339 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
340 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
341 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
342 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
343 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
344 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
345 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 346 | {"ar.ec", 66}, |
800eeca4 JW |
347 | }; |
348 | ||
349 | #define CR_IPSR 16 | |
350 | #define CR_ISR 17 | |
351 | #define CR_IIP 19 | |
352 | #define CR_IFA 20 | |
353 | #define CR_ITIR 21 | |
354 | #define CR_IIPA 22 | |
355 | #define CR_IFS 23 | |
356 | #define CR_IIM 24 | |
357 | #define CR_IHA 25 | |
358 | #define CR_IVR 65 | |
359 | #define CR_TPR 66 | |
360 | #define CR_EOI 67 | |
361 | #define CR_IRR0 68 | |
362 | #define CR_IRR3 71 | |
363 | #define CR_LRR0 80 | |
364 | #define CR_LRR1 81 | |
365 | ||
542d6675 | 366 | /* control registers: */ |
800eeca4 JW |
367 | static const struct |
368 | { | |
369 | const char *name; | |
370 | int regnum; | |
371 | } | |
372 | cr[] = | |
373 | { | |
374 | {"cr.dcr", 0}, | |
375 | {"cr.itm", 1}, | |
376 | {"cr.iva", 2}, | |
377 | {"cr.pta", 8}, | |
378 | {"cr.gpta", 9}, | |
379 | {"cr.ipsr", 16}, | |
380 | {"cr.isr", 17}, | |
381 | {"cr.iip", 19}, | |
382 | {"cr.ifa", 20}, | |
383 | {"cr.itir", 21}, | |
384 | {"cr.iipa", 22}, | |
385 | {"cr.ifs", 23}, | |
386 | {"cr.iim", 24}, | |
387 | {"cr.iha", 25}, | |
388 | {"cr.lid", 64}, | |
389 | {"cr.ivr", 65}, | |
390 | {"cr.tpr", 66}, | |
391 | {"cr.eoi", 67}, | |
392 | {"cr.irr0", 68}, | |
393 | {"cr.irr1", 69}, | |
394 | {"cr.irr2", 70}, | |
395 | {"cr.irr3", 71}, | |
396 | {"cr.itv", 72}, | |
397 | {"cr.pmv", 73}, | |
398 | {"cr.cmcv", 74}, | |
399 | {"cr.lrr0", 80}, | |
400 | {"cr.lrr1", 81} | |
401 | }; | |
402 | ||
403 | #define PSR_MFL 4 | |
404 | #define PSR_IC 13 | |
405 | #define PSR_DFL 18 | |
406 | #define PSR_CPL 32 | |
407 | ||
408 | static const struct const_desc | |
409 | { | |
410 | const char *name; | |
411 | valueT value; | |
412 | } | |
413 | const_bits[] = | |
414 | { | |
542d6675 | 415 | /* PSR constant masks: */ |
800eeca4 JW |
416 | |
417 | /* 0: reserved */ | |
418 | {"psr.be", ((valueT) 1) << 1}, | |
419 | {"psr.up", ((valueT) 1) << 2}, | |
420 | {"psr.ac", ((valueT) 1) << 3}, | |
421 | {"psr.mfl", ((valueT) 1) << 4}, | |
422 | {"psr.mfh", ((valueT) 1) << 5}, | |
423 | /* 6-12: reserved */ | |
424 | {"psr.ic", ((valueT) 1) << 13}, | |
425 | {"psr.i", ((valueT) 1) << 14}, | |
426 | {"psr.pk", ((valueT) 1) << 15}, | |
427 | /* 16: reserved */ | |
428 | {"psr.dt", ((valueT) 1) << 17}, | |
429 | {"psr.dfl", ((valueT) 1) << 18}, | |
430 | {"psr.dfh", ((valueT) 1) << 19}, | |
431 | {"psr.sp", ((valueT) 1) << 20}, | |
432 | {"psr.pp", ((valueT) 1) << 21}, | |
433 | {"psr.di", ((valueT) 1) << 22}, | |
434 | {"psr.si", ((valueT) 1) << 23}, | |
435 | {"psr.db", ((valueT) 1) << 24}, | |
436 | {"psr.lp", ((valueT) 1) << 25}, | |
437 | {"psr.tb", ((valueT) 1) << 26}, | |
438 | {"psr.rt", ((valueT) 1) << 27}, | |
439 | /* 28-31: reserved */ | |
440 | /* 32-33: cpl (current privilege level) */ | |
441 | {"psr.is", ((valueT) 1) << 34}, | |
442 | {"psr.mc", ((valueT) 1) << 35}, | |
443 | {"psr.it", ((valueT) 1) << 36}, | |
444 | {"psr.id", ((valueT) 1) << 37}, | |
445 | {"psr.da", ((valueT) 1) << 38}, | |
446 | {"psr.dd", ((valueT) 1) << 39}, | |
447 | {"psr.ss", ((valueT) 1) << 40}, | |
448 | /* 41-42: ri (restart instruction) */ | |
449 | {"psr.ed", ((valueT) 1) << 43}, | |
450 | {"psr.bn", ((valueT) 1) << 44}, | |
451 | }; | |
452 | ||
542d6675 | 453 | /* indirect register-sets/memory: */ |
800eeca4 JW |
454 | |
455 | static const struct | |
456 | { | |
457 | const char *name; | |
458 | int regnum; | |
459 | } | |
460 | indirect_reg[] = | |
461 | { | |
462 | { "CPUID", IND_CPUID }, | |
463 | { "cpuid", IND_CPUID }, | |
464 | { "dbr", IND_DBR }, | |
465 | { "dtr", IND_DTR }, | |
466 | { "itr", IND_ITR }, | |
467 | { "ibr", IND_IBR }, | |
468 | { "msr", IND_MSR }, | |
469 | { "pkr", IND_PKR }, | |
470 | { "pmc", IND_PMC }, | |
471 | { "pmd", IND_PMD }, | |
472 | { "rr", IND_RR }, | |
473 | }; | |
474 | ||
475 | /* Pseudo functions used to indicate relocation types (these functions | |
476 | start with an at sign (@). */ | |
477 | static struct | |
478 | { | |
479 | const char *name; | |
480 | enum pseudo_type | |
481 | { | |
482 | PSEUDO_FUNC_NONE, | |
483 | PSEUDO_FUNC_RELOC, | |
484 | PSEUDO_FUNC_CONST, | |
e0c9811a | 485 | PSEUDO_FUNC_REG, |
800eeca4 JW |
486 | PSEUDO_FUNC_FLOAT |
487 | } | |
488 | type; | |
489 | union | |
490 | { | |
491 | unsigned long ival; | |
492 | symbolS *sym; | |
493 | } | |
494 | u; | |
495 | } | |
496 | pseudo_func[] = | |
497 | { | |
542d6675 | 498 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
499 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
500 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
501 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
502 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
503 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 504 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
505 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
506 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
507 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
508 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 509 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
510 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
511 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ | |
13ae64f3 JJ |
512 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ |
513 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
514 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 515 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 516 | |
542d6675 | 517 | /* mbtype4 constants: */ |
800eeca4 JW |
518 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
519 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
520 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
521 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
522 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
523 | ||
542d6675 | 524 | /* fclass constants: */ |
bf3ca999 | 525 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
526 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
527 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
528 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
529 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
530 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
531 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
532 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
533 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
534 | |
535 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 536 | |
c10d9d8f JW |
537 | /* hint constants: */ |
538 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
539 | ||
542d6675 | 540 | /* unwind-related constants: */ |
041340ad JW |
541 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
542 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
543 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
544 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
545 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
546 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
547 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 548 | |
542d6675 | 549 | /* unwind-related registers: */ |
e0c9811a | 550 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
551 | }; |
552 | ||
542d6675 | 553 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
554 | static const bfd_vma nop[IA64_NUM_UNITS] = |
555 | { | |
556 | 0x0000000000LL, /* NIL => break 0 */ | |
557 | 0x0008000000LL, /* I-unit nop */ | |
558 | 0x0008000000LL, /* M-unit nop */ | |
559 | 0x4000000000LL, /* B-unit nop */ | |
560 | 0x0008000000LL, /* F-unit nop */ | |
561 | 0x0008000000LL, /* L-"unit" nop */ | |
562 | 0x0008000000LL, /* X-unit nop */ | |
563 | }; | |
564 | ||
565 | /* Can't be `const' as it's passed to input routines (which have the | |
566 | habit of setting temporary sentinels. */ | |
567 | static char special_section_name[][20] = | |
568 | { | |
569 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
570 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
571 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
572 | }; |
573 | ||
579f31ac JJ |
574 | static char *special_linkonce_name[] = |
575 | { | |
576 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
577 | }; | |
578 | ||
800eeca4 JW |
579 | /* The best template for a particular sequence of up to three |
580 | instructions: */ | |
581 | #define N IA64_NUM_TYPES | |
582 | static unsigned char best_template[N][N][N]; | |
583 | #undef N | |
584 | ||
585 | /* Resource dependencies currently in effect */ | |
586 | static struct rsrc { | |
587 | int depind; /* dependency index */ | |
588 | const struct ia64_dependency *dependency; /* actual dependency */ | |
589 | unsigned specific:1, /* is this a specific bit/regno? */ | |
590 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
591 | int index; /* specific regno/bit within dependency */ | |
592 | int note; /* optional qualifying note (0 if none) */ | |
593 | #define STATE_NONE 0 | |
594 | #define STATE_STOP 1 | |
595 | #define STATE_SRLZ 2 | |
596 | int insn_srlz; /* current insn serialization state */ | |
597 | int data_srlz; /* current data serialization state */ | |
598 | int qp_regno; /* qualifying predicate for this usage */ | |
599 | char *file; /* what file marked this dependency */ | |
2434f565 | 600 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 601 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 602 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
603 | int path; /* corresponding code entry index */ |
604 | } *regdeps = NULL; | |
605 | static int regdepslen = 0; | |
606 | static int regdepstotlen = 0; | |
607 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
608 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 609 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 610 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
611 | |
612 | /* Current state of PR mutexation */ | |
613 | static struct qpmutex { | |
614 | valueT prmask; | |
615 | int path; | |
616 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
617 | static int qp_mutexeslen = 0; | |
618 | static int qp_mutexestotlen = 0; | |
197865e8 | 619 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
620 | |
621 | /* Current state of PR implications */ | |
622 | static struct qp_imply { | |
623 | unsigned p1:6; | |
624 | unsigned p2:6; | |
625 | unsigned p2_branched:1; | |
626 | int path; | |
627 | } *qp_implies = NULL; | |
628 | static int qp_implieslen = 0; | |
629 | static int qp_impliestotlen = 0; | |
630 | ||
197865e8 KH |
631 | /* Keep track of static GR values so that indirect register usage can |
632 | sometimes be tracked. */ | |
800eeca4 JW |
633 | static struct gr { |
634 | unsigned known:1; | |
635 | int path; | |
636 | valueT value; | |
2434f565 | 637 | } gr_values[128] = {{ 1, 0, 0 }}; |
800eeca4 JW |
638 | |
639 | /* These are the routines required to output the various types of | |
640 | unwind records. */ | |
641 | ||
f5a30c2e JW |
642 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
643 | frag address here so that if there is a section switch in the middle of | |
644 | a function, then instructions emitted to a different section are not | |
645 | counted. Since there may be more than one frag for a function, this | |
646 | means we also need to keep track of which frag this address belongs to | |
647 | so we can compute inter-frag distances. This also nicely solves the | |
648 | problem with nops emitted for align directives, which can't easily be | |
649 | counted, but can easily be derived from frag sizes. */ | |
650 | ||
800eeca4 JW |
651 | typedef struct unw_rec_list { |
652 | unwind_record r; | |
e0c9811a | 653 | unsigned long slot_number; |
f5a30c2e | 654 | fragS *slot_frag; |
73f20958 L |
655 | unsigned long next_slot_number; |
656 | fragS *next_slot_frag; | |
800eeca4 JW |
657 | struct unw_rec_list *next; |
658 | } unw_rec_list; | |
659 | ||
2434f565 | 660 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 661 | |
6290819d NC |
662 | /* Linked list of saved prologue counts. A very poor |
663 | implementation of a map from label numbers to prologue counts. */ | |
664 | typedef struct label_prologue_count | |
665 | { | |
666 | struct label_prologue_count *next; | |
667 | unsigned long label_number; | |
668 | unsigned int prologue_count; | |
669 | } label_prologue_count; | |
670 | ||
e0c9811a JW |
671 | static struct |
672 | { | |
e0c9811a JW |
673 | /* Maintain a list of unwind entries for the current function. */ |
674 | unw_rec_list *list; | |
675 | unw_rec_list *tail; | |
800eeca4 | 676 | |
e0c9811a JW |
677 | /* Any unwind entires that should be attached to the current slot |
678 | that an insn is being constructed for. */ | |
679 | unw_rec_list *current_entry; | |
800eeca4 | 680 | |
e0c9811a JW |
681 | /* These are used to create the unwind table entry for this function. */ |
682 | symbolS *proc_start; | |
683 | symbolS *proc_end; | |
684 | symbolS *info; /* pointer to unwind info */ | |
685 | symbolS *personality_routine; | |
91a2ae2a RH |
686 | segT saved_text_seg; |
687 | subsegT saved_text_subseg; | |
688 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 689 | |
e0c9811a JW |
690 | /* TRUE if processing unwind directives in a prologue region. */ |
691 | int prologue; | |
30d25259 | 692 | int prologue_mask; |
33d01f33 | 693 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
694 | /* Prologue counts at previous .label_state directives. */ |
695 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 696 | } unwind; |
800eeca4 JW |
697 | |
698 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); | |
699 | ||
0234cb7c | 700 | /* Forward declarations: */ |
800eeca4 JW |
701 | static int ar_is_in_integer_unit PARAMS ((int regnum)); |
702 | static void set_section PARAMS ((char *name)); | |
703 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
704 | unsigned int, unsigned int)); | |
705 | static void dot_radix PARAMS ((int)); | |
706 | static void dot_special_section PARAMS ((int)); | |
707 | static void dot_proc PARAMS ((int)); | |
708 | static void dot_fframe PARAMS ((int)); | |
709 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
710 | static void dot_vframesp PARAMS ((int)); |
711 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
712 | static void dot_save PARAMS ((int)); |
713 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
714 | static void dot_restorereg PARAMS ((int)); |
715 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
716 | static void dot_handlerdata PARAMS ((int)); |
717 | static void dot_unwentry PARAMS ((int)); | |
718 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 719 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
720 | static void dot_saveg PARAMS ((int)); |
721 | static void dot_savef PARAMS ((int)); | |
722 | static void dot_saveb PARAMS ((int)); | |
723 | static void dot_savegf PARAMS ((int)); | |
724 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
725 | static void dot_spillreg PARAMS ((int)); |
726 | static void dot_spillmem PARAMS ((int)); | |
727 | static void dot_spillreg_p PARAMS ((int)); | |
728 | static void dot_spillmem_p PARAMS ((int)); | |
729 | static void dot_label_state PARAMS ((int)); | |
730 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
731 | static void dot_unwabi PARAMS ((int)); |
732 | static void dot_personality PARAMS ((int)); | |
733 | static void dot_body PARAMS ((int)); | |
734 | static void dot_prologue PARAMS ((int)); | |
735 | static void dot_endp PARAMS ((int)); | |
736 | static void dot_template PARAMS ((int)); | |
737 | static void dot_regstk PARAMS ((int)); | |
738 | static void dot_rot PARAMS ((int)); | |
739 | static void dot_byteorder PARAMS ((int)); | |
740 | static void dot_psr PARAMS ((int)); | |
741 | static void dot_alias PARAMS ((int)); | |
742 | static void dot_ln PARAMS ((int)); | |
743 | static char *parse_section_name PARAMS ((void)); | |
744 | static void dot_xdata PARAMS ((int)); | |
745 | static void stmt_float_cons PARAMS ((int)); | |
746 | static void stmt_cons_ua PARAMS ((int)); | |
747 | static void dot_xfloat_cons PARAMS ((int)); | |
748 | static void dot_xstringer PARAMS ((int)); | |
749 | static void dot_xdata_ua PARAMS ((int)); | |
750 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 751 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
752 | static void dot_pred_rel PARAMS ((int)); |
753 | static void dot_reg_val PARAMS ((int)); | |
754 | static void dot_dv_mode PARAMS ((int)); | |
755 | static void dot_entry PARAMS ((int)); | |
756 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 757 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 758 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
759 | static void declare_register_set PARAMS ((const char *, int, int)); |
760 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
761 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
762 | int index, | |
763 | expressionS *e)); | |
800eeca4 JW |
764 | static int parse_operand PARAMS ((expressionS *e)); |
765 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
86cf98f3 | 766 | static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit)); |
800eeca4 JW |
767 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); |
768 | static void emit_one_bundle PARAMS ((void)); | |
769 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 770 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
771 | bfd_reloc_code_real_type r_type)); |
772 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
773 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
774 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
775 | static void add_qp_mutex PARAMS((valueT mask)); |
776 | static void add_qp_imply PARAMS((int p1, int p2)); | |
777 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
778 | static void clear_qp_mutex PARAMS((valueT mask)); | |
779 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 780 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
781 | static void clear_register_values PARAMS ((void)); |
782 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
783 | static void instruction_serialization PARAMS ((void)); |
784 | static void data_serialization PARAMS ((void)); | |
785 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 786 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 787 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 788 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
789 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
790 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
791 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
792 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
793 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
794 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
795 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
796 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
797 | static int qp_mutex PARAMS ((int, int, int)); |
798 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
799 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
800 | static void count_output PARAMS ((int, char *, char *)); | |
801 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
802 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 803 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
804 | static void output_P1_format PARAMS ((vbyte_func, int)); |
805 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
806 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
807 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
808 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
809 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
810 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
811 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
812 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
813 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
814 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
815 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
816 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
817 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
818 | static char format_ab_reg PARAMS ((int, int)); |
819 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
820 | unsigned long)); | |
821 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
822 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
823 | unsigned long)); | |
824 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 825 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
826 | static unw_rec_list *output_prologue PARAMS ((void)); |
827 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
828 | static unw_rec_list *output_body PARAMS ((void)); | |
829 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
830 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
831 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
832 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
833 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
834 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
835 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
836 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
837 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
838 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
839 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
840 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
841 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
842 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
843 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
844 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
845 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
846 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
847 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
848 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
849 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
850 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
851 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
852 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
853 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
854 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
855 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
856 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
857 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
858 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
859 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
860 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
861 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
862 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
863 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
864 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
865 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
866 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
867 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
868 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
869 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
870 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
871 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
872 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
873 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
874 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
875 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
876 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
877 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
878 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
879 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
881 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
882 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
883 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
884 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
885 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
886 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
887 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
888 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
889 | unsigned int)); | |
890 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
891 | unsigned int)); | |
892 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
893 | unsigned int)); | |
894 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
895 | unsigned int, unsigned int)); | |
896 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
897 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
898 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
899 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e JW |
900 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
901 | unsigned long, fragS *)); | |
91a2ae2a | 902 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
150f24a2 | 903 | static void fixup_unw_records PARAMS ((unw_rec_list *)); |
150f24a2 JW |
904 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
905 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
73f20958 | 906 | static void generate_unwind_image PARAMS ((const char *)); |
6290819d NC |
907 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
908 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
909 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a RH |
910 | |
911 | /* Build the unwind section name by appending the (possibly stripped) | |
912 | text section NAME to the unwind PREFIX. The resulting string | |
913 | pointer is assigned to RESULT. The string is allocated on the | |
40449e9f | 914 | stack, so this must be a macro... */ |
91a2ae2a RH |
915 | #define make_unw_section_name(special, text_name, result) \ |
916 | { \ | |
86cf98f3 RH |
917 | const char *_prefix = special_section_name[special]; \ |
918 | const char *_suffix = text_name; \ | |
579f31ac JJ |
919 | size_t _prefix_len, _suffix_len; \ |
920 | char *_result; \ | |
921 | if (strncmp (text_name, ".gnu.linkonce.t.", \ | |
922 | sizeof (".gnu.linkonce.t.") - 1) == 0) \ | |
923 | { \ | |
924 | _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \ | |
925 | _suffix += sizeof (".gnu.linkonce.t.") - 1; \ | |
926 | } \ | |
927 | _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \ | |
928 | _result = alloca (_prefix_len + _suffix_len + 1); \ | |
07726851 KH |
929 | memcpy (_result, _prefix, _prefix_len); \ |
930 | memcpy (_result + _prefix_len, _suffix, _suffix_len); \ | |
579f31ac | 931 | _result[_prefix_len + _suffix_len] = '\0'; \ |
91a2ae2a RH |
932 | result = _result; \ |
933 | } \ | |
934 | while (0) | |
800eeca4 JW |
935 | |
936 | /* Determine if application register REGNUM resides in the integer | |
937 | unit (as opposed to the memory unit). */ | |
938 | static int | |
939 | ar_is_in_integer_unit (reg) | |
940 | int reg; | |
941 | { | |
942 | reg -= REG_AR; | |
943 | ||
944 | return (reg == 64 /* pfs */ | |
945 | || reg == 65 /* lc */ | |
946 | || reg == 66 /* ec */ | |
947 | /* ??? ias accepts and puts these in the integer unit. */ | |
948 | || (reg >= 112 && reg <= 127)); | |
949 | } | |
950 | ||
951 | /* Switch to section NAME and create section if necessary. It's | |
952 | rather ugly that we have to manipulate input_line_pointer but I | |
953 | don't see any other way to accomplish the same thing without | |
954 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
955 | static void | |
956 | set_section (name) | |
957 | char *name; | |
958 | { | |
959 | char *saved_input_line_pointer; | |
960 | ||
961 | saved_input_line_pointer = input_line_pointer; | |
962 | input_line_pointer = name; | |
963 | obj_elf_section (0); | |
964 | input_line_pointer = saved_input_line_pointer; | |
965 | } | |
966 | ||
d61a78a7 RH |
967 | /* Map 's' to SHF_IA_64_SHORT. */ |
968 | ||
969 | int | |
970 | ia64_elf_section_letter (letter, ptr_msg) | |
971 | int letter; | |
972 | char **ptr_msg; | |
973 | { | |
974 | if (letter == 's') | |
975 | return SHF_IA_64_SHORT; | |
711ef82f L |
976 | else if (letter == 'o') |
977 | return SHF_LINK_ORDER; | |
d61a78a7 | 978 | |
711ef82f L |
979 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
980 | return -1; | |
d61a78a7 RH |
981 | } |
982 | ||
800eeca4 JW |
983 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
984 | ||
985 | flagword | |
986 | ia64_elf_section_flags (flags, attr, type) | |
987 | flagword flags; | |
2434f565 | 988 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
989 | { |
990 | if (attr & SHF_IA_64_SHORT) | |
991 | flags |= SEC_SMALL_DATA; | |
992 | return flags; | |
993 | } | |
994 | ||
91a2ae2a RH |
995 | int |
996 | ia64_elf_section_type (str, len) | |
40449e9f KH |
997 | const char *str; |
998 | size_t len; | |
91a2ae2a | 999 | { |
1cd8ff38 | 1000 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1001 | |
1cd8ff38 | 1002 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1003 | return SHT_PROGBITS; |
1004 | ||
1cd8ff38 | 1005 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1006 | return SHT_PROGBITS; |
1007 | ||
1cd8ff38 | 1008 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1009 | return SHT_IA_64_UNWIND; |
1010 | ||
1cd8ff38 | 1011 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1012 | return SHT_IA_64_UNWIND; |
1013 | ||
711ef82f L |
1014 | if (STREQ ("unwind")) |
1015 | return SHT_IA_64_UNWIND; | |
1016 | ||
1cd8ff38 NC |
1017 | if (STREQ ("init_array")) |
1018 | return SHT_INIT_ARRAY; | |
40449e9f | 1019 | |
1cd8ff38 NC |
1020 | if (STREQ ("fini_array")) |
1021 | return SHT_FINI_ARRAY; | |
40449e9f | 1022 | |
91a2ae2a | 1023 | return -1; |
1cd8ff38 | 1024 | #undef STREQ |
91a2ae2a RH |
1025 | } |
1026 | ||
800eeca4 JW |
1027 | static unsigned int |
1028 | set_regstack (ins, locs, outs, rots) | |
1029 | unsigned int ins, locs, outs, rots; | |
1030 | { | |
542d6675 KH |
1031 | /* Size of frame. */ |
1032 | unsigned int sof; | |
800eeca4 JW |
1033 | |
1034 | sof = ins + locs + outs; | |
1035 | if (sof > 96) | |
1036 | { | |
1037 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1038 | return 0; | |
1039 | } | |
1040 | if (rots > sof) | |
1041 | { | |
1042 | as_warn ("Size of rotating registers exceeds frame size"); | |
1043 | return 0; | |
1044 | } | |
1045 | md.in.base = REG_GR + 32; | |
1046 | md.loc.base = md.in.base + ins; | |
1047 | md.out.base = md.loc.base + locs; | |
1048 | ||
1049 | md.in.num_regs = ins; | |
1050 | md.loc.num_regs = locs; | |
1051 | md.out.num_regs = outs; | |
1052 | md.rot.num_regs = rots; | |
1053 | return sof; | |
1054 | } | |
1055 | ||
1056 | void | |
1057 | ia64_flush_insns () | |
1058 | { | |
1059 | struct label_fix *lfix; | |
1060 | segT saved_seg; | |
1061 | subsegT saved_subseg; | |
b44b1b85 | 1062 | unw_rec_list *ptr; |
800eeca4 JW |
1063 | |
1064 | if (!md.last_text_seg) | |
1065 | return; | |
1066 | ||
1067 | saved_seg = now_seg; | |
1068 | saved_subseg = now_subseg; | |
1069 | ||
1070 | subseg_set (md.last_text_seg, 0); | |
1071 | ||
1072 | while (md.num_slots_in_use > 0) | |
1073 | emit_one_bundle (); /* force out queued instructions */ | |
1074 | ||
1075 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1076 | those now: */ |
800eeca4 JW |
1077 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1078 | { | |
1079 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1080 | symbol_set_frag (lfix->sym, frag_now); | |
1081 | } | |
1082 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1083 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1084 | { | |
1085 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1086 | symbol_set_frag (lfix->sym, frag_now); | |
1087 | } | |
1088 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1089 | |
b44b1b85 | 1090 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1091 | resolve those now. We only handle prologue, body, and endp directives |
1092 | here. Give an error for others. */ | |
b44b1b85 JW |
1093 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1094 | { | |
9c59842f | 1095 | switch (ptr->r.type) |
b44b1b85 | 1096 | { |
9c59842f JW |
1097 | case prologue: |
1098 | case prologue_gr: | |
1099 | case body: | |
1100 | case endp: | |
b44b1b85 JW |
1101 | ptr->slot_number = (unsigned long) frag_more (0); |
1102 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1103 | break; |
1104 | ||
1105 | /* Allow any record which doesn't have a "t" field (i.e., | |
1106 | doesn't relate to a particular instruction). */ | |
1107 | case unwabi: | |
1108 | case br_gr: | |
1109 | case copy_state: | |
1110 | case fr_mem: | |
1111 | case frgr_mem: | |
1112 | case gr_gr: | |
1113 | case gr_mem: | |
1114 | case label_state: | |
1115 | case rp_br: | |
1116 | case spill_base: | |
1117 | case spill_mask: | |
1118 | /* nothing */ | |
1119 | break; | |
1120 | ||
1121 | default: | |
1122 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1123 | break; | |
b44b1b85 | 1124 | } |
b44b1b85 JW |
1125 | } |
1126 | unwind.current_entry = NULL; | |
1127 | ||
800eeca4 | 1128 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1129 | |
1130 | if (md.qp.X_op == O_register) | |
1131 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1132 | } |
1133 | ||
1134 | void | |
1135 | ia64_do_align (nbytes) | |
1136 | int nbytes; | |
1137 | { | |
1138 | char *saved_input_line_pointer = input_line_pointer; | |
1139 | ||
1140 | input_line_pointer = ""; | |
1141 | s_align_bytes (nbytes); | |
1142 | input_line_pointer = saved_input_line_pointer; | |
1143 | } | |
1144 | ||
1145 | void | |
1146 | ia64_cons_align (nbytes) | |
1147 | int nbytes; | |
1148 | { | |
1149 | if (md.auto_align) | |
1150 | { | |
1151 | char *saved_input_line_pointer = input_line_pointer; | |
1152 | input_line_pointer = ""; | |
1153 | s_align_bytes (nbytes); | |
1154 | input_line_pointer = saved_input_line_pointer; | |
1155 | } | |
1156 | } | |
1157 | ||
1158 | /* Output COUNT bytes to a memory location. */ | |
1159 | static unsigned char *vbyte_mem_ptr = NULL; | |
1160 | ||
197865e8 | 1161 | void |
800eeca4 JW |
1162 | output_vbyte_mem (count, ptr, comment) |
1163 | int count; | |
1164 | char *ptr; | |
2434f565 | 1165 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1166 | { |
1167 | int x; | |
1168 | if (vbyte_mem_ptr == NULL) | |
1169 | abort (); | |
1170 | ||
1171 | if (count == 0) | |
1172 | return; | |
1173 | for (x = 0; x < count; x++) | |
1174 | *(vbyte_mem_ptr++) = ptr[x]; | |
1175 | } | |
1176 | ||
1177 | /* Count the number of bytes required for records. */ | |
1178 | static int vbyte_count = 0; | |
197865e8 | 1179 | void |
800eeca4 JW |
1180 | count_output (count, ptr, comment) |
1181 | int count; | |
2434f565 JW |
1182 | char *ptr ATTRIBUTE_UNUSED; |
1183 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1184 | { |
1185 | vbyte_count += count; | |
1186 | } | |
1187 | ||
1188 | static void | |
1189 | output_R1_format (f, rtype, rlen) | |
1190 | vbyte_func f; | |
1191 | unw_record_type rtype; | |
1192 | int rlen; | |
1193 | { | |
e0c9811a | 1194 | int r = 0; |
800eeca4 JW |
1195 | char byte; |
1196 | if (rlen > 0x1f) | |
1197 | { | |
1198 | output_R3_format (f, rtype, rlen); | |
1199 | return; | |
1200 | } | |
197865e8 | 1201 | |
e0c9811a JW |
1202 | if (rtype == body) |
1203 | r = 1; | |
1204 | else if (rtype != prologue) | |
1205 | as_bad ("record type is not valid"); | |
1206 | ||
800eeca4 JW |
1207 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1208 | (*f) (1, &byte, NULL); | |
1209 | } | |
1210 | ||
1211 | static void | |
1212 | output_R2_format (f, mask, grsave, rlen) | |
1213 | vbyte_func f; | |
1214 | int mask, grsave; | |
1215 | unsigned long rlen; | |
1216 | { | |
1217 | char bytes[20]; | |
1218 | int count = 2; | |
1219 | mask = (mask & 0x0f); | |
1220 | grsave = (grsave & 0x7f); | |
1221 | ||
1222 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1223 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1224 | count += output_leb128 (bytes + 2, rlen, 0); | |
1225 | (*f) (count, bytes, NULL); | |
1226 | } | |
1227 | ||
1228 | static void | |
1229 | output_R3_format (f, rtype, rlen) | |
1230 | vbyte_func f; | |
1231 | unw_record_type rtype; | |
1232 | unsigned long rlen; | |
1233 | { | |
e0c9811a | 1234 | int r = 0, count; |
800eeca4 JW |
1235 | char bytes[20]; |
1236 | if (rlen <= 0x1f) | |
1237 | { | |
1238 | output_R1_format (f, rtype, rlen); | |
1239 | return; | |
1240 | } | |
197865e8 | 1241 | |
e0c9811a JW |
1242 | if (rtype == body) |
1243 | r = 1; | |
1244 | else if (rtype != prologue) | |
1245 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1246 | bytes[0] = (UNW_R3 | r); |
1247 | count = output_leb128 (bytes + 1, rlen, 0); | |
1248 | (*f) (count + 1, bytes, NULL); | |
1249 | } | |
1250 | ||
1251 | static void | |
1252 | output_P1_format (f, brmask) | |
1253 | vbyte_func f; | |
1254 | int brmask; | |
1255 | { | |
1256 | char byte; | |
1257 | byte = UNW_P1 | (brmask & 0x1f); | |
1258 | (*f) (1, &byte, NULL); | |
1259 | } | |
1260 | ||
1261 | static void | |
1262 | output_P2_format (f, brmask, gr) | |
1263 | vbyte_func f; | |
1264 | int brmask; | |
1265 | int gr; | |
1266 | { | |
1267 | char bytes[2]; | |
1268 | brmask = (brmask & 0x1f); | |
1269 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1270 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1271 | (*f) (2, bytes, NULL); | |
1272 | } | |
1273 | ||
1274 | static void | |
1275 | output_P3_format (f, rtype, reg) | |
1276 | vbyte_func f; | |
1277 | unw_record_type rtype; | |
1278 | int reg; | |
1279 | { | |
1280 | char bytes[2]; | |
e0c9811a | 1281 | int r = 0; |
800eeca4 JW |
1282 | reg = (reg & 0x7f); |
1283 | switch (rtype) | |
542d6675 | 1284 | { |
800eeca4 JW |
1285 | case psp_gr: |
1286 | r = 0; | |
1287 | break; | |
1288 | case rp_gr: | |
1289 | r = 1; | |
1290 | break; | |
1291 | case pfs_gr: | |
1292 | r = 2; | |
1293 | break; | |
1294 | case preds_gr: | |
1295 | r = 3; | |
1296 | break; | |
1297 | case unat_gr: | |
1298 | r = 4; | |
1299 | break; | |
1300 | case lc_gr: | |
1301 | r = 5; | |
1302 | break; | |
1303 | case rp_br: | |
1304 | r = 6; | |
1305 | break; | |
1306 | case rnat_gr: | |
1307 | r = 7; | |
1308 | break; | |
1309 | case bsp_gr: | |
1310 | r = 8; | |
1311 | break; | |
1312 | case bspstore_gr: | |
1313 | r = 9; | |
1314 | break; | |
1315 | case fpsr_gr: | |
1316 | r = 10; | |
1317 | break; | |
1318 | case priunat_gr: | |
1319 | r = 11; | |
1320 | break; | |
1321 | default: | |
1322 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1323 | } |
800eeca4 JW |
1324 | bytes[0] = (UNW_P3 | (r >> 1)); |
1325 | bytes[1] = (((r & 1) << 7) | reg); | |
1326 | (*f) (2, bytes, NULL); | |
1327 | } | |
1328 | ||
800eeca4 | 1329 | static void |
e0c9811a | 1330 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1331 | vbyte_func f; |
e0c9811a JW |
1332 | unsigned char *imask; |
1333 | unsigned long imask_size; | |
800eeca4 | 1334 | { |
e0c9811a JW |
1335 | imask[0] = UNW_P4; |
1336 | (*f) (imask_size, imask, NULL); | |
800eeca4 JW |
1337 | } |
1338 | ||
1339 | static void | |
1340 | output_P5_format (f, grmask, frmask) | |
1341 | vbyte_func f; | |
1342 | int grmask; | |
1343 | unsigned long frmask; | |
1344 | { | |
1345 | char bytes[4]; | |
1346 | grmask = (grmask & 0x0f); | |
1347 | ||
1348 | bytes[0] = UNW_P5; | |
1349 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1350 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1351 | bytes[3] = (frmask & 0x000000ff); | |
1352 | (*f) (4, bytes, NULL); | |
1353 | } | |
1354 | ||
1355 | static void | |
1356 | output_P6_format (f, rtype, rmask) | |
1357 | vbyte_func f; | |
1358 | unw_record_type rtype; | |
1359 | int rmask; | |
1360 | { | |
1361 | char byte; | |
e0c9811a | 1362 | int r = 0; |
197865e8 | 1363 | |
e0c9811a JW |
1364 | if (rtype == gr_mem) |
1365 | r = 1; | |
1366 | else if (rtype != fr_mem) | |
1367 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1368 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1369 | (*f) (1, &byte, NULL); | |
1370 | } | |
1371 | ||
1372 | static void | |
1373 | output_P7_format (f, rtype, w1, w2) | |
1374 | vbyte_func f; | |
1375 | unw_record_type rtype; | |
1376 | unsigned long w1; | |
1377 | unsigned long w2; | |
1378 | { | |
1379 | char bytes[20]; | |
1380 | int count = 1; | |
e0c9811a | 1381 | int r = 0; |
800eeca4 JW |
1382 | count += output_leb128 (bytes + 1, w1, 0); |
1383 | switch (rtype) | |
1384 | { | |
542d6675 KH |
1385 | case mem_stack_f: |
1386 | r = 0; | |
1387 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1388 | break; | |
1389 | case mem_stack_v: | |
1390 | r = 1; | |
1391 | break; | |
1392 | case spill_base: | |
1393 | r = 2; | |
1394 | break; | |
1395 | case psp_sprel: | |
1396 | r = 3; | |
1397 | break; | |
1398 | case rp_when: | |
1399 | r = 4; | |
1400 | break; | |
1401 | case rp_psprel: | |
1402 | r = 5; | |
1403 | break; | |
1404 | case pfs_when: | |
1405 | r = 6; | |
1406 | break; | |
1407 | case pfs_psprel: | |
1408 | r = 7; | |
1409 | break; | |
1410 | case preds_when: | |
1411 | r = 8; | |
1412 | break; | |
1413 | case preds_psprel: | |
1414 | r = 9; | |
1415 | break; | |
1416 | case lc_when: | |
1417 | r = 10; | |
1418 | break; | |
1419 | case lc_psprel: | |
1420 | r = 11; | |
1421 | break; | |
1422 | case unat_when: | |
1423 | r = 12; | |
1424 | break; | |
1425 | case unat_psprel: | |
1426 | r = 13; | |
1427 | break; | |
1428 | case fpsr_when: | |
1429 | r = 14; | |
1430 | break; | |
1431 | case fpsr_psprel: | |
1432 | r = 15; | |
1433 | break; | |
1434 | default: | |
1435 | break; | |
800eeca4 JW |
1436 | } |
1437 | bytes[0] = (UNW_P7 | r); | |
1438 | (*f) (count, bytes, NULL); | |
1439 | } | |
1440 | ||
1441 | static void | |
1442 | output_P8_format (f, rtype, t) | |
1443 | vbyte_func f; | |
1444 | unw_record_type rtype; | |
1445 | unsigned long t; | |
1446 | { | |
1447 | char bytes[20]; | |
e0c9811a | 1448 | int r = 0; |
800eeca4 JW |
1449 | int count = 2; |
1450 | bytes[0] = UNW_P8; | |
1451 | switch (rtype) | |
1452 | { | |
542d6675 KH |
1453 | case rp_sprel: |
1454 | r = 1; | |
1455 | break; | |
1456 | case pfs_sprel: | |
1457 | r = 2; | |
1458 | break; | |
1459 | case preds_sprel: | |
1460 | r = 3; | |
1461 | break; | |
1462 | case lc_sprel: | |
1463 | r = 4; | |
1464 | break; | |
1465 | case unat_sprel: | |
1466 | r = 5; | |
1467 | break; | |
1468 | case fpsr_sprel: | |
1469 | r = 6; | |
1470 | break; | |
1471 | case bsp_when: | |
1472 | r = 7; | |
1473 | break; | |
1474 | case bsp_psprel: | |
1475 | r = 8; | |
1476 | break; | |
1477 | case bsp_sprel: | |
1478 | r = 9; | |
1479 | break; | |
1480 | case bspstore_when: | |
1481 | r = 10; | |
1482 | break; | |
1483 | case bspstore_psprel: | |
1484 | r = 11; | |
1485 | break; | |
1486 | case bspstore_sprel: | |
1487 | r = 12; | |
1488 | break; | |
1489 | case rnat_when: | |
1490 | r = 13; | |
1491 | break; | |
1492 | case rnat_psprel: | |
1493 | r = 14; | |
1494 | break; | |
1495 | case rnat_sprel: | |
1496 | r = 15; | |
1497 | break; | |
1498 | case priunat_when_gr: | |
1499 | r = 16; | |
1500 | break; | |
1501 | case priunat_psprel: | |
1502 | r = 17; | |
1503 | break; | |
1504 | case priunat_sprel: | |
1505 | r = 18; | |
1506 | break; | |
1507 | case priunat_when_mem: | |
1508 | r = 19; | |
1509 | break; | |
1510 | default: | |
1511 | break; | |
800eeca4 JW |
1512 | } |
1513 | bytes[1] = r; | |
1514 | count += output_leb128 (bytes + 2, t, 0); | |
1515 | (*f) (count, bytes, NULL); | |
1516 | } | |
1517 | ||
1518 | static void | |
1519 | output_P9_format (f, grmask, gr) | |
1520 | vbyte_func f; | |
1521 | int grmask; | |
1522 | int gr; | |
1523 | { | |
1524 | char bytes[3]; | |
1525 | bytes[0] = UNW_P9; | |
1526 | bytes[1] = (grmask & 0x0f); | |
1527 | bytes[2] = (gr & 0x7f); | |
1528 | (*f) (3, bytes, NULL); | |
1529 | } | |
1530 | ||
1531 | static void | |
1532 | output_P10_format (f, abi, context) | |
1533 | vbyte_func f; | |
1534 | int abi; | |
1535 | int context; | |
1536 | { | |
1537 | char bytes[3]; | |
1538 | bytes[0] = UNW_P10; | |
1539 | bytes[1] = (abi & 0xff); | |
1540 | bytes[2] = (context & 0xff); | |
1541 | (*f) (3, bytes, NULL); | |
1542 | } | |
1543 | ||
1544 | static void | |
1545 | output_B1_format (f, rtype, label) | |
1546 | vbyte_func f; | |
1547 | unw_record_type rtype; | |
1548 | unsigned long label; | |
1549 | { | |
1550 | char byte; | |
e0c9811a | 1551 | int r = 0; |
197865e8 | 1552 | if (label > 0x1f) |
800eeca4 JW |
1553 | { |
1554 | output_B4_format (f, rtype, label); | |
1555 | return; | |
1556 | } | |
e0c9811a JW |
1557 | if (rtype == copy_state) |
1558 | r = 1; | |
1559 | else if (rtype != label_state) | |
1560 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1561 | |
1562 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1563 | (*f) (1, &byte, NULL); | |
1564 | } | |
1565 | ||
1566 | static void | |
1567 | output_B2_format (f, ecount, t) | |
1568 | vbyte_func f; | |
1569 | unsigned long ecount; | |
1570 | unsigned long t; | |
1571 | { | |
1572 | char bytes[20]; | |
1573 | int count = 1; | |
1574 | if (ecount > 0x1f) | |
1575 | { | |
1576 | output_B3_format (f, ecount, t); | |
1577 | return; | |
1578 | } | |
1579 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1580 | count += output_leb128 (bytes + 1, t, 0); | |
1581 | (*f) (count, bytes, NULL); | |
1582 | } | |
1583 | ||
1584 | static void | |
1585 | output_B3_format (f, ecount, t) | |
1586 | vbyte_func f; | |
1587 | unsigned long ecount; | |
1588 | unsigned long t; | |
1589 | { | |
1590 | char bytes[20]; | |
1591 | int count = 1; | |
1592 | if (ecount <= 0x1f) | |
1593 | { | |
1594 | output_B2_format (f, ecount, t); | |
1595 | return; | |
1596 | } | |
1597 | bytes[0] = UNW_B3; | |
1598 | count += output_leb128 (bytes + 1, t, 0); | |
1599 | count += output_leb128 (bytes + count, ecount, 0); | |
1600 | (*f) (count, bytes, NULL); | |
1601 | } | |
1602 | ||
1603 | static void | |
1604 | output_B4_format (f, rtype, label) | |
1605 | vbyte_func f; | |
1606 | unw_record_type rtype; | |
1607 | unsigned long label; | |
1608 | { | |
1609 | char bytes[20]; | |
e0c9811a | 1610 | int r = 0; |
800eeca4 | 1611 | int count = 1; |
197865e8 | 1612 | if (label <= 0x1f) |
800eeca4 JW |
1613 | { |
1614 | output_B1_format (f, rtype, label); | |
1615 | return; | |
1616 | } | |
197865e8 | 1617 | |
e0c9811a JW |
1618 | if (rtype == copy_state) |
1619 | r = 1; | |
1620 | else if (rtype != label_state) | |
1621 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1622 | |
1623 | bytes[0] = (UNW_B4 | (r << 3)); | |
1624 | count += output_leb128 (bytes + 1, label, 0); | |
1625 | (*f) (count, bytes, NULL); | |
1626 | } | |
1627 | ||
1628 | static char | |
e0c9811a | 1629 | format_ab_reg (ab, reg) |
542d6675 KH |
1630 | int ab; |
1631 | int reg; | |
800eeca4 JW |
1632 | { |
1633 | int ret; | |
e0c9811a | 1634 | ab = (ab & 3); |
800eeca4 | 1635 | reg = (reg & 0x1f); |
e0c9811a | 1636 | ret = (ab << 5) | reg; |
800eeca4 JW |
1637 | return ret; |
1638 | } | |
1639 | ||
1640 | static void | |
e0c9811a | 1641 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1642 | vbyte_func f; |
1643 | unw_record_type rtype; | |
e0c9811a | 1644 | int ab, reg; |
800eeca4 JW |
1645 | unsigned long t; |
1646 | unsigned long w1; | |
1647 | { | |
1648 | char bytes[20]; | |
e0c9811a | 1649 | int r = 0; |
800eeca4 JW |
1650 | int count = 2; |
1651 | bytes[0] = UNW_X1; | |
197865e8 | 1652 | |
e0c9811a JW |
1653 | if (rtype == spill_sprel) |
1654 | r = 1; | |
1655 | else if (rtype != spill_psprel) | |
1656 | as_bad ("Invalid record type for format X1"); | |
1657 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1658 | count += output_leb128 (bytes + 2, t, 0); |
1659 | count += output_leb128 (bytes + count, w1, 0); | |
1660 | (*f) (count, bytes, NULL); | |
1661 | } | |
1662 | ||
1663 | static void | |
e0c9811a | 1664 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1665 | vbyte_func f; |
e0c9811a | 1666 | int ab, reg; |
800eeca4 JW |
1667 | int x, y, treg; |
1668 | unsigned long t; | |
1669 | { | |
1670 | char bytes[20]; | |
800eeca4 JW |
1671 | int count = 3; |
1672 | bytes[0] = UNW_X2; | |
e0c9811a | 1673 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1674 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1675 | count += output_leb128 (bytes + 3, t, 0); | |
1676 | (*f) (count, bytes, NULL); | |
1677 | } | |
1678 | ||
1679 | static void | |
e0c9811a | 1680 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1681 | vbyte_func f; |
1682 | unw_record_type rtype; | |
1683 | int qp; | |
e0c9811a | 1684 | int ab, reg; |
800eeca4 JW |
1685 | unsigned long t; |
1686 | unsigned long w1; | |
1687 | { | |
1688 | char bytes[20]; | |
e0c9811a | 1689 | int r = 0; |
800eeca4 | 1690 | int count = 3; |
e0c9811a JW |
1691 | bytes[0] = UNW_X3; |
1692 | ||
1693 | if (rtype == spill_sprel_p) | |
1694 | r = 1; | |
1695 | else if (rtype != spill_psprel_p) | |
1696 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1697 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1698 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1699 | count += output_leb128 (bytes + 3, t, 0); |
1700 | count += output_leb128 (bytes + count, w1, 0); | |
1701 | (*f) (count, bytes, NULL); | |
1702 | } | |
1703 | ||
1704 | static void | |
e0c9811a | 1705 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1706 | vbyte_func f; |
1707 | int qp; | |
e0c9811a | 1708 | int ab, reg; |
800eeca4 JW |
1709 | int x, y, treg; |
1710 | unsigned long t; | |
1711 | { | |
1712 | char bytes[20]; | |
800eeca4 | 1713 | int count = 4; |
e0c9811a | 1714 | bytes[0] = UNW_X4; |
800eeca4 | 1715 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1716 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1717 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1718 | count += output_leb128 (bytes + 4, t, 0); | |
1719 | (*f) (count, bytes, NULL); | |
1720 | } | |
1721 | ||
1722 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1723 | |
800eeca4 | 1724 | static unw_rec_list * |
197865e8 | 1725 | alloc_record (unw_record_type t) |
800eeca4 JW |
1726 | { |
1727 | unw_rec_list *ptr; | |
1728 | ptr = xmalloc (sizeof (*ptr)); | |
1729 | ptr->next = NULL; | |
1730 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1731 | ptr->r.type = t; | |
73f20958 L |
1732 | ptr->next_slot_number = 0; |
1733 | ptr->next_slot_frag = 0; | |
800eeca4 JW |
1734 | return ptr; |
1735 | } | |
1736 | ||
5738bc24 JW |
1737 | /* Dummy unwind record used for calculating the length of the last prologue or |
1738 | body region. */ | |
1739 | ||
1740 | static unw_rec_list * | |
1741 | output_endp () | |
1742 | { | |
1743 | unw_rec_list *ptr = alloc_record (endp); | |
1744 | return ptr; | |
1745 | } | |
1746 | ||
800eeca4 JW |
1747 | static unw_rec_list * |
1748 | output_prologue () | |
1749 | { | |
1750 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1751 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1752 | return ptr; |
1753 | } | |
1754 | ||
1755 | static unw_rec_list * | |
1756 | output_prologue_gr (saved_mask, reg) | |
1757 | unsigned int saved_mask; | |
1758 | unsigned int reg; | |
1759 | { | |
1760 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1761 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1762 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1763 | ptr->r.record.r.grsave = reg; |
1764 | return ptr; | |
1765 | } | |
1766 | ||
1767 | static unw_rec_list * | |
1768 | output_body () | |
1769 | { | |
1770 | unw_rec_list *ptr = alloc_record (body); | |
1771 | return ptr; | |
1772 | } | |
1773 | ||
1774 | static unw_rec_list * | |
1775 | output_mem_stack_f (size) | |
1776 | unsigned int size; | |
1777 | { | |
1778 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1779 | ptr->r.record.p.size = size; | |
1780 | return ptr; | |
1781 | } | |
1782 | ||
1783 | static unw_rec_list * | |
1784 | output_mem_stack_v () | |
1785 | { | |
1786 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1787 | return ptr; | |
1788 | } | |
1789 | ||
1790 | static unw_rec_list * | |
1791 | output_psp_gr (gr) | |
1792 | unsigned int gr; | |
1793 | { | |
1794 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1795 | ptr->r.record.p.gr = gr; | |
1796 | return ptr; | |
1797 | } | |
1798 | ||
1799 | static unw_rec_list * | |
1800 | output_psp_sprel (offset) | |
1801 | unsigned int offset; | |
1802 | { | |
1803 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1804 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1805 | return ptr; |
1806 | } | |
1807 | ||
1808 | static unw_rec_list * | |
1809 | output_rp_when () | |
1810 | { | |
1811 | unw_rec_list *ptr = alloc_record (rp_when); | |
1812 | return ptr; | |
1813 | } | |
1814 | ||
1815 | static unw_rec_list * | |
1816 | output_rp_gr (gr) | |
1817 | unsigned int gr; | |
1818 | { | |
1819 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1820 | ptr->r.record.p.gr = gr; | |
1821 | return ptr; | |
1822 | } | |
1823 | ||
1824 | static unw_rec_list * | |
1825 | output_rp_br (br) | |
1826 | unsigned int br; | |
1827 | { | |
1828 | unw_rec_list *ptr = alloc_record (rp_br); | |
1829 | ptr->r.record.p.br = br; | |
1830 | return ptr; | |
1831 | } | |
1832 | ||
1833 | static unw_rec_list * | |
1834 | output_rp_psprel (offset) | |
1835 | unsigned int offset; | |
1836 | { | |
1837 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
542d6675 | 1838 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1839 | return ptr; |
1840 | } | |
1841 | ||
1842 | static unw_rec_list * | |
1843 | output_rp_sprel (offset) | |
1844 | unsigned int offset; | |
1845 | { | |
1846 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1847 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1848 | return ptr; |
1849 | } | |
1850 | ||
1851 | static unw_rec_list * | |
1852 | output_pfs_when () | |
1853 | { | |
1854 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1855 | return ptr; | |
1856 | } | |
1857 | ||
1858 | static unw_rec_list * | |
1859 | output_pfs_gr (gr) | |
1860 | unsigned int gr; | |
1861 | { | |
1862 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1863 | ptr->r.record.p.gr = gr; | |
1864 | return ptr; | |
1865 | } | |
1866 | ||
1867 | static unw_rec_list * | |
1868 | output_pfs_psprel (offset) | |
1869 | unsigned int offset; | |
1870 | { | |
1871 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
542d6675 | 1872 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1873 | return ptr; |
1874 | } | |
1875 | ||
1876 | static unw_rec_list * | |
1877 | output_pfs_sprel (offset) | |
1878 | unsigned int offset; | |
1879 | { | |
1880 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1881 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1882 | return ptr; |
1883 | } | |
1884 | ||
1885 | static unw_rec_list * | |
1886 | output_preds_when () | |
1887 | { | |
1888 | unw_rec_list *ptr = alloc_record (preds_when); | |
1889 | return ptr; | |
1890 | } | |
1891 | ||
1892 | static unw_rec_list * | |
1893 | output_preds_gr (gr) | |
1894 | unsigned int gr; | |
1895 | { | |
1896 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1897 | ptr->r.record.p.gr = gr; | |
1898 | return ptr; | |
1899 | } | |
1900 | ||
1901 | static unw_rec_list * | |
1902 | output_preds_psprel (offset) | |
1903 | unsigned int offset; | |
1904 | { | |
1905 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
542d6675 | 1906 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1907 | return ptr; |
1908 | } | |
1909 | ||
1910 | static unw_rec_list * | |
1911 | output_preds_sprel (offset) | |
1912 | unsigned int offset; | |
1913 | { | |
1914 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1915 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1916 | return ptr; |
1917 | } | |
1918 | ||
1919 | static unw_rec_list * | |
1920 | output_fr_mem (mask) | |
1921 | unsigned int mask; | |
1922 | { | |
1923 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1924 | ptr->r.record.p.rmask = mask; | |
1925 | return ptr; | |
1926 | } | |
1927 | ||
1928 | static unw_rec_list * | |
1929 | output_frgr_mem (gr_mask, fr_mask) | |
1930 | unsigned int gr_mask; | |
1931 | unsigned int fr_mask; | |
1932 | { | |
1933 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1934 | ptr->r.record.p.grmask = gr_mask; | |
1935 | ptr->r.record.p.frmask = fr_mask; | |
1936 | return ptr; | |
1937 | } | |
1938 | ||
1939 | static unw_rec_list * | |
1940 | output_gr_gr (mask, reg) | |
1941 | unsigned int mask; | |
1942 | unsigned int reg; | |
1943 | { | |
1944 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1945 | ptr->r.record.p.grmask = mask; | |
1946 | ptr->r.record.p.gr = reg; | |
1947 | return ptr; | |
1948 | } | |
1949 | ||
1950 | static unw_rec_list * | |
1951 | output_gr_mem (mask) | |
1952 | unsigned int mask; | |
1953 | { | |
1954 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1955 | ptr->r.record.p.rmask = mask; | |
1956 | return ptr; | |
1957 | } | |
1958 | ||
1959 | static unw_rec_list * | |
1960 | output_br_mem (unsigned int mask) | |
1961 | { | |
1962 | unw_rec_list *ptr = alloc_record (br_mem); | |
1963 | ptr->r.record.p.brmask = mask; | |
1964 | return ptr; | |
1965 | } | |
1966 | ||
1967 | static unw_rec_list * | |
1968 | output_br_gr (save_mask, reg) | |
1969 | unsigned int save_mask; | |
1970 | unsigned int reg; | |
1971 | { | |
1972 | unw_rec_list *ptr = alloc_record (br_gr); | |
1973 | ptr->r.record.p.brmask = save_mask; | |
1974 | ptr->r.record.p.gr = reg; | |
1975 | return ptr; | |
1976 | } | |
1977 | ||
1978 | static unw_rec_list * | |
1979 | output_spill_base (offset) | |
1980 | unsigned int offset; | |
1981 | { | |
1982 | unw_rec_list *ptr = alloc_record (spill_base); | |
542d6675 | 1983 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
1984 | return ptr; |
1985 | } | |
1986 | ||
1987 | static unw_rec_list * | |
1988 | output_unat_when () | |
1989 | { | |
1990 | unw_rec_list *ptr = alloc_record (unat_when); | |
1991 | return ptr; | |
1992 | } | |
1993 | ||
1994 | static unw_rec_list * | |
1995 | output_unat_gr (gr) | |
1996 | unsigned int gr; | |
1997 | { | |
1998 | unw_rec_list *ptr = alloc_record (unat_gr); | |
1999 | ptr->r.record.p.gr = gr; | |
2000 | return ptr; | |
2001 | } | |
2002 | ||
2003 | static unw_rec_list * | |
2004 | output_unat_psprel (offset) | |
2005 | unsigned int offset; | |
2006 | { | |
2007 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
542d6675 | 2008 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2009 | return ptr; |
2010 | } | |
2011 | ||
2012 | static unw_rec_list * | |
2013 | output_unat_sprel (offset) | |
2014 | unsigned int offset; | |
2015 | { | |
2016 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 2017 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2018 | return ptr; |
2019 | } | |
2020 | ||
2021 | static unw_rec_list * | |
2022 | output_lc_when () | |
2023 | { | |
2024 | unw_rec_list *ptr = alloc_record (lc_when); | |
2025 | return ptr; | |
2026 | } | |
2027 | ||
2028 | static unw_rec_list * | |
2029 | output_lc_gr (gr) | |
2030 | unsigned int gr; | |
2031 | { | |
2032 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2033 | ptr->r.record.p.gr = gr; | |
2034 | return ptr; | |
2035 | } | |
2036 | ||
2037 | static unw_rec_list * | |
2038 | output_lc_psprel (offset) | |
2039 | unsigned int offset; | |
2040 | { | |
2041 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
542d6675 | 2042 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2043 | return ptr; |
2044 | } | |
2045 | ||
2046 | static unw_rec_list * | |
2047 | output_lc_sprel (offset) | |
2048 | unsigned int offset; | |
2049 | { | |
2050 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2051 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2052 | return ptr; |
2053 | } | |
2054 | ||
2055 | static unw_rec_list * | |
2056 | output_fpsr_when () | |
2057 | { | |
2058 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2059 | return ptr; | |
2060 | } | |
2061 | ||
2062 | static unw_rec_list * | |
2063 | output_fpsr_gr (gr) | |
2064 | unsigned int gr; | |
2065 | { | |
2066 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2067 | ptr->r.record.p.gr = gr; | |
2068 | return ptr; | |
2069 | } | |
2070 | ||
2071 | static unw_rec_list * | |
2072 | output_fpsr_psprel (offset) | |
2073 | unsigned int offset; | |
2074 | { | |
2075 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
542d6675 | 2076 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2077 | return ptr; |
2078 | } | |
2079 | ||
2080 | static unw_rec_list * | |
2081 | output_fpsr_sprel (offset) | |
2082 | unsigned int offset; | |
2083 | { | |
2084 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2085 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2086 | return ptr; |
2087 | } | |
2088 | ||
2089 | static unw_rec_list * | |
2090 | output_priunat_when_gr () | |
2091 | { | |
2092 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2093 | return ptr; | |
2094 | } | |
2095 | ||
2096 | static unw_rec_list * | |
2097 | output_priunat_when_mem () | |
2098 | { | |
2099 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2100 | return ptr; | |
2101 | } | |
2102 | ||
2103 | static unw_rec_list * | |
2104 | output_priunat_gr (gr) | |
2105 | unsigned int gr; | |
2106 | { | |
2107 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2108 | ptr->r.record.p.gr = gr; | |
2109 | return ptr; | |
2110 | } | |
2111 | ||
2112 | static unw_rec_list * | |
2113 | output_priunat_psprel (offset) | |
2114 | unsigned int offset; | |
2115 | { | |
2116 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
542d6675 | 2117 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2118 | return ptr; |
2119 | } | |
2120 | ||
2121 | static unw_rec_list * | |
2122 | output_priunat_sprel (offset) | |
2123 | unsigned int offset; | |
2124 | { | |
2125 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2126 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2127 | return ptr; |
2128 | } | |
2129 | ||
2130 | static unw_rec_list * | |
2131 | output_bsp_when () | |
2132 | { | |
2133 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2134 | return ptr; | |
2135 | } | |
2136 | ||
2137 | static unw_rec_list * | |
2138 | output_bsp_gr (gr) | |
2139 | unsigned int gr; | |
2140 | { | |
2141 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2142 | ptr->r.record.p.gr = gr; | |
2143 | return ptr; | |
2144 | } | |
2145 | ||
2146 | static unw_rec_list * | |
2147 | output_bsp_psprel (offset) | |
2148 | unsigned int offset; | |
2149 | { | |
2150 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
542d6675 | 2151 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2152 | return ptr; |
2153 | } | |
2154 | ||
2155 | static unw_rec_list * | |
2156 | output_bsp_sprel (offset) | |
2157 | unsigned int offset; | |
2158 | { | |
2159 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2160 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2161 | return ptr; |
2162 | } | |
2163 | ||
2164 | static unw_rec_list * | |
2165 | output_bspstore_when () | |
2166 | { | |
2167 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2168 | return ptr; | |
2169 | } | |
2170 | ||
2171 | static unw_rec_list * | |
2172 | output_bspstore_gr (gr) | |
2173 | unsigned int gr; | |
2174 | { | |
2175 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2176 | ptr->r.record.p.gr = gr; | |
2177 | return ptr; | |
2178 | } | |
2179 | ||
2180 | static unw_rec_list * | |
2181 | output_bspstore_psprel (offset) | |
2182 | unsigned int offset; | |
2183 | { | |
2184 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
542d6675 | 2185 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2186 | return ptr; |
2187 | } | |
2188 | ||
2189 | static unw_rec_list * | |
2190 | output_bspstore_sprel (offset) | |
2191 | unsigned int offset; | |
2192 | { | |
2193 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2194 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2195 | return ptr; |
2196 | } | |
2197 | ||
2198 | static unw_rec_list * | |
2199 | output_rnat_when () | |
2200 | { | |
2201 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2202 | return ptr; | |
2203 | } | |
2204 | ||
2205 | static unw_rec_list * | |
2206 | output_rnat_gr (gr) | |
2207 | unsigned int gr; | |
2208 | { | |
2209 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2210 | ptr->r.record.p.gr = gr; | |
2211 | return ptr; | |
2212 | } | |
2213 | ||
2214 | static unw_rec_list * | |
2215 | output_rnat_psprel (offset) | |
2216 | unsigned int offset; | |
2217 | { | |
2218 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
542d6675 | 2219 | ptr->r.record.p.pspoff = offset / 4; |
800eeca4 JW |
2220 | return ptr; |
2221 | } | |
2222 | ||
2223 | static unw_rec_list * | |
2224 | output_rnat_sprel (offset) | |
2225 | unsigned int offset; | |
2226 | { | |
2227 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2228 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2229 | return ptr; |
2230 | } | |
2231 | ||
2232 | static unw_rec_list * | |
e0c9811a JW |
2233 | output_unwabi (abi, context) |
2234 | unsigned long abi; | |
2235 | unsigned long context; | |
800eeca4 | 2236 | { |
e0c9811a JW |
2237 | unw_rec_list *ptr = alloc_record (unwabi); |
2238 | ptr->r.record.p.abi = abi; | |
2239 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2240 | return ptr; |
2241 | } | |
2242 | ||
2243 | static unw_rec_list * | |
e0c9811a | 2244 | output_epilogue (unsigned long ecount) |
800eeca4 | 2245 | { |
e0c9811a JW |
2246 | unw_rec_list *ptr = alloc_record (epilogue); |
2247 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2248 | return ptr; |
2249 | } | |
2250 | ||
2251 | static unw_rec_list * | |
e0c9811a | 2252 | output_label_state (unsigned long label) |
800eeca4 | 2253 | { |
e0c9811a JW |
2254 | unw_rec_list *ptr = alloc_record (label_state); |
2255 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2256 | return ptr; |
2257 | } | |
2258 | ||
2259 | static unw_rec_list * | |
e0c9811a JW |
2260 | output_copy_state (unsigned long label) |
2261 | { | |
2262 | unw_rec_list *ptr = alloc_record (copy_state); | |
2263 | ptr->r.record.b.label = label; | |
2264 | return ptr; | |
2265 | } | |
2266 | ||
2267 | static unw_rec_list * | |
2268 | output_spill_psprel (ab, reg, offset) | |
2269 | unsigned int ab; | |
800eeca4 JW |
2270 | unsigned int reg; |
2271 | unsigned int offset; | |
2272 | { | |
2273 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2274 | ptr->r.record.x.ab = ab; |
800eeca4 | 2275 | ptr->r.record.x.reg = reg; |
542d6675 | 2276 | ptr->r.record.x.pspoff = offset / 4; |
800eeca4 JW |
2277 | return ptr; |
2278 | } | |
2279 | ||
2280 | static unw_rec_list * | |
e0c9811a JW |
2281 | output_spill_sprel (ab, reg, offset) |
2282 | unsigned int ab; | |
800eeca4 JW |
2283 | unsigned int reg; |
2284 | unsigned int offset; | |
2285 | { | |
2286 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2287 | ptr->r.record.x.ab = ab; |
800eeca4 | 2288 | ptr->r.record.x.reg = reg; |
542d6675 | 2289 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2290 | return ptr; |
2291 | } | |
2292 | ||
2293 | static unw_rec_list * | |
e0c9811a JW |
2294 | output_spill_psprel_p (ab, reg, offset, predicate) |
2295 | unsigned int ab; | |
800eeca4 JW |
2296 | unsigned int reg; |
2297 | unsigned int offset; | |
2298 | unsigned int predicate; | |
2299 | { | |
2300 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2301 | ptr->r.record.x.ab = ab; |
800eeca4 | 2302 | ptr->r.record.x.reg = reg; |
542d6675 | 2303 | ptr->r.record.x.pspoff = offset / 4; |
800eeca4 JW |
2304 | ptr->r.record.x.qp = predicate; |
2305 | return ptr; | |
2306 | } | |
2307 | ||
2308 | static unw_rec_list * | |
e0c9811a JW |
2309 | output_spill_sprel_p (ab, reg, offset, predicate) |
2310 | unsigned int ab; | |
800eeca4 JW |
2311 | unsigned int reg; |
2312 | unsigned int offset; | |
2313 | unsigned int predicate; | |
2314 | { | |
2315 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2316 | ptr->r.record.x.ab = ab; |
800eeca4 | 2317 | ptr->r.record.x.reg = reg; |
542d6675 | 2318 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2319 | ptr->r.record.x.qp = predicate; |
2320 | return ptr; | |
2321 | } | |
2322 | ||
2323 | static unw_rec_list * | |
e0c9811a JW |
2324 | output_spill_reg (ab, reg, targ_reg, xy) |
2325 | unsigned int ab; | |
800eeca4 JW |
2326 | unsigned int reg; |
2327 | unsigned int targ_reg; | |
2328 | unsigned int xy; | |
2329 | { | |
2330 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2331 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2332 | ptr->r.record.x.reg = reg; |
2333 | ptr->r.record.x.treg = targ_reg; | |
2334 | ptr->r.record.x.xy = xy; | |
2335 | return ptr; | |
2336 | } | |
2337 | ||
2338 | static unw_rec_list * | |
e0c9811a JW |
2339 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2340 | unsigned int ab; | |
800eeca4 JW |
2341 | unsigned int reg; |
2342 | unsigned int targ_reg; | |
2343 | unsigned int xy; | |
2344 | unsigned int predicate; | |
2345 | { | |
2346 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2347 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2348 | ptr->r.record.x.reg = reg; |
2349 | ptr->r.record.x.treg = targ_reg; | |
2350 | ptr->r.record.x.xy = xy; | |
2351 | ptr->r.record.x.qp = predicate; | |
2352 | return ptr; | |
2353 | } | |
2354 | ||
197865e8 | 2355 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2356 | specified function. */ |
542d6675 | 2357 | |
800eeca4 JW |
2358 | static void |
2359 | process_one_record (ptr, f) | |
2360 | unw_rec_list *ptr; | |
2361 | vbyte_func f; | |
2362 | { | |
e0c9811a JW |
2363 | unsigned long fr_mask, gr_mask; |
2364 | ||
197865e8 | 2365 | switch (ptr->r.type) |
800eeca4 | 2366 | { |
5738bc24 JW |
2367 | /* This is a dummy record that takes up no space in the output. */ |
2368 | case endp: | |
2369 | break; | |
2370 | ||
542d6675 KH |
2371 | case gr_mem: |
2372 | case fr_mem: | |
2373 | case br_mem: | |
2374 | case frgr_mem: | |
2375 | /* These are taken care of by prologue/prologue_gr. */ | |
2376 | break; | |
e0c9811a | 2377 | |
542d6675 KH |
2378 | case prologue_gr: |
2379 | case prologue: | |
2380 | if (ptr->r.type == prologue_gr) | |
2381 | output_R2_format (f, ptr->r.record.r.grmask, | |
2382 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2383 | else | |
800eeca4 | 2384 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2385 | |
2386 | /* Output descriptor(s) for union of register spills (if any). */ | |
2387 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2388 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2389 | if (fr_mask) | |
2390 | { | |
2391 | if ((fr_mask & ~0xfUL) == 0) | |
2392 | output_P6_format (f, fr_mem, fr_mask); | |
2393 | else | |
2394 | { | |
2395 | output_P5_format (f, gr_mask, fr_mask); | |
2396 | gr_mask = 0; | |
2397 | } | |
2398 | } | |
2399 | if (gr_mask) | |
2400 | output_P6_format (f, gr_mem, gr_mask); | |
2401 | if (ptr->r.record.r.mask.br_mem) | |
2402 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2403 | ||
2404 | /* output imask descriptor if necessary: */ | |
2405 | if (ptr->r.record.r.mask.i) | |
2406 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2407 | ptr->r.record.r.imask_size); | |
2408 | break; | |
2409 | ||
2410 | case body: | |
2411 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2412 | break; | |
2413 | case mem_stack_f: | |
2414 | case mem_stack_v: | |
2415 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2416 | ptr->r.record.p.size); | |
2417 | break; | |
2418 | case psp_gr: | |
2419 | case rp_gr: | |
2420 | case pfs_gr: | |
2421 | case preds_gr: | |
2422 | case unat_gr: | |
2423 | case lc_gr: | |
2424 | case fpsr_gr: | |
2425 | case priunat_gr: | |
2426 | case bsp_gr: | |
2427 | case bspstore_gr: | |
2428 | case rnat_gr: | |
2429 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2430 | break; | |
2431 | case rp_br: | |
2432 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2433 | break; | |
2434 | case psp_sprel: | |
2435 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2436 | break; | |
2437 | case rp_when: | |
2438 | case pfs_when: | |
2439 | case preds_when: | |
2440 | case unat_when: | |
2441 | case lc_when: | |
2442 | case fpsr_when: | |
2443 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2444 | break; | |
2445 | case rp_psprel: | |
2446 | case pfs_psprel: | |
2447 | case preds_psprel: | |
2448 | case unat_psprel: | |
2449 | case lc_psprel: | |
2450 | case fpsr_psprel: | |
2451 | case spill_base: | |
2452 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2453 | break; | |
2454 | case rp_sprel: | |
2455 | case pfs_sprel: | |
2456 | case preds_sprel: | |
2457 | case unat_sprel: | |
2458 | case lc_sprel: | |
2459 | case fpsr_sprel: | |
2460 | case priunat_sprel: | |
2461 | case bsp_sprel: | |
2462 | case bspstore_sprel: | |
2463 | case rnat_sprel: | |
2464 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2465 | break; | |
2466 | case gr_gr: | |
2467 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2468 | break; | |
2469 | case br_gr: | |
2470 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2471 | break; | |
2472 | case spill_mask: | |
2473 | as_bad ("spill_mask record unimplemented."); | |
2474 | break; | |
2475 | case priunat_when_gr: | |
2476 | case priunat_when_mem: | |
2477 | case bsp_when: | |
2478 | case bspstore_when: | |
2479 | case rnat_when: | |
2480 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2481 | break; | |
2482 | case priunat_psprel: | |
2483 | case bsp_psprel: | |
2484 | case bspstore_psprel: | |
2485 | case rnat_psprel: | |
2486 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2487 | break; | |
2488 | case unwabi: | |
2489 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2490 | break; | |
2491 | case epilogue: | |
2492 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2493 | break; | |
2494 | case label_state: | |
2495 | case copy_state: | |
2496 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2497 | break; | |
2498 | case spill_psprel: | |
2499 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2500 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2501 | ptr->r.record.x.pspoff); | |
2502 | break; | |
2503 | case spill_sprel: | |
2504 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2505 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2506 | ptr->r.record.x.spoff); | |
2507 | break; | |
2508 | case spill_reg: | |
2509 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2510 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2511 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2512 | break; | |
2513 | case spill_psprel_p: | |
2514 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2515 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2516 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2517 | break; | |
2518 | case spill_sprel_p: | |
2519 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2520 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2521 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2522 | break; | |
2523 | case spill_reg_p: | |
2524 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2525 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2526 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2527 | ptr->r.record.x.t); | |
2528 | break; | |
2529 | default: | |
2530 | as_bad ("record_type_not_valid"); | |
2531 | break; | |
800eeca4 JW |
2532 | } |
2533 | } | |
2534 | ||
197865e8 | 2535 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2536 | the specified function. */ |
2537 | static void | |
2538 | process_unw_records (list, f) | |
2539 | unw_rec_list *list; | |
2540 | vbyte_func f; | |
2541 | { | |
2542 | unw_rec_list *ptr; | |
2543 | for (ptr = list; ptr; ptr = ptr->next) | |
2544 | process_one_record (ptr, f); | |
2545 | } | |
2546 | ||
2547 | /* Determine the size of a record list in bytes. */ | |
2548 | static int | |
2549 | calc_record_size (list) | |
2550 | unw_rec_list *list; | |
2551 | { | |
2552 | vbyte_count = 0; | |
2553 | process_unw_records (list, count_output); | |
2554 | return vbyte_count; | |
2555 | } | |
2556 | ||
e0c9811a JW |
2557 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2558 | of type TYPE are saved starting at instruction with index T. If N | |
2559 | bits are set in REGMASK, it is assumed that instructions T through | |
2560 | T+N-1 save these registers. | |
2561 | ||
2562 | TYPE values: | |
2563 | 0: no save | |
2564 | 1: instruction saves next fp reg | |
2565 | 2: instruction saves next general reg | |
2566 | 3: instruction saves next branch reg */ | |
2567 | static void | |
2568 | set_imask (region, regmask, t, type) | |
2569 | unw_rec_list *region; | |
2570 | unsigned long regmask; | |
2571 | unsigned long t; | |
2572 | unsigned int type; | |
2573 | { | |
2574 | unsigned char *imask; | |
2575 | unsigned long imask_size; | |
2576 | unsigned int i; | |
2577 | int pos; | |
2578 | ||
2579 | imask = region->r.record.r.mask.i; | |
2580 | imask_size = region->r.record.r.imask_size; | |
2581 | if (!imask) | |
2582 | { | |
542d6675 | 2583 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2584 | imask = xmalloc (imask_size); |
2585 | memset (imask, 0, imask_size); | |
2586 | ||
2587 | region->r.record.r.imask_size = imask_size; | |
2588 | region->r.record.r.mask.i = imask; | |
2589 | } | |
2590 | ||
542d6675 KH |
2591 | i = (t / 4) + 1; |
2592 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2593 | while (regmask) |
2594 | { | |
2595 | if (i >= imask_size) | |
2596 | { | |
2597 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2598 | return; | |
2599 | } | |
2600 | ||
2601 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2602 | |
e0c9811a JW |
2603 | regmask &= (regmask - 1); |
2604 | pos -= 2; | |
2605 | if (pos < 0) | |
2606 | { | |
2607 | pos = 0; | |
2608 | ++i; | |
2609 | } | |
2610 | } | |
2611 | } | |
2612 | ||
f5a30c2e JW |
2613 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2614 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
2615 | containing FIRST_ADDR. */ | |
2616 | ||
e0c9811a | 2617 | unsigned long |
f5a30c2e JW |
2618 | slot_index (slot_addr, slot_frag, first_addr, first_frag) |
2619 | unsigned long slot_addr; | |
2620 | fragS *slot_frag; | |
2621 | unsigned long first_addr; | |
2622 | fragS *first_frag; | |
e0c9811a | 2623 | { |
f5a30c2e JW |
2624 | unsigned long index = 0; |
2625 | ||
2626 | /* First time we are called, the initial address and frag are invalid. */ | |
2627 | if (first_addr == 0) | |
2628 | return 0; | |
2629 | ||
2630 | /* If the two addresses are in different frags, then we need to add in | |
2631 | the remaining size of this frag, and then the entire size of intermediate | |
2632 | frags. */ | |
2633 | while (slot_frag != first_frag) | |
2634 | { | |
2635 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2636 | ||
73f20958 L |
2637 | if (finalize_syms) |
2638 | { | |
2639 | /* We can get the final addresses only after relaxation is | |
2640 | done. */ | |
2641 | if (first_frag->fr_next && first_frag->fr_next->fr_address) | |
2642 | index += 3 * ((first_frag->fr_next->fr_address | |
2643 | - first_frag->fr_address | |
2644 | - first_frag->fr_fix) >> 4); | |
2645 | } | |
2646 | else | |
2647 | /* We don't know what the final addresses will be. We try our | |
2648 | best to estimate. */ | |
2649 | switch (first_frag->fr_type) | |
2650 | { | |
2651 | default: | |
2652 | break; | |
2653 | ||
2654 | case rs_space: | |
2655 | as_fatal ("only constant space allocation is supported"); | |
2656 | break; | |
2657 | ||
2658 | case rs_align: | |
2659 | case rs_align_code: | |
2660 | case rs_align_test: | |
2661 | /* Take alignment into account. Assume the worst case | |
2662 | before relaxation. */ | |
2663 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2664 | break; | |
2665 | ||
2666 | case rs_org: | |
2667 | if (first_frag->fr_symbol) | |
2668 | { | |
2669 | as_fatal ("only constant offsets are supported"); | |
2670 | break; | |
2671 | } | |
2672 | case rs_fill: | |
2673 | index += 3 * (first_frag->fr_offset >> 4); | |
2674 | break; | |
2675 | } | |
2676 | ||
f5a30c2e JW |
2677 | /* Add in the full size of the frag converted to instruction slots. */ |
2678 | index += 3 * (first_frag->fr_fix >> 4); | |
2679 | /* Subtract away the initial part before first_addr. */ | |
2680 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2681 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2682 | |
f5a30c2e JW |
2683 | /* Move to the beginning of the next frag. */ |
2684 | first_frag = first_frag->fr_next; | |
2685 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2686 | } | |
2687 | ||
2688 | /* Add in the used part of the last frag. */ | |
2689 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2690 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2691 | return index; | |
2692 | } | |
4a1805b1 | 2693 | |
91a2ae2a RH |
2694 | /* Optimize unwind record directives. */ |
2695 | ||
2696 | static unw_rec_list * | |
2697 | optimize_unw_records (list) | |
2698 | unw_rec_list *list; | |
2699 | { | |
2700 | if (!list) | |
2701 | return NULL; | |
2702 | ||
2703 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2704 | by ".body", then we can optimize the unwind directives away. */ | |
2705 | if (list->r.type == prologue | |
5738bc24 JW |
2706 | && (list->next->r.type == endp |
2707 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2708 | return NULL; |
2709 | ||
2710 | return list; | |
2711 | } | |
2712 | ||
800eeca4 JW |
2713 | /* Given a complete record list, process any records which have |
2714 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2715 | this has been run, all necessary information should be available |
800eeca4 | 2716 | within each record to generate an image. */ |
542d6675 | 2717 | |
800eeca4 JW |
2718 | static void |
2719 | fixup_unw_records (list) | |
2720 | unw_rec_list *list; | |
2721 | { | |
e0c9811a JW |
2722 | unw_rec_list *ptr, *region = 0; |
2723 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2724 | fragS *first_frag = 0; |
e0c9811a | 2725 | |
800eeca4 JW |
2726 | for (ptr = list; ptr; ptr = ptr->next) |
2727 | { | |
2728 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2729 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e JW |
2730 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
2731 | first_addr, first_frag); | |
800eeca4 JW |
2732 | switch (ptr->r.type) |
2733 | { | |
542d6675 KH |
2734 | case prologue: |
2735 | case prologue_gr: | |
2736 | case body: | |
2737 | { | |
2738 | unw_rec_list *last; | |
5738bc24 JW |
2739 | int size; |
2740 | unsigned long last_addr = 0; | |
2741 | fragS *last_frag = NULL; | |
542d6675 KH |
2742 | |
2743 | first_addr = ptr->slot_number; | |
f5a30c2e | 2744 | first_frag = ptr->slot_frag; |
542d6675 | 2745 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2746 | the function, and determine the size of the region. */ |
542d6675 KH |
2747 | for (last = ptr->next; last != NULL; last = last->next) |
2748 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2749 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2750 | { |
2751 | last_addr = last->slot_number; | |
f5a30c2e | 2752 | last_frag = last->slot_frag; |
542d6675 KH |
2753 | break; |
2754 | } | |
5738bc24 | 2755 | size = slot_index (last_addr, last_frag, first_addr, first_frag); |
542d6675 | 2756 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2757 | if (ptr->r.type == body) |
2758 | /* End of region. */ | |
2759 | region = 0; | |
2760 | else | |
2761 | region = ptr; | |
e0c9811a | 2762 | break; |
542d6675 KH |
2763 | } |
2764 | case epilogue: | |
2765 | ptr->r.record.b.t = rlen - 1 - t; | |
2766 | break; | |
e0c9811a | 2767 | |
542d6675 KH |
2768 | case mem_stack_f: |
2769 | case mem_stack_v: | |
2770 | case rp_when: | |
2771 | case pfs_when: | |
2772 | case preds_when: | |
2773 | case unat_when: | |
2774 | case lc_when: | |
2775 | case fpsr_when: | |
2776 | case priunat_when_gr: | |
2777 | case priunat_when_mem: | |
2778 | case bsp_when: | |
2779 | case bspstore_when: | |
2780 | case rnat_when: | |
2781 | ptr->r.record.p.t = t; | |
2782 | break; | |
e0c9811a | 2783 | |
542d6675 KH |
2784 | case spill_reg: |
2785 | case spill_sprel: | |
2786 | case spill_psprel: | |
2787 | case spill_reg_p: | |
2788 | case spill_sprel_p: | |
2789 | case spill_psprel_p: | |
2790 | ptr->r.record.x.t = t; | |
2791 | break; | |
e0c9811a | 2792 | |
542d6675 KH |
2793 | case frgr_mem: |
2794 | if (!region) | |
2795 | { | |
2796 | as_bad ("frgr_mem record before region record!\n"); | |
2797 | return; | |
2798 | } | |
2799 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2800 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2801 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2802 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2803 | break; | |
2804 | case fr_mem: | |
2805 | if (!region) | |
2806 | { | |
2807 | as_bad ("fr_mem record before region record!\n"); | |
2808 | return; | |
2809 | } | |
2810 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2811 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2812 | break; | |
2813 | case gr_mem: | |
2814 | if (!region) | |
2815 | { | |
2816 | as_bad ("gr_mem record before region record!\n"); | |
2817 | return; | |
2818 | } | |
2819 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2820 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2821 | break; | |
2822 | case br_mem: | |
2823 | if (!region) | |
2824 | { | |
2825 | as_bad ("br_mem record before region record!\n"); | |
2826 | return; | |
2827 | } | |
2828 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2829 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2830 | break; | |
e0c9811a | 2831 | |
542d6675 KH |
2832 | case gr_gr: |
2833 | if (!region) | |
2834 | { | |
2835 | as_bad ("gr_gr record before region record!\n"); | |
2836 | return; | |
2837 | } | |
2838 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2839 | break; | |
2840 | case br_gr: | |
2841 | if (!region) | |
2842 | { | |
2843 | as_bad ("br_gr record before region record!\n"); | |
2844 | return; | |
2845 | } | |
2846 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2847 | break; | |
e0c9811a | 2848 | |
542d6675 KH |
2849 | default: |
2850 | break; | |
800eeca4 JW |
2851 | } |
2852 | } | |
2853 | } | |
2854 | ||
73f20958 L |
2855 | /* This function converts a rs_machine_dependent variant frag into a |
2856 | normal fill frag with the unwind image from the the record list. */ | |
2857 | void | |
2858 | ia64_convert_frag (fragS *frag) | |
557debba | 2859 | { |
73f20958 L |
2860 | unw_rec_list *list; |
2861 | int len, size, pad; | |
1cd8ff38 | 2862 | valueT flag_value; |
557debba | 2863 | |
73f20958 L |
2864 | list = (unw_rec_list *) frag->fr_opcode; |
2865 | fixup_unw_records (list); | |
1cd8ff38 | 2866 | |
73f20958 L |
2867 | len = calc_record_size (list); |
2868 | /* pad to pointer-size boundary. */ | |
2869 | pad = len % md.pointer_size; | |
2870 | if (pad != 0) | |
2871 | len += md.pointer_size - pad; | |
2872 | /* Add 8 for the header + a pointer for the personality offset. */ | |
2873 | size = len + 8 + md.pointer_size; | |
2874 | ||
2875 | /* fr_var carries the max_chars that we created the fragment with. | |
2876 | We must, of course, have allocated enough memory earlier. */ | |
2877 | assert (frag->fr_var >= size); | |
2878 | ||
2879 | /* Initialize the header area. fr_offset is initialized with | |
2880 | unwind.personality_routine. */ | |
2881 | if (frag->fr_offset) | |
1cd8ff38 NC |
2882 | { |
2883 | if (md.flags & EF_IA_64_ABI64) | |
2884 | flag_value = (bfd_vma) 3 << 32; | |
2885 | else | |
2886 | /* 32-bit unwind info block. */ | |
2887 | flag_value = (bfd_vma) 0x1003 << 32; | |
2888 | } | |
2889 | else | |
2890 | flag_value = 0; | |
557debba | 2891 | |
73f20958 L |
2892 | md_number_to_chars (frag->fr_literal, |
2893 | (((bfd_vma) 1 << 48) /* Version. */ | |
2894 | | flag_value /* U & E handler flags. */ | |
2895 | | (len / md.pointer_size)), /* Length. */ | |
2896 | 8); | |
557debba | 2897 | |
73f20958 L |
2898 | /* Skip the header. */ |
2899 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2900 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2901 | |
2902 | /* Fill the padding bytes with zeros. */ | |
2903 | if (pad != 0) | |
2904 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2905 | md.pointer_size - pad); | |
2906 | ||
73f20958 L |
2907 | frag->fr_fix += size; |
2908 | frag->fr_type = rs_fill; | |
2909 | frag->fr_var = 0; | |
2910 | frag->fr_offset = 0; | |
800eeca4 JW |
2911 | } |
2912 | ||
e0c9811a JW |
2913 | static int |
2914 | convert_expr_to_ab_reg (e, ab, regp) | |
2915 | expressionS *e; | |
2916 | unsigned int *ab; | |
2917 | unsigned int *regp; | |
2918 | { | |
2919 | unsigned int reg; | |
2920 | ||
2921 | if (e->X_op != O_register) | |
2922 | return 0; | |
2923 | ||
2924 | reg = e->X_add_number; | |
2434f565 | 2925 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2926 | { |
2927 | *ab = 0; | |
2928 | *regp = reg - REG_GR; | |
2929 | } | |
2434f565 JW |
2930 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2931 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2932 | { |
2933 | *ab = 1; | |
2934 | *regp = reg - REG_FR; | |
2935 | } | |
2434f565 | 2936 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2937 | { |
2938 | *ab = 2; | |
2939 | *regp = reg - REG_BR; | |
2940 | } | |
2941 | else | |
2942 | { | |
2943 | *ab = 3; | |
2944 | switch (reg) | |
2945 | { | |
2946 | case REG_PR: *regp = 0; break; | |
2947 | case REG_PSP: *regp = 1; break; | |
2948 | case REG_PRIUNAT: *regp = 2; break; | |
2949 | case REG_BR + 0: *regp = 3; break; | |
2950 | case REG_AR + AR_BSP: *regp = 4; break; | |
2951 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2952 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2953 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2954 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2955 | case REG_AR + AR_PFS: *regp = 9; break; | |
2956 | case REG_AR + AR_LC: *regp = 10; break; | |
2957 | ||
2958 | default: | |
2959 | return 0; | |
2960 | } | |
2961 | } | |
2962 | return 1; | |
197865e8 | 2963 | } |
e0c9811a JW |
2964 | |
2965 | static int | |
2966 | convert_expr_to_xy_reg (e, xy, regp) | |
2967 | expressionS *e; | |
2968 | unsigned int *xy; | |
2969 | unsigned int *regp; | |
2970 | { | |
2971 | unsigned int reg; | |
2972 | ||
2973 | if (e->X_op != O_register) | |
2974 | return 0; | |
2975 | ||
2976 | reg = e->X_add_number; | |
2977 | ||
2434f565 | 2978 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
2979 | { |
2980 | *xy = 0; | |
2981 | *regp = reg - REG_GR; | |
2982 | } | |
2434f565 | 2983 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
2984 | { |
2985 | *xy = 1; | |
2986 | *regp = reg - REG_FR; | |
2987 | } | |
2434f565 | 2988 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
2989 | { |
2990 | *xy = 2; | |
2991 | *regp = reg - REG_BR; | |
2992 | } | |
2993 | else | |
2994 | return -1; | |
2995 | return 1; | |
197865e8 | 2996 | } |
e0c9811a | 2997 | |
800eeca4 JW |
2998 | static void |
2999 | dot_radix (dummy) | |
2434f565 | 3000 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3001 | { |
3002 | int radix; | |
3003 | ||
3004 | SKIP_WHITESPACE (); | |
3005 | radix = *input_line_pointer++; | |
3006 | ||
3007 | if (radix != 'C' && !is_end_of_line[(unsigned char) radix]) | |
3008 | { | |
3009 | as_bad ("Radix `%c' unsupported", *input_line_pointer); | |
542d6675 | 3010 | ignore_rest_of_line (); |
800eeca4 JW |
3011 | return; |
3012 | } | |
3013 | } | |
3014 | ||
3015 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ | |
3016 | static void | |
3017 | dot_special_section (which) | |
3018 | int which; | |
3019 | { | |
3020 | set_section ((char *) special_section_name[which]); | |
3021 | } | |
3022 | ||
3023 | static void | |
3024 | add_unwind_entry (ptr) | |
3025 | unw_rec_list *ptr; | |
3026 | { | |
e0c9811a JW |
3027 | if (unwind.tail) |
3028 | unwind.tail->next = ptr; | |
800eeca4 | 3029 | else |
e0c9811a JW |
3030 | unwind.list = ptr; |
3031 | unwind.tail = ptr; | |
800eeca4 JW |
3032 | |
3033 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3034 | if (unwind.current_entry == NULL) |
3035 | unwind.current_entry = ptr; | |
800eeca4 JW |
3036 | } |
3037 | ||
197865e8 | 3038 | static void |
800eeca4 | 3039 | dot_fframe (dummy) |
2434f565 | 3040 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3041 | { |
3042 | expressionS e; | |
e0c9811a | 3043 | |
800eeca4 | 3044 | parse_operand (&e); |
197865e8 | 3045 | |
800eeca4 JW |
3046 | if (e.X_op != O_constant) |
3047 | as_bad ("Operand to .fframe must be a constant"); | |
3048 | else | |
e0c9811a JW |
3049 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3050 | } | |
3051 | ||
197865e8 | 3052 | static void |
e0c9811a | 3053 | dot_vframe (dummy) |
2434f565 | 3054 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3055 | { |
3056 | expressionS e; | |
3057 | unsigned reg; | |
3058 | ||
3059 | parse_operand (&e); | |
3060 | reg = e.X_add_number - REG_GR; | |
3061 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3062 | { |
e0c9811a | 3063 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3064 | if (! (unwind.prologue_mask & 2)) |
3065 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3066 | } |
e0c9811a JW |
3067 | else |
3068 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3069 | } |
3070 | ||
197865e8 | 3071 | static void |
e0c9811a | 3072 | dot_vframesp (dummy) |
2434f565 | 3073 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3074 | { |
e0c9811a JW |
3075 | expressionS e; |
3076 | ||
3077 | parse_operand (&e); | |
3078 | if (e.X_op == O_constant) | |
3079 | { | |
3080 | add_unwind_entry (output_mem_stack_v ()); | |
3081 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3082 | } | |
3083 | else | |
69906a9b | 3084 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3085 | } |
3086 | ||
197865e8 | 3087 | static void |
e0c9811a | 3088 | dot_vframepsp (dummy) |
2434f565 | 3089 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3090 | { |
3091 | expressionS e; | |
3092 | ||
3093 | parse_operand (&e); | |
3094 | if (e.X_op == O_constant) | |
3095 | { | |
3096 | add_unwind_entry (output_mem_stack_v ()); | |
3097 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3098 | } | |
3099 | else | |
69906a9b | 3100 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3101 | } |
3102 | ||
197865e8 | 3103 | static void |
800eeca4 | 3104 | dot_save (dummy) |
2434f565 | 3105 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3106 | { |
3107 | expressionS e1, e2; | |
3108 | int sep; | |
3109 | int reg1, reg2; | |
3110 | ||
3111 | sep = parse_operand (&e1); | |
3112 | if (sep != ',') | |
3113 | as_bad ("No second operand to .save"); | |
3114 | sep = parse_operand (&e2); | |
3115 | ||
e0c9811a | 3116 | reg1 = e1.X_add_number; |
800eeca4 | 3117 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3118 | |
800eeca4 | 3119 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3120 | if (e1.X_op == O_register) |
800eeca4 | 3121 | { |
542d6675 | 3122 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3123 | { |
3124 | switch (reg1) | |
3125 | { | |
542d6675 KH |
3126 | case REG_AR + AR_BSP: |
3127 | add_unwind_entry (output_bsp_when ()); | |
3128 | add_unwind_entry (output_bsp_gr (reg2)); | |
3129 | break; | |
3130 | case REG_AR + AR_BSPSTORE: | |
3131 | add_unwind_entry (output_bspstore_when ()); | |
3132 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3133 | break; | |
3134 | case REG_AR + AR_RNAT: | |
3135 | add_unwind_entry (output_rnat_when ()); | |
3136 | add_unwind_entry (output_rnat_gr (reg2)); | |
3137 | break; | |
3138 | case REG_AR + AR_UNAT: | |
3139 | add_unwind_entry (output_unat_when ()); | |
3140 | add_unwind_entry (output_unat_gr (reg2)); | |
3141 | break; | |
3142 | case REG_AR + AR_FPSR: | |
3143 | add_unwind_entry (output_fpsr_when ()); | |
3144 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3145 | break; | |
3146 | case REG_AR + AR_PFS: | |
3147 | add_unwind_entry (output_pfs_when ()); | |
3148 | if (! (unwind.prologue_mask & 4)) | |
3149 | add_unwind_entry (output_pfs_gr (reg2)); | |
3150 | break; | |
3151 | case REG_AR + AR_LC: | |
3152 | add_unwind_entry (output_lc_when ()); | |
3153 | add_unwind_entry (output_lc_gr (reg2)); | |
3154 | break; | |
3155 | case REG_BR: | |
3156 | add_unwind_entry (output_rp_when ()); | |
3157 | if (! (unwind.prologue_mask & 8)) | |
3158 | add_unwind_entry (output_rp_gr (reg2)); | |
3159 | break; | |
3160 | case REG_PR: | |
3161 | add_unwind_entry (output_preds_when ()); | |
3162 | if (! (unwind.prologue_mask & 1)) | |
3163 | add_unwind_entry (output_preds_gr (reg2)); | |
3164 | break; | |
3165 | case REG_PRIUNAT: | |
3166 | add_unwind_entry (output_priunat_when_gr ()); | |
3167 | add_unwind_entry (output_priunat_gr (reg2)); | |
3168 | break; | |
3169 | default: | |
3170 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3171 | } |
3172 | } | |
3173 | else | |
3174 | as_bad (" Second operand not a valid register"); | |
3175 | } | |
3176 | else | |
e0c9811a | 3177 | as_bad ("First operand not a register"); |
800eeca4 JW |
3178 | } |
3179 | ||
197865e8 | 3180 | static void |
800eeca4 | 3181 | dot_restore (dummy) |
2434f565 | 3182 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3183 | { |
e0c9811a | 3184 | expressionS e1, e2; |
33d01f33 | 3185 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3186 | int sep; |
3187 | ||
3188 | sep = parse_operand (&e1); | |
3189 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3190 | { | |
3191 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3192 | return; | |
3193 | } | |
3194 | ||
3195 | if (sep == ',') | |
3196 | { | |
3197 | parse_operand (&e2); | |
33d01f33 | 3198 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3199 | { |
33d01f33 | 3200 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3201 | return; |
3202 | } | |
33d01f33 | 3203 | ecount = e2.X_add_number; |
e0c9811a | 3204 | } |
33d01f33 JW |
3205 | else |
3206 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3207 | |
3208 | if (ecount >= unwind.prologue_count) | |
3209 | { | |
3210 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3211 | ecount + 1, unwind.prologue_count); | |
3212 | return; | |
3213 | } | |
3214 | ||
e0c9811a | 3215 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3216 | |
3217 | if (ecount < unwind.prologue_count) | |
3218 | unwind.prologue_count -= ecount + 1; | |
3219 | else | |
3220 | unwind.prologue_count = 0; | |
e0c9811a JW |
3221 | } |
3222 | ||
197865e8 | 3223 | static void |
e0c9811a | 3224 | dot_restorereg (dummy) |
2434f565 | 3225 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3226 | { |
3227 | unsigned int ab, reg; | |
3228 | expressionS e; | |
3229 | ||
3230 | parse_operand (&e); | |
3231 | ||
3232 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3233 | { | |
3234 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3235 | return; | |
3236 | } | |
3237 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3238 | } | |
3239 | ||
197865e8 | 3240 | static void |
e0c9811a | 3241 | dot_restorereg_p (dummy) |
2434f565 | 3242 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3243 | { |
3244 | unsigned int qp, ab, reg; | |
3245 | expressionS e1, e2; | |
3246 | int sep; | |
3247 | ||
3248 | sep = parse_operand (&e1); | |
3249 | if (sep != ',') | |
3250 | { | |
3251 | as_bad ("No second operand to .restorereg.p"); | |
3252 | return; | |
3253 | } | |
3254 | ||
3255 | parse_operand (&e2); | |
3256 | ||
3257 | qp = e1.X_add_number - REG_P; | |
3258 | if (e1.X_op != O_register || qp > 63) | |
3259 | { | |
3260 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3261 | return; | |
3262 | } | |
3263 | ||
3264 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3265 | { | |
3266 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3267 | return; | |
3268 | } | |
3269 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3270 | } |
3271 | ||
73f20958 | 3272 | static void |
91a2ae2a RH |
3273 | generate_unwind_image (text_name) |
3274 | const char *text_name; | |
800eeca4 | 3275 | { |
73f20958 L |
3276 | int size, pad; |
3277 | unw_rec_list *list; | |
800eeca4 | 3278 | |
c97b7ef6 JW |
3279 | /* Mark the end of the unwind info, so that we can compute the size of the |
3280 | last unwind region. */ | |
3281 | add_unwind_entry (output_endp ()); | |
3282 | ||
10850f29 JW |
3283 | /* Force out pending instructions, to make sure all unwind records have |
3284 | a valid slot_number field. */ | |
3285 | ia64_flush_insns (); | |
3286 | ||
800eeca4 | 3287 | /* Generate the unwind record. */ |
73f20958 L |
3288 | list = optimize_unw_records (unwind.list); |
3289 | fixup_unw_records (list); | |
3290 | size = calc_record_size (list); | |
3291 | ||
3292 | if (size > 0 || unwind.force_unwind_entry) | |
3293 | { | |
3294 | unwind.force_unwind_entry = 0; | |
3295 | /* pad to pointer-size boundary. */ | |
3296 | pad = size % md.pointer_size; | |
3297 | if (pad != 0) | |
3298 | size += md.pointer_size - pad; | |
3299 | /* Add 8 for the header + a pointer for the personality | |
3300 | offset. */ | |
3301 | size += 8 + md.pointer_size; | |
3302 | } | |
6290819d | 3303 | |
800eeca4 JW |
3304 | /* If there are unwind records, switch sections, and output the info. */ |
3305 | if (size != 0) | |
3306 | { | |
91a2ae2a | 3307 | char *sec_name; |
800eeca4 | 3308 | expressionS exp; |
1cd8ff38 | 3309 | bfd_reloc_code_real_type reloc; |
91a2ae2a RH |
3310 | |
3311 | make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO, text_name, sec_name); | |
3312 | set_section (sec_name); | |
3313 | bfd_set_section_flags (stdoutput, now_seg, | |
3314 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
800eeca4 | 3315 | |
557debba JW |
3316 | /* Make sure the section has 4 byte alignment for ILP32 and |
3317 | 8 byte alignment for LP64. */ | |
3318 | frag_align (md.pointer_size_shift, 0, 0); | |
3319 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3320 | |
800eeca4 | 3321 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3322 | unwind.info = expr_build_dot (); |
73f20958 L |
3323 | |
3324 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
3325 | (offsetT) unwind.personality_routine, (char *) list); | |
91a2ae2a | 3326 | |
800eeca4 | 3327 | /* Add the personality address to the image. */ |
e0c9811a | 3328 | if (unwind.personality_routine != 0) |
542d6675 | 3329 | { |
40449e9f | 3330 | exp.X_op = O_symbol; |
e0c9811a | 3331 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3332 | exp.X_add_number = 0; |
1cd8ff38 NC |
3333 | |
3334 | if (md.flags & EF_IA_64_BE) | |
3335 | { | |
3336 | if (md.flags & EF_IA_64_ABI64) | |
3337 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3338 | else | |
3339 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3340 | } | |
40449e9f | 3341 | else |
1cd8ff38 NC |
3342 | { |
3343 | if (md.flags & EF_IA_64_ABI64) | |
3344 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3345 | else | |
3346 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3347 | } | |
3348 | ||
3349 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3350 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3351 | unwind.personality_routine = 0; |
542d6675 | 3352 | } |
800eeca4 JW |
3353 | } |
3354 | ||
6290819d | 3355 | free_saved_prologue_counts (); |
e0c9811a | 3356 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3357 | } |
3358 | ||
197865e8 | 3359 | static void |
542d6675 | 3360 | dot_handlerdata (dummy) |
2434f565 | 3361 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3362 | { |
91a2ae2a RH |
3363 | const char *text_name = segment_name (now_seg); |
3364 | ||
3365 | /* If text section name starts with ".text" (which it should), | |
3366 | strip this prefix off. */ | |
3367 | if (strcmp (text_name, ".text") == 0) | |
3368 | text_name = ""; | |
3369 | ||
3370 | unwind.force_unwind_entry = 1; | |
3371 | ||
3372 | /* Remember which segment we're in so we can switch back after .endp */ | |
3373 | unwind.saved_text_seg = now_seg; | |
3374 | unwind.saved_text_subseg = now_subseg; | |
3375 | ||
3376 | /* Generate unwind info into unwind-info section and then leave that | |
3377 | section as the currently active one so dataXX directives go into | |
3378 | the language specific data area of the unwind info block. */ | |
3379 | generate_unwind_image (text_name); | |
e0c9811a | 3380 | demand_empty_rest_of_line (); |
800eeca4 JW |
3381 | } |
3382 | ||
197865e8 | 3383 | static void |
800eeca4 | 3384 | dot_unwentry (dummy) |
2434f565 | 3385 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3386 | { |
91a2ae2a | 3387 | unwind.force_unwind_entry = 1; |
e0c9811a | 3388 | demand_empty_rest_of_line (); |
800eeca4 JW |
3389 | } |
3390 | ||
197865e8 | 3391 | static void |
800eeca4 | 3392 | dot_altrp (dummy) |
2434f565 | 3393 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3394 | { |
e0c9811a JW |
3395 | expressionS e; |
3396 | unsigned reg; | |
3397 | ||
3398 | parse_operand (&e); | |
3399 | reg = e.X_add_number - REG_BR; | |
3400 | if (e.X_op == O_register && reg < 8) | |
3401 | add_unwind_entry (output_rp_br (reg)); | |
3402 | else | |
3403 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3404 | } |
3405 | ||
197865e8 | 3406 | static void |
e0c9811a JW |
3407 | dot_savemem (psprel) |
3408 | int psprel; | |
800eeca4 JW |
3409 | { |
3410 | expressionS e1, e2; | |
3411 | int sep; | |
3412 | int reg1, val; | |
3413 | ||
3414 | sep = parse_operand (&e1); | |
3415 | if (sep != ',') | |
e0c9811a | 3416 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3417 | sep = parse_operand (&e2); |
3418 | ||
e0c9811a | 3419 | reg1 = e1.X_add_number; |
800eeca4 | 3420 | val = e2.X_add_number; |
197865e8 | 3421 | |
800eeca4 | 3422 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3423 | if (e1.X_op == O_register) |
800eeca4 JW |
3424 | { |
3425 | if (e2.X_op == O_constant) | |
3426 | { | |
3427 | switch (reg1) | |
3428 | { | |
542d6675 KH |
3429 | case REG_AR + AR_BSP: |
3430 | add_unwind_entry (output_bsp_when ()); | |
3431 | add_unwind_entry ((psprel | |
3432 | ? output_bsp_psprel | |
3433 | : output_bsp_sprel) (val)); | |
3434 | break; | |
3435 | case REG_AR + AR_BSPSTORE: | |
3436 | add_unwind_entry (output_bspstore_when ()); | |
3437 | add_unwind_entry ((psprel | |
3438 | ? output_bspstore_psprel | |
3439 | : output_bspstore_sprel) (val)); | |
3440 | break; | |
3441 | case REG_AR + AR_RNAT: | |
3442 | add_unwind_entry (output_rnat_when ()); | |
3443 | add_unwind_entry ((psprel | |
3444 | ? output_rnat_psprel | |
3445 | : output_rnat_sprel) (val)); | |
3446 | break; | |
3447 | case REG_AR + AR_UNAT: | |
3448 | add_unwind_entry (output_unat_when ()); | |
3449 | add_unwind_entry ((psprel | |
3450 | ? output_unat_psprel | |
3451 | : output_unat_sprel) (val)); | |
3452 | break; | |
3453 | case REG_AR + AR_FPSR: | |
3454 | add_unwind_entry (output_fpsr_when ()); | |
3455 | add_unwind_entry ((psprel | |
3456 | ? output_fpsr_psprel | |
3457 | : output_fpsr_sprel) (val)); | |
3458 | break; | |
3459 | case REG_AR + AR_PFS: | |
3460 | add_unwind_entry (output_pfs_when ()); | |
3461 | add_unwind_entry ((psprel | |
3462 | ? output_pfs_psprel | |
3463 | : output_pfs_sprel) (val)); | |
3464 | break; | |
3465 | case REG_AR + AR_LC: | |
3466 | add_unwind_entry (output_lc_when ()); | |
3467 | add_unwind_entry ((psprel | |
3468 | ? output_lc_psprel | |
3469 | : output_lc_sprel) (val)); | |
3470 | break; | |
3471 | case REG_BR: | |
3472 | add_unwind_entry (output_rp_when ()); | |
3473 | add_unwind_entry ((psprel | |
3474 | ? output_rp_psprel | |
3475 | : output_rp_sprel) (val)); | |
3476 | break; | |
3477 | case REG_PR: | |
3478 | add_unwind_entry (output_preds_when ()); | |
3479 | add_unwind_entry ((psprel | |
3480 | ? output_preds_psprel | |
3481 | : output_preds_sprel) (val)); | |
3482 | break; | |
3483 | case REG_PRIUNAT: | |
3484 | add_unwind_entry (output_priunat_when_mem ()); | |
3485 | add_unwind_entry ((psprel | |
3486 | ? output_priunat_psprel | |
3487 | : output_priunat_sprel) (val)); | |
3488 | break; | |
3489 | default: | |
3490 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3491 | } |
3492 | } | |
3493 | else | |
3494 | as_bad (" Second operand not a valid constant"); | |
3495 | } | |
3496 | else | |
e0c9811a | 3497 | as_bad ("First operand not a register"); |
800eeca4 JW |
3498 | } |
3499 | ||
197865e8 | 3500 | static void |
800eeca4 | 3501 | dot_saveg (dummy) |
2434f565 | 3502 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3503 | { |
3504 | expressionS e1, e2; | |
3505 | int sep; | |
3506 | sep = parse_operand (&e1); | |
3507 | if (sep == ',') | |
3508 | parse_operand (&e2); | |
197865e8 | 3509 | |
800eeca4 JW |
3510 | if (e1.X_op != O_constant) |
3511 | as_bad ("First operand to .save.g must be a constant."); | |
3512 | else | |
3513 | { | |
3514 | int grmask = e1.X_add_number; | |
3515 | if (sep != ',') | |
3516 | add_unwind_entry (output_gr_mem (grmask)); | |
3517 | else | |
542d6675 | 3518 | { |
800eeca4 | 3519 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3520 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3521 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3522 | else | |
3523 | as_bad ("Second operand is an invalid register."); | |
3524 | } | |
3525 | } | |
3526 | } | |
3527 | ||
197865e8 | 3528 | static void |
800eeca4 | 3529 | dot_savef (dummy) |
2434f565 | 3530 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3531 | { |
e0c9811a | 3532 | expressionS e1; |
800eeca4 JW |
3533 | int sep; |
3534 | sep = parse_operand (&e1); | |
197865e8 | 3535 | |
800eeca4 JW |
3536 | if (e1.X_op != O_constant) |
3537 | as_bad ("Operand to .save.f must be a constant."); | |
3538 | else | |
e0c9811a | 3539 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3540 | } |
3541 | ||
197865e8 | 3542 | static void |
800eeca4 | 3543 | dot_saveb (dummy) |
2434f565 | 3544 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3545 | { |
e0c9811a JW |
3546 | expressionS e1, e2; |
3547 | unsigned int reg; | |
3548 | unsigned char sep; | |
3549 | int brmask; | |
3550 | ||
800eeca4 | 3551 | sep = parse_operand (&e1); |
800eeca4 | 3552 | if (e1.X_op != O_constant) |
800eeca4 | 3553 | { |
e0c9811a JW |
3554 | as_bad ("First operand to .save.b must be a constant."); |
3555 | return; | |
800eeca4 | 3556 | } |
e0c9811a JW |
3557 | brmask = e1.X_add_number; |
3558 | ||
3559 | if (sep == ',') | |
3560 | { | |
3561 | sep = parse_operand (&e2); | |
3562 | reg = e2.X_add_number - REG_GR; | |
3563 | if (e2.X_op != O_register || reg > 127) | |
3564 | { | |
3565 | as_bad ("Second operand to .save.b must be a general register."); | |
3566 | return; | |
3567 | } | |
3568 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3569 | } | |
3570 | else | |
3571 | add_unwind_entry (output_br_mem (brmask)); | |
3572 | ||
3573 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
3574 | ignore_rest_of_line (); | |
800eeca4 JW |
3575 | } |
3576 | ||
197865e8 | 3577 | static void |
800eeca4 | 3578 | dot_savegf (dummy) |
2434f565 | 3579 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3580 | { |
3581 | expressionS e1, e2; | |
3582 | int sep; | |
3583 | sep = parse_operand (&e1); | |
3584 | if (sep == ',') | |
3585 | parse_operand (&e2); | |
197865e8 | 3586 | |
800eeca4 JW |
3587 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3588 | as_bad ("Both operands of .save.gf must be constants."); | |
3589 | else | |
3590 | { | |
3591 | int grmask = e1.X_add_number; | |
3592 | int frmask = e2.X_add_number; | |
3593 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3594 | } | |
3595 | } | |
3596 | ||
197865e8 | 3597 | static void |
800eeca4 | 3598 | dot_spill (dummy) |
2434f565 | 3599 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3600 | { |
3601 | expressionS e; | |
e0c9811a JW |
3602 | unsigned char sep; |
3603 | ||
3604 | sep = parse_operand (&e); | |
3605 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
3606 | ignore_rest_of_line (); | |
197865e8 | 3607 | |
800eeca4 JW |
3608 | if (e.X_op != O_constant) |
3609 | as_bad ("Operand to .spill must be a constant"); | |
3610 | else | |
e0c9811a JW |
3611 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3612 | } | |
3613 | ||
3614 | static void | |
3615 | dot_spillreg (dummy) | |
2434f565 | 3616 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3617 | { |
3618 | int sep, ab, xy, reg, treg; | |
3619 | expressionS e1, e2; | |
3620 | ||
3621 | sep = parse_operand (&e1); | |
3622 | if (sep != ',') | |
3623 | { | |
3624 | as_bad ("No second operand to .spillreg"); | |
3625 | return; | |
3626 | } | |
3627 | ||
3628 | parse_operand (&e2); | |
3629 | ||
3630 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3631 | { |
e0c9811a JW |
3632 | as_bad ("First operand to .spillreg must be a preserved register"); |
3633 | return; | |
800eeca4 | 3634 | } |
e0c9811a JW |
3635 | |
3636 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3637 | { | |
3638 | as_bad ("Second operand to .spillreg must be a register"); | |
3639 | return; | |
3640 | } | |
3641 | ||
3642 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3643 | } | |
3644 | ||
3645 | static void | |
3646 | dot_spillmem (psprel) | |
3647 | int psprel; | |
3648 | { | |
3649 | expressionS e1, e2; | |
3650 | int sep, ab, reg; | |
3651 | ||
3652 | sep = parse_operand (&e1); | |
3653 | if (sep != ',') | |
3654 | { | |
3655 | as_bad ("Second operand missing"); | |
3656 | return; | |
3657 | } | |
3658 | ||
3659 | parse_operand (&e2); | |
3660 | ||
3661 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3662 | { | |
3663 | as_bad ("First operand to .spill%s must be a preserved register", | |
3664 | psprel ? "psp" : "sp"); | |
3665 | return; | |
3666 | } | |
3667 | ||
3668 | if (e2.X_op != O_constant) | |
3669 | { | |
3670 | as_bad ("Second operand to .spill%s must be a constant", | |
3671 | psprel ? "psp" : "sp"); | |
3672 | return; | |
3673 | } | |
3674 | ||
3675 | if (psprel) | |
3676 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
3677 | else | |
3678 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
3679 | } | |
3680 | ||
3681 | static void | |
3682 | dot_spillreg_p (dummy) | |
2434f565 | 3683 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3684 | { |
3685 | int sep, ab, xy, reg, treg; | |
3686 | expressionS e1, e2, e3; | |
3687 | unsigned int qp; | |
3688 | ||
3689 | sep = parse_operand (&e1); | |
3690 | if (sep != ',') | |
3691 | { | |
3692 | as_bad ("No second and third operand to .spillreg.p"); | |
3693 | return; | |
3694 | } | |
3695 | ||
3696 | sep = parse_operand (&e2); | |
3697 | if (sep != ',') | |
3698 | { | |
3699 | as_bad ("No third operand to .spillreg.p"); | |
3700 | return; | |
3701 | } | |
3702 | ||
3703 | parse_operand (&e3); | |
3704 | ||
3705 | qp = e1.X_add_number - REG_P; | |
3706 | ||
3707 | if (e1.X_op != O_register || qp > 63) | |
3708 | { | |
3709 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
3710 | return; | |
3711 | } | |
3712 | ||
3713 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3714 | { | |
3715 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
3716 | return; | |
3717 | } | |
3718 | ||
3719 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
3720 | { | |
3721 | as_bad ("Third operand to .spillreg.p must be a register"); | |
3722 | return; | |
3723 | } | |
3724 | ||
3725 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
3726 | } | |
3727 | ||
3728 | static void | |
3729 | dot_spillmem_p (psprel) | |
3730 | int psprel; | |
3731 | { | |
3732 | expressionS e1, e2, e3; | |
3733 | int sep, ab, reg; | |
3734 | unsigned int qp; | |
3735 | ||
3736 | sep = parse_operand (&e1); | |
3737 | if (sep != ',') | |
3738 | { | |
3739 | as_bad ("Second operand missing"); | |
3740 | return; | |
3741 | } | |
3742 | ||
3743 | parse_operand (&e2); | |
3744 | if (sep != ',') | |
3745 | { | |
3746 | as_bad ("Second operand missing"); | |
3747 | return; | |
3748 | } | |
3749 | ||
3750 | parse_operand (&e3); | |
3751 | ||
3752 | qp = e1.X_add_number - REG_P; | |
3753 | if (e1.X_op != O_register || qp > 63) | |
3754 | { | |
3755 | as_bad ("First operand to .spill%s_p must be a predicate", | |
3756 | psprel ? "psp" : "sp"); | |
3757 | return; | |
3758 | } | |
3759 | ||
3760 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3761 | { | |
3762 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
3763 | psprel ? "psp" : "sp"); | |
3764 | return; | |
3765 | } | |
3766 | ||
3767 | if (e3.X_op != O_constant) | |
3768 | { | |
3769 | as_bad ("Third operand to .spill%s_p must be a constant", | |
3770 | psprel ? "psp" : "sp"); | |
3771 | return; | |
3772 | } | |
3773 | ||
3774 | if (psprel) | |
fa7fda74 | 3775 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 3776 | else |
fa7fda74 | 3777 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
3778 | } |
3779 | ||
6290819d NC |
3780 | static unsigned int |
3781 | get_saved_prologue_count (lbl) | |
3782 | unsigned long lbl; | |
3783 | { | |
3784 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3785 | ||
3786 | while (lpc != NULL && lpc->label_number != lbl) | |
3787 | lpc = lpc->next; | |
3788 | ||
3789 | if (lpc != NULL) | |
3790 | return lpc->prologue_count; | |
3791 | ||
3792 | as_bad ("Missing .label_state %ld", lbl); | |
3793 | return 1; | |
3794 | } | |
3795 | ||
3796 | static void | |
3797 | save_prologue_count (lbl, count) | |
3798 | unsigned long lbl; | |
3799 | unsigned int count; | |
3800 | { | |
3801 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3802 | ||
3803 | while (lpc != NULL && lpc->label_number != lbl) | |
3804 | lpc = lpc->next; | |
3805 | ||
3806 | if (lpc != NULL) | |
3807 | lpc->prologue_count = count; | |
3808 | else | |
3809 | { | |
40449e9f | 3810 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
3811 | |
3812 | new_lpc->next = unwind.saved_prologue_counts; | |
3813 | new_lpc->label_number = lbl; | |
3814 | new_lpc->prologue_count = count; | |
3815 | unwind.saved_prologue_counts = new_lpc; | |
3816 | } | |
3817 | } | |
3818 | ||
3819 | static void | |
3820 | free_saved_prologue_counts () | |
3821 | { | |
40449e9f KH |
3822 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
3823 | label_prologue_count *next; | |
6290819d NC |
3824 | |
3825 | while (lpc != NULL) | |
3826 | { | |
3827 | next = lpc->next; | |
3828 | free (lpc); | |
3829 | lpc = next; | |
3830 | } | |
3831 | ||
3832 | unwind.saved_prologue_counts = NULL; | |
3833 | } | |
3834 | ||
e0c9811a JW |
3835 | static void |
3836 | dot_label_state (dummy) | |
2434f565 | 3837 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3838 | { |
3839 | expressionS e; | |
3840 | ||
3841 | parse_operand (&e); | |
3842 | if (e.X_op != O_constant) | |
3843 | { | |
3844 | as_bad ("Operand to .label_state must be a constant"); | |
3845 | return; | |
3846 | } | |
3847 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 3848 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
3849 | } |
3850 | ||
3851 | static void | |
3852 | dot_copy_state (dummy) | |
2434f565 | 3853 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3854 | { |
3855 | expressionS e; | |
3856 | ||
3857 | parse_operand (&e); | |
3858 | if (e.X_op != O_constant) | |
3859 | { | |
3860 | as_bad ("Operand to .copy_state must be a constant"); | |
3861 | return; | |
3862 | } | |
3863 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 3864 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
3865 | } |
3866 | ||
197865e8 | 3867 | static void |
800eeca4 | 3868 | dot_unwabi (dummy) |
2434f565 | 3869 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3870 | { |
e0c9811a JW |
3871 | expressionS e1, e2; |
3872 | unsigned char sep; | |
3873 | ||
3874 | sep = parse_operand (&e1); | |
3875 | if (sep != ',') | |
3876 | { | |
3877 | as_bad ("Second operand to .unwabi missing"); | |
3878 | return; | |
3879 | } | |
3880 | sep = parse_operand (&e2); | |
3881 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
3882 | ignore_rest_of_line (); | |
3883 | ||
3884 | if (e1.X_op != O_constant) | |
3885 | { | |
3886 | as_bad ("First operand to .unwabi must be a constant"); | |
3887 | return; | |
3888 | } | |
3889 | ||
3890 | if (e2.X_op != O_constant) | |
3891 | { | |
3892 | as_bad ("Second operand to .unwabi must be a constant"); | |
3893 | return; | |
3894 | } | |
3895 | ||
3896 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
3897 | } |
3898 | ||
197865e8 | 3899 | static void |
800eeca4 | 3900 | dot_personality (dummy) |
2434f565 | 3901 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3902 | { |
3903 | char *name, *p, c; | |
3904 | SKIP_WHITESPACE (); | |
3905 | name = input_line_pointer; | |
3906 | c = get_symbol_end (); | |
3907 | p = input_line_pointer; | |
e0c9811a | 3908 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 3909 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
3910 | *p = c; |
3911 | SKIP_WHITESPACE (); | |
3912 | demand_empty_rest_of_line (); | |
3913 | } | |
3914 | ||
3915 | static void | |
3916 | dot_proc (dummy) | |
2434f565 | 3917 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3918 | { |
3919 | char *name, *p, c; | |
3920 | symbolS *sym; | |
3921 | ||
e0c9811a JW |
3922 | unwind.proc_start = expr_build_dot (); |
3923 | /* Parse names of main and alternate entry points and mark them as | |
542d6675 | 3924 | function symbols: */ |
800eeca4 JW |
3925 | while (1) |
3926 | { | |
3927 | SKIP_WHITESPACE (); | |
3928 | name = input_line_pointer; | |
3929 | c = get_symbol_end (); | |
3930 | p = input_line_pointer; | |
3931 | sym = symbol_find_or_make (name); | |
e0c9811a | 3932 | if (unwind.proc_start == 0) |
542d6675 | 3933 | { |
e0c9811a | 3934 | unwind.proc_start = sym; |
800eeca4 JW |
3935 | } |
3936 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
3937 | *p = c; | |
3938 | SKIP_WHITESPACE (); | |
3939 | if (*input_line_pointer != ',') | |
3940 | break; | |
3941 | ++input_line_pointer; | |
3942 | } | |
3943 | demand_empty_rest_of_line (); | |
3944 | ia64_do_align (16); | |
3945 | ||
33d01f33 | 3946 | unwind.prologue_count = 0; |
e0c9811a JW |
3947 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
3948 | unwind.personality_routine = 0; | |
800eeca4 JW |
3949 | } |
3950 | ||
3951 | static void | |
3952 | dot_body (dummy) | |
2434f565 | 3953 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3954 | { |
e0c9811a | 3955 | unwind.prologue = 0; |
30d25259 RH |
3956 | unwind.prologue_mask = 0; |
3957 | ||
800eeca4 | 3958 | add_unwind_entry (output_body ()); |
e0c9811a | 3959 | demand_empty_rest_of_line (); |
800eeca4 JW |
3960 | } |
3961 | ||
3962 | static void | |
3963 | dot_prologue (dummy) | |
2434f565 | 3964 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3965 | { |
e0c9811a | 3966 | unsigned char sep; |
2434f565 | 3967 | int mask = 0, grsave = 0; |
e0c9811a | 3968 | |
e0c9811a | 3969 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
3970 | { |
3971 | expressionS e1, e2; | |
800eeca4 JW |
3972 | sep = parse_operand (&e1); |
3973 | if (sep != ',') | |
3974 | as_bad ("No second operand to .prologue"); | |
3975 | sep = parse_operand (&e2); | |
e0c9811a | 3976 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
542d6675 | 3977 | ignore_rest_of_line (); |
800eeca4 JW |
3978 | |
3979 | if (e1.X_op == O_constant) | |
542d6675 | 3980 | { |
30d25259 RH |
3981 | mask = e1.X_add_number; |
3982 | ||
800eeca4 | 3983 | if (e2.X_op == O_constant) |
30d25259 RH |
3984 | grsave = e2.X_add_number; |
3985 | else if (e2.X_op == O_register | |
3986 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
3987 | ; | |
800eeca4 | 3988 | else |
30d25259 RH |
3989 | as_bad ("Second operand not a constant or general register"); |
3990 | ||
3991 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
3992 | } |
3993 | else | |
3994 | as_bad ("First operand not a constant"); | |
3995 | } | |
3996 | else | |
3997 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
3998 | |
3999 | unwind.prologue = 1; | |
4000 | unwind.prologue_mask = mask; | |
33d01f33 | 4001 | ++unwind.prologue_count; |
800eeca4 JW |
4002 | } |
4003 | ||
4004 | static void | |
4005 | dot_endp (dummy) | |
2434f565 | 4006 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4007 | { |
4008 | expressionS e; | |
4009 | unsigned char *ptr; | |
44f5c83a | 4010 | int bytes_per_address; |
800eeca4 JW |
4011 | long where; |
4012 | segT saved_seg; | |
4013 | subsegT saved_subseg; | |
91a2ae2a | 4014 | const char *sec_name, *text_name; |
c538998c JJ |
4015 | char *name, *p, c; |
4016 | symbolS *sym; | |
800eeca4 | 4017 | |
91a2ae2a RH |
4018 | if (unwind.saved_text_seg) |
4019 | { | |
4020 | saved_seg = unwind.saved_text_seg; | |
4021 | saved_subseg = unwind.saved_text_subseg; | |
4022 | unwind.saved_text_seg = NULL; | |
4023 | } | |
4024 | else | |
4025 | { | |
4026 | saved_seg = now_seg; | |
4027 | saved_subseg = now_subseg; | |
4028 | } | |
4029 | ||
4030 | /* | |
4031 | Use a slightly ugly scheme to derive the unwind section names from | |
4032 | the text section name: | |
4033 | ||
4034 | text sect. unwind table sect. | |
4035 | name: name: comments: | |
4036 | ---------- ----------------- -------------------------------- | |
4037 | .text .IA_64.unwind | |
4038 | .text.foo .IA_64.unwind.text.foo | |
4039 | .foo .IA_64.unwind.foo | |
579f31ac JJ |
4040 | .gnu.linkonce.t.foo |
4041 | .gnu.linkonce.ia64unw.foo | |
91a2ae2a RH |
4042 | _info .IA_64.unwind_info gas issues error message (ditto) |
4043 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
4044 | ||
4045 | This mapping is done so that: | |
4046 | ||
4047 | (a) An object file with unwind info only in .text will use | |
4048 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
4049 | This follows the letter of the ABI and also ensures backwards | |
4050 | compatibility with older toolchains. | |
4051 | ||
4052 | (b) An object file with unwind info in multiple text sections | |
4053 | will use separate unwind sections for each text section. | |
4054 | This allows us to properly set the "sh_info" and "sh_link" | |
4055 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
4056 | lets GNU ld support programs with multiple segments | |
4057 | containing unwind info (as might be the case for certain | |
4058 | embedded applications). | |
40449e9f | 4059 | |
91a2ae2a RH |
4060 | (c) An error is issued if there would be a name clash. |
4061 | */ | |
4062 | text_name = segment_name (saved_seg); | |
4063 | if (strncmp (text_name, "_info", 5) == 0) | |
4064 | { | |
4065 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
4066 | text_name); | |
4067 | ignore_rest_of_line (); | |
4068 | return; | |
4069 | } | |
4070 | if (strcmp (text_name, ".text") == 0) | |
4071 | text_name = ""; | |
800eeca4 | 4072 | |
800eeca4 | 4073 | insn_group_break (1, 0, 0); |
800eeca4 | 4074 | |
91a2ae2a RH |
4075 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4076 | if (!unwind.info) | |
4077 | generate_unwind_image (text_name); | |
800eeca4 | 4078 | |
91a2ae2a RH |
4079 | if (unwind.info || unwind.force_unwind_entry) |
4080 | { | |
4081 | subseg_set (md.last_text_seg, 0); | |
4082 | unwind.proc_end = expr_build_dot (); | |
5e7474a7 | 4083 | |
91a2ae2a RH |
4084 | make_unw_section_name (SPECIAL_SECTION_UNWIND, text_name, sec_name); |
4085 | set_section ((char *) sec_name); | |
4086 | bfd_set_section_flags (stdoutput, now_seg, | |
4087 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
5e7474a7 | 4088 | |
557debba JW |
4089 | /* Make sure that section has 4 byte alignment for ILP32 and |
4090 | 8 byte alignment for LP64. */ | |
4091 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4092 | |
557debba JW |
4093 | /* Need space for 3 pointers for procedure start, procedure end, |
4094 | and unwind info. */ | |
4095 | ptr = frag_more (3 * md.pointer_size); | |
4096 | where = frag_now_fix () - (3 * md.pointer_size); | |
91a2ae2a | 4097 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4098 | |
40449e9f | 4099 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4100 | e.X_op = O_pseudo_fixup; |
4101 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4102 | e.X_add_number = 0; | |
4103 | e.X_add_symbol = unwind.proc_start; | |
4104 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); | |
800eeca4 | 4105 | |
800eeca4 JW |
4106 | e.X_op = O_pseudo_fixup; |
4107 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4108 | e.X_add_number = 0; | |
91a2ae2a RH |
4109 | e.X_add_symbol = unwind.proc_end; |
4110 | ia64_cons_fix_new (frag_now, where + bytes_per_address, | |
4111 | bytes_per_address, &e); | |
4112 | ||
4113 | if (unwind.info) | |
4114 | { | |
4115 | e.X_op = O_pseudo_fixup; | |
4116 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4117 | e.X_add_number = 0; | |
4118 | e.X_add_symbol = unwind.info; | |
4119 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4120 | bytes_per_address, &e); | |
4121 | } | |
4122 | else | |
4123 | md_number_to_chars (ptr + (bytes_per_address * 2), 0, | |
4124 | bytes_per_address); | |
800eeca4 | 4125 | |
91a2ae2a | 4126 | } |
800eeca4 | 4127 | subseg_set (saved_seg, saved_subseg); |
c538998c JJ |
4128 | |
4129 | /* Parse names of main and alternate entry points and set symbol sizes. */ | |
4130 | while (1) | |
4131 | { | |
4132 | SKIP_WHITESPACE (); | |
4133 | name = input_line_pointer; | |
4134 | c = get_symbol_end (); | |
4135 | p = input_line_pointer; | |
4136 | sym = symbol_find (name); | |
4137 | if (sym && unwind.proc_start | |
4138 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4139 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4140 | { | |
4141 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4142 | fragS *frag = symbol_get_frag (sym); | |
4143 | ||
4144 | /* Check whether the function label is at or beyond last | |
4145 | .proc directive. */ | |
4146 | while (fr && fr != frag) | |
4147 | fr = fr->fr_next; | |
4148 | if (fr) | |
4149 | { | |
4150 | if (frag == frag_now && SEG_NORMAL (now_seg)) | |
4151 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4152 | else | |
4153 | { | |
4154 | symbol_get_obj (sym)->size = | |
4155 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4156 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4157 | symbol_get_obj (sym)->size->X_add_symbol | |
4158 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4159 | frag_now_fix (), frag_now); | |
4160 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4161 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4162 | } | |
4163 | } | |
4164 | } | |
4165 | *p = c; | |
4166 | SKIP_WHITESPACE (); | |
4167 | if (*input_line_pointer != ',') | |
4168 | break; | |
4169 | ++input_line_pointer; | |
4170 | } | |
4171 | demand_empty_rest_of_line (); | |
e0c9811a | 4172 | unwind.proc_start = unwind.proc_end = unwind.info = 0; |
800eeca4 JW |
4173 | } |
4174 | ||
4175 | static void | |
4176 | dot_template (template) | |
4177 | int template; | |
4178 | { | |
4179 | CURR_SLOT.user_template = template; | |
4180 | } | |
4181 | ||
4182 | static void | |
4183 | dot_regstk (dummy) | |
2434f565 | 4184 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4185 | { |
4186 | int ins, locs, outs, rots; | |
4187 | ||
4188 | if (is_it_end_of_statement ()) | |
4189 | ins = locs = outs = rots = 0; | |
4190 | else | |
4191 | { | |
4192 | ins = get_absolute_expression (); | |
4193 | if (*input_line_pointer++ != ',') | |
4194 | goto err; | |
4195 | locs = get_absolute_expression (); | |
4196 | if (*input_line_pointer++ != ',') | |
4197 | goto err; | |
4198 | outs = get_absolute_expression (); | |
4199 | if (*input_line_pointer++ != ',') | |
4200 | goto err; | |
4201 | rots = get_absolute_expression (); | |
4202 | } | |
4203 | set_regstack (ins, locs, outs, rots); | |
4204 | return; | |
4205 | ||
4206 | err: | |
4207 | as_bad ("Comma expected"); | |
4208 | ignore_rest_of_line (); | |
4209 | } | |
4210 | ||
4211 | static void | |
4212 | dot_rot (type) | |
4213 | int type; | |
4214 | { | |
4215 | unsigned num_regs, num_alloced = 0; | |
4216 | struct dynreg **drpp, *dr; | |
4217 | int ch, base_reg = 0; | |
4218 | char *name, *start; | |
4219 | size_t len; | |
4220 | ||
4221 | switch (type) | |
4222 | { | |
4223 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4224 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4225 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4226 | default: break; | |
4227 | } | |
4228 | ||
542d6675 | 4229 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4230 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4231 | { | |
4232 | hash_delete (md.dynreg_hash, dr->name); | |
4233 | dr->num_regs = 0; | |
4234 | } | |
4235 | ||
4236 | drpp = &md.dynreg[type]; | |
4237 | while (1) | |
4238 | { | |
4239 | start = input_line_pointer; | |
4240 | ch = get_symbol_end (); | |
4241 | *input_line_pointer = ch; | |
4242 | len = (input_line_pointer - start); | |
4243 | ||
4244 | SKIP_WHITESPACE (); | |
4245 | if (*input_line_pointer != '[') | |
4246 | { | |
4247 | as_bad ("Expected '['"); | |
4248 | goto err; | |
4249 | } | |
4250 | ++input_line_pointer; /* skip '[' */ | |
4251 | ||
4252 | num_regs = get_absolute_expression (); | |
4253 | ||
4254 | if (*input_line_pointer++ != ']') | |
4255 | { | |
4256 | as_bad ("Expected ']'"); | |
4257 | goto err; | |
4258 | } | |
4259 | SKIP_WHITESPACE (); | |
4260 | ||
4261 | num_alloced += num_regs; | |
4262 | switch (type) | |
4263 | { | |
4264 | case DYNREG_GR: | |
4265 | if (num_alloced > md.rot.num_regs) | |
4266 | { | |
4267 | as_bad ("Used more than the declared %d rotating registers", | |
4268 | md.rot.num_regs); | |
4269 | goto err; | |
4270 | } | |
4271 | break; | |
4272 | case DYNREG_FR: | |
4273 | if (num_alloced > 96) | |
4274 | { | |
4275 | as_bad ("Used more than the available 96 rotating registers"); | |
4276 | goto err; | |
4277 | } | |
4278 | break; | |
4279 | case DYNREG_PR: | |
4280 | if (num_alloced > 48) | |
4281 | { | |
4282 | as_bad ("Used more than the available 48 rotating registers"); | |
4283 | goto err; | |
4284 | } | |
4285 | break; | |
4286 | ||
4287 | default: | |
4288 | break; | |
4289 | } | |
4290 | ||
4291 | name = obstack_alloc (¬es, len + 1); | |
4292 | memcpy (name, start, len); | |
4293 | name[len] = '\0'; | |
4294 | ||
4295 | if (!*drpp) | |
4296 | { | |
4297 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4298 | memset (*drpp, 0, sizeof (*dr)); | |
4299 | } | |
4300 | ||
4301 | dr = *drpp; | |
4302 | dr->name = name; | |
4303 | dr->num_regs = num_regs; | |
4304 | dr->base = base_reg; | |
4305 | drpp = &dr->next; | |
4306 | base_reg += num_regs; | |
4307 | ||
4308 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4309 | { | |
4310 | as_bad ("Attempt to redefine register set `%s'", name); | |
4311 | goto err; | |
4312 | } | |
4313 | ||
4314 | if (*input_line_pointer != ',') | |
4315 | break; | |
4316 | ++input_line_pointer; /* skip comma */ | |
4317 | SKIP_WHITESPACE (); | |
4318 | } | |
4319 | demand_empty_rest_of_line (); | |
4320 | return; | |
4321 | ||
4322 | err: | |
4323 | ignore_rest_of_line (); | |
4324 | } | |
4325 | ||
4326 | static void | |
4327 | dot_byteorder (byteorder) | |
4328 | int byteorder; | |
4329 | { | |
10a98291 L |
4330 | segment_info_type *seginfo = seg_info (now_seg); |
4331 | ||
4332 | if (byteorder == -1) | |
4333 | { | |
4334 | if (seginfo->tc_segment_info_data.endian == 0) | |
4335 | seginfo->tc_segment_info_data.endian | |
4336 | = TARGET_BYTES_BIG_ENDIAN ? 1 : 2; | |
4337 | byteorder = seginfo->tc_segment_info_data.endian == 1; | |
4338 | } | |
4339 | else | |
4340 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4341 | ||
4342 | if (target_big_endian != byteorder) | |
4343 | { | |
4344 | target_big_endian = byteorder; | |
4345 | if (target_big_endian) | |
4346 | { | |
4347 | ia64_number_to_chars = number_to_chars_bigendian; | |
4348 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4349 | } | |
4350 | else | |
4351 | { | |
4352 | ia64_number_to_chars = number_to_chars_littleendian; | |
4353 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4354 | } | |
4355 | } | |
800eeca4 JW |
4356 | } |
4357 | ||
4358 | static void | |
4359 | dot_psr (dummy) | |
2434f565 | 4360 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4361 | { |
4362 | char *option; | |
4363 | int ch; | |
4364 | ||
4365 | while (1) | |
4366 | { | |
4367 | option = input_line_pointer; | |
4368 | ch = get_symbol_end (); | |
4369 | if (strcmp (option, "lsb") == 0) | |
4370 | md.flags &= ~EF_IA_64_BE; | |
4371 | else if (strcmp (option, "msb") == 0) | |
4372 | md.flags |= EF_IA_64_BE; | |
4373 | else if (strcmp (option, "abi32") == 0) | |
4374 | md.flags &= ~EF_IA_64_ABI64; | |
4375 | else if (strcmp (option, "abi64") == 0) | |
4376 | md.flags |= EF_IA_64_ABI64; | |
4377 | else | |
4378 | as_bad ("Unknown psr option `%s'", option); | |
4379 | *input_line_pointer = ch; | |
4380 | ||
4381 | SKIP_WHITESPACE (); | |
4382 | if (*input_line_pointer != ',') | |
4383 | break; | |
4384 | ||
4385 | ++input_line_pointer; | |
4386 | SKIP_WHITESPACE (); | |
4387 | } | |
4388 | demand_empty_rest_of_line (); | |
4389 | } | |
4390 | ||
800eeca4 JW |
4391 | static void |
4392 | dot_ln (dummy) | |
2434f565 | 4393 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4394 | { |
4395 | new_logical_line (0, get_absolute_expression ()); | |
4396 | demand_empty_rest_of_line (); | |
4397 | } | |
4398 | ||
542d6675 | 4399 | static char * |
800eeca4 JW |
4400 | parse_section_name () |
4401 | { | |
4402 | char *name; | |
4403 | int len; | |
4404 | ||
4405 | SKIP_WHITESPACE (); | |
4406 | if (*input_line_pointer != '"') | |
4407 | { | |
4408 | as_bad ("Missing section name"); | |
4409 | ignore_rest_of_line (); | |
4410 | return 0; | |
4411 | } | |
4412 | name = demand_copy_C_string (&len); | |
4413 | if (!name) | |
4414 | { | |
4415 | ignore_rest_of_line (); | |
4416 | return 0; | |
4417 | } | |
4418 | SKIP_WHITESPACE (); | |
4419 | if (*input_line_pointer != ',') | |
4420 | { | |
4421 | as_bad ("Comma expected after section name"); | |
4422 | ignore_rest_of_line (); | |
4423 | return 0; | |
4424 | } | |
4425 | ++input_line_pointer; /* skip comma */ | |
4426 | return name; | |
4427 | } | |
4428 | ||
4429 | static void | |
4430 | dot_xdata (size) | |
4431 | int size; | |
4432 | { | |
4433 | char *name = parse_section_name (); | |
4434 | if (!name) | |
4435 | return; | |
4436 | ||
4d5a53ff | 4437 | md.keep_pending_output = 1; |
800eeca4 JW |
4438 | set_section (name); |
4439 | cons (size); | |
4440 | obj_elf_previous (0); | |
4d5a53ff | 4441 | md.keep_pending_output = 0; |
800eeca4 JW |
4442 | } |
4443 | ||
4444 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4445 | |
800eeca4 JW |
4446 | static void |
4447 | stmt_float_cons (kind) | |
4448 | int kind; | |
4449 | { | |
165a7f90 | 4450 | size_t alignment; |
800eeca4 JW |
4451 | |
4452 | switch (kind) | |
4453 | { | |
165a7f90 L |
4454 | case 'd': |
4455 | alignment = 8; | |
4456 | break; | |
4457 | ||
4458 | case 'x': | |
4459 | case 'X': | |
4460 | alignment = 16; | |
4461 | break; | |
800eeca4 JW |
4462 | |
4463 | case 'f': | |
4464 | default: | |
165a7f90 | 4465 | alignment = 4; |
800eeca4 JW |
4466 | break; |
4467 | } | |
165a7f90 | 4468 | ia64_do_align (alignment); |
800eeca4 JW |
4469 | float_cons (kind); |
4470 | } | |
4471 | ||
4472 | static void | |
4473 | stmt_cons_ua (size) | |
4474 | int size; | |
4475 | { | |
4476 | int saved_auto_align = md.auto_align; | |
4477 | ||
4478 | md.auto_align = 0; | |
4479 | cons (size); | |
4480 | md.auto_align = saved_auto_align; | |
4481 | } | |
4482 | ||
4483 | static void | |
4484 | dot_xfloat_cons (kind) | |
4485 | int kind; | |
4486 | { | |
4487 | char *name = parse_section_name (); | |
4488 | if (!name) | |
4489 | return; | |
4490 | ||
4d5a53ff | 4491 | md.keep_pending_output = 1; |
800eeca4 JW |
4492 | set_section (name); |
4493 | stmt_float_cons (kind); | |
4494 | obj_elf_previous (0); | |
4d5a53ff | 4495 | md.keep_pending_output = 0; |
800eeca4 JW |
4496 | } |
4497 | ||
4498 | static void | |
4499 | dot_xstringer (zero) | |
4500 | int zero; | |
4501 | { | |
4502 | char *name = parse_section_name (); | |
4503 | if (!name) | |
4504 | return; | |
4505 | ||
4d5a53ff | 4506 | md.keep_pending_output = 1; |
800eeca4 JW |
4507 | set_section (name); |
4508 | stringer (zero); | |
4509 | obj_elf_previous (0); | |
4d5a53ff | 4510 | md.keep_pending_output = 0; |
800eeca4 JW |
4511 | } |
4512 | ||
4513 | static void | |
4514 | dot_xdata_ua (size) | |
4515 | int size; | |
4516 | { | |
4517 | int saved_auto_align = md.auto_align; | |
4518 | char *name = parse_section_name (); | |
4519 | if (!name) | |
4520 | return; | |
4521 | ||
4d5a53ff | 4522 | md.keep_pending_output = 1; |
800eeca4 JW |
4523 | set_section (name); |
4524 | md.auto_align = 0; | |
4525 | cons (size); | |
4526 | md.auto_align = saved_auto_align; | |
4527 | obj_elf_previous (0); | |
4d5a53ff | 4528 | md.keep_pending_output = 0; |
800eeca4 JW |
4529 | } |
4530 | ||
4531 | static void | |
4532 | dot_xfloat_cons_ua (kind) | |
4533 | int kind; | |
4534 | { | |
4535 | int saved_auto_align = md.auto_align; | |
4536 | char *name = parse_section_name (); | |
4537 | if (!name) | |
4538 | return; | |
4539 | ||
4d5a53ff | 4540 | md.keep_pending_output = 1; |
800eeca4 JW |
4541 | set_section (name); |
4542 | md.auto_align = 0; | |
4543 | stmt_float_cons (kind); | |
4544 | md.auto_align = saved_auto_align; | |
4545 | obj_elf_previous (0); | |
4d5a53ff | 4546 | md.keep_pending_output = 0; |
800eeca4 JW |
4547 | } |
4548 | ||
4549 | /* .reg.val <regname>,value */ | |
542d6675 | 4550 | |
800eeca4 JW |
4551 | static void |
4552 | dot_reg_val (dummy) | |
2434f565 | 4553 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4554 | { |
4555 | expressionS reg; | |
4556 | ||
4557 | expression (®); | |
4558 | if (reg.X_op != O_register) | |
4559 | { | |
4560 | as_bad (_("Register name expected")); | |
4561 | ignore_rest_of_line (); | |
4562 | } | |
4563 | else if (*input_line_pointer++ != ',') | |
4564 | { | |
4565 | as_bad (_("Comma expected")); | |
4566 | ignore_rest_of_line (); | |
4567 | } | |
197865e8 | 4568 | else |
800eeca4 JW |
4569 | { |
4570 | valueT value = get_absolute_expression (); | |
4571 | int regno = reg.X_add_number; | |
542d6675 KH |
4572 | if (regno < REG_GR || regno > REG_GR + 128) |
4573 | as_warn (_("Register value annotation ignored")); | |
800eeca4 | 4574 | else |
542d6675 KH |
4575 | { |
4576 | gr_values[regno - REG_GR].known = 1; | |
4577 | gr_values[regno - REG_GR].value = value; | |
4578 | gr_values[regno - REG_GR].path = md.path; | |
4579 | } | |
800eeca4 JW |
4580 | } |
4581 | demand_empty_rest_of_line (); | |
4582 | } | |
4583 | ||
197865e8 | 4584 | /* select dv checking mode |
800eeca4 JW |
4585 | .auto |
4586 | .explicit | |
4587 | .default | |
4588 | ||
197865e8 | 4589 | A stop is inserted when changing modes |
800eeca4 | 4590 | */ |
542d6675 | 4591 | |
800eeca4 JW |
4592 | static void |
4593 | dot_dv_mode (type) | |
542d6675 | 4594 | int type; |
800eeca4 JW |
4595 | { |
4596 | if (md.manual_bundling) | |
4597 | as_warn (_("Directive invalid within a bundle")); | |
4598 | ||
4599 | if (type == 'E' || type == 'A') | |
4600 | md.mode_explicitly_set = 0; | |
4601 | else | |
4602 | md.mode_explicitly_set = 1; | |
4603 | ||
4604 | md.detect_dv = 1; | |
4605 | switch (type) | |
4606 | { | |
4607 | case 'A': | |
4608 | case 'a': | |
4609 | if (md.explicit_mode) | |
542d6675 | 4610 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4611 | md.explicit_mode = 0; |
4612 | break; | |
4613 | case 'E': | |
4614 | case 'e': | |
4615 | if (!md.explicit_mode) | |
542d6675 | 4616 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4617 | md.explicit_mode = 1; |
4618 | break; | |
4619 | default: | |
4620 | case 'd': | |
4621 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4622 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4623 | md.explicit_mode = md.default_explicit_mode; |
4624 | md.mode_explicitly_set = 0; | |
4625 | break; | |
4626 | } | |
4627 | } | |
4628 | ||
4629 | static void | |
4630 | print_prmask (mask) | |
542d6675 | 4631 | valueT mask; |
800eeca4 JW |
4632 | { |
4633 | int regno; | |
4634 | char *comma = ""; | |
542d6675 | 4635 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4636 | { |
542d6675 KH |
4637 | if (mask & ((valueT) 1 << regno)) |
4638 | { | |
4639 | fprintf (stderr, "%s p%d", comma, regno); | |
4640 | comma = ","; | |
4641 | } | |
800eeca4 JW |
4642 | } |
4643 | } | |
4644 | ||
4645 | /* | |
4646 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear") | |
4647 | .pred.rel.imply p1, p2 (also .pred.rel "imply") | |
4648 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex") | |
4649 | .pred.safe_across_calls p1 [, p2 [,...]] | |
4650 | */ | |
542d6675 | 4651 | |
800eeca4 JW |
4652 | static void |
4653 | dot_pred_rel (type) | |
542d6675 | 4654 | int type; |
800eeca4 JW |
4655 | { |
4656 | valueT mask = 0; | |
4657 | int count = 0; | |
4658 | int p1 = -1, p2 = -1; | |
4659 | ||
4660 | if (type == 0) | |
4661 | { | |
4662 | if (*input_line_pointer != '"') | |
542d6675 KH |
4663 | { |
4664 | as_bad (_("Missing predicate relation type")); | |
4665 | ignore_rest_of_line (); | |
4666 | return; | |
4667 | } | |
197865e8 | 4668 | else |
542d6675 KH |
4669 | { |
4670 | int len; | |
4671 | char *form = demand_copy_C_string (&len); | |
4672 | if (strcmp (form, "mutex") == 0) | |
4673 | type = 'm'; | |
4674 | else if (strcmp (form, "clear") == 0) | |
4675 | type = 'c'; | |
4676 | else if (strcmp (form, "imply") == 0) | |
4677 | type = 'i'; | |
4678 | else | |
4679 | { | |
4680 | as_bad (_("Unrecognized predicate relation type")); | |
4681 | ignore_rest_of_line (); | |
4682 | return; | |
4683 | } | |
4684 | } | |
800eeca4 | 4685 | if (*input_line_pointer == ',') |
542d6675 | 4686 | ++input_line_pointer; |
800eeca4 JW |
4687 | SKIP_WHITESPACE (); |
4688 | } | |
4689 | ||
4690 | SKIP_WHITESPACE (); | |
4691 | while (1) | |
4692 | { | |
4693 | valueT bit = 1; | |
4694 | int regno; | |
197865e8 | 4695 | |
3882b010 | 4696 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4697 | || (regno = atoi (++input_line_pointer)) < 0 |
4698 | || regno > 63) | |
4699 | { | |
4700 | as_bad (_("Predicate register expected")); | |
4701 | ignore_rest_of_line (); | |
4702 | return; | |
4703 | } | |
3882b010 | 4704 | while (ISDIGIT (*input_line_pointer)) |
542d6675 | 4705 | ++input_line_pointer; |
800eeca4 | 4706 | if (p1 == -1) |
542d6675 | 4707 | p1 = regno; |
800eeca4 | 4708 | else if (p2 == -1) |
542d6675 | 4709 | p2 = regno; |
800eeca4 JW |
4710 | bit <<= regno; |
4711 | if (mask & bit) | |
542d6675 KH |
4712 | as_warn (_("Duplicate predicate register ignored")); |
4713 | mask |= bit; | |
4714 | count++; | |
4715 | /* See if it's a range. */ | |
800eeca4 | 4716 | if (*input_line_pointer == '-') |
542d6675 KH |
4717 | { |
4718 | valueT stop = 1; | |
4719 | ++input_line_pointer; | |
4720 | ||
3882b010 | 4721 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4722 | || (regno = atoi (++input_line_pointer)) < 0 |
4723 | || regno > 63) | |
4724 | { | |
4725 | as_bad (_("Predicate register expected")); | |
4726 | ignore_rest_of_line (); | |
4727 | return; | |
4728 | } | |
3882b010 | 4729 | while (ISDIGIT (*input_line_pointer)) |
542d6675 KH |
4730 | ++input_line_pointer; |
4731 | stop <<= regno; | |
4732 | if (bit >= stop) | |
4733 | { | |
4734 | as_bad (_("Bad register range")); | |
4735 | ignore_rest_of_line (); | |
4736 | return; | |
4737 | } | |
4738 | while (bit < stop) | |
4739 | { | |
4740 | bit <<= 1; | |
4741 | mask |= bit; | |
4742 | count++; | |
4743 | } | |
4744 | SKIP_WHITESPACE (); | |
4745 | } | |
800eeca4 | 4746 | if (*input_line_pointer != ',') |
542d6675 | 4747 | break; |
800eeca4 JW |
4748 | ++input_line_pointer; |
4749 | SKIP_WHITESPACE (); | |
4750 | } | |
4751 | ||
4752 | switch (type) | |
4753 | { | |
4754 | case 'c': | |
4755 | if (count == 0) | |
542d6675 | 4756 | mask = ~(valueT) 0; |
800eeca4 | 4757 | clear_qp_mutex (mask); |
197865e8 | 4758 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
4759 | break; |
4760 | case 'i': | |
4761 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 4762 | as_bad (_("Predicate source and target required")); |
800eeca4 | 4763 | else if (p1 == 0 || p2 == 0) |
542d6675 | 4764 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 4765 | else |
542d6675 | 4766 | add_qp_imply (p1, p2); |
800eeca4 JW |
4767 | break; |
4768 | case 'm': | |
4769 | if (count < 2) | |
542d6675 KH |
4770 | { |
4771 | as_bad (_("At least two PR arguments expected")); | |
4772 | break; | |
4773 | } | |
800eeca4 | 4774 | else if (mask & 1) |
542d6675 KH |
4775 | { |
4776 | as_bad (_("Use of p0 is not valid in this context")); | |
4777 | break; | |
4778 | } | |
800eeca4 JW |
4779 | add_qp_mutex (mask); |
4780 | break; | |
4781 | case 's': | |
4782 | /* note that we don't override any existing relations */ | |
4783 | if (count == 0) | |
542d6675 KH |
4784 | { |
4785 | as_bad (_("At least one PR argument expected")); | |
4786 | break; | |
4787 | } | |
800eeca4 | 4788 | if (md.debug_dv) |
542d6675 KH |
4789 | { |
4790 | fprintf (stderr, "Safe across calls: "); | |
4791 | print_prmask (mask); | |
4792 | fprintf (stderr, "\n"); | |
4793 | } | |
800eeca4 JW |
4794 | qp_safe_across_calls = mask; |
4795 | break; | |
4796 | } | |
4797 | demand_empty_rest_of_line (); | |
4798 | } | |
4799 | ||
4800 | /* .entry label [, label [, ...]] | |
4801 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
4802 | Otherwise, only global labels are considered entry points. */ |
4803 | ||
800eeca4 JW |
4804 | static void |
4805 | dot_entry (dummy) | |
2434f565 | 4806 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4807 | { |
4808 | const char *err; | |
4809 | char *name; | |
4810 | int c; | |
4811 | symbolS *symbolP; | |
4812 | ||
4813 | do | |
4814 | { | |
4815 | name = input_line_pointer; | |
4816 | c = get_symbol_end (); | |
4817 | symbolP = symbol_find_or_make (name); | |
4818 | ||
4819 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
4820 | if (err) | |
542d6675 KH |
4821 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
4822 | name, err); | |
800eeca4 JW |
4823 | |
4824 | *input_line_pointer = c; | |
4825 | SKIP_WHITESPACE (); | |
4826 | c = *input_line_pointer; | |
4827 | if (c == ',') | |
4828 | { | |
4829 | input_line_pointer++; | |
4830 | SKIP_WHITESPACE (); | |
4831 | if (*input_line_pointer == '\n') | |
4832 | c = '\n'; | |
4833 | } | |
4834 | } | |
4835 | while (c == ','); | |
4836 | ||
4837 | demand_empty_rest_of_line (); | |
4838 | } | |
4839 | ||
197865e8 | 4840 | /* .mem.offset offset, base |
542d6675 KH |
4841 | "base" is used to distinguish between offsets from a different base. */ |
4842 | ||
800eeca4 JW |
4843 | static void |
4844 | dot_mem_offset (dummy) | |
2434f565 | 4845 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4846 | { |
4847 | md.mem_offset.hint = 1; | |
4848 | md.mem_offset.offset = get_absolute_expression (); | |
4849 | if (*input_line_pointer != ',') | |
4850 | { | |
4851 | as_bad (_("Comma expected")); | |
4852 | ignore_rest_of_line (); | |
4853 | return; | |
4854 | } | |
4855 | ++input_line_pointer; | |
4856 | md.mem_offset.base = get_absolute_expression (); | |
4857 | demand_empty_rest_of_line (); | |
4858 | } | |
4859 | ||
542d6675 | 4860 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
4861 | const pseudo_typeS md_pseudo_table[] = |
4862 | { | |
4863 | { "radix", dot_radix, 0 }, | |
4864 | { "lcomm", s_lcomm_bytes, 1 }, | |
4865 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, | |
4866 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
4867 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
4868 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
4869 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
4870 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
4871 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
4872 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
4873 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
4874 | { "proc", dot_proc, 0 }, |
4875 | { "body", dot_body, 0 }, | |
4876 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 4877 | { "endp", dot_endp, 0 }, |
2434f565 JW |
4878 | |
4879 | { "fframe", dot_fframe, 0 }, | |
4880 | { "vframe", dot_vframe, 0 }, | |
4881 | { "vframesp", dot_vframesp, 0 }, | |
4882 | { "vframepsp", dot_vframepsp, 0 }, | |
4883 | { "save", dot_save, 0 }, | |
4884 | { "restore", dot_restore, 0 }, | |
4885 | { "restorereg", dot_restorereg, 0 }, | |
4886 | { "restorereg.p", dot_restorereg_p, 0 }, | |
4887 | { "handlerdata", dot_handlerdata, 0 }, | |
4888 | { "unwentry", dot_unwentry, 0 }, | |
4889 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
4890 | { "savesp", dot_savemem, 0 }, |
4891 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
4892 | { "save.g", dot_saveg, 0 }, |
4893 | { "save.f", dot_savef, 0 }, | |
4894 | { "save.b", dot_saveb, 0 }, | |
4895 | { "save.gf", dot_savegf, 0 }, | |
4896 | { "spill", dot_spill, 0 }, | |
4897 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
4898 | { "spillsp", dot_spillmem, 0 }, |
4899 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 4900 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
4901 | { "spillsp.p", dot_spillmem_p, 0 }, |
4902 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
4903 | { "label_state", dot_label_state, 0 }, |
4904 | { "copy_state", dot_copy_state, 0 }, | |
4905 | { "unwabi", dot_unwabi, 0 }, | |
4906 | { "personality", dot_personality, 0 }, | |
800eeca4 | 4907 | #if 0 |
2434f565 | 4908 | { "estate", dot_estate, 0 }, |
800eeca4 JW |
4909 | #endif |
4910 | { "mii", dot_template, 0x0 }, | |
4911 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
4912 | { "mlx", dot_template, 0x2 }, | |
4913 | { "mmi", dot_template, 0x4 }, | |
4914 | { "mfi", dot_template, 0x6 }, | |
4915 | { "mmf", dot_template, 0x7 }, | |
4916 | { "mib", dot_template, 0x8 }, | |
4917 | { "mbb", dot_template, 0x9 }, | |
4918 | { "bbb", dot_template, 0xb }, | |
4919 | { "mmb", dot_template, 0xc }, | |
4920 | { "mfb", dot_template, 0xe }, | |
4921 | #if 0 | |
4922 | { "lb", dot_scope, 0 }, | |
4923 | { "le", dot_scope, 1 }, | |
4924 | #endif | |
4925 | { "align", s_align_bytes, 0 }, | |
4926 | { "regstk", dot_regstk, 0 }, | |
4927 | { "rotr", dot_rot, DYNREG_GR }, | |
4928 | { "rotf", dot_rot, DYNREG_FR }, | |
4929 | { "rotp", dot_rot, DYNREG_PR }, | |
4930 | { "lsb", dot_byteorder, 0 }, | |
4931 | { "msb", dot_byteorder, 1 }, | |
4932 | { "psr", dot_psr, 0 }, | |
4933 | { "alias", dot_alias, 0 }, | |
35f5df7f | 4934 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
4935 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
4936 | ||
4937 | { "xdata1", dot_xdata, 1 }, | |
4938 | { "xdata2", dot_xdata, 2 }, | |
4939 | { "xdata4", dot_xdata, 4 }, | |
4940 | { "xdata8", dot_xdata, 8 }, | |
4941 | { "xreal4", dot_xfloat_cons, 'f' }, | |
4942 | { "xreal8", dot_xfloat_cons, 'd' }, | |
4943 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 4944 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
4945 | { "xstring", dot_xstringer, 0 }, |
4946 | { "xstringz", dot_xstringer, 1 }, | |
4947 | ||
542d6675 | 4948 | /* unaligned versions: */ |
800eeca4 JW |
4949 | { "xdata2.ua", dot_xdata_ua, 2 }, |
4950 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
4951 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
4952 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, | |
4953 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
4954 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 4955 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
4956 | |
4957 | /* annotations/DV checking support */ | |
4958 | { "entry", dot_entry, 0 }, | |
2434f565 | 4959 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
4960 | { "pred.rel", dot_pred_rel, 0 }, |
4961 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
4962 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
4963 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
4964 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 4965 | { "reg.val", dot_reg_val, 0 }, |
800eeca4 JW |
4966 | { "auto", dot_dv_mode, 'a' }, |
4967 | { "explicit", dot_dv_mode, 'e' }, | |
4968 | { "default", dot_dv_mode, 'd' }, | |
4969 | ||
87885043 JW |
4970 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
4971 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
4972 | tell it that these ones are supposed to be unaligned. Long term, | |
4973 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
4974 | are aligned by default. */ | |
4975 | {"2byte", stmt_cons_ua, 2}, | |
4976 | {"4byte", stmt_cons_ua, 4}, | |
4977 | {"8byte", stmt_cons_ua, 8}, | |
4978 | ||
800eeca4 JW |
4979 | { NULL, 0, 0 } |
4980 | }; | |
4981 | ||
4982 | static const struct pseudo_opcode | |
4983 | { | |
4984 | const char *name; | |
4985 | void (*handler) (int); | |
4986 | int arg; | |
4987 | } | |
4988 | pseudo_opcode[] = | |
4989 | { | |
4990 | /* these are more like pseudo-ops, but don't start with a dot */ | |
4991 | { "data1", cons, 1 }, | |
4992 | { "data2", cons, 2 }, | |
4993 | { "data4", cons, 4 }, | |
4994 | { "data8", cons, 8 }, | |
3969b680 | 4995 | { "data16", cons, 16 }, |
800eeca4 JW |
4996 | { "real4", stmt_float_cons, 'f' }, |
4997 | { "real8", stmt_float_cons, 'd' }, | |
4998 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 4999 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5000 | { "string", stringer, 0 }, |
5001 | { "stringz", stringer, 1 }, | |
5002 | ||
542d6675 | 5003 | /* unaligned versions: */ |
800eeca4 JW |
5004 | { "data2.ua", stmt_cons_ua, 2 }, |
5005 | { "data4.ua", stmt_cons_ua, 4 }, | |
5006 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5007 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5008 | { "real4.ua", float_cons, 'f' }, |
5009 | { "real8.ua", float_cons, 'd' }, | |
5010 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5011 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5012 | }; |
5013 | ||
5014 | /* Declare a register by creating a symbol for it and entering it in | |
5015 | the symbol table. */ | |
542d6675 KH |
5016 | |
5017 | static symbolS * | |
800eeca4 JW |
5018 | declare_register (name, regnum) |
5019 | const char *name; | |
5020 | int regnum; | |
5021 | { | |
5022 | const char *err; | |
5023 | symbolS *sym; | |
5024 | ||
5025 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5026 | ||
5027 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5028 | if (err) | |
5029 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5030 | name, err); | |
5031 | ||
5032 | return sym; | |
5033 | } | |
5034 | ||
5035 | static void | |
5036 | declare_register_set (prefix, num_regs, base_regnum) | |
5037 | const char *prefix; | |
5038 | int num_regs; | |
5039 | int base_regnum; | |
5040 | { | |
5041 | char name[8]; | |
5042 | int i; | |
5043 | ||
5044 | for (i = 0; i < num_regs; ++i) | |
5045 | { | |
5046 | sprintf (name, "%s%u", prefix, i); | |
5047 | declare_register (name, base_regnum + i); | |
5048 | } | |
5049 | } | |
5050 | ||
5051 | static unsigned int | |
5052 | operand_width (opnd) | |
5053 | enum ia64_opnd opnd; | |
5054 | { | |
5055 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5056 | unsigned int bits = 0; | |
5057 | int i; | |
5058 | ||
5059 | bits = 0; | |
5060 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5061 | bits += odesc->field[i].bits; | |
5062 | ||
5063 | return bits; | |
5064 | } | |
5065 | ||
87f8eb97 | 5066 | static enum operand_match_result |
800eeca4 JW |
5067 | operand_match (idesc, index, e) |
5068 | const struct ia64_opcode *idesc; | |
5069 | int index; | |
5070 | expressionS *e; | |
5071 | { | |
5072 | enum ia64_opnd opnd = idesc->operands[index]; | |
5073 | int bits, relocatable = 0; | |
5074 | struct insn_fix *fix; | |
5075 | bfd_signed_vma val; | |
5076 | ||
5077 | switch (opnd) | |
5078 | { | |
542d6675 | 5079 | /* constants: */ |
800eeca4 JW |
5080 | |
5081 | case IA64_OPND_AR_CCV: | |
5082 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5083 | return OPERAND_MATCH; |
800eeca4 JW |
5084 | break; |
5085 | ||
c10d9d8f JW |
5086 | case IA64_OPND_AR_CSD: |
5087 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5088 | return OPERAND_MATCH; | |
5089 | break; | |
5090 | ||
800eeca4 JW |
5091 | case IA64_OPND_AR_PFS: |
5092 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5093 | return OPERAND_MATCH; |
800eeca4 JW |
5094 | break; |
5095 | ||
5096 | case IA64_OPND_GR0: | |
5097 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5098 | return OPERAND_MATCH; |
800eeca4 JW |
5099 | break; |
5100 | ||
5101 | case IA64_OPND_IP: | |
5102 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5103 | return OPERAND_MATCH; |
800eeca4 JW |
5104 | break; |
5105 | ||
5106 | case IA64_OPND_PR: | |
5107 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5108 | return OPERAND_MATCH; |
800eeca4 JW |
5109 | break; |
5110 | ||
5111 | case IA64_OPND_PR_ROT: | |
5112 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5113 | return OPERAND_MATCH; |
800eeca4 JW |
5114 | break; |
5115 | ||
5116 | case IA64_OPND_PSR: | |
5117 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5118 | return OPERAND_MATCH; |
800eeca4 JW |
5119 | break; |
5120 | ||
5121 | case IA64_OPND_PSR_L: | |
5122 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5123 | return OPERAND_MATCH; |
800eeca4 JW |
5124 | break; |
5125 | ||
5126 | case IA64_OPND_PSR_UM: | |
5127 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5128 | return OPERAND_MATCH; |
800eeca4 JW |
5129 | break; |
5130 | ||
5131 | case IA64_OPND_C1: | |
87f8eb97 JW |
5132 | if (e->X_op == O_constant) |
5133 | { | |
5134 | if (e->X_add_number == 1) | |
5135 | return OPERAND_MATCH; | |
5136 | else | |
5137 | return OPERAND_OUT_OF_RANGE; | |
5138 | } | |
800eeca4 JW |
5139 | break; |
5140 | ||
5141 | case IA64_OPND_C8: | |
87f8eb97 JW |
5142 | if (e->X_op == O_constant) |
5143 | { | |
5144 | if (e->X_add_number == 8) | |
5145 | return OPERAND_MATCH; | |
5146 | else | |
5147 | return OPERAND_OUT_OF_RANGE; | |
5148 | } | |
800eeca4 JW |
5149 | break; |
5150 | ||
5151 | case IA64_OPND_C16: | |
87f8eb97 JW |
5152 | if (e->X_op == O_constant) |
5153 | { | |
5154 | if (e->X_add_number == 16) | |
5155 | return OPERAND_MATCH; | |
5156 | else | |
5157 | return OPERAND_OUT_OF_RANGE; | |
5158 | } | |
800eeca4 JW |
5159 | break; |
5160 | ||
542d6675 | 5161 | /* register operands: */ |
800eeca4 JW |
5162 | |
5163 | case IA64_OPND_AR3: | |
5164 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5165 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5166 | return OPERAND_MATCH; |
800eeca4 JW |
5167 | break; |
5168 | ||
5169 | case IA64_OPND_B1: | |
5170 | case IA64_OPND_B2: | |
5171 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5172 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5173 | return OPERAND_MATCH; |
800eeca4 JW |
5174 | break; |
5175 | ||
5176 | case IA64_OPND_CR3: | |
5177 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5178 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5179 | return OPERAND_MATCH; |
800eeca4 JW |
5180 | break; |
5181 | ||
5182 | case IA64_OPND_F1: | |
5183 | case IA64_OPND_F2: | |
5184 | case IA64_OPND_F3: | |
5185 | case IA64_OPND_F4: | |
5186 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5187 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5188 | return OPERAND_MATCH; |
800eeca4 JW |
5189 | break; |
5190 | ||
5191 | case IA64_OPND_P1: | |
5192 | case IA64_OPND_P2: | |
5193 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5194 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5195 | return OPERAND_MATCH; |
800eeca4 JW |
5196 | break; |
5197 | ||
5198 | case IA64_OPND_R1: | |
5199 | case IA64_OPND_R2: | |
5200 | case IA64_OPND_R3: | |
5201 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5202 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5203 | return OPERAND_MATCH; |
800eeca4 JW |
5204 | break; |
5205 | ||
5206 | case IA64_OPND_R3_2: | |
87f8eb97 | 5207 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5208 | { |
87f8eb97 JW |
5209 | if (e->X_add_number < REG_GR + 4) |
5210 | return OPERAND_MATCH; | |
5211 | else if (e->X_add_number < REG_GR + 128) | |
5212 | return OPERAND_OUT_OF_RANGE; | |
5213 | } | |
800eeca4 JW |
5214 | break; |
5215 | ||
542d6675 | 5216 | /* indirect operands: */ |
800eeca4 JW |
5217 | case IA64_OPND_CPUID_R3: |
5218 | case IA64_OPND_DBR_R3: | |
5219 | case IA64_OPND_DTR_R3: | |
5220 | case IA64_OPND_ITR_R3: | |
5221 | case IA64_OPND_IBR_R3: | |
5222 | case IA64_OPND_MSR_R3: | |
5223 | case IA64_OPND_PKR_R3: | |
5224 | case IA64_OPND_PMC_R3: | |
5225 | case IA64_OPND_PMD_R3: | |
5226 | case IA64_OPND_RR_R3: | |
5227 | if (e->X_op == O_index && e->X_op_symbol | |
5228 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5229 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5230 | return OPERAND_MATCH; |
800eeca4 JW |
5231 | break; |
5232 | ||
5233 | case IA64_OPND_MR3: | |
5234 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5235 | return OPERAND_MATCH; |
800eeca4 JW |
5236 | break; |
5237 | ||
542d6675 | 5238 | /* immediate operands: */ |
800eeca4 JW |
5239 | case IA64_OPND_CNT2a: |
5240 | case IA64_OPND_LEN4: | |
5241 | case IA64_OPND_LEN6: | |
5242 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5243 | if (e->X_op == O_constant) |
5244 | { | |
5245 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5246 | return OPERAND_MATCH; | |
5247 | else | |
5248 | return OPERAND_OUT_OF_RANGE; | |
5249 | } | |
800eeca4 JW |
5250 | break; |
5251 | ||
5252 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5253 | if (e->X_op == O_constant) |
5254 | { | |
5255 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5256 | return OPERAND_MATCH; | |
5257 | else | |
5258 | return OPERAND_OUT_OF_RANGE; | |
5259 | } | |
800eeca4 JW |
5260 | break; |
5261 | ||
5262 | case IA64_OPND_CNT2c: | |
5263 | val = e->X_add_number; | |
87f8eb97 JW |
5264 | if (e->X_op == O_constant) |
5265 | { | |
5266 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5267 | return OPERAND_MATCH; | |
5268 | else | |
5269 | return OPERAND_OUT_OF_RANGE; | |
5270 | } | |
800eeca4 JW |
5271 | break; |
5272 | ||
5273 | case IA64_OPND_SOR: | |
5274 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5275 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5276 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5277 | case IA64_OPND_SOF: |
5278 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5279 | if (e->X_op == O_constant) |
5280 | { | |
5281 | if ((bfd_vma) e->X_add_number <= 96) | |
5282 | return OPERAND_MATCH; | |
5283 | else | |
5284 | return OPERAND_OUT_OF_RANGE; | |
5285 | } | |
800eeca4 JW |
5286 | break; |
5287 | ||
5288 | case IA64_OPND_IMMU62: | |
5289 | if (e->X_op == O_constant) | |
542d6675 | 5290 | { |
800eeca4 | 5291 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5292 | return OPERAND_MATCH; |
5293 | else | |
5294 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5295 | } |
197865e8 | 5296 | else |
542d6675 KH |
5297 | { |
5298 | /* FIXME -- need 62-bit relocation type */ | |
5299 | as_bad (_("62-bit relocation not yet implemented")); | |
5300 | } | |
800eeca4 JW |
5301 | break; |
5302 | ||
5303 | case IA64_OPND_IMMU64: | |
5304 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5305 | || e->X_op == O_subtract) | |
5306 | { | |
5307 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5308 | fix->code = BFD_RELOC_IA64_IMM64; | |
5309 | if (e->X_op != O_subtract) | |
5310 | { | |
5311 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5312 | if (e->X_op == O_pseudo_fixup) | |
5313 | e->X_op = O_symbol; | |
5314 | } | |
5315 | ||
5316 | fix->opnd = idesc->operands[index]; | |
5317 | fix->expr = *e; | |
5318 | fix->is_pcrel = 0; | |
5319 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5320 | return OPERAND_MATCH; |
800eeca4 JW |
5321 | } |
5322 | else if (e->X_op == O_constant) | |
87f8eb97 | 5323 | return OPERAND_MATCH; |
800eeca4 JW |
5324 | break; |
5325 | ||
5326 | case IA64_OPND_CCNT5: | |
5327 | case IA64_OPND_CNT5: | |
5328 | case IA64_OPND_CNT6: | |
5329 | case IA64_OPND_CPOS6a: | |
5330 | case IA64_OPND_CPOS6b: | |
5331 | case IA64_OPND_CPOS6c: | |
5332 | case IA64_OPND_IMMU2: | |
5333 | case IA64_OPND_IMMU7a: | |
5334 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5335 | case IA64_OPND_IMMU21: |
5336 | case IA64_OPND_IMMU24: | |
5337 | case IA64_OPND_MBTYPE4: | |
5338 | case IA64_OPND_MHTYPE8: | |
5339 | case IA64_OPND_POS6: | |
5340 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5341 | if (e->X_op == O_constant) |
5342 | { | |
5343 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5344 | return OPERAND_MATCH; | |
5345 | else | |
5346 | return OPERAND_OUT_OF_RANGE; | |
5347 | } | |
800eeca4 JW |
5348 | break; |
5349 | ||
bf3ca999 TW |
5350 | case IA64_OPND_IMMU9: |
5351 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5352 | if (e->X_op == O_constant) |
542d6675 | 5353 | { |
87f8eb97 JW |
5354 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5355 | { | |
5356 | int lobits = e->X_add_number & 0x3; | |
5357 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5358 | e->X_add_number |= (bfd_vma) 0x3; | |
5359 | return OPERAND_MATCH; | |
5360 | } | |
5361 | else | |
5362 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5363 | } |
bf3ca999 TW |
5364 | break; |
5365 | ||
800eeca4 JW |
5366 | case IA64_OPND_IMM44: |
5367 | /* least 16 bits must be zero */ | |
5368 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5369 | /* XXX technically, this is wrong: we should not be issuing warning |
5370 | messages until we're sure this instruction pattern is going to | |
5371 | be used! */ | |
542d6675 | 5372 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5373 | |
87f8eb97 | 5374 | if (e->X_op == O_constant) |
542d6675 | 5375 | { |
87f8eb97 JW |
5376 | if (((e->X_add_number >= 0 |
5377 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5378 | || (e->X_add_number < 0 | |
5379 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5380 | { |
87f8eb97 JW |
5381 | /* sign-extend */ |
5382 | if (e->X_add_number >= 0 | |
5383 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5384 | { | |
5385 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5386 | } | |
5387 | return OPERAND_MATCH; | |
542d6675 | 5388 | } |
87f8eb97 JW |
5389 | else |
5390 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5391 | } |
800eeca4 JW |
5392 | break; |
5393 | ||
5394 | case IA64_OPND_IMM17: | |
5395 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5396 | if (e->X_op == O_constant) |
542d6675 | 5397 | { |
87f8eb97 JW |
5398 | if (((e->X_add_number >= 0 |
5399 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5400 | || (e->X_add_number < 0 | |
5401 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5402 | { |
87f8eb97 JW |
5403 | /* sign-extend */ |
5404 | if (e->X_add_number >= 0 | |
5405 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5406 | { | |
5407 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5408 | } | |
5409 | return OPERAND_MATCH; | |
542d6675 | 5410 | } |
87f8eb97 JW |
5411 | else |
5412 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5413 | } |
800eeca4 JW |
5414 | break; |
5415 | ||
5416 | case IA64_OPND_IMM14: | |
5417 | case IA64_OPND_IMM22: | |
5418 | relocatable = 1; | |
5419 | case IA64_OPND_IMM1: | |
5420 | case IA64_OPND_IMM8: | |
5421 | case IA64_OPND_IMM8U4: | |
5422 | case IA64_OPND_IMM8M1: | |
5423 | case IA64_OPND_IMM8M1U4: | |
5424 | case IA64_OPND_IMM8M1U8: | |
5425 | case IA64_OPND_IMM9a: | |
5426 | case IA64_OPND_IMM9b: | |
5427 | bits = operand_width (idesc->operands[index]); | |
5428 | if (relocatable && (e->X_op == O_symbol | |
5429 | || e->X_op == O_subtract | |
5430 | || e->X_op == O_pseudo_fixup)) | |
5431 | { | |
5432 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5433 | ||
5434 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5435 | fix->code = BFD_RELOC_IA64_IMM14; | |
5436 | else | |
5437 | fix->code = BFD_RELOC_IA64_IMM22; | |
5438 | ||
5439 | if (e->X_op != O_subtract) | |
5440 | { | |
5441 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5442 | if (e->X_op == O_pseudo_fixup) | |
5443 | e->X_op = O_symbol; | |
5444 | } | |
5445 | ||
5446 | fix->opnd = idesc->operands[index]; | |
5447 | fix->expr = *e; | |
5448 | fix->is_pcrel = 0; | |
5449 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5450 | return OPERAND_MATCH; |
800eeca4 JW |
5451 | } |
5452 | else if (e->X_op != O_constant | |
5453 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5454 | return OPERAND_MISMATCH; |
800eeca4 JW |
5455 | |
5456 | if (opnd == IA64_OPND_IMM8M1U4) | |
5457 | { | |
5458 | /* Zero is not valid for unsigned compares that take an adjusted | |
5459 | constant immediate range. */ | |
5460 | if (e->X_add_number == 0) | |
87f8eb97 | 5461 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5462 | |
5463 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5464 | checks will work. */ | |
5465 | val = e->X_add_number; | |
197865e8 KH |
5466 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5467 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5468 | val = ((val << 32) >> 32); |
5469 | ||
5470 | /* Check for 0x100000000. This is valid because | |
5471 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5472 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5473 | return OPERAND_MATCH; |
800eeca4 JW |
5474 | |
5475 | val = val - 1; | |
5476 | } | |
5477 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5478 | { | |
5479 | /* Zero is not valid for unsigned compares that take an adjusted | |
5480 | constant immediate range. */ | |
5481 | if (e->X_add_number == 0) | |
87f8eb97 | 5482 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5483 | |
5484 | /* Check for 0x10000000000000000. */ | |
5485 | if (e->X_op == O_big) | |
5486 | { | |
5487 | if (generic_bignum[0] == 0 | |
5488 | && generic_bignum[1] == 0 | |
5489 | && generic_bignum[2] == 0 | |
5490 | && generic_bignum[3] == 0 | |
5491 | && generic_bignum[4] == 1) | |
87f8eb97 | 5492 | return OPERAND_MATCH; |
800eeca4 | 5493 | else |
87f8eb97 | 5494 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5495 | } |
5496 | else | |
5497 | val = e->X_add_number - 1; | |
5498 | } | |
5499 | else if (opnd == IA64_OPND_IMM8M1) | |
5500 | val = e->X_add_number - 1; | |
5501 | else if (opnd == IA64_OPND_IMM8U4) | |
5502 | { | |
5503 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5504 | checks will work. */ | |
5505 | val = e->X_add_number; | |
197865e8 KH |
5506 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5507 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5508 | val = ((val << 32) >> 32); |
5509 | } | |
5510 | else | |
5511 | val = e->X_add_number; | |
5512 | ||
2434f565 JW |
5513 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5514 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5515 | return OPERAND_MATCH; |
5516 | else | |
5517 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5518 | |
5519 | case IA64_OPND_INC3: | |
5520 | /* +/- 1, 4, 8, 16 */ | |
5521 | val = e->X_add_number; | |
5522 | if (val < 0) | |
5523 | val = -val; | |
87f8eb97 JW |
5524 | if (e->X_op == O_constant) |
5525 | { | |
5526 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5527 | return OPERAND_MATCH; | |
5528 | else | |
5529 | return OPERAND_OUT_OF_RANGE; | |
5530 | } | |
800eeca4 JW |
5531 | break; |
5532 | ||
5533 | case IA64_OPND_TGT25: | |
5534 | case IA64_OPND_TGT25b: | |
5535 | case IA64_OPND_TGT25c: | |
5536 | case IA64_OPND_TGT64: | |
5537 | if (e->X_op == O_symbol) | |
5538 | { | |
5539 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5540 | if (opnd == IA64_OPND_TGT25) | |
5541 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5542 | else if (opnd == IA64_OPND_TGT25b) | |
5543 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5544 | else if (opnd == IA64_OPND_TGT25c) | |
5545 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5546 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5547 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5548 | else | |
5549 | abort (); | |
5550 | ||
800eeca4 JW |
5551 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5552 | fix->opnd = idesc->operands[index]; | |
5553 | fix->expr = *e; | |
5554 | fix->is_pcrel = 1; | |
5555 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5556 | return OPERAND_MATCH; |
800eeca4 JW |
5557 | } |
5558 | case IA64_OPND_TAG13: | |
5559 | case IA64_OPND_TAG13b: | |
5560 | switch (e->X_op) | |
5561 | { | |
5562 | case O_constant: | |
87f8eb97 | 5563 | return OPERAND_MATCH; |
800eeca4 JW |
5564 | |
5565 | case O_symbol: | |
5566 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5567 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5568 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5569 | fix->code = BFD_RELOC_UNUSED; | |
5570 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5571 | fix->opnd = idesc->operands[index]; |
5572 | fix->expr = *e; | |
5573 | fix->is_pcrel = 1; | |
5574 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5575 | return OPERAND_MATCH; |
800eeca4 JW |
5576 | |
5577 | default: | |
5578 | break; | |
5579 | } | |
5580 | break; | |
5581 | ||
a823923b RH |
5582 | case IA64_OPND_LDXMOV: |
5583 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5584 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5585 | fix->opnd = idesc->operands[index]; | |
5586 | fix->expr = *e; | |
5587 | fix->is_pcrel = 0; | |
5588 | ++CURR_SLOT.num_fixups; | |
5589 | return OPERAND_MATCH; | |
5590 | ||
800eeca4 JW |
5591 | default: |
5592 | break; | |
5593 | } | |
87f8eb97 | 5594 | return OPERAND_MISMATCH; |
800eeca4 JW |
5595 | } |
5596 | ||
5597 | static int | |
5598 | parse_operand (e) | |
5599 | expressionS *e; | |
5600 | { | |
5601 | int sep = '\0'; | |
5602 | ||
5603 | memset (e, 0, sizeof (*e)); | |
5604 | e->X_op = O_absent; | |
5605 | SKIP_WHITESPACE (); | |
5606 | if (*input_line_pointer != '}') | |
5607 | expression (e); | |
5608 | sep = *input_line_pointer++; | |
5609 | ||
5610 | if (sep == '}') | |
5611 | { | |
5612 | if (!md.manual_bundling) | |
5613 | as_warn ("Found '}' when manual bundling is off"); | |
5614 | else | |
5615 | CURR_SLOT.manual_bundling_off = 1; | |
5616 | md.manual_bundling = 0; | |
5617 | sep = '\0'; | |
5618 | } | |
5619 | return sep; | |
5620 | } | |
5621 | ||
5622 | /* Returns the next entry in the opcode table that matches the one in | |
5623 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5624 | found, NULL is returned instead. */ |
800eeca4 JW |
5625 | |
5626 | static struct ia64_opcode * | |
5627 | get_next_opcode (struct ia64_opcode *idesc) | |
5628 | { | |
5629 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
5630 | ia64_free_opcode (idesc); | |
5631 | return next; | |
5632 | } | |
5633 | ||
5634 | /* Parse the operands for the opcode and find the opcode variant that | |
5635 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
5636 | |
5637 | static struct ia64_opcode * | |
800eeca4 JW |
5638 | parse_operands (idesc) |
5639 | struct ia64_opcode *idesc; | |
5640 | { | |
5641 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 5642 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
800eeca4 | 5643 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 5644 | enum operand_match_result result; |
800eeca4 JW |
5645 | char mnemonic[129]; |
5646 | char *first_arg = 0, *end, *saved_input_pointer; | |
5647 | unsigned int sof; | |
5648 | ||
5649 | assert (strlen (idesc->name) <= 128); | |
5650 | ||
5651 | strcpy (mnemonic, idesc->name); | |
5652 | if (idesc->operands[2] == IA64_OPND_SOF) | |
5653 | { | |
5654 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
5655 | can't parse the first operand until we have parsed the | |
5656 | remaining operands of the "alloc" instruction. */ | |
5657 | SKIP_WHITESPACE (); | |
5658 | first_arg = input_line_pointer; | |
5659 | end = strchr (input_line_pointer, '='); | |
5660 | if (!end) | |
5661 | { | |
5662 | as_bad ("Expected separator `='"); | |
5663 | return 0; | |
5664 | } | |
5665 | input_line_pointer = end + 1; | |
5666 | ++i; | |
5667 | ++num_outputs; | |
5668 | } | |
5669 | ||
5670 | for (; i < NELEMS (CURR_SLOT.opnd); ++i) | |
5671 | { | |
5672 | sep = parse_operand (CURR_SLOT.opnd + i); | |
5673 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
5674 | break; | |
5675 | ||
5676 | ++num_operands; | |
5677 | ||
5678 | if (sep != '=' && sep != ',') | |
5679 | break; | |
5680 | ||
5681 | if (sep == '=') | |
5682 | { | |
5683 | if (num_outputs > 0) | |
5684 | as_bad ("Duplicate equal sign (=) in instruction"); | |
5685 | else | |
5686 | num_outputs = i + 1; | |
5687 | } | |
5688 | } | |
5689 | if (sep != '\0') | |
5690 | { | |
5691 | as_bad ("Illegal operand separator `%c'", sep); | |
5692 | return 0; | |
5693 | } | |
197865e8 | 5694 | |
800eeca4 JW |
5695 | if (idesc->operands[2] == IA64_OPND_SOF) |
5696 | { | |
5697 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
5698 | know (strcmp (idesc->name, "alloc") == 0); | |
5699 | if (num_operands == 5 /* first_arg not included in this count! */ | |
5700 | && CURR_SLOT.opnd[2].X_op == O_constant | |
5701 | && CURR_SLOT.opnd[3].X_op == O_constant | |
5702 | && CURR_SLOT.opnd[4].X_op == O_constant | |
5703 | && CURR_SLOT.opnd[5].X_op == O_constant) | |
5704 | { | |
5705 | sof = set_regstack (CURR_SLOT.opnd[2].X_add_number, | |
5706 | CURR_SLOT.opnd[3].X_add_number, | |
5707 | CURR_SLOT.opnd[4].X_add_number, | |
5708 | CURR_SLOT.opnd[5].X_add_number); | |
5709 | ||
542d6675 | 5710 | /* now we can parse the first arg: */ |
800eeca4 JW |
5711 | saved_input_pointer = input_line_pointer; |
5712 | input_line_pointer = first_arg; | |
5713 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
5714 | if (sep != '=') | |
5715 | --num_outputs; /* force error */ | |
5716 | input_line_pointer = saved_input_pointer; | |
5717 | ||
5718 | CURR_SLOT.opnd[2].X_add_number = sof; | |
5719 | CURR_SLOT.opnd[3].X_add_number | |
5720 | = sof - CURR_SLOT.opnd[4].X_add_number; | |
5721 | CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5]; | |
5722 | } | |
5723 | } | |
5724 | ||
5725 | highest_unmatched_operand = 0; | |
87f8eb97 JW |
5726 | curr_out_of_range_pos = -1; |
5727 | error_pos = 0; | |
800eeca4 JW |
5728 | expected_operand = idesc->operands[0]; |
5729 | for (; idesc; idesc = get_next_opcode (idesc)) | |
5730 | { | |
5731 | if (num_outputs != idesc->num_outputs) | |
5732 | continue; /* mismatch in # of outputs */ | |
5733 | ||
5734 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
5735 | |
5736 | /* Try to match all operands. If we see an out-of-range operand, | |
5737 | then continue trying to match the rest of the operands, since if | |
5738 | the rest match, then this idesc will give the best error message. */ | |
5739 | ||
5740 | out_of_range_pos = -1; | |
800eeca4 | 5741 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
5742 | { |
5743 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
5744 | if (result != OPERAND_MATCH) | |
5745 | { | |
5746 | if (result != OPERAND_OUT_OF_RANGE) | |
5747 | break; | |
5748 | if (out_of_range_pos < 0) | |
5749 | /* remember position of the first out-of-range operand: */ | |
5750 | out_of_range_pos = i; | |
5751 | } | |
5752 | } | |
800eeca4 | 5753 | |
87f8eb97 JW |
5754 | /* If we did not match all operands, or if at least one operand was |
5755 | out-of-range, then this idesc does not match. Keep track of which | |
5756 | idesc matched the most operands before failing. If we have two | |
5757 | idescs that failed at the same position, and one had an out-of-range | |
5758 | operand, then prefer the out-of-range operand. Thus if we have | |
5759 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
5760 | of range instead of an error saying that the constant should have been | |
5761 | a register. */ | |
5762 | ||
5763 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 5764 | { |
87f8eb97 JW |
5765 | if (i > highest_unmatched_operand |
5766 | || (i == highest_unmatched_operand | |
5767 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
5768 | { |
5769 | highest_unmatched_operand = i; | |
87f8eb97 JW |
5770 | if (out_of_range_pos >= 0) |
5771 | { | |
5772 | expected_operand = idesc->operands[out_of_range_pos]; | |
5773 | error_pos = out_of_range_pos; | |
5774 | } | |
5775 | else | |
5776 | { | |
5777 | expected_operand = idesc->operands[i]; | |
5778 | error_pos = i; | |
5779 | } | |
5780 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
5781 | } |
5782 | continue; | |
5783 | } | |
5784 | ||
5785 | if (num_operands < NELEMS (idesc->operands) | |
5786 | && idesc->operands[num_operands]) | |
5787 | continue; /* mismatch in number of arguments */ | |
5788 | ||
5789 | break; | |
5790 | } | |
5791 | if (!idesc) | |
5792 | { | |
5793 | if (expected_operand) | |
5794 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 5795 | error_pos + 1, mnemonic, |
800eeca4 JW |
5796 | elf64_ia64_operands[expected_operand].desc); |
5797 | else | |
5798 | as_bad ("Operand mismatch"); | |
5799 | return 0; | |
5800 | } | |
5801 | return idesc; | |
5802 | } | |
5803 | ||
88be23ec BS |
5804 | /* Keep track of state necessary to determine whether a NOP is necessary |
5805 | to avoid an erratum in A and B step Itanium chips, and return 1 if we | |
5806 | detect a case where additional NOPs may be necessary. */ | |
5807 | static int | |
5808 | errata_nop_necessary_p (slot, insn_unit) | |
5809 | struct slot *slot; | |
5810 | enum ia64_unit insn_unit; | |
5811 | { | |
5812 | int i; | |
5813 | struct group *this_group = md.last_groups + md.group_idx; | |
5814 | struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3; | |
5815 | struct ia64_opcode *idesc = slot->idesc; | |
5816 | ||
5817 | /* Test whether this could be the first insn in a problematic sequence. */ | |
5818 | if (insn_unit == IA64_UNIT_F) | |
5819 | { | |
5820 | for (i = 0; i < idesc->num_outputs; i++) | |
5821 | if (idesc->operands[i] == IA64_OPND_P1 | |
5822 | || idesc->operands[i] == IA64_OPND_P2) | |
5823 | { | |
5824 | int regno = slot->opnd[i].X_add_number - REG_P; | |
3557da92 | 5825 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5826 | if (regno >= 64) |
3557da92 | 5827 | return 0; |
88be23ec BS |
5828 | this_group->p_reg_set[regno] = 1; |
5829 | } | |
5830 | } | |
5831 | ||
5832 | /* Test whether this could be the second insn in a problematic sequence. */ | |
5833 | if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0 | |
5834 | && prev_group->p_reg_set[slot->qp_regno]) | |
5835 | { | |
5836 | for (i = 0; i < idesc->num_outputs; i++) | |
5837 | if (idesc->operands[i] == IA64_OPND_R1 | |
5838 | || idesc->operands[i] == IA64_OPND_R2 | |
5839 | || idesc->operands[i] == IA64_OPND_R3) | |
5840 | { | |
5841 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5842 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5843 | if (regno >= 128) |
3557da92 | 5844 | return 0; |
88be23ec BS |
5845 | if (strncmp (idesc->name, "add", 3) != 0 |
5846 | && strncmp (idesc->name, "sub", 3) != 0 | |
5847 | && strncmp (idesc->name, "shladd", 6) != 0 | |
5848 | && (idesc->flags & IA64_OPCODE_POSTINC) == 0) | |
5849 | this_group->g_reg_set_conditionally[regno] = 1; | |
5850 | } | |
5851 | } | |
5852 | ||
5853 | /* Test whether this could be the third insn in a problematic sequence. */ | |
5854 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++) | |
5855 | { | |
5856 | if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */ | |
5857 | idesc->operands[i] == IA64_OPND_R3 | |
5858 | /* For mov indirect. */ | |
5859 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
5860 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
5861 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
5862 | || idesc->operands[i] == IA64_OPND_PKR_R3 | |
5863 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
5864 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
5865 | || idesc->operands[i] == IA64_OPND_MSR_R3 | |
5866 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
5867 | /* For itr. */ | |
5868 | || idesc->operands[i] == IA64_OPND_ITR_R3 | |
5869 | || idesc->operands[i] == IA64_OPND_DTR_R3 | |
5870 | /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */ | |
5871 | || idesc->operands[i] == IA64_OPND_MR3) | |
5872 | { | |
5873 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5874 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5875 | if (regno >= 128) |
3557da92 | 5876 | return 0; |
88be23ec BS |
5877 | if (idesc->operands[i] == IA64_OPND_R3) |
5878 | { | |
5879 | if (strcmp (idesc->name, "fc") != 0 | |
5880 | && strcmp (idesc->name, "tak") != 0 | |
5881 | && strcmp (idesc->name, "thash") != 0 | |
5882 | && strcmp (idesc->name, "tpa") != 0 | |
5883 | && strcmp (idesc->name, "ttag") != 0 | |
5884 | && strncmp (idesc->name, "ptr", 3) != 0 | |
5885 | && strncmp (idesc->name, "ptc", 3) != 0 | |
5886 | && strncmp (idesc->name, "probe", 5) != 0) | |
40449e9f | 5887 | return 0; |
88be23ec | 5888 | } |
bc805888 | 5889 | if (prev_group->g_reg_set_conditionally[regno]) |
88be23ec BS |
5890 | return 1; |
5891 | } | |
5892 | } | |
5893 | return 0; | |
5894 | } | |
5895 | ||
800eeca4 JW |
5896 | static void |
5897 | build_insn (slot, insnp) | |
5898 | struct slot *slot; | |
5899 | bfd_vma *insnp; | |
5900 | { | |
5901 | const struct ia64_operand *odesc, *o2desc; | |
5902 | struct ia64_opcode *idesc = slot->idesc; | |
5903 | bfd_signed_vma insn, val; | |
5904 | const char *err; | |
5905 | int i; | |
5906 | ||
5907 | insn = idesc->opcode | slot->qp_regno; | |
5908 | ||
5909 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
5910 | { | |
c67e42c9 RH |
5911 | if (slot->opnd[i].X_op == O_register |
5912 | || slot->opnd[i].X_op == O_constant | |
5913 | || slot->opnd[i].X_op == O_index) | |
5914 | val = slot->opnd[i].X_add_number; | |
5915 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 5916 | { |
c67e42c9 RH |
5917 | /* This must be the value 0x10000000000000000. */ |
5918 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
5919 | val = 0; | |
5920 | } | |
5921 | else | |
5922 | val = 0; | |
5923 | ||
5924 | switch (idesc->operands[i]) | |
5925 | { | |
5926 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
5927 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
5928 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
5929 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
5930 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
5931 | continue; |
5932 | ||
5933 | case IA64_OPND_IMMU62: | |
542d6675 KH |
5934 | val &= 0x3fffffffffffffffULL; |
5935 | if (val != slot->opnd[i].X_add_number) | |
5936 | as_warn (_("Value truncated to 62 bits")); | |
5937 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
5938 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 5939 | continue; |
800eeca4 | 5940 | |
c67e42c9 RH |
5941 | case IA64_OPND_TGT64: |
5942 | val >>= 4; | |
5943 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
5944 | insn |= ((((val >> 59) & 0x1) << 36) | |
5945 | | (((val >> 0) & 0xfffff) << 13)); | |
5946 | continue; | |
800eeca4 | 5947 | |
c67e42c9 RH |
5948 | case IA64_OPND_AR3: |
5949 | val -= REG_AR; | |
5950 | break; | |
5951 | ||
5952 | case IA64_OPND_B1: | |
5953 | case IA64_OPND_B2: | |
5954 | val -= REG_BR; | |
5955 | break; | |
5956 | ||
5957 | case IA64_OPND_CR3: | |
5958 | val -= REG_CR; | |
5959 | break; | |
5960 | ||
5961 | case IA64_OPND_F1: | |
5962 | case IA64_OPND_F2: | |
5963 | case IA64_OPND_F3: | |
5964 | case IA64_OPND_F4: | |
5965 | val -= REG_FR; | |
5966 | break; | |
5967 | ||
5968 | case IA64_OPND_P1: | |
5969 | case IA64_OPND_P2: | |
5970 | val -= REG_P; | |
5971 | break; | |
5972 | ||
5973 | case IA64_OPND_R1: | |
5974 | case IA64_OPND_R2: | |
5975 | case IA64_OPND_R3: | |
5976 | case IA64_OPND_R3_2: | |
5977 | case IA64_OPND_CPUID_R3: | |
5978 | case IA64_OPND_DBR_R3: | |
5979 | case IA64_OPND_DTR_R3: | |
5980 | case IA64_OPND_ITR_R3: | |
5981 | case IA64_OPND_IBR_R3: | |
5982 | case IA64_OPND_MR3: | |
5983 | case IA64_OPND_MSR_R3: | |
5984 | case IA64_OPND_PKR_R3: | |
5985 | case IA64_OPND_PMC_R3: | |
5986 | case IA64_OPND_PMD_R3: | |
197865e8 | 5987 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
5988 | val -= REG_GR; |
5989 | break; | |
5990 | ||
5991 | default: | |
5992 | break; | |
5993 | } | |
5994 | ||
5995 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
5996 | err = (*odesc->insert) (odesc, val, &insn); | |
5997 | if (err) | |
5998 | as_bad_where (slot->src_file, slot->src_line, | |
5999 | "Bad operand value: %s", err); | |
6000 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6001 | { | |
6002 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6003 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6004 | { | |
6005 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6006 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6007 | } |
c67e42c9 RH |
6008 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6009 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6010 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6011 | { |
c67e42c9 RH |
6012 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6013 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6014 | } |
6015 | } | |
6016 | } | |
6017 | *insnp = insn; | |
6018 | } | |
6019 | ||
6020 | static void | |
6021 | emit_one_bundle () | |
6022 | { | |
6023 | unsigned int manual_bundling_on = 0, manual_bundling_off = 0; | |
6024 | unsigned int manual_bundling = 0; | |
6025 | enum ia64_unit required_unit, insn_unit = 0; | |
6026 | enum ia64_insn_type type[3], insn_type; | |
6027 | unsigned int template, orig_template; | |
542d6675 | 6028 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6029 | struct ia64_opcode *idesc; |
6030 | int end_of_insn_group = 0, user_template = -1; | |
6031 | int n, i, j, first, curr; | |
d6e78c11 | 6032 | unw_rec_list *ptr, *last_ptr, *end_ptr; |
800eeca4 JW |
6033 | bfd_vma t0 = 0, t1 = 0; |
6034 | struct label_fix *lfix; | |
6035 | struct insn_fix *ifix; | |
6036 | char mnemonic[16]; | |
6037 | fixS *fix; | |
6038 | char *f; | |
6039 | ||
6040 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6041 | know (first >= 0 & first < NUM_SLOTS); | |
6042 | n = MIN (3, md.num_slots_in_use); | |
6043 | ||
6044 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6045 | otherwise: */ |
800eeca4 JW |
6046 | |
6047 | if (md.slot[first].user_template >= 0) | |
6048 | user_template = template = md.slot[first].user_template; | |
6049 | else | |
6050 | { | |
032efc85 | 6051 | /* Auto select appropriate template. */ |
800eeca4 JW |
6052 | memset (type, 0, sizeof (type)); |
6053 | curr = first; | |
6054 | for (i = 0; i < n; ++i) | |
6055 | { | |
032efc85 RH |
6056 | if (md.slot[curr].label_fixups && i != 0) |
6057 | break; | |
800eeca4 JW |
6058 | type[i] = md.slot[curr].idesc->type; |
6059 | curr = (curr + 1) % NUM_SLOTS; | |
6060 | } | |
6061 | template = best_template[type[0]][type[1]][type[2]]; | |
6062 | } | |
6063 | ||
542d6675 | 6064 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6065 | for (i = 0; i < 3; ++i) |
6066 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6067 | ||
6068 | f = frag_more (16); | |
6069 | ||
542d6675 | 6070 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6071 | curr = first; |
6072 | idesc = md.slot[curr].idesc; | |
6073 | end_of_insn_group = 0; | |
6074 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) | |
6075 | { | |
d6e78c11 JW |
6076 | /* If we have unwind records, we may need to update some now. */ |
6077 | ptr = md.slot[curr].unwind_record; | |
6078 | if (ptr) | |
6079 | { | |
6080 | /* Find the last prologue/body record in the list for the current | |
6081 | insn, and set the slot number for all records up to that point. | |
6082 | This needs to be done now, because prologue/body records refer to | |
6083 | the current point, not the point after the instruction has been | |
6084 | issued. This matters because there may have been nops emitted | |
6085 | meanwhile. Any non-prologue non-body record followed by a | |
6086 | prologue/body record must also refer to the current point. */ | |
6087 | last_ptr = NULL; | |
6088 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6089 | for (; ptr != end_ptr; ptr = ptr->next) | |
6090 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
6091 | || ptr->r.type == body) | |
6092 | last_ptr = ptr; | |
6093 | if (last_ptr) | |
6094 | { | |
6095 | /* Make last_ptr point one after the last prologue/body | |
6096 | record. */ | |
6097 | last_ptr = last_ptr->next; | |
6098 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6099 | ptr = ptr->next) | |
6100 | { | |
6101 | ptr->slot_number = (unsigned long) f + i; | |
6102 | ptr->slot_frag = frag_now; | |
6103 | } | |
6104 | /* Remove the initialized records, so that we won't accidentally | |
6105 | update them again if we insert a nop and continue. */ | |
6106 | md.slot[curr].unwind_record = last_ptr; | |
6107 | } | |
6108 | } | |
e0c9811a | 6109 | |
800eeca4 JW |
6110 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6111 | { | |
6112 | if (manual_bundling && i != 2) | |
6113 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6114 | "`%s' must be last in bundle", idesc->name); | |
6115 | else | |
6116 | i = 2; | |
6117 | } | |
6118 | if (idesc->flags & IA64_OPCODE_LAST) | |
6119 | { | |
2434f565 JW |
6120 | int required_slot; |
6121 | unsigned int required_template; | |
800eeca4 JW |
6122 | |
6123 | /* If we need a stop bit after an M slot, our only choice is | |
6124 | template 5 (M;;MI). If we need a stop bit after a B | |
6125 | slot, our only choice is to place it at the end of the | |
6126 | bundle, because the only available templates are MIB, | |
6127 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6128 | than M and B slots because these are the only kind of | |
6129 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6130 | required_template = template; | |
6131 | switch (idesc->type) | |
6132 | { | |
6133 | case IA64_TYPE_M: | |
6134 | required_slot = 0; | |
6135 | required_template = 5; | |
6136 | break; | |
6137 | ||
6138 | case IA64_TYPE_B: | |
6139 | required_slot = 2; | |
6140 | break; | |
6141 | ||
6142 | default: | |
6143 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6144 | "Internal error: don't know how to force %s to end" | |
6145 | "of instruction group", idesc->name); | |
6146 | required_slot = i; | |
6147 | break; | |
6148 | } | |
6149 | if (manual_bundling && i != required_slot) | |
6150 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6151 | "`%s' must be last in instruction group", | |
6152 | idesc->name); | |
6153 | if (required_slot < i) | |
6154 | /* Can't fit this instruction. */ | |
6155 | break; | |
6156 | ||
6157 | i = required_slot; | |
6158 | if (required_template != template) | |
6159 | { | |
6160 | /* If we switch the template, we need to reset the NOPs | |
6161 | after slot i. The slot-types of the instructions ahead | |
6162 | of i never change, so we don't need to worry about | |
6163 | changing NOPs in front of this slot. */ | |
6164 | for (j = i; j < 3; ++j) | |
6165 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6166 | } | |
6167 | template = required_template; | |
6168 | } | |
6169 | if (curr != first && md.slot[curr].label_fixups) | |
6170 | { | |
6171 | if (manual_bundling_on) | |
6172 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6173 | "Label must be first in a bundle"); | |
6174 | /* This insn must go into the first slot of a bundle. */ | |
6175 | break; | |
6176 | } | |
6177 | ||
6178 | manual_bundling_on = md.slot[curr].manual_bundling_on; | |
6179 | manual_bundling_off = md.slot[curr].manual_bundling_off; | |
6180 | ||
6181 | if (manual_bundling_on) | |
6182 | { | |
6183 | if (curr == first) | |
6184 | manual_bundling = 1; | |
6185 | else | |
6186 | break; /* need to start a new bundle */ | |
6187 | } | |
6188 | ||
6189 | if (end_of_insn_group && md.num_slots_in_use >= 1) | |
6190 | { | |
6191 | /* We need an instruction group boundary in the middle of a | |
6192 | bundle. See if we can switch to an other template with | |
6193 | an appropriate boundary. */ | |
6194 | ||
6195 | orig_template = template; | |
6196 | if (i == 1 && (user_template == 4 | |
6197 | || (user_template < 0 | |
6198 | && (ia64_templ_desc[template].exec_unit[0] | |
6199 | == IA64_UNIT_M)))) | |
6200 | { | |
6201 | template = 5; | |
6202 | end_of_insn_group = 0; | |
6203 | } | |
6204 | else if (i == 2 && (user_template == 0 | |
6205 | || (user_template < 0 | |
6206 | && (ia64_templ_desc[template].exec_unit[1] | |
6207 | == IA64_UNIT_I))) | |
6208 | /* This test makes sure we don't switch the template if | |
6209 | the next instruction is one that needs to be first in | |
6210 | an instruction group. Since all those instructions are | |
6211 | in the M group, there is no way such an instruction can | |
6212 | fit in this bundle even if we switch the template. The | |
6213 | reason we have to check for this is that otherwise we | |
6214 | may end up generating "MI;;I M.." which has the deadly | |
6215 | effect that the second M instruction is no longer the | |
6216 | first in the bundle! --davidm 99/12/16 */ | |
6217 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) | |
6218 | { | |
6219 | template = 1; | |
6220 | end_of_insn_group = 0; | |
6221 | } | |
6222 | else if (curr != first) | |
6223 | /* can't fit this insn */ | |
6224 | break; | |
6225 | ||
6226 | if (template != orig_template) | |
6227 | /* if we switch the template, we need to reset the NOPs | |
6228 | after slot i. The slot-types of the instructions ahead | |
6229 | of i never change, so we don't need to worry about | |
6230 | changing NOPs in front of this slot. */ | |
6231 | for (j = i; j < 3; ++j) | |
6232 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6233 | } | |
6234 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6235 | ||
c10d9d8f | 6236 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6237 | if (idesc->type == IA64_TYPE_DYN) |
6238 | { | |
6239 | if ((strcmp (idesc->name, "nop") == 0) | |
c10d9d8f | 6240 | || (strcmp (idesc->name, "hint") == 0) |
800eeca4 JW |
6241 | || (strcmp (idesc->name, "break") == 0)) |
6242 | insn_unit = required_unit; | |
6243 | else if (strcmp (idesc->name, "chk.s") == 0) | |
6244 | { | |
6245 | insn_unit = IA64_UNIT_M; | |
6246 | if (required_unit == IA64_UNIT_I) | |
6247 | insn_unit = IA64_UNIT_I; | |
6248 | } | |
6249 | else | |
6250 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6251 | ||
6252 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]); | |
3d56ab85 | 6253 | ia64_free_opcode (idesc); |
800eeca4 JW |
6254 | md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic); |
6255 | #if 0 | |
6256 | know (!idesc->next); /* no resolved dynamic ops have collisions */ | |
6257 | #endif | |
6258 | } | |
6259 | else | |
6260 | { | |
6261 | insn_type = idesc->type; | |
6262 | insn_unit = IA64_UNIT_NIL; | |
6263 | switch (insn_type) | |
6264 | { | |
6265 | case IA64_TYPE_A: | |
6266 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6267 | insn_unit = required_unit; | |
6268 | break; | |
542d6675 | 6269 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6270 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6271 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6272 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6273 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6274 | default: break; | |
6275 | } | |
6276 | } | |
6277 | ||
6278 | if (insn_unit != required_unit) | |
6279 | { | |
6280 | if (required_unit == IA64_UNIT_L | |
542d6675 | 6281 | && insn_unit == IA64_UNIT_I |
800eeca4 JW |
6282 | && !(idesc->flags & IA64_OPCODE_X_IN_MLX)) |
6283 | { | |
6284 | /* we got ourselves an MLX template but the current | |
197865e8 | 6285 | instruction isn't an X-unit, or an I-unit instruction |
800eeca4 JW |
6286 | that can go into the X slot of an MLX template. Duh. */ |
6287 | if (md.num_slots_in_use >= NUM_SLOTS) | |
6288 | { | |
6289 | as_bad_where (md.slot[curr].src_file, | |
6290 | md.slot[curr].src_line, | |
6291 | "`%s' can't go in X slot of " | |
6292 | "MLX template", idesc->name); | |
542d6675 | 6293 | /* drop this insn so we don't livelock: */ |
800eeca4 JW |
6294 | --md.num_slots_in_use; |
6295 | } | |
6296 | break; | |
6297 | } | |
6298 | continue; /* try next slot */ | |
6299 | } | |
6300 | ||
40449e9f KH |
6301 | { |
6302 | bfd_vma addr; | |
800eeca4 | 6303 | |
40449e9f KH |
6304 | addr = frag_now->fr_address + frag_now_fix () - 16 + i; |
6305 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6306 | } | |
800eeca4 | 6307 | |
88be23ec BS |
6308 | if (errata_nop_necessary_p (md.slot + curr, insn_unit)) |
6309 | as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata")); | |
6310 | ||
800eeca4 JW |
6311 | build_insn (md.slot + curr, insn + i); |
6312 | ||
d6e78c11 JW |
6313 | ptr = md.slot[curr].unwind_record; |
6314 | if (ptr) | |
6315 | { | |
6316 | /* Set slot numbers for all remaining unwind records belonging to the | |
6317 | current insn. There can not be any prologue/body unwind records | |
6318 | here. */ | |
6319 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6320 | for (; ptr != end_ptr; ptr = ptr->next) | |
6321 | { | |
6322 | ptr->slot_number = (unsigned long) f + i; | |
6323 | ptr->slot_frag = frag_now; | |
6324 | } | |
6325 | md.slot[curr].unwind_record = NULL; | |
6326 | } | |
10850f29 | 6327 | |
800eeca4 JW |
6328 | if (required_unit == IA64_UNIT_L) |
6329 | { | |
6330 | know (i == 1); | |
6331 | /* skip one slot for long/X-unit instructions */ | |
6332 | ++i; | |
6333 | } | |
6334 | --md.num_slots_in_use; | |
6335 | ||
542d6675 | 6336 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6337 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6338 | { | |
6339 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6340 | symbol_set_frag (lfix->sym, frag_now); | |
6341 | } | |
f1bcba5b JW |
6342 | /* and fix up the tags also. */ |
6343 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6344 | { | |
6345 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6346 | symbol_set_frag (lfix->sym, frag_now); | |
6347 | } | |
800eeca4 JW |
6348 | |
6349 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6350 | { | |
6351 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6352 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6353 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6354 | fix->tc_fix_data.opnd = ifix->opnd; | |
6355 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6356 | fix->fx_file = md.slot[curr].src_file; | |
6357 | fix->fx_line = md.slot[curr].src_line; | |
6358 | } | |
6359 | ||
6360 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6361 | ||
88be23ec BS |
6362 | if (end_of_insn_group) |
6363 | { | |
6364 | md.group_idx = (md.group_idx + 1) % 3; | |
6365 | memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]); | |
6366 | } | |
6367 | ||
542d6675 | 6368 | /* clear slot: */ |
800eeca4 JW |
6369 | ia64_free_opcode (md.slot[curr].idesc); |
6370 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6371 | md.slot[curr].user_template = -1; | |
6372 | ||
6373 | if (manual_bundling_off) | |
6374 | { | |
6375 | manual_bundling = 0; | |
6376 | break; | |
6377 | } | |
6378 | curr = (curr + 1) % NUM_SLOTS; | |
6379 | idesc = md.slot[curr].idesc; | |
6380 | } | |
6381 | if (manual_bundling) | |
6382 | { | |
6383 | if (md.num_slots_in_use > 0) | |
6384 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6385 | "`%s' does not fit into %s template", | |
6386 | idesc->name, ia64_templ_desc[template].name); | |
6387 | else | |
6388 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6389 | "Missing '}' at end of file"); | |
6390 | } | |
6391 | know (md.num_slots_in_use < NUM_SLOTS); | |
6392 | ||
6393 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6394 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6395 | ||
44f5c83a JW |
6396 | number_to_chars_littleendian (f + 0, t0, 8); |
6397 | number_to_chars_littleendian (f + 8, t1, 8); | |
f5a30c2e | 6398 | |
73f20958 L |
6399 | if (unwind.list) |
6400 | { | |
127cab00 L |
6401 | unwind.list->next_slot_number = (unsigned long) f + 16; |
6402 | unwind.list->next_slot_frag = frag_now; | |
73f20958 | 6403 | } |
800eeca4 JW |
6404 | } |
6405 | ||
6406 | int | |
6407 | md_parse_option (c, arg) | |
6408 | int c; | |
6409 | char *arg; | |
6410 | { | |
7463c317 | 6411 | |
800eeca4 JW |
6412 | switch (c) |
6413 | { | |
c43c2cc5 | 6414 | /* Switches from the Intel assembler. */ |
44f5c83a | 6415 | case 'm': |
800eeca4 JW |
6416 | if (strcmp (arg, "ilp64") == 0 |
6417 | || strcmp (arg, "lp64") == 0 | |
6418 | || strcmp (arg, "p64") == 0) | |
6419 | { | |
6420 | md.flags |= EF_IA_64_ABI64; | |
6421 | } | |
6422 | else if (strcmp (arg, "ilp32") == 0) | |
6423 | { | |
6424 | md.flags &= ~EF_IA_64_ABI64; | |
6425 | } | |
6426 | else if (strcmp (arg, "le") == 0) | |
6427 | { | |
6428 | md.flags &= ~EF_IA_64_BE; | |
6429 | } | |
6430 | else if (strcmp (arg, "be") == 0) | |
6431 | { | |
6432 | md.flags |= EF_IA_64_BE; | |
6433 | } | |
6434 | else | |
6435 | return 0; | |
6436 | break; | |
6437 | ||
6438 | case 'N': | |
6439 | if (strcmp (arg, "so") == 0) | |
6440 | { | |
542d6675 | 6441 | /* Suppress signon message. */ |
800eeca4 JW |
6442 | } |
6443 | else if (strcmp (arg, "pi") == 0) | |
6444 | { | |
6445 | /* Reject privileged instructions. FIXME */ | |
6446 | } | |
6447 | else if (strcmp (arg, "us") == 0) | |
6448 | { | |
6449 | /* Allow union of signed and unsigned range. FIXME */ | |
6450 | } | |
6451 | else if (strcmp (arg, "close_fcalls") == 0) | |
6452 | { | |
6453 | /* Do not resolve global function calls. */ | |
6454 | } | |
6455 | else | |
6456 | return 0; | |
6457 | break; | |
6458 | ||
6459 | case 'C': | |
6460 | /* temp[="prefix"] Insert temporary labels into the object file | |
6461 | symbol table prefixed by "prefix". | |
6462 | Default prefix is ":temp:". | |
6463 | */ | |
6464 | break; | |
6465 | ||
6466 | case 'a': | |
800eeca4 JW |
6467 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6468 | according to <tgt> -- | |
6469 | exit: branch out from the current context (default) | |
6470 | labels: all labels in context may be branch targets | |
6471 | */ | |
85b40035 L |
6472 | if (strncmp (arg, "indirect=", 9) != 0) |
6473 | return 0; | |
800eeca4 JW |
6474 | break; |
6475 | ||
6476 | case 'x': | |
6477 | /* -X conflicts with an ignored option, use -x instead */ | |
6478 | md.detect_dv = 1; | |
6479 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6480 | { |
6481 | /* set default mode to explicit */ | |
6482 | md.default_explicit_mode = 1; | |
6483 | break; | |
6484 | } | |
800eeca4 | 6485 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6486 | { |
6487 | md.default_explicit_mode = 0; | |
6488 | } | |
800eeca4 | 6489 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6490 | { |
6491 | md.debug_dv = 1; | |
6492 | } | |
800eeca4 | 6493 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6494 | { |
6495 | md.default_explicit_mode = 1; | |
6496 | md.debug_dv = 1; | |
6497 | } | |
800eeca4 | 6498 | else |
542d6675 KH |
6499 | { |
6500 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6501 | } | |
800eeca4 JW |
6502 | break; |
6503 | ||
6504 | case 'S': | |
6505 | /* nops Print nops statistics. */ | |
6506 | break; | |
6507 | ||
c43c2cc5 JW |
6508 | /* GNU specific switches for gcc. */ |
6509 | case OPTION_MCONSTANT_GP: | |
6510 | md.flags |= EF_IA_64_CONS_GP; | |
6511 | break; | |
6512 | ||
6513 | case OPTION_MAUTO_PIC: | |
6514 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6515 | break; | |
6516 | ||
800eeca4 JW |
6517 | default: |
6518 | return 0; | |
6519 | } | |
6520 | ||
6521 | return 1; | |
6522 | } | |
6523 | ||
6524 | void | |
6525 | md_show_usage (stream) | |
6526 | FILE *stream; | |
6527 | { | |
542d6675 | 6528 | fputs (_("\ |
800eeca4 | 6529 | IA-64 options:\n\ |
6290819d NC |
6530 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6531 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6532 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6533 | without function descriptors (sets ELF header flag\n\ | |
6534 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6535 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6536 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
800eeca4 JW |
6537 | -x | -xexplicit turn on dependency violation checking (default)\n\ |
6538 | -xauto automagically remove dependency violations\n\ | |
6539 | -xdebug debug dependency violation checker\n"), | |
6540 | stream); | |
6541 | } | |
6542 | ||
acebd4ce AS |
6543 | void |
6544 | ia64_after_parse_args () | |
6545 | { | |
6546 | if (debug_type == DEBUG_STABS) | |
6547 | as_fatal (_("--gstabs is not supported for ia64")); | |
6548 | } | |
6549 | ||
44576e1f RH |
6550 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
6551 | ||
6552 | static int | |
800eeca4 JW |
6553 | match (int templ, int type, int slot) |
6554 | { | |
6555 | enum ia64_unit unit; | |
6556 | int result; | |
6557 | ||
6558 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
6559 | switch (type) | |
6560 | { | |
6561 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
6562 | case IA64_TYPE_A: | |
6563 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
6564 | break; | |
6565 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
6566 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
6567 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
6568 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
6569 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
6570 | default: result = 0; break; | |
6571 | } | |
6572 | return result; | |
6573 | } | |
6574 | ||
44576e1f RH |
6575 | /* Add a bit of extra goodness if a nop of type F or B would fit |
6576 | in TEMPL at SLOT. */ | |
6577 | ||
6578 | static inline int | |
6579 | extra_goodness (int templ, int slot) | |
6580 | { | |
ebeeafe6 | 6581 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) |
44576e1f | 6582 | return 2; |
ebeeafe6 | 6583 | if (slot == 2 && match (templ, IA64_TYPE_B, slot)) |
44576e1f RH |
6584 | return 1; |
6585 | return 0; | |
6586 | } | |
6587 | ||
800eeca4 JW |
6588 | /* This function is called once, at assembler startup time. It sets |
6589 | up all the tables, etc. that the MD part of the assembler will need | |
6590 | that can be determined before arguments are parsed. */ | |
6591 | void | |
6592 | md_begin () | |
6593 | { | |
44f5c83a | 6594 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
6595 | const char *err; |
6596 | char name[8]; | |
6597 | ||
6598 | md.auto_align = 1; | |
6599 | md.explicit_mode = md.default_explicit_mode; | |
6600 | ||
6601 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
6602 | ||
0234cb7c | 6603 | /* Make sure function pointers get initialized. */ |
10a98291 L |
6604 | target_big_endian = -1; |
6605 | dot_byteorder (TARGET_BYTES_BIG_ENDIAN); | |
6606 | ||
35f5df7f L |
6607 | alias_hash = hash_new (); |
6608 | alias_name_hash = hash_new (); | |
6609 | secalias_hash = hash_new (); | |
6610 | secalias_name_hash = hash_new (); | |
6611 | ||
13ae64f3 JJ |
6612 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
6613 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
6614 | &zero_address_frag); | |
6615 | ||
6616 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
6617 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
6618 | &zero_address_frag); | |
6619 | ||
800eeca4 | 6620 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
6621 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
6622 | &zero_address_frag); | |
800eeca4 JW |
6623 | |
6624 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
6625 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
6626 | &zero_address_frag); | |
800eeca4 JW |
6627 | |
6628 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
6629 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
6630 | &zero_address_frag); | |
800eeca4 | 6631 | |
fa2c7eff RH |
6632 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
6633 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
6634 | &zero_address_frag); | |
6635 | ||
c67e42c9 | 6636 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
6637 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
6638 | &zero_address_frag); | |
c67e42c9 | 6639 | |
800eeca4 | 6640 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
6641 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
6642 | &zero_address_frag); | |
800eeca4 JW |
6643 | |
6644 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
6645 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
6646 | &zero_address_frag); | |
800eeca4 JW |
6647 | |
6648 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
6649 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
6650 | &zero_address_frag); | |
800eeca4 | 6651 | |
13ae64f3 JJ |
6652 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
6653 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
6654 | &zero_address_frag); | |
6655 | ||
800eeca4 | 6656 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
6657 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
6658 | &zero_address_frag); | |
800eeca4 JW |
6659 | |
6660 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
6661 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
6662 | &zero_address_frag); | |
800eeca4 | 6663 | |
13ae64f3 JJ |
6664 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
6665 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
6666 | &zero_address_frag); | |
6667 | ||
6668 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
6669 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
6670 | &zero_address_frag); | |
6671 | ||
6672 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
6673 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
6674 | &zero_address_frag); | |
6675 | ||
3969b680 RH |
6676 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
6677 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
6678 | &zero_address_frag); | |
6679 | ||
197865e8 | 6680 | /* Compute the table of best templates. We compute goodness as a |
44576e1f RH |
6681 | base 4 value, in which each match counts for 3, each F counts |
6682 | for 2, each B counts for 1. This should maximize the number of | |
6683 | F and B nops in the chosen bundles, which is good because these | |
6684 | pipelines are least likely to be overcommitted. */ | |
800eeca4 JW |
6685 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
6686 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
6687 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
6688 | { | |
6689 | best = 0; | |
6690 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
6691 | { | |
6692 | goodness = 0; | |
6693 | if (match (t, i, 0)) | |
6694 | { | |
6695 | if (match (t, j, 1)) | |
6696 | { | |
6697 | if (match (t, k, 2)) | |
44576e1f | 6698 | goodness = 3 + 3 + 3; |
800eeca4 | 6699 | else |
44576e1f | 6700 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
6701 | } |
6702 | else if (match (t, j, 2)) | |
44576e1f | 6703 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 6704 | else |
44576e1f RH |
6705 | { |
6706 | goodness = 3; | |
6707 | goodness += extra_goodness (t, 1); | |
6708 | goodness += extra_goodness (t, 2); | |
6709 | } | |
800eeca4 JW |
6710 | } |
6711 | else if (match (t, i, 1)) | |
6712 | { | |
6713 | if (match (t, j, 2)) | |
44576e1f | 6714 | goodness = 3 + 3; |
800eeca4 | 6715 | else |
44576e1f | 6716 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
6717 | } |
6718 | else if (match (t, i, 2)) | |
44576e1f | 6719 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
6720 | |
6721 | if (goodness > best) | |
6722 | { | |
6723 | best = goodness; | |
6724 | best_template[i][j][k] = t; | |
6725 | } | |
6726 | } | |
6727 | } | |
6728 | ||
6729 | for (i = 0; i < NUM_SLOTS; ++i) | |
6730 | md.slot[i].user_template = -1; | |
6731 | ||
6732 | md.pseudo_hash = hash_new (); | |
6733 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
6734 | { | |
6735 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
6736 | (void *) (pseudo_opcode + i)); | |
6737 | if (err) | |
6738 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
6739 | pseudo_opcode[i].name, err); | |
6740 | } | |
6741 | ||
6742 | md.reg_hash = hash_new (); | |
6743 | md.dynreg_hash = hash_new (); | |
6744 | md.const_hash = hash_new (); | |
6745 | md.entry_hash = hash_new (); | |
6746 | ||
542d6675 | 6747 | /* general registers: */ |
800eeca4 JW |
6748 | |
6749 | total = 128; | |
6750 | for (i = 0; i < total; ++i) | |
6751 | { | |
6752 | sprintf (name, "r%d", i - REG_GR); | |
6753 | md.regsym[i] = declare_register (name, i); | |
6754 | } | |
6755 | ||
542d6675 | 6756 | /* floating point registers: */ |
800eeca4 JW |
6757 | total += 128; |
6758 | for (; i < total; ++i) | |
6759 | { | |
6760 | sprintf (name, "f%d", i - REG_FR); | |
6761 | md.regsym[i] = declare_register (name, i); | |
6762 | } | |
6763 | ||
542d6675 | 6764 | /* application registers: */ |
800eeca4 JW |
6765 | total += 128; |
6766 | ar_base = i; | |
6767 | for (; i < total; ++i) | |
6768 | { | |
6769 | sprintf (name, "ar%d", i - REG_AR); | |
6770 | md.regsym[i] = declare_register (name, i); | |
6771 | } | |
6772 | ||
542d6675 | 6773 | /* control registers: */ |
800eeca4 JW |
6774 | total += 128; |
6775 | cr_base = i; | |
6776 | for (; i < total; ++i) | |
6777 | { | |
6778 | sprintf (name, "cr%d", i - REG_CR); | |
6779 | md.regsym[i] = declare_register (name, i); | |
6780 | } | |
6781 | ||
542d6675 | 6782 | /* predicate registers: */ |
800eeca4 JW |
6783 | total += 64; |
6784 | for (; i < total; ++i) | |
6785 | { | |
6786 | sprintf (name, "p%d", i - REG_P); | |
6787 | md.regsym[i] = declare_register (name, i); | |
6788 | } | |
6789 | ||
542d6675 | 6790 | /* branch registers: */ |
800eeca4 JW |
6791 | total += 8; |
6792 | for (; i < total; ++i) | |
6793 | { | |
6794 | sprintf (name, "b%d", i - REG_BR); | |
6795 | md.regsym[i] = declare_register (name, i); | |
6796 | } | |
6797 | ||
6798 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
6799 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
6800 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
6801 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
6802 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
6803 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
6804 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
6805 | ||
6806 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
6807 | { | |
6808 | regnum = indirect_reg[i].regnum; | |
6809 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
6810 | } | |
6811 | ||
542d6675 | 6812 | /* define synonyms for application registers: */ |
800eeca4 JW |
6813 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
6814 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
6815 | REG_AR + ar[i - REG_AR].regnum); | |
6816 | ||
542d6675 | 6817 | /* define synonyms for control registers: */ |
800eeca4 JW |
6818 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
6819 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
6820 | REG_CR + cr[i - REG_CR].regnum); | |
6821 | ||
6822 | declare_register ("gp", REG_GR + 1); | |
6823 | declare_register ("sp", REG_GR + 12); | |
6824 | declare_register ("rp", REG_BR + 0); | |
6825 | ||
542d6675 | 6826 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
6827 | declare_register ("psp", REG_PSP); |
6828 | ||
800eeca4 JW |
6829 | declare_register_set ("ret", 4, REG_GR + 8); |
6830 | declare_register_set ("farg", 8, REG_FR + 8); | |
6831 | declare_register_set ("fret", 8, REG_FR + 8); | |
6832 | ||
6833 | for (i = 0; i < NELEMS (const_bits); ++i) | |
6834 | { | |
6835 | err = hash_insert (md.const_hash, const_bits[i].name, | |
6836 | (PTR) (const_bits + i)); | |
6837 | if (err) | |
6838 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
6839 | name, err); | |
6840 | } | |
6841 | ||
44f5c83a JW |
6842 | /* Set the architecture and machine depending on defaults and command line |
6843 | options. */ | |
6844 | if (md.flags & EF_IA_64_ABI64) | |
6845 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
6846 | else | |
6847 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
6848 | ||
6849 | if (! ok) | |
6850 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 6851 | |
557debba JW |
6852 | /* Set the pointer size and pointer shift size depending on md.flags */ |
6853 | ||
6854 | if (md.flags & EF_IA_64_ABI64) | |
6855 | { | |
6856 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
6857 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
6858 | } | |
6859 | else | |
6860 | { | |
6861 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
6862 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
6863 | } | |
6864 | ||
800eeca4 JW |
6865 | md.mem_offset.hint = 0; |
6866 | md.path = 0; | |
6867 | md.maxpaths = 0; | |
6868 | md.entry_labels = NULL; | |
6869 | } | |
6870 | ||
44f5c83a JW |
6871 | /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin |
6872 | because that is called after md_parse_option which is where we do the | |
6873 | dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the | |
6874 | default endianness. */ | |
6875 | ||
6876 | void | |
6877 | ia64_init (argc, argv) | |
2434f565 JW |
6878 | int argc ATTRIBUTE_UNUSED; |
6879 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 6880 | { |
1cd8ff38 | 6881 | md.flags = MD_FLAGS_DEFAULT; |
44f5c83a JW |
6882 | } |
6883 | ||
6884 | /* Return a string for the target object file format. */ | |
6885 | ||
6886 | const char * | |
6887 | ia64_target_format () | |
6888 | { | |
6889 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
6890 | { | |
72a76794 JW |
6891 | if (md.flags & EF_IA_64_BE) |
6892 | { | |
6893 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 6894 | #if defined(TE_AIX50) |
7463c317 | 6895 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
6896 | #elif defined(TE_HPUX) |
6897 | return "elf64-ia64-hpux-big"; | |
7463c317 | 6898 | #else |
72a76794 | 6899 | return "elf64-ia64-big"; |
7463c317 | 6900 | #endif |
72a76794 | 6901 | else |
1cd8ff38 | 6902 | #if defined(TE_AIX50) |
7463c317 | 6903 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
6904 | #elif defined(TE_HPUX) |
6905 | return "elf32-ia64-hpux-big"; | |
7463c317 | 6906 | #else |
72a76794 | 6907 | return "elf32-ia64-big"; |
7463c317 | 6908 | #endif |
72a76794 | 6909 | } |
44f5c83a | 6910 | else |
72a76794 JW |
6911 | { |
6912 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
6913 | #ifdef TE_AIX50 |
6914 | return "elf64-ia64-aix-little"; | |
6915 | #else | |
72a76794 | 6916 | return "elf64-ia64-little"; |
7463c317 | 6917 | #endif |
72a76794 | 6918 | else |
7463c317 TW |
6919 | #ifdef TE_AIX50 |
6920 | return "elf32-ia64-aix-little"; | |
6921 | #else | |
72a76794 | 6922 | return "elf32-ia64-little"; |
7463c317 | 6923 | #endif |
72a76794 | 6924 | } |
44f5c83a JW |
6925 | } |
6926 | else | |
6927 | return "unknown-format"; | |
6928 | } | |
6929 | ||
800eeca4 JW |
6930 | void |
6931 | ia64_end_of_source () | |
6932 | { | |
542d6675 | 6933 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
6934 | insn_group_break (1, 0, 0); |
6935 | ||
542d6675 | 6936 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
6937 | ia64_flush_insns (); |
6938 | ||
6939 | bfd_set_private_flags (stdoutput, md.flags); | |
6940 | ||
800eeca4 JW |
6941 | md.mem_offset.hint = 0; |
6942 | } | |
6943 | ||
6944 | void | |
6945 | ia64_start_line () | |
6946 | { | |
f1bcba5b JW |
6947 | if (md.qp.X_op == O_register) |
6948 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
6949 | md.qp.X_op = O_absent; |
6950 | ||
6951 | if (ignore_input ()) | |
6952 | return; | |
6953 | ||
6954 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
6955 | { | |
6956 | if (md.detect_dv && !md.explicit_mode) | |
542d6675 | 6957 | as_warn (_("Explicit stops are ignored in auto mode")); |
800eeca4 | 6958 | else |
542d6675 | 6959 | insn_group_break (1, 0, 0); |
800eeca4 JW |
6960 | } |
6961 | } | |
6962 | ||
f1bcba5b JW |
6963 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
6964 | labels. */ | |
6965 | static int defining_tag = 0; | |
6966 | ||
800eeca4 JW |
6967 | int |
6968 | ia64_unrecognized_line (ch) | |
6969 | int ch; | |
6970 | { | |
6971 | switch (ch) | |
6972 | { | |
6973 | case '(': | |
6974 | expression (&md.qp); | |
6975 | if (*input_line_pointer++ != ')') | |
6976 | { | |
6977 | as_bad ("Expected ')'"); | |
6978 | return 0; | |
6979 | } | |
6980 | if (md.qp.X_op != O_register) | |
6981 | { | |
6982 | as_bad ("Qualifying predicate expected"); | |
6983 | return 0; | |
6984 | } | |
6985 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
6986 | { | |
6987 | as_bad ("Predicate register expected"); | |
6988 | return 0; | |
6989 | } | |
6990 | return 1; | |
6991 | ||
6992 | case '{': | |
6993 | if (md.manual_bundling) | |
6994 | as_warn ("Found '{' when manual bundling is already turned on"); | |
6995 | else | |
6996 | CURR_SLOT.manual_bundling_on = 1; | |
6997 | md.manual_bundling = 1; | |
6998 | ||
542d6675 KH |
6999 | /* Bundling is only acceptable in explicit mode |
7000 | or when in default automatic mode. */ | |
800eeca4 | 7001 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7002 | { |
7003 | if (!md.mode_explicitly_set | |
7004 | && !md.default_explicit_mode) | |
7005 | dot_dv_mode ('E'); | |
7006 | else | |
7007 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7008 | } | |
800eeca4 JW |
7009 | return 1; |
7010 | ||
7011 | case '}': | |
7012 | if (!md.manual_bundling) | |
7013 | as_warn ("Found '}' when manual bundling is off"); | |
7014 | else | |
7015 | PREV_SLOT.manual_bundling_off = 1; | |
7016 | md.manual_bundling = 0; | |
7017 | ||
7018 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7019 | if (md.detect_dv |
542d6675 KH |
7020 | && md.explicit_mode |
7021 | && !md.mode_explicitly_set | |
7022 | && !md.default_explicit_mode) | |
7023 | dot_dv_mode ('A'); | |
800eeca4 JW |
7024 | |
7025 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7026 | happens automatically because ';' is an end of line marker. */ | |
7027 | SKIP_WHITESPACE (); | |
7028 | if (input_line_pointer[0] == '{') | |
7029 | { | |
7030 | input_line_pointer++; | |
7031 | return ia64_unrecognized_line ('{'); | |
7032 | } | |
7033 | ||
7034 | demand_empty_rest_of_line (); | |
7035 | return 1; | |
7036 | ||
f1bcba5b JW |
7037 | case '[': |
7038 | { | |
7039 | char *s; | |
7040 | char c; | |
7041 | symbolS *tag; | |
4d5a53ff | 7042 | int temp; |
f1bcba5b JW |
7043 | |
7044 | if (md.qp.X_op == O_register) | |
7045 | { | |
7046 | as_bad ("Tag must come before qualifying predicate."); | |
7047 | return 0; | |
7048 | } | |
4d5a53ff JW |
7049 | |
7050 | /* This implements just enough of read_a_source_file in read.c to | |
7051 | recognize labels. */ | |
7052 | if (is_name_beginner (*input_line_pointer)) | |
7053 | { | |
7054 | s = input_line_pointer; | |
7055 | c = get_symbol_end (); | |
7056 | } | |
7057 | else if (LOCAL_LABELS_FB | |
3882b010 | 7058 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7059 | { |
7060 | temp = 0; | |
3882b010 | 7061 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7062 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7063 | fb_label_instance_inc (temp); | |
7064 | s = fb_label_name (temp, 0); | |
7065 | c = *input_line_pointer; | |
7066 | } | |
7067 | else | |
7068 | { | |
7069 | s = NULL; | |
7070 | c = '\0'; | |
7071 | } | |
f1bcba5b JW |
7072 | if (c != ':') |
7073 | { | |
7074 | /* Put ':' back for error messages' sake. */ | |
7075 | *input_line_pointer++ = ':'; | |
7076 | as_bad ("Expected ':'"); | |
7077 | return 0; | |
7078 | } | |
4d5a53ff | 7079 | |
f1bcba5b JW |
7080 | defining_tag = 1; |
7081 | tag = colon (s); | |
7082 | defining_tag = 0; | |
7083 | /* Put ':' back for error messages' sake. */ | |
7084 | *input_line_pointer++ = ':'; | |
7085 | if (*input_line_pointer++ != ']') | |
7086 | { | |
7087 | as_bad ("Expected ']'"); | |
7088 | return 0; | |
7089 | } | |
7090 | if (! tag) | |
7091 | { | |
7092 | as_bad ("Tag name expected"); | |
7093 | return 0; | |
7094 | } | |
7095 | return 1; | |
7096 | } | |
7097 | ||
800eeca4 JW |
7098 | default: |
7099 | break; | |
7100 | } | |
542d6675 KH |
7101 | |
7102 | /* Not a valid line. */ | |
7103 | return 0; | |
800eeca4 JW |
7104 | } |
7105 | ||
7106 | void | |
7107 | ia64_frob_label (sym) | |
7108 | struct symbol *sym; | |
7109 | { | |
7110 | struct label_fix *fix; | |
7111 | ||
f1bcba5b JW |
7112 | /* Tags need special handling since they are not bundle breaks like |
7113 | labels. */ | |
7114 | if (defining_tag) | |
7115 | { | |
7116 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7117 | fix->sym = sym; | |
7118 | fix->next = CURR_SLOT.tag_fixups; | |
7119 | CURR_SLOT.tag_fixups = fix; | |
7120 | ||
7121 | return; | |
7122 | } | |
7123 | ||
800eeca4 JW |
7124 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7125 | { | |
7126 | md.last_text_seg = now_seg; | |
7127 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7128 | fix->sym = sym; | |
7129 | fix->next = CURR_SLOT.label_fixups; | |
7130 | CURR_SLOT.label_fixups = fix; | |
7131 | ||
542d6675 | 7132 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7133 | if (md.path == md.maxpaths) |
542d6675 KH |
7134 | { |
7135 | md.maxpaths += 20; | |
7136 | md.entry_labels = (const char **) | |
7137 | xrealloc ((void *) md.entry_labels, | |
7138 | md.maxpaths * sizeof (char *)); | |
7139 | } | |
800eeca4 JW |
7140 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7141 | } | |
7142 | } | |
7143 | ||
936cf02e JW |
7144 | #ifdef TE_HPUX |
7145 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7146 | that are declared but unused. This routine removes declared, | |
7147 | unused symbols from an object. */ | |
7148 | int | |
7149 | ia64_frob_symbol (sym) | |
7150 | struct symbol *sym; | |
7151 | { | |
7152 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7153 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7154 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7155 | && ! S_IS_EXTERNAL (sym))) | |
7156 | return 1; | |
7157 | return 0; | |
7158 | } | |
7159 | #endif | |
7160 | ||
800eeca4 JW |
7161 | void |
7162 | ia64_flush_pending_output () | |
7163 | { | |
4d5a53ff JW |
7164 | if (!md.keep_pending_output |
7165 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7166 | { |
7167 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7168 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7169 | insn_group_break (1, 0, 0); | |
7170 | ia64_flush_insns (); | |
7171 | } | |
7172 | } | |
7173 | ||
7174 | /* Do ia64-specific expression optimization. All that's done here is | |
7175 | to transform index expressions that are either due to the indexing | |
7176 | of rotating registers or due to the indexing of indirect register | |
7177 | sets. */ | |
7178 | int | |
7179 | ia64_optimize_expr (l, op, r) | |
7180 | expressionS *l; | |
7181 | operatorT op; | |
7182 | expressionS *r; | |
7183 | { | |
7184 | unsigned num_regs; | |
7185 | ||
7186 | if (op == O_index) | |
7187 | { | |
7188 | if (l->X_op == O_register && r->X_op == O_constant) | |
7189 | { | |
7190 | num_regs = (l->X_add_number >> 16); | |
7191 | if ((unsigned) r->X_add_number >= num_regs) | |
7192 | { | |
7193 | if (!num_regs) | |
7194 | as_bad ("No current frame"); | |
7195 | else | |
7196 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7197 | r->X_add_number = 0; | |
7198 | } | |
7199 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7200 | return 1; | |
7201 | } | |
7202 | else if (l->X_op == O_register && r->X_op == O_register) | |
7203 | { | |
7204 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7205 | || l->X_add_number == IND_MEM) | |
7206 | { | |
7207 | as_bad ("Indirect register set name expected"); | |
7208 | l->X_add_number = IND_CPUID; | |
7209 | } | |
7210 | l->X_op = O_index; | |
7211 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7212 | l->X_add_number = r->X_add_number; | |
7213 | return 1; | |
7214 | } | |
7215 | } | |
7216 | return 0; | |
7217 | } | |
7218 | ||
7219 | int | |
7220 | ia64_parse_name (name, e) | |
7221 | char *name; | |
7222 | expressionS *e; | |
7223 | { | |
7224 | struct const_desc *cdesc; | |
7225 | struct dynreg *dr = 0; | |
7226 | unsigned int regnum; | |
7227 | struct symbol *sym; | |
7228 | char *end; | |
7229 | ||
542d6675 | 7230 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7231 | sym = hash_find (md.reg_hash, name); |
7232 | if (sym) | |
7233 | { | |
7234 | e->X_op = O_register; | |
7235 | e->X_add_number = S_GET_VALUE (sym); | |
7236 | return 1; | |
7237 | } | |
7238 | ||
7239 | cdesc = hash_find (md.const_hash, name); | |
7240 | if (cdesc) | |
7241 | { | |
7242 | e->X_op = O_constant; | |
7243 | e->X_add_number = cdesc->value; | |
7244 | return 1; | |
7245 | } | |
7246 | ||
542d6675 | 7247 | /* check for inN, locN, or outN: */ |
800eeca4 JW |
7248 | switch (name[0]) |
7249 | { | |
7250 | case 'i': | |
3882b010 | 7251 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7252 | { |
7253 | dr = &md.in; | |
7254 | name += 2; | |
7255 | } | |
7256 | break; | |
7257 | ||
7258 | case 'l': | |
3882b010 | 7259 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7260 | { |
7261 | dr = &md.loc; | |
7262 | name += 3; | |
7263 | } | |
7264 | break; | |
7265 | ||
7266 | case 'o': | |
3882b010 | 7267 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7268 | { |
7269 | dr = &md.out; | |
7270 | name += 3; | |
7271 | } | |
7272 | break; | |
7273 | ||
7274 | default: | |
7275 | break; | |
7276 | } | |
7277 | ||
7278 | if (dr) | |
7279 | { | |
542d6675 | 7280 | /* The name is inN, locN, or outN; parse the register number. */ |
800eeca4 JW |
7281 | regnum = strtoul (name, &end, 10); |
7282 | if (end > name && *end == '\0') | |
7283 | { | |
7284 | if ((unsigned) regnum >= dr->num_regs) | |
7285 | { | |
7286 | if (!dr->num_regs) | |
7287 | as_bad ("No current frame"); | |
7288 | else | |
542d6675 KH |
7289 | as_bad ("Register number out of range 0..%u", |
7290 | dr->num_regs - 1); | |
800eeca4 JW |
7291 | regnum = 0; |
7292 | } | |
7293 | e->X_op = O_register; | |
7294 | e->X_add_number = dr->base + regnum; | |
7295 | return 1; | |
7296 | } | |
7297 | } | |
7298 | ||
7299 | if ((dr = hash_find (md.dynreg_hash, name))) | |
7300 | { | |
7301 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7302 | Store the base register number in the low 16 bits of |
7303 | X_add_number and the size of the register set in the top 16 | |
7304 | bits. */ | |
800eeca4 JW |
7305 | e->X_op = O_register; |
7306 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7307 | return 1; | |
7308 | } | |
7309 | return 0; | |
7310 | } | |
7311 | ||
7312 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7313 | ||
7314 | char * | |
7315 | ia64_canonicalize_symbol_name (name) | |
7316 | char *name; | |
7317 | { | |
542d6675 KH |
7318 | size_t len = strlen (name); |
7319 | if (len > 1 && name[len - 1] == '#') | |
7320 | name[len - 1] = '\0'; | |
800eeca4 JW |
7321 | return name; |
7322 | } | |
7323 | ||
3e37788f JW |
7324 | /* Return true if idesc is a conditional branch instruction. This excludes |
7325 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7326 | because they always read/write resources regardless of the value of the | |
7327 | qualifying predicate. br.ia must always use p0, and hence is always | |
7328 | taken. Thus this function returns true for branches which can fall | |
7329 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7330 | |
800eeca4 JW |
7331 | static int |
7332 | is_conditional_branch (idesc) | |
542d6675 | 7333 | struct ia64_opcode *idesc; |
800eeca4 | 7334 | { |
1deb8127 | 7335 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7336 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7337 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7338 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7339 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7340 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7341 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7342 | || idesc->name[2] == 'l' | |
7343 | /* br.cond, br.call, br.clr */ | |
7344 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7345 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7346 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7347 | } |
7348 | ||
7349 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7350 | returns zero. */ |
7351 | ||
800eeca4 JW |
7352 | static int |
7353 | is_taken_branch (idesc) | |
542d6675 | 7354 | struct ia64_opcode *idesc; |
800eeca4 JW |
7355 | { |
7356 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7357 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7358 | } |
7359 | ||
7360 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7361 | doubt, returns zero. */ |
7362 | ||
800eeca4 JW |
7363 | static int |
7364 | is_interruption_or_rfi (idesc) | |
542d6675 | 7365 | struct ia64_opcode *idesc; |
800eeca4 JW |
7366 | { |
7367 | if (strcmp (idesc->name, "rfi") == 0) | |
7368 | return 1; | |
7369 | return 0; | |
7370 | } | |
7371 | ||
7372 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7373 | -1 if there is no dependency. */ | |
542d6675 | 7374 | |
800eeca4 JW |
7375 | static int |
7376 | depends_on (depind, idesc) | |
542d6675 KH |
7377 | int depind; |
7378 | struct ia64_opcode *idesc; | |
800eeca4 JW |
7379 | { |
7380 | int i; | |
7381 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7382 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7383 | { |
542d6675 KH |
7384 | if (depind == DEP (dep->chks[i])) |
7385 | return i; | |
800eeca4 JW |
7386 | } |
7387 | return -1; | |
7388 | } | |
7389 | ||
7390 | /* Determine a set of specific resources used for a particular resource | |
7391 | class. Returns the number of specific resources identified For those | |
7392 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7393 | marked nonspecific. |
800eeca4 JW |
7394 | |
7395 | Meanings of value in 'NOTE': | |
7396 | 1) only read/write when the register number is explicitly encoded in the | |
7397 | insn. | |
7398 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 7399 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
7400 | 3) general register value is used to specify an indirect register; not |
7401 | determinable statically. | |
7402 | 4) only read the given resource when bits 7:0 of the indirect index | |
7403 | register value does not match the register number of the resource; not | |
7404 | determinable statically. | |
7405 | 5) all rules are implementation specific. | |
7406 | 6) only when both the index specified by the reader and the index specified | |
7407 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 7408 | statically. |
800eeca4 | 7409 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 7410 | set |
800eeca4 JW |
7411 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
7412 | only read when these insns reference FR2-31 | |
7413 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
7414 | written when these insns write FR32-127 | |
7415 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
7416 | instruction | |
7417 | 11) The target predicates are written independently of PR[qp], but source | |
7418 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
7419 | cannot statically be determined, all source registers are marked used. | |
7420 | 12) This insn only reads the specified predicate register when that | |
7421 | register is the PR[qp]. | |
7422 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 7423 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
7424 | 14) The RSE resource includes the implementation-specific RSE internal |
7425 | state resources. At least one (and possibly more) of these resources are | |
7426 | read by each instruction listed in IC:rse-readers. At least one (and | |
7427 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 7428 | IC:rse-writers. |
800eeca4 | 7429 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 7430 | generate. |
800eeca4 JW |
7431 | |
7432 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
7433 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
7434 | */ |
7435 | ||
7436 | #define MAX_SPECS 256 | |
7437 | #define DV_CHK 1 | |
7438 | #define DV_REG 0 | |
7439 | ||
7440 | static int | |
7441 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
7442 | const struct ia64_dependency *dep; |
7443 | struct ia64_opcode *idesc; | |
7444 | int type; /* is this a DV chk or a DV reg? */ | |
7445 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
7446 | int note; /* resource note for this insn's usage */ | |
7447 | int path; /* which execution path to examine */ | |
800eeca4 JW |
7448 | { |
7449 | int count = 0; | |
7450 | int i; | |
7451 | int rsrc_write = 0; | |
7452 | struct rsrc tmpl; | |
197865e8 | 7453 | |
800eeca4 JW |
7454 | if (dep->mode == IA64_DV_WAW |
7455 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
7456 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
7457 | rsrc_write = 1; | |
7458 | ||
7459 | /* template for any resources we identify */ | |
7460 | tmpl.dependency = dep; | |
7461 | tmpl.note = note; | |
7462 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
7463 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
7464 | tmpl.link_to_qp_branch = 1; | |
7465 | tmpl.mem_offset.hint = 0; | |
7466 | tmpl.specific = 1; | |
7467 | tmpl.index = 0; | |
7484b8e6 | 7468 | tmpl.cmp_type = CMP_NONE; |
800eeca4 JW |
7469 | |
7470 | #define UNHANDLED \ | |
7471 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
7472 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
7473 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
7474 | ||
7475 | /* we don't need to track these */ | |
7476 | if (dep->semantics == IA64_DVS_NONE) | |
7477 | return 0; | |
7478 | ||
7479 | switch (dep->specifier) | |
7480 | { | |
7481 | case IA64_RS_AR_K: | |
7482 | if (note == 1) | |
542d6675 KH |
7483 | { |
7484 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7485 | { | |
7486 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7487 | if (regno >= 0 && regno <= 7) | |
7488 | { | |
7489 | specs[count] = tmpl; | |
7490 | specs[count++].index = regno; | |
7491 | } | |
7492 | } | |
7493 | } | |
800eeca4 | 7494 | else if (note == 0) |
542d6675 KH |
7495 | { |
7496 | for (i = 0; i < 8; i++) | |
7497 | { | |
7498 | specs[count] = tmpl; | |
7499 | specs[count++].index = i; | |
7500 | } | |
7501 | } | |
800eeca4 | 7502 | else |
542d6675 KH |
7503 | { |
7504 | UNHANDLED; | |
7505 | } | |
800eeca4 JW |
7506 | break; |
7507 | ||
7508 | case IA64_RS_AR_UNAT: | |
7509 | /* This is a mov =AR or mov AR= instruction. */ | |
7510 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7511 | { | |
7512 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7513 | if (regno == AR_UNAT) | |
7514 | { | |
7515 | specs[count++] = tmpl; | |
7516 | } | |
7517 | } | |
7518 | else | |
7519 | { | |
7520 | /* This is a spill/fill, or other instruction that modifies the | |
7521 | unat register. */ | |
7522 | ||
7523 | /* Unless we can determine the specific bits used, mark the whole | |
7524 | thing; bits 8:3 of the memory address indicate the bit used in | |
7525 | UNAT. The .mem.offset hint may be used to eliminate a small | |
7526 | subset of conflicts. */ | |
7527 | specs[count] = tmpl; | |
7528 | if (md.mem_offset.hint) | |
7529 | { | |
542d6675 KH |
7530 | if (md.debug_dv) |
7531 | fprintf (stderr, " Using hint for spill/fill\n"); | |
7532 | /* The index isn't actually used, just set it to something | |
7533 | approximating the bit index. */ | |
800eeca4 JW |
7534 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
7535 | specs[count].mem_offset.hint = 1; | |
7536 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
7537 | specs[count++].mem_offset.base = md.mem_offset.base; | |
7538 | } | |
7539 | else | |
7540 | { | |
7541 | specs[count++].specific = 0; | |
7542 | } | |
7543 | } | |
7544 | break; | |
7545 | ||
7546 | case IA64_RS_AR: | |
7547 | if (note == 1) | |
542d6675 KH |
7548 | { |
7549 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7550 | { | |
7551 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7552 | if ((regno >= 8 && regno <= 15) | |
7553 | || (regno >= 20 && regno <= 23) | |
7554 | || (regno >= 31 && regno <= 39) | |
7555 | || (regno >= 41 && regno <= 47) | |
7556 | || (regno >= 67 && regno <= 111)) | |
7557 | { | |
7558 | specs[count] = tmpl; | |
7559 | specs[count++].index = regno; | |
7560 | } | |
7561 | } | |
7562 | } | |
800eeca4 | 7563 | else |
542d6675 KH |
7564 | { |
7565 | UNHANDLED; | |
7566 | } | |
800eeca4 JW |
7567 | break; |
7568 | ||
7569 | case IA64_RS_ARb: | |
7570 | if (note == 1) | |
542d6675 KH |
7571 | { |
7572 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7573 | { | |
7574 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7575 | if ((regno >= 48 && regno <= 63) | |
7576 | || (regno >= 112 && regno <= 127)) | |
7577 | { | |
7578 | specs[count] = tmpl; | |
7579 | specs[count++].index = regno; | |
7580 | } | |
7581 | } | |
7582 | } | |
800eeca4 | 7583 | else if (note == 0) |
542d6675 KH |
7584 | { |
7585 | for (i = 48; i < 64; i++) | |
7586 | { | |
7587 | specs[count] = tmpl; | |
7588 | specs[count++].index = i; | |
7589 | } | |
7590 | for (i = 112; i < 128; i++) | |
7591 | { | |
7592 | specs[count] = tmpl; | |
7593 | specs[count++].index = i; | |
7594 | } | |
7595 | } | |
197865e8 | 7596 | else |
542d6675 KH |
7597 | { |
7598 | UNHANDLED; | |
7599 | } | |
800eeca4 JW |
7600 | break; |
7601 | ||
7602 | case IA64_RS_BR: | |
7603 | if (note != 1) | |
542d6675 KH |
7604 | { |
7605 | UNHANDLED; | |
7606 | } | |
800eeca4 | 7607 | else |
542d6675 KH |
7608 | { |
7609 | if (rsrc_write) | |
7610 | { | |
7611 | for (i = 0; i < idesc->num_outputs; i++) | |
7612 | if (idesc->operands[i] == IA64_OPND_B1 | |
7613 | || idesc->operands[i] == IA64_OPND_B2) | |
7614 | { | |
7615 | specs[count] = tmpl; | |
7616 | specs[count++].index = | |
7617 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7618 | } | |
7619 | } | |
7620 | else | |
7621 | { | |
40449e9f | 7622 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
7623 | if (idesc->operands[i] == IA64_OPND_B1 |
7624 | || idesc->operands[i] == IA64_OPND_B2) | |
7625 | { | |
7626 | specs[count] = tmpl; | |
7627 | specs[count++].index = | |
7628 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7629 | } | |
7630 | } | |
7631 | } | |
800eeca4 JW |
7632 | break; |
7633 | ||
7634 | case IA64_RS_CPUID: /* four or more registers */ | |
7635 | if (note == 3) | |
542d6675 KH |
7636 | { |
7637 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
7638 | { | |
7639 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7640 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7641 | && KNOWN (regno)) | |
7642 | { | |
7643 | specs[count] = tmpl; | |
7644 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7645 | } | |
7646 | else | |
7647 | { | |
7648 | specs[count] = tmpl; | |
7649 | specs[count++].specific = 0; | |
7650 | } | |
7651 | } | |
7652 | } | |
800eeca4 | 7653 | else |
542d6675 KH |
7654 | { |
7655 | UNHANDLED; | |
7656 | } | |
800eeca4 JW |
7657 | break; |
7658 | ||
7659 | case IA64_RS_DBR: /* four or more registers */ | |
7660 | if (note == 3) | |
542d6675 KH |
7661 | { |
7662 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
7663 | { | |
7664 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7665 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7666 | && KNOWN (regno)) | |
7667 | { | |
7668 | specs[count] = tmpl; | |
7669 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7670 | } | |
7671 | else | |
7672 | { | |
7673 | specs[count] = tmpl; | |
7674 | specs[count++].specific = 0; | |
7675 | } | |
7676 | } | |
7677 | } | |
800eeca4 | 7678 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7679 | { |
7680 | specs[count] = tmpl; | |
7681 | specs[count++].specific = 0; | |
7682 | } | |
800eeca4 | 7683 | else |
542d6675 KH |
7684 | { |
7685 | UNHANDLED; | |
7686 | } | |
800eeca4 JW |
7687 | break; |
7688 | ||
7689 | case IA64_RS_IBR: /* four or more registers */ | |
7690 | if (note == 3) | |
542d6675 KH |
7691 | { |
7692 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
7693 | { | |
7694 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7695 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7696 | && KNOWN (regno)) | |
7697 | { | |
7698 | specs[count] = tmpl; | |
7699 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7700 | } | |
7701 | else | |
7702 | { | |
7703 | specs[count] = tmpl; | |
7704 | specs[count++].specific = 0; | |
7705 | } | |
7706 | } | |
7707 | } | |
800eeca4 | 7708 | else |
542d6675 KH |
7709 | { |
7710 | UNHANDLED; | |
7711 | } | |
800eeca4 JW |
7712 | break; |
7713 | ||
7714 | case IA64_RS_MSR: | |
7715 | if (note == 5) | |
7716 | { | |
7717 | /* These are implementation specific. Force all references to | |
7718 | conflict with all other references. */ | |
7719 | specs[count] = tmpl; | |
7720 | specs[count++].specific = 0; | |
7721 | } | |
7722 | else | |
7723 | { | |
7724 | UNHANDLED; | |
7725 | } | |
7726 | break; | |
7727 | ||
7728 | case IA64_RS_PKR: /* 16 or more registers */ | |
7729 | if (note == 3 || note == 4) | |
542d6675 KH |
7730 | { |
7731 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
7732 | { | |
7733 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7734 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7735 | && KNOWN (regno)) | |
7736 | { | |
7737 | if (note == 3) | |
7738 | { | |
7739 | specs[count] = tmpl; | |
7740 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7741 | } | |
7742 | else | |
7743 | for (i = 0; i < NELEMS (gr_values); i++) | |
7744 | { | |
7745 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 7746 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
7747 | { |
7748 | specs[count] = tmpl; | |
7749 | specs[count++].index = i; | |
7750 | } | |
7751 | } | |
7752 | } | |
7753 | else | |
7754 | { | |
7755 | specs[count] = tmpl; | |
7756 | specs[count++].specific = 0; | |
7757 | } | |
7758 | } | |
7759 | } | |
7760 | else if (note == 0) | |
7761 | { | |
7762 | /* probe et al. */ | |
7763 | specs[count] = tmpl; | |
7764 | specs[count++].specific = 0; | |
7765 | } | |
7766 | break; | |
7767 | ||
7768 | case IA64_RS_PMC: /* four or more registers */ | |
7769 | if (note == 3) | |
7770 | { | |
7771 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
7772 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
7773 | ||
7774 | { | |
7775 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
7776 | ? 1 : !rsrc_write); | |
7777 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
7778 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7779 | && KNOWN (regno)) | |
7780 | { | |
7781 | specs[count] = tmpl; | |
7782 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7783 | } | |
7784 | else | |
7785 | { | |
7786 | specs[count] = tmpl; | |
7787 | specs[count++].specific = 0; | |
7788 | } | |
7789 | } | |
7790 | } | |
7791 | else | |
7792 | { | |
7793 | UNHANDLED; | |
7794 | } | |
800eeca4 JW |
7795 | break; |
7796 | ||
7797 | case IA64_RS_PMD: /* four or more registers */ | |
7798 | if (note == 3) | |
542d6675 KH |
7799 | { |
7800 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
7801 | { | |
7802 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7803 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7804 | && KNOWN (regno)) | |
7805 | { | |
7806 | specs[count] = tmpl; | |
7807 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7808 | } | |
7809 | else | |
7810 | { | |
7811 | specs[count] = tmpl; | |
7812 | specs[count++].specific = 0; | |
7813 | } | |
7814 | } | |
7815 | } | |
800eeca4 | 7816 | else |
542d6675 KH |
7817 | { |
7818 | UNHANDLED; | |
7819 | } | |
800eeca4 JW |
7820 | break; |
7821 | ||
7822 | case IA64_RS_RR: /* eight registers */ | |
7823 | if (note == 6) | |
542d6675 KH |
7824 | { |
7825 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
7826 | { | |
7827 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7828 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7829 | && KNOWN (regno)) | |
7830 | { | |
7831 | specs[count] = tmpl; | |
7832 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
7833 | } | |
7834 | else | |
7835 | { | |
7836 | specs[count] = tmpl; | |
7837 | specs[count++].specific = 0; | |
7838 | } | |
7839 | } | |
7840 | } | |
800eeca4 | 7841 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7842 | { |
7843 | specs[count] = tmpl; | |
7844 | specs[count++].specific = 0; | |
7845 | } | |
197865e8 | 7846 | else |
542d6675 KH |
7847 | { |
7848 | UNHANDLED; | |
7849 | } | |
800eeca4 JW |
7850 | break; |
7851 | ||
7852 | case IA64_RS_CR_IRR: | |
197865e8 | 7853 | if (note == 0) |
542d6675 KH |
7854 | { |
7855 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
7856 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
7857 | if (rsrc_write | |
7858 | && idesc->operands[1] == IA64_OPND_CR3 | |
7859 | && regno == CR_IVR) | |
7860 | { | |
7861 | for (i = 0; i < 4; i++) | |
7862 | { | |
7863 | specs[count] = tmpl; | |
7864 | specs[count++].index = CR_IRR0 + i; | |
7865 | } | |
7866 | } | |
7867 | } | |
800eeca4 | 7868 | else if (note == 1) |
542d6675 KH |
7869 | { |
7870 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7871 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
7872 | && regno >= CR_IRR0 | |
7873 | && regno <= CR_IRR3) | |
7874 | { | |
7875 | specs[count] = tmpl; | |
7876 | specs[count++].index = regno; | |
7877 | } | |
7878 | } | |
800eeca4 | 7879 | else |
542d6675 KH |
7880 | { |
7881 | UNHANDLED; | |
7882 | } | |
800eeca4 JW |
7883 | break; |
7884 | ||
7885 | case IA64_RS_CR_LRR: | |
7886 | if (note != 1) | |
542d6675 KH |
7887 | { |
7888 | UNHANDLED; | |
7889 | } | |
197865e8 | 7890 | else |
542d6675 KH |
7891 | { |
7892 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7893 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
7894 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
7895 | { | |
7896 | specs[count] = tmpl; | |
7897 | specs[count++].index = regno; | |
7898 | } | |
7899 | } | |
800eeca4 JW |
7900 | break; |
7901 | ||
7902 | case IA64_RS_CR: | |
7903 | if (note == 1) | |
542d6675 KH |
7904 | { |
7905 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
7906 | { | |
7907 | specs[count] = tmpl; | |
7908 | specs[count++].index = | |
7909 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7910 | } | |
7911 | } | |
800eeca4 | 7912 | else |
542d6675 KH |
7913 | { |
7914 | UNHANDLED; | |
7915 | } | |
800eeca4 JW |
7916 | break; |
7917 | ||
7918 | case IA64_RS_FR: | |
7919 | case IA64_RS_FRb: | |
7920 | if (note != 1) | |
542d6675 KH |
7921 | { |
7922 | UNHANDLED; | |
7923 | } | |
800eeca4 | 7924 | else if (rsrc_write) |
542d6675 KH |
7925 | { |
7926 | if (dep->specifier == IA64_RS_FRb | |
7927 | && idesc->operands[0] == IA64_OPND_F1) | |
7928 | { | |
7929 | specs[count] = tmpl; | |
7930 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
7931 | } | |
7932 | } | |
800eeca4 | 7933 | else |
542d6675 KH |
7934 | { |
7935 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
7936 | { | |
7937 | if (idesc->operands[i] == IA64_OPND_F2 | |
7938 | || idesc->operands[i] == IA64_OPND_F3 | |
7939 | || idesc->operands[i] == IA64_OPND_F4) | |
7940 | { | |
7941 | specs[count] = tmpl; | |
7942 | specs[count++].index = | |
7943 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
7944 | } | |
7945 | } | |
7946 | } | |
800eeca4 JW |
7947 | break; |
7948 | ||
7949 | case IA64_RS_GR: | |
7950 | if (note == 13) | |
542d6675 KH |
7951 | { |
7952 | /* This reference applies only to the GR whose value is loaded with | |
7953 | data returned from memory. */ | |
7954 | specs[count] = tmpl; | |
7955 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
7956 | } | |
800eeca4 | 7957 | else if (note == 1) |
542d6675 KH |
7958 | { |
7959 | if (rsrc_write) | |
7960 | { | |
7961 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
7962 | if (idesc->operands[i] == IA64_OPND_R1 |
7963 | || idesc->operands[i] == IA64_OPND_R2 | |
7964 | || idesc->operands[i] == IA64_OPND_R3) | |
7965 | { | |
7966 | specs[count] = tmpl; | |
197865e8 | 7967 | specs[count++].index = |
50b81f19 JW |
7968 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
7969 | } | |
7970 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
7971 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
7972 | if (idesc->operands[i] == IA64_OPND_MR3) | |
7973 | { | |
7974 | specs[count] = tmpl; | |
7975 | specs[count++].index = | |
7976 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
7977 | } | |
542d6675 KH |
7978 | } |
7979 | else | |
7980 | { | |
7981 | /* Look for anything that reads a GR. */ | |
7982 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
7983 | { | |
7984 | if (idesc->operands[i] == IA64_OPND_MR3 | |
7985 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
7986 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
7987 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 7988 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
7989 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
7990 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
7991 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
7992 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
7993 | || ((i >= idesc->num_outputs) | |
7994 | && (idesc->operands[i] == IA64_OPND_R1 | |
7995 | || idesc->operands[i] == IA64_OPND_R2 | |
7996 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
7997 | /* addl source register. */ |
7998 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
7999 | { |
8000 | specs[count] = tmpl; | |
8001 | specs[count++].index = | |
8002 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8003 | } | |
8004 | } | |
8005 | } | |
8006 | } | |
197865e8 | 8007 | else |
542d6675 KH |
8008 | { |
8009 | UNHANDLED; | |
8010 | } | |
800eeca4 JW |
8011 | break; |
8012 | ||
139368c9 JW |
8013 | /* This is the same as IA64_RS_PRr, except that the register range is |
8014 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8015 | case IA64_RS_PR: |
8016 | if (note == 0) | |
542d6675 | 8017 | { |
139368c9 | 8018 | for (i = 1; i < 16; i++) |
542d6675 | 8019 | { |
139368c9 JW |
8020 | specs[count] = tmpl; |
8021 | specs[count++].index = i; | |
8022 | } | |
8023 | } | |
8024 | else if (note == 7) | |
8025 | { | |
8026 | valueT mask = 0; | |
8027 | /* Mark only those registers indicated by the mask. */ | |
8028 | if (rsrc_write) | |
8029 | { | |
8030 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8031 | for (i = 1; i < 16; i++) | |
8032 | if (mask & ((valueT) 1 << i)) | |
8033 | { | |
8034 | specs[count] = tmpl; | |
8035 | specs[count++].index = i; | |
8036 | } | |
8037 | } | |
8038 | else | |
8039 | { | |
8040 | UNHANDLED; | |
8041 | } | |
8042 | } | |
8043 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8044 | { | |
8045 | if (rsrc_write) | |
8046 | { | |
8047 | for (i = 0; i < idesc->num_outputs; i++) | |
8048 | { | |
8049 | if (idesc->operands[i] == IA64_OPND_P1 | |
8050 | || idesc->operands[i] == IA64_OPND_P2) | |
8051 | { | |
8052 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8053 | if (regno >= 1 && regno < 16) | |
8054 | { | |
8055 | specs[count] = tmpl; | |
8056 | specs[count++].index = regno; | |
8057 | } | |
8058 | } | |
8059 | } | |
8060 | } | |
8061 | else | |
8062 | { | |
8063 | UNHANDLED; | |
8064 | } | |
8065 | } | |
8066 | else if (note == 12) | |
8067 | { | |
8068 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8069 | { | |
8070 | specs[count] = tmpl; | |
8071 | specs[count++].index = CURR_SLOT.qp_regno; | |
8072 | } | |
8073 | } | |
8074 | else if (note == 1) | |
8075 | { | |
8076 | if (rsrc_write) | |
8077 | { | |
8078 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8079 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8080 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8081 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8082 | |
8083 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8084 | || idesc->operands[0] == IA64_OPND_P2) | |
8085 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8086 | { |
8087 | specs[count] = tmpl; | |
139368c9 JW |
8088 | specs[count].cmp_type = |
8089 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8090 | specs[count++].index = p1; | |
8091 | } | |
8092 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8093 | || idesc->operands[1] == IA64_OPND_P2) | |
8094 | && p2 >= 1 && p2 < 16) | |
8095 | { | |
8096 | specs[count] = tmpl; | |
8097 | specs[count].cmp_type = | |
8098 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8099 | specs[count++].index = p2; | |
542d6675 KH |
8100 | } |
8101 | } | |
8102 | else | |
8103 | { | |
139368c9 | 8104 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8105 | { |
8106 | specs[count] = tmpl; | |
139368c9 JW |
8107 | specs[count++].index = CURR_SLOT.qp_regno; |
8108 | } | |
8109 | if (idesc->operands[1] == IA64_OPND_PR) | |
8110 | { | |
8111 | for (i = 1; i < 16; i++) | |
8112 | { | |
8113 | specs[count] = tmpl; | |
8114 | specs[count++].index = i; | |
8115 | } | |
542d6675 KH |
8116 | } |
8117 | } | |
8118 | } | |
139368c9 JW |
8119 | else |
8120 | { | |
8121 | UNHANDLED; | |
8122 | } | |
8123 | break; | |
8124 | ||
8125 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8126 | simplified cases of this. */ | |
8127 | case IA64_RS_PRr: | |
8128 | if (note == 0) | |
8129 | { | |
8130 | for (i = 16; i < 63; i++) | |
8131 | { | |
8132 | specs[count] = tmpl; | |
8133 | specs[count++].index = i; | |
8134 | } | |
8135 | } | |
800eeca4 | 8136 | else if (note == 7) |
542d6675 KH |
8137 | { |
8138 | valueT mask = 0; | |
8139 | /* Mark only those registers indicated by the mask. */ | |
8140 | if (rsrc_write | |
8141 | && idesc->operands[0] == IA64_OPND_PR) | |
8142 | { | |
8143 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8144 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8145 | for (i = 16; i < 63; i++) |
8146 | { | |
8147 | specs[count] = tmpl; | |
8148 | specs[count++].index = i; | |
8149 | } | |
542d6675 KH |
8150 | } |
8151 | else if (rsrc_write | |
8152 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8153 | { | |
8154 | for (i = 16; i < 63; i++) | |
8155 | { | |
8156 | specs[count] = tmpl; | |
8157 | specs[count++].index = i; | |
8158 | } | |
8159 | } | |
8160 | else | |
8161 | { | |
8162 | UNHANDLED; | |
8163 | } | |
8164 | } | |
800eeca4 | 8165 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8166 | { |
8167 | if (rsrc_write) | |
8168 | { | |
8169 | for (i = 0; i < idesc->num_outputs; i++) | |
8170 | { | |
8171 | if (idesc->operands[i] == IA64_OPND_P1 | |
8172 | || idesc->operands[i] == IA64_OPND_P2) | |
8173 | { | |
8174 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8175 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8176 | { |
8177 | specs[count] = tmpl; | |
8178 | specs[count++].index = regno; | |
8179 | } | |
8180 | } | |
8181 | } | |
8182 | } | |
8183 | else | |
8184 | { | |
8185 | UNHANDLED; | |
8186 | } | |
8187 | } | |
800eeca4 | 8188 | else if (note == 12) |
542d6675 | 8189 | { |
139368c9 | 8190 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8191 | { |
8192 | specs[count] = tmpl; | |
8193 | specs[count++].index = CURR_SLOT.qp_regno; | |
8194 | } | |
8195 | } | |
800eeca4 | 8196 | else if (note == 1) |
542d6675 KH |
8197 | { |
8198 | if (rsrc_write) | |
8199 | { | |
8200 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8201 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8202 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8203 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8204 | |
542d6675 KH |
8205 | if ((idesc->operands[0] == IA64_OPND_P1 |
8206 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8207 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8208 | { |
8209 | specs[count] = tmpl; | |
4a4f25cf | 8210 | specs[count].cmp_type = |
7484b8e6 | 8211 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8212 | specs[count++].index = p1; |
8213 | } | |
8214 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8215 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8216 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8217 | { |
8218 | specs[count] = tmpl; | |
4a4f25cf | 8219 | specs[count].cmp_type = |
7484b8e6 | 8220 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8221 | specs[count++].index = p2; |
8222 | } | |
8223 | } | |
8224 | else | |
8225 | { | |
139368c9 | 8226 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8227 | { |
8228 | specs[count] = tmpl; | |
8229 | specs[count++].index = CURR_SLOT.qp_regno; | |
8230 | } | |
8231 | if (idesc->operands[1] == IA64_OPND_PR) | |
8232 | { | |
139368c9 | 8233 | for (i = 16; i < 63; i++) |
542d6675 KH |
8234 | { |
8235 | specs[count] = tmpl; | |
8236 | specs[count++].index = i; | |
8237 | } | |
8238 | } | |
8239 | } | |
8240 | } | |
197865e8 | 8241 | else |
542d6675 KH |
8242 | { |
8243 | UNHANDLED; | |
8244 | } | |
800eeca4 JW |
8245 | break; |
8246 | ||
8247 | case IA64_RS_PSR: | |
197865e8 | 8248 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8249 | dep->regindex. */ |
800eeca4 | 8250 | if (note == 0) |
542d6675 KH |
8251 | { |
8252 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8253 | { | |
8254 | if (dep->regindex < 6) | |
8255 | { | |
8256 | specs[count++] = tmpl; | |
8257 | } | |
8258 | } | |
8259 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8260 | { | |
8261 | if (dep->regindex < 32 | |
8262 | || dep->regindex == 35 | |
8263 | || dep->regindex == 36 | |
8264 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8265 | { | |
8266 | specs[count++] = tmpl; | |
8267 | } | |
8268 | } | |
8269 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8270 | { | |
8271 | if (dep->regindex < 32 | |
8272 | || dep->regindex == 35 | |
8273 | || dep->regindex == 36 | |
8274 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8275 | { | |
8276 | specs[count++] = tmpl; | |
8277 | } | |
8278 | } | |
8279 | else | |
8280 | { | |
8281 | /* Several PSR bits have very specific dependencies. */ | |
8282 | switch (dep->regindex) | |
8283 | { | |
8284 | default: | |
8285 | specs[count++] = tmpl; | |
8286 | break; | |
8287 | case PSR_IC: | |
8288 | if (rsrc_write) | |
8289 | { | |
8290 | specs[count++] = tmpl; | |
8291 | } | |
8292 | else | |
8293 | { | |
8294 | /* Only certain CR accesses use PSR.ic */ | |
8295 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8296 | || idesc->operands[1] == IA64_OPND_CR3) | |
8297 | { | |
8298 | int index = | |
8299 | ((idesc->operands[0] == IA64_OPND_CR3) | |
8300 | ? 0 : 1); | |
8301 | int regno = | |
8302 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
8303 | ||
8304 | switch (regno) | |
8305 | { | |
8306 | default: | |
8307 | break; | |
8308 | case CR_ITIR: | |
8309 | case CR_IFS: | |
8310 | case CR_IIM: | |
8311 | case CR_IIP: | |
8312 | case CR_IPSR: | |
8313 | case CR_ISR: | |
8314 | case CR_IFA: | |
8315 | case CR_IHA: | |
8316 | case CR_IIPA: | |
8317 | specs[count++] = tmpl; | |
8318 | break; | |
8319 | } | |
8320 | } | |
8321 | } | |
8322 | break; | |
8323 | case PSR_CPL: | |
8324 | if (rsrc_write) | |
8325 | { | |
8326 | specs[count++] = tmpl; | |
8327 | } | |
8328 | else | |
8329 | { | |
8330 | /* Only some AR accesses use cpl */ | |
8331 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8332 | || idesc->operands[1] == IA64_OPND_AR3) | |
8333 | { | |
8334 | int index = | |
8335 | ((idesc->operands[0] == IA64_OPND_AR3) | |
8336 | ? 0 : 1); | |
8337 | int regno = | |
8338 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
8339 | ||
8340 | if (regno == AR_ITC | |
8341 | || (index == 0 | |
8342 | && (regno == AR_ITC | |
8343 | || regno == AR_RSC | |
8344 | || (regno >= AR_K0 | |
8345 | && regno <= AR_K7)))) | |
8346 | { | |
8347 | specs[count++] = tmpl; | |
8348 | } | |
8349 | } | |
8350 | else | |
8351 | { | |
8352 | specs[count++] = tmpl; | |
8353 | } | |
8354 | break; | |
8355 | } | |
8356 | } | |
8357 | } | |
8358 | } | |
800eeca4 | 8359 | else if (note == 7) |
542d6675 KH |
8360 | { |
8361 | valueT mask = 0; | |
8362 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8363 | { | |
8364 | mask = CURR_SLOT.opnd[0].X_add_number; | |
8365 | } | |
8366 | else | |
8367 | { | |
8368 | UNHANDLED; | |
8369 | } | |
8370 | if (mask & ((valueT) 1 << dep->regindex)) | |
8371 | { | |
8372 | specs[count++] = tmpl; | |
8373 | } | |
8374 | } | |
800eeca4 | 8375 | else if (note == 8) |
542d6675 KH |
8376 | { |
8377 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
8378 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
8379 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
8380 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8381 | { | |
8382 | if (idesc->operands[i] == IA64_OPND_F1 | |
8383 | || idesc->operands[i] == IA64_OPND_F2 | |
8384 | || idesc->operands[i] == IA64_OPND_F3 | |
8385 | || idesc->operands[i] == IA64_OPND_F4) | |
8386 | { | |
8387 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8388 | if (reg >= min && reg <= max) | |
8389 | { | |
8390 | specs[count++] = tmpl; | |
8391 | } | |
8392 | } | |
8393 | } | |
8394 | } | |
800eeca4 | 8395 | else if (note == 9) |
542d6675 KH |
8396 | { |
8397 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
8398 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
8399 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
8400 | FR2-31 */ | |
8401 | for (i = 0; i < idesc->num_outputs; i++) | |
8402 | { | |
8403 | if (idesc->operands[i] == IA64_OPND_F1) | |
8404 | { | |
8405 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8406 | if (reg >= min && reg <= max) | |
8407 | { | |
8408 | specs[count++] = tmpl; | |
8409 | } | |
8410 | } | |
8411 | } | |
8412 | } | |
800eeca4 | 8413 | else if (note == 10) |
542d6675 KH |
8414 | { |
8415 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8416 | { | |
8417 | if (idesc->operands[i] == IA64_OPND_R1 | |
8418 | || idesc->operands[i] == IA64_OPND_R2 | |
8419 | || idesc->operands[i] == IA64_OPND_R3) | |
8420 | { | |
8421 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8422 | if (regno >= 16 && regno <= 31) | |
8423 | { | |
8424 | specs[count++] = tmpl; | |
8425 | } | |
8426 | } | |
8427 | } | |
8428 | } | |
800eeca4 | 8429 | else |
542d6675 KH |
8430 | { |
8431 | UNHANDLED; | |
8432 | } | |
800eeca4 JW |
8433 | break; |
8434 | ||
8435 | case IA64_RS_AR_FPSR: | |
8436 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
8437 | { |
8438 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8439 | if (regno == AR_FPSR) | |
8440 | { | |
8441 | specs[count++] = tmpl; | |
8442 | } | |
8443 | } | |
800eeca4 | 8444 | else |
542d6675 KH |
8445 | { |
8446 | specs[count++] = tmpl; | |
8447 | } | |
800eeca4 JW |
8448 | break; |
8449 | ||
197865e8 | 8450 | case IA64_RS_ARX: |
800eeca4 JW |
8451 | /* Handle all AR[REG] resources */ |
8452 | if (note == 0 || note == 1) | |
542d6675 KH |
8453 | { |
8454 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8455 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
8456 | && regno == dep->regindex) | |
8457 | { | |
8458 | specs[count++] = tmpl; | |
8459 | } | |
8460 | /* other AR[REG] resources may be affected by AR accesses */ | |
8461 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
8462 | { | |
8463 | /* AR[] writes */ | |
8464 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
8465 | switch (dep->regindex) | |
8466 | { | |
8467 | default: | |
8468 | break; | |
8469 | case AR_BSP: | |
8470 | case AR_RNAT: | |
8471 | if (regno == AR_BSPSTORE) | |
8472 | { | |
8473 | specs[count++] = tmpl; | |
8474 | } | |
8475 | case AR_RSC: | |
8476 | if (!rsrc_write && | |
8477 | (regno == AR_BSPSTORE | |
8478 | || regno == AR_RNAT)) | |
8479 | { | |
8480 | specs[count++] = tmpl; | |
8481 | } | |
8482 | break; | |
8483 | } | |
8484 | } | |
8485 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8486 | { | |
8487 | /* AR[] reads */ | |
8488 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
8489 | switch (dep->regindex) | |
8490 | { | |
8491 | default: | |
8492 | break; | |
8493 | case AR_RSC: | |
8494 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
8495 | { | |
8496 | specs[count++] = tmpl; | |
8497 | } | |
8498 | break; | |
8499 | } | |
8500 | } | |
8501 | else | |
8502 | { | |
8503 | specs[count++] = tmpl; | |
8504 | } | |
8505 | } | |
800eeca4 | 8506 | else |
542d6675 KH |
8507 | { |
8508 | UNHANDLED; | |
8509 | } | |
800eeca4 JW |
8510 | break; |
8511 | ||
8512 | case IA64_RS_CRX: | |
8513 | /* Handle all CR[REG] resources */ | |
8514 | if (note == 0 || note == 1) | |
542d6675 KH |
8515 | { |
8516 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8517 | { | |
8518 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8519 | if (regno == dep->regindex) | |
8520 | { | |
8521 | specs[count++] = tmpl; | |
8522 | } | |
8523 | else if (!rsrc_write) | |
8524 | { | |
8525 | /* Reads from CR[IVR] affect other resources. */ | |
8526 | if (regno == CR_IVR) | |
8527 | { | |
8528 | if ((dep->regindex >= CR_IRR0 | |
8529 | && dep->regindex <= CR_IRR3) | |
8530 | || dep->regindex == CR_TPR) | |
8531 | { | |
8532 | specs[count++] = tmpl; | |
8533 | } | |
8534 | } | |
8535 | } | |
8536 | } | |
8537 | else | |
8538 | { | |
8539 | specs[count++] = tmpl; | |
8540 | } | |
8541 | } | |
800eeca4 | 8542 | else |
542d6675 KH |
8543 | { |
8544 | UNHANDLED; | |
8545 | } | |
800eeca4 JW |
8546 | break; |
8547 | ||
8548 | case IA64_RS_INSERVICE: | |
8549 | /* look for write of EOI (67) or read of IVR (65) */ | |
8550 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
8551 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
8552 | || (idesc->operands[1] == IA64_OPND_CR3 | |
8553 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
8554 | { | |
8555 | specs[count++] = tmpl; | |
8556 | } | |
800eeca4 JW |
8557 | break; |
8558 | ||
8559 | case IA64_RS_GR0: | |
8560 | if (note == 1) | |
542d6675 KH |
8561 | { |
8562 | specs[count++] = tmpl; | |
8563 | } | |
800eeca4 | 8564 | else |
542d6675 KH |
8565 | { |
8566 | UNHANDLED; | |
8567 | } | |
800eeca4 JW |
8568 | break; |
8569 | ||
8570 | case IA64_RS_CFM: | |
8571 | if (note != 2) | |
542d6675 KH |
8572 | { |
8573 | specs[count++] = tmpl; | |
8574 | } | |
800eeca4 | 8575 | else |
542d6675 KH |
8576 | { |
8577 | /* Check if any of the registers accessed are in the rotating region. | |
8578 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
8579 | region */ | |
8580 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8581 | { | |
8582 | if (idesc->operands[i] == IA64_OPND_R1 | |
8583 | || idesc->operands[i] == IA64_OPND_R2 | |
8584 | || idesc->operands[i] == IA64_OPND_R3) | |
8585 | { | |
8586 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8587 | /* Assumes that md.rot.num_regs is always valid */ | |
8588 | if (md.rot.num_regs > 0 | |
8589 | && num > 31 | |
8590 | && num < 31 + md.rot.num_regs) | |
8591 | { | |
8592 | specs[count] = tmpl; | |
8593 | specs[count++].specific = 0; | |
8594 | } | |
8595 | } | |
8596 | else if (idesc->operands[i] == IA64_OPND_F1 | |
8597 | || idesc->operands[i] == IA64_OPND_F2 | |
8598 | || idesc->operands[i] == IA64_OPND_F3 | |
8599 | || idesc->operands[i] == IA64_OPND_F4) | |
8600 | { | |
8601 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8602 | if (num > 31) | |
8603 | { | |
8604 | specs[count] = tmpl; | |
8605 | specs[count++].specific = 0; | |
8606 | } | |
8607 | } | |
8608 | else if (idesc->operands[i] == IA64_OPND_P1 | |
8609 | || idesc->operands[i] == IA64_OPND_P2) | |
8610 | { | |
8611 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8612 | if (num > 15) | |
8613 | { | |
8614 | specs[count] = tmpl; | |
8615 | specs[count++].specific = 0; | |
8616 | } | |
8617 | } | |
8618 | } | |
8619 | if (CURR_SLOT.qp_regno > 15) | |
8620 | { | |
8621 | specs[count] = tmpl; | |
8622 | specs[count++].specific = 0; | |
8623 | } | |
8624 | } | |
800eeca4 JW |
8625 | break; |
8626 | ||
139368c9 JW |
8627 | /* This is the same as IA64_RS_PRr, except simplified to account for |
8628 | the fact that there is only one register. */ | |
800eeca4 JW |
8629 | case IA64_RS_PR63: |
8630 | if (note == 0) | |
542d6675 KH |
8631 | { |
8632 | specs[count++] = tmpl; | |
8633 | } | |
139368c9 | 8634 | else if (note == 7) |
40449e9f KH |
8635 | { |
8636 | valueT mask = 0; | |
8637 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
8638 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8639 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 8640 | specs[count++] = tmpl; |
40449e9f | 8641 | } |
800eeca4 | 8642 | else if (note == 11) |
542d6675 KH |
8643 | { |
8644 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8645 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
8646 | || (idesc->operands[1] == IA64_OPND_P2 | |
8647 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
8648 | { | |
8649 | specs[count++] = tmpl; | |
8650 | } | |
8651 | } | |
800eeca4 | 8652 | else if (note == 12) |
542d6675 KH |
8653 | { |
8654 | if (CURR_SLOT.qp_regno == 63) | |
8655 | { | |
8656 | specs[count++] = tmpl; | |
8657 | } | |
8658 | } | |
800eeca4 | 8659 | else if (note == 1) |
542d6675 KH |
8660 | { |
8661 | if (rsrc_write) | |
8662 | { | |
40449e9f KH |
8663 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
8664 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8665 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8666 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8667 | |
4a4f25cf | 8668 | if (p1 == 63 |
7484b8e6 TW |
8669 | && (idesc->operands[0] == IA64_OPND_P1 |
8670 | || idesc->operands[0] == IA64_OPND_P2)) | |
8671 | { | |
40449e9f | 8672 | specs[count] = tmpl; |
4a4f25cf | 8673 | specs[count++].cmp_type = |
7484b8e6 TW |
8674 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
8675 | } | |
8676 | if (p2 == 63 | |
8677 | && (idesc->operands[1] == IA64_OPND_P1 | |
8678 | || idesc->operands[1] == IA64_OPND_P2)) | |
8679 | { | |
40449e9f | 8680 | specs[count] = tmpl; |
4a4f25cf | 8681 | specs[count++].cmp_type = |
7484b8e6 TW |
8682 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
8683 | } | |
542d6675 KH |
8684 | } |
8685 | else | |
8686 | { | |
8687 | if (CURR_SLOT.qp_regno == 63) | |
8688 | { | |
8689 | specs[count++] = tmpl; | |
8690 | } | |
8691 | } | |
8692 | } | |
800eeca4 | 8693 | else |
542d6675 KH |
8694 | { |
8695 | UNHANDLED; | |
8696 | } | |
800eeca4 JW |
8697 | break; |
8698 | ||
8699 | case IA64_RS_RSE: | |
8700 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
8701 | read resources have not yet been completely identified, so for now |
8702 | treat RSE as a single resource */ | |
800eeca4 | 8703 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
8704 | { |
8705 | if (rsrc_write) | |
8706 | { | |
8707 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8708 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
8709 | { | |
8710 | specs[count] = tmpl; | |
8711 | specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */ | |
8712 | } | |
8713 | } | |
8714 | else | |
8715 | { | |
8716 | if (idesc->operands[0] == IA64_OPND_AR3) | |
8717 | { | |
8718 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
8719 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
8720 | { | |
8721 | specs[count++] = tmpl; | |
8722 | } | |
8723 | } | |
8724 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8725 | { | |
8726 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
8727 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
8728 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
8729 | { | |
8730 | specs[count++] = tmpl; | |
8731 | } | |
8732 | } | |
8733 | } | |
8734 | } | |
197865e8 | 8735 | else |
542d6675 KH |
8736 | { |
8737 | specs[count++] = tmpl; | |
8738 | } | |
800eeca4 JW |
8739 | break; |
8740 | ||
8741 | case IA64_RS_ANY: | |
8742 | /* FIXME -- do any of these need to be non-specific? */ | |
8743 | specs[count++] = tmpl; | |
8744 | break; | |
8745 | ||
8746 | default: | |
8747 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
8748 | break; | |
8749 | } | |
8750 | ||
8751 | return count; | |
8752 | } | |
8753 | ||
8754 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
8755 | QP of the marking instruction and a subsequent branch on the same QP. */ |
8756 | ||
800eeca4 JW |
8757 | static void |
8758 | clear_qp_branch_flag (mask) | |
542d6675 | 8759 | valueT mask; |
800eeca4 JW |
8760 | { |
8761 | int i; | |
542d6675 | 8762 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 8763 | { |
197865e8 | 8764 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 8765 | if ((bit & mask) != 0) |
542d6675 KH |
8766 | { |
8767 | regdeps[i].link_to_qp_branch = 0; | |
8768 | } | |
800eeca4 JW |
8769 | } |
8770 | } | |
8771 | ||
5e2f6673 L |
8772 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
8773 | any mutexes which contain one of the PRs and create new ones when | |
8774 | needed. */ | |
8775 | ||
8776 | static int | |
8777 | update_qp_mutex (valueT mask) | |
8778 | { | |
8779 | int i; | |
8780 | int add = 0; | |
8781 | ||
8782 | i = 0; | |
8783 | while (i < qp_mutexeslen) | |
8784 | { | |
8785 | if ((qp_mutexes[i].prmask & mask) != 0) | |
8786 | { | |
8787 | /* If it destroys and creates the same mutex, do nothing. */ | |
8788 | if (qp_mutexes[i].prmask == mask | |
8789 | && qp_mutexes[i].path == md.path) | |
8790 | { | |
8791 | i++; | |
8792 | add = -1; | |
8793 | } | |
8794 | else | |
8795 | { | |
8796 | int keep = 0; | |
8797 | ||
8798 | if (md.debug_dv) | |
8799 | { | |
8800 | fprintf (stderr, " Clearing mutex relation"); | |
8801 | print_prmask (qp_mutexes[i].prmask); | |
8802 | fprintf (stderr, "\n"); | |
8803 | } | |
8804 | ||
8805 | /* Deal with the old mutex with more than 3+ PRs only if | |
8806 | the new mutex on the same execution path with it. | |
8807 | ||
8808 | FIXME: The 3+ mutex support is incomplete. | |
8809 | dot_pred_rel () may be a better place to fix it. */ | |
8810 | if (qp_mutexes[i].path == md.path) | |
8811 | { | |
8812 | /* If it is a proper subset of the mutex, create a | |
8813 | new mutex. */ | |
8814 | if (add == 0 | |
8815 | && (qp_mutexes[i].prmask & mask) == mask) | |
8816 | add = 1; | |
8817 | ||
8818 | qp_mutexes[i].prmask &= ~mask; | |
8819 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
8820 | { | |
8821 | /* Modify the mutex if there are more than one | |
8822 | PR left. */ | |
8823 | keep = 1; | |
8824 | i++; | |
8825 | } | |
8826 | } | |
8827 | ||
8828 | if (keep == 0) | |
8829 | /* Remove the mutex. */ | |
8830 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8831 | } | |
8832 | } | |
8833 | else | |
8834 | ++i; | |
8835 | } | |
8836 | ||
8837 | if (add == 1) | |
8838 | add_qp_mutex (mask); | |
8839 | ||
8840 | return add; | |
8841 | } | |
8842 | ||
197865e8 | 8843 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 8844 | |
542d6675 KH |
8845 | Any changes to a PR clears the mutex relations which include that PR. */ |
8846 | ||
800eeca4 JW |
8847 | static void |
8848 | clear_qp_mutex (mask) | |
542d6675 | 8849 | valueT mask; |
800eeca4 JW |
8850 | { |
8851 | int i; | |
8852 | ||
8853 | i = 0; | |
8854 | while (i < qp_mutexeslen) | |
8855 | { | |
8856 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
8857 | { |
8858 | if (md.debug_dv) | |
8859 | { | |
8860 | fprintf (stderr, " Clearing mutex relation"); | |
8861 | print_prmask (qp_mutexes[i].prmask); | |
8862 | fprintf (stderr, "\n"); | |
8863 | } | |
8864 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8865 | } | |
800eeca4 | 8866 | else |
542d6675 | 8867 | ++i; |
800eeca4 JW |
8868 | } |
8869 | } | |
8870 | ||
8871 | /* Clear implies relations which contain PRs in the given masks. | |
8872 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
8873 | indicates the implied PR. */ |
8874 | ||
800eeca4 JW |
8875 | static void |
8876 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
8877 | valueT p1_mask; |
8878 | valueT p2_mask; | |
800eeca4 JW |
8879 | { |
8880 | int i; | |
8881 | ||
8882 | i = 0; | |
8883 | while (i < qp_implieslen) | |
8884 | { | |
197865e8 | 8885 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
8886 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
8887 | { | |
8888 | if (md.debug_dv) | |
8889 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
8890 | qp_implies[i].p1, qp_implies[i].p2); | |
8891 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
8892 | } | |
197865e8 | 8893 | else |
542d6675 | 8894 | ++i; |
800eeca4 JW |
8895 | } |
8896 | } | |
8897 | ||
542d6675 KH |
8898 | /* Add the PRs specified to the list of implied relations. */ |
8899 | ||
800eeca4 JW |
8900 | static void |
8901 | add_qp_imply (p1, p2) | |
542d6675 | 8902 | int p1, p2; |
800eeca4 JW |
8903 | { |
8904 | valueT mask; | |
8905 | valueT bit; | |
8906 | int i; | |
8907 | ||
542d6675 | 8908 | /* p0 is not meaningful here. */ |
800eeca4 JW |
8909 | if (p1 == 0 || p2 == 0) |
8910 | abort (); | |
8911 | ||
8912 | if (p1 == p2) | |
8913 | return; | |
8914 | ||
542d6675 KH |
8915 | /* If it exists already, ignore it. */ |
8916 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 8917 | { |
197865e8 | 8918 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
8919 | && qp_implies[i].p2 == p2 |
8920 | && qp_implies[i].path == md.path | |
8921 | && !qp_implies[i].p2_branched) | |
8922 | return; | |
800eeca4 JW |
8923 | } |
8924 | ||
8925 | if (qp_implieslen == qp_impliestotlen) | |
8926 | { | |
8927 | qp_impliestotlen += 20; | |
8928 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
8929 | xrealloc ((void *) qp_implies, |
8930 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
8931 | } |
8932 | if (md.debug_dv) | |
8933 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
8934 | qp_implies[qp_implieslen].p1 = p1; | |
8935 | qp_implies[qp_implieslen].p2 = p2; | |
8936 | qp_implies[qp_implieslen].path = md.path; | |
8937 | qp_implies[qp_implieslen++].p2_branched = 0; | |
8938 | ||
8939 | /* Add in the implied transitive relations; for everything that p2 implies, | |
8940 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 8941 | as well. */ |
542d6675 | 8942 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
8943 | { |
8944 | if (qp_implies[i].p1 == p2) | |
542d6675 | 8945 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 8946 | if (qp_implies[i].p2 == p1) |
542d6675 | 8947 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
8948 | } |
8949 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
8950 | relation containing p2, duplicate it and replace p2 with p1. */ |
8951 | bit = (valueT) 1 << p1; | |
8952 | mask = (valueT) 1 << p2; | |
542d6675 | 8953 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
8954 | { |
8955 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 8956 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
8957 | } |
8958 | } | |
8959 | ||
800eeca4 JW |
8960 | /* Add the PRs specified in the mask to the mutex list; this means that only |
8961 | one of the PRs can be true at any time. PR0 should never be included in | |
8962 | the mask. */ | |
542d6675 | 8963 | |
800eeca4 JW |
8964 | static void |
8965 | add_qp_mutex (mask) | |
542d6675 | 8966 | valueT mask; |
800eeca4 JW |
8967 | { |
8968 | if (mask & 0x1) | |
8969 | abort (); | |
8970 | ||
8971 | if (qp_mutexeslen == qp_mutexestotlen) | |
8972 | { | |
8973 | qp_mutexestotlen += 20; | |
8974 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
8975 | xrealloc ((void *) qp_mutexes, |
8976 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
8977 | } |
8978 | if (md.debug_dv) | |
8979 | { | |
8980 | fprintf (stderr, " Registering mutex on"); | |
8981 | print_prmask (mask); | |
8982 | fprintf (stderr, "\n"); | |
8983 | } | |
8984 | qp_mutexes[qp_mutexeslen].path = md.path; | |
8985 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
8986 | } | |
8987 | ||
cb5301b6 RH |
8988 | static int |
8989 | has_suffix_p (name, suffix) | |
40449e9f KH |
8990 | const char *name; |
8991 | const char *suffix; | |
cb5301b6 RH |
8992 | { |
8993 | size_t namelen = strlen (name); | |
8994 | size_t sufflen = strlen (suffix); | |
8995 | ||
8996 | if (namelen <= sufflen) | |
8997 | return 0; | |
8998 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
8999 | } | |
9000 | ||
800eeca4 JW |
9001 | static void |
9002 | clear_register_values () | |
9003 | { | |
9004 | int i; | |
9005 | if (md.debug_dv) | |
9006 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9007 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9008 | gr_values[i].known = 0; |
9009 | } | |
9010 | ||
9011 | /* Keep track of register values/changes which affect DV tracking. | |
9012 | ||
9013 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9014 | have to examine a group of strings to identify them. */ |
800eeca4 | 9015 | |
800eeca4 JW |
9016 | static void |
9017 | note_register_values (idesc) | |
542d6675 | 9018 | struct ia64_opcode *idesc; |
800eeca4 JW |
9019 | { |
9020 | valueT qp_changemask = 0; | |
9021 | int i; | |
9022 | ||
542d6675 KH |
9023 | /* Invalidate values for registers being written to. */ |
9024 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9025 | { |
197865e8 | 9026 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9027 | || idesc->operands[i] == IA64_OPND_R2 |
9028 | || idesc->operands[i] == IA64_OPND_R3) | |
9029 | { | |
9030 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9031 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9032 | gr_values[regno].known = 0; | |
9033 | } | |
50b81f19 JW |
9034 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9035 | { | |
9036 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9037 | if (regno > 0 && regno < 4) | |
9038 | gr_values[regno].known = 0; | |
9039 | } | |
197865e8 | 9040 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9041 | || idesc->operands[i] == IA64_OPND_P2) |
9042 | { | |
9043 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9044 | qp_changemask |= (valueT) 1 << regno; | |
9045 | } | |
800eeca4 | 9046 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9047 | { |
9048 | if (idesc->operands[2] & (valueT) 0x10000) | |
9049 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9050 | else | |
9051 | qp_changemask = idesc->operands[2]; | |
9052 | break; | |
9053 | } | |
800eeca4 | 9054 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9055 | { |
9056 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9057 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9058 | else |
9059 | qp_changemask = idesc->operands[1]; | |
9060 | qp_changemask &= ~(valueT) 0xFFFF; | |
9061 | break; | |
9062 | } | |
9063 | } | |
9064 | ||
9065 | /* Always clear qp branch flags on any PR change. */ | |
9066 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9067 | clear_qp_branch_flag (qp_changemask); |
9068 | ||
542d6675 | 9069 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9070 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9071 | { | |
197865e8 | 9072 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9073 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9074 | { |
9075 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9076 | gr_values[i].known = 0; | |
9077 | } | |
800eeca4 JW |
9078 | clear_qp_mutex (qp_changemask); |
9079 | clear_qp_implies (qp_changemask, qp_changemask); | |
9080 | } | |
542d6675 KH |
9081 | /* After a call, all register values are undefined, except those marked |
9082 | as "safe". */ | |
800eeca4 | 9083 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9084 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9085 | { |
56d27c17 | 9086 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9087 | clear_register_values (); |
9088 | clear_qp_mutex (~qp_safe_across_calls); | |
9089 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9090 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9091 | } | |
e9718fe1 | 9092 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9093 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9094 | { |
9095 | clear_register_values (); | |
197865e8 KH |
9096 | clear_qp_mutex (~(valueT) 0); |
9097 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9098 | } |
542d6675 | 9099 | /* Look for mutex and implies relations. */ |
197865e8 | 9100 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9101 | || idesc->operands[0] == IA64_OPND_P2) |
9102 | && (idesc->operands[1] == IA64_OPND_P1 | |
9103 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9104 | { |
9105 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9106 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9107 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9108 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9109 | |
5e2f6673 L |
9110 | /* If both PRs are PR0, we can't really do anything. */ |
9111 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9112 | { |
9113 | if (md.debug_dv) | |
9114 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9115 | } | |
800eeca4 | 9116 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9117 | with the following exceptions. */ |
cb5301b6 RH |
9118 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9119 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9120 | { |
542d6675 KH |
9121 | clear_qp_implies (p2mask, p1mask); |
9122 | } | |
cb5301b6 RH |
9123 | else if (has_suffix_p (idesc->name, ".andcm") |
9124 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9125 | { |
9126 | clear_qp_implies (0, p1mask | p2mask); | |
9127 | } | |
cb5301b6 RH |
9128 | else if (has_suffix_p (idesc->name, ".orcm") |
9129 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9130 | { |
9131 | clear_qp_mutex (p1mask | p2mask); | |
9132 | clear_qp_implies (p1mask | p2mask, 0); | |
9133 | } | |
800eeca4 | 9134 | else |
542d6675 | 9135 | { |
5e2f6673 L |
9136 | int added = 0; |
9137 | ||
542d6675 | 9138 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9139 | |
9140 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9141 | if (p1 == 0 || p2 == 0) | |
9142 | clear_qp_mutex (p1mask | p2mask); | |
9143 | else | |
9144 | added = update_qp_mutex (p1mask | p2mask); | |
9145 | ||
9146 | if (CURR_SLOT.qp_regno == 0 | |
9147 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9148 | { |
5e2f6673 L |
9149 | if (added == 0 && p1 && p2) |
9150 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9151 | if (CURR_SLOT.qp_regno != 0) |
9152 | { | |
5e2f6673 L |
9153 | if (p1) |
9154 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9155 | if (p2) | |
9156 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9157 | } |
9158 | } | |
542d6675 KH |
9159 | } |
9160 | } | |
9161 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9162 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9163 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9164 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
9165 | && (strcmp (idesc->name, "mov") == 0 | |
9166 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9167 | { |
9168 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9169 | if (regno > 0 && regno < NELEMS (gr_values)) |
9170 | { | |
9171 | gr_values[regno].known = 1; | |
9172 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9173 | gr_values[regno].path = md.path; | |
9174 | if (md.debug_dv) | |
2434f565 JW |
9175 | { |
9176 | fprintf (stderr, " Know gr%d = ", regno); | |
9177 | fprintf_vma (stderr, gr_values[regno].value); | |
9178 | fputs ("\n", stderr); | |
9179 | } | |
542d6675 | 9180 | } |
800eeca4 | 9181 | } |
197865e8 | 9182 | else |
800eeca4 JW |
9183 | { |
9184 | clear_qp_mutex (qp_changemask); | |
9185 | clear_qp_implies (qp_changemask, qp_changemask); | |
9186 | } | |
9187 | } | |
9188 | ||
542d6675 KH |
9189 | /* Return whether the given predicate registers are currently mutex. */ |
9190 | ||
800eeca4 JW |
9191 | static int |
9192 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9193 | int p1; |
9194 | int p2; | |
9195 | int path; | |
800eeca4 JW |
9196 | { |
9197 | int i; | |
9198 | valueT mask; | |
9199 | ||
9200 | if (p1 != p2) | |
9201 | { | |
542d6675 KH |
9202 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9203 | for (i = 0; i < qp_mutexeslen; i++) | |
9204 | { | |
9205 | if (qp_mutexes[i].path >= path | |
9206 | && (qp_mutexes[i].prmask & mask) == mask) | |
9207 | return 1; | |
9208 | } | |
800eeca4 JW |
9209 | } |
9210 | return 0; | |
9211 | } | |
9212 | ||
9213 | /* Return whether the given resource is in the given insn's list of chks | |
9214 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9215 | conflict. */ |
9216 | ||
800eeca4 JW |
9217 | static int |
9218 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9219 | struct rsrc *rs; |
9220 | struct ia64_opcode *idesc; | |
9221 | int note; | |
9222 | int qp_regno; | |
9223 | int path; | |
800eeca4 JW |
9224 | { |
9225 | struct rsrc specs[MAX_SPECS]; | |
9226 | int count; | |
9227 | ||
9228 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9229 | we don't need to check. One exception is note 11, which indicates that | |
9230 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9231 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9232 | && note != 11) |
9233 | return 0; | |
9234 | ||
9235 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9236 | while (count-- > 0) | |
9237 | { | |
9238 | /* UNAT checking is a bit more specific than other resources */ | |
9239 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9240 | && specs[count].mem_offset.hint |
9241 | && rs->mem_offset.hint) | |
9242 | { | |
9243 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9244 | { | |
9245 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9246 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9247 | return 1; | |
9248 | else | |
9249 | continue; | |
9250 | } | |
9251 | } | |
800eeca4 | 9252 | |
7484b8e6 | 9253 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9254 | writes are an OR. */ |
7484b8e6 | 9255 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9256 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9257 | || rs->dependency->specifier == IA64_RS_PR63) |
9258 | { | |
9259 | if (specs[count].cmp_type != CMP_NONE | |
9260 | && specs[count].cmp_type == rs->cmp_type) | |
9261 | { | |
9262 | if (md.debug_dv) | |
9263 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9264 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9265 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9266 | specs[count].index : 63); |
9267 | continue; | |
9268 | } | |
9269 | if (md.debug_dv) | |
4a4f25cf | 9270 | fprintf (stderr, |
7484b8e6 TW |
9271 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9272 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9273 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9274 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9275 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9276 | specs[count].index : 63); |
4a4f25cf | 9277 | |
7484b8e6 TW |
9278 | } |
9279 | ||
800eeca4 | 9280 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9281 | */ |
800eeca4 | 9282 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9283 | return 2; |
800eeca4 | 9284 | else if (specs[count].index == rs->index) |
542d6675 | 9285 | return 1; |
800eeca4 JW |
9286 | } |
9287 | #if 0 | |
9288 | if (md.debug_dv) | |
9289 | fprintf (stderr, " No %s conflicts\n", rs->dependency->name); | |
9290 | #endif | |
9291 | ||
9292 | return 0; | |
9293 | } | |
9294 | ||
9295 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9296 | insert a stop to create the break. Update all resource dependencies | |
9297 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9298 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9299 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9300 | instruction. */ |
800eeca4 JW |
9301 | |
9302 | static void | |
9303 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
9304 | int insert_stop; |
9305 | int qp_regno; | |
9306 | int save_current; | |
800eeca4 JW |
9307 | { |
9308 | int i; | |
9309 | ||
9310 | if (insert_stop && md.num_slots_in_use > 0) | |
9311 | PREV_SLOT.end_of_insn_group = 1; | |
9312 | ||
9313 | if (md.debug_dv) | |
9314 | { | |
197865e8 | 9315 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9316 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9317 | if (qp_regno != 0) |
542d6675 | 9318 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9319 | fprintf (stderr, "\n"); |
9320 | } | |
9321 | ||
9322 | i = 0; | |
9323 | while (i < regdepslen) | |
9324 | { | |
9325 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9326 | ||
9327 | if (qp_regno != 0 | |
542d6675 KH |
9328 | && regdeps[i].qp_regno != qp_regno) |
9329 | { | |
9330 | ++i; | |
9331 | continue; | |
9332 | } | |
800eeca4 JW |
9333 | |
9334 | if (save_current | |
542d6675 KH |
9335 | && CURR_SLOT.src_file == regdeps[i].file |
9336 | && CURR_SLOT.src_line == regdeps[i].line) | |
9337 | { | |
9338 | ++i; | |
9339 | continue; | |
9340 | } | |
800eeca4 JW |
9341 | |
9342 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9343 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9344 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9345 | || dep->semantics == IA64_DVS_IMPLIEDF |
9346 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9347 | { | |
9348 | print_dependency ("Removing", i); | |
9349 | regdeps[i] = regdeps[--regdepslen]; | |
9350 | } | |
800eeca4 | 9351 | else |
542d6675 KH |
9352 | { |
9353 | if (dep->semantics == IA64_DVS_DATA | |
9354 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9355 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9356 | { |
9357 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9358 | regdeps[i].insn_srlz = STATE_STOP; | |
9359 | if (regdeps[i].data_srlz == STATE_NONE) | |
9360 | regdeps[i].data_srlz = STATE_STOP; | |
9361 | } | |
9362 | ++i; | |
9363 | } | |
800eeca4 JW |
9364 | } |
9365 | } | |
9366 | ||
542d6675 KH |
9367 | /* Add the given resource usage spec to the list of active dependencies. */ |
9368 | ||
197865e8 | 9369 | static void |
800eeca4 | 9370 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
9371 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
9372 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
9373 | struct rsrc *spec; |
9374 | int depind; | |
9375 | int path; | |
800eeca4 JW |
9376 | { |
9377 | if (regdepslen == regdepstotlen) | |
9378 | { | |
9379 | regdepstotlen += 20; | |
9380 | regdeps = (struct rsrc *) | |
542d6675 | 9381 | xrealloc ((void *) regdeps, |
bc805888 | 9382 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
9383 | } |
9384 | ||
9385 | regdeps[regdepslen] = *spec; | |
9386 | regdeps[regdepslen].depind = depind; | |
9387 | regdeps[regdepslen].path = path; | |
9388 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
9389 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
9390 | ||
9391 | print_dependency ("Adding", regdepslen); | |
9392 | ||
9393 | ++regdepslen; | |
9394 | } | |
9395 | ||
9396 | static void | |
9397 | print_dependency (action, depind) | |
542d6675 KH |
9398 | const char *action; |
9399 | int depind; | |
800eeca4 JW |
9400 | { |
9401 | if (md.debug_dv) | |
9402 | { | |
197865e8 | 9403 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
9404 | action, dv_mode[(regdeps[depind].dependency)->mode], |
9405 | (regdeps[depind].dependency)->name); | |
800eeca4 | 9406 | if (regdeps[depind].specific && regdeps[depind].index != 0) |
542d6675 | 9407 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 9408 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
9409 | { |
9410 | fputs (" ", stderr); | |
9411 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
9412 | fputs ("+", stderr); | |
9413 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
9414 | } | |
800eeca4 JW |
9415 | fprintf (stderr, "\n"); |
9416 | } | |
9417 | } | |
9418 | ||
9419 | static void | |
9420 | instruction_serialization () | |
9421 | { | |
9422 | int i; | |
9423 | if (md.debug_dv) | |
9424 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 9425 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
9426 | if (regdeps[i].insn_srlz == STATE_STOP) |
9427 | regdeps[i].insn_srlz = STATE_SRLZ; | |
9428 | } | |
9429 | ||
9430 | static void | |
9431 | data_serialization () | |
9432 | { | |
9433 | int i = 0; | |
9434 | if (md.debug_dv) | |
9435 | fprintf (stderr, " Data serialization\n"); | |
9436 | while (i < regdepslen) | |
9437 | { | |
9438 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
9439 | /* Note: as of 991210, all "other" dependencies are cleared by a |
9440 | data serialization. This might change with new tables */ | |
9441 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
9442 | { | |
9443 | print_dependency ("Removing", i); | |
9444 | regdeps[i] = regdeps[--regdepslen]; | |
9445 | } | |
800eeca4 | 9446 | else |
542d6675 | 9447 | ++i; |
800eeca4 JW |
9448 | } |
9449 | } | |
9450 | ||
542d6675 KH |
9451 | /* Insert stops and serializations as needed to avoid DVs. */ |
9452 | ||
800eeca4 JW |
9453 | static void |
9454 | remove_marked_resource (rs) | |
542d6675 | 9455 | struct rsrc *rs; |
800eeca4 JW |
9456 | { |
9457 | switch (rs->dependency->semantics) | |
9458 | { | |
9459 | case IA64_DVS_SPECIFIC: | |
9460 | if (md.debug_dv) | |
9461 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 9462 | /* ...fall through... */ |
800eeca4 JW |
9463 | case IA64_DVS_INSTR: |
9464 | if (md.debug_dv) | |
542d6675 | 9465 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 9466 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 9467 | insn_group_break (1, 0, 0); |
800eeca4 | 9468 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 KH |
9469 | { |
9470 | int oldqp = CURR_SLOT.qp_regno; | |
9471 | struct ia64_opcode *oldidesc = CURR_SLOT.idesc; | |
9472 | /* Manually jam a srlz.i insn into the stream */ | |
9473 | CURR_SLOT.qp_regno = 0; | |
9474 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); | |
9475 | instruction_serialization (); | |
9476 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9477 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9478 | emit_one_bundle (); | |
9479 | CURR_SLOT.qp_regno = oldqp; | |
9480 | CURR_SLOT.idesc = oldidesc; | |
9481 | } | |
800eeca4 JW |
9482 | insn_group_break (1, 0, 0); |
9483 | break; | |
9484 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
9485 | "other" types of DV are eliminated |
9486 | by a data serialization */ | |
800eeca4 JW |
9487 | case IA64_DVS_DATA: |
9488 | if (md.debug_dv) | |
542d6675 | 9489 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 9490 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 9491 | insn_group_break (1, 0, 0); |
800eeca4 | 9492 | { |
542d6675 KH |
9493 | int oldqp = CURR_SLOT.qp_regno; |
9494 | struct ia64_opcode *oldidesc = CURR_SLOT.idesc; | |
9495 | /* Manually jam a srlz.d insn into the stream */ | |
9496 | CURR_SLOT.qp_regno = 0; | |
9497 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); | |
9498 | data_serialization (); | |
9499 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9500 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9501 | emit_one_bundle (); | |
9502 | CURR_SLOT.qp_regno = oldqp; | |
9503 | CURR_SLOT.idesc = oldidesc; | |
800eeca4 JW |
9504 | } |
9505 | break; | |
9506 | case IA64_DVS_IMPLIED: | |
9507 | case IA64_DVS_IMPLIEDF: | |
9508 | if (md.debug_dv) | |
542d6675 | 9509 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
9510 | insn_group_break (1, 0, 0); |
9511 | break; | |
9512 | default: | |
9513 | break; | |
9514 | } | |
9515 | } | |
9516 | ||
9517 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 9518 | list. |
800eeca4 JW |
9519 | |
9520 | The check is run once for each execution path encountered. In this case, | |
9521 | a unique execution path is the sequence of instructions following a code | |
9522 | entry point, e.g. the following has three execution paths, one starting | |
9523 | at L0, one at L1, and one at L2. | |
197865e8 | 9524 | |
800eeca4 JW |
9525 | L0: nop |
9526 | L1: add | |
9527 | L2: add | |
197865e8 | 9528 | br.ret |
800eeca4 | 9529 | */ |
542d6675 | 9530 | |
800eeca4 JW |
9531 | static void |
9532 | check_dependencies (idesc) | |
542d6675 | 9533 | struct ia64_opcode *idesc; |
800eeca4 JW |
9534 | { |
9535 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9536 | int path; | |
9537 | int i; | |
9538 | ||
9539 | /* Note that the number of marked resources may change within the | |
197865e8 | 9540 | loop if in auto mode. */ |
800eeca4 JW |
9541 | i = 0; |
9542 | while (i < regdepslen) | |
9543 | { | |
9544 | struct rsrc *rs = ®deps[i]; | |
9545 | const struct ia64_dependency *dep = rs->dependency; | |
9546 | int chkind; | |
9547 | int note; | |
9548 | int start_over = 0; | |
9549 | ||
9550 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
9551 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
9552 | { | |
9553 | ++i; | |
9554 | continue; | |
9555 | } | |
9556 | ||
9557 | note = NOTE (opdeps->chks[chkind]); | |
9558 | ||
9559 | /* Check this resource against each execution path seen thus far. */ | |
9560 | for (path = 0; path <= md.path; path++) | |
9561 | { | |
9562 | int matchtype; | |
9563 | ||
9564 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
9565 | if (rs->path < path) | |
9566 | continue; | |
9567 | ||
9568 | /* If the QP for this insn implies a QP which has branched, don't | |
9569 | bother checking. Ed. NOTE: I don't think this check is terribly | |
9570 | useful; what's the point of generating code which will only be | |
9571 | reached if its QP is zero? | |
9572 | This code was specifically inserted to handle the following code, | |
9573 | based on notes from Intel's DV checking code, where p1 implies p2. | |
9574 | ||
9575 | mov r4 = 2 | |
9576 | (p2) br.cond L | |
9577 | (p1) mov r4 = 7 | |
9578 | */ | |
9579 | if (CURR_SLOT.qp_regno != 0) | |
9580 | { | |
9581 | int skip = 0; | |
9582 | int implies; | |
9583 | for (implies = 0; implies < qp_implieslen; implies++) | |
9584 | { | |
9585 | if (qp_implies[implies].path >= path | |
9586 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
9587 | && qp_implies[implies].p2_branched) | |
9588 | { | |
9589 | skip = 1; | |
9590 | break; | |
9591 | } | |
9592 | } | |
9593 | if (skip) | |
9594 | continue; | |
9595 | } | |
9596 | ||
9597 | if ((matchtype = resources_match (rs, idesc, note, | |
9598 | CURR_SLOT.qp_regno, path)) != 0) | |
9599 | { | |
9600 | char msg[1024]; | |
9601 | char pathmsg[256] = ""; | |
9602 | char indexmsg[256] = ""; | |
9603 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
9604 | ||
9605 | if (path != 0) | |
9606 | sprintf (pathmsg, " when entry is at label '%s'", | |
9607 | md.entry_labels[path - 1]); | |
9608 | if (rs->specific && rs->index != 0) | |
9609 | sprintf (indexmsg, ", specific resource number is %d", | |
9610 | rs->index); | |
9611 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
9612 | idesc->name, | |
9613 | (certain ? "violates" : "may violate"), | |
9614 | dv_mode[dep->mode], dep->name, | |
9615 | dv_sem[dep->semantics], | |
9616 | pathmsg, indexmsg); | |
9617 | ||
9618 | if (md.explicit_mode) | |
9619 | { | |
9620 | as_warn ("%s", msg); | |
9621 | if (path < md.path) | |
9622 | as_warn (_("Only the first path encountering the conflict " | |
9623 | "is reported")); | |
9624 | as_warn_where (rs->file, rs->line, | |
9625 | _("This is the location of the " | |
9626 | "conflicting usage")); | |
9627 | /* Don't bother checking other paths, to avoid duplicating | |
9628 | the same warning */ | |
9629 | break; | |
9630 | } | |
9631 | else | |
9632 | { | |
9633 | if (md.debug_dv) | |
9634 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
9635 | ||
9636 | remove_marked_resource (rs); | |
9637 | ||
9638 | /* since the set of dependencies has changed, start over */ | |
9639 | /* FIXME -- since we're removing dvs as we go, we | |
9640 | probably don't really need to start over... */ | |
9641 | start_over = 1; | |
9642 | break; | |
9643 | } | |
9644 | } | |
9645 | } | |
800eeca4 | 9646 | if (start_over) |
542d6675 | 9647 | i = 0; |
800eeca4 | 9648 | else |
542d6675 | 9649 | ++i; |
800eeca4 JW |
9650 | } |
9651 | } | |
9652 | ||
542d6675 KH |
9653 | /* Register new dependencies based on the given opcode. */ |
9654 | ||
800eeca4 JW |
9655 | static void |
9656 | mark_resources (idesc) | |
542d6675 | 9657 | struct ia64_opcode *idesc; |
800eeca4 JW |
9658 | { |
9659 | int i; | |
9660 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9661 | int add_only_qp_reads = 0; | |
9662 | ||
9663 | /* A conditional branch only uses its resources if it is taken; if it is | |
9664 | taken, we stop following that path. The other branch types effectively | |
9665 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 9666 | reads. */ |
800eeca4 JW |
9667 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
9668 | { | |
9669 | add_only_qp_reads = 1; | |
9670 | } | |
9671 | ||
9672 | if (md.debug_dv) | |
9673 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
9674 | ||
542d6675 | 9675 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
9676 | { |
9677 | const struct ia64_dependency *dep; | |
9678 | struct rsrc specs[MAX_SPECS]; | |
9679 | int note; | |
9680 | int path; | |
9681 | int count; | |
197865e8 | 9682 | |
800eeca4 | 9683 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 9684 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
9685 | |
9686 | if (add_only_qp_reads | |
542d6675 KH |
9687 | && !(dep->mode == IA64_DV_WAR |
9688 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 9689 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
9690 | || dep->specifier == IA64_RS_PR63))) |
9691 | continue; | |
800eeca4 JW |
9692 | |
9693 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
9694 | ||
9695 | #if 0 | |
9696 | if (md.debug_dv && !count) | |
542d6675 KH |
9697 | fprintf (stderr, " No %s %s usage found (path %d)\n", |
9698 | dv_mode[dep->mode], dep->name, md.path); | |
800eeca4 | 9699 | #endif |
197865e8 | 9700 | |
800eeca4 | 9701 | while (count-- > 0) |
542d6675 KH |
9702 | { |
9703 | mark_resource (idesc, dep, &specs[count], | |
9704 | DEP (opdeps->regs[i]), md.path); | |
9705 | } | |
800eeca4 JW |
9706 | |
9707 | /* The execution path may affect register values, which may in turn | |
542d6675 | 9708 | affect which indirect-access resources are accessed. */ |
800eeca4 | 9709 | switch (dep->specifier) |
542d6675 KH |
9710 | { |
9711 | default: | |
9712 | break; | |
9713 | case IA64_RS_CPUID: | |
9714 | case IA64_RS_DBR: | |
9715 | case IA64_RS_IBR: | |
800eeca4 | 9716 | case IA64_RS_MSR: |
542d6675 KH |
9717 | case IA64_RS_PKR: |
9718 | case IA64_RS_PMC: | |
9719 | case IA64_RS_PMD: | |
9720 | case IA64_RS_RR: | |
9721 | for (path = 0; path < md.path; path++) | |
9722 | { | |
9723 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
9724 | while (count-- > 0) | |
9725 | mark_resource (idesc, dep, &specs[count], | |
9726 | DEP (opdeps->regs[i]), path); | |
9727 | } | |
9728 | break; | |
9729 | } | |
9730 | } | |
9731 | } | |
9732 | ||
9733 | /* Remove dependencies when they no longer apply. */ | |
9734 | ||
800eeca4 JW |
9735 | static void |
9736 | update_dependencies (idesc) | |
542d6675 | 9737 | struct ia64_opcode *idesc; |
800eeca4 JW |
9738 | { |
9739 | int i; | |
9740 | ||
9741 | if (strcmp (idesc->name, "srlz.i") == 0) | |
9742 | { | |
9743 | instruction_serialization (); | |
9744 | } | |
9745 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
9746 | { | |
9747 | data_serialization (); | |
9748 | } | |
9749 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 9750 | || is_taken_branch (idesc)) |
800eeca4 | 9751 | { |
542d6675 KH |
9752 | /* Although technically the taken branch doesn't clear dependencies |
9753 | which require a srlz.[id], we don't follow the branch; the next | |
9754 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 9755 | regdepslen = 0; |
800eeca4 JW |
9756 | md.path = 0; |
9757 | } | |
9758 | else if (is_conditional_branch (idesc) | |
542d6675 | 9759 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
9760 | { |
9761 | int is_call = strstr (idesc->name, ".call") != NULL; | |
9762 | ||
542d6675 KH |
9763 | for (i = 0; i < qp_implieslen; i++) |
9764 | { | |
9765 | /* If the conditional branch's predicate is implied by the predicate | |
9766 | in an existing dependency, remove that dependency. */ | |
9767 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
9768 | { | |
9769 | int depind = 0; | |
9770 | /* Note that this implied predicate takes a branch so that if | |
9771 | a later insn generates a DV but its predicate implies this | |
9772 | one, we can avoid the false DV warning. */ | |
9773 | qp_implies[i].p2_branched = 1; | |
9774 | while (depind < regdepslen) | |
9775 | { | |
9776 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
9777 | { | |
9778 | print_dependency ("Removing", depind); | |
9779 | regdeps[depind] = regdeps[--regdepslen]; | |
9780 | } | |
9781 | else | |
9782 | ++depind; | |
9783 | } | |
9784 | } | |
9785 | } | |
800eeca4 | 9786 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
9787 | cleared, provided that the QP hasn't been modified between the |
9788 | marking instruction and the branch. */ | |
800eeca4 | 9789 | if (is_call) |
542d6675 KH |
9790 | { |
9791 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
9792 | } | |
800eeca4 | 9793 | else |
542d6675 KH |
9794 | { |
9795 | i = 0; | |
9796 | while (i < regdepslen) | |
9797 | { | |
9798 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
9799 | && regdeps[i].link_to_qp_branch | |
9800 | && (regdeps[i].file != CURR_SLOT.src_file | |
9801 | || regdeps[i].line != CURR_SLOT.src_line)) | |
9802 | { | |
9803 | /* Treat like a taken branch */ | |
9804 | print_dependency ("Removing", i); | |
9805 | regdeps[i] = regdeps[--regdepslen]; | |
9806 | } | |
9807 | else | |
9808 | ++i; | |
9809 | } | |
9810 | } | |
800eeca4 JW |
9811 | } |
9812 | } | |
9813 | ||
9814 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 9815 | |
800eeca4 JW |
9816 | static int |
9817 | check_dv (idesc) | |
542d6675 | 9818 | struct ia64_opcode *idesc; |
800eeca4 JW |
9819 | { |
9820 | if (md.debug_dv) | |
9821 | { | |
197865e8 | 9822 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
9823 | idesc->name, CURR_SLOT.src_line, |
9824 | idesc->dependencies->nchks, | |
9825 | idesc->dependencies->nregs); | |
800eeca4 JW |
9826 | } |
9827 | ||
197865e8 | 9828 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 9829 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 9830 | check against the specific resources used. */ |
800eeca4 JW |
9831 | check_dependencies (idesc); |
9832 | ||
542d6675 KH |
9833 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
9834 | then add them to the list of marked resources. */ | |
800eeca4 JW |
9835 | mark_resources (idesc); |
9836 | ||
9837 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
9838 | requirements for being cleared |
9839 | ||
800eeca4 JW |
9840 | Instruction serialization (insns separated by interruption, rfi, or |
9841 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
9842 | ||
9843 | Data serialization (instruction serialization, or writer + srlz.d + | |
9844 | reader, where writer and srlz.d are in separate groups) clears | |
9845 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
9846 | always be the case). | |
9847 | ||
9848 | Instruction group break (groups separated by stop, taken branch, | |
9849 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
9850 | */ | |
9851 | update_dependencies (idesc); | |
9852 | ||
9853 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 9854 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
9855 | note_register_values (idesc); |
9856 | ||
197865e8 | 9857 | /* We don't need or want this anymore. */ |
800eeca4 JW |
9858 | md.mem_offset.hint = 0; |
9859 | ||
9860 | return 0; | |
9861 | } | |
9862 | ||
9863 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
9864 | here. */ | |
9865 | void | |
9866 | md_assemble (str) | |
9867 | char *str; | |
9868 | { | |
9869 | char *saved_input_line_pointer, *mnemonic; | |
9870 | const struct pseudo_opcode *pdesc; | |
9871 | struct ia64_opcode *idesc; | |
9872 | unsigned char qp_regno; | |
9873 | unsigned int flags; | |
9874 | int ch; | |
9875 | ||
9876 | saved_input_line_pointer = input_line_pointer; | |
9877 | input_line_pointer = str; | |
9878 | ||
542d6675 | 9879 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
9880 | |
9881 | mnemonic = input_line_pointer; | |
9882 | ch = get_symbol_end (); | |
9883 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
9884 | if (pdesc) | |
9885 | { | |
9886 | *input_line_pointer = ch; | |
9887 | (*pdesc->handler) (pdesc->arg); | |
9888 | goto done; | |
9889 | } | |
9890 | ||
542d6675 | 9891 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
9892 | |
9893 | idesc = ia64_find_opcode (mnemonic); | |
9894 | *input_line_pointer = ch; | |
9895 | if (!idesc) | |
9896 | { | |
9897 | as_bad ("Unknown opcode `%s'", mnemonic); | |
9898 | goto done; | |
9899 | } | |
9900 | ||
9901 | idesc = parse_operands (idesc); | |
9902 | if (!idesc) | |
9903 | goto done; | |
9904 | ||
542d6675 | 9905 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
9906 | if (idesc->type == IA64_TYPE_DYN) |
9907 | { | |
9908 | if (strcmp (idesc->name, "add") == 0) | |
9909 | { | |
9910 | if (CURR_SLOT.opnd[2].X_op == O_register | |
9911 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
9912 | mnemonic = "addl"; | |
9913 | else | |
9914 | mnemonic = "adds"; | |
3d56ab85 | 9915 | ia64_free_opcode (idesc); |
800eeca4 JW |
9916 | idesc = ia64_find_opcode (mnemonic); |
9917 | #if 0 | |
9918 | know (!idesc->next); | |
9919 | #endif | |
9920 | } | |
9921 | else if (strcmp (idesc->name, "mov") == 0) | |
9922 | { | |
9923 | enum ia64_opnd opnd1, opnd2; | |
9924 | int rop; | |
9925 | ||
9926 | opnd1 = idesc->operands[0]; | |
9927 | opnd2 = idesc->operands[1]; | |
9928 | if (opnd1 == IA64_OPND_AR3) | |
9929 | rop = 0; | |
9930 | else if (opnd2 == IA64_OPND_AR3) | |
9931 | rop = 1; | |
9932 | else | |
9933 | abort (); | |
9934 | if (CURR_SLOT.opnd[rop].X_op == O_register | |
9935 | && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
9936 | mnemonic = "mov.i"; | |
9937 | else | |
9938 | mnemonic = "mov.m"; | |
3d56ab85 | 9939 | ia64_free_opcode (idesc); |
800eeca4 JW |
9940 | idesc = ia64_find_opcode (mnemonic); |
9941 | while (idesc != NULL | |
9942 | && (idesc->operands[0] != opnd1 | |
9943 | || idesc->operands[1] != opnd2)) | |
9944 | idesc = get_next_opcode (idesc); | |
9945 | } | |
9946 | } | |
9947 | ||
9948 | qp_regno = 0; | |
9949 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
9950 | { |
9951 | qp_regno = md.qp.X_add_number - REG_P; | |
9952 | md.qp.X_op = O_absent; | |
9953 | } | |
800eeca4 JW |
9954 | |
9955 | flags = idesc->flags; | |
9956 | ||
9957 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9958 | insn_group_break (1, 0, 0); | |
9959 | ||
9960 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
9961 | { | |
9962 | as_bad ("`%s' cannot be predicated", idesc->name); | |
9963 | goto done; | |
9964 | } | |
9965 | ||
542d6675 | 9966 | /* Build the instruction. */ |
800eeca4 JW |
9967 | CURR_SLOT.qp_regno = qp_regno; |
9968 | CURR_SLOT.idesc = idesc; | |
9969 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 9970 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
9971 | |
9972 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 9973 | if (unwind.current_entry) |
800eeca4 | 9974 | { |
e0c9811a JW |
9975 | CURR_SLOT.unwind_record = unwind.current_entry; |
9976 | unwind.current_entry = NULL; | |
800eeca4 JW |
9977 | } |
9978 | ||
542d6675 | 9979 | /* Check for dependency violations. */ |
800eeca4 | 9980 | if (md.detect_dv) |
542d6675 | 9981 | check_dv (idesc); |
800eeca4 JW |
9982 | |
9983 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9984 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9985 | emit_one_bundle (); | |
9986 | ||
9987 | if ((flags & IA64_OPCODE_LAST) != 0) | |
9988 | insn_group_break (1, 0, 0); | |
9989 | ||
9990 | md.last_text_seg = now_seg; | |
9991 | ||
9992 | done: | |
9993 | input_line_pointer = saved_input_line_pointer; | |
9994 | } | |
9995 | ||
9996 | /* Called when symbol NAME cannot be found in the symbol table. | |
9997 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
9998 | |
9999 | symbolS * | |
800eeca4 | 10000 | md_undefined_symbol (name) |
2434f565 | 10001 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10002 | { |
10003 | return 0; | |
10004 | } | |
10005 | ||
10006 | /* Called for any expression that can not be recognized. When the | |
10007 | function is called, `input_line_pointer' will point to the start of | |
10008 | the expression. */ | |
542d6675 | 10009 | |
800eeca4 JW |
10010 | void |
10011 | md_operand (e) | |
10012 | expressionS *e; | |
10013 | { | |
10014 | enum pseudo_type pseudo_type; | |
e0c9811a | 10015 | const char *name; |
800eeca4 JW |
10016 | size_t len; |
10017 | int ch, i; | |
10018 | ||
10019 | switch (*input_line_pointer) | |
10020 | { | |
10021 | case '@': | |
542d6675 | 10022 | /* Find what relocation pseudo-function we're dealing with. */ |
800eeca4 JW |
10023 | pseudo_type = 0; |
10024 | ch = *++input_line_pointer; | |
10025 | for (i = 0; i < NELEMS (pseudo_func); ++i) | |
10026 | if (pseudo_func[i].name && pseudo_func[i].name[0] == ch) | |
10027 | { | |
10028 | len = strlen (pseudo_func[i].name); | |
10029 | if (strncmp (pseudo_func[i].name + 1, | |
10030 | input_line_pointer + 1, len - 1) == 0 | |
10031 | && !is_part_of_name (input_line_pointer[len])) | |
10032 | { | |
10033 | input_line_pointer += len; | |
10034 | pseudo_type = pseudo_func[i].type; | |
10035 | break; | |
10036 | } | |
10037 | } | |
10038 | switch (pseudo_type) | |
10039 | { | |
10040 | case PSEUDO_FUNC_RELOC: | |
10041 | SKIP_WHITESPACE (); | |
10042 | if (*input_line_pointer != '(') | |
10043 | { | |
10044 | as_bad ("Expected '('"); | |
10045 | goto err; | |
10046 | } | |
542d6675 KH |
10047 | /* Skip '('. */ |
10048 | ++input_line_pointer; | |
800eeca4 JW |
10049 | expression (e); |
10050 | if (*input_line_pointer++ != ')') | |
10051 | { | |
10052 | as_bad ("Missing ')'"); | |
10053 | goto err; | |
10054 | } | |
10055 | if (e->X_op != O_symbol) | |
10056 | { | |
10057 | if (e->X_op != O_pseudo_fixup) | |
10058 | { | |
10059 | as_bad ("Not a symbolic expression"); | |
10060 | goto err; | |
10061 | } | |
13ae64f3 JJ |
10062 | if (i != FUNC_LT_RELATIVE) |
10063 | { | |
10064 | as_bad ("Illegal combination of relocation functions"); | |
10065 | goto err; | |
10066 | } | |
10067 | switch (S_GET_VALUE (e->X_op_symbol)) | |
800eeca4 | 10068 | { |
13ae64f3 JJ |
10069 | case FUNC_FPTR_RELATIVE: |
10070 | i = FUNC_LT_FPTR_RELATIVE; break; | |
10071 | case FUNC_DTP_MODULE: | |
10072 | i = FUNC_LT_DTP_MODULE; break; | |
10073 | case FUNC_DTP_RELATIVE: | |
10074 | i = FUNC_LT_DTP_RELATIVE; break; | |
10075 | case FUNC_TP_RELATIVE: | |
10076 | i = FUNC_LT_TP_RELATIVE; break; | |
10077 | default: | |
800eeca4 JW |
10078 | as_bad ("Illegal combination of relocation functions"); |
10079 | goto err; | |
10080 | } | |
10081 | } | |
542d6675 KH |
10082 | /* Make sure gas doesn't get rid of local symbols that are used |
10083 | in relocs. */ | |
800eeca4 JW |
10084 | e->X_op = O_pseudo_fixup; |
10085 | e->X_op_symbol = pseudo_func[i].u.sym; | |
10086 | break; | |
10087 | ||
10088 | case PSEUDO_FUNC_CONST: | |
10089 | e->X_op = O_constant; | |
10090 | e->X_add_number = pseudo_func[i].u.ival; | |
10091 | break; | |
10092 | ||
e0c9811a JW |
10093 | case PSEUDO_FUNC_REG: |
10094 | e->X_op = O_register; | |
10095 | e->X_add_number = pseudo_func[i].u.ival; | |
10096 | break; | |
10097 | ||
800eeca4 | 10098 | default: |
e0c9811a JW |
10099 | name = input_line_pointer - 1; |
10100 | get_symbol_end (); | |
10101 | as_bad ("Unknown pseudo function `%s'", name); | |
800eeca4 JW |
10102 | goto err; |
10103 | } | |
10104 | break; | |
10105 | ||
10106 | case '[': | |
10107 | ++input_line_pointer; | |
10108 | expression (e); | |
10109 | if (*input_line_pointer != ']') | |
10110 | { | |
10111 | as_bad ("Closing bracket misssing"); | |
10112 | goto err; | |
10113 | } | |
10114 | else | |
10115 | { | |
10116 | if (e->X_op != O_register) | |
10117 | as_bad ("Register expected as index"); | |
10118 | ||
10119 | ++input_line_pointer; | |
10120 | e->X_op = O_index; | |
10121 | } | |
10122 | break; | |
10123 | ||
10124 | default: | |
10125 | break; | |
10126 | } | |
10127 | return; | |
10128 | ||
10129 | err: | |
10130 | ignore_rest_of_line (); | |
10131 | } | |
10132 | ||
10133 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10134 | a section symbol plus some offset. For relocs involving @fptr(), | |
10135 | directives we don't want such adjustments since we need to have the | |
10136 | original symbol's name in the reloc. */ | |
10137 | int | |
10138 | ia64_fix_adjustable (fix) | |
10139 | fixS *fix; | |
10140 | { | |
10141 | /* Prevent all adjustments to global symbols */ | |
10142 | if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) | |
10143 | return 0; | |
10144 | ||
10145 | switch (fix->fx_r_type) | |
10146 | { | |
10147 | case BFD_RELOC_IA64_FPTR64I: | |
10148 | case BFD_RELOC_IA64_FPTR32MSB: | |
10149 | case BFD_RELOC_IA64_FPTR32LSB: | |
10150 | case BFD_RELOC_IA64_FPTR64MSB: | |
10151 | case BFD_RELOC_IA64_FPTR64LSB: | |
10152 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10153 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10154 | return 0; | |
10155 | default: | |
10156 | break; | |
10157 | } | |
10158 | ||
10159 | return 1; | |
10160 | } | |
10161 | ||
10162 | int | |
10163 | ia64_force_relocation (fix) | |
10164 | fixS *fix; | |
10165 | { | |
10166 | switch (fix->fx_r_type) | |
10167 | { | |
10168 | case BFD_RELOC_IA64_FPTR64I: | |
10169 | case BFD_RELOC_IA64_FPTR32MSB: | |
10170 | case BFD_RELOC_IA64_FPTR32LSB: | |
10171 | case BFD_RELOC_IA64_FPTR64MSB: | |
10172 | case BFD_RELOC_IA64_FPTR64LSB: | |
10173 | ||
10174 | case BFD_RELOC_IA64_LTOFF22: | |
10175 | case BFD_RELOC_IA64_LTOFF64I: | |
10176 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10177 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10178 | case BFD_RELOC_IA64_PLTOFF22: | |
10179 | case BFD_RELOC_IA64_PLTOFF64I: | |
10180 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10181 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10182 | |
10183 | case BFD_RELOC_IA64_LTOFF22X: | |
10184 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10185 | return 1; |
10186 | ||
10187 | default: | |
a161fe53 | 10188 | break; |
800eeca4 | 10189 | } |
a161fe53 | 10190 | |
ae6063d4 | 10191 | return generic_force_reloc (fix); |
800eeca4 JW |
10192 | } |
10193 | ||
10194 | /* Decide from what point a pc-relative relocation is relative to, | |
10195 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10196 | long | |
10197 | ia64_pcrel_from_section (fix, sec) | |
10198 | fixS *fix; | |
10199 | segT sec; | |
10200 | { | |
10201 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10202 | |
800eeca4 JW |
10203 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10204 | off &= ~0xfUL; | |
10205 | ||
10206 | return off; | |
10207 | } | |
10208 | ||
6174d9c8 RH |
10209 | |
10210 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10211 | void | |
10212 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10213 | { | |
10214 | expressionS expr; | |
10215 | ||
10216 | expr.X_op = O_pseudo_fixup; | |
10217 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10218 | expr.X_add_number = 0; | |
10219 | expr.X_add_symbol = symbol; | |
10220 | emit_expr (&expr, size); | |
10221 | } | |
10222 | ||
800eeca4 JW |
10223 | /* This is called whenever some data item (not an instruction) needs a |
10224 | fixup. We pick the right reloc code depending on the byteorder | |
10225 | currently in effect. */ | |
10226 | void | |
10227 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10228 | fragS *f; | |
10229 | int where; | |
10230 | int nbytes; | |
10231 | expressionS *exp; | |
10232 | { | |
10233 | bfd_reloc_code_real_type code; | |
10234 | fixS *fix; | |
10235 | ||
10236 | switch (nbytes) | |
10237 | { | |
10238 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10239 | them here since they will work fine as long as the expression | |
10240 | is fully defined at the end of the pass over the source file. */ | |
10241 | case 1: code = BFD_RELOC_8; break; | |
10242 | case 2: code = BFD_RELOC_16; break; | |
10243 | case 4: | |
10244 | if (target_big_endian) | |
10245 | code = BFD_RELOC_IA64_DIR32MSB; | |
10246 | else | |
10247 | code = BFD_RELOC_IA64_DIR32LSB; | |
10248 | break; | |
10249 | ||
10250 | case 8: | |
40449e9f | 10251 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10252 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10253 | && exp->X_op_symbol |
10254 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10255 | && !(md.flags & EF_IA_64_ABI64)) | |
10256 | { | |
10257 | if (target_big_endian) | |
10258 | code = BFD_RELOC_IA64_IPLTMSB; | |
10259 | else | |
10260 | code = BFD_RELOC_IA64_IPLTLSB; | |
10261 | exp->X_op = O_symbol; | |
10262 | break; | |
10263 | } | |
10264 | else | |
10265 | { | |
10266 | if (target_big_endian) | |
10267 | code = BFD_RELOC_IA64_DIR64MSB; | |
10268 | else | |
10269 | code = BFD_RELOC_IA64_DIR64LSB; | |
10270 | break; | |
10271 | } | |
800eeca4 | 10272 | |
3969b680 RH |
10273 | case 16: |
10274 | if (exp->X_op == O_pseudo_fixup | |
10275 | && exp->X_op_symbol | |
10276 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10277 | { | |
10278 | if (target_big_endian) | |
10279 | code = BFD_RELOC_IA64_IPLTMSB; | |
10280 | else | |
10281 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10282 | exp->X_op = O_symbol; |
10283 | break; | |
10284 | } | |
10285 | /* FALLTHRU */ | |
10286 | ||
800eeca4 JW |
10287 | default: |
10288 | as_bad ("Unsupported fixup size %d", nbytes); | |
10289 | ignore_rest_of_line (); | |
10290 | return; | |
10291 | } | |
6174d9c8 | 10292 | |
800eeca4 JW |
10293 | if (exp->X_op == O_pseudo_fixup) |
10294 | { | |
800eeca4 JW |
10295 | exp->X_op = O_symbol; |
10296 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10297 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10298 | } |
3969b680 | 10299 | |
800eeca4 JW |
10300 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10301 | /* We need to store the byte order in effect in case we're going | |
10302 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 10303 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
10304 | fix->tc_fix_data.bigendian = target_big_endian; |
10305 | } | |
10306 | ||
10307 | /* Return the actual relocation we wish to associate with the pseudo | |
10308 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10309 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10310 | |
10311 | static bfd_reloc_code_real_type | |
10312 | ia64_gen_real_reloc_type (sym, r_type) | |
10313 | struct symbol *sym; | |
10314 | bfd_reloc_code_real_type r_type; | |
10315 | { | |
10316 | bfd_reloc_code_real_type new = 0; | |
10317 | ||
10318 | if (sym == NULL) | |
10319 | { | |
10320 | return r_type; | |
10321 | } | |
10322 | ||
10323 | switch (S_GET_VALUE (sym)) | |
10324 | { | |
10325 | case FUNC_FPTR_RELATIVE: | |
10326 | switch (r_type) | |
10327 | { | |
10328 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
10329 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
10330 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
10331 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
10332 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
10333 | default: break; | |
10334 | } | |
10335 | break; | |
10336 | ||
10337 | case FUNC_GP_RELATIVE: | |
10338 | switch (r_type) | |
10339 | { | |
10340 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
10341 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
10342 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
10343 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
10344 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
10345 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
10346 | default: break; | |
10347 | } | |
10348 | break; | |
10349 | ||
10350 | case FUNC_LT_RELATIVE: | |
10351 | switch (r_type) | |
10352 | { | |
10353 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
10354 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
10355 | default: break; | |
10356 | } | |
10357 | break; | |
10358 | ||
fa2c7eff RH |
10359 | case FUNC_LT_RELATIVE_X: |
10360 | switch (r_type) | |
10361 | { | |
10362 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
10363 | default: break; | |
10364 | } | |
10365 | break; | |
10366 | ||
c67e42c9 RH |
10367 | case FUNC_PC_RELATIVE: |
10368 | switch (r_type) | |
10369 | { | |
10370 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
10371 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
10372 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
10373 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
10374 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
10375 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
10376 | default: break; | |
10377 | } | |
10378 | break; | |
10379 | ||
800eeca4 JW |
10380 | case FUNC_PLT_RELATIVE: |
10381 | switch (r_type) | |
10382 | { | |
10383 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
10384 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
10385 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10386 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
10387 | default: break; | |
10388 | } | |
10389 | break; | |
10390 | ||
10391 | case FUNC_SEC_RELATIVE: | |
10392 | switch (r_type) | |
10393 | { | |
10394 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
10395 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
10396 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
10397 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
10398 | default: break; | |
10399 | } | |
10400 | break; | |
10401 | ||
10402 | case FUNC_SEG_RELATIVE: | |
10403 | switch (r_type) | |
10404 | { | |
10405 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
10406 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
10407 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
10408 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
10409 | default: break; | |
10410 | } | |
10411 | break; | |
10412 | ||
10413 | case FUNC_LTV_RELATIVE: | |
10414 | switch (r_type) | |
10415 | { | |
10416 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
10417 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
10418 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
10419 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
10420 | default: break; | |
10421 | } | |
10422 | break; | |
10423 | ||
10424 | case FUNC_LT_FPTR_RELATIVE: | |
10425 | switch (r_type) | |
10426 | { | |
10427 | case BFD_RELOC_IA64_IMM22: | |
10428 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
10429 | case BFD_RELOC_IA64_IMM64: | |
10430 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
10431 | default: | |
10432 | break; | |
10433 | } | |
10434 | break; | |
3969b680 | 10435 | |
13ae64f3 JJ |
10436 | case FUNC_TP_RELATIVE: |
10437 | switch (r_type) | |
10438 | { | |
10439 | case BFD_RELOC_IA64_IMM14: | |
10440 | new = BFD_RELOC_IA64_TPREL14; break; | |
10441 | case BFD_RELOC_IA64_IMM22: | |
10442 | new = BFD_RELOC_IA64_TPREL22; break; | |
10443 | case BFD_RELOC_IA64_IMM64: | |
10444 | new = BFD_RELOC_IA64_TPREL64I; break; | |
10445 | default: | |
10446 | break; | |
10447 | } | |
10448 | break; | |
10449 | ||
10450 | case FUNC_LT_TP_RELATIVE: | |
10451 | switch (r_type) | |
10452 | { | |
10453 | case BFD_RELOC_IA64_IMM22: | |
10454 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
10455 | default: | |
10456 | break; | |
10457 | } | |
10458 | break; | |
10459 | ||
10460 | case FUNC_LT_DTP_MODULE: | |
10461 | switch (r_type) | |
10462 | { | |
10463 | case BFD_RELOC_IA64_IMM22: | |
10464 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
10465 | default: | |
10466 | break; | |
10467 | } | |
10468 | break; | |
10469 | ||
10470 | case FUNC_DTP_RELATIVE: | |
10471 | switch (r_type) | |
10472 | { | |
6174d9c8 RH |
10473 | case BFD_RELOC_IA64_DIR64MSB: |
10474 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
10475 | case BFD_RELOC_IA64_DIR64LSB: | |
10476 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
10477 | case BFD_RELOC_IA64_IMM14: |
10478 | new = BFD_RELOC_IA64_DTPREL14; break; | |
10479 | case BFD_RELOC_IA64_IMM22: | |
10480 | new = BFD_RELOC_IA64_DTPREL22; break; | |
10481 | case BFD_RELOC_IA64_IMM64: | |
10482 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
10483 | default: | |
10484 | break; | |
10485 | } | |
10486 | break; | |
10487 | ||
10488 | case FUNC_LT_DTP_RELATIVE: | |
10489 | switch (r_type) | |
10490 | { | |
10491 | case BFD_RELOC_IA64_IMM22: | |
10492 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
10493 | default: | |
10494 | break; | |
10495 | } | |
10496 | break; | |
10497 | ||
40449e9f KH |
10498 | case FUNC_IPLT_RELOC: |
10499 | break; | |
1cd8ff38 | 10500 | |
800eeca4 JW |
10501 | default: |
10502 | abort (); | |
10503 | } | |
6174d9c8 | 10504 | |
800eeca4 JW |
10505 | /* Hmmmm. Should this ever occur? */ |
10506 | if (new) | |
10507 | return new; | |
10508 | else | |
10509 | return r_type; | |
10510 | } | |
10511 | ||
10512 | /* Here is where generate the appropriate reloc for pseudo relocation | |
10513 | functions. */ | |
10514 | void | |
10515 | ia64_validate_fix (fix) | |
10516 | fixS *fix; | |
10517 | { | |
10518 | switch (fix->fx_r_type) | |
10519 | { | |
10520 | case BFD_RELOC_IA64_FPTR64I: | |
10521 | case BFD_RELOC_IA64_FPTR32MSB: | |
10522 | case BFD_RELOC_IA64_FPTR64LSB: | |
10523 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10524 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10525 | if (fix->fx_offset != 0) | |
10526 | as_bad_where (fix->fx_file, fix->fx_line, | |
10527 | "No addend allowed in @fptr() relocation"); | |
10528 | break; | |
10529 | default: | |
10530 | break; | |
10531 | } | |
800eeca4 JW |
10532 | } |
10533 | ||
10534 | static void | |
10535 | fix_insn (fix, odesc, value) | |
10536 | fixS *fix; | |
10537 | const struct ia64_operand *odesc; | |
10538 | valueT value; | |
10539 | { | |
10540 | bfd_vma insn[3], t0, t1, control_bits; | |
10541 | const char *err; | |
10542 | char *fixpos; | |
10543 | long slot; | |
10544 | ||
10545 | slot = fix->fx_where & 0x3; | |
10546 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
10547 | ||
c67e42c9 | 10548 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
10549 | t0 = bfd_getl64 (fixpos); |
10550 | t1 = bfd_getl64 (fixpos + 8); | |
10551 | control_bits = t0 & 0x1f; | |
10552 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
10553 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
10554 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
10555 | ||
c67e42c9 RH |
10556 | err = NULL; |
10557 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 10558 | { |
c67e42c9 RH |
10559 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
10560 | insn[2] |= (((value & 0x7f) << 13) | |
10561 | | (((value >> 7) & 0x1ff) << 27) | |
10562 | | (((value >> 16) & 0x1f) << 22) | |
10563 | | (((value >> 21) & 0x1) << 21) | |
10564 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 10565 | } |
c67e42c9 RH |
10566 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
10567 | { | |
10568 | if (value & ~0x3fffffffffffffffULL) | |
10569 | err = "integer operand out of range"; | |
10570 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
10571 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
10572 | } | |
10573 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
10574 | { | |
10575 | value >>= 4; | |
10576 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
10577 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
10578 | | (((value >> 0) & 0xfffff) << 13)); | |
10579 | } | |
10580 | else | |
10581 | err = (*odesc->insert) (odesc, value, insn + slot); | |
10582 | ||
10583 | if (err) | |
10584 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
10585 | |
10586 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
10587 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
10588 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
10589 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
10590 | } |
10591 | ||
10592 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
10593 | ignored; perhaps it was once meaningful, but now it is historical. | |
10594 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
10595 | ||
10596 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 10597 | (if possible). */ |
94f592af NC |
10598 | |
10599 | void | |
10600 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 10601 | fixS *fix; |
40449e9f | 10602 | valueT *valP; |
2434f565 | 10603 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
10604 | { |
10605 | char *fixpos; | |
40449e9f | 10606 | valueT value = *valP; |
800eeca4 JW |
10607 | |
10608 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
10609 | ||
10610 | if (fix->fx_pcrel) | |
10611 | { | |
10612 | switch (fix->fx_r_type) | |
10613 | { | |
10614 | case BFD_RELOC_IA64_DIR32MSB: | |
10615 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB; | |
800eeca4 JW |
10616 | break; |
10617 | ||
10618 | case BFD_RELOC_IA64_DIR32LSB: | |
10619 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB; | |
800eeca4 JW |
10620 | break; |
10621 | ||
10622 | case BFD_RELOC_IA64_DIR64MSB: | |
10623 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB; | |
800eeca4 JW |
10624 | break; |
10625 | ||
10626 | case BFD_RELOC_IA64_DIR64LSB: | |
10627 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB; | |
800eeca4 JW |
10628 | break; |
10629 | ||
10630 | default: | |
10631 | break; | |
10632 | } | |
10633 | } | |
10634 | if (fix->fx_addsy) | |
10635 | { | |
00f7efb6 | 10636 | switch (fix->fx_r_type) |
800eeca4 | 10637 | { |
00f7efb6 | 10638 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
10639 | /* This must be a TAG13 or TAG13b operand. There are no external |
10640 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
10641 | as_bad_where (fix->fx_file, fix->fx_line, |
10642 | "%s must have a constant value", | |
10643 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 10644 | fix->fx_done = 1; |
94f592af | 10645 | return; |
00f7efb6 JJ |
10646 | |
10647 | case BFD_RELOC_IA64_TPREL14: | |
10648 | case BFD_RELOC_IA64_TPREL22: | |
10649 | case BFD_RELOC_IA64_TPREL64I: | |
10650 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
10651 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
10652 | case BFD_RELOC_IA64_DTPREL14: | |
10653 | case BFD_RELOC_IA64_DTPREL22: | |
10654 | case BFD_RELOC_IA64_DTPREL64I: | |
10655 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
10656 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
10657 | break; | |
7925dd68 JJ |
10658 | |
10659 | default: | |
10660 | break; | |
800eeca4 | 10661 | } |
800eeca4 JW |
10662 | } |
10663 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
10664 | { | |
10665 | if (fix->tc_fix_data.bigendian) | |
10666 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
10667 | else | |
10668 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
10669 | fix->fx_done = 1; | |
800eeca4 JW |
10670 | } |
10671 | else | |
10672 | { | |
10673 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
10674 | fix->fx_done = 1; | |
800eeca4 | 10675 | } |
800eeca4 JW |
10676 | } |
10677 | ||
10678 | /* Generate the BFD reloc to be stuck in the object file from the | |
10679 | fixup used internally in the assembler. */ | |
542d6675 KH |
10680 | |
10681 | arelent * | |
800eeca4 | 10682 | tc_gen_reloc (sec, fixp) |
2434f565 | 10683 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
10684 | fixS *fixp; |
10685 | { | |
10686 | arelent *reloc; | |
10687 | ||
10688 | reloc = xmalloc (sizeof (*reloc)); | |
10689 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
10690 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
10691 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
10692 | reloc->addend = fixp->fx_offset; | |
10693 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
10694 | ||
10695 | if (!reloc->howto) | |
10696 | { | |
10697 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
10698 | "Cannot represent %s relocation in object file", | |
10699 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
10700 | } | |
10701 | return reloc; | |
10702 | } | |
10703 | ||
10704 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
10705 | of type TYPE, and store the appropriate bytes in *LIT. The number |
10706 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
10707 | returned, or NULL on OK. */ |
10708 | ||
10709 | #define MAX_LITTLENUMS 5 | |
10710 | ||
542d6675 | 10711 | char * |
800eeca4 JW |
10712 | md_atof (type, lit, size) |
10713 | int type; | |
10714 | char *lit; | |
10715 | int *size; | |
10716 | { | |
10717 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
10718 | char *t; |
10719 | int prec; | |
10720 | ||
10721 | switch (type) | |
10722 | { | |
10723 | /* IEEE floats */ | |
10724 | case 'f': | |
10725 | case 'F': | |
10726 | case 's': | |
10727 | case 'S': | |
10728 | prec = 2; | |
10729 | break; | |
10730 | ||
10731 | case 'd': | |
10732 | case 'D': | |
10733 | case 'r': | |
10734 | case 'R': | |
10735 | prec = 4; | |
10736 | break; | |
10737 | ||
10738 | case 'x': | |
10739 | case 'X': | |
10740 | case 'p': | |
10741 | case 'P': | |
10742 | prec = 5; | |
10743 | break; | |
10744 | ||
10745 | default: | |
10746 | *size = 0; | |
10747 | return "Bad call to MD_ATOF()"; | |
10748 | } | |
10749 | t = atof_ieee (input_line_pointer, type, words); | |
10750 | if (t) | |
10751 | input_line_pointer = t; | |
800eeca4 | 10752 | |
10a98291 L |
10753 | (*ia64_float_to_chars) (lit, words, prec); |
10754 | ||
165a7f90 L |
10755 | if (type == 'X') |
10756 | { | |
10757 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 10758 | memset (&lit [10], 0, 6); |
165a7f90 L |
10759 | *size = 8 * sizeof (LITTLENUM_TYPE); |
10760 | } | |
10a98291 L |
10761 | else |
10762 | *size = prec * sizeof (LITTLENUM_TYPE); | |
10763 | ||
800eeca4 JW |
10764 | return 0; |
10765 | } | |
10766 | ||
800eeca4 JW |
10767 | /* Handle ia64 specific semantics of the align directive. */ |
10768 | ||
0a9ef439 | 10769 | void |
800eeca4 | 10770 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
10771 | int n ATTRIBUTE_UNUSED; |
10772 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 10773 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 10774 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 10775 | { |
0a9ef439 | 10776 | if (subseg_text_p (now_seg)) |
800eeca4 | 10777 | ia64_flush_insns (); |
0a9ef439 | 10778 | } |
800eeca4 | 10779 | |
0a9ef439 RH |
10780 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
10781 | of an rs_align_code fragment. */ | |
800eeca4 | 10782 | |
0a9ef439 RH |
10783 | void |
10784 | ia64_handle_align (fragp) | |
10785 | fragS *fragp; | |
10786 | { | |
10787 | /* Use mfi bundle of nops with no stop bits. */ | |
0a9ef439 RH |
10788 | static const unsigned char le_nop[] |
10789 | = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
10790 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
10791 | ||
10792 | int bytes; | |
10793 | char *p; | |
10794 | ||
10795 | if (fragp->fr_type != rs_align_code) | |
10796 | return; | |
10797 | ||
10798 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; | |
10799 | p = fragp->fr_literal + fragp->fr_fix; | |
10800 | ||
10801 | /* Make sure we are on a 16-byte boundary, in case someone has been | |
10802 | putting data into a text section. */ | |
10803 | if (bytes & 15) | |
10804 | { | |
10805 | int fix = bytes & 15; | |
10806 | memset (p, 0, fix); | |
10807 | p += fix; | |
10808 | bytes -= fix; | |
10809 | fragp->fr_fix += fix; | |
800eeca4 JW |
10810 | } |
10811 | ||
012a452b AM |
10812 | /* Instruction bundles are always little-endian. */ |
10813 | memcpy (p, le_nop, 16); | |
0a9ef439 | 10814 | fragp->fr_var = 16; |
800eeca4 | 10815 | } |
10a98291 L |
10816 | |
10817 | static void | |
10818 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
10819 | int prec) | |
10820 | { | |
10821 | while (prec--) | |
10822 | { | |
10823 | number_to_chars_bigendian (lit, (long) (*words++), | |
10824 | sizeof (LITTLENUM_TYPE)); | |
10825 | lit += sizeof (LITTLENUM_TYPE); | |
10826 | } | |
10827 | } | |
10828 | ||
10829 | static void | |
10830 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
10831 | int prec) | |
10832 | { | |
10833 | while (prec--) | |
10834 | { | |
10835 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
10836 | sizeof (LITTLENUM_TYPE)); | |
10837 | lit += sizeof (LITTLENUM_TYPE); | |
10838 | } | |
10839 | } | |
10840 | ||
10841 | void | |
10842 | ia64_elf_section_change_hook (void) | |
10843 | { | |
10844 | dot_byteorder (-1); | |
10845 | } | |
a645d1eb L |
10846 | |
10847 | /* Check if a label should be made global. */ | |
10848 | void | |
10849 | ia64_check_label (symbolS *label) | |
10850 | { | |
10851 | if (*input_line_pointer == ':') | |
10852 | { | |
10853 | S_SET_EXTERNAL (label); | |
10854 | input_line_pointer++; | |
10855 | } | |
10856 | } | |
35f5df7f L |
10857 | |
10858 | /* Used to remember where .alias and .secalias directives are seen. We | |
10859 | will rename symbol and section names when we are about to output | |
10860 | the relocatable file. */ | |
10861 | struct alias | |
10862 | { | |
10863 | char *file; /* The file where the directive is seen. */ | |
10864 | unsigned int line; /* The line number the directive is at. */ | |
10865 | const char *name; /* The orignale name of the symbol. */ | |
10866 | }; | |
10867 | ||
10868 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
10869 | .secalias. Otherwise, it is .alias. */ | |
10870 | static void | |
10871 | dot_alias (int section) | |
10872 | { | |
10873 | char *name, *alias; | |
10874 | char delim; | |
10875 | char *end_name; | |
10876 | int len; | |
10877 | const char *error_string; | |
10878 | struct alias *h; | |
10879 | const char *a; | |
10880 | struct hash_control *ahash, *nhash; | |
10881 | const char *kind; | |
10882 | ||
10883 | name = input_line_pointer; | |
10884 | delim = get_symbol_end (); | |
10885 | end_name = input_line_pointer; | |
10886 | *end_name = delim; | |
10887 | ||
10888 | if (name == end_name) | |
10889 | { | |
10890 | as_bad (_("expected symbol name")); | |
10891 | discard_rest_of_line (); | |
10892 | return; | |
10893 | } | |
10894 | ||
10895 | SKIP_WHITESPACE (); | |
10896 | ||
10897 | if (*input_line_pointer != ',') | |
10898 | { | |
10899 | *end_name = 0; | |
10900 | as_bad (_("expected comma after \"%s\""), name); | |
10901 | *end_name = delim; | |
10902 | ignore_rest_of_line (); | |
10903 | return; | |
10904 | } | |
10905 | ||
10906 | input_line_pointer++; | |
10907 | *end_name = 0; | |
10908 | ||
10909 | /* We call demand_copy_C_string to check if alias string is valid. | |
10910 | There should be a closing `"' and no `\0' in the string. */ | |
10911 | alias = demand_copy_C_string (&len); | |
10912 | if (alias == NULL) | |
10913 | { | |
10914 | ignore_rest_of_line (); | |
10915 | return; | |
10916 | } | |
10917 | ||
10918 | /* Make a copy of name string. */ | |
10919 | len = strlen (name) + 1; | |
10920 | obstack_grow (¬es, name, len); | |
10921 | name = obstack_finish (¬es); | |
10922 | ||
10923 | if (section) | |
10924 | { | |
10925 | kind = "section"; | |
10926 | ahash = secalias_hash; | |
10927 | nhash = secalias_name_hash; | |
10928 | } | |
10929 | else | |
10930 | { | |
10931 | kind = "symbol"; | |
10932 | ahash = alias_hash; | |
10933 | nhash = alias_name_hash; | |
10934 | } | |
10935 | ||
10936 | /* Check if alias has been used before. */ | |
10937 | h = (struct alias *) hash_find (ahash, alias); | |
10938 | if (h) | |
10939 | { | |
10940 | if (strcmp (h->name, name)) | |
10941 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
10942 | alias, kind, h->name); | |
10943 | goto out; | |
10944 | } | |
10945 | ||
10946 | /* Check if name already has an alias. */ | |
10947 | a = (const char *) hash_find (nhash, name); | |
10948 | if (a) | |
10949 | { | |
10950 | if (strcmp (a, alias)) | |
10951 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
10952 | goto out; | |
10953 | } | |
10954 | ||
10955 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
10956 | as_where (&h->file, &h->line); | |
10957 | h->name = name; | |
10958 | ||
10959 | error_string = hash_jam (ahash, alias, (PTR) h); | |
10960 | if (error_string) | |
10961 | { | |
10962 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
10963 | alias, kind, error_string); | |
10964 | goto out; | |
10965 | } | |
10966 | ||
10967 | error_string = hash_jam (nhash, name, (PTR) alias); | |
10968 | if (error_string) | |
10969 | { | |
10970 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
10971 | alias, kind, error_string); | |
10972 | out: | |
10973 | obstack_free (¬es, name); | |
10974 | obstack_free (¬es, alias); | |
10975 | } | |
10976 | ||
10977 | demand_empty_rest_of_line (); | |
10978 | } | |
10979 | ||
10980 | /* It renames the original symbol name to its alias. */ | |
10981 | static void | |
10982 | do_alias (const char *alias, PTR value) | |
10983 | { | |
10984 | struct alias *h = (struct alias *) value; | |
10985 | symbolS *sym = symbol_find (h->name); | |
10986 | ||
10987 | if (sym == NULL) | |
10988 | as_warn_where (h->file, h->line, | |
10989 | _("symbol `%s' aliased to `%s' is not used"), | |
10990 | h->name, alias); | |
10991 | else | |
10992 | S_SET_NAME (sym, (char *) alias); | |
10993 | } | |
10994 | ||
10995 | /* Called from write_object_file. */ | |
10996 | void | |
10997 | ia64_adjust_symtab (void) | |
10998 | { | |
10999 | hash_traverse (alias_hash, do_alias); | |
11000 | } | |
11001 | ||
11002 | /* It renames the original section name to its alias. */ | |
11003 | static void | |
11004 | do_secalias (const char *alias, PTR value) | |
11005 | { | |
11006 | struct alias *h = (struct alias *) value; | |
11007 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11008 | ||
11009 | if (sec == NULL) | |
11010 | as_warn_where (h->file, h->line, | |
11011 | _("section `%s' aliased to `%s' is not used"), | |
11012 | h->name, alias); | |
11013 | else | |
11014 | sec->name = alias; | |
11015 | } | |
11016 | ||
11017 | /* Called from write_object_file. */ | |
11018 | void | |
11019 | ia64_frob_file (void) | |
11020 | { | |
11021 | hash_traverse (secalias_hash, do_secalias); | |
11022 | } |