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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
20ee54e8 | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 |
d6afba4b | 3 | Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
800eeca4 JW |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
a66d2bb7 JB |
54 | #ifdef HAVE_LIMITS_H |
55 | #include <limits.h> | |
56 | #endif | |
57 | ||
800eeca4 | 58 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
59 | |
60 | /* Some systems define MIN in, e.g., param.h. */ | |
61 | #undef MIN | |
800eeca4 JW |
62 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
63 | ||
64 | #define NUM_SLOTS 4 | |
65 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
66 | #define CURR_SLOT md.slot[md.curr_slot] | |
67 | ||
68 | #define O_pseudo_fixup (O_max + 1) | |
69 | ||
70 | enum special_section | |
71 | { | |
557debba | 72 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
73 | SPECIAL_SECTION_BSS = 0, |
74 | SPECIAL_SECTION_SBSS, | |
75 | SPECIAL_SECTION_SDATA, | |
76 | SPECIAL_SECTION_RODATA, | |
77 | SPECIAL_SECTION_COMMENT, | |
78 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
79 | SPECIAL_SECTION_UNWIND_INFO, |
80 | /* HPUX specific section pseudo-ops. */ | |
81 | SPECIAL_SECTION_INIT_ARRAY, | |
82 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
83 | }; |
84 | ||
85 | enum reloc_func | |
86 | { | |
13ae64f3 JJ |
87 | FUNC_DTP_MODULE, |
88 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
89 | FUNC_FPTR_RELATIVE, |
90 | FUNC_GP_RELATIVE, | |
91 | FUNC_LT_RELATIVE, | |
fa2c7eff | 92 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 93 | FUNC_PC_RELATIVE, |
800eeca4 JW |
94 | FUNC_PLT_RELATIVE, |
95 | FUNC_SEC_RELATIVE, | |
96 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 97 | FUNC_TP_RELATIVE, |
800eeca4 JW |
98 | FUNC_LTV_RELATIVE, |
99 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
100 | FUNC_LT_DTP_MODULE, |
101 | FUNC_LT_DTP_RELATIVE, | |
102 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 103 | FUNC_IPLT_RELOC, |
800eeca4 JW |
104 | }; |
105 | ||
106 | enum reg_symbol | |
107 | { | |
108 | REG_GR = 0, | |
109 | REG_FR = (REG_GR + 128), | |
110 | REG_AR = (REG_FR + 128), | |
111 | REG_CR = (REG_AR + 128), | |
112 | REG_P = (REG_CR + 128), | |
113 | REG_BR = (REG_P + 64), | |
114 | REG_IP = (REG_BR + 8), | |
115 | REG_CFM, | |
116 | REG_PR, | |
117 | REG_PR_ROT, | |
118 | REG_PSR, | |
119 | REG_PSR_L, | |
120 | REG_PSR_UM, | |
121 | /* The following are pseudo-registers for use by gas only. */ | |
122 | IND_CPUID, | |
123 | IND_DBR, | |
124 | IND_DTR, | |
125 | IND_ITR, | |
126 | IND_IBR, | |
800eeca4 JW |
127 | IND_MSR, |
128 | IND_PKR, | |
129 | IND_PMC, | |
130 | IND_PMD, | |
131 | IND_RR, | |
542d6675 | 132 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
133 | REG_PSP, |
134 | REG_PRIUNAT, | |
800eeca4 JW |
135 | REG_NUM |
136 | }; | |
137 | ||
138 | enum dynreg_type | |
139 | { | |
140 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
141 | DYNREG_FR, /* dynamic floating point register */ | |
142 | DYNREG_PR, /* dynamic predicate register */ | |
143 | DYNREG_NUM_TYPES | |
144 | }; | |
145 | ||
87f8eb97 JW |
146 | enum operand_match_result |
147 | { | |
148 | OPERAND_MATCH, | |
149 | OPERAND_OUT_OF_RANGE, | |
150 | OPERAND_MISMATCH | |
151 | }; | |
152 | ||
800eeca4 JW |
153 | /* On the ia64, we can't know the address of a text label until the |
154 | instructions are packed into a bundle. To handle this, we keep | |
155 | track of the list of labels that appear in front of each | |
156 | instruction. */ | |
157 | struct label_fix | |
542d6675 KH |
158 | { |
159 | struct label_fix *next; | |
160 | struct symbol *sym; | |
07a53e5c | 161 | bfd_boolean dw2_mark_labels; |
542d6675 | 162 | }; |
800eeca4 | 163 | |
549f748d | 164 | /* This is the endianness of the current section. */ |
800eeca4 JW |
165 | extern int target_big_endian; |
166 | ||
549f748d JW |
167 | /* This is the default endianness. */ |
168 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
169 | ||
10a98291 L |
170 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
171 | ||
172 | static void ia64_float_to_chars_bigendian | |
173 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
174 | static void ia64_float_to_chars_littleendian | |
175 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
176 | static void (*ia64_float_to_chars) | |
177 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
178 | ||
35f5df7f L |
179 | static struct hash_control *alias_hash; |
180 | static struct hash_control *alias_name_hash; | |
181 | static struct hash_control *secalias_hash; | |
182 | static struct hash_control *secalias_name_hash; | |
183 | ||
2fac3d48 JB |
184 | /* List of chars besides those in app.c:symbol_chars that can start an |
185 | operand. Used to prevent the scrubber eating vital white-space. */ | |
186 | const char ia64_symbol_chars[] = "@?"; | |
187 | ||
800eeca4 JW |
188 | /* Characters which always start a comment. */ |
189 | const char comment_chars[] = ""; | |
190 | ||
191 | /* Characters which start a comment at the beginning of a line. */ | |
192 | const char line_comment_chars[] = "#"; | |
193 | ||
194 | /* Characters which may be used to separate multiple commands on a | |
195 | single line. */ | |
e4e8248d | 196 | const char line_separator_chars[] = ";{}"; |
800eeca4 JW |
197 | |
198 | /* Characters which are used to indicate an exponent in a floating | |
199 | point number. */ | |
200 | const char EXP_CHARS[] = "eE"; | |
201 | ||
202 | /* Characters which mean that a number is a floating point constant, | |
203 | as in 0d1.0. */ | |
204 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
205 | ||
542d6675 | 206 | /* ia64-specific option processing: */ |
800eeca4 | 207 | |
44f5c83a | 208 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
209 | |
210 | struct option md_longopts[] = | |
211 | { | |
c43c2cc5 JW |
212 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
213 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
214 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
215 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
216 | }; |
217 | ||
218 | size_t md_longopts_size = sizeof (md_longopts); | |
219 | ||
220 | static struct | |
221 | { | |
222 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
223 | struct hash_control *reg_hash; /* register name hash table */ | |
224 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
225 | struct hash_control *const_hash; /* constant hash table */ | |
226 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
227 | ||
800eeca4 JW |
228 | /* If X_op is != O_absent, the registername for the instruction's |
229 | qualifying predicate. If NULL, p0 is assumed for instructions | |
ad4b42b4 | 230 | that are predictable. */ |
800eeca4 JW |
231 | expressionS qp; |
232 | ||
8c2fda1d L |
233 | /* Optimize for which CPU. */ |
234 | enum | |
235 | { | |
236 | itanium1, | |
237 | itanium2 | |
238 | } tune; | |
239 | ||
91d777ee L |
240 | /* What to do when hint.b is used. */ |
241 | enum | |
242 | { | |
243 | hint_b_error, | |
244 | hint_b_warning, | |
245 | hint_b_ok | |
246 | } hint_b; | |
247 | ||
800eeca4 | 248 | unsigned int |
197865e8 | 249 | manual_bundling : 1, |
800eeca4 JW |
250 | debug_dv: 1, |
251 | detect_dv: 1, | |
252 | explicit_mode : 1, /* which mode we're in */ | |
253 | default_explicit_mode : 1, /* which mode is the default */ | |
254 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
255 | auto_align : 1, |
256 | keep_pending_output : 1; | |
800eeca4 | 257 | |
970d6792 L |
258 | /* What to do when something is wrong with unwind directives. */ |
259 | enum | |
260 | { | |
261 | unwind_check_warning, | |
262 | unwind_check_error | |
263 | } unwind_check; | |
264 | ||
800eeca4 JW |
265 | /* Each bundle consists of up to three instructions. We keep |
266 | track of four most recent instructions so we can correctly set | |
197865e8 | 267 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
268 | int curr_slot; |
269 | int num_slots_in_use; | |
270 | struct slot | |
271 | { | |
272 | unsigned int | |
273 | end_of_insn_group : 1, | |
274 | manual_bundling_on : 1, | |
196e8040 JW |
275 | manual_bundling_off : 1, |
276 | loc_directive_seen : 1; | |
800eeca4 JW |
277 | signed char user_template; /* user-selected template, if any */ |
278 | unsigned char qp_regno; /* qualifying predicate */ | |
279 | /* This duplicates a good fraction of "struct fix" but we | |
280 | can't use a "struct fix" instead since we can't call | |
281 | fix_new_exp() until we know the address of the instruction. */ | |
282 | int num_fixups; | |
283 | struct insn_fix | |
284 | { | |
285 | bfd_reloc_code_real_type code; | |
286 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
287 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
288 | expressionS expr; /* the value to be inserted */ | |
289 | } | |
290 | fixup[2]; /* at most two fixups per insn */ | |
291 | struct ia64_opcode *idesc; | |
292 | struct label_fix *label_fixups; | |
f1bcba5b | 293 | struct label_fix *tag_fixups; |
800eeca4 JW |
294 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
295 | expressionS opnd[6]; | |
296 | char *src_file; | |
297 | unsigned int src_line; | |
298 | struct dwarf2_line_info debug_line; | |
299 | } | |
300 | slot[NUM_SLOTS]; | |
301 | ||
302 | segT last_text_seg; | |
303 | ||
304 | struct dynreg | |
305 | { | |
306 | struct dynreg *next; /* next dynamic register */ | |
307 | const char *name; | |
308 | unsigned short base; /* the base register number */ | |
309 | unsigned short num_regs; /* # of registers in this set */ | |
310 | } | |
311 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
312 | ||
313 | flagword flags; /* ELF-header flags */ | |
314 | ||
315 | struct mem_offset { | |
316 | unsigned hint:1; /* is this hint currently valid? */ | |
317 | bfd_vma offset; /* mem.offset offset */ | |
318 | bfd_vma base; /* mem.offset base */ | |
319 | } mem_offset; | |
320 | ||
321 | int path; /* number of alt. entry points seen */ | |
322 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 323 | the current DV-checking block. */ |
800eeca4 | 324 | int maxpaths; /* size currently allocated for |
542d6675 | 325 | entry_labels */ |
557debba JW |
326 | |
327 | int pointer_size; /* size in bytes of a pointer */ | |
328 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
8b84be9d JB |
329 | |
330 | symbolS *indregsym[IND_RR - IND_CPUID + 1]; | |
800eeca4 JW |
331 | } |
332 | md; | |
333 | ||
f6fe78d6 JW |
334 | /* These are not const, because they are modified to MMI for non-itanium1 |
335 | targets below. */ | |
336 | /* MFI bundle of nops. */ | |
337 | static unsigned char le_nop[16] = | |
338 | { | |
339 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
340 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
341 | }; | |
342 | /* MFI bundle of nops with stop-bit. */ | |
343 | static unsigned char le_nop_stop[16] = | |
344 | { | |
345 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
346 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
347 | }; | |
348 | ||
542d6675 | 349 | /* application registers: */ |
800eeca4 | 350 | |
e0c9811a JW |
351 | #define AR_K0 0 |
352 | #define AR_K7 7 | |
353 | #define AR_RSC 16 | |
354 | #define AR_BSP 17 | |
355 | #define AR_BSPSTORE 18 | |
356 | #define AR_RNAT 19 | |
d8ca90b5 JB |
357 | #define AR_FCR 21 |
358 | #define AR_EFLAG 24 | |
359 | #define AR_CSD 25 | |
360 | #define AR_SSD 26 | |
361 | #define AR_CFLG 27 | |
362 | #define AR_FSR 28 | |
363 | #define AR_FIR 29 | |
364 | #define AR_FDR 30 | |
365 | #define AR_CCV 32 | |
e0c9811a JW |
366 | #define AR_UNAT 36 |
367 | #define AR_FPSR 40 | |
368 | #define AR_ITC 44 | |
369 | #define AR_PFS 64 | |
370 | #define AR_LC 65 | |
d8ca90b5 | 371 | #define AR_EC 66 |
800eeca4 JW |
372 | |
373 | static const struct | |
374 | { | |
375 | const char *name; | |
8b84be9d | 376 | unsigned int regnum; |
800eeca4 JW |
377 | } |
378 | ar[] = | |
379 | { | |
d8ca90b5 JB |
380 | {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1}, |
381 | {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3}, | |
382 | {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5}, | |
383 | {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7}, | |
384 | {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP}, | |
385 | {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT}, | |
386 | {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG}, | |
387 | {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD}, | |
388 | {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR}, | |
389 | {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR}, | |
390 | {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT}, | |
391 | {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC}, | |
392 | {"ar.pfs", AR_PFS}, {"ar.lc", AR_LC}, | |
393 | {"ar.ec", AR_EC}, | |
800eeca4 JW |
394 | }; |
395 | ||
d8ca90b5 JB |
396 | /* control registers: */ |
397 | ||
398 | #define CR_DCR 0 | |
399 | #define CR_ITM 1 | |
400 | #define CR_IVA 2 | |
401 | #define CR_PTA 8 | |
402 | #define CR_GPTA 9 | |
800eeca4 JW |
403 | #define CR_IPSR 16 |
404 | #define CR_ISR 17 | |
405 | #define CR_IIP 19 | |
406 | #define CR_IFA 20 | |
407 | #define CR_ITIR 21 | |
408 | #define CR_IIPA 22 | |
409 | #define CR_IFS 23 | |
410 | #define CR_IIM 24 | |
411 | #define CR_IHA 25 | |
d8ca90b5 | 412 | #define CR_LID 64 |
800eeca4 JW |
413 | #define CR_IVR 65 |
414 | #define CR_TPR 66 | |
415 | #define CR_EOI 67 | |
416 | #define CR_IRR0 68 | |
417 | #define CR_IRR3 71 | |
d8ca90b5 JB |
418 | #define CR_ITV 72 |
419 | #define CR_PMV 73 | |
420 | #define CR_CMCV 74 | |
800eeca4 JW |
421 | #define CR_LRR0 80 |
422 | #define CR_LRR1 81 | |
423 | ||
800eeca4 JW |
424 | static const struct |
425 | { | |
426 | const char *name; | |
8b84be9d | 427 | unsigned int regnum; |
800eeca4 JW |
428 | } |
429 | cr[] = | |
430 | { | |
d8ca90b5 JB |
431 | {"cr.dcr", CR_DCR}, |
432 | {"cr.itm", CR_ITM}, | |
433 | {"cr.iva", CR_IVA}, | |
434 | {"cr.pta", CR_PTA}, | |
435 | {"cr.gpta", CR_GPTA}, | |
436 | {"cr.ipsr", CR_IPSR}, | |
437 | {"cr.isr", CR_ISR}, | |
438 | {"cr.iip", CR_IIP}, | |
439 | {"cr.ifa", CR_IFA}, | |
440 | {"cr.itir", CR_ITIR}, | |
441 | {"cr.iipa", CR_IIPA}, | |
442 | {"cr.ifs", CR_IFS}, | |
443 | {"cr.iim", CR_IIM}, | |
444 | {"cr.iha", CR_IHA}, | |
445 | {"cr.lid", CR_LID}, | |
446 | {"cr.ivr", CR_IVR}, | |
447 | {"cr.tpr", CR_TPR}, | |
448 | {"cr.eoi", CR_EOI}, | |
449 | {"cr.irr0", CR_IRR0}, | |
450 | {"cr.irr1", CR_IRR0 + 1}, | |
451 | {"cr.irr2", CR_IRR0 + 2}, | |
452 | {"cr.irr3", CR_IRR3}, | |
453 | {"cr.itv", CR_ITV}, | |
454 | {"cr.pmv", CR_PMV}, | |
455 | {"cr.cmcv", CR_CMCV}, | |
456 | {"cr.lrr0", CR_LRR0}, | |
457 | {"cr.lrr1", CR_LRR1} | |
800eeca4 JW |
458 | }; |
459 | ||
460 | #define PSR_MFL 4 | |
461 | #define PSR_IC 13 | |
462 | #define PSR_DFL 18 | |
463 | #define PSR_CPL 32 | |
464 | ||
465 | static const struct const_desc | |
466 | { | |
467 | const char *name; | |
468 | valueT value; | |
469 | } | |
470 | const_bits[] = | |
471 | { | |
542d6675 | 472 | /* PSR constant masks: */ |
800eeca4 JW |
473 | |
474 | /* 0: reserved */ | |
475 | {"psr.be", ((valueT) 1) << 1}, | |
476 | {"psr.up", ((valueT) 1) << 2}, | |
477 | {"psr.ac", ((valueT) 1) << 3}, | |
478 | {"psr.mfl", ((valueT) 1) << 4}, | |
479 | {"psr.mfh", ((valueT) 1) << 5}, | |
480 | /* 6-12: reserved */ | |
481 | {"psr.ic", ((valueT) 1) << 13}, | |
482 | {"psr.i", ((valueT) 1) << 14}, | |
483 | {"psr.pk", ((valueT) 1) << 15}, | |
484 | /* 16: reserved */ | |
485 | {"psr.dt", ((valueT) 1) << 17}, | |
486 | {"psr.dfl", ((valueT) 1) << 18}, | |
487 | {"psr.dfh", ((valueT) 1) << 19}, | |
488 | {"psr.sp", ((valueT) 1) << 20}, | |
489 | {"psr.pp", ((valueT) 1) << 21}, | |
490 | {"psr.di", ((valueT) 1) << 22}, | |
491 | {"psr.si", ((valueT) 1) << 23}, | |
492 | {"psr.db", ((valueT) 1) << 24}, | |
493 | {"psr.lp", ((valueT) 1) << 25}, | |
494 | {"psr.tb", ((valueT) 1) << 26}, | |
495 | {"psr.rt", ((valueT) 1) << 27}, | |
496 | /* 28-31: reserved */ | |
497 | /* 32-33: cpl (current privilege level) */ | |
498 | {"psr.is", ((valueT) 1) << 34}, | |
499 | {"psr.mc", ((valueT) 1) << 35}, | |
500 | {"psr.it", ((valueT) 1) << 36}, | |
501 | {"psr.id", ((valueT) 1) << 37}, | |
502 | {"psr.da", ((valueT) 1) << 38}, | |
503 | {"psr.dd", ((valueT) 1) << 39}, | |
504 | {"psr.ss", ((valueT) 1) << 40}, | |
505 | /* 41-42: ri (restart instruction) */ | |
506 | {"psr.ed", ((valueT) 1) << 43}, | |
507 | {"psr.bn", ((valueT) 1) << 44}, | |
508 | }; | |
509 | ||
542d6675 | 510 | /* indirect register-sets/memory: */ |
800eeca4 JW |
511 | |
512 | static const struct | |
513 | { | |
514 | const char *name; | |
8b84be9d | 515 | unsigned int regnum; |
800eeca4 JW |
516 | } |
517 | indirect_reg[] = | |
518 | { | |
519 | { "CPUID", IND_CPUID }, | |
520 | { "cpuid", IND_CPUID }, | |
521 | { "dbr", IND_DBR }, | |
522 | { "dtr", IND_DTR }, | |
523 | { "itr", IND_ITR }, | |
524 | { "ibr", IND_IBR }, | |
525 | { "msr", IND_MSR }, | |
526 | { "pkr", IND_PKR }, | |
527 | { "pmc", IND_PMC }, | |
528 | { "pmd", IND_PMD }, | |
529 | { "rr", IND_RR }, | |
530 | }; | |
531 | ||
532 | /* Pseudo functions used to indicate relocation types (these functions | |
533 | start with an at sign (@). */ | |
534 | static struct | |
535 | { | |
536 | const char *name; | |
537 | enum pseudo_type | |
538 | { | |
539 | PSEUDO_FUNC_NONE, | |
540 | PSEUDO_FUNC_RELOC, | |
541 | PSEUDO_FUNC_CONST, | |
e0c9811a | 542 | PSEUDO_FUNC_REG, |
800eeca4 JW |
543 | PSEUDO_FUNC_FLOAT |
544 | } | |
545 | type; | |
546 | union | |
547 | { | |
548 | unsigned long ival; | |
549 | symbolS *sym; | |
550 | } | |
551 | u; | |
552 | } | |
553 | pseudo_func[] = | |
554 | { | |
542d6675 | 555 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
556 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
557 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
558 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
559 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
560 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 561 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
562 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
563 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
564 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
565 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 566 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 567 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
568 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
569 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
570 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
571 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 572 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 573 | |
542d6675 | 574 | /* mbtype4 constants: */ |
800eeca4 JW |
575 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
576 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
577 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
578 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
579 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
580 | ||
542d6675 | 581 | /* fclass constants: */ |
bf3ca999 | 582 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
583 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
584 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
585 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
586 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
587 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
588 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
589 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
590 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
591 | |
592 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 593 | |
c10d9d8f JW |
594 | /* hint constants: */ |
595 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
596 | ||
542d6675 | 597 | /* unwind-related constants: */ |
041340ad JW |
598 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
599 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
600 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
601 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
602 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
603 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
604 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 605 | |
542d6675 | 606 | /* unwind-related registers: */ |
e0c9811a | 607 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
608 | }; |
609 | ||
542d6675 | 610 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
611 | static const bfd_vma nop[IA64_NUM_UNITS] = |
612 | { | |
613 | 0x0000000000LL, /* NIL => break 0 */ | |
614 | 0x0008000000LL, /* I-unit nop */ | |
615 | 0x0008000000LL, /* M-unit nop */ | |
616 | 0x4000000000LL, /* B-unit nop */ | |
617 | 0x0008000000LL, /* F-unit nop */ | |
5d5e6db9 | 618 | 0x0000000000LL, /* L-"unit" nop immediate */ |
800eeca4 JW |
619 | 0x0008000000LL, /* X-unit nop */ |
620 | }; | |
621 | ||
622 | /* Can't be `const' as it's passed to input routines (which have the | |
623 | habit of setting temporary sentinels. */ | |
624 | static char special_section_name[][20] = | |
625 | { | |
626 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
627 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
628 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
629 | }; |
630 | ||
631 | /* The best template for a particular sequence of up to three | |
632 | instructions: */ | |
633 | #define N IA64_NUM_TYPES | |
634 | static unsigned char best_template[N][N][N]; | |
635 | #undef N | |
636 | ||
637 | /* Resource dependencies currently in effect */ | |
638 | static struct rsrc { | |
639 | int depind; /* dependency index */ | |
640 | const struct ia64_dependency *dependency; /* actual dependency */ | |
641 | unsigned specific:1, /* is this a specific bit/regno? */ | |
642 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
643 | int index; /* specific regno/bit within dependency */ | |
644 | int note; /* optional qualifying note (0 if none) */ | |
645 | #define STATE_NONE 0 | |
646 | #define STATE_STOP 1 | |
647 | #define STATE_SRLZ 2 | |
648 | int insn_srlz; /* current insn serialization state */ | |
649 | int data_srlz; /* current data serialization state */ | |
650 | int qp_regno; /* qualifying predicate for this usage */ | |
651 | char *file; /* what file marked this dependency */ | |
2434f565 | 652 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 653 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 654 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
655 | int path; /* corresponding code entry index */ |
656 | } *regdeps = NULL; | |
657 | static int regdepslen = 0; | |
658 | static int regdepstotlen = 0; | |
659 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
660 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 661 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 662 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
663 | |
664 | /* Current state of PR mutexation */ | |
665 | static struct qpmutex { | |
666 | valueT prmask; | |
667 | int path; | |
668 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
669 | static int qp_mutexeslen = 0; | |
670 | static int qp_mutexestotlen = 0; | |
197865e8 | 671 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
672 | |
673 | /* Current state of PR implications */ | |
674 | static struct qp_imply { | |
675 | unsigned p1:6; | |
676 | unsigned p2:6; | |
677 | unsigned p2_branched:1; | |
678 | int path; | |
679 | } *qp_implies = NULL; | |
680 | static int qp_implieslen = 0; | |
681 | static int qp_impliestotlen = 0; | |
682 | ||
197865e8 KH |
683 | /* Keep track of static GR values so that indirect register usage can |
684 | sometimes be tracked. */ | |
800eeca4 JW |
685 | static struct gr { |
686 | unsigned known:1; | |
687 | int path; | |
688 | valueT value; | |
a66d2bb7 JB |
689 | } gr_values[128] = { |
690 | { | |
691 | 1, | |
692 | #ifdef INT_MAX | |
693 | INT_MAX, | |
694 | #else | |
695 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
696 | #endif | |
697 | 0 | |
698 | } | |
699 | }; | |
800eeca4 | 700 | |
9545c4ce L |
701 | /* Remember the alignment frag. */ |
702 | static fragS *align_frag; | |
703 | ||
800eeca4 JW |
704 | /* These are the routines required to output the various types of |
705 | unwind records. */ | |
706 | ||
f5a30c2e JW |
707 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
708 | frag address here so that if there is a section switch in the middle of | |
709 | a function, then instructions emitted to a different section are not | |
710 | counted. Since there may be more than one frag for a function, this | |
711 | means we also need to keep track of which frag this address belongs to | |
712 | so we can compute inter-frag distances. This also nicely solves the | |
713 | problem with nops emitted for align directives, which can't easily be | |
714 | counted, but can easily be derived from frag sizes. */ | |
715 | ||
800eeca4 JW |
716 | typedef struct unw_rec_list { |
717 | unwind_record r; | |
e0c9811a | 718 | unsigned long slot_number; |
f5a30c2e | 719 | fragS *slot_frag; |
800eeca4 JW |
720 | struct unw_rec_list *next; |
721 | } unw_rec_list; | |
722 | ||
2434f565 | 723 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 724 | |
6290819d NC |
725 | /* Linked list of saved prologue counts. A very poor |
726 | implementation of a map from label numbers to prologue counts. */ | |
727 | typedef struct label_prologue_count | |
728 | { | |
729 | struct label_prologue_count *next; | |
730 | unsigned long label_number; | |
731 | unsigned int prologue_count; | |
732 | } label_prologue_count; | |
733 | ||
5656b6b8 JB |
734 | typedef struct proc_pending |
735 | { | |
736 | symbolS *sym; | |
737 | struct proc_pending *next; | |
738 | } proc_pending; | |
739 | ||
e0c9811a JW |
740 | static struct |
741 | { | |
e0c9811a JW |
742 | /* Maintain a list of unwind entries for the current function. */ |
743 | unw_rec_list *list; | |
744 | unw_rec_list *tail; | |
800eeca4 | 745 | |
ad4b42b4 | 746 | /* Any unwind entries that should be attached to the current slot |
e0c9811a JW |
747 | that an insn is being constructed for. */ |
748 | unw_rec_list *current_entry; | |
800eeca4 | 749 | |
e0c9811a | 750 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 751 | proc_pending proc_pending; |
e0c9811a JW |
752 | symbolS *info; /* pointer to unwind info */ |
753 | symbolS *personality_routine; | |
91a2ae2a RH |
754 | segT saved_text_seg; |
755 | subsegT saved_text_subseg; | |
756 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 757 | |
e0c9811a | 758 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
759 | unsigned int prologue : 1; |
760 | unsigned int prologue_mask : 4; | |
e4e8248d | 761 | unsigned int prologue_gr : 7; |
75e09913 JB |
762 | unsigned int body : 1; |
763 | unsigned int insn : 1; | |
33d01f33 | 764 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
765 | /* Prologue counts at previous .label_state directives. */ |
766 | struct label_prologue_count * saved_prologue_counts; | |
ba825241 JB |
767 | |
768 | /* List of split up .save-s. */ | |
769 | unw_p_record *pending_saves; | |
e0c9811a | 770 | } unwind; |
800eeca4 | 771 | |
9f9a069e JW |
772 | /* The input value is a negated offset from psp, and specifies an address |
773 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
774 | must add 16 and divide by 4 to get the encoded value. */ | |
775 | ||
776 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
777 | ||
800eeca4 JW |
778 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
779 | ||
0234cb7c | 780 | /* Forward declarations: */ |
800eeca4 JW |
781 | static void set_section PARAMS ((char *name)); |
782 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
783 | unsigned int, unsigned int)); | |
d9201763 | 784 | static void dot_align (int); |
800eeca4 JW |
785 | static void dot_radix PARAMS ((int)); |
786 | static void dot_special_section PARAMS ((int)); | |
787 | static void dot_proc PARAMS ((int)); | |
788 | static void dot_fframe PARAMS ((int)); | |
789 | static void dot_vframe PARAMS ((int)); | |
150f24a2 | 790 | static void dot_vframesp PARAMS ((int)); |
800eeca4 JW |
791 | static void dot_save PARAMS ((int)); |
792 | static void dot_restore PARAMS ((int)); | |
150f24a2 | 793 | static void dot_restorereg PARAMS ((int)); |
800eeca4 JW |
794 | static void dot_handlerdata PARAMS ((int)); |
795 | static void dot_unwentry PARAMS ((int)); | |
796 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 797 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
798 | static void dot_saveg PARAMS ((int)); |
799 | static void dot_savef PARAMS ((int)); | |
800 | static void dot_saveb PARAMS ((int)); | |
801 | static void dot_savegf PARAMS ((int)); | |
802 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
803 | static void dot_spillreg PARAMS ((int)); |
804 | static void dot_spillmem PARAMS ((int)); | |
150f24a2 JW |
805 | static void dot_label_state PARAMS ((int)); |
806 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
807 | static void dot_unwabi PARAMS ((int)); |
808 | static void dot_personality PARAMS ((int)); | |
809 | static void dot_body PARAMS ((int)); | |
810 | static void dot_prologue PARAMS ((int)); | |
811 | static void dot_endp PARAMS ((int)); | |
812 | static void dot_template PARAMS ((int)); | |
813 | static void dot_regstk PARAMS ((int)); | |
814 | static void dot_rot PARAMS ((int)); | |
815 | static void dot_byteorder PARAMS ((int)); | |
816 | static void dot_psr PARAMS ((int)); | |
817 | static void dot_alias PARAMS ((int)); | |
818 | static void dot_ln PARAMS ((int)); | |
ef6a2b41 | 819 | static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua)); |
800eeca4 JW |
820 | static void dot_xdata PARAMS ((int)); |
821 | static void stmt_float_cons PARAMS ((int)); | |
822 | static void stmt_cons_ua PARAMS ((int)); | |
823 | static void dot_xfloat_cons PARAMS ((int)); | |
824 | static void dot_xstringer PARAMS ((int)); | |
825 | static void dot_xdata_ua PARAMS ((int)); | |
826 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 827 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
828 | static void dot_pred_rel PARAMS ((int)); |
829 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 830 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
831 | static void dot_dv_mode PARAMS ((int)); |
832 | static void dot_entry PARAMS ((int)); | |
833 | static void dot_mem_offset PARAMS ((int)); | |
e4e8248d | 834 | static void add_unwind_entry PARAMS((unw_rec_list *, int)); |
8b84be9d JB |
835 | static symbolS *declare_register PARAMS ((const char *name, unsigned int regnum)); |
836 | static void declare_register_set PARAMS ((const char *, unsigned int, unsigned int)); | |
800eeca4 | 837 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); |
87f8eb97 JW |
838 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
839 | int index, | |
840 | expressionS *e)); | |
e4e8248d | 841 | static int parse_operand PARAMS ((expressionS *, int)); |
800eeca4 JW |
842 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); |
843 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); | |
844 | static void emit_one_bundle PARAMS ((void)); | |
845 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 846 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
847 | bfd_reloc_code_real_type r_type)); |
848 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
849 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
850 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
851 | static void add_qp_mutex PARAMS((valueT mask)); |
852 | static void add_qp_imply PARAMS((int p1, int p2)); | |
853 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
854 | static void clear_qp_mutex PARAMS((valueT mask)); | |
855 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 856 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
857 | static void clear_register_values PARAMS ((void)); |
858 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
859 | static void instruction_serialization PARAMS ((void)); |
860 | static void data_serialization PARAMS ((void)); | |
861 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 862 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 863 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 864 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
865 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
866 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
867 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
868 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
869 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
870 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
871 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
872 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
873 | static int qp_mutex PARAMS ((int, int, int)); |
874 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
875 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
876 | static void count_output PARAMS ((int, char *, char *)); | |
877 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
878 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 879 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
880 | static void output_P1_format PARAMS ((vbyte_func, int)); |
881 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
882 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
883 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
884 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
885 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
886 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
887 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
888 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
889 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
890 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
891 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
892 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
893 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
894 | static char format_ab_reg PARAMS ((int, int)); |
895 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
896 | unsigned long)); | |
897 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
898 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
899 | unsigned long)); | |
900 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 901 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
902 | static unw_rec_list *output_prologue PARAMS ((void)); |
903 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
904 | static unw_rec_list *output_body PARAMS ((void)); | |
905 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
906 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
907 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
908 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
909 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
910 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
911 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
912 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
913 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
914 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
915 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
916 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
917 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
918 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
919 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
920 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
921 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
922 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
923 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
924 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
925 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
926 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
927 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
928 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
929 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
930 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
931 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
932 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
933 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
934 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
935 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
936 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
937 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
938 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
939 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
940 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
941 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
942 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
943 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
944 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
945 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
946 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
947 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
948 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
949 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
950 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
951 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
952 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
953 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
954 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
955 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
956 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
957 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
958 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
959 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
960 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
961 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
e4e8248d | 962 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int, |
150f24a2 | 963 | unsigned int)); |
e4e8248d | 964 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int, |
150f24a2 JW |
965 | unsigned int)); |
966 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
150f24a2 JW |
967 | unsigned int, unsigned int)); |
968 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
969 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
970 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
971 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 972 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
973 | unsigned long, fragS *, |
974 | int)); | |
91a2ae2a | 975 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 976 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
e4e8248d JB |
977 | static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *)); |
978 | static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int)); | |
979 | static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int)); | |
6290819d NC |
980 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
981 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
982 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 983 | |
652ca075 | 984 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
985 | unit (as opposed to the memory unit). */ |
986 | static int | |
652ca075 | 987 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
988 | { |
989 | reg -= REG_AR; | |
652ca075 L |
990 | return reg >= 64 && reg <= 111; |
991 | } | |
800eeca4 | 992 | |
652ca075 L |
993 | /* Determine if application register REGNUM resides only in the memory |
994 | unit (as opposed to the integer unit). */ | |
995 | static int | |
996 | ar_is_only_in_memory_unit (int reg) | |
997 | { | |
998 | reg -= REG_AR; | |
999 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
1000 | } |
1001 | ||
1002 | /* Switch to section NAME and create section if necessary. It's | |
1003 | rather ugly that we have to manipulate input_line_pointer but I | |
1004 | don't see any other way to accomplish the same thing without | |
1005 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
1006 | static void | |
1007 | set_section (name) | |
1008 | char *name; | |
1009 | { | |
1010 | char *saved_input_line_pointer; | |
1011 | ||
1012 | saved_input_line_pointer = input_line_pointer; | |
1013 | input_line_pointer = name; | |
1014 | obj_elf_section (0); | |
1015 | input_line_pointer = saved_input_line_pointer; | |
1016 | } | |
1017 | ||
d61a78a7 RH |
1018 | /* Map 's' to SHF_IA_64_SHORT. */ |
1019 | ||
1020 | int | |
1021 | ia64_elf_section_letter (letter, ptr_msg) | |
1022 | int letter; | |
1023 | char **ptr_msg; | |
1024 | { | |
1025 | if (letter == 's') | |
1026 | return SHF_IA_64_SHORT; | |
711ef82f L |
1027 | else if (letter == 'o') |
1028 | return SHF_LINK_ORDER; | |
d61a78a7 | 1029 | |
711ef82f L |
1030 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
1031 | return -1; | |
d61a78a7 RH |
1032 | } |
1033 | ||
800eeca4 JW |
1034 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
1035 | ||
1036 | flagword | |
1037 | ia64_elf_section_flags (flags, attr, type) | |
1038 | flagword flags; | |
2434f565 | 1039 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
1040 | { |
1041 | if (attr & SHF_IA_64_SHORT) | |
1042 | flags |= SEC_SMALL_DATA; | |
1043 | return flags; | |
1044 | } | |
1045 | ||
91a2ae2a RH |
1046 | int |
1047 | ia64_elf_section_type (str, len) | |
40449e9f KH |
1048 | const char *str; |
1049 | size_t len; | |
91a2ae2a | 1050 | { |
1cd8ff38 | 1051 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1052 | |
1cd8ff38 | 1053 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1054 | return SHT_PROGBITS; |
1055 | ||
1cd8ff38 | 1056 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1057 | return SHT_PROGBITS; |
1058 | ||
1cd8ff38 | 1059 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1060 | return SHT_IA_64_UNWIND; |
1061 | ||
1cd8ff38 | 1062 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1063 | return SHT_IA_64_UNWIND; |
1064 | ||
711ef82f L |
1065 | if (STREQ ("unwind")) |
1066 | return SHT_IA_64_UNWIND; | |
1067 | ||
91a2ae2a | 1068 | return -1; |
1cd8ff38 | 1069 | #undef STREQ |
91a2ae2a RH |
1070 | } |
1071 | ||
800eeca4 JW |
1072 | static unsigned int |
1073 | set_regstack (ins, locs, outs, rots) | |
1074 | unsigned int ins, locs, outs, rots; | |
1075 | { | |
542d6675 KH |
1076 | /* Size of frame. */ |
1077 | unsigned int sof; | |
800eeca4 JW |
1078 | |
1079 | sof = ins + locs + outs; | |
1080 | if (sof > 96) | |
1081 | { | |
ad4b42b4 | 1082 | as_bad (_("Size of frame exceeds maximum of 96 registers")); |
800eeca4 JW |
1083 | return 0; |
1084 | } | |
1085 | if (rots > sof) | |
1086 | { | |
ad4b42b4 | 1087 | as_warn (_("Size of rotating registers exceeds frame size")); |
800eeca4 JW |
1088 | return 0; |
1089 | } | |
1090 | md.in.base = REG_GR + 32; | |
1091 | md.loc.base = md.in.base + ins; | |
1092 | md.out.base = md.loc.base + locs; | |
1093 | ||
1094 | md.in.num_regs = ins; | |
1095 | md.loc.num_regs = locs; | |
1096 | md.out.num_regs = outs; | |
1097 | md.rot.num_regs = rots; | |
1098 | return sof; | |
1099 | } | |
1100 | ||
1101 | void | |
1102 | ia64_flush_insns () | |
1103 | { | |
1104 | struct label_fix *lfix; | |
1105 | segT saved_seg; | |
1106 | subsegT saved_subseg; | |
b44b1b85 | 1107 | unw_rec_list *ptr; |
07a53e5c | 1108 | bfd_boolean mark; |
800eeca4 JW |
1109 | |
1110 | if (!md.last_text_seg) | |
1111 | return; | |
1112 | ||
1113 | saved_seg = now_seg; | |
1114 | saved_subseg = now_subseg; | |
1115 | ||
1116 | subseg_set (md.last_text_seg, 0); | |
1117 | ||
1118 | while (md.num_slots_in_use > 0) | |
1119 | emit_one_bundle (); /* force out queued instructions */ | |
1120 | ||
1121 | /* In case there are labels following the last instruction, resolve | |
07a53e5c RH |
1122 | those now. */ |
1123 | mark = FALSE; | |
800eeca4 JW |
1124 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1125 | { | |
07a53e5c RH |
1126 | symbol_set_value_now (lfix->sym); |
1127 | mark |= lfix->dw2_mark_labels; | |
800eeca4 | 1128 | } |
07a53e5c | 1129 | if (mark) |
f1bcba5b | 1130 | { |
07a53e5c RH |
1131 | dwarf2_where (&CURR_SLOT.debug_line); |
1132 | CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
1133 | dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); | |
f1bcba5b | 1134 | } |
07a53e5c RH |
1135 | CURR_SLOT.label_fixups = 0; |
1136 | ||
1137 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) | |
1138 | symbol_set_value_now (lfix->sym); | |
f1bcba5b | 1139 | CURR_SLOT.tag_fixups = 0; |
800eeca4 | 1140 | |
b44b1b85 | 1141 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1142 | resolve those now. We only handle prologue, body, and endp directives |
1143 | here. Give an error for others. */ | |
b44b1b85 JW |
1144 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1145 | { | |
9c59842f | 1146 | switch (ptr->r.type) |
b44b1b85 | 1147 | { |
9c59842f JW |
1148 | case prologue: |
1149 | case prologue_gr: | |
1150 | case body: | |
1151 | case endp: | |
b44b1b85 JW |
1152 | ptr->slot_number = (unsigned long) frag_more (0); |
1153 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1154 | break; |
1155 | ||
1156 | /* Allow any record which doesn't have a "t" field (i.e., | |
1157 | doesn't relate to a particular instruction). */ | |
1158 | case unwabi: | |
1159 | case br_gr: | |
1160 | case copy_state: | |
1161 | case fr_mem: | |
1162 | case frgr_mem: | |
1163 | case gr_gr: | |
1164 | case gr_mem: | |
1165 | case label_state: | |
1166 | case rp_br: | |
1167 | case spill_base: | |
1168 | case spill_mask: | |
1169 | /* nothing */ | |
1170 | break; | |
1171 | ||
1172 | default: | |
1173 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1174 | break; | |
b44b1b85 | 1175 | } |
b44b1b85 JW |
1176 | } |
1177 | unwind.current_entry = NULL; | |
1178 | ||
800eeca4 | 1179 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1180 | |
1181 | if (md.qp.X_op == O_register) | |
ad4b42b4 | 1182 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
1183 | } |
1184 | ||
d9201763 L |
1185 | static void |
1186 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1187 | { |
1188 | char *saved_input_line_pointer = input_line_pointer; | |
1189 | ||
1190 | input_line_pointer = ""; | |
1191 | s_align_bytes (nbytes); | |
1192 | input_line_pointer = saved_input_line_pointer; | |
1193 | } | |
1194 | ||
1195 | void | |
1196 | ia64_cons_align (nbytes) | |
1197 | int nbytes; | |
1198 | { | |
1199 | if (md.auto_align) | |
1200 | { | |
1201 | char *saved_input_line_pointer = input_line_pointer; | |
1202 | input_line_pointer = ""; | |
1203 | s_align_bytes (nbytes); | |
1204 | input_line_pointer = saved_input_line_pointer; | |
1205 | } | |
1206 | } | |
1207 | ||
1208 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1209 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1210 | |
197865e8 | 1211 | void |
800eeca4 JW |
1212 | output_vbyte_mem (count, ptr, comment) |
1213 | int count; | |
1214 | char *ptr; | |
2434f565 | 1215 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1216 | { |
1217 | int x; | |
1218 | if (vbyte_mem_ptr == NULL) | |
1219 | abort (); | |
1220 | ||
1221 | if (count == 0) | |
1222 | return; | |
1223 | for (x = 0; x < count; x++) | |
1224 | *(vbyte_mem_ptr++) = ptr[x]; | |
1225 | } | |
1226 | ||
1227 | /* Count the number of bytes required for records. */ | |
1228 | static int vbyte_count = 0; | |
197865e8 | 1229 | void |
800eeca4 JW |
1230 | count_output (count, ptr, comment) |
1231 | int count; | |
2434f565 JW |
1232 | char *ptr ATTRIBUTE_UNUSED; |
1233 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1234 | { |
1235 | vbyte_count += count; | |
1236 | } | |
1237 | ||
1238 | static void | |
1239 | output_R1_format (f, rtype, rlen) | |
1240 | vbyte_func f; | |
1241 | unw_record_type rtype; | |
1242 | int rlen; | |
1243 | { | |
e0c9811a | 1244 | int r = 0; |
800eeca4 JW |
1245 | char byte; |
1246 | if (rlen > 0x1f) | |
1247 | { | |
1248 | output_R3_format (f, rtype, rlen); | |
1249 | return; | |
1250 | } | |
197865e8 | 1251 | |
e0c9811a JW |
1252 | if (rtype == body) |
1253 | r = 1; | |
1254 | else if (rtype != prologue) | |
ad4b42b4 | 1255 | as_bad (_("record type is not valid")); |
e0c9811a | 1256 | |
800eeca4 JW |
1257 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1258 | (*f) (1, &byte, NULL); | |
1259 | } | |
1260 | ||
1261 | static void | |
1262 | output_R2_format (f, mask, grsave, rlen) | |
1263 | vbyte_func f; | |
1264 | int mask, grsave; | |
1265 | unsigned long rlen; | |
1266 | { | |
1267 | char bytes[20]; | |
1268 | int count = 2; | |
1269 | mask = (mask & 0x0f); | |
1270 | grsave = (grsave & 0x7f); | |
1271 | ||
1272 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1273 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1274 | count += output_leb128 (bytes + 2, rlen, 0); | |
1275 | (*f) (count, bytes, NULL); | |
1276 | } | |
1277 | ||
1278 | static void | |
1279 | output_R3_format (f, rtype, rlen) | |
1280 | vbyte_func f; | |
1281 | unw_record_type rtype; | |
1282 | unsigned long rlen; | |
1283 | { | |
e0c9811a | 1284 | int r = 0, count; |
800eeca4 JW |
1285 | char bytes[20]; |
1286 | if (rlen <= 0x1f) | |
1287 | { | |
1288 | output_R1_format (f, rtype, rlen); | |
1289 | return; | |
1290 | } | |
197865e8 | 1291 | |
e0c9811a JW |
1292 | if (rtype == body) |
1293 | r = 1; | |
1294 | else if (rtype != prologue) | |
ad4b42b4 | 1295 | as_bad (_("record type is not valid")); |
800eeca4 JW |
1296 | bytes[0] = (UNW_R3 | r); |
1297 | count = output_leb128 (bytes + 1, rlen, 0); | |
1298 | (*f) (count + 1, bytes, NULL); | |
1299 | } | |
1300 | ||
1301 | static void | |
1302 | output_P1_format (f, brmask) | |
1303 | vbyte_func f; | |
1304 | int brmask; | |
1305 | { | |
1306 | char byte; | |
1307 | byte = UNW_P1 | (brmask & 0x1f); | |
1308 | (*f) (1, &byte, NULL); | |
1309 | } | |
1310 | ||
1311 | static void | |
1312 | output_P2_format (f, brmask, gr) | |
1313 | vbyte_func f; | |
1314 | int brmask; | |
1315 | int gr; | |
1316 | { | |
1317 | char bytes[2]; | |
1318 | brmask = (brmask & 0x1f); | |
1319 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1320 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1321 | (*f) (2, bytes, NULL); | |
1322 | } | |
1323 | ||
1324 | static void | |
1325 | output_P3_format (f, rtype, reg) | |
1326 | vbyte_func f; | |
1327 | unw_record_type rtype; | |
1328 | int reg; | |
1329 | { | |
1330 | char bytes[2]; | |
e0c9811a | 1331 | int r = 0; |
800eeca4 JW |
1332 | reg = (reg & 0x7f); |
1333 | switch (rtype) | |
542d6675 | 1334 | { |
800eeca4 JW |
1335 | case psp_gr: |
1336 | r = 0; | |
1337 | break; | |
1338 | case rp_gr: | |
1339 | r = 1; | |
1340 | break; | |
1341 | case pfs_gr: | |
1342 | r = 2; | |
1343 | break; | |
1344 | case preds_gr: | |
1345 | r = 3; | |
1346 | break; | |
1347 | case unat_gr: | |
1348 | r = 4; | |
1349 | break; | |
1350 | case lc_gr: | |
1351 | r = 5; | |
1352 | break; | |
1353 | case rp_br: | |
1354 | r = 6; | |
1355 | break; | |
1356 | case rnat_gr: | |
1357 | r = 7; | |
1358 | break; | |
1359 | case bsp_gr: | |
1360 | r = 8; | |
1361 | break; | |
1362 | case bspstore_gr: | |
1363 | r = 9; | |
1364 | break; | |
1365 | case fpsr_gr: | |
1366 | r = 10; | |
1367 | break; | |
1368 | case priunat_gr: | |
1369 | r = 11; | |
1370 | break; | |
1371 | default: | |
ad4b42b4 | 1372 | as_bad (_("Invalid record type for P3 format.")); |
542d6675 | 1373 | } |
800eeca4 JW |
1374 | bytes[0] = (UNW_P3 | (r >> 1)); |
1375 | bytes[1] = (((r & 1) << 7) | reg); | |
1376 | (*f) (2, bytes, NULL); | |
1377 | } | |
1378 | ||
800eeca4 | 1379 | static void |
e0c9811a | 1380 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1381 | vbyte_func f; |
e0c9811a JW |
1382 | unsigned char *imask; |
1383 | unsigned long imask_size; | |
800eeca4 | 1384 | { |
e0c9811a | 1385 | imask[0] = UNW_P4; |
2132e3a3 | 1386 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1387 | } |
1388 | ||
1389 | static void | |
1390 | output_P5_format (f, grmask, frmask) | |
1391 | vbyte_func f; | |
1392 | int grmask; | |
1393 | unsigned long frmask; | |
1394 | { | |
1395 | char bytes[4]; | |
1396 | grmask = (grmask & 0x0f); | |
1397 | ||
1398 | bytes[0] = UNW_P5; | |
1399 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1400 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1401 | bytes[3] = (frmask & 0x000000ff); | |
1402 | (*f) (4, bytes, NULL); | |
1403 | } | |
1404 | ||
1405 | static void | |
1406 | output_P6_format (f, rtype, rmask) | |
1407 | vbyte_func f; | |
1408 | unw_record_type rtype; | |
1409 | int rmask; | |
1410 | { | |
1411 | char byte; | |
e0c9811a | 1412 | int r = 0; |
197865e8 | 1413 | |
e0c9811a JW |
1414 | if (rtype == gr_mem) |
1415 | r = 1; | |
1416 | else if (rtype != fr_mem) | |
ad4b42b4 | 1417 | as_bad (_("Invalid record type for format P6")); |
800eeca4 JW |
1418 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1419 | (*f) (1, &byte, NULL); | |
1420 | } | |
1421 | ||
1422 | static void | |
1423 | output_P7_format (f, rtype, w1, w2) | |
1424 | vbyte_func f; | |
1425 | unw_record_type rtype; | |
1426 | unsigned long w1; | |
1427 | unsigned long w2; | |
1428 | { | |
1429 | char bytes[20]; | |
1430 | int count = 1; | |
e0c9811a | 1431 | int r = 0; |
800eeca4 JW |
1432 | count += output_leb128 (bytes + 1, w1, 0); |
1433 | switch (rtype) | |
1434 | { | |
542d6675 KH |
1435 | case mem_stack_f: |
1436 | r = 0; | |
1437 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1438 | break; | |
1439 | case mem_stack_v: | |
1440 | r = 1; | |
1441 | break; | |
1442 | case spill_base: | |
1443 | r = 2; | |
1444 | break; | |
1445 | case psp_sprel: | |
1446 | r = 3; | |
1447 | break; | |
1448 | case rp_when: | |
1449 | r = 4; | |
1450 | break; | |
1451 | case rp_psprel: | |
1452 | r = 5; | |
1453 | break; | |
1454 | case pfs_when: | |
1455 | r = 6; | |
1456 | break; | |
1457 | case pfs_psprel: | |
1458 | r = 7; | |
1459 | break; | |
1460 | case preds_when: | |
1461 | r = 8; | |
1462 | break; | |
1463 | case preds_psprel: | |
1464 | r = 9; | |
1465 | break; | |
1466 | case lc_when: | |
1467 | r = 10; | |
1468 | break; | |
1469 | case lc_psprel: | |
1470 | r = 11; | |
1471 | break; | |
1472 | case unat_when: | |
1473 | r = 12; | |
1474 | break; | |
1475 | case unat_psprel: | |
1476 | r = 13; | |
1477 | break; | |
1478 | case fpsr_when: | |
1479 | r = 14; | |
1480 | break; | |
1481 | case fpsr_psprel: | |
1482 | r = 15; | |
1483 | break; | |
1484 | default: | |
1485 | break; | |
800eeca4 JW |
1486 | } |
1487 | bytes[0] = (UNW_P7 | r); | |
1488 | (*f) (count, bytes, NULL); | |
1489 | } | |
1490 | ||
1491 | static void | |
1492 | output_P8_format (f, rtype, t) | |
1493 | vbyte_func f; | |
1494 | unw_record_type rtype; | |
1495 | unsigned long t; | |
1496 | { | |
1497 | char bytes[20]; | |
e0c9811a | 1498 | int r = 0; |
800eeca4 JW |
1499 | int count = 2; |
1500 | bytes[0] = UNW_P8; | |
1501 | switch (rtype) | |
1502 | { | |
542d6675 KH |
1503 | case rp_sprel: |
1504 | r = 1; | |
1505 | break; | |
1506 | case pfs_sprel: | |
1507 | r = 2; | |
1508 | break; | |
1509 | case preds_sprel: | |
1510 | r = 3; | |
1511 | break; | |
1512 | case lc_sprel: | |
1513 | r = 4; | |
1514 | break; | |
1515 | case unat_sprel: | |
1516 | r = 5; | |
1517 | break; | |
1518 | case fpsr_sprel: | |
1519 | r = 6; | |
1520 | break; | |
1521 | case bsp_when: | |
1522 | r = 7; | |
1523 | break; | |
1524 | case bsp_psprel: | |
1525 | r = 8; | |
1526 | break; | |
1527 | case bsp_sprel: | |
1528 | r = 9; | |
1529 | break; | |
1530 | case bspstore_when: | |
1531 | r = 10; | |
1532 | break; | |
1533 | case bspstore_psprel: | |
1534 | r = 11; | |
1535 | break; | |
1536 | case bspstore_sprel: | |
1537 | r = 12; | |
1538 | break; | |
1539 | case rnat_when: | |
1540 | r = 13; | |
1541 | break; | |
1542 | case rnat_psprel: | |
1543 | r = 14; | |
1544 | break; | |
1545 | case rnat_sprel: | |
1546 | r = 15; | |
1547 | break; | |
1548 | case priunat_when_gr: | |
1549 | r = 16; | |
1550 | break; | |
1551 | case priunat_psprel: | |
1552 | r = 17; | |
1553 | break; | |
1554 | case priunat_sprel: | |
1555 | r = 18; | |
1556 | break; | |
1557 | case priunat_when_mem: | |
1558 | r = 19; | |
1559 | break; | |
1560 | default: | |
1561 | break; | |
800eeca4 JW |
1562 | } |
1563 | bytes[1] = r; | |
1564 | count += output_leb128 (bytes + 2, t, 0); | |
1565 | (*f) (count, bytes, NULL); | |
1566 | } | |
1567 | ||
1568 | static void | |
1569 | output_P9_format (f, grmask, gr) | |
1570 | vbyte_func f; | |
1571 | int grmask; | |
1572 | int gr; | |
1573 | { | |
1574 | char bytes[3]; | |
1575 | bytes[0] = UNW_P9; | |
1576 | bytes[1] = (grmask & 0x0f); | |
1577 | bytes[2] = (gr & 0x7f); | |
1578 | (*f) (3, bytes, NULL); | |
1579 | } | |
1580 | ||
1581 | static void | |
1582 | output_P10_format (f, abi, context) | |
1583 | vbyte_func f; | |
1584 | int abi; | |
1585 | int context; | |
1586 | { | |
1587 | char bytes[3]; | |
1588 | bytes[0] = UNW_P10; | |
1589 | bytes[1] = (abi & 0xff); | |
1590 | bytes[2] = (context & 0xff); | |
1591 | (*f) (3, bytes, NULL); | |
1592 | } | |
1593 | ||
1594 | static void | |
1595 | output_B1_format (f, rtype, label) | |
1596 | vbyte_func f; | |
1597 | unw_record_type rtype; | |
1598 | unsigned long label; | |
1599 | { | |
1600 | char byte; | |
e0c9811a | 1601 | int r = 0; |
197865e8 | 1602 | if (label > 0x1f) |
800eeca4 JW |
1603 | { |
1604 | output_B4_format (f, rtype, label); | |
1605 | return; | |
1606 | } | |
e0c9811a JW |
1607 | if (rtype == copy_state) |
1608 | r = 1; | |
1609 | else if (rtype != label_state) | |
ad4b42b4 | 1610 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1611 | |
1612 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1613 | (*f) (1, &byte, NULL); | |
1614 | } | |
1615 | ||
1616 | static void | |
1617 | output_B2_format (f, ecount, t) | |
1618 | vbyte_func f; | |
1619 | unsigned long ecount; | |
1620 | unsigned long t; | |
1621 | { | |
1622 | char bytes[20]; | |
1623 | int count = 1; | |
1624 | if (ecount > 0x1f) | |
1625 | { | |
1626 | output_B3_format (f, ecount, t); | |
1627 | return; | |
1628 | } | |
1629 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1630 | count += output_leb128 (bytes + 1, t, 0); | |
1631 | (*f) (count, bytes, NULL); | |
1632 | } | |
1633 | ||
1634 | static void | |
1635 | output_B3_format (f, ecount, t) | |
1636 | vbyte_func f; | |
1637 | unsigned long ecount; | |
1638 | unsigned long t; | |
1639 | { | |
1640 | char bytes[20]; | |
1641 | int count = 1; | |
1642 | if (ecount <= 0x1f) | |
1643 | { | |
1644 | output_B2_format (f, ecount, t); | |
1645 | return; | |
1646 | } | |
1647 | bytes[0] = UNW_B3; | |
1648 | count += output_leb128 (bytes + 1, t, 0); | |
1649 | count += output_leb128 (bytes + count, ecount, 0); | |
1650 | (*f) (count, bytes, NULL); | |
1651 | } | |
1652 | ||
1653 | static void | |
1654 | output_B4_format (f, rtype, label) | |
1655 | vbyte_func f; | |
1656 | unw_record_type rtype; | |
1657 | unsigned long label; | |
1658 | { | |
1659 | char bytes[20]; | |
e0c9811a | 1660 | int r = 0; |
800eeca4 | 1661 | int count = 1; |
197865e8 | 1662 | if (label <= 0x1f) |
800eeca4 JW |
1663 | { |
1664 | output_B1_format (f, rtype, label); | |
1665 | return; | |
1666 | } | |
197865e8 | 1667 | |
e0c9811a JW |
1668 | if (rtype == copy_state) |
1669 | r = 1; | |
1670 | else if (rtype != label_state) | |
ad4b42b4 | 1671 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1672 | |
1673 | bytes[0] = (UNW_B4 | (r << 3)); | |
1674 | count += output_leb128 (bytes + 1, label, 0); | |
1675 | (*f) (count, bytes, NULL); | |
1676 | } | |
1677 | ||
1678 | static char | |
e0c9811a | 1679 | format_ab_reg (ab, reg) |
542d6675 KH |
1680 | int ab; |
1681 | int reg; | |
800eeca4 JW |
1682 | { |
1683 | int ret; | |
e0c9811a | 1684 | ab = (ab & 3); |
800eeca4 | 1685 | reg = (reg & 0x1f); |
e0c9811a | 1686 | ret = (ab << 5) | reg; |
800eeca4 JW |
1687 | return ret; |
1688 | } | |
1689 | ||
1690 | static void | |
e0c9811a | 1691 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1692 | vbyte_func f; |
1693 | unw_record_type rtype; | |
e0c9811a | 1694 | int ab, reg; |
800eeca4 JW |
1695 | unsigned long t; |
1696 | unsigned long w1; | |
1697 | { | |
1698 | char bytes[20]; | |
e0c9811a | 1699 | int r = 0; |
800eeca4 JW |
1700 | int count = 2; |
1701 | bytes[0] = UNW_X1; | |
197865e8 | 1702 | |
e0c9811a JW |
1703 | if (rtype == spill_sprel) |
1704 | r = 1; | |
1705 | else if (rtype != spill_psprel) | |
ad4b42b4 | 1706 | as_bad (_("Invalid record type for format X1")); |
e0c9811a | 1707 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1708 | count += output_leb128 (bytes + 2, t, 0); |
1709 | count += output_leb128 (bytes + count, w1, 0); | |
1710 | (*f) (count, bytes, NULL); | |
1711 | } | |
1712 | ||
1713 | static void | |
e0c9811a | 1714 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1715 | vbyte_func f; |
e0c9811a | 1716 | int ab, reg; |
800eeca4 JW |
1717 | int x, y, treg; |
1718 | unsigned long t; | |
1719 | { | |
1720 | char bytes[20]; | |
800eeca4 JW |
1721 | int count = 3; |
1722 | bytes[0] = UNW_X2; | |
e0c9811a | 1723 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1724 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1725 | count += output_leb128 (bytes + 3, t, 0); | |
1726 | (*f) (count, bytes, NULL); | |
1727 | } | |
1728 | ||
1729 | static void | |
e0c9811a | 1730 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1731 | vbyte_func f; |
1732 | unw_record_type rtype; | |
1733 | int qp; | |
e0c9811a | 1734 | int ab, reg; |
800eeca4 JW |
1735 | unsigned long t; |
1736 | unsigned long w1; | |
1737 | { | |
1738 | char bytes[20]; | |
e0c9811a | 1739 | int r = 0; |
800eeca4 | 1740 | int count = 3; |
e0c9811a JW |
1741 | bytes[0] = UNW_X3; |
1742 | ||
1743 | if (rtype == spill_sprel_p) | |
1744 | r = 1; | |
1745 | else if (rtype != spill_psprel_p) | |
ad4b42b4 | 1746 | as_bad (_("Invalid record type for format X3")); |
800eeca4 | 1747 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1748 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1749 | count += output_leb128 (bytes + 3, t, 0); |
1750 | count += output_leb128 (bytes + count, w1, 0); | |
1751 | (*f) (count, bytes, NULL); | |
1752 | } | |
1753 | ||
1754 | static void | |
e0c9811a | 1755 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1756 | vbyte_func f; |
1757 | int qp; | |
e0c9811a | 1758 | int ab, reg; |
800eeca4 JW |
1759 | int x, y, treg; |
1760 | unsigned long t; | |
1761 | { | |
1762 | char bytes[20]; | |
800eeca4 | 1763 | int count = 4; |
e0c9811a | 1764 | bytes[0] = UNW_X4; |
800eeca4 | 1765 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1766 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1767 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1768 | count += output_leb128 (bytes + 4, t, 0); | |
1769 | (*f) (count, bytes, NULL); | |
1770 | } | |
1771 | ||
ba825241 JB |
1772 | /* This function checks whether there are any outstanding .save-s and |
1773 | discards them if so. */ | |
1774 | ||
1775 | static void | |
1776 | check_pending_save (void) | |
1777 | { | |
1778 | if (unwind.pending_saves) | |
1779 | { | |
1780 | unw_rec_list *cur, *prev; | |
1781 | ||
ad4b42b4 | 1782 | as_warn (_("Previous .save incomplete")); |
ba825241 JB |
1783 | for (cur = unwind.list, prev = NULL; cur; ) |
1784 | if (&cur->r.record.p == unwind.pending_saves) | |
1785 | { | |
1786 | if (prev) | |
1787 | prev->next = cur->next; | |
1788 | else | |
1789 | unwind.list = cur->next; | |
1790 | if (cur == unwind.tail) | |
1791 | unwind.tail = prev; | |
1792 | if (cur == unwind.current_entry) | |
1793 | unwind.current_entry = cur->next; | |
1794 | /* Don't free the first discarded record, it's being used as | |
1795 | terminator for (currently) br_gr and gr_gr processing, and | |
1796 | also prevents leaving a dangling pointer to it in its | |
1797 | predecessor. */ | |
1798 | cur->r.record.p.grmask = 0; | |
1799 | cur->r.record.p.brmask = 0; | |
1800 | cur->r.record.p.frmask = 0; | |
1801 | prev = cur->r.record.p.next; | |
1802 | cur->r.record.p.next = NULL; | |
1803 | cur = prev; | |
1804 | break; | |
1805 | } | |
1806 | else | |
1807 | { | |
1808 | prev = cur; | |
1809 | cur = cur->next; | |
1810 | } | |
1811 | while (cur) | |
1812 | { | |
1813 | prev = cur; | |
1814 | cur = cur->r.record.p.next; | |
1815 | free (prev); | |
1816 | } | |
1817 | unwind.pending_saves = NULL; | |
1818 | } | |
1819 | } | |
1820 | ||
800eeca4 | 1821 | /* This function allocates a record list structure, and initializes fields. */ |
542d6675 | 1822 | |
800eeca4 | 1823 | static unw_rec_list * |
197865e8 | 1824 | alloc_record (unw_record_type t) |
800eeca4 JW |
1825 | { |
1826 | unw_rec_list *ptr; | |
1827 | ptr = xmalloc (sizeof (*ptr)); | |
ba825241 | 1828 | memset (ptr, 0, sizeof (*ptr)); |
800eeca4 JW |
1829 | ptr->slot_number = SLOT_NUM_NOT_SET; |
1830 | ptr->r.type = t; | |
1831 | return ptr; | |
1832 | } | |
1833 | ||
5738bc24 JW |
1834 | /* Dummy unwind record used for calculating the length of the last prologue or |
1835 | body region. */ | |
1836 | ||
1837 | static unw_rec_list * | |
1838 | output_endp () | |
1839 | { | |
1840 | unw_rec_list *ptr = alloc_record (endp); | |
1841 | return ptr; | |
1842 | } | |
1843 | ||
800eeca4 JW |
1844 | static unw_rec_list * |
1845 | output_prologue () | |
1846 | { | |
1847 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1848 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1849 | return ptr; |
1850 | } | |
1851 | ||
1852 | static unw_rec_list * | |
1853 | output_prologue_gr (saved_mask, reg) | |
1854 | unsigned int saved_mask; | |
1855 | unsigned int reg; | |
1856 | { | |
1857 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1858 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1859 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1860 | ptr->r.record.r.grsave = reg; |
1861 | return ptr; | |
1862 | } | |
1863 | ||
1864 | static unw_rec_list * | |
1865 | output_body () | |
1866 | { | |
1867 | unw_rec_list *ptr = alloc_record (body); | |
1868 | return ptr; | |
1869 | } | |
1870 | ||
1871 | static unw_rec_list * | |
1872 | output_mem_stack_f (size) | |
1873 | unsigned int size; | |
1874 | { | |
1875 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1876 | ptr->r.record.p.size = size; | |
1877 | return ptr; | |
1878 | } | |
1879 | ||
1880 | static unw_rec_list * | |
1881 | output_mem_stack_v () | |
1882 | { | |
1883 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1884 | return ptr; | |
1885 | } | |
1886 | ||
1887 | static unw_rec_list * | |
1888 | output_psp_gr (gr) | |
1889 | unsigned int gr; | |
1890 | { | |
1891 | unw_rec_list *ptr = alloc_record (psp_gr); | |
ba825241 | 1892 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1893 | return ptr; |
1894 | } | |
1895 | ||
1896 | static unw_rec_list * | |
1897 | output_psp_sprel (offset) | |
1898 | unsigned int offset; | |
1899 | { | |
1900 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
ba825241 | 1901 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1902 | return ptr; |
1903 | } | |
1904 | ||
1905 | static unw_rec_list * | |
1906 | output_rp_when () | |
1907 | { | |
1908 | unw_rec_list *ptr = alloc_record (rp_when); | |
1909 | return ptr; | |
1910 | } | |
1911 | ||
1912 | static unw_rec_list * | |
1913 | output_rp_gr (gr) | |
1914 | unsigned int gr; | |
1915 | { | |
1916 | unw_rec_list *ptr = alloc_record (rp_gr); | |
ba825241 | 1917 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1918 | return ptr; |
1919 | } | |
1920 | ||
1921 | static unw_rec_list * | |
1922 | output_rp_br (br) | |
1923 | unsigned int br; | |
1924 | { | |
1925 | unw_rec_list *ptr = alloc_record (rp_br); | |
ba825241 | 1926 | ptr->r.record.p.r.br = br; |
800eeca4 JW |
1927 | return ptr; |
1928 | } | |
1929 | ||
1930 | static unw_rec_list * | |
1931 | output_rp_psprel (offset) | |
1932 | unsigned int offset; | |
1933 | { | |
1934 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
ba825241 | 1935 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1936 | return ptr; |
1937 | } | |
1938 | ||
1939 | static unw_rec_list * | |
1940 | output_rp_sprel (offset) | |
1941 | unsigned int offset; | |
1942 | { | |
1943 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
ba825241 | 1944 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1945 | return ptr; |
1946 | } | |
1947 | ||
1948 | static unw_rec_list * | |
1949 | output_pfs_when () | |
1950 | { | |
1951 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1952 | return ptr; | |
1953 | } | |
1954 | ||
1955 | static unw_rec_list * | |
1956 | output_pfs_gr (gr) | |
1957 | unsigned int gr; | |
1958 | { | |
1959 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
ba825241 | 1960 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1961 | return ptr; |
1962 | } | |
1963 | ||
1964 | static unw_rec_list * | |
1965 | output_pfs_psprel (offset) | |
1966 | unsigned int offset; | |
1967 | { | |
1968 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
ba825241 | 1969 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1970 | return ptr; |
1971 | } | |
1972 | ||
1973 | static unw_rec_list * | |
1974 | output_pfs_sprel (offset) | |
1975 | unsigned int offset; | |
1976 | { | |
1977 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
ba825241 | 1978 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1979 | return ptr; |
1980 | } | |
1981 | ||
1982 | static unw_rec_list * | |
1983 | output_preds_when () | |
1984 | { | |
1985 | unw_rec_list *ptr = alloc_record (preds_when); | |
1986 | return ptr; | |
1987 | } | |
1988 | ||
1989 | static unw_rec_list * | |
1990 | output_preds_gr (gr) | |
1991 | unsigned int gr; | |
1992 | { | |
1993 | unw_rec_list *ptr = alloc_record (preds_gr); | |
ba825241 | 1994 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1995 | return ptr; |
1996 | } | |
1997 | ||
1998 | static unw_rec_list * | |
1999 | output_preds_psprel (offset) | |
2000 | unsigned int offset; | |
2001 | { | |
2002 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
ba825241 | 2003 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2004 | return ptr; |
2005 | } | |
2006 | ||
2007 | static unw_rec_list * | |
2008 | output_preds_sprel (offset) | |
2009 | unsigned int offset; | |
2010 | { | |
2011 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
ba825241 | 2012 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2013 | return ptr; |
2014 | } | |
2015 | ||
2016 | static unw_rec_list * | |
2017 | output_fr_mem (mask) | |
2018 | unsigned int mask; | |
2019 | { | |
2020 | unw_rec_list *ptr = alloc_record (fr_mem); | |
ba825241 JB |
2021 | unw_rec_list *cur = ptr; |
2022 | ||
2023 | ptr->r.record.p.frmask = mask; | |
2024 | unwind.pending_saves = &ptr->r.record.p; | |
2025 | for (;;) | |
2026 | { | |
2027 | unw_rec_list *prev = cur; | |
2028 | ||
2029 | /* Clear least significant set bit. */ | |
2030 | mask &= ~(mask & (~mask + 1)); | |
2031 | if (!mask) | |
2032 | return ptr; | |
2033 | cur = alloc_record (fr_mem); | |
2034 | cur->r.record.p.frmask = mask; | |
2035 | /* Retain only least significant bit. */ | |
2036 | prev->r.record.p.frmask ^= mask; | |
2037 | prev->r.record.p.next = cur; | |
2038 | } | |
800eeca4 JW |
2039 | } |
2040 | ||
2041 | static unw_rec_list * | |
2042 | output_frgr_mem (gr_mask, fr_mask) | |
2043 | unsigned int gr_mask; | |
2044 | unsigned int fr_mask; | |
2045 | { | |
2046 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
ba825241 JB |
2047 | unw_rec_list *cur = ptr; |
2048 | ||
2049 | unwind.pending_saves = &cur->r.record.p; | |
2050 | cur->r.record.p.frmask = fr_mask; | |
2051 | while (fr_mask) | |
2052 | { | |
2053 | unw_rec_list *prev = cur; | |
2054 | ||
2055 | /* Clear least significant set bit. */ | |
2056 | fr_mask &= ~(fr_mask & (~fr_mask + 1)); | |
2057 | if (!gr_mask && !fr_mask) | |
2058 | return ptr; | |
2059 | cur = alloc_record (frgr_mem); | |
2060 | cur->r.record.p.frmask = fr_mask; | |
2061 | /* Retain only least significant bit. */ | |
2062 | prev->r.record.p.frmask ^= fr_mask; | |
2063 | prev->r.record.p.next = cur; | |
2064 | } | |
2065 | cur->r.record.p.grmask = gr_mask; | |
2066 | for (;;) | |
2067 | { | |
2068 | unw_rec_list *prev = cur; | |
2069 | ||
2070 | /* Clear least significant set bit. */ | |
2071 | gr_mask &= ~(gr_mask & (~gr_mask + 1)); | |
2072 | if (!gr_mask) | |
2073 | return ptr; | |
2074 | cur = alloc_record (frgr_mem); | |
2075 | cur->r.record.p.grmask = gr_mask; | |
2076 | /* Retain only least significant bit. */ | |
2077 | prev->r.record.p.grmask ^= gr_mask; | |
2078 | prev->r.record.p.next = cur; | |
2079 | } | |
800eeca4 JW |
2080 | } |
2081 | ||
2082 | static unw_rec_list * | |
2083 | output_gr_gr (mask, reg) | |
2084 | unsigned int mask; | |
2085 | unsigned int reg; | |
2086 | { | |
2087 | unw_rec_list *ptr = alloc_record (gr_gr); | |
ba825241 JB |
2088 | unw_rec_list *cur = ptr; |
2089 | ||
800eeca4 | 2090 | ptr->r.record.p.grmask = mask; |
ba825241 JB |
2091 | ptr->r.record.p.r.gr = reg; |
2092 | unwind.pending_saves = &ptr->r.record.p; | |
2093 | for (;;) | |
2094 | { | |
2095 | unw_rec_list *prev = cur; | |
2096 | ||
2097 | /* Clear least significant set bit. */ | |
2098 | mask &= ~(mask & (~mask + 1)); | |
2099 | if (!mask) | |
2100 | return ptr; | |
2101 | cur = alloc_record (gr_gr); | |
2102 | cur->r.record.p.grmask = mask; | |
2103 | /* Indicate this record shouldn't be output. */ | |
2104 | cur->r.record.p.r.gr = REG_NUM; | |
2105 | /* Retain only least significant bit. */ | |
2106 | prev->r.record.p.grmask ^= mask; | |
2107 | prev->r.record.p.next = cur; | |
2108 | } | |
800eeca4 JW |
2109 | } |
2110 | ||
2111 | static unw_rec_list * | |
2112 | output_gr_mem (mask) | |
2113 | unsigned int mask; | |
2114 | { | |
2115 | unw_rec_list *ptr = alloc_record (gr_mem); | |
ba825241 JB |
2116 | unw_rec_list *cur = ptr; |
2117 | ||
2118 | ptr->r.record.p.grmask = mask; | |
2119 | unwind.pending_saves = &ptr->r.record.p; | |
2120 | for (;;) | |
2121 | { | |
2122 | unw_rec_list *prev = cur; | |
2123 | ||
2124 | /* Clear least significant set bit. */ | |
2125 | mask &= ~(mask & (~mask + 1)); | |
2126 | if (!mask) | |
2127 | return ptr; | |
2128 | cur = alloc_record (gr_mem); | |
2129 | cur->r.record.p.grmask = mask; | |
2130 | /* Retain only least significant bit. */ | |
2131 | prev->r.record.p.grmask ^= mask; | |
2132 | prev->r.record.p.next = cur; | |
2133 | } | |
800eeca4 JW |
2134 | } |
2135 | ||
2136 | static unw_rec_list * | |
2137 | output_br_mem (unsigned int mask) | |
2138 | { | |
2139 | unw_rec_list *ptr = alloc_record (br_mem); | |
ba825241 JB |
2140 | unw_rec_list *cur = ptr; |
2141 | ||
800eeca4 | 2142 | ptr->r.record.p.brmask = mask; |
ba825241 JB |
2143 | unwind.pending_saves = &ptr->r.record.p; |
2144 | for (;;) | |
2145 | { | |
2146 | unw_rec_list *prev = cur; | |
2147 | ||
2148 | /* Clear least significant set bit. */ | |
2149 | mask &= ~(mask & (~mask + 1)); | |
2150 | if (!mask) | |
2151 | return ptr; | |
2152 | cur = alloc_record (br_mem); | |
2153 | cur->r.record.p.brmask = mask; | |
2154 | /* Retain only least significant bit. */ | |
2155 | prev->r.record.p.brmask ^= mask; | |
2156 | prev->r.record.p.next = cur; | |
2157 | } | |
800eeca4 JW |
2158 | } |
2159 | ||
2160 | static unw_rec_list * | |
ba825241 JB |
2161 | output_br_gr (mask, reg) |
2162 | unsigned int mask; | |
800eeca4 JW |
2163 | unsigned int reg; |
2164 | { | |
2165 | unw_rec_list *ptr = alloc_record (br_gr); | |
ba825241 JB |
2166 | unw_rec_list *cur = ptr; |
2167 | ||
2168 | ptr->r.record.p.brmask = mask; | |
2169 | ptr->r.record.p.r.gr = reg; | |
2170 | unwind.pending_saves = &ptr->r.record.p; | |
2171 | for (;;) | |
2172 | { | |
2173 | unw_rec_list *prev = cur; | |
2174 | ||
2175 | /* Clear least significant set bit. */ | |
2176 | mask &= ~(mask & (~mask + 1)); | |
2177 | if (!mask) | |
2178 | return ptr; | |
2179 | cur = alloc_record (br_gr); | |
2180 | cur->r.record.p.brmask = mask; | |
2181 | /* Indicate this record shouldn't be output. */ | |
2182 | cur->r.record.p.r.gr = REG_NUM; | |
2183 | /* Retain only least significant bit. */ | |
2184 | prev->r.record.p.brmask ^= mask; | |
2185 | prev->r.record.p.next = cur; | |
2186 | } | |
800eeca4 JW |
2187 | } |
2188 | ||
2189 | static unw_rec_list * | |
2190 | output_spill_base (offset) | |
2191 | unsigned int offset; | |
2192 | { | |
2193 | unw_rec_list *ptr = alloc_record (spill_base); | |
ba825241 | 2194 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2195 | return ptr; |
2196 | } | |
2197 | ||
2198 | static unw_rec_list * | |
2199 | output_unat_when () | |
2200 | { | |
2201 | unw_rec_list *ptr = alloc_record (unat_when); | |
2202 | return ptr; | |
2203 | } | |
2204 | ||
2205 | static unw_rec_list * | |
2206 | output_unat_gr (gr) | |
2207 | unsigned int gr; | |
2208 | { | |
2209 | unw_rec_list *ptr = alloc_record (unat_gr); | |
ba825241 | 2210 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2211 | return ptr; |
2212 | } | |
2213 | ||
2214 | static unw_rec_list * | |
2215 | output_unat_psprel (offset) | |
2216 | unsigned int offset; | |
2217 | { | |
2218 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
ba825241 | 2219 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2220 | return ptr; |
2221 | } | |
2222 | ||
2223 | static unw_rec_list * | |
2224 | output_unat_sprel (offset) | |
2225 | unsigned int offset; | |
2226 | { | |
2227 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
ba825241 | 2228 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2229 | return ptr; |
2230 | } | |
2231 | ||
2232 | static unw_rec_list * | |
2233 | output_lc_when () | |
2234 | { | |
2235 | unw_rec_list *ptr = alloc_record (lc_when); | |
2236 | return ptr; | |
2237 | } | |
2238 | ||
2239 | static unw_rec_list * | |
2240 | output_lc_gr (gr) | |
2241 | unsigned int gr; | |
2242 | { | |
2243 | unw_rec_list *ptr = alloc_record (lc_gr); | |
ba825241 | 2244 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2245 | return ptr; |
2246 | } | |
2247 | ||
2248 | static unw_rec_list * | |
2249 | output_lc_psprel (offset) | |
2250 | unsigned int offset; | |
2251 | { | |
2252 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
ba825241 | 2253 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2254 | return ptr; |
2255 | } | |
2256 | ||
2257 | static unw_rec_list * | |
2258 | output_lc_sprel (offset) | |
2259 | unsigned int offset; | |
2260 | { | |
2261 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
ba825241 | 2262 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2263 | return ptr; |
2264 | } | |
2265 | ||
2266 | static unw_rec_list * | |
2267 | output_fpsr_when () | |
2268 | { | |
2269 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2270 | return ptr; | |
2271 | } | |
2272 | ||
2273 | static unw_rec_list * | |
2274 | output_fpsr_gr (gr) | |
2275 | unsigned int gr; | |
2276 | { | |
2277 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
ba825241 | 2278 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2279 | return ptr; |
2280 | } | |
2281 | ||
2282 | static unw_rec_list * | |
2283 | output_fpsr_psprel (offset) | |
2284 | unsigned int offset; | |
2285 | { | |
2286 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
ba825241 | 2287 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2288 | return ptr; |
2289 | } | |
2290 | ||
2291 | static unw_rec_list * | |
2292 | output_fpsr_sprel (offset) | |
2293 | unsigned int offset; | |
2294 | { | |
2295 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
ba825241 | 2296 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2297 | return ptr; |
2298 | } | |
2299 | ||
2300 | static unw_rec_list * | |
2301 | output_priunat_when_gr () | |
2302 | { | |
2303 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2304 | return ptr; | |
2305 | } | |
2306 | ||
2307 | static unw_rec_list * | |
2308 | output_priunat_when_mem () | |
2309 | { | |
2310 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2311 | return ptr; | |
2312 | } | |
2313 | ||
2314 | static unw_rec_list * | |
2315 | output_priunat_gr (gr) | |
2316 | unsigned int gr; | |
2317 | { | |
2318 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
ba825241 | 2319 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2320 | return ptr; |
2321 | } | |
2322 | ||
2323 | static unw_rec_list * | |
2324 | output_priunat_psprel (offset) | |
2325 | unsigned int offset; | |
2326 | { | |
2327 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
ba825241 | 2328 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2329 | return ptr; |
2330 | } | |
2331 | ||
2332 | static unw_rec_list * | |
2333 | output_priunat_sprel (offset) | |
2334 | unsigned int offset; | |
2335 | { | |
2336 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
ba825241 | 2337 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2338 | return ptr; |
2339 | } | |
2340 | ||
2341 | static unw_rec_list * | |
2342 | output_bsp_when () | |
2343 | { | |
2344 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2345 | return ptr; | |
2346 | } | |
2347 | ||
2348 | static unw_rec_list * | |
2349 | output_bsp_gr (gr) | |
2350 | unsigned int gr; | |
2351 | { | |
2352 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
ba825241 | 2353 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2354 | return ptr; |
2355 | } | |
2356 | ||
2357 | static unw_rec_list * | |
2358 | output_bsp_psprel (offset) | |
2359 | unsigned int offset; | |
2360 | { | |
2361 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
ba825241 | 2362 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2363 | return ptr; |
2364 | } | |
2365 | ||
2366 | static unw_rec_list * | |
2367 | output_bsp_sprel (offset) | |
2368 | unsigned int offset; | |
2369 | { | |
2370 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
ba825241 | 2371 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2372 | return ptr; |
2373 | } | |
2374 | ||
2375 | static unw_rec_list * | |
2376 | output_bspstore_when () | |
2377 | { | |
2378 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2379 | return ptr; | |
2380 | } | |
2381 | ||
2382 | static unw_rec_list * | |
2383 | output_bspstore_gr (gr) | |
2384 | unsigned int gr; | |
2385 | { | |
2386 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
ba825241 | 2387 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2388 | return ptr; |
2389 | } | |
2390 | ||
2391 | static unw_rec_list * | |
2392 | output_bspstore_psprel (offset) | |
2393 | unsigned int offset; | |
2394 | { | |
2395 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
ba825241 | 2396 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2397 | return ptr; |
2398 | } | |
2399 | ||
2400 | static unw_rec_list * | |
2401 | output_bspstore_sprel (offset) | |
2402 | unsigned int offset; | |
2403 | { | |
2404 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
ba825241 | 2405 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2406 | return ptr; |
2407 | } | |
2408 | ||
2409 | static unw_rec_list * | |
2410 | output_rnat_when () | |
2411 | { | |
2412 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2413 | return ptr; | |
2414 | } | |
2415 | ||
2416 | static unw_rec_list * | |
2417 | output_rnat_gr (gr) | |
2418 | unsigned int gr; | |
2419 | { | |
2420 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
ba825241 | 2421 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2422 | return ptr; |
2423 | } | |
2424 | ||
2425 | static unw_rec_list * | |
2426 | output_rnat_psprel (offset) | |
2427 | unsigned int offset; | |
2428 | { | |
2429 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
ba825241 | 2430 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2431 | return ptr; |
2432 | } | |
2433 | ||
2434 | static unw_rec_list * | |
2435 | output_rnat_sprel (offset) | |
2436 | unsigned int offset; | |
2437 | { | |
2438 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
ba825241 | 2439 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2440 | return ptr; |
2441 | } | |
2442 | ||
2443 | static unw_rec_list * | |
e0c9811a JW |
2444 | output_unwabi (abi, context) |
2445 | unsigned long abi; | |
2446 | unsigned long context; | |
800eeca4 | 2447 | { |
e0c9811a JW |
2448 | unw_rec_list *ptr = alloc_record (unwabi); |
2449 | ptr->r.record.p.abi = abi; | |
2450 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2451 | return ptr; |
2452 | } | |
2453 | ||
2454 | static unw_rec_list * | |
e0c9811a | 2455 | output_epilogue (unsigned long ecount) |
800eeca4 | 2456 | { |
e0c9811a JW |
2457 | unw_rec_list *ptr = alloc_record (epilogue); |
2458 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2459 | return ptr; |
2460 | } | |
2461 | ||
2462 | static unw_rec_list * | |
e0c9811a | 2463 | output_label_state (unsigned long label) |
800eeca4 | 2464 | { |
e0c9811a JW |
2465 | unw_rec_list *ptr = alloc_record (label_state); |
2466 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2467 | return ptr; |
2468 | } | |
2469 | ||
2470 | static unw_rec_list * | |
e0c9811a JW |
2471 | output_copy_state (unsigned long label) |
2472 | { | |
2473 | unw_rec_list *ptr = alloc_record (copy_state); | |
2474 | ptr->r.record.b.label = label; | |
2475 | return ptr; | |
2476 | } | |
2477 | ||
2478 | static unw_rec_list * | |
e4e8248d | 2479 | output_spill_psprel (ab, reg, offset, predicate) |
e0c9811a | 2480 | unsigned int ab; |
800eeca4 JW |
2481 | unsigned int reg; |
2482 | unsigned int offset; | |
2483 | unsigned int predicate; | |
2484 | { | |
e4e8248d | 2485 | unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); |
e0c9811a | 2486 | ptr->r.record.x.ab = ab; |
800eeca4 | 2487 | ptr->r.record.x.reg = reg; |
ba825241 | 2488 | ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2489 | ptr->r.record.x.qp = predicate; |
2490 | return ptr; | |
2491 | } | |
2492 | ||
2493 | static unw_rec_list * | |
e4e8248d | 2494 | output_spill_sprel (ab, reg, offset, predicate) |
e0c9811a | 2495 | unsigned int ab; |
800eeca4 JW |
2496 | unsigned int reg; |
2497 | unsigned int offset; | |
2498 | unsigned int predicate; | |
2499 | { | |
e4e8248d | 2500 | unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); |
e0c9811a | 2501 | ptr->r.record.x.ab = ab; |
800eeca4 | 2502 | ptr->r.record.x.reg = reg; |
ba825241 | 2503 | ptr->r.record.x.where.spoff = offset / 4; |
800eeca4 JW |
2504 | ptr->r.record.x.qp = predicate; |
2505 | return ptr; | |
2506 | } | |
2507 | ||
2508 | static unw_rec_list * | |
e4e8248d | 2509 | output_spill_reg (ab, reg, targ_reg, xy, predicate) |
e0c9811a | 2510 | unsigned int ab; |
800eeca4 JW |
2511 | unsigned int reg; |
2512 | unsigned int targ_reg; | |
2513 | unsigned int xy; | |
2514 | unsigned int predicate; | |
2515 | { | |
e4e8248d | 2516 | unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); |
e0c9811a | 2517 | ptr->r.record.x.ab = ab; |
800eeca4 | 2518 | ptr->r.record.x.reg = reg; |
ba825241 | 2519 | ptr->r.record.x.where.reg = targ_reg; |
800eeca4 JW |
2520 | ptr->r.record.x.xy = xy; |
2521 | ptr->r.record.x.qp = predicate; | |
2522 | return ptr; | |
2523 | } | |
2524 | ||
197865e8 | 2525 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2526 | specified function. */ |
542d6675 | 2527 | |
800eeca4 JW |
2528 | static void |
2529 | process_one_record (ptr, f) | |
2530 | unw_rec_list *ptr; | |
2531 | vbyte_func f; | |
2532 | { | |
ba825241 | 2533 | unsigned int fr_mask, gr_mask; |
e0c9811a | 2534 | |
197865e8 | 2535 | switch (ptr->r.type) |
800eeca4 | 2536 | { |
5738bc24 JW |
2537 | /* This is a dummy record that takes up no space in the output. */ |
2538 | case endp: | |
2539 | break; | |
2540 | ||
542d6675 KH |
2541 | case gr_mem: |
2542 | case fr_mem: | |
2543 | case br_mem: | |
2544 | case frgr_mem: | |
2545 | /* These are taken care of by prologue/prologue_gr. */ | |
2546 | break; | |
e0c9811a | 2547 | |
542d6675 KH |
2548 | case prologue_gr: |
2549 | case prologue: | |
2550 | if (ptr->r.type == prologue_gr) | |
2551 | output_R2_format (f, ptr->r.record.r.grmask, | |
2552 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2553 | else | |
800eeca4 | 2554 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2555 | |
2556 | /* Output descriptor(s) for union of register spills (if any). */ | |
2557 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2558 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2559 | if (fr_mask) | |
2560 | { | |
2561 | if ((fr_mask & ~0xfUL) == 0) | |
2562 | output_P6_format (f, fr_mem, fr_mask); | |
2563 | else | |
2564 | { | |
2565 | output_P5_format (f, gr_mask, fr_mask); | |
2566 | gr_mask = 0; | |
2567 | } | |
2568 | } | |
2569 | if (gr_mask) | |
2570 | output_P6_format (f, gr_mem, gr_mask); | |
2571 | if (ptr->r.record.r.mask.br_mem) | |
2572 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2573 | ||
2574 | /* output imask descriptor if necessary: */ | |
2575 | if (ptr->r.record.r.mask.i) | |
2576 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2577 | ptr->r.record.r.imask_size); | |
2578 | break; | |
2579 | ||
2580 | case body: | |
2581 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2582 | break; | |
2583 | case mem_stack_f: | |
2584 | case mem_stack_v: | |
2585 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2586 | ptr->r.record.p.size); | |
2587 | break; | |
2588 | case psp_gr: | |
2589 | case rp_gr: | |
2590 | case pfs_gr: | |
2591 | case preds_gr: | |
2592 | case unat_gr: | |
2593 | case lc_gr: | |
2594 | case fpsr_gr: | |
2595 | case priunat_gr: | |
2596 | case bsp_gr: | |
2597 | case bspstore_gr: | |
2598 | case rnat_gr: | |
ba825241 | 2599 | output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); |
542d6675 KH |
2600 | break; |
2601 | case rp_br: | |
ba825241 | 2602 | output_P3_format (f, rp_br, ptr->r.record.p.r.br); |
542d6675 KH |
2603 | break; |
2604 | case psp_sprel: | |
ba825241 | 2605 | output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); |
542d6675 KH |
2606 | break; |
2607 | case rp_when: | |
2608 | case pfs_when: | |
2609 | case preds_when: | |
2610 | case unat_when: | |
2611 | case lc_when: | |
2612 | case fpsr_when: | |
2613 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2614 | break; | |
2615 | case rp_psprel: | |
2616 | case pfs_psprel: | |
2617 | case preds_psprel: | |
2618 | case unat_psprel: | |
2619 | case lc_psprel: | |
2620 | case fpsr_psprel: | |
2621 | case spill_base: | |
ba825241 | 2622 | output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); |
542d6675 KH |
2623 | break; |
2624 | case rp_sprel: | |
2625 | case pfs_sprel: | |
2626 | case preds_sprel: | |
2627 | case unat_sprel: | |
2628 | case lc_sprel: | |
2629 | case fpsr_sprel: | |
2630 | case priunat_sprel: | |
2631 | case bsp_sprel: | |
2632 | case bspstore_sprel: | |
2633 | case rnat_sprel: | |
ba825241 | 2634 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); |
542d6675 KH |
2635 | break; |
2636 | case gr_gr: | |
ba825241 JB |
2637 | if (ptr->r.record.p.r.gr < REG_NUM) |
2638 | { | |
2639 | const unw_rec_list *cur = ptr; | |
2640 | ||
2641 | gr_mask = cur->r.record.p.grmask; | |
2642 | while ((cur = cur->r.record.p.next) != NULL) | |
2643 | gr_mask |= cur->r.record.p.grmask; | |
2644 | output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2645 | } | |
542d6675 KH |
2646 | break; |
2647 | case br_gr: | |
ba825241 JB |
2648 | if (ptr->r.record.p.r.gr < REG_NUM) |
2649 | { | |
2650 | const unw_rec_list *cur = ptr; | |
2651 | ||
2652 | gr_mask = cur->r.record.p.brmask; | |
2653 | while ((cur = cur->r.record.p.next) != NULL) | |
2654 | gr_mask |= cur->r.record.p.brmask; | |
2655 | output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2656 | } | |
542d6675 KH |
2657 | break; |
2658 | case spill_mask: | |
ad4b42b4 | 2659 | as_bad (_("spill_mask record unimplemented.")); |
542d6675 KH |
2660 | break; |
2661 | case priunat_when_gr: | |
2662 | case priunat_when_mem: | |
2663 | case bsp_when: | |
2664 | case bspstore_when: | |
2665 | case rnat_when: | |
2666 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2667 | break; | |
2668 | case priunat_psprel: | |
2669 | case bsp_psprel: | |
2670 | case bspstore_psprel: | |
2671 | case rnat_psprel: | |
ba825241 | 2672 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); |
542d6675 KH |
2673 | break; |
2674 | case unwabi: | |
2675 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2676 | break; | |
2677 | case epilogue: | |
2678 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2679 | break; | |
2680 | case label_state: | |
2681 | case copy_state: | |
2682 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2683 | break; | |
2684 | case spill_psprel: | |
2685 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2686 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2687 | ptr->r.record.x.where.pspoff); |
542d6675 KH |
2688 | break; |
2689 | case spill_sprel: | |
2690 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2691 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2692 | ptr->r.record.x.where.spoff); |
542d6675 KH |
2693 | break; |
2694 | case spill_reg: | |
2695 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2696 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
ba825241 | 2697 | ptr->r.record.x.where.reg, ptr->r.record.x.t); |
542d6675 KH |
2698 | break; |
2699 | case spill_psprel_p: | |
2700 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2701 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2702 | ptr->r.record.x.t, ptr->r.record.x.where.pspoff); |
542d6675 KH |
2703 | break; |
2704 | case spill_sprel_p: | |
2705 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2706 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2707 | ptr->r.record.x.t, ptr->r.record.x.where.spoff); |
542d6675 KH |
2708 | break; |
2709 | case spill_reg_p: | |
2710 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2711 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
ba825241 | 2712 | ptr->r.record.x.xy, ptr->r.record.x.where.reg, |
542d6675 KH |
2713 | ptr->r.record.x.t); |
2714 | break; | |
2715 | default: | |
ad4b42b4 | 2716 | as_bad (_("record_type_not_valid")); |
542d6675 | 2717 | break; |
800eeca4 JW |
2718 | } |
2719 | } | |
2720 | ||
197865e8 | 2721 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2722 | the specified function. */ |
2723 | static void | |
2724 | process_unw_records (list, f) | |
2725 | unw_rec_list *list; | |
2726 | vbyte_func f; | |
2727 | { | |
2728 | unw_rec_list *ptr; | |
2729 | for (ptr = list; ptr; ptr = ptr->next) | |
2730 | process_one_record (ptr, f); | |
2731 | } | |
2732 | ||
2733 | /* Determine the size of a record list in bytes. */ | |
2734 | static int | |
2735 | calc_record_size (list) | |
2736 | unw_rec_list *list; | |
2737 | { | |
2738 | vbyte_count = 0; | |
2739 | process_unw_records (list, count_output); | |
2740 | return vbyte_count; | |
2741 | } | |
2742 | ||
e4e8248d JB |
2743 | /* Return the number of bits set in the input value. |
2744 | Perhaps this has a better place... */ | |
2745 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) | |
2746 | # define popcount __builtin_popcount | |
2747 | #else | |
2748 | static int | |
2749 | popcount (unsigned x) | |
2750 | { | |
2751 | static const unsigned char popcnt[16] = | |
2752 | { | |
2753 | 0, 1, 1, 2, | |
2754 | 1, 2, 2, 3, | |
2755 | 1, 2, 2, 3, | |
2756 | 2, 3, 3, 4 | |
2757 | }; | |
2758 | ||
2759 | if (x < NELEMS (popcnt)) | |
2760 | return popcnt[x]; | |
2761 | return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); | |
2762 | } | |
2763 | #endif | |
2764 | ||
e0c9811a JW |
2765 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2766 | of type TYPE are saved starting at instruction with index T. If N | |
2767 | bits are set in REGMASK, it is assumed that instructions T through | |
2768 | T+N-1 save these registers. | |
2769 | ||
2770 | TYPE values: | |
2771 | 0: no save | |
2772 | 1: instruction saves next fp reg | |
2773 | 2: instruction saves next general reg | |
2774 | 3: instruction saves next branch reg */ | |
2775 | static void | |
2776 | set_imask (region, regmask, t, type) | |
2777 | unw_rec_list *region; | |
2778 | unsigned long regmask; | |
2779 | unsigned long t; | |
2780 | unsigned int type; | |
2781 | { | |
2782 | unsigned char *imask; | |
2783 | unsigned long imask_size; | |
2784 | unsigned int i; | |
2785 | int pos; | |
2786 | ||
2787 | imask = region->r.record.r.mask.i; | |
2788 | imask_size = region->r.record.r.imask_size; | |
2789 | if (!imask) | |
2790 | { | |
542d6675 | 2791 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2792 | imask = xmalloc (imask_size); |
2793 | memset (imask, 0, imask_size); | |
2794 | ||
2795 | region->r.record.r.imask_size = imask_size; | |
2796 | region->r.record.r.mask.i = imask; | |
2797 | } | |
2798 | ||
542d6675 KH |
2799 | i = (t / 4) + 1; |
2800 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2801 | while (regmask) |
2802 | { | |
2803 | if (i >= imask_size) | |
2804 | { | |
ad4b42b4 | 2805 | as_bad (_("Ignoring attempt to spill beyond end of region")); |
e0c9811a JW |
2806 | return; |
2807 | } | |
2808 | ||
2809 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2810 | |
e0c9811a JW |
2811 | regmask &= (regmask - 1); |
2812 | pos -= 2; | |
2813 | if (pos < 0) | |
2814 | { | |
2815 | pos = 0; | |
2816 | ++i; | |
2817 | } | |
2818 | } | |
2819 | } | |
2820 | ||
f5a30c2e JW |
2821 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2822 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2823 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2824 | for frag sizes. */ | |
f5a30c2e | 2825 | |
e0c9811a | 2826 | unsigned long |
b5e0fabd | 2827 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2828 | unsigned long slot_addr; |
2829 | fragS *slot_frag; | |
2830 | unsigned long first_addr; | |
2831 | fragS *first_frag; | |
b5e0fabd | 2832 | int before_relax; |
e0c9811a | 2833 | { |
f5a30c2e JW |
2834 | unsigned long index = 0; |
2835 | ||
2836 | /* First time we are called, the initial address and frag are invalid. */ | |
2837 | if (first_addr == 0) | |
2838 | return 0; | |
2839 | ||
2840 | /* If the two addresses are in different frags, then we need to add in | |
2841 | the remaining size of this frag, and then the entire size of intermediate | |
2842 | frags. */ | |
4dddc1d1 | 2843 | while (slot_frag != first_frag) |
f5a30c2e JW |
2844 | { |
2845 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2846 | ||
b5e0fabd | 2847 | if (! before_relax) |
73f20958 | 2848 | { |
b5e0fabd JW |
2849 | /* We can get the final addresses only during and after |
2850 | relaxation. */ | |
73f20958 L |
2851 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2852 | index += 3 * ((first_frag->fr_next->fr_address | |
2853 | - first_frag->fr_address | |
2854 | - first_frag->fr_fix) >> 4); | |
2855 | } | |
2856 | else | |
2857 | /* We don't know what the final addresses will be. We try our | |
2858 | best to estimate. */ | |
2859 | switch (first_frag->fr_type) | |
2860 | { | |
2861 | default: | |
2862 | break; | |
2863 | ||
2864 | case rs_space: | |
ad4b42b4 | 2865 | as_fatal (_("Only constant space allocation is supported")); |
73f20958 L |
2866 | break; |
2867 | ||
2868 | case rs_align: | |
2869 | case rs_align_code: | |
2870 | case rs_align_test: | |
2871 | /* Take alignment into account. Assume the worst case | |
2872 | before relaxation. */ | |
2873 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2874 | break; | |
2875 | ||
2876 | case rs_org: | |
2877 | if (first_frag->fr_symbol) | |
2878 | { | |
ad4b42b4 | 2879 | as_fatal (_("Only constant offsets are supported")); |
73f20958 L |
2880 | break; |
2881 | } | |
2882 | case rs_fill: | |
2883 | index += 3 * (first_frag->fr_offset >> 4); | |
2884 | break; | |
2885 | } | |
2886 | ||
f5a30c2e JW |
2887 | /* Add in the full size of the frag converted to instruction slots. */ |
2888 | index += 3 * (first_frag->fr_fix >> 4); | |
2889 | /* Subtract away the initial part before first_addr. */ | |
2890 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2891 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2892 | |
f5a30c2e JW |
2893 | /* Move to the beginning of the next frag. */ |
2894 | first_frag = first_frag->fr_next; | |
2895 | first_addr = (unsigned long) &first_frag->fr_literal; | |
4dddc1d1 JW |
2896 | |
2897 | /* This can happen if there is section switching in the middle of a | |
cb3b8d91 JW |
2898 | function, causing the frag chain for the function to be broken. |
2899 | It is too difficult to recover safely from this problem, so we just | |
2900 | exit with an error. */ | |
4dddc1d1 | 2901 | if (first_frag == NULL) |
ad4b42b4 | 2902 | as_fatal (_("Section switching in code is not supported.")); |
f5a30c2e JW |
2903 | } |
2904 | ||
2905 | /* Add in the used part of the last frag. */ | |
2906 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2907 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2908 | return index; | |
2909 | } | |
4a1805b1 | 2910 | |
91a2ae2a RH |
2911 | /* Optimize unwind record directives. */ |
2912 | ||
2913 | static unw_rec_list * | |
2914 | optimize_unw_records (list) | |
2915 | unw_rec_list *list; | |
2916 | { | |
2917 | if (!list) | |
2918 | return NULL; | |
2919 | ||
2920 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2921 | by ".body", then we can optimize the unwind directives away. */ | |
2922 | if (list->r.type == prologue | |
5738bc24 JW |
2923 | && (list->next->r.type == endp |
2924 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2925 | return NULL; |
2926 | ||
2927 | return list; | |
2928 | } | |
2929 | ||
800eeca4 JW |
2930 | /* Given a complete record list, process any records which have |
2931 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2932 | this has been run, all necessary information should be available |
800eeca4 | 2933 | within each record to generate an image. */ |
542d6675 | 2934 | |
800eeca4 | 2935 | static void |
b5e0fabd | 2936 | fixup_unw_records (list, before_relax) |
800eeca4 | 2937 | unw_rec_list *list; |
b5e0fabd | 2938 | int before_relax; |
800eeca4 | 2939 | { |
e0c9811a JW |
2940 | unw_rec_list *ptr, *region = 0; |
2941 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2942 | fragS *first_frag = 0; |
e0c9811a | 2943 | |
800eeca4 JW |
2944 | for (ptr = list; ptr; ptr = ptr->next) |
2945 | { | |
2946 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
ad4b42b4 | 2947 | as_bad (_(" Insn slot not set in unwind record.")); |
f5a30c2e | 2948 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2949 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2950 | switch (ptr->r.type) |
2951 | { | |
542d6675 KH |
2952 | case prologue: |
2953 | case prologue_gr: | |
2954 | case body: | |
2955 | { | |
2956 | unw_rec_list *last; | |
5738bc24 JW |
2957 | int size; |
2958 | unsigned long last_addr = 0; | |
2959 | fragS *last_frag = NULL; | |
542d6675 KH |
2960 | |
2961 | first_addr = ptr->slot_number; | |
f5a30c2e | 2962 | first_frag = ptr->slot_frag; |
542d6675 | 2963 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2964 | the function, and determine the size of the region. */ |
542d6675 KH |
2965 | for (last = ptr->next; last != NULL; last = last->next) |
2966 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2967 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2968 | { |
2969 | last_addr = last->slot_number; | |
f5a30c2e | 2970 | last_frag = last->slot_frag; |
542d6675 KH |
2971 | break; |
2972 | } | |
b5e0fabd JW |
2973 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2974 | before_relax); | |
542d6675 | 2975 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2976 | if (ptr->r.type == body) |
2977 | /* End of region. */ | |
2978 | region = 0; | |
2979 | else | |
2980 | region = ptr; | |
e0c9811a | 2981 | break; |
542d6675 KH |
2982 | } |
2983 | case epilogue: | |
ed7af9f9 L |
2984 | if (t < rlen) |
2985 | ptr->r.record.b.t = rlen - 1 - t; | |
2986 | else | |
2987 | /* This happens when a memory-stack-less procedure uses a | |
2988 | ".restore sp" directive at the end of a region to pop | |
2989 | the frame state. */ | |
2990 | ptr->r.record.b.t = 0; | |
542d6675 | 2991 | break; |
e0c9811a | 2992 | |
542d6675 KH |
2993 | case mem_stack_f: |
2994 | case mem_stack_v: | |
2995 | case rp_when: | |
2996 | case pfs_when: | |
2997 | case preds_when: | |
2998 | case unat_when: | |
2999 | case lc_when: | |
3000 | case fpsr_when: | |
3001 | case priunat_when_gr: | |
3002 | case priunat_when_mem: | |
3003 | case bsp_when: | |
3004 | case bspstore_when: | |
3005 | case rnat_when: | |
3006 | ptr->r.record.p.t = t; | |
3007 | break; | |
e0c9811a | 3008 | |
542d6675 KH |
3009 | case spill_reg: |
3010 | case spill_sprel: | |
3011 | case spill_psprel: | |
3012 | case spill_reg_p: | |
3013 | case spill_sprel_p: | |
3014 | case spill_psprel_p: | |
3015 | ptr->r.record.x.t = t; | |
3016 | break; | |
e0c9811a | 3017 | |
542d6675 KH |
3018 | case frgr_mem: |
3019 | if (!region) | |
3020 | { | |
ad4b42b4 | 3021 | as_bad (_("frgr_mem record before region record!")); |
542d6675 KH |
3022 | return; |
3023 | } | |
3024 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
3025 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
3026 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
3027 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
3028 | break; | |
3029 | case fr_mem: | |
3030 | if (!region) | |
3031 | { | |
ad4b42b4 | 3032 | as_bad (_("fr_mem record before region record!")); |
542d6675 KH |
3033 | return; |
3034 | } | |
ba825241 JB |
3035 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; |
3036 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
542d6675 KH |
3037 | break; |
3038 | case gr_mem: | |
3039 | if (!region) | |
3040 | { | |
ad4b42b4 | 3041 | as_bad (_("gr_mem record before region record!")); |
542d6675 KH |
3042 | return; |
3043 | } | |
ba825241 JB |
3044 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; |
3045 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
542d6675 KH |
3046 | break; |
3047 | case br_mem: | |
3048 | if (!region) | |
3049 | { | |
ad4b42b4 | 3050 | as_bad (_("br_mem record before region record!")); |
542d6675 KH |
3051 | return; |
3052 | } | |
3053 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
3054 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
3055 | break; | |
e0c9811a | 3056 | |
542d6675 KH |
3057 | case gr_gr: |
3058 | if (!region) | |
3059 | { | |
ad4b42b4 | 3060 | as_bad (_("gr_gr record before region record!")); |
542d6675 KH |
3061 | return; |
3062 | } | |
3063 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
3064 | break; | |
3065 | case br_gr: | |
3066 | if (!region) | |
3067 | { | |
ad4b42b4 | 3068 | as_bad (_("br_gr record before region record!")); |
542d6675 KH |
3069 | return; |
3070 | } | |
3071 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
3072 | break; | |
e0c9811a | 3073 | |
542d6675 KH |
3074 | default: |
3075 | break; | |
800eeca4 JW |
3076 | } |
3077 | } | |
3078 | } | |
3079 | ||
b5e0fabd JW |
3080 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
3081 | to handle here, which is the unwind info frag. */ | |
3082 | ||
3083 | int | |
3084 | ia64_estimate_size_before_relax (fragS *frag, | |
3085 | asection *segtype ATTRIBUTE_UNUSED) | |
3086 | { | |
3087 | unw_rec_list *list; | |
3088 | int len, size, pad; | |
3089 | ||
3090 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
3091 | list = (unw_rec_list *) frag->fr_opcode; | |
3092 | fixup_unw_records (list, 0); | |
3093 | ||
3094 | len = calc_record_size (list); | |
3095 | /* pad to pointer-size boundary. */ | |
3096 | pad = len % md.pointer_size; | |
3097 | if (pad != 0) | |
3098 | len += md.pointer_size - pad; | |
f7e323d5 JB |
3099 | /* Add 8 for the header. */ |
3100 | size = len + 8; | |
3101 | /* Add a pointer for the personality offset. */ | |
3102 | if (frag->fr_offset) | |
3103 | size += md.pointer_size; | |
b5e0fabd JW |
3104 | |
3105 | /* fr_var carries the max_chars that we created the fragment with. | |
3106 | We must, of course, have allocated enough memory earlier. */ | |
3107 | assert (frag->fr_var >= size); | |
3108 | ||
3109 | return frag->fr_fix + size; | |
3110 | } | |
3111 | ||
73f20958 L |
3112 | /* This function converts a rs_machine_dependent variant frag into a |
3113 | normal fill frag with the unwind image from the the record list. */ | |
3114 | void | |
3115 | ia64_convert_frag (fragS *frag) | |
557debba | 3116 | { |
73f20958 L |
3117 | unw_rec_list *list; |
3118 | int len, size, pad; | |
1cd8ff38 | 3119 | valueT flag_value; |
557debba | 3120 | |
b5e0fabd | 3121 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 3122 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 3123 | fixup_unw_records (list, 0); |
1cd8ff38 | 3124 | |
73f20958 L |
3125 | len = calc_record_size (list); |
3126 | /* pad to pointer-size boundary. */ | |
3127 | pad = len % md.pointer_size; | |
3128 | if (pad != 0) | |
3129 | len += md.pointer_size - pad; | |
f7e323d5 JB |
3130 | /* Add 8 for the header. */ |
3131 | size = len + 8; | |
3132 | /* Add a pointer for the personality offset. */ | |
3133 | if (frag->fr_offset) | |
3134 | size += md.pointer_size; | |
73f20958 L |
3135 | |
3136 | /* fr_var carries the max_chars that we created the fragment with. | |
3137 | We must, of course, have allocated enough memory earlier. */ | |
3138 | assert (frag->fr_var >= size); | |
3139 | ||
3140 | /* Initialize the header area. fr_offset is initialized with | |
3141 | unwind.personality_routine. */ | |
3142 | if (frag->fr_offset) | |
1cd8ff38 NC |
3143 | { |
3144 | if (md.flags & EF_IA_64_ABI64) | |
3145 | flag_value = (bfd_vma) 3 << 32; | |
3146 | else | |
3147 | /* 32-bit unwind info block. */ | |
3148 | flag_value = (bfd_vma) 0x1003 << 32; | |
3149 | } | |
3150 | else | |
3151 | flag_value = 0; | |
557debba | 3152 | |
73f20958 L |
3153 | md_number_to_chars (frag->fr_literal, |
3154 | (((bfd_vma) 1 << 48) /* Version. */ | |
3155 | | flag_value /* U & E handler flags. */ | |
3156 | | (len / md.pointer_size)), /* Length. */ | |
3157 | 8); | |
557debba | 3158 | |
73f20958 L |
3159 | /* Skip the header. */ |
3160 | vbyte_mem_ptr = frag->fr_literal + 8; | |
3161 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
3162 | |
3163 | /* Fill the padding bytes with zeros. */ | |
3164 | if (pad != 0) | |
3165 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
3166 | md.pointer_size - pad); | |
3167 | ||
73f20958 L |
3168 | frag->fr_fix += size; |
3169 | frag->fr_type = rs_fill; | |
3170 | frag->fr_var = 0; | |
3171 | frag->fr_offset = 0; | |
800eeca4 JW |
3172 | } |
3173 | ||
e0c9811a | 3174 | static int |
e4e8248d JB |
3175 | parse_predicate_and_operand (e, qp, po) |
3176 | expressionS * e; | |
3177 | unsigned * qp; | |
3178 | const char * po; | |
3179 | { | |
3180 | int sep = parse_operand (e, ','); | |
3181 | ||
3182 | *qp = e->X_add_number - REG_P; | |
3183 | if (e->X_op != O_register || *qp > 63) | |
3184 | { | |
ad4b42b4 | 3185 | as_bad (_("First operand to .%s must be a predicate"), po); |
e4e8248d JB |
3186 | *qp = 0; |
3187 | } | |
3188 | else if (*qp == 0) | |
ad4b42b4 | 3189 | as_warn (_("Pointless use of p0 as first operand to .%s"), po); |
e4e8248d JB |
3190 | if (sep == ',') |
3191 | sep = parse_operand (e, ','); | |
3192 | else | |
3193 | e->X_op = O_absent; | |
3194 | return sep; | |
3195 | } | |
3196 | ||
3197 | static void | |
3198 | convert_expr_to_ab_reg (e, ab, regp, po, n) | |
3199 | const expressionS *e; | |
e0c9811a JW |
3200 | unsigned int *ab; |
3201 | unsigned int *regp; | |
e4e8248d JB |
3202 | const char * po; |
3203 | int n; | |
e0c9811a | 3204 | { |
e4e8248d JB |
3205 | unsigned int reg = e->X_add_number; |
3206 | ||
3207 | *ab = *regp = 0; /* Anything valid is good here. */ | |
e0c9811a JW |
3208 | |
3209 | if (e->X_op != O_register) | |
e4e8248d | 3210 | reg = REG_GR; /* Anything invalid is good here. */ |
e0c9811a | 3211 | |
2434f565 | 3212 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
3213 | { |
3214 | *ab = 0; | |
3215 | *regp = reg - REG_GR; | |
3216 | } | |
2434f565 JW |
3217 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
3218 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
3219 | { |
3220 | *ab = 1; | |
3221 | *regp = reg - REG_FR; | |
3222 | } | |
2434f565 | 3223 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3224 | { |
3225 | *ab = 2; | |
3226 | *regp = reg - REG_BR; | |
3227 | } | |
3228 | else | |
3229 | { | |
3230 | *ab = 3; | |
3231 | switch (reg) | |
3232 | { | |
3233 | case REG_PR: *regp = 0; break; | |
3234 | case REG_PSP: *regp = 1; break; | |
3235 | case REG_PRIUNAT: *regp = 2; break; | |
3236 | case REG_BR + 0: *regp = 3; break; | |
3237 | case REG_AR + AR_BSP: *regp = 4; break; | |
3238 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3239 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3240 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3241 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3242 | case REG_AR + AR_PFS: *regp = 9; break; | |
3243 | case REG_AR + AR_LC: *regp = 10; break; | |
3244 | ||
3245 | default: | |
ad4b42b4 | 3246 | as_bad (_("Operand %d to .%s must be a preserved register"), n, po); |
e4e8248d | 3247 | break; |
e0c9811a JW |
3248 | } |
3249 | } | |
197865e8 | 3250 | } |
e0c9811a | 3251 | |
e4e8248d JB |
3252 | static void |
3253 | convert_expr_to_xy_reg (e, xy, regp, po, n) | |
3254 | const expressionS *e; | |
e0c9811a JW |
3255 | unsigned int *xy; |
3256 | unsigned int *regp; | |
e4e8248d JB |
3257 | const char * po; |
3258 | int n; | |
e0c9811a | 3259 | { |
e4e8248d | 3260 | unsigned int reg = e->X_add_number; |
e0c9811a | 3261 | |
e4e8248d | 3262 | *xy = *regp = 0; /* Anything valid is good here. */ |
e0c9811a | 3263 | |
e4e8248d JB |
3264 | if (e->X_op != O_register) |
3265 | reg = REG_GR; /* Anything invalid is good here. */ | |
e0c9811a | 3266 | |
e4e8248d | 3267 | if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) |
e0c9811a JW |
3268 | { |
3269 | *xy = 0; | |
3270 | *regp = reg - REG_GR; | |
3271 | } | |
e4e8248d | 3272 | else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) |
e0c9811a JW |
3273 | { |
3274 | *xy = 1; | |
3275 | *regp = reg - REG_FR; | |
3276 | } | |
2434f565 | 3277 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3278 | { |
3279 | *xy = 2; | |
3280 | *regp = reg - REG_BR; | |
3281 | } | |
3282 | else | |
ad4b42b4 | 3283 | as_bad (_("Operand %d to .%s must be a writable register"), n, po); |
197865e8 | 3284 | } |
e0c9811a | 3285 | |
d9201763 L |
3286 | static void |
3287 | dot_align (int arg) | |
3288 | { | |
3289 | /* The current frag is an alignment frag. */ | |
3290 | align_frag = frag_now; | |
3291 | s_align_bytes (arg); | |
3292 | } | |
3293 | ||
800eeca4 JW |
3294 | static void |
3295 | dot_radix (dummy) | |
2434f565 | 3296 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3297 | { |
fa30c84f JB |
3298 | char *radix; |
3299 | int ch; | |
800eeca4 JW |
3300 | |
3301 | SKIP_WHITESPACE (); | |
800eeca4 | 3302 | |
fa30c84f JB |
3303 | if (is_it_end_of_statement ()) |
3304 | return; | |
3305 | radix = input_line_pointer; | |
3306 | ch = get_symbol_end (); | |
3307 | ia64_canonicalize_symbol_name (radix); | |
3308 | if (strcasecmp (radix, "C")) | |
ad4b42b4 | 3309 | as_bad (_("Radix `%s' unsupported or invalid"), radix); |
fa30c84f JB |
3310 | *input_line_pointer = ch; |
3311 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3312 | } |
3313 | ||
196e8040 JW |
3314 | /* Helper function for .loc directives. If the assembler is not generating |
3315 | line number info, then we need to remember which instructions have a .loc | |
3316 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3317 | ||
3318 | static void | |
3319 | dot_loc (int x) | |
3320 | { | |
3321 | CURR_SLOT.loc_directive_seen = 1; | |
3322 | dwarf2_directive_loc (x); | |
3323 | } | |
3324 | ||
800eeca4 JW |
3325 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3326 | static void | |
3327 | dot_special_section (which) | |
3328 | int which; | |
3329 | { | |
3330 | set_section ((char *) special_section_name[which]); | |
3331 | } | |
3332 | ||
07450571 L |
3333 | /* Return -1 for warning and 0 for error. */ |
3334 | ||
3335 | static int | |
970d6792 L |
3336 | unwind_diagnostic (const char * region, const char *directive) |
3337 | { | |
3338 | if (md.unwind_check == unwind_check_warning) | |
07450571 | 3339 | { |
ad4b42b4 | 3340 | as_warn (_(".%s outside of %s"), directive, region); |
07450571 L |
3341 | return -1; |
3342 | } | |
970d6792 L |
3343 | else |
3344 | { | |
ad4b42b4 | 3345 | as_bad (_(".%s outside of %s"), directive, region); |
970d6792 | 3346 | ignore_rest_of_line (); |
07450571 | 3347 | return 0; |
970d6792 L |
3348 | } |
3349 | } | |
3350 | ||
07450571 L |
3351 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3352 | a procedure but the unwind directive check is set to warning, 0 if | |
3353 | a directive isn't in a procedure and the unwind directive check is set | |
3354 | to error. */ | |
3355 | ||
75e09913 JB |
3356 | static int |
3357 | in_procedure (const char *directive) | |
3358 | { | |
5656b6b8 | 3359 | if (unwind.proc_pending.sym |
75e09913 JB |
3360 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3361 | return 1; | |
07450571 | 3362 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3363 | } |
3364 | ||
07450571 L |
3365 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3366 | a prologue but the unwind directive check is set to warning, 0 if | |
3367 | a directive isn't in a prologue and the unwind directive check is set | |
3368 | to error. */ | |
3369 | ||
75e09913 JB |
3370 | static int |
3371 | in_prologue (const char *directive) | |
3372 | { | |
07450571 | 3373 | int in = in_procedure (directive); |
ba825241 JB |
3374 | |
3375 | if (in > 0 && !unwind.prologue) | |
3376 | in = unwind_diagnostic ("prologue", directive); | |
3377 | check_pending_save (); | |
3378 | return in; | |
75e09913 JB |
3379 | } |
3380 | ||
07450571 L |
3381 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3382 | a body but the unwind directive check is set to warning, 0 if | |
3383 | a directive isn't in a body and the unwind directive check is set | |
3384 | to error. */ | |
3385 | ||
75e09913 JB |
3386 | static int |
3387 | in_body (const char *directive) | |
3388 | { | |
07450571 | 3389 | int in = in_procedure (directive); |
ba825241 JB |
3390 | |
3391 | if (in > 0 && !unwind.body) | |
3392 | in = unwind_diagnostic ("body region", directive); | |
3393 | return in; | |
75e09913 JB |
3394 | } |
3395 | ||
800eeca4 | 3396 | static void |
e4e8248d | 3397 | add_unwind_entry (ptr, sep) |
800eeca4 | 3398 | unw_rec_list *ptr; |
e4e8248d | 3399 | int sep; |
800eeca4 | 3400 | { |
e4e8248d JB |
3401 | if (ptr) |
3402 | { | |
3403 | if (unwind.tail) | |
3404 | unwind.tail->next = ptr; | |
3405 | else | |
3406 | unwind.list = ptr; | |
3407 | unwind.tail = ptr; | |
3408 | ||
3409 | /* The current entry can in fact be a chain of unwind entries. */ | |
3410 | if (unwind.current_entry == NULL) | |
3411 | unwind.current_entry = ptr; | |
3412 | } | |
800eeca4 JW |
3413 | |
3414 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3415 | if (unwind.current_entry == NULL) |
3416 | unwind.current_entry = ptr; | |
e4e8248d JB |
3417 | |
3418 | if (sep == ',') | |
3419 | { | |
3420 | /* Parse a tag permitted for the current directive. */ | |
3421 | int ch; | |
3422 | ||
3423 | SKIP_WHITESPACE (); | |
3424 | ch = get_symbol_end (); | |
3425 | /* FIXME: For now, just issue a warning that this isn't implemented. */ | |
3426 | { | |
3427 | static int warned; | |
3428 | ||
3429 | if (!warned) | |
3430 | { | |
3431 | warned = 1; | |
ad4b42b4 | 3432 | as_warn (_("Tags on unwind pseudo-ops aren't supported, yet")); |
e4e8248d JB |
3433 | } |
3434 | } | |
3435 | *input_line_pointer = ch; | |
3436 | } | |
3437 | if (sep != NOT_A_CHAR) | |
3438 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3439 | } |
3440 | ||
197865e8 | 3441 | static void |
800eeca4 | 3442 | dot_fframe (dummy) |
2434f565 | 3443 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3444 | { |
3445 | expressionS e; | |
e4e8248d | 3446 | int sep; |
e0c9811a | 3447 | |
75e09913 JB |
3448 | if (!in_prologue ("fframe")) |
3449 | return; | |
3450 | ||
e4e8248d | 3451 | sep = parse_operand (&e, ','); |
197865e8 | 3452 | |
800eeca4 | 3453 | if (e.X_op != O_constant) |
e4e8248d | 3454 | { |
ad4b42b4 | 3455 | as_bad (_("First operand to .fframe must be a constant")); |
e4e8248d JB |
3456 | e.X_add_number = 0; |
3457 | } | |
3458 | add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); | |
e0c9811a JW |
3459 | } |
3460 | ||
197865e8 | 3461 | static void |
e0c9811a | 3462 | dot_vframe (dummy) |
2434f565 | 3463 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3464 | { |
3465 | expressionS e; | |
3466 | unsigned reg; | |
e4e8248d | 3467 | int sep; |
e0c9811a | 3468 | |
75e09913 JB |
3469 | if (!in_prologue ("vframe")) |
3470 | return; | |
3471 | ||
e4e8248d | 3472 | sep = parse_operand (&e, ','); |
e0c9811a | 3473 | reg = e.X_add_number - REG_GR; |
e4e8248d | 3474 | if (e.X_op != O_register || reg > 127) |
800eeca4 | 3475 | { |
ad4b42b4 | 3476 | as_bad (_("First operand to .vframe must be a general register")); |
e4e8248d | 3477 | reg = 0; |
800eeca4 | 3478 | } |
e4e8248d JB |
3479 | add_unwind_entry (output_mem_stack_v (), sep); |
3480 | if (! (unwind.prologue_mask & 2)) | |
3481 | add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); | |
3482 | else if (reg != unwind.prologue_gr | |
3483 | + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) | |
ad4b42b4 | 3484 | as_warn (_("Operand of .vframe contradicts .prologue")); |
800eeca4 JW |
3485 | } |
3486 | ||
197865e8 | 3487 | static void |
e4e8248d JB |
3488 | dot_vframesp (psp) |
3489 | int psp; | |
800eeca4 | 3490 | { |
e0c9811a | 3491 | expressionS e; |
e4e8248d | 3492 | int sep; |
e0c9811a | 3493 | |
e4e8248d | 3494 | if (psp) |
ad4b42b4 | 3495 | as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant")); |
e0c9811a | 3496 | |
e4e8248d | 3497 | if (!in_prologue ("vframesp")) |
75e09913 JB |
3498 | return; |
3499 | ||
e4e8248d JB |
3500 | sep = parse_operand (&e, ','); |
3501 | if (e.X_op != O_constant) | |
e0c9811a | 3502 | { |
ad4b42b4 | 3503 | as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)")); |
e4e8248d | 3504 | e.X_add_number = 0; |
e0c9811a | 3505 | } |
e4e8248d JB |
3506 | add_unwind_entry (output_mem_stack_v (), sep); |
3507 | add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); | |
800eeca4 JW |
3508 | } |
3509 | ||
197865e8 | 3510 | static void |
800eeca4 | 3511 | dot_save (dummy) |
2434f565 | 3512 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3513 | { |
3514 | expressionS e1, e2; | |
e4e8248d | 3515 | unsigned reg1, reg2; |
800eeca4 | 3516 | int sep; |
800eeca4 | 3517 | |
75e09913 JB |
3518 | if (!in_prologue ("save")) |
3519 | return; | |
3520 | ||
e4e8248d JB |
3521 | sep = parse_operand (&e1, ','); |
3522 | if (sep == ',') | |
3523 | sep = parse_operand (&e2, ','); | |
3524 | else | |
3525 | e2.X_op = O_absent; | |
800eeca4 | 3526 | |
e0c9811a | 3527 | reg1 = e1.X_add_number; |
800eeca4 | 3528 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3529 | if (e1.X_op != O_register) |
800eeca4 | 3530 | { |
ad4b42b4 | 3531 | as_bad (_("First operand to .save not a register")); |
e4e8248d JB |
3532 | reg1 = REG_PR; /* Anything valid is good here. */ |
3533 | } | |
3534 | reg2 = e2.X_add_number - REG_GR; | |
3535 | if (e2.X_op != O_register || reg2 > 127) | |
3536 | { | |
ad4b42b4 | 3537 | as_bad (_("Second operand to .save not a valid register")); |
e4e8248d JB |
3538 | reg2 = 0; |
3539 | } | |
3540 | switch (reg1) | |
3541 | { | |
3542 | case REG_AR + AR_BSP: | |
3543 | add_unwind_entry (output_bsp_when (), sep); | |
3544 | add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); | |
3545 | break; | |
3546 | case REG_AR + AR_BSPSTORE: | |
3547 | add_unwind_entry (output_bspstore_when (), sep); | |
3548 | add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); | |
3549 | break; | |
3550 | case REG_AR + AR_RNAT: | |
3551 | add_unwind_entry (output_rnat_when (), sep); | |
3552 | add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); | |
3553 | break; | |
3554 | case REG_AR + AR_UNAT: | |
3555 | add_unwind_entry (output_unat_when (), sep); | |
3556 | add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); | |
3557 | break; | |
3558 | case REG_AR + AR_FPSR: | |
3559 | add_unwind_entry (output_fpsr_when (), sep); | |
3560 | add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); | |
3561 | break; | |
3562 | case REG_AR + AR_PFS: | |
3563 | add_unwind_entry (output_pfs_when (), sep); | |
3564 | if (! (unwind.prologue_mask & 4)) | |
3565 | add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); | |
3566 | else if (reg2 != unwind.prologue_gr | |
3567 | + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) | |
ad4b42b4 | 3568 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3569 | break; |
3570 | case REG_AR + AR_LC: | |
3571 | add_unwind_entry (output_lc_when (), sep); | |
3572 | add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); | |
3573 | break; | |
3574 | case REG_BR: | |
3575 | add_unwind_entry (output_rp_when (), sep); | |
3576 | if (! (unwind.prologue_mask & 8)) | |
3577 | add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); | |
3578 | else if (reg2 != unwind.prologue_gr) | |
ad4b42b4 | 3579 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3580 | break; |
3581 | case REG_PR: | |
3582 | add_unwind_entry (output_preds_when (), sep); | |
3583 | if (! (unwind.prologue_mask & 1)) | |
3584 | add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); | |
3585 | else if (reg2 != unwind.prologue_gr | |
3586 | + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) | |
ad4b42b4 | 3587 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3588 | break; |
3589 | case REG_PRIUNAT: | |
3590 | add_unwind_entry (output_priunat_when_gr (), sep); | |
3591 | add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); | |
3592 | break; | |
3593 | default: | |
ad4b42b4 | 3594 | as_bad (_("First operand to .save not a valid register")); |
e4e8248d JB |
3595 | add_unwind_entry (NULL, sep); |
3596 | break; | |
800eeca4 | 3597 | } |
800eeca4 JW |
3598 | } |
3599 | ||
197865e8 | 3600 | static void |
800eeca4 | 3601 | dot_restore (dummy) |
2434f565 | 3602 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3603 | { |
e4e8248d | 3604 | expressionS e1; |
33d01f33 | 3605 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3606 | int sep; |
3607 | ||
75e09913 JB |
3608 | if (!in_body ("restore")) |
3609 | return; | |
3610 | ||
e4e8248d | 3611 | sep = parse_operand (&e1, ','); |
e0c9811a | 3612 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) |
ad4b42b4 | 3613 | as_bad (_("First operand to .restore must be stack pointer (sp)")); |
e0c9811a JW |
3614 | |
3615 | if (sep == ',') | |
3616 | { | |
e4e8248d JB |
3617 | expressionS e2; |
3618 | ||
3619 | sep = parse_operand (&e2, ','); | |
33d01f33 | 3620 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3621 | { |
ad4b42b4 | 3622 | as_bad (_("Second operand to .restore must be a constant >= 0")); |
e4e8248d | 3623 | e2.X_add_number = 0; |
e0c9811a | 3624 | } |
33d01f33 | 3625 | ecount = e2.X_add_number; |
e0c9811a | 3626 | } |
33d01f33 JW |
3627 | else |
3628 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3629 | |
3630 | if (ecount >= unwind.prologue_count) | |
3631 | { | |
ad4b42b4 | 3632 | as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"), |
6290819d | 3633 | ecount + 1, unwind.prologue_count); |
e4e8248d | 3634 | ecount = 0; |
6290819d NC |
3635 | } |
3636 | ||
e4e8248d | 3637 | add_unwind_entry (output_epilogue (ecount), sep); |
33d01f33 JW |
3638 | |
3639 | if (ecount < unwind.prologue_count) | |
3640 | unwind.prologue_count -= ecount + 1; | |
3641 | else | |
3642 | unwind.prologue_count = 0; | |
e0c9811a JW |
3643 | } |
3644 | ||
197865e8 | 3645 | static void |
e4e8248d JB |
3646 | dot_restorereg (pred) |
3647 | int pred; | |
e0c9811a JW |
3648 | { |
3649 | unsigned int qp, ab, reg; | |
e4e8248d | 3650 | expressionS e; |
e0c9811a | 3651 | int sep; |
e4e8248d | 3652 | const char * const po = pred ? "restorereg.p" : "restorereg"; |
e0c9811a | 3653 | |
e4e8248d | 3654 | if (!in_procedure (po)) |
75e09913 JB |
3655 | return; |
3656 | ||
e4e8248d JB |
3657 | if (pred) |
3658 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3659 | else | |
e0c9811a | 3660 | { |
e4e8248d JB |
3661 | sep = parse_operand (&e, ','); |
3662 | qp = 0; | |
e0c9811a | 3663 | } |
e4e8248d | 3664 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3665 | |
e4e8248d | 3666 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); |
800eeca4 JW |
3667 | } |
3668 | ||
2d6ed997 L |
3669 | static char *special_linkonce_name[] = |
3670 | { | |
3671 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3672 | }; | |
3673 | ||
3674 | static void | |
da9f89d4 | 3675 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3676 | { |
3677 | /* | |
3678 | Use a slightly ugly scheme to derive the unwind section names from | |
3679 | the text section name: | |
3680 | ||
3681 | text sect. unwind table sect. | |
3682 | name: name: comments: | |
3683 | ---------- ----------------- -------------------------------- | |
3684 | .text .IA_64.unwind | |
3685 | .text.foo .IA_64.unwind.text.foo | |
3686 | .foo .IA_64.unwind.foo | |
3687 | .gnu.linkonce.t.foo | |
3688 | .gnu.linkonce.ia64unw.foo | |
3689 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3690 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3691 | ||
3692 | This mapping is done so that: | |
3693 | ||
3694 | (a) An object file with unwind info only in .text will use | |
3695 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3696 | This follows the letter of the ABI and also ensures backwards | |
3697 | compatibility with older toolchains. | |
3698 | ||
3699 | (b) An object file with unwind info in multiple text sections | |
3700 | will use separate unwind sections for each text section. | |
3701 | This allows us to properly set the "sh_info" and "sh_link" | |
3702 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3703 | lets GNU ld support programs with multiple segments | |
3704 | containing unwind info (as might be the case for certain | |
3705 | embedded applications). | |
3706 | ||
3707 | (c) An error is issued if there would be a name clash. | |
3708 | */ | |
3709 | ||
3710 | const char *text_name, *sec_text_name; | |
3711 | char *sec_name; | |
3712 | const char *prefix = special_section_name [sec_index]; | |
3713 | const char *suffix; | |
3714 | size_t prefix_len, suffix_len, sec_name_len; | |
3715 | ||
3716 | sec_text_name = segment_name (text_seg); | |
3717 | text_name = sec_text_name; | |
3718 | if (strncmp (text_name, "_info", 5) == 0) | |
3719 | { | |
ad4b42b4 | 3720 | as_bad (_("Illegal section name `%s' (causes unwind section name clash)"), |
2d6ed997 L |
3721 | text_name); |
3722 | ignore_rest_of_line (); | |
3723 | return; | |
3724 | } | |
3725 | if (strcmp (text_name, ".text") == 0) | |
3726 | text_name = ""; | |
3727 | ||
3728 | /* Build the unwind section name by appending the (possibly stripped) | |
3729 | text section name to the unwind prefix. */ | |
3730 | suffix = text_name; | |
3731 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3732 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3733 | { | |
3734 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3735 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3736 | } | |
3737 | ||
3738 | prefix_len = strlen (prefix); | |
3739 | suffix_len = strlen (suffix); | |
3740 | sec_name_len = prefix_len + suffix_len; | |
3741 | sec_name = alloca (sec_name_len + 1); | |
3742 | memcpy (sec_name, prefix, prefix_len); | |
3743 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3744 | sec_name [sec_name_len] = '\0'; | |
3745 | ||
3746 | /* Handle COMDAT group. */ | |
6e3f953d L |
3747 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3748 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3749 | { |
3750 | char *section; | |
3751 | size_t len, group_name_len; | |
3752 | const char *group_name = elf_group_name (text_seg); | |
3753 | ||
3754 | if (group_name == NULL) | |
3755 | { | |
ad4b42b4 | 3756 | as_bad (_("Group section `%s' has no group signature"), |
2d6ed997 L |
3757 | sec_text_name); |
3758 | ignore_rest_of_line (); | |
3759 | return; | |
3760 | } | |
3761 | /* We have to construct a fake section directive. */ | |
3762 | group_name_len = strlen (group_name); | |
3763 | len = (sec_name_len | |
3764 | + 16 /* ,"aG",@progbits, */ | |
3765 | + group_name_len /* ,group_name */ | |
3766 | + 7); /* ,comdat */ | |
3767 | ||
3768 | section = alloca (len + 1); | |
3769 | memcpy (section, sec_name, sec_name_len); | |
3770 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3771 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3772 | memcpy (section + len - 7, ",comdat", 7); | |
3773 | section [len] = '\0'; | |
3774 | set_section (section); | |
3775 | } | |
3776 | else | |
3777 | { | |
3778 | set_section (sec_name); | |
3779 | bfd_set_section_flags (stdoutput, now_seg, | |
3780 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3781 | } | |
38ce5b11 L |
3782 | |
3783 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3784 | } |
3785 | ||
73f20958 | 3786 | static void |
2d6ed997 | 3787 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3788 | { |
73f20958 L |
3789 | int size, pad; |
3790 | unw_rec_list *list; | |
800eeca4 | 3791 | |
c97b7ef6 JW |
3792 | /* Mark the end of the unwind info, so that we can compute the size of the |
3793 | last unwind region. */ | |
e4e8248d | 3794 | add_unwind_entry (output_endp (), NOT_A_CHAR); |
c97b7ef6 | 3795 | |
10850f29 JW |
3796 | /* Force out pending instructions, to make sure all unwind records have |
3797 | a valid slot_number field. */ | |
3798 | ia64_flush_insns (); | |
3799 | ||
800eeca4 | 3800 | /* Generate the unwind record. */ |
73f20958 | 3801 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3802 | fixup_unw_records (list, 1); |
73f20958 L |
3803 | size = calc_record_size (list); |
3804 | ||
3805 | if (size > 0 || unwind.force_unwind_entry) | |
3806 | { | |
3807 | unwind.force_unwind_entry = 0; | |
3808 | /* pad to pointer-size boundary. */ | |
3809 | pad = size % md.pointer_size; | |
3810 | if (pad != 0) | |
3811 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3812 | /* Add 8 for the header. */ |
3813 | size += 8; | |
3814 | /* Add a pointer for the personality offset. */ | |
3815 | if (unwind.personality_routine) | |
3816 | size += md.pointer_size; | |
73f20958 | 3817 | } |
6290819d | 3818 | |
800eeca4 JW |
3819 | /* If there are unwind records, switch sections, and output the info. */ |
3820 | if (size != 0) | |
3821 | { | |
800eeca4 | 3822 | expressionS exp; |
1cd8ff38 | 3823 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3824 | |
da9f89d4 | 3825 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3826 | |
557debba JW |
3827 | /* Make sure the section has 4 byte alignment for ILP32 and |
3828 | 8 byte alignment for LP64. */ | |
3829 | frag_align (md.pointer_size_shift, 0, 0); | |
3830 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3831 | |
800eeca4 | 3832 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3833 | unwind.info = expr_build_dot (); |
73f20958 L |
3834 | |
3835 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3836 | (offsetT) (long) unwind.personality_routine, |
3837 | (char *) list); | |
91a2ae2a | 3838 | |
800eeca4 | 3839 | /* Add the personality address to the image. */ |
e0c9811a | 3840 | if (unwind.personality_routine != 0) |
542d6675 | 3841 | { |
40449e9f | 3842 | exp.X_op = O_symbol; |
e0c9811a | 3843 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3844 | exp.X_add_number = 0; |
1cd8ff38 NC |
3845 | |
3846 | if (md.flags & EF_IA_64_BE) | |
3847 | { | |
3848 | if (md.flags & EF_IA_64_ABI64) | |
3849 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3850 | else | |
3851 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3852 | } | |
40449e9f | 3853 | else |
1cd8ff38 NC |
3854 | { |
3855 | if (md.flags & EF_IA_64_ABI64) | |
3856 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3857 | else | |
3858 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3859 | } | |
3860 | ||
3861 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3862 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3863 | unwind.personality_routine = 0; |
542d6675 | 3864 | } |
800eeca4 JW |
3865 | } |
3866 | ||
6290819d | 3867 | free_saved_prologue_counts (); |
e0c9811a | 3868 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3869 | } |
3870 | ||
197865e8 | 3871 | static void |
542d6675 | 3872 | dot_handlerdata (dummy) |
2434f565 | 3873 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3874 | { |
75e09913 JB |
3875 | if (!in_procedure ("handlerdata")) |
3876 | return; | |
91a2ae2a RH |
3877 | unwind.force_unwind_entry = 1; |
3878 | ||
3879 | /* Remember which segment we're in so we can switch back after .endp */ | |
3880 | unwind.saved_text_seg = now_seg; | |
3881 | unwind.saved_text_subseg = now_subseg; | |
3882 | ||
3883 | /* Generate unwind info into unwind-info section and then leave that | |
3884 | section as the currently active one so dataXX directives go into | |
3885 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3886 | generate_unwind_image (now_seg); |
e0c9811a | 3887 | demand_empty_rest_of_line (); |
800eeca4 JW |
3888 | } |
3889 | ||
197865e8 | 3890 | static void |
800eeca4 | 3891 | dot_unwentry (dummy) |
2434f565 | 3892 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3893 | { |
75e09913 JB |
3894 | if (!in_procedure ("unwentry")) |
3895 | return; | |
91a2ae2a | 3896 | unwind.force_unwind_entry = 1; |
e0c9811a | 3897 | demand_empty_rest_of_line (); |
800eeca4 JW |
3898 | } |
3899 | ||
197865e8 | 3900 | static void |
800eeca4 | 3901 | dot_altrp (dummy) |
2434f565 | 3902 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3903 | { |
e0c9811a JW |
3904 | expressionS e; |
3905 | unsigned reg; | |
3906 | ||
75e09913 JB |
3907 | if (!in_prologue ("altrp")) |
3908 | return; | |
3909 | ||
e4e8248d | 3910 | parse_operand (&e, 0); |
e0c9811a | 3911 | reg = e.X_add_number - REG_BR; |
e4e8248d JB |
3912 | if (e.X_op != O_register || reg > 7) |
3913 | { | |
ad4b42b4 | 3914 | as_bad (_("First operand to .altrp not a valid branch register")); |
e4e8248d JB |
3915 | reg = 0; |
3916 | } | |
3917 | add_unwind_entry (output_rp_br (reg), 0); | |
800eeca4 JW |
3918 | } |
3919 | ||
197865e8 | 3920 | static void |
e0c9811a JW |
3921 | dot_savemem (psprel) |
3922 | int psprel; | |
800eeca4 JW |
3923 | { |
3924 | expressionS e1, e2; | |
3925 | int sep; | |
3926 | int reg1, val; | |
e4e8248d | 3927 | const char * const po = psprel ? "savepsp" : "savesp"; |
800eeca4 | 3928 | |
e4e8248d | 3929 | if (!in_prologue (po)) |
75e09913 JB |
3930 | return; |
3931 | ||
e4e8248d JB |
3932 | sep = parse_operand (&e1, ','); |
3933 | if (sep == ',') | |
3934 | sep = parse_operand (&e2, ','); | |
3935 | else | |
3936 | e2.X_op = O_absent; | |
800eeca4 | 3937 | |
e0c9811a | 3938 | reg1 = e1.X_add_number; |
800eeca4 | 3939 | val = e2.X_add_number; |
197865e8 | 3940 | |
800eeca4 | 3941 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3942 | if (e1.X_op != O_register) |
800eeca4 | 3943 | { |
ad4b42b4 | 3944 | as_bad (_("First operand to .%s not a register"), po); |
e4e8248d JB |
3945 | reg1 = REG_PR; /* Anything valid is good here. */ |
3946 | } | |
3947 | if (e2.X_op != O_constant) | |
3948 | { | |
ad4b42b4 | 3949 | as_bad (_("Second operand to .%s not a constant"), po); |
e4e8248d JB |
3950 | val = 0; |
3951 | } | |
3952 | ||
3953 | switch (reg1) | |
3954 | { | |
3955 | case REG_AR + AR_BSP: | |
3956 | add_unwind_entry (output_bsp_when (), sep); | |
3957 | add_unwind_entry ((psprel | |
3958 | ? output_bsp_psprel | |
3959 | : output_bsp_sprel) (val), NOT_A_CHAR); | |
3960 | break; | |
3961 | case REG_AR + AR_BSPSTORE: | |
3962 | add_unwind_entry (output_bspstore_when (), sep); | |
3963 | add_unwind_entry ((psprel | |
3964 | ? output_bspstore_psprel | |
3965 | : output_bspstore_sprel) (val), NOT_A_CHAR); | |
3966 | break; | |
3967 | case REG_AR + AR_RNAT: | |
3968 | add_unwind_entry (output_rnat_when (), sep); | |
3969 | add_unwind_entry ((psprel | |
3970 | ? output_rnat_psprel | |
3971 | : output_rnat_sprel) (val), NOT_A_CHAR); | |
3972 | break; | |
3973 | case REG_AR + AR_UNAT: | |
3974 | add_unwind_entry (output_unat_when (), sep); | |
3975 | add_unwind_entry ((psprel | |
3976 | ? output_unat_psprel | |
3977 | : output_unat_sprel) (val), NOT_A_CHAR); | |
3978 | break; | |
3979 | case REG_AR + AR_FPSR: | |
3980 | add_unwind_entry (output_fpsr_when (), sep); | |
3981 | add_unwind_entry ((psprel | |
3982 | ? output_fpsr_psprel | |
3983 | : output_fpsr_sprel) (val), NOT_A_CHAR); | |
3984 | break; | |
3985 | case REG_AR + AR_PFS: | |
3986 | add_unwind_entry (output_pfs_when (), sep); | |
3987 | add_unwind_entry ((psprel | |
3988 | ? output_pfs_psprel | |
3989 | : output_pfs_sprel) (val), NOT_A_CHAR); | |
3990 | break; | |
3991 | case REG_AR + AR_LC: | |
3992 | add_unwind_entry (output_lc_when (), sep); | |
3993 | add_unwind_entry ((psprel | |
3994 | ? output_lc_psprel | |
3995 | : output_lc_sprel) (val), NOT_A_CHAR); | |
3996 | break; | |
3997 | case REG_BR: | |
3998 | add_unwind_entry (output_rp_when (), sep); | |
3999 | add_unwind_entry ((psprel | |
4000 | ? output_rp_psprel | |
4001 | : output_rp_sprel) (val), NOT_A_CHAR); | |
4002 | break; | |
4003 | case REG_PR: | |
4004 | add_unwind_entry (output_preds_when (), sep); | |
4005 | add_unwind_entry ((psprel | |
4006 | ? output_preds_psprel | |
4007 | : output_preds_sprel) (val), NOT_A_CHAR); | |
4008 | break; | |
4009 | case REG_PRIUNAT: | |
4010 | add_unwind_entry (output_priunat_when_mem (), sep); | |
4011 | add_unwind_entry ((psprel | |
4012 | ? output_priunat_psprel | |
4013 | : output_priunat_sprel) (val), NOT_A_CHAR); | |
4014 | break; | |
4015 | default: | |
ad4b42b4 | 4016 | as_bad (_("First operand to .%s not a valid register"), po); |
e4e8248d JB |
4017 | add_unwind_entry (NULL, sep); |
4018 | break; | |
800eeca4 | 4019 | } |
800eeca4 JW |
4020 | } |
4021 | ||
197865e8 | 4022 | static void |
800eeca4 | 4023 | dot_saveg (dummy) |
2434f565 | 4024 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4025 | { |
e4e8248d JB |
4026 | expressionS e; |
4027 | unsigned grmask; | |
800eeca4 | 4028 | int sep; |
75e09913 JB |
4029 | |
4030 | if (!in_prologue ("save.g")) | |
4031 | return; | |
4032 | ||
e4e8248d | 4033 | sep = parse_operand (&e, ','); |
197865e8 | 4034 | |
e4e8248d JB |
4035 | grmask = e.X_add_number; |
4036 | if (e.X_op != O_constant | |
4037 | || e.X_add_number <= 0 | |
4038 | || e.X_add_number > 0xf) | |
800eeca4 | 4039 | { |
ad4b42b4 | 4040 | as_bad (_("First operand to .save.g must be a positive 4-bit constant")); |
e4e8248d JB |
4041 | grmask = 0; |
4042 | } | |
4043 | ||
4044 | if (sep == ',') | |
4045 | { | |
4046 | unsigned reg; | |
4047 | int n = popcount (grmask); | |
4048 | ||
4049 | parse_operand (&e, 0); | |
4050 | reg = e.X_add_number - REG_GR; | |
4051 | if (e.X_op != O_register || reg > 127) | |
542d6675 | 4052 | { |
ad4b42b4 | 4053 | as_bad (_("Second operand to .save.g must be a general register")); |
e4e8248d JB |
4054 | reg = 0; |
4055 | } | |
4056 | else if (reg > 128U - n) | |
4057 | { | |
ad4b42b4 | 4058 | as_bad (_("Second operand to .save.g must be the first of %d general registers"), n); |
e4e8248d | 4059 | reg = 0; |
800eeca4 | 4060 | } |
e4e8248d | 4061 | add_unwind_entry (output_gr_gr (grmask, reg), 0); |
800eeca4 | 4062 | } |
e4e8248d JB |
4063 | else |
4064 | add_unwind_entry (output_gr_mem (grmask), 0); | |
800eeca4 JW |
4065 | } |
4066 | ||
197865e8 | 4067 | static void |
800eeca4 | 4068 | dot_savef (dummy) |
2434f565 | 4069 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4070 | { |
e4e8248d | 4071 | expressionS e; |
75e09913 JB |
4072 | |
4073 | if (!in_prologue ("save.f")) | |
4074 | return; | |
4075 | ||
e4e8248d | 4076 | parse_operand (&e, 0); |
197865e8 | 4077 | |
e4e8248d JB |
4078 | if (e.X_op != O_constant |
4079 | || e.X_add_number <= 0 | |
4080 | || e.X_add_number > 0xfffff) | |
4081 | { | |
ad4b42b4 | 4082 | as_bad (_("Operand to .save.f must be a positive 20-bit constant")); |
e4e8248d JB |
4083 | e.X_add_number = 0; |
4084 | } | |
4085 | add_unwind_entry (output_fr_mem (e.X_add_number), 0); | |
800eeca4 JW |
4086 | } |
4087 | ||
197865e8 | 4088 | static void |
800eeca4 | 4089 | dot_saveb (dummy) |
2434f565 | 4090 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4091 | { |
e4e8248d JB |
4092 | expressionS e; |
4093 | unsigned brmask; | |
4094 | int sep; | |
e0c9811a | 4095 | |
75e09913 JB |
4096 | if (!in_prologue ("save.b")) |
4097 | return; | |
4098 | ||
e4e8248d JB |
4099 | sep = parse_operand (&e, ','); |
4100 | ||
4101 | brmask = e.X_add_number; | |
4102 | if (e.X_op != O_constant | |
4103 | || e.X_add_number <= 0 | |
4104 | || e.X_add_number > 0x1f) | |
800eeca4 | 4105 | { |
ad4b42b4 | 4106 | as_bad (_("First operand to .save.b must be a positive 5-bit constant")); |
e4e8248d | 4107 | brmask = 0; |
800eeca4 | 4108 | } |
e0c9811a JW |
4109 | |
4110 | if (sep == ',') | |
4111 | { | |
e4e8248d JB |
4112 | unsigned reg; |
4113 | int n = popcount (brmask); | |
4114 | ||
4115 | parse_operand (&e, 0); | |
4116 | reg = e.X_add_number - REG_GR; | |
4117 | if (e.X_op != O_register || reg > 127) | |
e0c9811a | 4118 | { |
ad4b42b4 | 4119 | as_bad (_("Second operand to .save.b must be a general register")); |
e4e8248d | 4120 | reg = 0; |
e0c9811a | 4121 | } |
e4e8248d JB |
4122 | else if (reg > 128U - n) |
4123 | { | |
ad4b42b4 | 4124 | as_bad (_("Second operand to .save.b must be the first of %d general registers"), n); |
e4e8248d JB |
4125 | reg = 0; |
4126 | } | |
4127 | add_unwind_entry (output_br_gr (brmask, reg), 0); | |
e0c9811a JW |
4128 | } |
4129 | else | |
e4e8248d | 4130 | add_unwind_entry (output_br_mem (brmask), 0); |
800eeca4 JW |
4131 | } |
4132 | ||
197865e8 | 4133 | static void |
800eeca4 | 4134 | dot_savegf (dummy) |
2434f565 | 4135 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4136 | { |
4137 | expressionS e1, e2; | |
75e09913 JB |
4138 | |
4139 | if (!in_prologue ("save.gf")) | |
4140 | return; | |
4141 | ||
e4e8248d JB |
4142 | if (parse_operand (&e1, ',') == ',') |
4143 | parse_operand (&e2, 0); | |
800eeca4 | 4144 | else |
e4e8248d JB |
4145 | e2.X_op = O_absent; |
4146 | ||
4147 | if (e1.X_op != O_constant | |
4148 | || e1.X_add_number < 0 | |
4149 | || e1.X_add_number > 0xf) | |
4150 | { | |
ad4b42b4 | 4151 | as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant")); |
e4e8248d JB |
4152 | e1.X_op = O_absent; |
4153 | e1.X_add_number = 0; | |
4154 | } | |
4155 | if (e2.X_op != O_constant | |
4156 | || e2.X_add_number < 0 | |
4157 | || e2.X_add_number > 0xfffff) | |
800eeca4 | 4158 | { |
ad4b42b4 | 4159 | as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant")); |
e4e8248d JB |
4160 | e2.X_op = O_absent; |
4161 | e2.X_add_number = 0; | |
800eeca4 | 4162 | } |
e4e8248d JB |
4163 | if (e1.X_op == O_constant |
4164 | && e2.X_op == O_constant | |
4165 | && e1.X_add_number == 0 | |
4166 | && e2.X_add_number == 0) | |
ad4b42b4 | 4167 | as_bad (_("Operands to .save.gf may not be both zero")); |
e4e8248d JB |
4168 | |
4169 | add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); | |
800eeca4 JW |
4170 | } |
4171 | ||
197865e8 | 4172 | static void |
800eeca4 | 4173 | dot_spill (dummy) |
2434f565 | 4174 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4175 | { |
4176 | expressionS e; | |
e0c9811a | 4177 | |
75e09913 JB |
4178 | if (!in_prologue ("spill")) |
4179 | return; | |
4180 | ||
e4e8248d | 4181 | parse_operand (&e, 0); |
197865e8 | 4182 | |
800eeca4 | 4183 | if (e.X_op != O_constant) |
800eeca4 | 4184 | { |
ad4b42b4 | 4185 | as_bad (_("Operand to .spill must be a constant")); |
e4e8248d | 4186 | e.X_add_number = 0; |
e0c9811a | 4187 | } |
e4e8248d | 4188 | add_unwind_entry (output_spill_base (e.X_add_number), 0); |
e0c9811a JW |
4189 | } |
4190 | ||
4191 | static void | |
e4e8248d JB |
4192 | dot_spillreg (pred) |
4193 | int pred; | |
e0c9811a | 4194 | { |
2132e3a3 | 4195 | int sep; |
e4e8248d JB |
4196 | unsigned int qp, ab, xy, reg, treg; |
4197 | expressionS e; | |
4198 | const char * const po = pred ? "spillreg.p" : "spillreg"; | |
e0c9811a | 4199 | |
e4e8248d | 4200 | if (!in_procedure (po)) |
75e09913 JB |
4201 | return; |
4202 | ||
e4e8248d JB |
4203 | if (pred) |
4204 | sep = parse_predicate_and_operand (&e, &qp, po); | |
e0c9811a | 4205 | else |
e0c9811a | 4206 | { |
e4e8248d JB |
4207 | sep = parse_operand (&e, ','); |
4208 | qp = 0; | |
e0c9811a | 4209 | } |
e4e8248d | 4210 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4211 | |
e4e8248d JB |
4212 | if (sep == ',') |
4213 | sep = parse_operand (&e, ','); | |
4214 | else | |
4215 | e.X_op = O_absent; | |
4216 | convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); | |
e0c9811a | 4217 | |
e4e8248d | 4218 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); |
e0c9811a JW |
4219 | } |
4220 | ||
4221 | static void | |
e4e8248d | 4222 | dot_spillmem (psprel) |
e0c9811a JW |
4223 | int psprel; |
4224 | { | |
e4e8248d JB |
4225 | expressionS e; |
4226 | int pred = (psprel < 0), sep; | |
4227 | unsigned int qp, ab, reg; | |
4228 | const char * po; | |
e0c9811a | 4229 | |
e4e8248d | 4230 | if (pred) |
e0c9811a | 4231 | { |
e4e8248d JB |
4232 | psprel = ~psprel; |
4233 | po = psprel ? "spillpsp.p" : "spillsp.p"; | |
e0c9811a | 4234 | } |
e4e8248d JB |
4235 | else |
4236 | po = psprel ? "spillpsp" : "spillsp"; | |
e0c9811a | 4237 | |
e4e8248d JB |
4238 | if (!in_procedure (po)) |
4239 | return; | |
e0c9811a | 4240 | |
e4e8248d JB |
4241 | if (pred) |
4242 | sep = parse_predicate_and_operand (&e, &qp, po); | |
4243 | else | |
e0c9811a | 4244 | { |
e4e8248d JB |
4245 | sep = parse_operand (&e, ','); |
4246 | qp = 0; | |
e0c9811a | 4247 | } |
e4e8248d | 4248 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4249 | |
e4e8248d JB |
4250 | if (sep == ',') |
4251 | sep = parse_operand (&e, ','); | |
4252 | else | |
4253 | e.X_op = O_absent; | |
4254 | if (e.X_op != O_constant) | |
e0c9811a | 4255 | { |
ad4b42b4 | 4256 | as_bad (_("Operand %d to .%s must be a constant"), 2 + pred, po); |
e4e8248d | 4257 | e.X_add_number = 0; |
e0c9811a JW |
4258 | } |
4259 | ||
4260 | if (psprel) | |
e4e8248d | 4261 | add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a | 4262 | else |
e4e8248d | 4263 | add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a JW |
4264 | } |
4265 | ||
6290819d NC |
4266 | static unsigned int |
4267 | get_saved_prologue_count (lbl) | |
4268 | unsigned long lbl; | |
4269 | { | |
4270 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4271 | ||
4272 | while (lpc != NULL && lpc->label_number != lbl) | |
4273 | lpc = lpc->next; | |
4274 | ||
4275 | if (lpc != NULL) | |
4276 | return lpc->prologue_count; | |
4277 | ||
ad4b42b4 | 4278 | as_bad (_("Missing .label_state %ld"), lbl); |
6290819d NC |
4279 | return 1; |
4280 | } | |
4281 | ||
4282 | static void | |
4283 | save_prologue_count (lbl, count) | |
4284 | unsigned long lbl; | |
4285 | unsigned int count; | |
4286 | { | |
4287 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4288 | ||
4289 | while (lpc != NULL && lpc->label_number != lbl) | |
4290 | lpc = lpc->next; | |
4291 | ||
4292 | if (lpc != NULL) | |
4293 | lpc->prologue_count = count; | |
4294 | else | |
4295 | { | |
40449e9f | 4296 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4297 | |
4298 | new_lpc->next = unwind.saved_prologue_counts; | |
4299 | new_lpc->label_number = lbl; | |
4300 | new_lpc->prologue_count = count; | |
4301 | unwind.saved_prologue_counts = new_lpc; | |
4302 | } | |
4303 | } | |
4304 | ||
4305 | static void | |
4306 | free_saved_prologue_counts () | |
4307 | { | |
40449e9f KH |
4308 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4309 | label_prologue_count *next; | |
6290819d NC |
4310 | |
4311 | while (lpc != NULL) | |
4312 | { | |
4313 | next = lpc->next; | |
4314 | free (lpc); | |
4315 | lpc = next; | |
4316 | } | |
4317 | ||
4318 | unwind.saved_prologue_counts = NULL; | |
4319 | } | |
4320 | ||
e0c9811a JW |
4321 | static void |
4322 | dot_label_state (dummy) | |
2434f565 | 4323 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4324 | { |
4325 | expressionS e; | |
4326 | ||
75e09913 JB |
4327 | if (!in_body ("label_state")) |
4328 | return; | |
4329 | ||
e4e8248d JB |
4330 | parse_operand (&e, 0); |
4331 | if (e.X_op == O_constant) | |
4332 | save_prologue_count (e.X_add_number, unwind.prologue_count); | |
4333 | else | |
e0c9811a | 4334 | { |
ad4b42b4 | 4335 | as_bad (_("Operand to .label_state must be a constant")); |
e4e8248d | 4336 | e.X_add_number = 0; |
e0c9811a | 4337 | } |
e4e8248d | 4338 | add_unwind_entry (output_label_state (e.X_add_number), 0); |
e0c9811a JW |
4339 | } |
4340 | ||
4341 | static void | |
4342 | dot_copy_state (dummy) | |
2434f565 | 4343 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4344 | { |
4345 | expressionS e; | |
4346 | ||
75e09913 JB |
4347 | if (!in_body ("copy_state")) |
4348 | return; | |
4349 | ||
e4e8248d JB |
4350 | parse_operand (&e, 0); |
4351 | if (e.X_op == O_constant) | |
4352 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); | |
4353 | else | |
e0c9811a | 4354 | { |
ad4b42b4 | 4355 | as_bad (_("Operand to .copy_state must be a constant")); |
e4e8248d | 4356 | e.X_add_number = 0; |
e0c9811a | 4357 | } |
e4e8248d | 4358 | add_unwind_entry (output_copy_state (e.X_add_number), 0); |
800eeca4 JW |
4359 | } |
4360 | ||
197865e8 | 4361 | static void |
800eeca4 | 4362 | dot_unwabi (dummy) |
2434f565 | 4363 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4364 | { |
e0c9811a JW |
4365 | expressionS e1, e2; |
4366 | unsigned char sep; | |
4367 | ||
e4e8248d | 4368 | if (!in_prologue ("unwabi")) |
75e09913 JB |
4369 | return; |
4370 | ||
e4e8248d JB |
4371 | sep = parse_operand (&e1, ','); |
4372 | if (sep == ',') | |
4373 | parse_operand (&e2, 0); | |
4374 | else | |
4375 | e2.X_op = O_absent; | |
e0c9811a JW |
4376 | |
4377 | if (e1.X_op != O_constant) | |
4378 | { | |
ad4b42b4 | 4379 | as_bad (_("First operand to .unwabi must be a constant")); |
e4e8248d | 4380 | e1.X_add_number = 0; |
e0c9811a JW |
4381 | } |
4382 | ||
4383 | if (e2.X_op != O_constant) | |
4384 | { | |
ad4b42b4 | 4385 | as_bad (_("Second operand to .unwabi must be a constant")); |
e4e8248d | 4386 | e2.X_add_number = 0; |
e0c9811a JW |
4387 | } |
4388 | ||
e4e8248d | 4389 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); |
800eeca4 JW |
4390 | } |
4391 | ||
197865e8 | 4392 | static void |
800eeca4 | 4393 | dot_personality (dummy) |
2434f565 | 4394 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4395 | { |
4396 | char *name, *p, c; | |
75e09913 JB |
4397 | if (!in_procedure ("personality")) |
4398 | return; | |
800eeca4 JW |
4399 | SKIP_WHITESPACE (); |
4400 | name = input_line_pointer; | |
4401 | c = get_symbol_end (); | |
4402 | p = input_line_pointer; | |
e0c9811a | 4403 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4404 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4405 | *p = c; |
4406 | SKIP_WHITESPACE (); | |
4407 | demand_empty_rest_of_line (); | |
4408 | } | |
4409 | ||
4410 | static void | |
4411 | dot_proc (dummy) | |
2434f565 | 4412 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4413 | { |
4414 | char *name, *p, c; | |
4415 | symbolS *sym; | |
5656b6b8 JB |
4416 | proc_pending *pending, *last_pending; |
4417 | ||
4418 | if (unwind.proc_pending.sym) | |
4419 | { | |
4420 | (md.unwind_check == unwind_check_warning | |
4421 | ? as_warn | |
ad4b42b4 | 4422 | : as_bad) (_("Missing .endp after previous .proc")); |
5656b6b8 JB |
4423 | while (unwind.proc_pending.next) |
4424 | { | |
4425 | pending = unwind.proc_pending.next; | |
4426 | unwind.proc_pending.next = pending->next; | |
4427 | free (pending); | |
4428 | } | |
4429 | } | |
4430 | last_pending = NULL; | |
800eeca4 | 4431 | |
e0c9811a | 4432 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4433 | function symbols: */ |
800eeca4 JW |
4434 | while (1) |
4435 | { | |
4436 | SKIP_WHITESPACE (); | |
4437 | name = input_line_pointer; | |
4438 | c = get_symbol_end (); | |
4439 | p = input_line_pointer; | |
75e09913 | 4440 | if (!*name) |
ad4b42b4 | 4441 | as_bad (_("Empty argument of .proc")); |
75e09913 | 4442 | else |
542d6675 | 4443 | { |
75e09913 JB |
4444 | sym = symbol_find_or_make (name); |
4445 | if (S_IS_DEFINED (sym)) | |
ad4b42b4 | 4446 | as_bad (_("`%s' was already defined"), name); |
5656b6b8 JB |
4447 | else if (!last_pending) |
4448 | { | |
4449 | unwind.proc_pending.sym = sym; | |
4450 | last_pending = &unwind.proc_pending; | |
4451 | } | |
4452 | else | |
75e09913 | 4453 | { |
5656b6b8 JB |
4454 | pending = xmalloc (sizeof (*pending)); |
4455 | pending->sym = sym; | |
4456 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4457 | } |
4458 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4459 | } |
800eeca4 JW |
4460 | *p = c; |
4461 | SKIP_WHITESPACE (); | |
4462 | if (*input_line_pointer != ',') | |
4463 | break; | |
4464 | ++input_line_pointer; | |
4465 | } | |
5656b6b8 JB |
4466 | if (!last_pending) |
4467 | { | |
4468 | unwind.proc_pending.sym = expr_build_dot (); | |
4469 | last_pending = &unwind.proc_pending; | |
4470 | } | |
4471 | last_pending->next = NULL; | |
800eeca4 JW |
4472 | demand_empty_rest_of_line (); |
4473 | ia64_do_align (16); | |
4474 | ||
75e09913 | 4475 | unwind.prologue = 0; |
33d01f33 | 4476 | unwind.prologue_count = 0; |
75e09913 JB |
4477 | unwind.body = 0; |
4478 | unwind.insn = 0; | |
e0c9811a JW |
4479 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4480 | unwind.personality_routine = 0; | |
800eeca4 JW |
4481 | } |
4482 | ||
4483 | static void | |
4484 | dot_body (dummy) | |
2434f565 | 4485 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4486 | { |
75e09913 JB |
4487 | if (!in_procedure ("body")) |
4488 | return; | |
4489 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
ad4b42b4 | 4490 | as_warn (_("Initial .body should precede any instructions")); |
ba825241 | 4491 | check_pending_save (); |
75e09913 | 4492 | |
e0c9811a | 4493 | unwind.prologue = 0; |
30d25259 | 4494 | unwind.prologue_mask = 0; |
75e09913 | 4495 | unwind.body = 1; |
30d25259 | 4496 | |
e4e8248d | 4497 | add_unwind_entry (output_body (), 0); |
800eeca4 JW |
4498 | } |
4499 | ||
4500 | static void | |
4501 | dot_prologue (dummy) | |
2434f565 | 4502 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4503 | { |
e4e8248d | 4504 | unsigned mask = 0, grsave = 0; |
e0c9811a | 4505 | |
75e09913 JB |
4506 | if (!in_procedure ("prologue")) |
4507 | return; | |
4508 | if (unwind.prologue) | |
4509 | { | |
ad4b42b4 | 4510 | as_bad (_(".prologue within prologue")); |
75e09913 JB |
4511 | ignore_rest_of_line (); |
4512 | return; | |
4513 | } | |
4514 | if (!unwind.body && unwind.insn) | |
ad4b42b4 | 4515 | as_warn (_("Initial .prologue should precede any instructions")); |
75e09913 | 4516 | |
e0c9811a | 4517 | if (!is_it_end_of_statement ()) |
800eeca4 | 4518 | { |
e4e8248d JB |
4519 | expressionS e; |
4520 | int n, sep = parse_operand (&e, ','); | |
30d25259 | 4521 | |
e4e8248d JB |
4522 | if (e.X_op != O_constant |
4523 | || e.X_add_number < 0 | |
4524 | || e.X_add_number > 0xf) | |
ad4b42b4 | 4525 | as_bad (_("First operand to .prologue must be a positive 4-bit constant")); |
e4e8248d | 4526 | else if (e.X_add_number == 0) |
ad4b42b4 | 4527 | as_warn (_("Pointless use of zero first operand to .prologue")); |
e4e8248d JB |
4528 | else |
4529 | mask = e.X_add_number; | |
4530 | n = popcount (mask); | |
30d25259 | 4531 | |
e4e8248d JB |
4532 | if (sep == ',') |
4533 | parse_operand (&e, 0); | |
800eeca4 | 4534 | else |
e4e8248d JB |
4535 | e.X_op = O_absent; |
4536 | if (e.X_op == O_constant | |
4537 | && e.X_add_number >= 0 | |
4538 | && e.X_add_number < 128) | |
4539 | { | |
4540 | if (md.unwind_check == unwind_check_error) | |
ad4b42b4 | 4541 | as_warn (_("Using a constant as second operand to .prologue is deprecated")); |
e4e8248d JB |
4542 | grsave = e.X_add_number; |
4543 | } | |
4544 | else if (e.X_op != O_register | |
4545 | || (grsave = e.X_add_number - REG_GR) > 127) | |
4546 | { | |
ad4b42b4 | 4547 | as_bad (_("Second operand to .prologue must be a general register")); |
e4e8248d JB |
4548 | grsave = 0; |
4549 | } | |
4550 | else if (grsave > 128U - n) | |
4551 | { | |
ad4b42b4 | 4552 | as_bad (_("Second operand to .prologue must be the first of %d general registers"), n); |
e4e8248d JB |
4553 | grsave = 0; |
4554 | } | |
4555 | ||
800eeca4 | 4556 | } |
e4e8248d JB |
4557 | |
4558 | if (mask) | |
4559 | add_unwind_entry (output_prologue_gr (mask, grsave), 0); | |
800eeca4 | 4560 | else |
e4e8248d | 4561 | add_unwind_entry (output_prologue (), 0); |
30d25259 RH |
4562 | |
4563 | unwind.prologue = 1; | |
4564 | unwind.prologue_mask = mask; | |
e4e8248d | 4565 | unwind.prologue_gr = grsave; |
75e09913 | 4566 | unwind.body = 0; |
33d01f33 | 4567 | ++unwind.prologue_count; |
800eeca4 JW |
4568 | } |
4569 | ||
4570 | static void | |
4571 | dot_endp (dummy) | |
2434f565 | 4572 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4573 | { |
4574 | expressionS e; | |
44f5c83a | 4575 | int bytes_per_address; |
800eeca4 JW |
4576 | long where; |
4577 | segT saved_seg; | |
4578 | subsegT saved_subseg; | |
5656b6b8 | 4579 | proc_pending *pending; |
970d6792 | 4580 | int unwind_check = md.unwind_check; |
800eeca4 | 4581 | |
970d6792 | 4582 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4583 | if (!in_procedure ("endp")) |
4584 | return; | |
970d6792 | 4585 | md.unwind_check = unwind_check; |
75e09913 | 4586 | |
91a2ae2a RH |
4587 | if (unwind.saved_text_seg) |
4588 | { | |
4589 | saved_seg = unwind.saved_text_seg; | |
4590 | saved_subseg = unwind.saved_text_subseg; | |
4591 | unwind.saved_text_seg = NULL; | |
4592 | } | |
4593 | else | |
4594 | { | |
4595 | saved_seg = now_seg; | |
4596 | saved_subseg = now_subseg; | |
4597 | } | |
4598 | ||
800eeca4 | 4599 | insn_group_break (1, 0, 0); |
800eeca4 | 4600 | |
91a2ae2a RH |
4601 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4602 | if (!unwind.info) | |
2d6ed997 | 4603 | generate_unwind_image (saved_seg); |
800eeca4 | 4604 | |
91a2ae2a RH |
4605 | if (unwind.info || unwind.force_unwind_entry) |
4606 | { | |
75e09913 JB |
4607 | symbolS *proc_end; |
4608 | ||
91a2ae2a | 4609 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4610 | proc_end = expr_build_dot (); |
5e7474a7 | 4611 | |
da9f89d4 | 4612 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4613 | |
557debba JW |
4614 | /* Make sure that section has 4 byte alignment for ILP32 and |
4615 | 8 byte alignment for LP64. */ | |
4616 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4617 | |
557debba JW |
4618 | /* Need space for 3 pointers for procedure start, procedure end, |
4619 | and unwind info. */ | |
6baf2b51 | 4620 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4621 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4622 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4623 | |
40449e9f | 4624 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4625 | e.X_op = O_pseudo_fixup; |
4626 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4627 | e.X_add_number = 0; | |
5656b6b8 JB |
4628 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4629 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4630 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4631 | S_GET_VALUE (unwind.proc_pending.sym), | |
4632 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4633 | else |
5656b6b8 | 4634 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4635 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4636 | |
800eeca4 JW |
4637 | e.X_op = O_pseudo_fixup; |
4638 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4639 | e.X_add_number = 0; | |
75e09913 | 4640 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4641 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4642 | bytes_per_address, &e); | |
4643 | ||
4644 | if (unwind.info) | |
4645 | { | |
4646 | e.X_op = O_pseudo_fixup; | |
4647 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4648 | e.X_add_number = 0; | |
4649 | e.X_add_symbol = unwind.info; | |
4650 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4651 | bytes_per_address, &e); | |
4652 | } | |
91a2ae2a | 4653 | } |
800eeca4 | 4654 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4655 | |
5656b6b8 JB |
4656 | /* Set symbol sizes. */ |
4657 | pending = &unwind.proc_pending; | |
4658 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4659 | { |
5656b6b8 | 4660 | do |
75e09913 | 4661 | { |
5656b6b8 JB |
4662 | symbolS *sym = pending->sym; |
4663 | ||
4664 | if (!S_IS_DEFINED (sym)) | |
ad4b42b4 | 4665 | as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym)); |
5656b6b8 JB |
4666 | else if (S_GET_SIZE (sym) == 0 |
4667 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4668 | { |
75e09913 JB |
4669 | fragS *frag = symbol_get_frag (sym); |
4670 | ||
5656b6b8 | 4671 | if (frag) |
c538998c | 4672 | { |
75e09913 JB |
4673 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4674 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4675 | else | |
4676 | { | |
4677 | symbol_get_obj (sym)->size = | |
4678 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4679 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4680 | symbol_get_obj (sym)->size->X_add_symbol | |
4681 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4682 | frag_now_fix (), frag_now); | |
4683 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4684 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4685 | } | |
c538998c JJ |
4686 | } |
4687 | } | |
5656b6b8 JB |
4688 | } while ((pending = pending->next) != NULL); |
4689 | } | |
4690 | ||
4691 | /* Parse names of main and alternate entry points. */ | |
4692 | while (1) | |
4693 | { | |
4694 | char *name, *p, c; | |
4695 | ||
4696 | SKIP_WHITESPACE (); | |
4697 | name = input_line_pointer; | |
4698 | c = get_symbol_end (); | |
4699 | p = input_line_pointer; | |
4700 | if (!*name) | |
4701 | (md.unwind_check == unwind_check_warning | |
4702 | ? as_warn | |
ad4b42b4 | 4703 | : as_bad) (_("Empty argument of .endp")); |
5656b6b8 JB |
4704 | else |
4705 | { | |
4706 | symbolS *sym = symbol_find (name); | |
4707 | ||
4708 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4709 | { | |
4710 | if (sym == pending->sym) | |
4711 | { | |
4712 | pending->sym = NULL; | |
4713 | break; | |
4714 | } | |
4715 | } | |
4716 | if (!sym || !pending) | |
ad4b42b4 | 4717 | as_warn (_("`%s' was not specified with previous .proc"), name); |
c538998c JJ |
4718 | } |
4719 | *p = c; | |
4720 | SKIP_WHITESPACE (); | |
4721 | if (*input_line_pointer != ',') | |
4722 | break; | |
4723 | ++input_line_pointer; | |
4724 | } | |
4725 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4726 | |
4727 | /* Deliberately only checking for the main entry point here; the | |
4728 | language spec even says all arguments to .endp are ignored. */ | |
4729 | if (unwind.proc_pending.sym | |
4730 | && S_GET_NAME (unwind.proc_pending.sym) | |
4731 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
ad4b42b4 | 4732 | as_warn (_("`%s' should be an operand to this .endp"), |
5656b6b8 JB |
4733 | S_GET_NAME (unwind.proc_pending.sym)); |
4734 | while (unwind.proc_pending.next) | |
4735 | { | |
4736 | pending = unwind.proc_pending.next; | |
4737 | unwind.proc_pending.next = pending->next; | |
4738 | free (pending); | |
4739 | } | |
4740 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4741 | } |
4742 | ||
4743 | static void | |
4744 | dot_template (template) | |
4745 | int template; | |
4746 | { | |
4747 | CURR_SLOT.user_template = template; | |
4748 | } | |
4749 | ||
4750 | static void | |
4751 | dot_regstk (dummy) | |
2434f565 | 4752 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4753 | { |
4754 | int ins, locs, outs, rots; | |
4755 | ||
4756 | if (is_it_end_of_statement ()) | |
4757 | ins = locs = outs = rots = 0; | |
4758 | else | |
4759 | { | |
4760 | ins = get_absolute_expression (); | |
4761 | if (*input_line_pointer++ != ',') | |
4762 | goto err; | |
4763 | locs = get_absolute_expression (); | |
4764 | if (*input_line_pointer++ != ',') | |
4765 | goto err; | |
4766 | outs = get_absolute_expression (); | |
4767 | if (*input_line_pointer++ != ',') | |
4768 | goto err; | |
4769 | rots = get_absolute_expression (); | |
4770 | } | |
4771 | set_regstack (ins, locs, outs, rots); | |
4772 | return; | |
4773 | ||
4774 | err: | |
ad4b42b4 | 4775 | as_bad (_("Comma expected")); |
800eeca4 JW |
4776 | ignore_rest_of_line (); |
4777 | } | |
4778 | ||
4779 | static void | |
4780 | dot_rot (type) | |
4781 | int type; | |
4782 | { | |
6a2375c6 JB |
4783 | offsetT num_regs; |
4784 | valueT num_alloced = 0; | |
800eeca4 JW |
4785 | struct dynreg **drpp, *dr; |
4786 | int ch, base_reg = 0; | |
4787 | char *name, *start; | |
4788 | size_t len; | |
4789 | ||
4790 | switch (type) | |
4791 | { | |
4792 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4793 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4794 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4795 | default: break; | |
4796 | } | |
4797 | ||
542d6675 | 4798 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4799 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4800 | { | |
4801 | hash_delete (md.dynreg_hash, dr->name); | |
20b36a95 | 4802 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4803 | dr->num_regs = 0; |
4804 | } | |
4805 | ||
4806 | drpp = &md.dynreg[type]; | |
4807 | while (1) | |
4808 | { | |
4809 | start = input_line_pointer; | |
4810 | ch = get_symbol_end (); | |
20b36a95 | 4811 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4812 | *input_line_pointer = ch; |
800eeca4 JW |
4813 | |
4814 | SKIP_WHITESPACE (); | |
4815 | if (*input_line_pointer != '[') | |
4816 | { | |
ad4b42b4 | 4817 | as_bad (_("Expected '['")); |
800eeca4 JW |
4818 | goto err; |
4819 | } | |
4820 | ++input_line_pointer; /* skip '[' */ | |
4821 | ||
4822 | num_regs = get_absolute_expression (); | |
4823 | ||
4824 | if (*input_line_pointer++ != ']') | |
4825 | { | |
ad4b42b4 | 4826 | as_bad (_("Expected ']'")); |
800eeca4 JW |
4827 | goto err; |
4828 | } | |
6a2375c6 JB |
4829 | if (num_regs <= 0) |
4830 | { | |
ad4b42b4 | 4831 | as_bad (_("Number of elements must be positive")); |
6a2375c6 JB |
4832 | goto err; |
4833 | } | |
800eeca4 JW |
4834 | SKIP_WHITESPACE (); |
4835 | ||
4836 | num_alloced += num_regs; | |
4837 | switch (type) | |
4838 | { | |
4839 | case DYNREG_GR: | |
4840 | if (num_alloced > md.rot.num_regs) | |
4841 | { | |
ad4b42b4 | 4842 | as_bad (_("Used more than the declared %d rotating registers"), |
800eeca4 JW |
4843 | md.rot.num_regs); |
4844 | goto err; | |
4845 | } | |
4846 | break; | |
4847 | case DYNREG_FR: | |
4848 | if (num_alloced > 96) | |
4849 | { | |
ad4b42b4 | 4850 | as_bad (_("Used more than the available 96 rotating registers")); |
800eeca4 JW |
4851 | goto err; |
4852 | } | |
4853 | break; | |
4854 | case DYNREG_PR: | |
4855 | if (num_alloced > 48) | |
4856 | { | |
ad4b42b4 | 4857 | as_bad (_("Used more than the available 48 rotating registers")); |
800eeca4 JW |
4858 | goto err; |
4859 | } | |
4860 | break; | |
4861 | ||
4862 | default: | |
4863 | break; | |
4864 | } | |
4865 | ||
800eeca4 JW |
4866 | if (!*drpp) |
4867 | { | |
4868 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4869 | memset (*drpp, 0, sizeof (*dr)); | |
4870 | } | |
4871 | ||
20b36a95 JB |
4872 | name = obstack_alloc (¬es, len + 1); |
4873 | memcpy (name, start, len); | |
4874 | name[len] = '\0'; | |
4875 | ||
800eeca4 JW |
4876 | dr = *drpp; |
4877 | dr->name = name; | |
4878 | dr->num_regs = num_regs; | |
4879 | dr->base = base_reg; | |
4880 | drpp = &dr->next; | |
4881 | base_reg += num_regs; | |
4882 | ||
4883 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4884 | { | |
ad4b42b4 | 4885 | as_bad (_("Attempt to redefine register set `%s'"), name); |
20b36a95 | 4886 | obstack_free (¬es, name); |
800eeca4 JW |
4887 | goto err; |
4888 | } | |
4889 | ||
4890 | if (*input_line_pointer != ',') | |
4891 | break; | |
4892 | ++input_line_pointer; /* skip comma */ | |
4893 | SKIP_WHITESPACE (); | |
4894 | } | |
4895 | demand_empty_rest_of_line (); | |
4896 | return; | |
4897 | ||
4898 | err: | |
4899 | ignore_rest_of_line (); | |
4900 | } | |
4901 | ||
4902 | static void | |
4903 | dot_byteorder (byteorder) | |
4904 | int byteorder; | |
4905 | { | |
10a98291 L |
4906 | segment_info_type *seginfo = seg_info (now_seg); |
4907 | ||
4908 | if (byteorder == -1) | |
4909 | { | |
4910 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4911 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4912 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4913 | } | |
4914 | else | |
4915 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4916 | ||
4917 | if (target_big_endian != byteorder) | |
4918 | { | |
4919 | target_big_endian = byteorder; | |
4920 | if (target_big_endian) | |
4921 | { | |
4922 | ia64_number_to_chars = number_to_chars_bigendian; | |
4923 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4924 | } | |
4925 | else | |
4926 | { | |
4927 | ia64_number_to_chars = number_to_chars_littleendian; | |
4928 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4929 | } | |
4930 | } | |
800eeca4 JW |
4931 | } |
4932 | ||
4933 | static void | |
4934 | dot_psr (dummy) | |
2434f565 | 4935 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4936 | { |
4937 | char *option; | |
4938 | int ch; | |
4939 | ||
4940 | while (1) | |
4941 | { | |
4942 | option = input_line_pointer; | |
4943 | ch = get_symbol_end (); | |
4944 | if (strcmp (option, "lsb") == 0) | |
4945 | md.flags &= ~EF_IA_64_BE; | |
4946 | else if (strcmp (option, "msb") == 0) | |
4947 | md.flags |= EF_IA_64_BE; | |
4948 | else if (strcmp (option, "abi32") == 0) | |
4949 | md.flags &= ~EF_IA_64_ABI64; | |
4950 | else if (strcmp (option, "abi64") == 0) | |
4951 | md.flags |= EF_IA_64_ABI64; | |
4952 | else | |
ad4b42b4 | 4953 | as_bad (_("Unknown psr option `%s'"), option); |
800eeca4 JW |
4954 | *input_line_pointer = ch; |
4955 | ||
4956 | SKIP_WHITESPACE (); | |
4957 | if (*input_line_pointer != ',') | |
4958 | break; | |
4959 | ||
4960 | ++input_line_pointer; | |
4961 | SKIP_WHITESPACE (); | |
4962 | } | |
4963 | demand_empty_rest_of_line (); | |
4964 | } | |
4965 | ||
800eeca4 JW |
4966 | static void |
4967 | dot_ln (dummy) | |
2434f565 | 4968 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4969 | { |
4970 | new_logical_line (0, get_absolute_expression ()); | |
4971 | demand_empty_rest_of_line (); | |
4972 | } | |
4973 | ||
ef6a2b41 JB |
4974 | static void |
4975 | cross_section (ref, cons, ua) | |
4976 | int ref; | |
4977 | void (*cons) PARAMS((int)); | |
4978 | int ua; | |
800eeca4 | 4979 | { |
ef6a2b41 JB |
4980 | char *start, *end; |
4981 | int saved_auto_align; | |
4982 | unsigned int section_count; | |
800eeca4 JW |
4983 | |
4984 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4985 | start = input_line_pointer; |
4986 | if (*start == '"') | |
4987 | { | |
4988 | int len; | |
4989 | char *name; | |
4990 | ||
b3f19c14 | 4991 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4992 | obstack_free(¬es, name); |
4993 | if (!name) | |
4994 | { | |
4995 | ignore_rest_of_line (); | |
4996 | return; | |
4997 | } | |
4998 | } | |
b3f19c14 | 4999 | else |
800eeca4 | 5000 | { |
b3f19c14 JB |
5001 | char c = get_symbol_end (); |
5002 | ||
5003 | if (input_line_pointer == start) | |
5004 | { | |
ad4b42b4 | 5005 | as_bad (_("Missing section name")); |
b3f19c14 | 5006 | ignore_rest_of_line (); |
ef6a2b41 | 5007 | return; |
b3f19c14 | 5008 | } |
b3f19c14 | 5009 | *input_line_pointer = c; |
800eeca4 | 5010 | } |
ef6a2b41 | 5011 | end = input_line_pointer; |
800eeca4 JW |
5012 | SKIP_WHITESPACE (); |
5013 | if (*input_line_pointer != ',') | |
5014 | { | |
ad4b42b4 | 5015 | as_bad (_("Comma expected after section name")); |
800eeca4 | 5016 | ignore_rest_of_line (); |
ef6a2b41 | 5017 | return; |
800eeca4 | 5018 | } |
ef6a2b41 JB |
5019 | *end = '\0'; |
5020 | end = input_line_pointer + 1; /* skip comma */ | |
5021 | input_line_pointer = start; | |
5022 | md.keep_pending_output = 1; | |
5023 | section_count = bfd_count_sections(stdoutput); | |
5024 | obj_elf_section (0); | |
5025 | if (section_count != bfd_count_sections(stdoutput)) | |
ad4b42b4 | 5026 | as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.")); |
ef6a2b41 JB |
5027 | input_line_pointer = end; |
5028 | saved_auto_align = md.auto_align; | |
5029 | if (ua) | |
5030 | md.auto_align = 0; | |
5031 | (*cons) (ref); | |
5032 | if (ua) | |
5033 | md.auto_align = saved_auto_align; | |
5034 | obj_elf_previous (0); | |
5035 | md.keep_pending_output = 0; | |
800eeca4 JW |
5036 | } |
5037 | ||
5038 | static void | |
5039 | dot_xdata (size) | |
5040 | int size; | |
5041 | { | |
ef6a2b41 | 5042 | cross_section (size, cons, 0); |
800eeca4 JW |
5043 | } |
5044 | ||
5045 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 5046 | |
800eeca4 JW |
5047 | static void |
5048 | stmt_float_cons (kind) | |
5049 | int kind; | |
5050 | { | |
165a7f90 | 5051 | size_t alignment; |
800eeca4 JW |
5052 | |
5053 | switch (kind) | |
5054 | { | |
165a7f90 L |
5055 | case 'd': |
5056 | alignment = 8; | |
5057 | break; | |
5058 | ||
5059 | case 'x': | |
5060 | case 'X': | |
5061 | alignment = 16; | |
5062 | break; | |
800eeca4 JW |
5063 | |
5064 | case 'f': | |
5065 | default: | |
165a7f90 | 5066 | alignment = 4; |
800eeca4 JW |
5067 | break; |
5068 | } | |
165a7f90 | 5069 | ia64_do_align (alignment); |
800eeca4 JW |
5070 | float_cons (kind); |
5071 | } | |
5072 | ||
5073 | static void | |
5074 | stmt_cons_ua (size) | |
5075 | int size; | |
5076 | { | |
5077 | int saved_auto_align = md.auto_align; | |
5078 | ||
5079 | md.auto_align = 0; | |
5080 | cons (size); | |
5081 | md.auto_align = saved_auto_align; | |
5082 | } | |
5083 | ||
5084 | static void | |
5085 | dot_xfloat_cons (kind) | |
5086 | int kind; | |
5087 | { | |
ef6a2b41 | 5088 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
5089 | } |
5090 | ||
5091 | static void | |
38a57ae7 | 5092 | dot_xstringer (int zero) |
800eeca4 | 5093 | { |
ef6a2b41 | 5094 | cross_section (zero, stringer, 0); |
800eeca4 JW |
5095 | } |
5096 | ||
5097 | static void | |
5098 | dot_xdata_ua (size) | |
5099 | int size; | |
5100 | { | |
ef6a2b41 | 5101 | cross_section (size, cons, 1); |
800eeca4 JW |
5102 | } |
5103 | ||
5104 | static void | |
5105 | dot_xfloat_cons_ua (kind) | |
5106 | int kind; | |
5107 | { | |
ef6a2b41 | 5108 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
5109 | } |
5110 | ||
5111 | /* .reg.val <regname>,value */ | |
542d6675 | 5112 | |
800eeca4 JW |
5113 | static void |
5114 | dot_reg_val (dummy) | |
2434f565 | 5115 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5116 | { |
5117 | expressionS reg; | |
5118 | ||
60d11e55 | 5119 | expression_and_evaluate (®); |
800eeca4 JW |
5120 | if (reg.X_op != O_register) |
5121 | { | |
5122 | as_bad (_("Register name expected")); | |
5123 | ignore_rest_of_line (); | |
5124 | } | |
5125 | else if (*input_line_pointer++ != ',') | |
5126 | { | |
5127 | as_bad (_("Comma expected")); | |
5128 | ignore_rest_of_line (); | |
5129 | } | |
197865e8 | 5130 | else |
800eeca4 JW |
5131 | { |
5132 | valueT value = get_absolute_expression (); | |
5133 | int regno = reg.X_add_number; | |
a66d2bb7 | 5134 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 5135 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 5136 | else |
542d6675 KH |
5137 | { |
5138 | gr_values[regno - REG_GR].known = 1; | |
5139 | gr_values[regno - REG_GR].value = value; | |
5140 | gr_values[regno - REG_GR].path = md.path; | |
5141 | } | |
800eeca4 JW |
5142 | } |
5143 | demand_empty_rest_of_line (); | |
5144 | } | |
5145 | ||
5e819f9c JW |
5146 | /* |
5147 | .serialize.data | |
5148 | .serialize.instruction | |
5149 | */ | |
5150 | static void | |
5151 | dot_serialize (type) | |
5152 | int type; | |
5153 | { | |
5154 | insn_group_break (0, 0, 0); | |
5155 | if (type) | |
5156 | instruction_serialization (); | |
5157 | else | |
5158 | data_serialization (); | |
5159 | insn_group_break (0, 0, 0); | |
5160 | demand_empty_rest_of_line (); | |
5161 | } | |
5162 | ||
197865e8 | 5163 | /* select dv checking mode |
800eeca4 JW |
5164 | .auto |
5165 | .explicit | |
5166 | .default | |
5167 | ||
197865e8 | 5168 | A stop is inserted when changing modes |
800eeca4 | 5169 | */ |
542d6675 | 5170 | |
800eeca4 JW |
5171 | static void |
5172 | dot_dv_mode (type) | |
542d6675 | 5173 | int type; |
800eeca4 JW |
5174 | { |
5175 | if (md.manual_bundling) | |
5176 | as_warn (_("Directive invalid within a bundle")); | |
5177 | ||
5178 | if (type == 'E' || type == 'A') | |
5179 | md.mode_explicitly_set = 0; | |
5180 | else | |
5181 | md.mode_explicitly_set = 1; | |
5182 | ||
5183 | md.detect_dv = 1; | |
5184 | switch (type) | |
5185 | { | |
5186 | case 'A': | |
5187 | case 'a': | |
5188 | if (md.explicit_mode) | |
542d6675 | 5189 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5190 | md.explicit_mode = 0; |
5191 | break; | |
5192 | case 'E': | |
5193 | case 'e': | |
5194 | if (!md.explicit_mode) | |
542d6675 | 5195 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5196 | md.explicit_mode = 1; |
5197 | break; | |
5198 | default: | |
5199 | case 'd': | |
5200 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5201 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5202 | md.explicit_mode = md.default_explicit_mode; |
5203 | md.mode_explicitly_set = 0; | |
5204 | break; | |
5205 | } | |
5206 | } | |
5207 | ||
5208 | static void | |
5209 | print_prmask (mask) | |
542d6675 | 5210 | valueT mask; |
800eeca4 JW |
5211 | { |
5212 | int regno; | |
5213 | char *comma = ""; | |
542d6675 | 5214 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5215 | { |
542d6675 KH |
5216 | if (mask & ((valueT) 1 << regno)) |
5217 | { | |
5218 | fprintf (stderr, "%s p%d", comma, regno); | |
5219 | comma = ","; | |
5220 | } | |
800eeca4 JW |
5221 | } |
5222 | } | |
5223 | ||
5224 | /* | |
05ee4b0f JB |
5225 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5226 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5227 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5228 | .pred.safe_across_calls p1 [, p2 [,...]] |
5229 | */ | |
542d6675 | 5230 | |
800eeca4 JW |
5231 | static void |
5232 | dot_pred_rel (type) | |
542d6675 | 5233 | int type; |
800eeca4 JW |
5234 | { |
5235 | valueT mask = 0; | |
5236 | int count = 0; | |
5237 | int p1 = -1, p2 = -1; | |
5238 | ||
5239 | if (type == 0) | |
5240 | { | |
05ee4b0f | 5241 | if (*input_line_pointer == '"') |
542d6675 KH |
5242 | { |
5243 | int len; | |
5244 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5245 | |
542d6675 KH |
5246 | if (strcmp (form, "mutex") == 0) |
5247 | type = 'm'; | |
5248 | else if (strcmp (form, "clear") == 0) | |
5249 | type = 'c'; | |
5250 | else if (strcmp (form, "imply") == 0) | |
5251 | type = 'i'; | |
05ee4b0f JB |
5252 | obstack_free (¬es, form); |
5253 | } | |
5254 | else if (*input_line_pointer == '@') | |
5255 | { | |
5256 | char *form = ++input_line_pointer; | |
5257 | char c = get_symbol_end(); | |
5258 | ||
5259 | if (strcmp (form, "mutex") == 0) | |
5260 | type = 'm'; | |
5261 | else if (strcmp (form, "clear") == 0) | |
5262 | type = 'c'; | |
5263 | else if (strcmp (form, "imply") == 0) | |
5264 | type = 'i'; | |
5265 | *input_line_pointer = c; | |
5266 | } | |
5267 | else | |
5268 | { | |
5269 | as_bad (_("Missing predicate relation type")); | |
5270 | ignore_rest_of_line (); | |
5271 | return; | |
5272 | } | |
5273 | if (type == 0) | |
5274 | { | |
5275 | as_bad (_("Unrecognized predicate relation type")); | |
5276 | ignore_rest_of_line (); | |
5277 | return; | |
542d6675 | 5278 | } |
800eeca4 | 5279 | if (*input_line_pointer == ',') |
542d6675 | 5280 | ++input_line_pointer; |
800eeca4 JW |
5281 | SKIP_WHITESPACE (); |
5282 | } | |
5283 | ||
800eeca4 JW |
5284 | while (1) |
5285 | { | |
20b36a95 | 5286 | valueT bits = 1; |
cc941dee | 5287 | int sep, regno; |
20b36a95 JB |
5288 | expressionS pr, *pr1, *pr2; |
5289 | ||
cc941dee | 5290 | sep = parse_operand (&pr, ','); |
20b36a95 JB |
5291 | if (pr.X_op == O_register |
5292 | && pr.X_add_number >= REG_P | |
5293 | && pr.X_add_number <= REG_P + 63) | |
5294 | { | |
5295 | regno = pr.X_add_number - REG_P; | |
5296 | bits <<= regno; | |
5297 | count++; | |
5298 | if (p1 == -1) | |
5299 | p1 = regno; | |
5300 | else if (p2 == -1) | |
5301 | p2 = regno; | |
5302 | } | |
5303 | else if (type != 'i' | |
5304 | && pr.X_op == O_subtract | |
5305 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5306 | && pr1->X_op == O_register | |
5307 | && pr1->X_add_number >= REG_P | |
5308 | && pr1->X_add_number <= REG_P + 63 | |
5309 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5310 | && pr2->X_op == O_register | |
5311 | && pr2->X_add_number >= REG_P | |
5312 | && pr2->X_add_number <= REG_P + 63) | |
5313 | { | |
5314 | /* It's a range. */ | |
5315 | int stop; | |
5316 | ||
5317 | regno = pr1->X_add_number - REG_P; | |
5318 | stop = pr2->X_add_number - REG_P; | |
5319 | if (regno >= stop) | |
542d6675 KH |
5320 | { |
5321 | as_bad (_("Bad register range")); | |
5322 | ignore_rest_of_line (); | |
5323 | return; | |
5324 | } | |
20b36a95 JB |
5325 | bits = ((bits << stop) << 1) - (bits << regno); |
5326 | count += stop - regno + 1; | |
5327 | } | |
5328 | else | |
5329 | { | |
5330 | as_bad (_("Predicate register expected")); | |
5331 | ignore_rest_of_line (); | |
5332 | return; | |
542d6675 | 5333 | } |
20b36a95 JB |
5334 | if (mask & bits) |
5335 | as_warn (_("Duplicate predicate register ignored")); | |
5336 | mask |= bits; | |
cc941dee | 5337 | if (sep != ',') |
542d6675 | 5338 | break; |
800eeca4 JW |
5339 | } |
5340 | ||
5341 | switch (type) | |
5342 | { | |
5343 | case 'c': | |
5344 | if (count == 0) | |
542d6675 | 5345 | mask = ~(valueT) 0; |
800eeca4 | 5346 | clear_qp_mutex (mask); |
197865e8 | 5347 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5348 | break; |
5349 | case 'i': | |
5350 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5351 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5352 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5353 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5354 | else |
542d6675 | 5355 | add_qp_imply (p1, p2); |
800eeca4 JW |
5356 | break; |
5357 | case 'm': | |
5358 | if (count < 2) | |
542d6675 KH |
5359 | { |
5360 | as_bad (_("At least two PR arguments expected")); | |
5361 | break; | |
5362 | } | |
800eeca4 | 5363 | else if (mask & 1) |
542d6675 KH |
5364 | { |
5365 | as_bad (_("Use of p0 is not valid in this context")); | |
5366 | break; | |
5367 | } | |
800eeca4 JW |
5368 | add_qp_mutex (mask); |
5369 | break; | |
5370 | case 's': | |
5371 | /* note that we don't override any existing relations */ | |
5372 | if (count == 0) | |
542d6675 KH |
5373 | { |
5374 | as_bad (_("At least one PR argument expected")); | |
5375 | break; | |
5376 | } | |
800eeca4 | 5377 | if (md.debug_dv) |
542d6675 KH |
5378 | { |
5379 | fprintf (stderr, "Safe across calls: "); | |
5380 | print_prmask (mask); | |
5381 | fprintf (stderr, "\n"); | |
5382 | } | |
800eeca4 JW |
5383 | qp_safe_across_calls = mask; |
5384 | break; | |
5385 | } | |
5386 | demand_empty_rest_of_line (); | |
5387 | } | |
5388 | ||
5389 | /* .entry label [, label [, ...]] | |
5390 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5391 | Otherwise, only global labels are considered entry points. */ |
5392 | ||
800eeca4 JW |
5393 | static void |
5394 | dot_entry (dummy) | |
2434f565 | 5395 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5396 | { |
5397 | const char *err; | |
5398 | char *name; | |
5399 | int c; | |
5400 | symbolS *symbolP; | |
5401 | ||
5402 | do | |
5403 | { | |
5404 | name = input_line_pointer; | |
5405 | c = get_symbol_end (); | |
5406 | symbolP = symbol_find_or_make (name); | |
5407 | ||
5408 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
5409 | if (err) | |
542d6675 KH |
5410 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5411 | name, err); | |
800eeca4 JW |
5412 | |
5413 | *input_line_pointer = c; | |
5414 | SKIP_WHITESPACE (); | |
5415 | c = *input_line_pointer; | |
5416 | if (c == ',') | |
5417 | { | |
5418 | input_line_pointer++; | |
5419 | SKIP_WHITESPACE (); | |
5420 | if (*input_line_pointer == '\n') | |
5421 | c = '\n'; | |
5422 | } | |
5423 | } | |
5424 | while (c == ','); | |
5425 | ||
5426 | demand_empty_rest_of_line (); | |
5427 | } | |
5428 | ||
197865e8 | 5429 | /* .mem.offset offset, base |
542d6675 KH |
5430 | "base" is used to distinguish between offsets from a different base. */ |
5431 | ||
800eeca4 JW |
5432 | static void |
5433 | dot_mem_offset (dummy) | |
2434f565 | 5434 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5435 | { |
5436 | md.mem_offset.hint = 1; | |
5437 | md.mem_offset.offset = get_absolute_expression (); | |
5438 | if (*input_line_pointer != ',') | |
5439 | { | |
5440 | as_bad (_("Comma expected")); | |
5441 | ignore_rest_of_line (); | |
5442 | return; | |
5443 | } | |
5444 | ++input_line_pointer; | |
5445 | md.mem_offset.base = get_absolute_expression (); | |
5446 | demand_empty_rest_of_line (); | |
5447 | } | |
5448 | ||
542d6675 | 5449 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5450 | const pseudo_typeS md_pseudo_table[] = |
5451 | { | |
5452 | { "radix", dot_radix, 0 }, | |
5453 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5454 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5455 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5456 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5457 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5458 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5459 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5460 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5461 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5462 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5463 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5464 | { "proc", dot_proc, 0 }, |
5465 | { "body", dot_body, 0 }, | |
5466 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5467 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5468 | |
5469 | { "fframe", dot_fframe, 0 }, | |
5470 | { "vframe", dot_vframe, 0 }, | |
5471 | { "vframesp", dot_vframesp, 0 }, | |
e4e8248d | 5472 | { "vframepsp", dot_vframesp, 1 }, |
2434f565 JW |
5473 | { "save", dot_save, 0 }, |
5474 | { "restore", dot_restore, 0 }, | |
5475 | { "restorereg", dot_restorereg, 0 }, | |
e4e8248d | 5476 | { "restorereg.p", dot_restorereg, 1 }, |
2434f565 JW |
5477 | { "handlerdata", dot_handlerdata, 0 }, |
5478 | { "unwentry", dot_unwentry, 0 }, | |
5479 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5480 | { "savesp", dot_savemem, 0 }, |
5481 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5482 | { "save.g", dot_saveg, 0 }, |
5483 | { "save.f", dot_savef, 0 }, | |
5484 | { "save.b", dot_saveb, 0 }, | |
5485 | { "save.gf", dot_savegf, 0 }, | |
5486 | { "spill", dot_spill, 0 }, | |
5487 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5488 | { "spillsp", dot_spillmem, 0 }, |
5489 | { "spillpsp", dot_spillmem, 1 }, | |
e4e8248d JB |
5490 | { "spillreg.p", dot_spillreg, 1 }, |
5491 | { "spillsp.p", dot_spillmem, ~0 }, | |
5492 | { "spillpsp.p", dot_spillmem, ~1 }, | |
2434f565 JW |
5493 | { "label_state", dot_label_state, 0 }, |
5494 | { "copy_state", dot_copy_state, 0 }, | |
5495 | { "unwabi", dot_unwabi, 0 }, | |
5496 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5497 | { "mii", dot_template, 0x0 }, |
5498 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5499 | { "mlx", dot_template, 0x2 }, | |
5500 | { "mmi", dot_template, 0x4 }, | |
5501 | { "mfi", dot_template, 0x6 }, | |
5502 | { "mmf", dot_template, 0x7 }, | |
5503 | { "mib", dot_template, 0x8 }, | |
5504 | { "mbb", dot_template, 0x9 }, | |
5505 | { "bbb", dot_template, 0xb }, | |
5506 | { "mmb", dot_template, 0xc }, | |
5507 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5508 | { "align", dot_align, 0 }, |
800eeca4 JW |
5509 | { "regstk", dot_regstk, 0 }, |
5510 | { "rotr", dot_rot, DYNREG_GR }, | |
5511 | { "rotf", dot_rot, DYNREG_FR }, | |
5512 | { "rotp", dot_rot, DYNREG_PR }, | |
5513 | { "lsb", dot_byteorder, 0 }, | |
5514 | { "msb", dot_byteorder, 1 }, | |
5515 | { "psr", dot_psr, 0 }, | |
5516 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5517 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5518 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5519 | ||
5520 | { "xdata1", dot_xdata, 1 }, | |
5521 | { "xdata2", dot_xdata, 2 }, | |
5522 | { "xdata4", dot_xdata, 4 }, | |
5523 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5524 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5525 | { "xreal4", dot_xfloat_cons, 'f' }, |
5526 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5527 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5528 | { "xreal16", dot_xfloat_cons, 'X' }, |
38a57ae7 NC |
5529 | { "xstring", dot_xstringer, 8 + 0 }, |
5530 | { "xstringz", dot_xstringer, 8 + 1 }, | |
800eeca4 | 5531 | |
542d6675 | 5532 | /* unaligned versions: */ |
800eeca4 JW |
5533 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5534 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5535 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5536 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5537 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5538 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5539 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5540 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5541 | |
5542 | /* annotations/DV checking support */ | |
5543 | { "entry", dot_entry, 0 }, | |
2434f565 | 5544 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5545 | { "pred.rel", dot_pred_rel, 0 }, |
5546 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5547 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5548 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5549 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5550 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5551 | { "serialize.data", dot_serialize, 0 }, |
5552 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5553 | { "auto", dot_dv_mode, 'a' }, |
5554 | { "explicit", dot_dv_mode, 'e' }, | |
5555 | { "default", dot_dv_mode, 'd' }, | |
5556 | ||
87885043 JW |
5557 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5558 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5559 | tell it that these ones are supposed to be unaligned. Long term, | |
5560 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5561 | are aligned by default. */ | |
5562 | {"2byte", stmt_cons_ua, 2}, | |
5563 | {"4byte", stmt_cons_ua, 4}, | |
5564 | {"8byte", stmt_cons_ua, 8}, | |
5565 | ||
800eeca4 JW |
5566 | { NULL, 0, 0 } |
5567 | }; | |
5568 | ||
5569 | static const struct pseudo_opcode | |
5570 | { | |
5571 | const char *name; | |
5572 | void (*handler) (int); | |
5573 | int arg; | |
5574 | } | |
5575 | pseudo_opcode[] = | |
5576 | { | |
5577 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5578 | { "data1", cons, 1 }, | |
5579 | { "data2", cons, 2 }, | |
5580 | { "data4", cons, 4 }, | |
5581 | { "data8", cons, 8 }, | |
3969b680 | 5582 | { "data16", cons, 16 }, |
800eeca4 JW |
5583 | { "real4", stmt_float_cons, 'f' }, |
5584 | { "real8", stmt_float_cons, 'd' }, | |
5585 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5586 | { "real16", stmt_float_cons, 'X' }, |
38a57ae7 NC |
5587 | { "string", stringer, 8 + 0 }, |
5588 | { "stringz", stringer, 8 + 1 }, | |
800eeca4 | 5589 | |
542d6675 | 5590 | /* unaligned versions: */ |
800eeca4 JW |
5591 | { "data2.ua", stmt_cons_ua, 2 }, |
5592 | { "data4.ua", stmt_cons_ua, 4 }, | |
5593 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5594 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5595 | { "real4.ua", float_cons, 'f' }, |
5596 | { "real8.ua", float_cons, 'd' }, | |
5597 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5598 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5599 | }; |
5600 | ||
5601 | /* Declare a register by creating a symbol for it and entering it in | |
5602 | the symbol table. */ | |
542d6675 KH |
5603 | |
5604 | static symbolS * | |
800eeca4 JW |
5605 | declare_register (name, regnum) |
5606 | const char *name; | |
8b84be9d | 5607 | unsigned int regnum; |
800eeca4 JW |
5608 | { |
5609 | const char *err; | |
5610 | symbolS *sym; | |
5611 | ||
5e0bd176 | 5612 | sym = symbol_create (name, reg_section, regnum, &zero_address_frag); |
800eeca4 JW |
5613 | |
5614 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5615 | if (err) | |
5616 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5617 | name, err); | |
5618 | ||
5619 | return sym; | |
5620 | } | |
5621 | ||
5622 | static void | |
5623 | declare_register_set (prefix, num_regs, base_regnum) | |
5624 | const char *prefix; | |
8b84be9d JB |
5625 | unsigned int num_regs; |
5626 | unsigned int base_regnum; | |
800eeca4 JW |
5627 | { |
5628 | char name[8]; | |
8b84be9d | 5629 | unsigned int i; |
800eeca4 JW |
5630 | |
5631 | for (i = 0; i < num_regs; ++i) | |
5632 | { | |
f9f21a03 | 5633 | snprintf (name, sizeof (name), "%s%u", prefix, i); |
800eeca4 JW |
5634 | declare_register (name, base_regnum + i); |
5635 | } | |
5636 | } | |
5637 | ||
5638 | static unsigned int | |
5639 | operand_width (opnd) | |
5640 | enum ia64_opnd opnd; | |
5641 | { | |
5642 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5643 | unsigned int bits = 0; | |
5644 | int i; | |
5645 | ||
5646 | bits = 0; | |
5647 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5648 | bits += odesc->field[i].bits; | |
5649 | ||
5650 | return bits; | |
5651 | } | |
5652 | ||
87f8eb97 | 5653 | static enum operand_match_result |
800eeca4 JW |
5654 | operand_match (idesc, index, e) |
5655 | const struct ia64_opcode *idesc; | |
5656 | int index; | |
5657 | expressionS *e; | |
5658 | { | |
5659 | enum ia64_opnd opnd = idesc->operands[index]; | |
5660 | int bits, relocatable = 0; | |
5661 | struct insn_fix *fix; | |
5662 | bfd_signed_vma val; | |
5663 | ||
5664 | switch (opnd) | |
5665 | { | |
542d6675 | 5666 | /* constants: */ |
800eeca4 JW |
5667 | |
5668 | case IA64_OPND_AR_CCV: | |
5669 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5670 | return OPERAND_MATCH; |
800eeca4 JW |
5671 | break; |
5672 | ||
c10d9d8f JW |
5673 | case IA64_OPND_AR_CSD: |
5674 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5675 | return OPERAND_MATCH; | |
5676 | break; | |
5677 | ||
800eeca4 JW |
5678 | case IA64_OPND_AR_PFS: |
5679 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5680 | return OPERAND_MATCH; |
800eeca4 JW |
5681 | break; |
5682 | ||
5683 | case IA64_OPND_GR0: | |
5684 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5685 | return OPERAND_MATCH; |
800eeca4 JW |
5686 | break; |
5687 | ||
5688 | case IA64_OPND_IP: | |
5689 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5690 | return OPERAND_MATCH; |
800eeca4 JW |
5691 | break; |
5692 | ||
5693 | case IA64_OPND_PR: | |
5694 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5695 | return OPERAND_MATCH; |
800eeca4 JW |
5696 | break; |
5697 | ||
5698 | case IA64_OPND_PR_ROT: | |
5699 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5700 | return OPERAND_MATCH; |
800eeca4 JW |
5701 | break; |
5702 | ||
5703 | case IA64_OPND_PSR: | |
5704 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5705 | return OPERAND_MATCH; |
800eeca4 JW |
5706 | break; |
5707 | ||
5708 | case IA64_OPND_PSR_L: | |
5709 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5710 | return OPERAND_MATCH; |
800eeca4 JW |
5711 | break; |
5712 | ||
5713 | case IA64_OPND_PSR_UM: | |
5714 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5715 | return OPERAND_MATCH; |
800eeca4 JW |
5716 | break; |
5717 | ||
5718 | case IA64_OPND_C1: | |
87f8eb97 JW |
5719 | if (e->X_op == O_constant) |
5720 | { | |
5721 | if (e->X_add_number == 1) | |
5722 | return OPERAND_MATCH; | |
5723 | else | |
5724 | return OPERAND_OUT_OF_RANGE; | |
5725 | } | |
800eeca4 JW |
5726 | break; |
5727 | ||
5728 | case IA64_OPND_C8: | |
87f8eb97 JW |
5729 | if (e->X_op == O_constant) |
5730 | { | |
5731 | if (e->X_add_number == 8) | |
5732 | return OPERAND_MATCH; | |
5733 | else | |
5734 | return OPERAND_OUT_OF_RANGE; | |
5735 | } | |
800eeca4 JW |
5736 | break; |
5737 | ||
5738 | case IA64_OPND_C16: | |
87f8eb97 JW |
5739 | if (e->X_op == O_constant) |
5740 | { | |
5741 | if (e->X_add_number == 16) | |
5742 | return OPERAND_MATCH; | |
5743 | else | |
5744 | return OPERAND_OUT_OF_RANGE; | |
5745 | } | |
800eeca4 JW |
5746 | break; |
5747 | ||
542d6675 | 5748 | /* register operands: */ |
800eeca4 JW |
5749 | |
5750 | case IA64_OPND_AR3: | |
5751 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5752 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5753 | return OPERAND_MATCH; |
800eeca4 JW |
5754 | break; |
5755 | ||
5756 | case IA64_OPND_B1: | |
5757 | case IA64_OPND_B2: | |
5758 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5759 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5760 | return OPERAND_MATCH; |
800eeca4 JW |
5761 | break; |
5762 | ||
5763 | case IA64_OPND_CR3: | |
5764 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5765 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5766 | return OPERAND_MATCH; |
800eeca4 JW |
5767 | break; |
5768 | ||
5769 | case IA64_OPND_F1: | |
5770 | case IA64_OPND_F2: | |
5771 | case IA64_OPND_F3: | |
5772 | case IA64_OPND_F4: | |
5773 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5774 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5775 | return OPERAND_MATCH; |
800eeca4 JW |
5776 | break; |
5777 | ||
5778 | case IA64_OPND_P1: | |
5779 | case IA64_OPND_P2: | |
5780 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5781 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5782 | return OPERAND_MATCH; |
800eeca4 JW |
5783 | break; |
5784 | ||
5785 | case IA64_OPND_R1: | |
5786 | case IA64_OPND_R2: | |
5787 | case IA64_OPND_R3: | |
5788 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5789 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5790 | return OPERAND_MATCH; |
800eeca4 JW |
5791 | break; |
5792 | ||
5793 | case IA64_OPND_R3_2: | |
87f8eb97 | 5794 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5795 | { |
87f8eb97 JW |
5796 | if (e->X_add_number < REG_GR + 4) |
5797 | return OPERAND_MATCH; | |
5798 | else if (e->X_add_number < REG_GR + 128) | |
5799 | return OPERAND_OUT_OF_RANGE; | |
5800 | } | |
800eeca4 JW |
5801 | break; |
5802 | ||
542d6675 | 5803 | /* indirect operands: */ |
800eeca4 JW |
5804 | case IA64_OPND_CPUID_R3: |
5805 | case IA64_OPND_DBR_R3: | |
5806 | case IA64_OPND_DTR_R3: | |
5807 | case IA64_OPND_ITR_R3: | |
5808 | case IA64_OPND_IBR_R3: | |
5809 | case IA64_OPND_MSR_R3: | |
5810 | case IA64_OPND_PKR_R3: | |
5811 | case IA64_OPND_PMC_R3: | |
5812 | case IA64_OPND_PMD_R3: | |
5813 | case IA64_OPND_RR_R3: | |
5814 | if (e->X_op == O_index && e->X_op_symbol | |
5815 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5816 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5817 | return OPERAND_MATCH; |
800eeca4 JW |
5818 | break; |
5819 | ||
5820 | case IA64_OPND_MR3: | |
5821 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5822 | return OPERAND_MATCH; |
800eeca4 JW |
5823 | break; |
5824 | ||
542d6675 | 5825 | /* immediate operands: */ |
800eeca4 JW |
5826 | case IA64_OPND_CNT2a: |
5827 | case IA64_OPND_LEN4: | |
5828 | case IA64_OPND_LEN6: | |
5829 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5830 | if (e->X_op == O_constant) |
5831 | { | |
5832 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5833 | return OPERAND_MATCH; | |
5834 | else | |
5835 | return OPERAND_OUT_OF_RANGE; | |
5836 | } | |
800eeca4 JW |
5837 | break; |
5838 | ||
5839 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5840 | if (e->X_op == O_constant) |
5841 | { | |
5842 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5843 | return OPERAND_MATCH; | |
5844 | else | |
5845 | return OPERAND_OUT_OF_RANGE; | |
5846 | } | |
800eeca4 JW |
5847 | break; |
5848 | ||
5849 | case IA64_OPND_CNT2c: | |
5850 | val = e->X_add_number; | |
87f8eb97 JW |
5851 | if (e->X_op == O_constant) |
5852 | { | |
5853 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5854 | return OPERAND_MATCH; | |
5855 | else | |
5856 | return OPERAND_OUT_OF_RANGE; | |
5857 | } | |
800eeca4 JW |
5858 | break; |
5859 | ||
5860 | case IA64_OPND_SOR: | |
5861 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5862 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5863 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5864 | case IA64_OPND_SOF: |
5865 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5866 | if (e->X_op == O_constant) |
5867 | { | |
5868 | if ((bfd_vma) e->X_add_number <= 96) | |
5869 | return OPERAND_MATCH; | |
5870 | else | |
5871 | return OPERAND_OUT_OF_RANGE; | |
5872 | } | |
800eeca4 JW |
5873 | break; |
5874 | ||
5875 | case IA64_OPND_IMMU62: | |
5876 | if (e->X_op == O_constant) | |
542d6675 | 5877 | { |
800eeca4 | 5878 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5879 | return OPERAND_MATCH; |
5880 | else | |
5881 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5882 | } |
197865e8 | 5883 | else |
542d6675 KH |
5884 | { |
5885 | /* FIXME -- need 62-bit relocation type */ | |
5886 | as_bad (_("62-bit relocation not yet implemented")); | |
5887 | } | |
800eeca4 JW |
5888 | break; |
5889 | ||
5890 | case IA64_OPND_IMMU64: | |
5891 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5892 | || e->X_op == O_subtract) | |
5893 | { | |
5894 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5895 | fix->code = BFD_RELOC_IA64_IMM64; | |
5896 | if (e->X_op != O_subtract) | |
5897 | { | |
5898 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5899 | if (e->X_op == O_pseudo_fixup) | |
5900 | e->X_op = O_symbol; | |
5901 | } | |
5902 | ||
5903 | fix->opnd = idesc->operands[index]; | |
5904 | fix->expr = *e; | |
5905 | fix->is_pcrel = 0; | |
5906 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5907 | return OPERAND_MATCH; |
800eeca4 JW |
5908 | } |
5909 | else if (e->X_op == O_constant) | |
87f8eb97 | 5910 | return OPERAND_MATCH; |
800eeca4 JW |
5911 | break; |
5912 | ||
59cf82fe L |
5913 | case IA64_OPND_IMMU5b: |
5914 | if (e->X_op == O_constant) | |
5915 | { | |
5916 | val = e->X_add_number; | |
5917 | if (val >= 32 && val <= 63) | |
5918 | return OPERAND_MATCH; | |
5919 | else | |
5920 | return OPERAND_OUT_OF_RANGE; | |
5921 | } | |
5922 | break; | |
5923 | ||
800eeca4 JW |
5924 | case IA64_OPND_CCNT5: |
5925 | case IA64_OPND_CNT5: | |
5926 | case IA64_OPND_CNT6: | |
5927 | case IA64_OPND_CPOS6a: | |
5928 | case IA64_OPND_CPOS6b: | |
5929 | case IA64_OPND_CPOS6c: | |
5930 | case IA64_OPND_IMMU2: | |
5931 | case IA64_OPND_IMMU7a: | |
5932 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5933 | case IA64_OPND_IMMU21: |
5934 | case IA64_OPND_IMMU24: | |
5935 | case IA64_OPND_MBTYPE4: | |
5936 | case IA64_OPND_MHTYPE8: | |
5937 | case IA64_OPND_POS6: | |
5938 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5939 | if (e->X_op == O_constant) |
5940 | { | |
5941 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5942 | return OPERAND_MATCH; | |
5943 | else | |
5944 | return OPERAND_OUT_OF_RANGE; | |
5945 | } | |
800eeca4 JW |
5946 | break; |
5947 | ||
bf3ca999 TW |
5948 | case IA64_OPND_IMMU9: |
5949 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5950 | if (e->X_op == O_constant) |
542d6675 | 5951 | { |
87f8eb97 JW |
5952 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5953 | { | |
5954 | int lobits = e->X_add_number & 0x3; | |
5955 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5956 | e->X_add_number |= (bfd_vma) 0x3; | |
5957 | return OPERAND_MATCH; | |
5958 | } | |
5959 | else | |
5960 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5961 | } |
bf3ca999 TW |
5962 | break; |
5963 | ||
800eeca4 JW |
5964 | case IA64_OPND_IMM44: |
5965 | /* least 16 bits must be zero */ | |
5966 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5967 | /* XXX technically, this is wrong: we should not be issuing warning |
5968 | messages until we're sure this instruction pattern is going to | |
5969 | be used! */ | |
542d6675 | 5970 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5971 | |
87f8eb97 | 5972 | if (e->X_op == O_constant) |
542d6675 | 5973 | { |
87f8eb97 JW |
5974 | if (((e->X_add_number >= 0 |
5975 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5976 | || (e->X_add_number < 0 | |
5977 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5978 | { |
87f8eb97 JW |
5979 | /* sign-extend */ |
5980 | if (e->X_add_number >= 0 | |
5981 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5982 | { | |
5983 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5984 | } | |
5985 | return OPERAND_MATCH; | |
542d6675 | 5986 | } |
87f8eb97 JW |
5987 | else |
5988 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5989 | } |
800eeca4 JW |
5990 | break; |
5991 | ||
5992 | case IA64_OPND_IMM17: | |
5993 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5994 | if (e->X_op == O_constant) |
542d6675 | 5995 | { |
87f8eb97 JW |
5996 | if (((e->X_add_number >= 0 |
5997 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5998 | || (e->X_add_number < 0 | |
5999 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 6000 | { |
87f8eb97 JW |
6001 | /* sign-extend */ |
6002 | if (e->X_add_number >= 0 | |
6003 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
6004 | { | |
6005 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
6006 | } | |
6007 | return OPERAND_MATCH; | |
542d6675 | 6008 | } |
87f8eb97 JW |
6009 | else |
6010 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 6011 | } |
800eeca4 JW |
6012 | break; |
6013 | ||
6014 | case IA64_OPND_IMM14: | |
6015 | case IA64_OPND_IMM22: | |
6016 | relocatable = 1; | |
6017 | case IA64_OPND_IMM1: | |
6018 | case IA64_OPND_IMM8: | |
6019 | case IA64_OPND_IMM8U4: | |
6020 | case IA64_OPND_IMM8M1: | |
6021 | case IA64_OPND_IMM8M1U4: | |
6022 | case IA64_OPND_IMM8M1U8: | |
6023 | case IA64_OPND_IMM9a: | |
6024 | case IA64_OPND_IMM9b: | |
6025 | bits = operand_width (idesc->operands[index]); | |
6026 | if (relocatable && (e->X_op == O_symbol | |
6027 | || e->X_op == O_subtract | |
6028 | || e->X_op == O_pseudo_fixup)) | |
6029 | { | |
6030 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6031 | ||
6032 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
6033 | fix->code = BFD_RELOC_IA64_IMM14; | |
6034 | else | |
6035 | fix->code = BFD_RELOC_IA64_IMM22; | |
6036 | ||
6037 | if (e->X_op != O_subtract) | |
6038 | { | |
6039 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
6040 | if (e->X_op == O_pseudo_fixup) | |
6041 | e->X_op = O_symbol; | |
6042 | } | |
6043 | ||
6044 | fix->opnd = idesc->operands[index]; | |
6045 | fix->expr = *e; | |
6046 | fix->is_pcrel = 0; | |
6047 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6048 | return OPERAND_MATCH; |
800eeca4 JW |
6049 | } |
6050 | else if (e->X_op != O_constant | |
6051 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 6052 | return OPERAND_MISMATCH; |
800eeca4 JW |
6053 | |
6054 | if (opnd == IA64_OPND_IMM8M1U4) | |
6055 | { | |
6056 | /* Zero is not valid for unsigned compares that take an adjusted | |
6057 | constant immediate range. */ | |
6058 | if (e->X_add_number == 0) | |
87f8eb97 | 6059 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
6060 | |
6061 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
6062 | checks will work. */ | |
6063 | val = e->X_add_number; | |
197865e8 KH |
6064 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
6065 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
6066 | val = ((val << 32) >> 32); |
6067 | ||
6068 | /* Check for 0x100000000. This is valid because | |
6069 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
6070 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 6071 | return OPERAND_MATCH; |
800eeca4 JW |
6072 | |
6073 | val = val - 1; | |
6074 | } | |
6075 | else if (opnd == IA64_OPND_IMM8M1U8) | |
6076 | { | |
6077 | /* Zero is not valid for unsigned compares that take an adjusted | |
6078 | constant immediate range. */ | |
6079 | if (e->X_add_number == 0) | |
87f8eb97 | 6080 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
6081 | |
6082 | /* Check for 0x10000000000000000. */ | |
6083 | if (e->X_op == O_big) | |
6084 | { | |
6085 | if (generic_bignum[0] == 0 | |
6086 | && generic_bignum[1] == 0 | |
6087 | && generic_bignum[2] == 0 | |
6088 | && generic_bignum[3] == 0 | |
6089 | && generic_bignum[4] == 1) | |
87f8eb97 | 6090 | return OPERAND_MATCH; |
800eeca4 | 6091 | else |
87f8eb97 | 6092 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
6093 | } |
6094 | else | |
6095 | val = e->X_add_number - 1; | |
6096 | } | |
6097 | else if (opnd == IA64_OPND_IMM8M1) | |
6098 | val = e->X_add_number - 1; | |
6099 | else if (opnd == IA64_OPND_IMM8U4) | |
6100 | { | |
6101 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
6102 | checks will work. */ | |
6103 | val = e->X_add_number; | |
197865e8 KH |
6104 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
6105 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
6106 | val = ((val << 32) >> 32); |
6107 | } | |
6108 | else | |
6109 | val = e->X_add_number; | |
6110 | ||
2434f565 JW |
6111 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
6112 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
6113 | return OPERAND_MATCH; |
6114 | else | |
6115 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
6116 | |
6117 | case IA64_OPND_INC3: | |
6118 | /* +/- 1, 4, 8, 16 */ | |
6119 | val = e->X_add_number; | |
6120 | if (val < 0) | |
6121 | val = -val; | |
87f8eb97 JW |
6122 | if (e->X_op == O_constant) |
6123 | { | |
6124 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
6125 | return OPERAND_MATCH; | |
6126 | else | |
6127 | return OPERAND_OUT_OF_RANGE; | |
6128 | } | |
800eeca4 JW |
6129 | break; |
6130 | ||
6131 | case IA64_OPND_TGT25: | |
6132 | case IA64_OPND_TGT25b: | |
6133 | case IA64_OPND_TGT25c: | |
6134 | case IA64_OPND_TGT64: | |
6135 | if (e->X_op == O_symbol) | |
6136 | { | |
6137 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6138 | if (opnd == IA64_OPND_TGT25) | |
6139 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
6140 | else if (opnd == IA64_OPND_TGT25b) | |
6141 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
6142 | else if (opnd == IA64_OPND_TGT25c) | |
6143 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 6144 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
6145 | fix->code = BFD_RELOC_IA64_PCREL60B; |
6146 | else | |
6147 | abort (); | |
6148 | ||
800eeca4 JW |
6149 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
6150 | fix->opnd = idesc->operands[index]; | |
6151 | fix->expr = *e; | |
6152 | fix->is_pcrel = 1; | |
6153 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6154 | return OPERAND_MATCH; |
800eeca4 JW |
6155 | } |
6156 | case IA64_OPND_TAG13: | |
6157 | case IA64_OPND_TAG13b: | |
6158 | switch (e->X_op) | |
6159 | { | |
6160 | case O_constant: | |
87f8eb97 | 6161 | return OPERAND_MATCH; |
800eeca4 JW |
6162 | |
6163 | case O_symbol: | |
6164 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 6165 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 6166 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
6167 | fix->code = BFD_RELOC_UNUSED; |
6168 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
6169 | fix->opnd = idesc->operands[index]; |
6170 | fix->expr = *e; | |
6171 | fix->is_pcrel = 1; | |
6172 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6173 | return OPERAND_MATCH; |
800eeca4 JW |
6174 | |
6175 | default: | |
6176 | break; | |
6177 | } | |
6178 | break; | |
6179 | ||
a823923b RH |
6180 | case IA64_OPND_LDXMOV: |
6181 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6182 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
6183 | fix->opnd = idesc->operands[index]; | |
6184 | fix->expr = *e; | |
6185 | fix->is_pcrel = 0; | |
6186 | ++CURR_SLOT.num_fixups; | |
6187 | return OPERAND_MATCH; | |
6188 | ||
800eeca4 JW |
6189 | default: |
6190 | break; | |
6191 | } | |
87f8eb97 | 6192 | return OPERAND_MISMATCH; |
800eeca4 JW |
6193 | } |
6194 | ||
6195 | static int | |
e4e8248d | 6196 | parse_operand (e, more) |
800eeca4 | 6197 | expressionS *e; |
e4e8248d | 6198 | int more; |
800eeca4 JW |
6199 | { |
6200 | int sep = '\0'; | |
6201 | ||
6202 | memset (e, 0, sizeof (*e)); | |
6203 | e->X_op = O_absent; | |
6204 | SKIP_WHITESPACE (); | |
60d11e55 | 6205 | expression_and_evaluate (e); |
e4e8248d JB |
6206 | sep = *input_line_pointer; |
6207 | if (more && (sep == ',' || sep == more)) | |
6208 | ++input_line_pointer; | |
800eeca4 JW |
6209 | return sep; |
6210 | } | |
6211 | ||
6212 | /* Returns the next entry in the opcode table that matches the one in | |
6213 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6214 | found, NULL is returned instead. */ |
800eeca4 JW |
6215 | |
6216 | static struct ia64_opcode * | |
6217 | get_next_opcode (struct ia64_opcode *idesc) | |
6218 | { | |
6219 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6220 | ia64_free_opcode (idesc); | |
6221 | return next; | |
6222 | } | |
6223 | ||
6224 | /* Parse the operands for the opcode and find the opcode variant that | |
6225 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6226 | |
6227 | static struct ia64_opcode * | |
800eeca4 JW |
6228 | parse_operands (idesc) |
6229 | struct ia64_opcode *idesc; | |
6230 | { | |
6231 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6232 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6233 | int reg1, reg2; |
6234 | char reg_class; | |
800eeca4 | 6235 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6236 | enum operand_match_result result; |
800eeca4 JW |
6237 | char mnemonic[129]; |
6238 | char *first_arg = 0, *end, *saved_input_pointer; | |
6239 | unsigned int sof; | |
6240 | ||
6241 | assert (strlen (idesc->name) <= 128); | |
6242 | ||
6243 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6244 | if (idesc->operands[2] == IA64_OPND_SOF |
6245 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6246 | { |
6247 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6248 | can't parse the first operand until we have parsed the | |
6249 | remaining operands of the "alloc" instruction. */ | |
6250 | SKIP_WHITESPACE (); | |
6251 | first_arg = input_line_pointer; | |
6252 | end = strchr (input_line_pointer, '='); | |
6253 | if (!end) | |
6254 | { | |
ad4b42b4 | 6255 | as_bad (_("Expected separator `='")); |
800eeca4 JW |
6256 | return 0; |
6257 | } | |
6258 | input_line_pointer = end + 1; | |
6259 | ++i; | |
6260 | ++num_outputs; | |
6261 | } | |
6262 | ||
d3156ecc | 6263 | for (; ; ++i) |
800eeca4 | 6264 | { |
d3156ecc JB |
6265 | if (i < NELEMS (CURR_SLOT.opnd)) |
6266 | { | |
e4e8248d | 6267 | sep = parse_operand (CURR_SLOT.opnd + i, '='); |
d3156ecc JB |
6268 | if (CURR_SLOT.opnd[i].X_op == O_absent) |
6269 | break; | |
6270 | } | |
6271 | else | |
6272 | { | |
6273 | expressionS dummy; | |
6274 | ||
e4e8248d | 6275 | sep = parse_operand (&dummy, '='); |
d3156ecc JB |
6276 | if (dummy.X_op == O_absent) |
6277 | break; | |
6278 | } | |
800eeca4 JW |
6279 | |
6280 | ++num_operands; | |
6281 | ||
6282 | if (sep != '=' && sep != ',') | |
6283 | break; | |
6284 | ||
6285 | if (sep == '=') | |
6286 | { | |
6287 | if (num_outputs > 0) | |
ad4b42b4 | 6288 | as_bad (_("Duplicate equal sign (=) in instruction")); |
800eeca4 JW |
6289 | else |
6290 | num_outputs = i + 1; | |
6291 | } | |
6292 | } | |
6293 | if (sep != '\0') | |
6294 | { | |
ad4b42b4 | 6295 | as_bad (_("Illegal operand separator `%c'"), sep); |
800eeca4 JW |
6296 | return 0; |
6297 | } | |
197865e8 | 6298 | |
60b9a617 JB |
6299 | if (idesc->operands[2] == IA64_OPND_SOF |
6300 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 | 6301 | { |
ef0241e7 JB |
6302 | /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r. |
6303 | Note, however, that due to that mapping operand numbers in error | |
6304 | messages for any of the constant operands will not be correct. */ | |
800eeca4 | 6305 | know (strcmp (idesc->name, "alloc") == 0); |
ef0241e7 JB |
6306 | /* The first operand hasn't been parsed/initialized, yet (but |
6307 | num_operands intentionally doesn't account for that). */ | |
6308 | i = num_operands > 4 ? 2 : 1; | |
6309 | #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \ | |
6310 | ? CURR_SLOT.opnd[n].X_add_number \ | |
6311 | : 0) | |
6312 | sof = set_regstack (FORCE_CONST(i), | |
6313 | FORCE_CONST(i + 1), | |
6314 | FORCE_CONST(i + 2), | |
6315 | FORCE_CONST(i + 3)); | |
6316 | #undef FORCE_CONST | |
6317 | ||
6318 | /* now we can parse the first arg: */ | |
6319 | saved_input_pointer = input_line_pointer; | |
6320 | input_line_pointer = first_arg; | |
6321 | sep = parse_operand (CURR_SLOT.opnd + 0, '='); | |
6322 | if (sep != '=') | |
6323 | --num_outputs; /* force error */ | |
6324 | input_line_pointer = saved_input_pointer; | |
6325 | ||
6326 | CURR_SLOT.opnd[i].X_add_number = sof; | |
6327 | if (CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6328 | && CURR_SLOT.opnd[i + 2].X_op == O_constant) | |
6329 | CURR_SLOT.opnd[i + 1].X_add_number | |
6330 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6331 | else | |
6332 | CURR_SLOT.opnd[i + 1].X_op = O_illegal; | |
6333 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6334 | } |
6335 | ||
d3156ecc | 6336 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6337 | curr_out_of_range_pos = -1; |
6338 | error_pos = 0; | |
800eeca4 JW |
6339 | for (; idesc; idesc = get_next_opcode (idesc)) |
6340 | { | |
6341 | if (num_outputs != idesc->num_outputs) | |
6342 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6343 | if (highest_unmatched_operand < 0) |
6344 | highest_unmatched_operand |= 1; | |
6345 | if (num_operands > NELEMS (idesc->operands) | |
6346 | || (num_operands < NELEMS (idesc->operands) | |
6347 | && idesc->operands[num_operands]) | |
6348 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6349 | continue; /* mismatch in number of arguments */ | |
6350 | if (highest_unmatched_operand < 0) | |
6351 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6352 | |
6353 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6354 | |
6355 | /* Try to match all operands. If we see an out-of-range operand, | |
6356 | then continue trying to match the rest of the operands, since if | |
6357 | the rest match, then this idesc will give the best error message. */ | |
6358 | ||
6359 | out_of_range_pos = -1; | |
800eeca4 | 6360 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6361 | { |
6362 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6363 | if (result != OPERAND_MATCH) | |
6364 | { | |
6365 | if (result != OPERAND_OUT_OF_RANGE) | |
6366 | break; | |
6367 | if (out_of_range_pos < 0) | |
6368 | /* remember position of the first out-of-range operand: */ | |
6369 | out_of_range_pos = i; | |
6370 | } | |
6371 | } | |
800eeca4 | 6372 | |
87f8eb97 JW |
6373 | /* If we did not match all operands, or if at least one operand was |
6374 | out-of-range, then this idesc does not match. Keep track of which | |
6375 | idesc matched the most operands before failing. If we have two | |
6376 | idescs that failed at the same position, and one had an out-of-range | |
6377 | operand, then prefer the out-of-range operand. Thus if we have | |
6378 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6379 | of range instead of an error saying that the constant should have been | |
6380 | a register. */ | |
6381 | ||
6382 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6383 | { |
87f8eb97 JW |
6384 | if (i > highest_unmatched_operand |
6385 | || (i == highest_unmatched_operand | |
6386 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6387 | { |
6388 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6389 | if (out_of_range_pos >= 0) |
6390 | { | |
6391 | expected_operand = idesc->operands[out_of_range_pos]; | |
6392 | error_pos = out_of_range_pos; | |
6393 | } | |
6394 | else | |
6395 | { | |
6396 | expected_operand = idesc->operands[i]; | |
6397 | error_pos = i; | |
6398 | } | |
6399 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6400 | } |
6401 | continue; | |
6402 | } | |
6403 | ||
800eeca4 JW |
6404 | break; |
6405 | } | |
6406 | if (!idesc) | |
6407 | { | |
6408 | if (expected_operand) | |
ad4b42b4 | 6409 | as_bad (_("Operand %u of `%s' should be %s"), |
87f8eb97 | 6410 | error_pos + 1, mnemonic, |
800eeca4 | 6411 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc | 6412 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
ad4b42b4 | 6413 | as_bad (_("Wrong number of output operands")); |
d3156ecc | 6414 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) |
ad4b42b4 | 6415 | as_bad (_("Wrong number of input operands")); |
800eeca4 | 6416 | else |
ad4b42b4 | 6417 | as_bad (_("Operand mismatch")); |
800eeca4 JW |
6418 | return 0; |
6419 | } | |
4b09e828 JB |
6420 | |
6421 | /* Check that the instruction doesn't use | |
6422 | - r0, f0, or f1 as output operands | |
6423 | - the same predicate twice as output operands | |
6424 | - r0 as address of a base update load or store | |
6425 | - the same GR as output and address of a base update load | |
6426 | - two even- or two odd-numbered FRs as output operands of a floating | |
6427 | point parallel load. | |
6428 | At most two (conflicting) output (or output-like) operands can exist, | |
6429 | (floating point parallel loads have three outputs, but the base register, | |
6430 | if updated, cannot conflict with the actual outputs). */ | |
6431 | reg2 = reg1 = -1; | |
6432 | for (i = 0; i < num_operands; ++i) | |
6433 | { | |
6434 | int regno = 0; | |
6435 | ||
6436 | reg_class = 0; | |
6437 | switch (idesc->operands[i]) | |
6438 | { | |
6439 | case IA64_OPND_R1: | |
6440 | case IA64_OPND_R2: | |
6441 | case IA64_OPND_R3: | |
6442 | if (i < num_outputs) | |
6443 | { | |
6444 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6445 | reg_class = 'r'; | |
6446 | else if (reg1 < 0) | |
6447 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6448 | else if (reg2 < 0) | |
6449 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6450 | } | |
6451 | break; | |
6452 | case IA64_OPND_P1: | |
6453 | case IA64_OPND_P2: | |
6454 | if (i < num_outputs) | |
6455 | { | |
6456 | if (reg1 < 0) | |
6457 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6458 | else if (reg2 < 0) | |
6459 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6460 | } | |
6461 | break; | |
6462 | case IA64_OPND_F1: | |
6463 | case IA64_OPND_F2: | |
6464 | case IA64_OPND_F3: | |
6465 | case IA64_OPND_F4: | |
6466 | if (i < num_outputs) | |
6467 | { | |
6468 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6469 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6470 | { | |
6471 | reg_class = 'f'; | |
6472 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6473 | } | |
6474 | else if (reg1 < 0) | |
6475 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6476 | else if (reg2 < 0) | |
6477 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6478 | } | |
6479 | break; | |
6480 | case IA64_OPND_MR3: | |
6481 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6482 | { | |
6483 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6484 | reg_class = 'm'; | |
6485 | else if (reg1 < 0) | |
6486 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6487 | else if (reg2 < 0) | |
6488 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6489 | } | |
6490 | break; | |
6491 | default: | |
6492 | break; | |
6493 | } | |
6494 | switch (reg_class) | |
6495 | { | |
6496 | case 0: | |
6497 | break; | |
6498 | default: | |
ad4b42b4 | 6499 | as_warn (_("Invalid use of `%c%d' as output operand"), reg_class, regno); |
4b09e828 JB |
6500 | break; |
6501 | case 'm': | |
ad4b42b4 | 6502 | as_warn (_("Invalid use of `r%d' as base update address operand"), regno); |
4b09e828 JB |
6503 | break; |
6504 | } | |
6505 | } | |
6506 | if (reg1 == reg2) | |
6507 | { | |
6508 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6509 | { | |
6510 | reg1 -= REG_GR; | |
6511 | reg_class = 'r'; | |
6512 | } | |
6513 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6514 | { | |
6515 | reg1 -= REG_P; | |
6516 | reg_class = 'p'; | |
6517 | } | |
6518 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6519 | { | |
6520 | reg1 -= REG_FR; | |
6521 | reg_class = 'f'; | |
6522 | } | |
6523 | else | |
6524 | reg_class = 0; | |
6525 | if (reg_class) | |
ad4b42b4 | 6526 | as_warn (_("Invalid duplicate use of `%c%d'"), reg_class, reg1); |
4b09e828 JB |
6527 | } |
6528 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6529 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6530 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6531 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6532 | && ! ((reg1 ^ reg2) & 1)) | |
ad4b42b4 | 6533 | as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"), |
4b09e828 JB |
6534 | reg1 - REG_FR, reg2 - REG_FR); |
6535 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6536 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6537 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6538 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
ad4b42b4 | 6539 | as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"), |
4b09e828 | 6540 | reg1 - REG_FR, reg2 - REG_FR); |
800eeca4 JW |
6541 | return idesc; |
6542 | } | |
6543 | ||
6544 | static void | |
6545 | build_insn (slot, insnp) | |
6546 | struct slot *slot; | |
6547 | bfd_vma *insnp; | |
6548 | { | |
6549 | const struct ia64_operand *odesc, *o2desc; | |
6550 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6551 | bfd_vma insn; |
6552 | bfd_signed_vma val; | |
800eeca4 JW |
6553 | const char *err; |
6554 | int i; | |
6555 | ||
6556 | insn = idesc->opcode | slot->qp_regno; | |
6557 | ||
6558 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6559 | { | |
c67e42c9 RH |
6560 | if (slot->opnd[i].X_op == O_register |
6561 | || slot->opnd[i].X_op == O_constant | |
6562 | || slot->opnd[i].X_op == O_index) | |
6563 | val = slot->opnd[i].X_add_number; | |
6564 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6565 | { |
c67e42c9 RH |
6566 | /* This must be the value 0x10000000000000000. */ |
6567 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6568 | val = 0; | |
6569 | } | |
6570 | else | |
6571 | val = 0; | |
6572 | ||
6573 | switch (idesc->operands[i]) | |
6574 | { | |
6575 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6576 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6577 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6578 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6579 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6580 | continue; |
6581 | ||
6582 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6583 | val &= 0x3fffffffffffffffULL; |
6584 | if (val != slot->opnd[i].X_add_number) | |
6585 | as_warn (_("Value truncated to 62 bits")); | |
6586 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6587 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6588 | continue; |
800eeca4 | 6589 | |
c67e42c9 RH |
6590 | case IA64_OPND_TGT64: |
6591 | val >>= 4; | |
6592 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6593 | insn |= ((((val >> 59) & 0x1) << 36) | |
6594 | | (((val >> 0) & 0xfffff) << 13)); | |
6595 | continue; | |
800eeca4 | 6596 | |
c67e42c9 RH |
6597 | case IA64_OPND_AR3: |
6598 | val -= REG_AR; | |
6599 | break; | |
6600 | ||
6601 | case IA64_OPND_B1: | |
6602 | case IA64_OPND_B2: | |
6603 | val -= REG_BR; | |
6604 | break; | |
6605 | ||
6606 | case IA64_OPND_CR3: | |
6607 | val -= REG_CR; | |
6608 | break; | |
6609 | ||
6610 | case IA64_OPND_F1: | |
6611 | case IA64_OPND_F2: | |
6612 | case IA64_OPND_F3: | |
6613 | case IA64_OPND_F4: | |
6614 | val -= REG_FR; | |
6615 | break; | |
6616 | ||
6617 | case IA64_OPND_P1: | |
6618 | case IA64_OPND_P2: | |
6619 | val -= REG_P; | |
6620 | break; | |
6621 | ||
6622 | case IA64_OPND_R1: | |
6623 | case IA64_OPND_R2: | |
6624 | case IA64_OPND_R3: | |
6625 | case IA64_OPND_R3_2: | |
6626 | case IA64_OPND_CPUID_R3: | |
6627 | case IA64_OPND_DBR_R3: | |
6628 | case IA64_OPND_DTR_R3: | |
6629 | case IA64_OPND_ITR_R3: | |
6630 | case IA64_OPND_IBR_R3: | |
6631 | case IA64_OPND_MR3: | |
6632 | case IA64_OPND_MSR_R3: | |
6633 | case IA64_OPND_PKR_R3: | |
6634 | case IA64_OPND_PMC_R3: | |
6635 | case IA64_OPND_PMD_R3: | |
197865e8 | 6636 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6637 | val -= REG_GR; |
6638 | break; | |
6639 | ||
6640 | default: | |
6641 | break; | |
6642 | } | |
6643 | ||
6644 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6645 | err = (*odesc->insert) (odesc, val, &insn); | |
6646 | if (err) | |
6647 | as_bad_where (slot->src_file, slot->src_line, | |
ad4b42b4 | 6648 | _("Bad operand value: %s"), err); |
c67e42c9 RH |
6649 | if (idesc->flags & IA64_OPCODE_PSEUDO) |
6650 | { | |
6651 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6652 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6653 | { | |
6654 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6655 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6656 | } |
c67e42c9 RH |
6657 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6658 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6659 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6660 | { |
c67e42c9 RH |
6661 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6662 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6663 | } |
6664 | } | |
6665 | } | |
6666 | *insnp = insn; | |
6667 | } | |
6668 | ||
6669 | static void | |
6670 | emit_one_bundle () | |
6671 | { | |
f4660e2c | 6672 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6673 | enum ia64_unit required_unit, insn_unit = 0; |
6674 | enum ia64_insn_type type[3], insn_type; | |
6675 | unsigned int template, orig_template; | |
542d6675 | 6676 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6677 | struct ia64_opcode *idesc; |
6678 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6679 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6680 | bfd_vma t0 = 0, t1 = 0; |
6681 | struct label_fix *lfix; | |
07a53e5c | 6682 | bfd_boolean mark_label; |
800eeca4 JW |
6683 | struct insn_fix *ifix; |
6684 | char mnemonic[16]; | |
6685 | fixS *fix; | |
6686 | char *f; | |
5a9ff93d | 6687 | int addr_mod; |
800eeca4 JW |
6688 | |
6689 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
c13781b8 | 6690 | know (first >= 0 && first < NUM_SLOTS); |
800eeca4 JW |
6691 | n = MIN (3, md.num_slots_in_use); |
6692 | ||
6693 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6694 | otherwise: */ |
800eeca4 JW |
6695 | |
6696 | if (md.slot[first].user_template >= 0) | |
6697 | user_template = template = md.slot[first].user_template; | |
6698 | else | |
6699 | { | |
032efc85 | 6700 | /* Auto select appropriate template. */ |
800eeca4 JW |
6701 | memset (type, 0, sizeof (type)); |
6702 | curr = first; | |
6703 | for (i = 0; i < n; ++i) | |
6704 | { | |
032efc85 RH |
6705 | if (md.slot[curr].label_fixups && i != 0) |
6706 | break; | |
800eeca4 JW |
6707 | type[i] = md.slot[curr].idesc->type; |
6708 | curr = (curr + 1) % NUM_SLOTS; | |
6709 | } | |
6710 | template = best_template[type[0]][type[1]][type[2]]; | |
6711 | } | |
6712 | ||
542d6675 | 6713 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6714 | for (i = 0; i < 3; ++i) |
6715 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6716 | ||
6717 | f = frag_more (16); | |
6718 | ||
5a9ff93d JW |
6719 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6720 | from the start of the frag. */ | |
6721 | addr_mod = frag_now_fix () & 15; | |
6722 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6723 | as_bad (_("instruction address is not a multiple of 16")); | |
6724 | frag_now->insn_addr = addr_mod; | |
6725 | frag_now->has_code = 1; | |
6726 | ||
542d6675 | 6727 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6728 | curr = first; |
6729 | idesc = md.slot[curr].idesc; | |
6730 | end_of_insn_group = 0; | |
9b505842 | 6731 | last_slot = -1; |
800eeca4 JW |
6732 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6733 | { | |
d6e78c11 | 6734 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6735 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6736 | unw_rec_list *end_ptr = NULL; | |
6737 | ||
d6e78c11 JW |
6738 | if (ptr) |
6739 | { | |
6740 | /* Find the last prologue/body record in the list for the current | |
6741 | insn, and set the slot number for all records up to that point. | |
6742 | This needs to be done now, because prologue/body records refer to | |
6743 | the current point, not the point after the instruction has been | |
6744 | issued. This matters because there may have been nops emitted | |
6745 | meanwhile. Any non-prologue non-body record followed by a | |
6746 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6747 | unw_rec_list *last_ptr; |
6748 | ||
6749 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6750 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6751 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6752 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6753 | || ptr->r.type == body) | |
6754 | last_ptr = ptr; | |
6755 | if (last_ptr) | |
6756 | { | |
6757 | /* Make last_ptr point one after the last prologue/body | |
6758 | record. */ | |
6759 | last_ptr = last_ptr->next; | |
6760 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6761 | ptr = ptr->next) | |
6762 | { | |
6763 | ptr->slot_number = (unsigned long) f + i; | |
6764 | ptr->slot_frag = frag_now; | |
6765 | } | |
6766 | /* Remove the initialized records, so that we won't accidentally | |
6767 | update them again if we insert a nop and continue. */ | |
6768 | md.slot[curr].unwind_record = last_ptr; | |
6769 | } | |
6770 | } | |
e0c9811a | 6771 | |
f4660e2c JB |
6772 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6773 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6774 | { |
f4660e2c JB |
6775 | if (curr == first) |
6776 | manual_bundling = 1; | |
800eeca4 | 6777 | else |
f4660e2c JB |
6778 | break; /* Need to start a new bundle. */ |
6779 | } | |
6780 | ||
744b6414 JW |
6781 | /* If this instruction specifies a template, then it must be the first |
6782 | instruction of a bundle. */ | |
6783 | if (curr != first && md.slot[curr].user_template >= 0) | |
6784 | break; | |
6785 | ||
f4660e2c JB |
6786 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6787 | { | |
6788 | if (manual_bundling && !manual_bundling_off) | |
6789 | { | |
6790 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6791 | _("`%s' must be last in bundle"), idesc->name); |
f4660e2c JB |
6792 | if (i < 2) |
6793 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6794 | } | |
6795 | i = 2; | |
800eeca4 JW |
6796 | } |
6797 | if (idesc->flags & IA64_OPCODE_LAST) | |
6798 | { | |
2434f565 JW |
6799 | int required_slot; |
6800 | unsigned int required_template; | |
800eeca4 JW |
6801 | |
6802 | /* If we need a stop bit after an M slot, our only choice is | |
6803 | template 5 (M;;MI). If we need a stop bit after a B | |
6804 | slot, our only choice is to place it at the end of the | |
6805 | bundle, because the only available templates are MIB, | |
6806 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6807 | than M and B slots because these are the only kind of | |
6808 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6809 | required_template = template; | |
6810 | switch (idesc->type) | |
6811 | { | |
6812 | case IA64_TYPE_M: | |
6813 | required_slot = 0; | |
6814 | required_template = 5; | |
6815 | break; | |
6816 | ||
6817 | case IA64_TYPE_B: | |
6818 | required_slot = 2; | |
6819 | break; | |
6820 | ||
6821 | default: | |
6822 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 NC |
6823 | _("Internal error: don't know how to force %s to end of instruction group"), |
6824 | idesc->name); | |
800eeca4 JW |
6825 | required_slot = i; |
6826 | break; | |
6827 | } | |
f4660e2c JB |
6828 | if (manual_bundling |
6829 | && (i > required_slot | |
6830 | || (required_slot == 2 && !manual_bundling_off) | |
6831 | || (user_template >= 0 | |
6832 | /* Changing from MMI to M;MI is OK. */ | |
6833 | && (template ^ required_template) > 1))) | |
6834 | { | |
6835 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6836 | _("`%s' must be last in instruction group"), |
f4660e2c JB |
6837 | idesc->name); |
6838 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6839 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6840 | } | |
800eeca4 JW |
6841 | if (required_slot < i) |
6842 | /* Can't fit this instruction. */ | |
6843 | break; | |
6844 | ||
6845 | i = required_slot; | |
6846 | if (required_template != template) | |
6847 | { | |
6848 | /* If we switch the template, we need to reset the NOPs | |
6849 | after slot i. The slot-types of the instructions ahead | |
6850 | of i never change, so we don't need to worry about | |
6851 | changing NOPs in front of this slot. */ | |
6852 | for (j = i; j < 3; ++j) | |
6853 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
53022e4a JW |
6854 | |
6855 | /* We just picked a template that includes the stop bit in the | |
6856 | middle, so we don't need another one emitted later. */ | |
6857 | md.slot[curr].end_of_insn_group = 0; | |
800eeca4 JW |
6858 | } |
6859 | template = required_template; | |
6860 | } | |
6861 | if (curr != first && md.slot[curr].label_fixups) | |
6862 | { | |
f4660e2c JB |
6863 | if (manual_bundling) |
6864 | { | |
6865 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6866 | _("Label must be first in a bundle")); |
f4660e2c JB |
6867 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6868 | } | |
800eeca4 JW |
6869 | /* This insn must go into the first slot of a bundle. */ |
6870 | break; | |
6871 | } | |
6872 | ||
800eeca4 JW |
6873 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6874 | { | |
6875 | /* We need an instruction group boundary in the middle of a | |
6876 | bundle. See if we can switch to an other template with | |
6877 | an appropriate boundary. */ | |
6878 | ||
6879 | orig_template = template; | |
6880 | if (i == 1 && (user_template == 4 | |
6881 | || (user_template < 0 | |
6882 | && (ia64_templ_desc[template].exec_unit[0] | |
6883 | == IA64_UNIT_M)))) | |
6884 | { | |
6885 | template = 5; | |
6886 | end_of_insn_group = 0; | |
6887 | } | |
6888 | else if (i == 2 && (user_template == 0 | |
6889 | || (user_template < 0 | |
6890 | && (ia64_templ_desc[template].exec_unit[1] | |
6891 | == IA64_UNIT_I))) | |
6892 | /* This test makes sure we don't switch the template if | |
6893 | the next instruction is one that needs to be first in | |
6894 | an instruction group. Since all those instructions are | |
6895 | in the M group, there is no way such an instruction can | |
6896 | fit in this bundle even if we switch the template. The | |
6897 | reason we have to check for this is that otherwise we | |
6898 | may end up generating "MI;;I M.." which has the deadly | |
6899 | effect that the second M instruction is no longer the | |
f4660e2c | 6900 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6901 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6902 | { | |
6903 | template = 1; | |
6904 | end_of_insn_group = 0; | |
6905 | } | |
f4660e2c JB |
6906 | else if (i == 1 |
6907 | && user_template == 0 | |
6908 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6909 | /* Use the next slot. */ | |
6910 | continue; | |
800eeca4 JW |
6911 | else if (curr != first) |
6912 | /* can't fit this insn */ | |
6913 | break; | |
6914 | ||
6915 | if (template != orig_template) | |
6916 | /* if we switch the template, we need to reset the NOPs | |
6917 | after slot i. The slot-types of the instructions ahead | |
6918 | of i never change, so we don't need to worry about | |
6919 | changing NOPs in front of this slot. */ | |
6920 | for (j = i; j < 3; ++j) | |
6921 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6922 | } | |
6923 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6924 | ||
c10d9d8f | 6925 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6926 | if (idesc->type == IA64_TYPE_DYN) |
6927 | { | |
97762d08 JB |
6928 | enum ia64_opnd opnd1, opnd2; |
6929 | ||
800eeca4 JW |
6930 | if ((strcmp (idesc->name, "nop") == 0) |
6931 | || (strcmp (idesc->name, "break") == 0)) | |
6932 | insn_unit = required_unit; | |
91d777ee L |
6933 | else if (strcmp (idesc->name, "hint") == 0) |
6934 | { | |
6935 | insn_unit = required_unit; | |
6936 | if (required_unit == IA64_UNIT_B) | |
6937 | { | |
6938 | switch (md.hint_b) | |
6939 | { | |
6940 | case hint_b_ok: | |
6941 | break; | |
6942 | case hint_b_warning: | |
ad4b42b4 | 6943 | as_warn (_("hint in B unit may be treated as nop")); |
91d777ee L |
6944 | break; |
6945 | case hint_b_error: | |
6946 | /* When manual bundling is off and there is no | |
6947 | user template, we choose a different unit so | |
6948 | that hint won't go into the current slot. We | |
6949 | will fill the current bundle with nops and | |
6950 | try to put hint into the next bundle. */ | |
6951 | if (!manual_bundling && user_template < 0) | |
6952 | insn_unit = IA64_UNIT_I; | |
6953 | else | |
ad4b42b4 | 6954 | as_bad (_("hint in B unit can't be used")); |
91d777ee L |
6955 | break; |
6956 | } | |
6957 | } | |
6958 | } | |
97762d08 JB |
6959 | else if (strcmp (idesc->name, "chk.s") == 0 |
6960 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6961 | { |
6962 | insn_unit = IA64_UNIT_M; | |
97762d08 JB |
6963 | if (required_unit == IA64_UNIT_I |
6964 | || (required_unit == IA64_UNIT_F && template == 6)) | |
800eeca4 JW |
6965 | insn_unit = IA64_UNIT_I; |
6966 | } | |
6967 | else | |
ad4b42b4 | 6968 | as_fatal (_("emit_one_bundle: unexpected dynamic op")); |
800eeca4 | 6969 | |
f9f21a03 L |
6970 | snprintf (mnemonic, sizeof (mnemonic), "%s.%c", |
6971 | idesc->name, "?imbfxx"[insn_unit]); | |
97762d08 JB |
6972 | opnd1 = idesc->operands[0]; |
6973 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6974 | ia64_free_opcode (idesc); |
97762d08 JB |
6975 | idesc = ia64_find_opcode (mnemonic); |
6976 | /* moves to/from ARs have collisions */ | |
6977 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6978 | { | |
6979 | while (idesc != NULL | |
6980 | && (idesc->operands[0] != opnd1 | |
6981 | || idesc->operands[1] != opnd2)) | |
6982 | idesc = get_next_opcode (idesc); | |
6983 | } | |
97762d08 | 6984 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6985 | } |
6986 | else | |
6987 | { | |
6988 | insn_type = idesc->type; | |
6989 | insn_unit = IA64_UNIT_NIL; | |
6990 | switch (insn_type) | |
6991 | { | |
6992 | case IA64_TYPE_A: | |
6993 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6994 | insn_unit = required_unit; | |
6995 | break; | |
542d6675 | 6996 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6997 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6998 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6999 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
7000 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
7001 | default: break; | |
7002 | } | |
7003 | } | |
7004 | ||
7005 | if (insn_unit != required_unit) | |
9b505842 | 7006 | continue; /* Try next slot. */ |
800eeca4 | 7007 | |
07a53e5c RH |
7008 | /* Now is a good time to fix up the labels for this insn. */ |
7009 | mark_label = FALSE; | |
7010 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) | |
7011 | { | |
7012 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
7013 | symbol_set_frag (lfix->sym, frag_now); | |
7014 | mark_label |= lfix->dw2_mark_labels; | |
7015 | } | |
7016 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
7017 | { | |
7018 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
7019 | symbol_set_frag (lfix->sym, frag_now); | |
7020 | } | |
7021 | ||
7022 | if (debug_type == DEBUG_DWARF2 | |
7023 | || md.slot[curr].loc_directive_seen | |
7024 | || mark_label) | |
196e8040 JW |
7025 | { |
7026 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 7027 | |
196e8040 | 7028 | md.slot[curr].loc_directive_seen = 0; |
07a53e5c RH |
7029 | if (mark_label) |
7030 | md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
7031 | ||
196e8040 JW |
7032 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); |
7033 | } | |
800eeca4 JW |
7034 | |
7035 | build_insn (md.slot + curr, insn + i); | |
7036 | ||
d6e78c11 JW |
7037 | ptr = md.slot[curr].unwind_record; |
7038 | if (ptr) | |
7039 | { | |
7040 | /* Set slot numbers for all remaining unwind records belonging to the | |
7041 | current insn. There can not be any prologue/body unwind records | |
7042 | here. */ | |
d6e78c11 JW |
7043 | for (; ptr != end_ptr; ptr = ptr->next) |
7044 | { | |
7045 | ptr->slot_number = (unsigned long) f + i; | |
7046 | ptr->slot_frag = frag_now; | |
7047 | } | |
7048 | md.slot[curr].unwind_record = NULL; | |
7049 | } | |
10850f29 | 7050 | |
800eeca4 JW |
7051 | if (required_unit == IA64_UNIT_L) |
7052 | { | |
7053 | know (i == 1); | |
7054 | /* skip one slot for long/X-unit instructions */ | |
7055 | ++i; | |
7056 | } | |
7057 | --md.num_slots_in_use; | |
9b505842 | 7058 | last_slot = i; |
800eeca4 | 7059 | |
800eeca4 JW |
7060 | for (j = 0; j < md.slot[curr].num_fixups; ++j) |
7061 | { | |
7062 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 7063 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
7064 | &ifix->expr, ifix->is_pcrel, ifix->code); |
7065 | fix->tc_fix_data.opnd = ifix->opnd; | |
800eeca4 JW |
7066 | fix->fx_file = md.slot[curr].src_file; |
7067 | fix->fx_line = md.slot[curr].src_line; | |
7068 | } | |
7069 | ||
7070 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
7071 | ||
542d6675 | 7072 | /* clear slot: */ |
800eeca4 JW |
7073 | ia64_free_opcode (md.slot[curr].idesc); |
7074 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
7075 | md.slot[curr].user_template = -1; | |
7076 | ||
7077 | if (manual_bundling_off) | |
7078 | { | |
7079 | manual_bundling = 0; | |
7080 | break; | |
7081 | } | |
7082 | curr = (curr + 1) % NUM_SLOTS; | |
7083 | idesc = md.slot[curr].idesc; | |
7084 | } | |
6abae71c JW |
7085 | |
7086 | /* A user template was specified, but the first following instruction did | |
7087 | not fit. This can happen with or without manual bundling. */ | |
7088 | if (md.num_slots_in_use > 0 && last_slot < 0) | |
7089 | { | |
7090 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 7091 | _("`%s' does not fit into %s template"), |
6abae71c JW |
7092 | idesc->name, ia64_templ_desc[template].name); |
7093 | /* Drop first insn so we don't livelock. */ | |
7094 | --md.num_slots_in_use; | |
7095 | know (curr == first); | |
7096 | ia64_free_opcode (md.slot[curr].idesc); | |
7097 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
7098 | md.slot[curr].user_template = -1; | |
7099 | } | |
7100 | else if (manual_bundling > 0) | |
800eeca4 JW |
7101 | { |
7102 | if (md.num_slots_in_use > 0) | |
ac025970 | 7103 | { |
9b505842 JB |
7104 | if (last_slot >= 2) |
7105 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 7106 | _("`%s' does not fit into bundle"), idesc->name); |
9b505842 JB |
7107 | else |
7108 | { | |
7109 | const char *where; | |
7110 | ||
7111 | if (template == 2) | |
7112 | where = "X slot"; | |
7113 | else if (last_slot == 0) | |
7114 | where = "slots 2 or 3"; | |
7115 | else | |
7116 | where = "slot 3"; | |
7117 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 7118 | _("`%s' can't go in %s of %s template"), |
9b505842 JB |
7119 | idesc->name, where, ia64_templ_desc[template].name); |
7120 | } | |
ac025970 | 7121 | } |
800eeca4 JW |
7122 | else |
7123 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 7124 | _("Missing '}' at end of file")); |
800eeca4 | 7125 | } |
6abae71c | 7126 | |
800eeca4 JW |
7127 | know (md.num_slots_in_use < NUM_SLOTS); |
7128 | ||
7129 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
7130 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
7131 | ||
44f5c83a JW |
7132 | number_to_chars_littleendian (f + 0, t0, 8); |
7133 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
7134 | } |
7135 | ||
7136 | int | |
7137 | md_parse_option (c, arg) | |
7138 | int c; | |
7139 | char *arg; | |
7140 | { | |
7463c317 | 7141 | |
800eeca4 JW |
7142 | switch (c) |
7143 | { | |
c43c2cc5 | 7144 | /* Switches from the Intel assembler. */ |
44f5c83a | 7145 | case 'm': |
800eeca4 JW |
7146 | if (strcmp (arg, "ilp64") == 0 |
7147 | || strcmp (arg, "lp64") == 0 | |
7148 | || strcmp (arg, "p64") == 0) | |
7149 | { | |
7150 | md.flags |= EF_IA_64_ABI64; | |
7151 | } | |
7152 | else if (strcmp (arg, "ilp32") == 0) | |
7153 | { | |
7154 | md.flags &= ~EF_IA_64_ABI64; | |
7155 | } | |
7156 | else if (strcmp (arg, "le") == 0) | |
7157 | { | |
7158 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 7159 | default_big_endian = 0; |
800eeca4 JW |
7160 | } |
7161 | else if (strcmp (arg, "be") == 0) | |
7162 | { | |
7163 | md.flags |= EF_IA_64_BE; | |
549f748d | 7164 | default_big_endian = 1; |
800eeca4 | 7165 | } |
970d6792 L |
7166 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
7167 | { | |
7168 | arg += 13; | |
7169 | if (strcmp (arg, "warning") == 0) | |
7170 | md.unwind_check = unwind_check_warning; | |
7171 | else if (strcmp (arg, "error") == 0) | |
7172 | md.unwind_check = unwind_check_error; | |
7173 | else | |
7174 | return 0; | |
7175 | } | |
91d777ee L |
7176 | else if (strncmp (arg, "hint.b=", 7) == 0) |
7177 | { | |
7178 | arg += 7; | |
7179 | if (strcmp (arg, "ok") == 0) | |
7180 | md.hint_b = hint_b_ok; | |
7181 | else if (strcmp (arg, "warning") == 0) | |
7182 | md.hint_b = hint_b_warning; | |
7183 | else if (strcmp (arg, "error") == 0) | |
7184 | md.hint_b = hint_b_error; | |
7185 | else | |
7186 | return 0; | |
7187 | } | |
8c2fda1d L |
7188 | else if (strncmp (arg, "tune=", 5) == 0) |
7189 | { | |
7190 | arg += 5; | |
7191 | if (strcmp (arg, "itanium1") == 0) | |
7192 | md.tune = itanium1; | |
7193 | else if (strcmp (arg, "itanium2") == 0) | |
7194 | md.tune = itanium2; | |
7195 | else | |
7196 | return 0; | |
7197 | } | |
800eeca4 JW |
7198 | else |
7199 | return 0; | |
7200 | break; | |
7201 | ||
7202 | case 'N': | |
7203 | if (strcmp (arg, "so") == 0) | |
7204 | { | |
542d6675 | 7205 | /* Suppress signon message. */ |
800eeca4 JW |
7206 | } |
7207 | else if (strcmp (arg, "pi") == 0) | |
7208 | { | |
7209 | /* Reject privileged instructions. FIXME */ | |
7210 | } | |
7211 | else if (strcmp (arg, "us") == 0) | |
7212 | { | |
7213 | /* Allow union of signed and unsigned range. FIXME */ | |
7214 | } | |
7215 | else if (strcmp (arg, "close_fcalls") == 0) | |
7216 | { | |
7217 | /* Do not resolve global function calls. */ | |
7218 | } | |
7219 | else | |
7220 | return 0; | |
7221 | break; | |
7222 | ||
7223 | case 'C': | |
7224 | /* temp[="prefix"] Insert temporary labels into the object file | |
7225 | symbol table prefixed by "prefix". | |
7226 | Default prefix is ":temp:". | |
7227 | */ | |
7228 | break; | |
7229 | ||
7230 | case 'a': | |
800eeca4 JW |
7231 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7232 | according to <tgt> -- | |
7233 | exit: branch out from the current context (default) | |
7234 | labels: all labels in context may be branch targets | |
7235 | */ | |
85b40035 L |
7236 | if (strncmp (arg, "indirect=", 9) != 0) |
7237 | return 0; | |
800eeca4 JW |
7238 | break; |
7239 | ||
7240 | case 'x': | |
7241 | /* -X conflicts with an ignored option, use -x instead */ | |
7242 | md.detect_dv = 1; | |
7243 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7244 | { |
7245 | /* set default mode to explicit */ | |
7246 | md.default_explicit_mode = 1; | |
7247 | break; | |
7248 | } | |
800eeca4 | 7249 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7250 | { |
7251 | md.default_explicit_mode = 0; | |
7252 | } | |
f1dab70d JB |
7253 | else if (strcmp (arg, "none") == 0) |
7254 | { | |
7255 | md.detect_dv = 0; | |
7256 | } | |
800eeca4 | 7257 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7258 | { |
7259 | md.debug_dv = 1; | |
7260 | } | |
800eeca4 | 7261 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7262 | { |
7263 | md.default_explicit_mode = 1; | |
7264 | md.debug_dv = 1; | |
7265 | } | |
f1dab70d JB |
7266 | else if (strcmp (arg, "debugn") == 0) |
7267 | { | |
7268 | md.debug_dv = 1; | |
7269 | md.detect_dv = 0; | |
7270 | } | |
800eeca4 | 7271 | else |
542d6675 KH |
7272 | { |
7273 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7274 | } | |
800eeca4 JW |
7275 | break; |
7276 | ||
7277 | case 'S': | |
7278 | /* nops Print nops statistics. */ | |
7279 | break; | |
7280 | ||
c43c2cc5 JW |
7281 | /* GNU specific switches for gcc. */ |
7282 | case OPTION_MCONSTANT_GP: | |
7283 | md.flags |= EF_IA_64_CONS_GP; | |
7284 | break; | |
7285 | ||
7286 | case OPTION_MAUTO_PIC: | |
7287 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7288 | break; | |
7289 | ||
800eeca4 JW |
7290 | default: |
7291 | return 0; | |
7292 | } | |
7293 | ||
7294 | return 1; | |
7295 | } | |
7296 | ||
7297 | void | |
7298 | md_show_usage (stream) | |
7299 | FILE *stream; | |
7300 | { | |
542d6675 | 7301 | fputs (_("\ |
800eeca4 | 7302 | IA-64 options:\n\ |
6290819d NC |
7303 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7304 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7305 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7306 | without function descriptors (sets ELF header flag\n\ | |
7307 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7308 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7309 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7310 | -mtune=[itanium1|itanium2]\n\ |
7311 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7312 | -munwind-check=[warning|error]\n\ |
7313 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7314 | -mhint.b=[ok|warning|error]\n\ |
7315 | hint.b check (default -mhint.b=error)\n\ | |
f1dab70d JB |
7316 | -x | -xexplicit turn on dependency violation checking\n\ |
7317 | -xauto automagically remove dependency violations (default)\n\ | |
7318 | -xnone turn off dependency violation checking\n\ | |
7319 | -xdebug debug dependency violation checker\n\ | |
7320 | -xdebugn debug dependency violation checker but turn off\n\ | |
7321 | dependency violation checking\n\ | |
7322 | -xdebugx debug dependency violation checker and turn on\n\ | |
7323 | dependency violation checking\n"), | |
800eeca4 JW |
7324 | stream); |
7325 | } | |
7326 | ||
acebd4ce AS |
7327 | void |
7328 | ia64_after_parse_args () | |
7329 | { | |
7330 | if (debug_type == DEBUG_STABS) | |
7331 | as_fatal (_("--gstabs is not supported for ia64")); | |
7332 | } | |
7333 | ||
44576e1f RH |
7334 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7335 | ||
7336 | static int | |
800eeca4 JW |
7337 | match (int templ, int type, int slot) |
7338 | { | |
7339 | enum ia64_unit unit; | |
7340 | int result; | |
7341 | ||
7342 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7343 | switch (type) | |
7344 | { | |
7345 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7346 | case IA64_TYPE_A: | |
7347 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7348 | break; | |
7349 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7350 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7351 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7352 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7353 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7354 | default: result = 0; break; | |
7355 | } | |
7356 | return result; | |
7357 | } | |
7358 | ||
7c06efaa JW |
7359 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7360 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7361 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7362 | |
7363 | static inline int | |
7364 | extra_goodness (int templ, int slot) | |
7365 | { | |
8c2fda1d L |
7366 | switch (md.tune) |
7367 | { | |
7368 | case itanium1: | |
7369 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7370 | return 2; | |
7371 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7372 | return 1; | |
7373 | else | |
7374 | return 0; | |
7375 | break; | |
7376 | case itanium2: | |
7377 | if (match (templ, IA64_TYPE_M, slot) | |
7378 | || match (templ, IA64_TYPE_I, slot)) | |
7379 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7380 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7381 | branch-prediction. */ | |
7382 | return 2; | |
7383 | else | |
7384 | return 0; | |
7385 | break; | |
7386 | default: | |
7387 | abort (); | |
7388 | return 0; | |
7389 | } | |
44576e1f RH |
7390 | } |
7391 | ||
800eeca4 JW |
7392 | /* This function is called once, at assembler startup time. It sets |
7393 | up all the tables, etc. that the MD part of the assembler will need | |
7394 | that can be determined before arguments are parsed. */ | |
7395 | void | |
7396 | md_begin () | |
7397 | { | |
8b84be9d | 7398 | int i, j, k, t, goodness, best, ok; |
800eeca4 JW |
7399 | const char *err; |
7400 | char name[8]; | |
7401 | ||
7402 | md.auto_align = 1; | |
7403 | md.explicit_mode = md.default_explicit_mode; | |
7404 | ||
7405 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7406 | ||
0234cb7c | 7407 | /* Make sure function pointers get initialized. */ |
10a98291 | 7408 | target_big_endian = -1; |
549f748d | 7409 | dot_byteorder (default_big_endian); |
10a98291 | 7410 | |
35f5df7f L |
7411 | alias_hash = hash_new (); |
7412 | alias_name_hash = hash_new (); | |
7413 | secalias_hash = hash_new (); | |
7414 | secalias_name_hash = hash_new (); | |
7415 | ||
13ae64f3 JJ |
7416 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7417 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7418 | &zero_address_frag); | |
7419 | ||
7420 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7421 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7422 | &zero_address_frag); | |
7423 | ||
800eeca4 | 7424 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7425 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7426 | &zero_address_frag); | |
800eeca4 JW |
7427 | |
7428 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7429 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7430 | &zero_address_frag); | |
800eeca4 JW |
7431 | |
7432 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7433 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7434 | &zero_address_frag); | |
800eeca4 | 7435 | |
fa2c7eff RH |
7436 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7437 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7438 | &zero_address_frag); | |
7439 | ||
c67e42c9 | 7440 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7441 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7442 | &zero_address_frag); | |
c67e42c9 | 7443 | |
800eeca4 | 7444 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7445 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7446 | &zero_address_frag); | |
800eeca4 JW |
7447 | |
7448 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7449 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7450 | &zero_address_frag); | |
800eeca4 JW |
7451 | |
7452 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7453 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7454 | &zero_address_frag); | |
800eeca4 | 7455 | |
13ae64f3 JJ |
7456 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7457 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7458 | &zero_address_frag); | |
7459 | ||
800eeca4 | 7460 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7461 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7462 | &zero_address_frag); | |
800eeca4 JW |
7463 | |
7464 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7465 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7466 | &zero_address_frag); | |
800eeca4 | 7467 | |
13ae64f3 JJ |
7468 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7469 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7470 | &zero_address_frag); | |
7471 | ||
7472 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7473 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7474 | &zero_address_frag); | |
7475 | ||
7476 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7477 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7478 | &zero_address_frag); | |
7479 | ||
3969b680 RH |
7480 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7481 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7482 | &zero_address_frag); | |
7483 | ||
f6fe78d6 JW |
7484 | if (md.tune != itanium1) |
7485 | { | |
7486 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7487 | le_nop[0] = 0x8; | |
7488 | le_nop_stop[0] = 0x9; | |
7489 | } | |
7490 | ||
197865e8 | 7491 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7492 | base 4 value, in which each match counts for 3. Match-failures |
7493 | result in NOPs and we use extra_goodness() to pick the execution | |
7494 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7495 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7496 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7497 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7498 | { | |
7499 | best = 0; | |
7500 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7501 | { | |
7502 | goodness = 0; | |
7503 | if (match (t, i, 0)) | |
7504 | { | |
7505 | if (match (t, j, 1)) | |
7506 | { | |
286cee81 | 7507 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7508 | goodness = 3 + 3 + 3; |
800eeca4 | 7509 | else |
44576e1f | 7510 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7511 | } |
7512 | else if (match (t, j, 2)) | |
44576e1f | 7513 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7514 | else |
44576e1f RH |
7515 | { |
7516 | goodness = 3; | |
7517 | goodness += extra_goodness (t, 1); | |
7518 | goodness += extra_goodness (t, 2); | |
7519 | } | |
800eeca4 JW |
7520 | } |
7521 | else if (match (t, i, 1)) | |
7522 | { | |
286cee81 | 7523 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7524 | goodness = 3 + 3; |
800eeca4 | 7525 | else |
44576e1f | 7526 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7527 | } |
7528 | else if (match (t, i, 2)) | |
44576e1f | 7529 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7530 | |
7531 | if (goodness > best) | |
7532 | { | |
7533 | best = goodness; | |
7534 | best_template[i][j][k] = t; | |
7535 | } | |
7536 | } | |
7537 | } | |
7538 | ||
7c06efaa JW |
7539 | #ifdef DEBUG_TEMPLATES |
7540 | /* For debugging changes to the best_template calculations. We don't care | |
7541 | about combinations with invalid instructions, so start the loops at 1. */ | |
7542 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7543 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7544 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7545 | { | |
7546 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7547 | 'x', 'd' }; | |
7548 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7549 | type_letter[k], | |
7550 | ia64_templ_desc[best_template[i][j][k]].name); | |
7551 | } | |
7552 | #endif | |
7553 | ||
800eeca4 JW |
7554 | for (i = 0; i < NUM_SLOTS; ++i) |
7555 | md.slot[i].user_template = -1; | |
7556 | ||
7557 | md.pseudo_hash = hash_new (); | |
7558 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7559 | { | |
7560 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7561 | (void *) (pseudo_opcode + i)); | |
7562 | if (err) | |
ad4b42b4 | 7563 | as_fatal (_("ia64.md_begin: can't hash `%s': %s"), |
800eeca4 JW |
7564 | pseudo_opcode[i].name, err); |
7565 | } | |
7566 | ||
7567 | md.reg_hash = hash_new (); | |
7568 | md.dynreg_hash = hash_new (); | |
7569 | md.const_hash = hash_new (); | |
7570 | md.entry_hash = hash_new (); | |
7571 | ||
542d6675 | 7572 | /* general registers: */ |
8b84be9d JB |
7573 | declare_register_set ("r", 128, REG_GR); |
7574 | declare_register ("gp", REG_GR + 1); | |
7575 | declare_register ("sp", REG_GR + 12); | |
7576 | declare_register ("tp", REG_GR + 13); | |
7577 | declare_register_set ("ret", 4, REG_GR + 8); | |
800eeca4 | 7578 | |
542d6675 | 7579 | /* floating point registers: */ |
8b84be9d JB |
7580 | declare_register_set ("f", 128, REG_FR); |
7581 | declare_register_set ("farg", 8, REG_FR + 8); | |
7582 | declare_register_set ("fret", 8, REG_FR + 8); | |
800eeca4 | 7583 | |
542d6675 | 7584 | /* branch registers: */ |
8b84be9d JB |
7585 | declare_register_set ("b", 8, REG_BR); |
7586 | declare_register ("rp", REG_BR + 0); | |
800eeca4 | 7587 | |
8b84be9d JB |
7588 | /* predicate registers: */ |
7589 | declare_register_set ("p", 64, REG_P); | |
7590 | declare_register ("pr", REG_PR); | |
7591 | declare_register ("pr.rot", REG_PR_ROT); | |
800eeca4 | 7592 | |
8b84be9d JB |
7593 | /* application registers: */ |
7594 | declare_register_set ("ar", 128, REG_AR); | |
5e0bd176 JB |
7595 | for (i = 0; i < NELEMS (ar); ++i) |
7596 | declare_register (ar[i].name, REG_AR + ar[i].regnum); | |
800eeca4 | 7597 | |
8b84be9d JB |
7598 | /* control registers: */ |
7599 | declare_register_set ("cr", 128, REG_CR); | |
5e0bd176 JB |
7600 | for (i = 0; i < NELEMS (cr); ++i) |
7601 | declare_register (cr[i].name, REG_CR + cr[i].regnum); | |
800eeca4 | 7602 | |
8b84be9d JB |
7603 | declare_register ("ip", REG_IP); |
7604 | declare_register ("cfm", REG_CFM); | |
7605 | declare_register ("psr", REG_PSR); | |
7606 | declare_register ("psr.l", REG_PSR_L); | |
7607 | declare_register ("psr.um", REG_PSR_UM); | |
7608 | ||
7609 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7610 | { | |
7611 | unsigned int regnum = indirect_reg[i].regnum; | |
7612 | ||
7613 | md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum); | |
7614 | } | |
800eeca4 | 7615 | |
542d6675 | 7616 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7617 | declare_register ("psp", REG_PSP); |
7618 | ||
800eeca4 JW |
7619 | for (i = 0; i < NELEMS (const_bits); ++i) |
7620 | { | |
7621 | err = hash_insert (md.const_hash, const_bits[i].name, | |
7622 | (PTR) (const_bits + i)); | |
7623 | if (err) | |
ad4b42b4 | 7624 | as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"), |
800eeca4 JW |
7625 | name, err); |
7626 | } | |
7627 | ||
44f5c83a JW |
7628 | /* Set the architecture and machine depending on defaults and command line |
7629 | options. */ | |
7630 | if (md.flags & EF_IA_64_ABI64) | |
7631 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7632 | else | |
7633 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7634 | ||
7635 | if (! ok) | |
7636 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7637 | |
557debba JW |
7638 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7639 | ||
7640 | if (md.flags & EF_IA_64_ABI64) | |
7641 | { | |
7642 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7643 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7644 | } | |
7645 | else | |
7646 | { | |
7647 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7648 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7649 | } | |
7650 | ||
800eeca4 JW |
7651 | md.mem_offset.hint = 0; |
7652 | md.path = 0; | |
7653 | md.maxpaths = 0; | |
7654 | md.entry_labels = NULL; | |
7655 | } | |
7656 | ||
970d6792 L |
7657 | /* Set the default options in md. Cannot do this in md_begin because |
7658 | that is called after md_parse_option which is where we set the | |
7659 | options in md based on command line options. */ | |
44f5c83a JW |
7660 | |
7661 | void | |
7662 | ia64_init (argc, argv) | |
2434f565 JW |
7663 | int argc ATTRIBUTE_UNUSED; |
7664 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7665 | { |
1cd8ff38 | 7666 | md.flags = MD_FLAGS_DEFAULT; |
f1dab70d | 7667 | md.detect_dv = 1; |
970d6792 L |
7668 | /* FIXME: We should change it to unwind_check_error someday. */ |
7669 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7670 | md.hint_b = hint_b_error; |
8c2fda1d | 7671 | md.tune = itanium2; |
44f5c83a JW |
7672 | } |
7673 | ||
7674 | /* Return a string for the target object file format. */ | |
7675 | ||
7676 | const char * | |
7677 | ia64_target_format () | |
7678 | { | |
7679 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7680 | { | |
72a76794 JW |
7681 | if (md.flags & EF_IA_64_BE) |
7682 | { | |
7683 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7684 | #if defined(TE_AIX50) |
7463c317 | 7685 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7686 | #elif defined(TE_HPUX) |
7687 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7688 | #else |
72a76794 | 7689 | return "elf64-ia64-big"; |
7463c317 | 7690 | #endif |
72a76794 | 7691 | else |
1cd8ff38 | 7692 | #if defined(TE_AIX50) |
7463c317 | 7693 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7694 | #elif defined(TE_HPUX) |
7695 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7696 | #else |
72a76794 | 7697 | return "elf32-ia64-big"; |
7463c317 | 7698 | #endif |
72a76794 | 7699 | } |
44f5c83a | 7700 | else |
72a76794 JW |
7701 | { |
7702 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7703 | #ifdef TE_AIX50 |
7704 | return "elf64-ia64-aix-little"; | |
7705 | #else | |
72a76794 | 7706 | return "elf64-ia64-little"; |
7463c317 | 7707 | #endif |
72a76794 | 7708 | else |
7463c317 TW |
7709 | #ifdef TE_AIX50 |
7710 | return "elf32-ia64-aix-little"; | |
7711 | #else | |
72a76794 | 7712 | return "elf32-ia64-little"; |
7463c317 | 7713 | #endif |
72a76794 | 7714 | } |
44f5c83a JW |
7715 | } |
7716 | else | |
7717 | return "unknown-format"; | |
7718 | } | |
7719 | ||
800eeca4 JW |
7720 | void |
7721 | ia64_end_of_source () | |
7722 | { | |
542d6675 | 7723 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7724 | insn_group_break (1, 0, 0); |
7725 | ||
542d6675 | 7726 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7727 | ia64_flush_insns (); |
7728 | ||
7729 | bfd_set_private_flags (stdoutput, md.flags); | |
7730 | ||
800eeca4 JW |
7731 | md.mem_offset.hint = 0; |
7732 | } | |
7733 | ||
7734 | void | |
7735 | ia64_start_line () | |
7736 | { | |
e4e8248d JB |
7737 | static int first; |
7738 | ||
7739 | if (!first) { | |
7740 | /* Make sure we don't reference input_line_pointer[-1] when that's | |
7741 | not valid. */ | |
7742 | first = 1; | |
7743 | return; | |
7744 | } | |
7745 | ||
f1bcba5b | 7746 | if (md.qp.X_op == O_register) |
ad4b42b4 | 7747 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
7748 | md.qp.X_op = O_absent; |
7749 | ||
7750 | if (ignore_input ()) | |
7751 | return; | |
7752 | ||
7753 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7754 | { | |
7755 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7756 | { |
7757 | static int warned; | |
7758 | ||
7759 | if (!warned) | |
7760 | { | |
7761 | warned = 1; | |
7762 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7763 | } | |
7764 | } | |
800eeca4 | 7765 | else |
542d6675 | 7766 | insn_group_break (1, 0, 0); |
800eeca4 | 7767 | } |
e4e8248d | 7768 | else if (input_line_pointer[-1] == '{') |
800eeca4 | 7769 | { |
800eeca4 | 7770 | if (md.manual_bundling) |
ad4b42b4 | 7771 | as_warn (_("Found '{' when manual bundling is already turned on")); |
800eeca4 JW |
7772 | else |
7773 | CURR_SLOT.manual_bundling_on = 1; | |
7774 | md.manual_bundling = 1; | |
7775 | ||
542d6675 KH |
7776 | /* Bundling is only acceptable in explicit mode |
7777 | or when in default automatic mode. */ | |
800eeca4 | 7778 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7779 | { |
7780 | if (!md.mode_explicitly_set | |
7781 | && !md.default_explicit_mode) | |
7782 | dot_dv_mode ('E'); | |
7783 | else | |
7784 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7785 | } | |
e4e8248d JB |
7786 | } |
7787 | else if (input_line_pointer[-1] == '}') | |
7788 | { | |
800eeca4 | 7789 | if (!md.manual_bundling) |
ad4b42b4 | 7790 | as_warn (_("Found '}' when manual bundling is off")); |
800eeca4 JW |
7791 | else |
7792 | PREV_SLOT.manual_bundling_off = 1; | |
7793 | md.manual_bundling = 0; | |
7794 | ||
7795 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7796 | if (md.detect_dv |
542d6675 KH |
7797 | && md.explicit_mode |
7798 | && !md.mode_explicitly_set | |
7799 | && !md.default_explicit_mode) | |
7800 | dot_dv_mode ('A'); | |
e4e8248d JB |
7801 | } |
7802 | } | |
800eeca4 | 7803 | |
e4e8248d JB |
7804 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7805 | labels. */ | |
7806 | static int defining_tag = 0; | |
7807 | ||
7808 | int | |
7809 | ia64_unrecognized_line (ch) | |
7810 | int ch; | |
7811 | { | |
7812 | switch (ch) | |
7813 | { | |
7814 | case '(': | |
60d11e55 | 7815 | expression_and_evaluate (&md.qp); |
e4e8248d | 7816 | if (*input_line_pointer++ != ')') |
800eeca4 | 7817 | { |
ad4b42b4 | 7818 | as_bad (_("Expected ')'")); |
e4e8248d JB |
7819 | return 0; |
7820 | } | |
7821 | if (md.qp.X_op != O_register) | |
7822 | { | |
ad4b42b4 | 7823 | as_bad (_("Qualifying predicate expected")); |
e4e8248d JB |
7824 | return 0; |
7825 | } | |
7826 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7827 | { | |
ad4b42b4 | 7828 | as_bad (_("Predicate register expected")); |
e4e8248d | 7829 | return 0; |
800eeca4 | 7830 | } |
800eeca4 JW |
7831 | return 1; |
7832 | ||
f1bcba5b JW |
7833 | case '[': |
7834 | { | |
7835 | char *s; | |
7836 | char c; | |
7837 | symbolS *tag; | |
4d5a53ff | 7838 | int temp; |
f1bcba5b JW |
7839 | |
7840 | if (md.qp.X_op == O_register) | |
7841 | { | |
ad4b42b4 | 7842 | as_bad (_("Tag must come before qualifying predicate.")); |
f1bcba5b JW |
7843 | return 0; |
7844 | } | |
4d5a53ff JW |
7845 | |
7846 | /* This implements just enough of read_a_source_file in read.c to | |
7847 | recognize labels. */ | |
7848 | if (is_name_beginner (*input_line_pointer)) | |
7849 | { | |
7850 | s = input_line_pointer; | |
7851 | c = get_symbol_end (); | |
7852 | } | |
7853 | else if (LOCAL_LABELS_FB | |
3882b010 | 7854 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7855 | { |
7856 | temp = 0; | |
3882b010 | 7857 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7858 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7859 | fb_label_instance_inc (temp); | |
7860 | s = fb_label_name (temp, 0); | |
7861 | c = *input_line_pointer; | |
7862 | } | |
7863 | else | |
7864 | { | |
7865 | s = NULL; | |
7866 | c = '\0'; | |
7867 | } | |
f1bcba5b JW |
7868 | if (c != ':') |
7869 | { | |
7870 | /* Put ':' back for error messages' sake. */ | |
7871 | *input_line_pointer++ = ':'; | |
ad4b42b4 | 7872 | as_bad (_("Expected ':'")); |
f1bcba5b JW |
7873 | return 0; |
7874 | } | |
4d5a53ff | 7875 | |
f1bcba5b JW |
7876 | defining_tag = 1; |
7877 | tag = colon (s); | |
7878 | defining_tag = 0; | |
7879 | /* Put ':' back for error messages' sake. */ | |
7880 | *input_line_pointer++ = ':'; | |
7881 | if (*input_line_pointer++ != ']') | |
7882 | { | |
ad4b42b4 | 7883 | as_bad (_("Expected ']'")); |
f1bcba5b JW |
7884 | return 0; |
7885 | } | |
7886 | if (! tag) | |
7887 | { | |
ad4b42b4 | 7888 | as_bad (_("Tag name expected")); |
f1bcba5b JW |
7889 | return 0; |
7890 | } | |
7891 | return 1; | |
7892 | } | |
7893 | ||
800eeca4 JW |
7894 | default: |
7895 | break; | |
7896 | } | |
542d6675 KH |
7897 | |
7898 | /* Not a valid line. */ | |
7899 | return 0; | |
800eeca4 JW |
7900 | } |
7901 | ||
7902 | void | |
7903 | ia64_frob_label (sym) | |
7904 | struct symbol *sym; | |
7905 | { | |
7906 | struct label_fix *fix; | |
7907 | ||
f1bcba5b JW |
7908 | /* Tags need special handling since they are not bundle breaks like |
7909 | labels. */ | |
7910 | if (defining_tag) | |
7911 | { | |
7912 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7913 | fix->sym = sym; | |
7914 | fix->next = CURR_SLOT.tag_fixups; | |
07a53e5c | 7915 | fix->dw2_mark_labels = FALSE; |
f1bcba5b JW |
7916 | CURR_SLOT.tag_fixups = fix; |
7917 | ||
7918 | return; | |
7919 | } | |
7920 | ||
800eeca4 JW |
7921 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7922 | { | |
7923 | md.last_text_seg = now_seg; | |
7924 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7925 | fix->sym = sym; | |
7926 | fix->next = CURR_SLOT.label_fixups; | |
07a53e5c | 7927 | fix->dw2_mark_labels = dwarf2_loc_mark_labels; |
800eeca4 JW |
7928 | CURR_SLOT.label_fixups = fix; |
7929 | ||
542d6675 | 7930 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7931 | if (md.path == md.maxpaths) |
542d6675 KH |
7932 | { |
7933 | md.maxpaths += 20; | |
7934 | md.entry_labels = (const char **) | |
7935 | xrealloc ((void *) md.entry_labels, | |
7936 | md.maxpaths * sizeof (char *)); | |
7937 | } | |
800eeca4 JW |
7938 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7939 | } | |
7940 | } | |
7941 | ||
936cf02e JW |
7942 | #ifdef TE_HPUX |
7943 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7944 | that are declared but unused. This routine removes declared, | |
7945 | unused symbols from an object. */ | |
7946 | int | |
7947 | ia64_frob_symbol (sym) | |
7948 | struct symbol *sym; | |
7949 | { | |
7950 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7951 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7952 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7953 | && ! S_IS_EXTERNAL (sym))) | |
7954 | return 1; | |
7955 | return 0; | |
7956 | } | |
7957 | #endif | |
7958 | ||
800eeca4 JW |
7959 | void |
7960 | ia64_flush_pending_output () | |
7961 | { | |
4d5a53ff JW |
7962 | if (!md.keep_pending_output |
7963 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7964 | { |
7965 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7966 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7967 | insn_group_break (1, 0, 0); | |
7968 | ia64_flush_insns (); | |
7969 | } | |
7970 | } | |
7971 | ||
7972 | /* Do ia64-specific expression optimization. All that's done here is | |
7973 | to transform index expressions that are either due to the indexing | |
7974 | of rotating registers or due to the indexing of indirect register | |
7975 | sets. */ | |
7976 | int | |
7977 | ia64_optimize_expr (l, op, r) | |
7978 | expressionS *l; | |
7979 | operatorT op; | |
7980 | expressionS *r; | |
7981 | { | |
6a2375c6 JB |
7982 | if (op != O_index) |
7983 | return 0; | |
7984 | resolve_expression (l); | |
7985 | if (l->X_op == O_register) | |
800eeca4 | 7986 | { |
6a2375c6 JB |
7987 | unsigned num_regs = l->X_add_number >> 16; |
7988 | ||
7989 | resolve_expression (r); | |
7990 | if (num_regs) | |
800eeca4 | 7991 | { |
6a2375c6 JB |
7992 | /* Left side is a .rotX-allocated register. */ |
7993 | if (r->X_op != O_constant) | |
800eeca4 | 7994 | { |
ad4b42b4 | 7995 | as_bad (_("Rotating register index must be a non-negative constant")); |
6a2375c6 JB |
7996 | r->X_add_number = 0; |
7997 | } | |
7998 | else if ((valueT) r->X_add_number >= num_regs) | |
7999 | { | |
ad4b42b4 | 8000 | as_bad (_("Index out of range 0..%u"), num_regs - 1); |
800eeca4 JW |
8001 | r->X_add_number = 0; |
8002 | } | |
8003 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
8004 | return 1; | |
8005 | } | |
6a2375c6 | 8006 | else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR) |
800eeca4 | 8007 | { |
6a2375c6 JB |
8008 | if (r->X_op != O_register |
8009 | || r->X_add_number < REG_GR | |
8010 | || r->X_add_number > REG_GR + 127) | |
800eeca4 | 8011 | { |
ad4b42b4 | 8012 | as_bad (_("Indirect register index must be a general register")); |
6a2375c6 | 8013 | r->X_add_number = REG_GR; |
800eeca4 JW |
8014 | } |
8015 | l->X_op = O_index; | |
8b84be9d | 8016 | l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID]; |
800eeca4 JW |
8017 | l->X_add_number = r->X_add_number; |
8018 | return 1; | |
8019 | } | |
8020 | } | |
ad4b42b4 | 8021 | as_bad (_("Index can only be applied to rotating or indirect registers")); |
6a2375c6 JB |
8022 | /* Fall back to some register use of which has as little as possible |
8023 | side effects, to minimize subsequent error messages. */ | |
8024 | l->X_op = O_register; | |
8025 | l->X_add_number = REG_GR + 3; | |
8026 | return 1; | |
800eeca4 JW |
8027 | } |
8028 | ||
8029 | int | |
16a48f83 | 8030 | ia64_parse_name (name, e, nextcharP) |
800eeca4 JW |
8031 | char *name; |
8032 | expressionS *e; | |
16a48f83 | 8033 | char *nextcharP; |
800eeca4 JW |
8034 | { |
8035 | struct const_desc *cdesc; | |
8036 | struct dynreg *dr = 0; | |
16a48f83 | 8037 | unsigned int idx; |
800eeca4 JW |
8038 | struct symbol *sym; |
8039 | char *end; | |
8040 | ||
16a48f83 JB |
8041 | if (*name == '@') |
8042 | { | |
8043 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
8044 | ||
8045 | /* Find what relocation pseudo-function we're dealing with. */ | |
8046 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
8047 | if (pseudo_func[idx].name | |
8048 | && pseudo_func[idx].name[0] == name[1] | |
8049 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
8050 | { | |
8051 | pseudo_type = pseudo_func[idx].type; | |
8052 | break; | |
8053 | } | |
8054 | switch (pseudo_type) | |
8055 | { | |
8056 | case PSEUDO_FUNC_RELOC: | |
8057 | end = input_line_pointer; | |
8058 | if (*nextcharP != '(') | |
8059 | { | |
ad4b42b4 | 8060 | as_bad (_("Expected '('")); |
2f6d622e | 8061 | break; |
16a48f83 JB |
8062 | } |
8063 | /* Skip '('. */ | |
8064 | ++input_line_pointer; | |
8065 | expression (e); | |
8066 | if (*input_line_pointer != ')') | |
8067 | { | |
ad4b42b4 | 8068 | as_bad (_("Missing ')'")); |
16a48f83 JB |
8069 | goto done; |
8070 | } | |
8071 | /* Skip ')'. */ | |
8072 | ++input_line_pointer; | |
8073 | if (e->X_op != O_symbol) | |
8074 | { | |
8075 | if (e->X_op != O_pseudo_fixup) | |
8076 | { | |
ad4b42b4 | 8077 | as_bad (_("Not a symbolic expression")); |
16a48f83 JB |
8078 | goto done; |
8079 | } | |
8080 | if (idx != FUNC_LT_RELATIVE) | |
8081 | { | |
ad4b42b4 | 8082 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
8083 | goto done; |
8084 | } | |
8085 | switch (S_GET_VALUE (e->X_op_symbol)) | |
8086 | { | |
8087 | case FUNC_FPTR_RELATIVE: | |
8088 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
8089 | case FUNC_DTP_MODULE: | |
8090 | idx = FUNC_LT_DTP_MODULE; break; | |
8091 | case FUNC_DTP_RELATIVE: | |
8092 | idx = FUNC_LT_DTP_RELATIVE; break; | |
8093 | case FUNC_TP_RELATIVE: | |
8094 | idx = FUNC_LT_TP_RELATIVE; break; | |
8095 | default: | |
ad4b42b4 | 8096 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
8097 | goto done; |
8098 | } | |
8099 | } | |
8100 | /* Make sure gas doesn't get rid of local symbols that are used | |
8101 | in relocs. */ | |
8102 | e->X_op = O_pseudo_fixup; | |
8103 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
8104 | done: |
8105 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
8106 | break; |
8107 | ||
8108 | case PSEUDO_FUNC_CONST: | |
8109 | e->X_op = O_constant; | |
8110 | e->X_add_number = pseudo_func[idx].u.ival; | |
8111 | break; | |
8112 | ||
8113 | case PSEUDO_FUNC_REG: | |
8114 | e->X_op = O_register; | |
8115 | e->X_add_number = pseudo_func[idx].u.ival; | |
8116 | break; | |
8117 | ||
8118 | default: | |
8119 | return 0; | |
8120 | } | |
16a48f83 JB |
8121 | return 1; |
8122 | } | |
8123 | ||
542d6675 | 8124 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
8125 | sym = hash_find (md.reg_hash, name); |
8126 | if (sym) | |
8127 | { | |
8128 | e->X_op = O_register; | |
8129 | e->X_add_number = S_GET_VALUE (sym); | |
8130 | return 1; | |
8131 | } | |
8132 | ||
8133 | cdesc = hash_find (md.const_hash, name); | |
8134 | if (cdesc) | |
8135 | { | |
8136 | e->X_op = O_constant; | |
8137 | e->X_add_number = cdesc->value; | |
8138 | return 1; | |
8139 | } | |
8140 | ||
542d6675 | 8141 | /* check for inN, locN, or outN: */ |
26b810ce | 8142 | idx = 0; |
800eeca4 JW |
8143 | switch (name[0]) |
8144 | { | |
8145 | case 'i': | |
3882b010 | 8146 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
8147 | { |
8148 | dr = &md.in; | |
26b810ce | 8149 | idx = 2; |
800eeca4 JW |
8150 | } |
8151 | break; | |
8152 | ||
8153 | case 'l': | |
3882b010 | 8154 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
8155 | { |
8156 | dr = &md.loc; | |
26b810ce | 8157 | idx = 3; |
800eeca4 JW |
8158 | } |
8159 | break; | |
8160 | ||
8161 | case 'o': | |
3882b010 | 8162 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
8163 | { |
8164 | dr = &md.out; | |
26b810ce | 8165 | idx = 3; |
800eeca4 JW |
8166 | } |
8167 | break; | |
8168 | ||
8169 | default: | |
8170 | break; | |
8171 | } | |
8172 | ||
26b810ce JB |
8173 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
8174 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 8175 | { |
26b810ce JB |
8176 | unsigned long regnum; |
8177 | ||
542d6675 | 8178 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
8179 | regnum = strtoul (name + idx, &end, 10); |
8180 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 8181 | { |
26b810ce | 8182 | if (regnum >= dr->num_regs) |
800eeca4 JW |
8183 | { |
8184 | if (!dr->num_regs) | |
ad4b42b4 | 8185 | as_bad (_("No current frame")); |
800eeca4 | 8186 | else |
ad4b42b4 | 8187 | as_bad (_("Register number out of range 0..%u"), |
542d6675 | 8188 | dr->num_regs - 1); |
800eeca4 JW |
8189 | regnum = 0; |
8190 | } | |
8191 | e->X_op = O_register; | |
8192 | e->X_add_number = dr->base + regnum; | |
8193 | return 1; | |
8194 | } | |
8195 | } | |
8196 | ||
20b36a95 JB |
8197 | end = alloca (strlen (name) + 1); |
8198 | strcpy (end, name); | |
8199 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8200 | if ((dr = hash_find (md.dynreg_hash, name))) |
8201 | { | |
8202 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8203 | Store the base register number in the low 16 bits of |
8204 | X_add_number and the size of the register set in the top 16 | |
8205 | bits. */ | |
800eeca4 JW |
8206 | e->X_op = O_register; |
8207 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8208 | return 1; | |
8209 | } | |
8210 | return 0; | |
8211 | } | |
8212 | ||
8213 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8214 | ||
8215 | char * | |
8216 | ia64_canonicalize_symbol_name (name) | |
8217 | char *name; | |
8218 | { | |
20b36a95 JB |
8219 | size_t len = strlen (name), full = len; |
8220 | ||
8221 | while (len > 0 && name[len - 1] == '#') | |
8222 | --len; | |
8223 | if (len <= 0) | |
8224 | { | |
8225 | if (full > 0) | |
ad4b42b4 | 8226 | as_bad (_("Standalone `#' is illegal")); |
20b36a95 JB |
8227 | } |
8228 | else if (len < full - 1) | |
ad4b42b4 | 8229 | as_warn (_("Redundant `#' suffix operators")); |
20b36a95 | 8230 | name[len] = '\0'; |
800eeca4 JW |
8231 | return name; |
8232 | } | |
8233 | ||
3e37788f JW |
8234 | /* Return true if idesc is a conditional branch instruction. This excludes |
8235 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8236 | because they always read/write resources regardless of the value of the | |
8237 | qualifying predicate. br.ia must always use p0, and hence is always | |
8238 | taken. Thus this function returns true for branches which can fall | |
8239 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8240 | |
800eeca4 JW |
8241 | static int |
8242 | is_conditional_branch (idesc) | |
542d6675 | 8243 | struct ia64_opcode *idesc; |
800eeca4 | 8244 | { |
1deb8127 | 8245 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8246 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8247 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8248 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8249 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8250 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8251 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8252 | || idesc->name[2] == 'l' | |
8253 | /* br.cond, br.call, br.clr */ | |
8254 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8255 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8256 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8257 | } |
8258 | ||
8259 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8260 | returns zero. */ |
8261 | ||
800eeca4 JW |
8262 | static int |
8263 | is_taken_branch (idesc) | |
542d6675 | 8264 | struct ia64_opcode *idesc; |
800eeca4 JW |
8265 | { |
8266 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8267 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8268 | } |
8269 | ||
8270 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8271 | doubt, returns zero. */ |
8272 | ||
800eeca4 JW |
8273 | static int |
8274 | is_interruption_or_rfi (idesc) | |
542d6675 | 8275 | struct ia64_opcode *idesc; |
800eeca4 JW |
8276 | { |
8277 | if (strcmp (idesc->name, "rfi") == 0) | |
8278 | return 1; | |
8279 | return 0; | |
8280 | } | |
8281 | ||
8282 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8283 | -1 if there is no dependency. */ | |
542d6675 | 8284 | |
800eeca4 JW |
8285 | static int |
8286 | depends_on (depind, idesc) | |
542d6675 KH |
8287 | int depind; |
8288 | struct ia64_opcode *idesc; | |
800eeca4 JW |
8289 | { |
8290 | int i; | |
8291 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8292 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8293 | { |
542d6675 KH |
8294 | if (depind == DEP (dep->chks[i])) |
8295 | return i; | |
800eeca4 JW |
8296 | } |
8297 | return -1; | |
8298 | } | |
8299 | ||
8300 | /* Determine a set of specific resources used for a particular resource | |
8301 | class. Returns the number of specific resources identified For those | |
8302 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8303 | marked nonspecific. |
800eeca4 JW |
8304 | |
8305 | Meanings of value in 'NOTE': | |
8306 | 1) only read/write when the register number is explicitly encoded in the | |
8307 | insn. | |
8308 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8309 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8310 | 3) general register value is used to specify an indirect register; not |
8311 | determinable statically. | |
8312 | 4) only read the given resource when bits 7:0 of the indirect index | |
8313 | register value does not match the register number of the resource; not | |
8314 | determinable statically. | |
8315 | 5) all rules are implementation specific. | |
8316 | 6) only when both the index specified by the reader and the index specified | |
8317 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8318 | statically. |
800eeca4 | 8319 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8320 | set |
800eeca4 JW |
8321 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8322 | only read when these insns reference FR2-31 | |
8323 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8324 | written when these insns write FR32-127 | |
8325 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8326 | instruction | |
8327 | 11) The target predicates are written independently of PR[qp], but source | |
8328 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8329 | cannot statically be determined, all source registers are marked used. | |
8330 | 12) This insn only reads the specified predicate register when that | |
8331 | register is the PR[qp]. | |
ad4b42b4 | 8332 | 13) This reference to ld-c only applies to the GR whose value is loaded |
197865e8 | 8333 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8334 | 14) The RSE resource includes the implementation-specific RSE internal |
8335 | state resources. At least one (and possibly more) of these resources are | |
8336 | read by each instruction listed in IC:rse-readers. At least one (and | |
8337 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8338 | IC:rse-writers. |
800eeca4 | 8339 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8340 | generate. |
7f3dfb9c L |
8341 | 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and |
8342 | mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up. | |
800eeca4 JW |
8343 | |
8344 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8345 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8346 | */ |
8347 | ||
8348 | #define MAX_SPECS 256 | |
8349 | #define DV_CHK 1 | |
8350 | #define DV_REG 0 | |
8351 | ||
8352 | static int | |
8353 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
8354 | const struct ia64_dependency *dep; |
8355 | struct ia64_opcode *idesc; | |
8356 | int type; /* is this a DV chk or a DV reg? */ | |
8357 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
8358 | int note; /* resource note for this insn's usage */ | |
8359 | int path; /* which execution path to examine */ | |
800eeca4 JW |
8360 | { |
8361 | int count = 0; | |
8362 | int i; | |
8363 | int rsrc_write = 0; | |
8364 | struct rsrc tmpl; | |
197865e8 | 8365 | |
800eeca4 JW |
8366 | if (dep->mode == IA64_DV_WAW |
8367 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8368 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8369 | rsrc_write = 1; | |
8370 | ||
8371 | /* template for any resources we identify */ | |
8372 | tmpl.dependency = dep; | |
8373 | tmpl.note = note; | |
8374 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8375 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8376 | tmpl.link_to_qp_branch = 1; | |
8377 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8378 | tmpl.mem_offset.offset = 0; |
8379 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8380 | tmpl.specific = 1; |
a66d2bb7 | 8381 | tmpl.index = -1; |
7484b8e6 | 8382 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8383 | tmpl.depind = 0; |
8384 | tmpl.file = NULL; | |
8385 | tmpl.line = 0; | |
8386 | tmpl.path = 0; | |
800eeca4 JW |
8387 | |
8388 | #define UNHANDLED \ | |
8389 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8390 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8391 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8392 | ||
8393 | /* we don't need to track these */ | |
8394 | if (dep->semantics == IA64_DVS_NONE) | |
8395 | return 0; | |
8396 | ||
8397 | switch (dep->specifier) | |
8398 | { | |
8399 | case IA64_RS_AR_K: | |
8400 | if (note == 1) | |
542d6675 KH |
8401 | { |
8402 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8403 | { | |
8404 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8405 | if (regno >= 0 && regno <= 7) | |
8406 | { | |
8407 | specs[count] = tmpl; | |
8408 | specs[count++].index = regno; | |
8409 | } | |
8410 | } | |
8411 | } | |
800eeca4 | 8412 | else if (note == 0) |
542d6675 KH |
8413 | { |
8414 | for (i = 0; i < 8; i++) | |
8415 | { | |
8416 | specs[count] = tmpl; | |
8417 | specs[count++].index = i; | |
8418 | } | |
8419 | } | |
800eeca4 | 8420 | else |
542d6675 KH |
8421 | { |
8422 | UNHANDLED; | |
8423 | } | |
800eeca4 JW |
8424 | break; |
8425 | ||
8426 | case IA64_RS_AR_UNAT: | |
8427 | /* This is a mov =AR or mov AR= instruction. */ | |
8428 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8429 | { | |
8430 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8431 | if (regno == AR_UNAT) | |
8432 | { | |
8433 | specs[count++] = tmpl; | |
8434 | } | |
8435 | } | |
8436 | else | |
8437 | { | |
8438 | /* This is a spill/fill, or other instruction that modifies the | |
8439 | unat register. */ | |
8440 | ||
8441 | /* Unless we can determine the specific bits used, mark the whole | |
8442 | thing; bits 8:3 of the memory address indicate the bit used in | |
8443 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8444 | subset of conflicts. */ | |
8445 | specs[count] = tmpl; | |
8446 | if (md.mem_offset.hint) | |
8447 | { | |
542d6675 KH |
8448 | if (md.debug_dv) |
8449 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8450 | /* The index isn't actually used, just set it to something | |
8451 | approximating the bit index. */ | |
800eeca4 JW |
8452 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8453 | specs[count].mem_offset.hint = 1; | |
8454 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8455 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8456 | } | |
8457 | else | |
8458 | { | |
8459 | specs[count++].specific = 0; | |
8460 | } | |
8461 | } | |
8462 | break; | |
8463 | ||
8464 | case IA64_RS_AR: | |
8465 | if (note == 1) | |
542d6675 KH |
8466 | { |
8467 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8468 | { | |
8469 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8470 | if ((regno >= 8 && regno <= 15) | |
8471 | || (regno >= 20 && regno <= 23) | |
8472 | || (regno >= 31 && regno <= 39) | |
8473 | || (regno >= 41 && regno <= 47) | |
8474 | || (regno >= 67 && regno <= 111)) | |
8475 | { | |
8476 | specs[count] = tmpl; | |
8477 | specs[count++].index = regno; | |
8478 | } | |
8479 | } | |
8480 | } | |
800eeca4 | 8481 | else |
542d6675 KH |
8482 | { |
8483 | UNHANDLED; | |
8484 | } | |
800eeca4 JW |
8485 | break; |
8486 | ||
8487 | case IA64_RS_ARb: | |
8488 | if (note == 1) | |
542d6675 KH |
8489 | { |
8490 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8491 | { | |
8492 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8493 | if ((regno >= 48 && regno <= 63) | |
8494 | || (regno >= 112 && regno <= 127)) | |
8495 | { | |
8496 | specs[count] = tmpl; | |
8497 | specs[count++].index = regno; | |
8498 | } | |
8499 | } | |
8500 | } | |
800eeca4 | 8501 | else if (note == 0) |
542d6675 KH |
8502 | { |
8503 | for (i = 48; i < 64; i++) | |
8504 | { | |
8505 | specs[count] = tmpl; | |
8506 | specs[count++].index = i; | |
8507 | } | |
8508 | for (i = 112; i < 128; i++) | |
8509 | { | |
8510 | specs[count] = tmpl; | |
8511 | specs[count++].index = i; | |
8512 | } | |
8513 | } | |
197865e8 | 8514 | else |
542d6675 KH |
8515 | { |
8516 | UNHANDLED; | |
8517 | } | |
800eeca4 JW |
8518 | break; |
8519 | ||
8520 | case IA64_RS_BR: | |
8521 | if (note != 1) | |
542d6675 KH |
8522 | { |
8523 | UNHANDLED; | |
8524 | } | |
800eeca4 | 8525 | else |
542d6675 KH |
8526 | { |
8527 | if (rsrc_write) | |
8528 | { | |
8529 | for (i = 0; i < idesc->num_outputs; i++) | |
8530 | if (idesc->operands[i] == IA64_OPND_B1 | |
8531 | || idesc->operands[i] == IA64_OPND_B2) | |
8532 | { | |
8533 | specs[count] = tmpl; | |
8534 | specs[count++].index = | |
8535 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8536 | } | |
8537 | } | |
8538 | else | |
8539 | { | |
40449e9f | 8540 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8541 | if (idesc->operands[i] == IA64_OPND_B1 |
8542 | || idesc->operands[i] == IA64_OPND_B2) | |
8543 | { | |
8544 | specs[count] = tmpl; | |
8545 | specs[count++].index = | |
8546 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8547 | } | |
8548 | } | |
8549 | } | |
800eeca4 JW |
8550 | break; |
8551 | ||
8552 | case IA64_RS_CPUID: /* four or more registers */ | |
8553 | if (note == 3) | |
542d6675 KH |
8554 | { |
8555 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8556 | { | |
8557 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8558 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8559 | && KNOWN (regno)) | |
8560 | { | |
8561 | specs[count] = tmpl; | |
8562 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8563 | } | |
8564 | else | |
8565 | { | |
8566 | specs[count] = tmpl; | |
8567 | specs[count++].specific = 0; | |
8568 | } | |
8569 | } | |
8570 | } | |
800eeca4 | 8571 | else |
542d6675 KH |
8572 | { |
8573 | UNHANDLED; | |
8574 | } | |
800eeca4 JW |
8575 | break; |
8576 | ||
8577 | case IA64_RS_DBR: /* four or more registers */ | |
8578 | if (note == 3) | |
542d6675 KH |
8579 | { |
8580 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8581 | { | |
8582 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8583 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8584 | && KNOWN (regno)) | |
8585 | { | |
8586 | specs[count] = tmpl; | |
8587 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8588 | } | |
8589 | else | |
8590 | { | |
8591 | specs[count] = tmpl; | |
8592 | specs[count++].specific = 0; | |
8593 | } | |
8594 | } | |
8595 | } | |
800eeca4 | 8596 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8597 | { |
8598 | specs[count] = tmpl; | |
8599 | specs[count++].specific = 0; | |
8600 | } | |
800eeca4 | 8601 | else |
542d6675 KH |
8602 | { |
8603 | UNHANDLED; | |
8604 | } | |
800eeca4 JW |
8605 | break; |
8606 | ||
8607 | case IA64_RS_IBR: /* four or more registers */ | |
8608 | if (note == 3) | |
542d6675 KH |
8609 | { |
8610 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8611 | { | |
8612 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8613 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8614 | && KNOWN (regno)) | |
8615 | { | |
8616 | specs[count] = tmpl; | |
8617 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8618 | } | |
8619 | else | |
8620 | { | |
8621 | specs[count] = tmpl; | |
8622 | specs[count++].specific = 0; | |
8623 | } | |
8624 | } | |
8625 | } | |
800eeca4 | 8626 | else |
542d6675 KH |
8627 | { |
8628 | UNHANDLED; | |
8629 | } | |
800eeca4 JW |
8630 | break; |
8631 | ||
8632 | case IA64_RS_MSR: | |
8633 | if (note == 5) | |
8634 | { | |
8635 | /* These are implementation specific. Force all references to | |
8636 | conflict with all other references. */ | |
8637 | specs[count] = tmpl; | |
8638 | specs[count++].specific = 0; | |
8639 | } | |
8640 | else | |
8641 | { | |
8642 | UNHANDLED; | |
8643 | } | |
8644 | break; | |
8645 | ||
8646 | case IA64_RS_PKR: /* 16 or more registers */ | |
8647 | if (note == 3 || note == 4) | |
542d6675 KH |
8648 | { |
8649 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8650 | { | |
8651 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8652 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8653 | && KNOWN (regno)) | |
8654 | { | |
8655 | if (note == 3) | |
8656 | { | |
8657 | specs[count] = tmpl; | |
8658 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8659 | } | |
8660 | else | |
8661 | for (i = 0; i < NELEMS (gr_values); i++) | |
8662 | { | |
8663 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8664 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8665 | { |
8666 | specs[count] = tmpl; | |
8667 | specs[count++].index = i; | |
8668 | } | |
8669 | } | |
8670 | } | |
8671 | else | |
8672 | { | |
8673 | specs[count] = tmpl; | |
8674 | specs[count++].specific = 0; | |
8675 | } | |
8676 | } | |
8677 | } | |
8678 | else if (note == 0) | |
8679 | { | |
8680 | /* probe et al. */ | |
8681 | specs[count] = tmpl; | |
8682 | specs[count++].specific = 0; | |
8683 | } | |
8684 | break; | |
8685 | ||
8686 | case IA64_RS_PMC: /* four or more registers */ | |
8687 | if (note == 3) | |
8688 | { | |
8689 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8690 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8691 | ||
8692 | { | |
8693 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8694 | ? 1 : !rsrc_write); | |
8695 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8696 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8697 | && KNOWN (regno)) | |
8698 | { | |
8699 | specs[count] = tmpl; | |
8700 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8701 | } | |
8702 | else | |
8703 | { | |
8704 | specs[count] = tmpl; | |
8705 | specs[count++].specific = 0; | |
8706 | } | |
8707 | } | |
8708 | } | |
8709 | else | |
8710 | { | |
8711 | UNHANDLED; | |
8712 | } | |
800eeca4 JW |
8713 | break; |
8714 | ||
8715 | case IA64_RS_PMD: /* four or more registers */ | |
8716 | if (note == 3) | |
542d6675 KH |
8717 | { |
8718 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8719 | { | |
8720 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8721 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8722 | && KNOWN (regno)) | |
8723 | { | |
8724 | specs[count] = tmpl; | |
8725 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8726 | } | |
8727 | else | |
8728 | { | |
8729 | specs[count] = tmpl; | |
8730 | specs[count++].specific = 0; | |
8731 | } | |
8732 | } | |
8733 | } | |
800eeca4 | 8734 | else |
542d6675 KH |
8735 | { |
8736 | UNHANDLED; | |
8737 | } | |
800eeca4 JW |
8738 | break; |
8739 | ||
8740 | case IA64_RS_RR: /* eight registers */ | |
8741 | if (note == 6) | |
542d6675 KH |
8742 | { |
8743 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8744 | { | |
8745 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8746 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8747 | && KNOWN (regno)) | |
8748 | { | |
8749 | specs[count] = tmpl; | |
8750 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8751 | } | |
8752 | else | |
8753 | { | |
8754 | specs[count] = tmpl; | |
8755 | specs[count++].specific = 0; | |
8756 | } | |
8757 | } | |
8758 | } | |
800eeca4 | 8759 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8760 | { |
8761 | specs[count] = tmpl; | |
8762 | specs[count++].specific = 0; | |
8763 | } | |
197865e8 | 8764 | else |
542d6675 KH |
8765 | { |
8766 | UNHANDLED; | |
8767 | } | |
800eeca4 JW |
8768 | break; |
8769 | ||
8770 | case IA64_RS_CR_IRR: | |
197865e8 | 8771 | if (note == 0) |
542d6675 KH |
8772 | { |
8773 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8774 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8775 | if (rsrc_write | |
8776 | && idesc->operands[1] == IA64_OPND_CR3 | |
8777 | && regno == CR_IVR) | |
8778 | { | |
8779 | for (i = 0; i < 4; i++) | |
8780 | { | |
8781 | specs[count] = tmpl; | |
8782 | specs[count++].index = CR_IRR0 + i; | |
8783 | } | |
8784 | } | |
8785 | } | |
800eeca4 | 8786 | else if (note == 1) |
542d6675 KH |
8787 | { |
8788 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8789 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8790 | && regno >= CR_IRR0 | |
8791 | && regno <= CR_IRR3) | |
8792 | { | |
8793 | specs[count] = tmpl; | |
8794 | specs[count++].index = regno; | |
8795 | } | |
8796 | } | |
800eeca4 | 8797 | else |
542d6675 KH |
8798 | { |
8799 | UNHANDLED; | |
8800 | } | |
800eeca4 JW |
8801 | break; |
8802 | ||
8803 | case IA64_RS_CR_LRR: | |
8804 | if (note != 1) | |
542d6675 KH |
8805 | { |
8806 | UNHANDLED; | |
8807 | } | |
197865e8 | 8808 | else |
542d6675 KH |
8809 | { |
8810 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8811 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8812 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8813 | { | |
8814 | specs[count] = tmpl; | |
8815 | specs[count++].index = regno; | |
8816 | } | |
8817 | } | |
800eeca4 JW |
8818 | break; |
8819 | ||
8820 | case IA64_RS_CR: | |
8821 | if (note == 1) | |
542d6675 KH |
8822 | { |
8823 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8824 | { | |
8825 | specs[count] = tmpl; | |
8826 | specs[count++].index = | |
8827 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8828 | } | |
8829 | } | |
800eeca4 | 8830 | else |
542d6675 KH |
8831 | { |
8832 | UNHANDLED; | |
8833 | } | |
800eeca4 JW |
8834 | break; |
8835 | ||
8836 | case IA64_RS_FR: | |
8837 | case IA64_RS_FRb: | |
8838 | if (note != 1) | |
542d6675 KH |
8839 | { |
8840 | UNHANDLED; | |
8841 | } | |
800eeca4 | 8842 | else if (rsrc_write) |
542d6675 KH |
8843 | { |
8844 | if (dep->specifier == IA64_RS_FRb | |
8845 | && idesc->operands[0] == IA64_OPND_F1) | |
8846 | { | |
8847 | specs[count] = tmpl; | |
8848 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8849 | } | |
8850 | } | |
800eeca4 | 8851 | else |
542d6675 KH |
8852 | { |
8853 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8854 | { | |
8855 | if (idesc->operands[i] == IA64_OPND_F2 | |
8856 | || idesc->operands[i] == IA64_OPND_F3 | |
8857 | || idesc->operands[i] == IA64_OPND_F4) | |
8858 | { | |
8859 | specs[count] = tmpl; | |
8860 | specs[count++].index = | |
8861 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8862 | } | |
8863 | } | |
8864 | } | |
800eeca4 JW |
8865 | break; |
8866 | ||
8867 | case IA64_RS_GR: | |
8868 | if (note == 13) | |
542d6675 KH |
8869 | { |
8870 | /* This reference applies only to the GR whose value is loaded with | |
8871 | data returned from memory. */ | |
8872 | specs[count] = tmpl; | |
8873 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8874 | } | |
800eeca4 | 8875 | else if (note == 1) |
542d6675 KH |
8876 | { |
8877 | if (rsrc_write) | |
8878 | { | |
8879 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8880 | if (idesc->operands[i] == IA64_OPND_R1 |
8881 | || idesc->operands[i] == IA64_OPND_R2 | |
8882 | || idesc->operands[i] == IA64_OPND_R3) | |
8883 | { | |
8884 | specs[count] = tmpl; | |
197865e8 | 8885 | specs[count++].index = |
50b81f19 JW |
8886 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8887 | } | |
8888 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8889 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8890 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8891 | { | |
8892 | specs[count] = tmpl; | |
8893 | specs[count++].index = | |
8894 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8895 | } | |
542d6675 KH |
8896 | } |
8897 | else | |
8898 | { | |
8899 | /* Look for anything that reads a GR. */ | |
8900 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8901 | { | |
8902 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8903 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8904 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8905 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8906 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8907 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8908 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8909 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8910 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8911 | || ((i >= idesc->num_outputs) | |
8912 | && (idesc->operands[i] == IA64_OPND_R1 | |
8913 | || idesc->operands[i] == IA64_OPND_R2 | |
8914 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8915 | /* addl source register. */ |
8916 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8917 | { |
8918 | specs[count] = tmpl; | |
8919 | specs[count++].index = | |
8920 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8921 | } | |
8922 | } | |
8923 | } | |
8924 | } | |
197865e8 | 8925 | else |
542d6675 KH |
8926 | { |
8927 | UNHANDLED; | |
8928 | } | |
800eeca4 JW |
8929 | break; |
8930 | ||
139368c9 JW |
8931 | /* This is the same as IA64_RS_PRr, except that the register range is |
8932 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8933 | case IA64_RS_PR: |
8934 | if (note == 0) | |
542d6675 | 8935 | { |
139368c9 | 8936 | for (i = 1; i < 16; i++) |
542d6675 | 8937 | { |
139368c9 JW |
8938 | specs[count] = tmpl; |
8939 | specs[count++].index = i; | |
8940 | } | |
8941 | } | |
8942 | else if (note == 7) | |
8943 | { | |
8944 | valueT mask = 0; | |
8945 | /* Mark only those registers indicated by the mask. */ | |
8946 | if (rsrc_write) | |
8947 | { | |
8948 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8949 | for (i = 1; i < 16; i++) | |
8950 | if (mask & ((valueT) 1 << i)) | |
8951 | { | |
8952 | specs[count] = tmpl; | |
8953 | specs[count++].index = i; | |
8954 | } | |
8955 | } | |
8956 | else | |
8957 | { | |
8958 | UNHANDLED; | |
8959 | } | |
8960 | } | |
8961 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8962 | { | |
8963 | if (rsrc_write) | |
8964 | { | |
8965 | for (i = 0; i < idesc->num_outputs; i++) | |
8966 | { | |
8967 | if (idesc->operands[i] == IA64_OPND_P1 | |
8968 | || idesc->operands[i] == IA64_OPND_P2) | |
8969 | { | |
8970 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8971 | if (regno >= 1 && regno < 16) | |
8972 | { | |
8973 | specs[count] = tmpl; | |
8974 | specs[count++].index = regno; | |
8975 | } | |
8976 | } | |
8977 | } | |
8978 | } | |
8979 | else | |
8980 | { | |
8981 | UNHANDLED; | |
8982 | } | |
8983 | } | |
8984 | else if (note == 12) | |
8985 | { | |
8986 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8987 | { | |
8988 | specs[count] = tmpl; | |
8989 | specs[count++].index = CURR_SLOT.qp_regno; | |
8990 | } | |
8991 | } | |
8992 | else if (note == 1) | |
8993 | { | |
8994 | if (rsrc_write) | |
8995 | { | |
8996 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8997 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8998 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8999 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
9000 | |
9001 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9002 | || idesc->operands[0] == IA64_OPND_P2) | |
9003 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
9004 | { |
9005 | specs[count] = tmpl; | |
139368c9 JW |
9006 | specs[count].cmp_type = |
9007 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
9008 | specs[count++].index = p1; | |
9009 | } | |
9010 | if ((idesc->operands[1] == IA64_OPND_P1 | |
9011 | || idesc->operands[1] == IA64_OPND_P2) | |
9012 | && p2 >= 1 && p2 < 16) | |
9013 | { | |
9014 | specs[count] = tmpl; | |
9015 | specs[count].cmp_type = | |
9016 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
9017 | specs[count++].index = p2; | |
542d6675 KH |
9018 | } |
9019 | } | |
9020 | else | |
9021 | { | |
139368c9 | 9022 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
9023 | { |
9024 | specs[count] = tmpl; | |
139368c9 JW |
9025 | specs[count++].index = CURR_SLOT.qp_regno; |
9026 | } | |
9027 | if (idesc->operands[1] == IA64_OPND_PR) | |
9028 | { | |
9029 | for (i = 1; i < 16; i++) | |
9030 | { | |
9031 | specs[count] = tmpl; | |
9032 | specs[count++].index = i; | |
9033 | } | |
542d6675 KH |
9034 | } |
9035 | } | |
9036 | } | |
139368c9 JW |
9037 | else |
9038 | { | |
9039 | UNHANDLED; | |
9040 | } | |
9041 | break; | |
9042 | ||
9043 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
9044 | simplified cases of this. */ | |
9045 | case IA64_RS_PRr: | |
9046 | if (note == 0) | |
9047 | { | |
9048 | for (i = 16; i < 63; i++) | |
9049 | { | |
9050 | specs[count] = tmpl; | |
9051 | specs[count++].index = i; | |
9052 | } | |
9053 | } | |
800eeca4 | 9054 | else if (note == 7) |
542d6675 KH |
9055 | { |
9056 | valueT mask = 0; | |
9057 | /* Mark only those registers indicated by the mask. */ | |
9058 | if (rsrc_write | |
9059 | && idesc->operands[0] == IA64_OPND_PR) | |
9060 | { | |
9061 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 9062 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
9063 | for (i = 16; i < 63; i++) |
9064 | { | |
9065 | specs[count] = tmpl; | |
9066 | specs[count++].index = i; | |
9067 | } | |
542d6675 KH |
9068 | } |
9069 | else if (rsrc_write | |
9070 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
9071 | { | |
9072 | for (i = 16; i < 63; i++) | |
9073 | { | |
9074 | specs[count] = tmpl; | |
9075 | specs[count++].index = i; | |
9076 | } | |
9077 | } | |
9078 | else | |
9079 | { | |
9080 | UNHANDLED; | |
9081 | } | |
9082 | } | |
800eeca4 | 9083 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
9084 | { |
9085 | if (rsrc_write) | |
9086 | { | |
9087 | for (i = 0; i < idesc->num_outputs; i++) | |
9088 | { | |
9089 | if (idesc->operands[i] == IA64_OPND_P1 | |
9090 | || idesc->operands[i] == IA64_OPND_P2) | |
9091 | { | |
9092 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 9093 | if (regno >= 16 && regno < 63) |
542d6675 KH |
9094 | { |
9095 | specs[count] = tmpl; | |
9096 | specs[count++].index = regno; | |
9097 | } | |
9098 | } | |
9099 | } | |
9100 | } | |
9101 | else | |
9102 | { | |
9103 | UNHANDLED; | |
9104 | } | |
9105 | } | |
800eeca4 | 9106 | else if (note == 12) |
542d6675 | 9107 | { |
139368c9 | 9108 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9109 | { |
9110 | specs[count] = tmpl; | |
9111 | specs[count++].index = CURR_SLOT.qp_regno; | |
9112 | } | |
9113 | } | |
800eeca4 | 9114 | else if (note == 1) |
542d6675 KH |
9115 | { |
9116 | if (rsrc_write) | |
9117 | { | |
9118 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
9119 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9120 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9121 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9122 | |
542d6675 KH |
9123 | if ((idesc->operands[0] == IA64_OPND_P1 |
9124 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 9125 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
9126 | { |
9127 | specs[count] = tmpl; | |
4a4f25cf | 9128 | specs[count].cmp_type = |
7484b8e6 | 9129 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
9130 | specs[count++].index = p1; |
9131 | } | |
9132 | if ((idesc->operands[1] == IA64_OPND_P1 | |
9133 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 9134 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
9135 | { |
9136 | specs[count] = tmpl; | |
4a4f25cf | 9137 | specs[count].cmp_type = |
7484b8e6 | 9138 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
9139 | specs[count++].index = p2; |
9140 | } | |
9141 | } | |
9142 | else | |
9143 | { | |
139368c9 | 9144 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9145 | { |
9146 | specs[count] = tmpl; | |
9147 | specs[count++].index = CURR_SLOT.qp_regno; | |
9148 | } | |
9149 | if (idesc->operands[1] == IA64_OPND_PR) | |
9150 | { | |
139368c9 | 9151 | for (i = 16; i < 63; i++) |
542d6675 KH |
9152 | { |
9153 | specs[count] = tmpl; | |
9154 | specs[count++].index = i; | |
9155 | } | |
9156 | } | |
9157 | } | |
9158 | } | |
197865e8 | 9159 | else |
542d6675 KH |
9160 | { |
9161 | UNHANDLED; | |
9162 | } | |
800eeca4 JW |
9163 | break; |
9164 | ||
9165 | case IA64_RS_PSR: | |
197865e8 | 9166 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 9167 | dep->regindex. */ |
800eeca4 | 9168 | if (note == 0) |
542d6675 KH |
9169 | { |
9170 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
9171 | { | |
9172 | if (dep->regindex < 6) | |
9173 | { | |
9174 | specs[count++] = tmpl; | |
9175 | } | |
9176 | } | |
9177 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
9178 | { | |
9179 | if (dep->regindex < 32 | |
9180 | || dep->regindex == 35 | |
9181 | || dep->regindex == 36 | |
9182 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
9183 | { | |
9184 | specs[count++] = tmpl; | |
9185 | } | |
9186 | } | |
9187 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
9188 | { | |
9189 | if (dep->regindex < 32 | |
9190 | || dep->regindex == 35 | |
9191 | || dep->regindex == 36 | |
9192 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
9193 | { | |
9194 | specs[count++] = tmpl; | |
9195 | } | |
9196 | } | |
9197 | else | |
9198 | { | |
9199 | /* Several PSR bits have very specific dependencies. */ | |
9200 | switch (dep->regindex) | |
9201 | { | |
9202 | default: | |
9203 | specs[count++] = tmpl; | |
9204 | break; | |
9205 | case PSR_IC: | |
9206 | if (rsrc_write) | |
9207 | { | |
9208 | specs[count++] = tmpl; | |
9209 | } | |
9210 | else | |
9211 | { | |
9212 | /* Only certain CR accesses use PSR.ic */ | |
9213 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9214 | || idesc->operands[1] == IA64_OPND_CR3) | |
9215 | { | |
9216 | int index = | |
9217 | ((idesc->operands[0] == IA64_OPND_CR3) | |
9218 | ? 0 : 1); | |
9219 | int regno = | |
9220 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
9221 | ||
9222 | switch (regno) | |
9223 | { | |
9224 | default: | |
9225 | break; | |
9226 | case CR_ITIR: | |
9227 | case CR_IFS: | |
9228 | case CR_IIM: | |
9229 | case CR_IIP: | |
9230 | case CR_IPSR: | |
9231 | case CR_ISR: | |
9232 | case CR_IFA: | |
9233 | case CR_IHA: | |
9234 | case CR_IIPA: | |
9235 | specs[count++] = tmpl; | |
9236 | break; | |
9237 | } | |
9238 | } | |
9239 | } | |
9240 | break; | |
9241 | case PSR_CPL: | |
9242 | if (rsrc_write) | |
9243 | { | |
9244 | specs[count++] = tmpl; | |
9245 | } | |
9246 | else | |
9247 | { | |
9248 | /* Only some AR accesses use cpl */ | |
9249 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9250 | || idesc->operands[1] == IA64_OPND_AR3) | |
9251 | { | |
9252 | int index = | |
9253 | ((idesc->operands[0] == IA64_OPND_AR3) | |
9254 | ? 0 : 1); | |
9255 | int regno = | |
9256 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
9257 | ||
9258 | if (regno == AR_ITC | |
9259 | || (index == 0 | |
9260 | && (regno == AR_ITC | |
9261 | || regno == AR_RSC | |
9262 | || (regno >= AR_K0 | |
9263 | && regno <= AR_K7)))) | |
9264 | { | |
9265 | specs[count++] = tmpl; | |
9266 | } | |
9267 | } | |
9268 | else | |
9269 | { | |
9270 | specs[count++] = tmpl; | |
9271 | } | |
9272 | break; | |
9273 | } | |
9274 | } | |
9275 | } | |
9276 | } | |
800eeca4 | 9277 | else if (note == 7) |
542d6675 KH |
9278 | { |
9279 | valueT mask = 0; | |
9280 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9281 | { | |
9282 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9283 | } | |
9284 | else | |
9285 | { | |
9286 | UNHANDLED; | |
9287 | } | |
9288 | if (mask & ((valueT) 1 << dep->regindex)) | |
9289 | { | |
9290 | specs[count++] = tmpl; | |
9291 | } | |
9292 | } | |
800eeca4 | 9293 | else if (note == 8) |
542d6675 KH |
9294 | { |
9295 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9296 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9297 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9298 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9299 | { | |
9300 | if (idesc->operands[i] == IA64_OPND_F1 | |
9301 | || idesc->operands[i] == IA64_OPND_F2 | |
9302 | || idesc->operands[i] == IA64_OPND_F3 | |
9303 | || idesc->operands[i] == IA64_OPND_F4) | |
9304 | { | |
9305 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9306 | if (reg >= min && reg <= max) | |
9307 | { | |
9308 | specs[count++] = tmpl; | |
9309 | } | |
9310 | } | |
9311 | } | |
9312 | } | |
800eeca4 | 9313 | else if (note == 9) |
542d6675 KH |
9314 | { |
9315 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9316 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9317 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9318 | FR2-31 */ | |
9319 | for (i = 0; i < idesc->num_outputs; i++) | |
9320 | { | |
9321 | if (idesc->operands[i] == IA64_OPND_F1) | |
9322 | { | |
9323 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9324 | if (reg >= min && reg <= max) | |
9325 | { | |
9326 | specs[count++] = tmpl; | |
9327 | } | |
9328 | } | |
9329 | } | |
9330 | } | |
800eeca4 | 9331 | else if (note == 10) |
542d6675 KH |
9332 | { |
9333 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9334 | { | |
9335 | if (idesc->operands[i] == IA64_OPND_R1 | |
9336 | || idesc->operands[i] == IA64_OPND_R2 | |
9337 | || idesc->operands[i] == IA64_OPND_R3) | |
9338 | { | |
9339 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9340 | if (regno >= 16 && regno <= 31) | |
9341 | { | |
9342 | specs[count++] = tmpl; | |
9343 | } | |
9344 | } | |
9345 | } | |
9346 | } | |
800eeca4 | 9347 | else |
542d6675 KH |
9348 | { |
9349 | UNHANDLED; | |
9350 | } | |
800eeca4 JW |
9351 | break; |
9352 | ||
9353 | case IA64_RS_AR_FPSR: | |
9354 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9355 | { |
9356 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9357 | if (regno == AR_FPSR) | |
9358 | { | |
9359 | specs[count++] = tmpl; | |
9360 | } | |
9361 | } | |
800eeca4 | 9362 | else |
542d6675 KH |
9363 | { |
9364 | specs[count++] = tmpl; | |
9365 | } | |
800eeca4 JW |
9366 | break; |
9367 | ||
197865e8 | 9368 | case IA64_RS_ARX: |
800eeca4 JW |
9369 | /* Handle all AR[REG] resources */ |
9370 | if (note == 0 || note == 1) | |
542d6675 KH |
9371 | { |
9372 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9373 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9374 | && regno == dep->regindex) | |
9375 | { | |
9376 | specs[count++] = tmpl; | |
9377 | } | |
9378 | /* other AR[REG] resources may be affected by AR accesses */ | |
9379 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9380 | { | |
9381 | /* AR[] writes */ | |
9382 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9383 | switch (dep->regindex) | |
9384 | { | |
9385 | default: | |
9386 | break; | |
9387 | case AR_BSP: | |
9388 | case AR_RNAT: | |
9389 | if (regno == AR_BSPSTORE) | |
9390 | { | |
9391 | specs[count++] = tmpl; | |
9392 | } | |
9393 | case AR_RSC: | |
9394 | if (!rsrc_write && | |
9395 | (regno == AR_BSPSTORE | |
9396 | || regno == AR_RNAT)) | |
9397 | { | |
9398 | specs[count++] = tmpl; | |
9399 | } | |
9400 | break; | |
9401 | } | |
9402 | } | |
9403 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9404 | { | |
9405 | /* AR[] reads */ | |
9406 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9407 | switch (dep->regindex) | |
9408 | { | |
9409 | default: | |
9410 | break; | |
9411 | case AR_RSC: | |
9412 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9413 | { | |
9414 | specs[count++] = tmpl; | |
9415 | } | |
9416 | break; | |
9417 | } | |
9418 | } | |
9419 | else | |
9420 | { | |
9421 | specs[count++] = tmpl; | |
9422 | } | |
9423 | } | |
800eeca4 | 9424 | else |
542d6675 KH |
9425 | { |
9426 | UNHANDLED; | |
9427 | } | |
800eeca4 JW |
9428 | break; |
9429 | ||
9430 | case IA64_RS_CRX: | |
7f3dfb9c L |
9431 | /* Handle all CR[REG] resources. |
9432 | ??? FIXME: The rule 17 isn't really handled correctly. */ | |
9433 | if (note == 0 || note == 1 || note == 17) | |
542d6675 KH |
9434 | { |
9435 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9436 | { | |
9437 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9438 | if (regno == dep->regindex) | |
9439 | { | |
9440 | specs[count++] = tmpl; | |
9441 | } | |
9442 | else if (!rsrc_write) | |
9443 | { | |
9444 | /* Reads from CR[IVR] affect other resources. */ | |
9445 | if (regno == CR_IVR) | |
9446 | { | |
9447 | if ((dep->regindex >= CR_IRR0 | |
9448 | && dep->regindex <= CR_IRR3) | |
9449 | || dep->regindex == CR_TPR) | |
9450 | { | |
9451 | specs[count++] = tmpl; | |
9452 | } | |
9453 | } | |
9454 | } | |
9455 | } | |
9456 | else | |
9457 | { | |
9458 | specs[count++] = tmpl; | |
9459 | } | |
9460 | } | |
800eeca4 | 9461 | else |
542d6675 KH |
9462 | { |
9463 | UNHANDLED; | |
9464 | } | |
800eeca4 JW |
9465 | break; |
9466 | ||
9467 | case IA64_RS_INSERVICE: | |
9468 | /* look for write of EOI (67) or read of IVR (65) */ | |
9469 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9470 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9471 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9472 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9473 | { | |
9474 | specs[count++] = tmpl; | |
9475 | } | |
800eeca4 JW |
9476 | break; |
9477 | ||
9478 | case IA64_RS_GR0: | |
9479 | if (note == 1) | |
542d6675 KH |
9480 | { |
9481 | specs[count++] = tmpl; | |
9482 | } | |
800eeca4 | 9483 | else |
542d6675 KH |
9484 | { |
9485 | UNHANDLED; | |
9486 | } | |
800eeca4 JW |
9487 | break; |
9488 | ||
9489 | case IA64_RS_CFM: | |
9490 | if (note != 2) | |
542d6675 KH |
9491 | { |
9492 | specs[count++] = tmpl; | |
9493 | } | |
800eeca4 | 9494 | else |
542d6675 KH |
9495 | { |
9496 | /* Check if any of the registers accessed are in the rotating region. | |
9497 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9498 | region */ | |
9499 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9500 | { | |
9501 | if (idesc->operands[i] == IA64_OPND_R1 | |
9502 | || idesc->operands[i] == IA64_OPND_R2 | |
9503 | || idesc->operands[i] == IA64_OPND_R3) | |
9504 | { | |
9505 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9506 | /* Assumes that md.rot.num_regs is always valid */ | |
9507 | if (md.rot.num_regs > 0 | |
9508 | && num > 31 | |
9509 | && num < 31 + md.rot.num_regs) | |
9510 | { | |
9511 | specs[count] = tmpl; | |
9512 | specs[count++].specific = 0; | |
9513 | } | |
9514 | } | |
9515 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9516 | || idesc->operands[i] == IA64_OPND_F2 | |
9517 | || idesc->operands[i] == IA64_OPND_F3 | |
9518 | || idesc->operands[i] == IA64_OPND_F4) | |
9519 | { | |
9520 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9521 | if (num > 31) | |
9522 | { | |
9523 | specs[count] = tmpl; | |
9524 | specs[count++].specific = 0; | |
9525 | } | |
9526 | } | |
9527 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9528 | || idesc->operands[i] == IA64_OPND_P2) | |
9529 | { | |
9530 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9531 | if (num > 15) | |
9532 | { | |
9533 | specs[count] = tmpl; | |
9534 | specs[count++].specific = 0; | |
9535 | } | |
9536 | } | |
9537 | } | |
9538 | if (CURR_SLOT.qp_regno > 15) | |
9539 | { | |
9540 | specs[count] = tmpl; | |
9541 | specs[count++].specific = 0; | |
9542 | } | |
9543 | } | |
800eeca4 JW |
9544 | break; |
9545 | ||
139368c9 JW |
9546 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9547 | the fact that there is only one register. */ | |
800eeca4 JW |
9548 | case IA64_RS_PR63: |
9549 | if (note == 0) | |
542d6675 KH |
9550 | { |
9551 | specs[count++] = tmpl; | |
9552 | } | |
139368c9 | 9553 | else if (note == 7) |
40449e9f KH |
9554 | { |
9555 | valueT mask = 0; | |
9556 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9557 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9558 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9559 | specs[count++] = tmpl; |
40449e9f | 9560 | } |
800eeca4 | 9561 | else if (note == 11) |
542d6675 KH |
9562 | { |
9563 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9564 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9565 | || (idesc->operands[1] == IA64_OPND_P2 | |
9566 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9567 | { | |
9568 | specs[count++] = tmpl; | |
9569 | } | |
9570 | } | |
800eeca4 | 9571 | else if (note == 12) |
542d6675 KH |
9572 | { |
9573 | if (CURR_SLOT.qp_regno == 63) | |
9574 | { | |
9575 | specs[count++] = tmpl; | |
9576 | } | |
9577 | } | |
800eeca4 | 9578 | else if (note == 1) |
542d6675 KH |
9579 | { |
9580 | if (rsrc_write) | |
9581 | { | |
40449e9f KH |
9582 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9583 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9584 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9585 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9586 | |
4a4f25cf | 9587 | if (p1 == 63 |
7484b8e6 TW |
9588 | && (idesc->operands[0] == IA64_OPND_P1 |
9589 | || idesc->operands[0] == IA64_OPND_P2)) | |
9590 | { | |
40449e9f | 9591 | specs[count] = tmpl; |
4a4f25cf | 9592 | specs[count++].cmp_type = |
7484b8e6 TW |
9593 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9594 | } | |
9595 | if (p2 == 63 | |
9596 | && (idesc->operands[1] == IA64_OPND_P1 | |
9597 | || idesc->operands[1] == IA64_OPND_P2)) | |
9598 | { | |
40449e9f | 9599 | specs[count] = tmpl; |
4a4f25cf | 9600 | specs[count++].cmp_type = |
7484b8e6 TW |
9601 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9602 | } | |
542d6675 KH |
9603 | } |
9604 | else | |
9605 | { | |
9606 | if (CURR_SLOT.qp_regno == 63) | |
9607 | { | |
9608 | specs[count++] = tmpl; | |
9609 | } | |
9610 | } | |
9611 | } | |
800eeca4 | 9612 | else |
542d6675 KH |
9613 | { |
9614 | UNHANDLED; | |
9615 | } | |
800eeca4 JW |
9616 | break; |
9617 | ||
9618 | case IA64_RS_RSE: | |
9619 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9620 | read resources have not yet been completely identified, so for now |
9621 | treat RSE as a single resource */ | |
800eeca4 | 9622 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9623 | { |
9624 | if (rsrc_write) | |
9625 | { | |
9626 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9627 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9628 | { | |
a66d2bb7 | 9629 | specs[count++] = tmpl; |
542d6675 KH |
9630 | } |
9631 | } | |
9632 | else | |
9633 | { | |
9634 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9635 | { | |
9636 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9637 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9638 | { | |
9639 | specs[count++] = tmpl; | |
9640 | } | |
9641 | } | |
9642 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9643 | { | |
9644 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9645 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9646 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9647 | { | |
9648 | specs[count++] = tmpl; | |
9649 | } | |
9650 | } | |
9651 | } | |
9652 | } | |
197865e8 | 9653 | else |
542d6675 KH |
9654 | { |
9655 | specs[count++] = tmpl; | |
9656 | } | |
800eeca4 JW |
9657 | break; |
9658 | ||
9659 | case IA64_RS_ANY: | |
9660 | /* FIXME -- do any of these need to be non-specific? */ | |
9661 | specs[count++] = tmpl; | |
9662 | break; | |
9663 | ||
9664 | default: | |
9665 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9666 | break; | |
9667 | } | |
9668 | ||
9669 | return count; | |
9670 | } | |
9671 | ||
9672 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9673 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9674 | ||
800eeca4 JW |
9675 | static void |
9676 | clear_qp_branch_flag (mask) | |
542d6675 | 9677 | valueT mask; |
800eeca4 JW |
9678 | { |
9679 | int i; | |
542d6675 | 9680 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9681 | { |
197865e8 | 9682 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9683 | if ((bit & mask) != 0) |
542d6675 KH |
9684 | { |
9685 | regdeps[i].link_to_qp_branch = 0; | |
9686 | } | |
800eeca4 JW |
9687 | } |
9688 | } | |
9689 | ||
5e2f6673 L |
9690 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9691 | any mutexes which contain one of the PRs and create new ones when | |
9692 | needed. */ | |
9693 | ||
9694 | static int | |
9695 | update_qp_mutex (valueT mask) | |
9696 | { | |
9697 | int i; | |
9698 | int add = 0; | |
9699 | ||
9700 | i = 0; | |
9701 | while (i < qp_mutexeslen) | |
9702 | { | |
9703 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9704 | { | |
9705 | /* If it destroys and creates the same mutex, do nothing. */ | |
9706 | if (qp_mutexes[i].prmask == mask | |
9707 | && qp_mutexes[i].path == md.path) | |
9708 | { | |
9709 | i++; | |
9710 | add = -1; | |
9711 | } | |
9712 | else | |
9713 | { | |
9714 | int keep = 0; | |
9715 | ||
9716 | if (md.debug_dv) | |
9717 | { | |
9718 | fprintf (stderr, " Clearing mutex relation"); | |
9719 | print_prmask (qp_mutexes[i].prmask); | |
9720 | fprintf (stderr, "\n"); | |
9721 | } | |
9722 | ||
9723 | /* Deal with the old mutex with more than 3+ PRs only if | |
9724 | the new mutex on the same execution path with it. | |
9725 | ||
9726 | FIXME: The 3+ mutex support is incomplete. | |
9727 | dot_pred_rel () may be a better place to fix it. */ | |
9728 | if (qp_mutexes[i].path == md.path) | |
9729 | { | |
9730 | /* If it is a proper subset of the mutex, create a | |
9731 | new mutex. */ | |
9732 | if (add == 0 | |
9733 | && (qp_mutexes[i].prmask & mask) == mask) | |
9734 | add = 1; | |
9735 | ||
9736 | qp_mutexes[i].prmask &= ~mask; | |
9737 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9738 | { | |
9739 | /* Modify the mutex if there are more than one | |
9740 | PR left. */ | |
9741 | keep = 1; | |
9742 | i++; | |
9743 | } | |
9744 | } | |
9745 | ||
9746 | if (keep == 0) | |
9747 | /* Remove the mutex. */ | |
9748 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9749 | } | |
9750 | } | |
9751 | else | |
9752 | ++i; | |
9753 | } | |
9754 | ||
9755 | if (add == 1) | |
9756 | add_qp_mutex (mask); | |
9757 | ||
9758 | return add; | |
9759 | } | |
9760 | ||
197865e8 | 9761 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9762 | |
542d6675 KH |
9763 | Any changes to a PR clears the mutex relations which include that PR. */ |
9764 | ||
800eeca4 JW |
9765 | static void |
9766 | clear_qp_mutex (mask) | |
542d6675 | 9767 | valueT mask; |
800eeca4 JW |
9768 | { |
9769 | int i; | |
9770 | ||
9771 | i = 0; | |
9772 | while (i < qp_mutexeslen) | |
9773 | { | |
9774 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9775 | { |
9776 | if (md.debug_dv) | |
9777 | { | |
9778 | fprintf (stderr, " Clearing mutex relation"); | |
9779 | print_prmask (qp_mutexes[i].prmask); | |
9780 | fprintf (stderr, "\n"); | |
9781 | } | |
9782 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9783 | } | |
800eeca4 | 9784 | else |
542d6675 | 9785 | ++i; |
800eeca4 JW |
9786 | } |
9787 | } | |
9788 | ||
9789 | /* Clear implies relations which contain PRs in the given masks. | |
9790 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9791 | indicates the implied PR. */ |
9792 | ||
800eeca4 JW |
9793 | static void |
9794 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9795 | valueT p1_mask; |
9796 | valueT p2_mask; | |
800eeca4 JW |
9797 | { |
9798 | int i; | |
9799 | ||
9800 | i = 0; | |
9801 | while (i < qp_implieslen) | |
9802 | { | |
197865e8 | 9803 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9804 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9805 | { | |
9806 | if (md.debug_dv) | |
9807 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9808 | qp_implies[i].p1, qp_implies[i].p2); | |
9809 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9810 | } | |
197865e8 | 9811 | else |
542d6675 | 9812 | ++i; |
800eeca4 JW |
9813 | } |
9814 | } | |
9815 | ||
542d6675 KH |
9816 | /* Add the PRs specified to the list of implied relations. */ |
9817 | ||
800eeca4 JW |
9818 | static void |
9819 | add_qp_imply (p1, p2) | |
542d6675 | 9820 | int p1, p2; |
800eeca4 JW |
9821 | { |
9822 | valueT mask; | |
9823 | valueT bit; | |
9824 | int i; | |
9825 | ||
542d6675 | 9826 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9827 | if (p1 == 0 || p2 == 0) |
9828 | abort (); | |
9829 | ||
9830 | if (p1 == p2) | |
9831 | return; | |
9832 | ||
542d6675 KH |
9833 | /* If it exists already, ignore it. */ |
9834 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9835 | { |
197865e8 | 9836 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9837 | && qp_implies[i].p2 == p2 |
9838 | && qp_implies[i].path == md.path | |
9839 | && !qp_implies[i].p2_branched) | |
9840 | return; | |
800eeca4 JW |
9841 | } |
9842 | ||
9843 | if (qp_implieslen == qp_impliestotlen) | |
9844 | { | |
9845 | qp_impliestotlen += 20; | |
9846 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9847 | xrealloc ((void *) qp_implies, |
9848 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9849 | } |
9850 | if (md.debug_dv) | |
9851 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9852 | qp_implies[qp_implieslen].p1 = p1; | |
9853 | qp_implies[qp_implieslen].p2 = p2; | |
9854 | qp_implies[qp_implieslen].path = md.path; | |
9855 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9856 | ||
9857 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9858 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9859 | as well. */ |
542d6675 | 9860 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9861 | { |
9862 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9863 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9864 | if (qp_implies[i].p2 == p1) |
542d6675 | 9865 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9866 | } |
9867 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9868 | relation containing p2, duplicate it and replace p2 with p1. */ |
9869 | bit = (valueT) 1 << p1; | |
9870 | mask = (valueT) 1 << p2; | |
542d6675 | 9871 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9872 | { |
9873 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9874 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9875 | } |
9876 | } | |
9877 | ||
800eeca4 JW |
9878 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9879 | one of the PRs can be true at any time. PR0 should never be included in | |
9880 | the mask. */ | |
542d6675 | 9881 | |
800eeca4 JW |
9882 | static void |
9883 | add_qp_mutex (mask) | |
542d6675 | 9884 | valueT mask; |
800eeca4 JW |
9885 | { |
9886 | if (mask & 0x1) | |
9887 | abort (); | |
9888 | ||
9889 | if (qp_mutexeslen == qp_mutexestotlen) | |
9890 | { | |
9891 | qp_mutexestotlen += 20; | |
9892 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9893 | xrealloc ((void *) qp_mutexes, |
9894 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9895 | } |
9896 | if (md.debug_dv) | |
9897 | { | |
9898 | fprintf (stderr, " Registering mutex on"); | |
9899 | print_prmask (mask); | |
9900 | fprintf (stderr, "\n"); | |
9901 | } | |
9902 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9903 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9904 | } | |
9905 | ||
cb5301b6 RH |
9906 | static int |
9907 | has_suffix_p (name, suffix) | |
40449e9f KH |
9908 | const char *name; |
9909 | const char *suffix; | |
cb5301b6 RH |
9910 | { |
9911 | size_t namelen = strlen (name); | |
9912 | size_t sufflen = strlen (suffix); | |
9913 | ||
9914 | if (namelen <= sufflen) | |
9915 | return 0; | |
9916 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9917 | } | |
9918 | ||
800eeca4 JW |
9919 | static void |
9920 | clear_register_values () | |
9921 | { | |
9922 | int i; | |
9923 | if (md.debug_dv) | |
9924 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9925 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9926 | gr_values[i].known = 0; |
9927 | } | |
9928 | ||
9929 | /* Keep track of register values/changes which affect DV tracking. | |
9930 | ||
9931 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9932 | have to examine a group of strings to identify them. */ |
800eeca4 | 9933 | |
800eeca4 JW |
9934 | static void |
9935 | note_register_values (idesc) | |
542d6675 | 9936 | struct ia64_opcode *idesc; |
800eeca4 JW |
9937 | { |
9938 | valueT qp_changemask = 0; | |
9939 | int i; | |
9940 | ||
542d6675 KH |
9941 | /* Invalidate values for registers being written to. */ |
9942 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9943 | { |
197865e8 | 9944 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9945 | || idesc->operands[i] == IA64_OPND_R2 |
9946 | || idesc->operands[i] == IA64_OPND_R3) | |
9947 | { | |
9948 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9949 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9950 | gr_values[regno].known = 0; | |
9951 | } | |
50b81f19 JW |
9952 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9953 | { | |
9954 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9955 | if (regno > 0 && regno < 4) | |
9956 | gr_values[regno].known = 0; | |
9957 | } | |
197865e8 | 9958 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9959 | || idesc->operands[i] == IA64_OPND_P2) |
9960 | { | |
9961 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9962 | qp_changemask |= (valueT) 1 << regno; | |
9963 | } | |
800eeca4 | 9964 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9965 | { |
9966 | if (idesc->operands[2] & (valueT) 0x10000) | |
9967 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9968 | else | |
9969 | qp_changemask = idesc->operands[2]; | |
9970 | break; | |
9971 | } | |
800eeca4 | 9972 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9973 | { |
9974 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9975 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9976 | else |
9977 | qp_changemask = idesc->operands[1]; | |
9978 | qp_changemask &= ~(valueT) 0xFFFF; | |
9979 | break; | |
9980 | } | |
9981 | } | |
9982 | ||
9983 | /* Always clear qp branch flags on any PR change. */ | |
9984 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9985 | clear_qp_branch_flag (qp_changemask); |
9986 | ||
542d6675 | 9987 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9988 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9989 | { | |
197865e8 | 9990 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9991 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9992 | { |
9993 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9994 | gr_values[i].known = 0; | |
9995 | } | |
800eeca4 JW |
9996 | clear_qp_mutex (qp_changemask); |
9997 | clear_qp_implies (qp_changemask, qp_changemask); | |
9998 | } | |
542d6675 KH |
9999 | /* After a call, all register values are undefined, except those marked |
10000 | as "safe". */ | |
800eeca4 | 10001 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 10002 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 10003 | { |
56d27c17 | 10004 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
10005 | clear_register_values (); |
10006 | clear_qp_mutex (~qp_safe_across_calls); | |
10007 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
10008 | clear_qp_branch_flag (~qp_safe_across_calls); | |
10009 | } | |
e9718fe1 | 10010 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 10011 | || is_taken_branch (idesc)) |
e9718fe1 TW |
10012 | { |
10013 | clear_register_values (); | |
197865e8 KH |
10014 | clear_qp_mutex (~(valueT) 0); |
10015 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 10016 | } |
542d6675 | 10017 | /* Look for mutex and implies relations. */ |
197865e8 | 10018 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
10019 | || idesc->operands[0] == IA64_OPND_P2) |
10020 | && (idesc->operands[1] == IA64_OPND_P1 | |
10021 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
10022 | { |
10023 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 10024 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
10025 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
10026 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 10027 | |
5e2f6673 L |
10028 | /* If both PRs are PR0, we can't really do anything. */ |
10029 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
10030 | { |
10031 | if (md.debug_dv) | |
10032 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
10033 | } | |
800eeca4 | 10034 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 10035 | with the following exceptions. */ |
cb5301b6 RH |
10036 | else if (has_suffix_p (idesc->name, ".or.andcm") |
10037 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 10038 | { |
542d6675 KH |
10039 | clear_qp_implies (p2mask, p1mask); |
10040 | } | |
cb5301b6 RH |
10041 | else if (has_suffix_p (idesc->name, ".andcm") |
10042 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
10043 | { |
10044 | clear_qp_implies (0, p1mask | p2mask); | |
10045 | } | |
cb5301b6 RH |
10046 | else if (has_suffix_p (idesc->name, ".orcm") |
10047 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
10048 | { |
10049 | clear_qp_mutex (p1mask | p2mask); | |
10050 | clear_qp_implies (p1mask | p2mask, 0); | |
10051 | } | |
800eeca4 | 10052 | else |
542d6675 | 10053 | { |
5e2f6673 L |
10054 | int added = 0; |
10055 | ||
542d6675 | 10056 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
10057 | |
10058 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
10059 | if (p1 == 0 || p2 == 0) | |
10060 | clear_qp_mutex (p1mask | p2mask); | |
10061 | else | |
10062 | added = update_qp_mutex (p1mask | p2mask); | |
10063 | ||
10064 | if (CURR_SLOT.qp_regno == 0 | |
10065 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 10066 | { |
5e2f6673 L |
10067 | if (added == 0 && p1 && p2) |
10068 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
10069 | if (CURR_SLOT.qp_regno != 0) |
10070 | { | |
5e2f6673 L |
10071 | if (p1) |
10072 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
10073 | if (p2) | |
10074 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
10075 | } |
10076 | } | |
542d6675 KH |
10077 | } |
10078 | } | |
10079 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 10080 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
10081 | && (idesc->operands[1] == IA64_OPND_IMM22 |
10082 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 10083 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
10084 | && (strcmp (idesc->name, "mov") == 0 |
10085 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
10086 | { |
10087 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
10088 | if (regno > 0 && regno < NELEMS (gr_values)) |
10089 | { | |
10090 | gr_values[regno].known = 1; | |
10091 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
10092 | gr_values[regno].path = md.path; | |
10093 | if (md.debug_dv) | |
2434f565 JW |
10094 | { |
10095 | fprintf (stderr, " Know gr%d = ", regno); | |
10096 | fprintf_vma (stderr, gr_values[regno].value); | |
10097 | fputs ("\n", stderr); | |
10098 | } | |
542d6675 | 10099 | } |
800eeca4 | 10100 | } |
a66d2bb7 JB |
10101 | /* Look for dep.z imm insns. */ |
10102 | else if (idesc->operands[0] == IA64_OPND_R1 | |
10103 | && idesc->operands[1] == IA64_OPND_IMM8 | |
10104 | && strcmp (idesc->name, "dep.z") == 0) | |
10105 | { | |
10106 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
10107 | if (regno > 0 && regno < NELEMS (gr_values)) | |
10108 | { | |
10109 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
10110 | ||
10111 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
10112 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
10113 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
10114 | gr_values[regno].known = 1; | |
10115 | gr_values[regno].value = value; | |
10116 | gr_values[regno].path = md.path; | |
10117 | if (md.debug_dv) | |
10118 | { | |
10119 | fprintf (stderr, " Know gr%d = ", regno); | |
10120 | fprintf_vma (stderr, gr_values[regno].value); | |
10121 | fputs ("\n", stderr); | |
10122 | } | |
10123 | } | |
10124 | } | |
197865e8 | 10125 | else |
800eeca4 JW |
10126 | { |
10127 | clear_qp_mutex (qp_changemask); | |
10128 | clear_qp_implies (qp_changemask, qp_changemask); | |
10129 | } | |
10130 | } | |
10131 | ||
542d6675 KH |
10132 | /* Return whether the given predicate registers are currently mutex. */ |
10133 | ||
800eeca4 JW |
10134 | static int |
10135 | qp_mutex (p1, p2, path) | |
542d6675 KH |
10136 | int p1; |
10137 | int p2; | |
10138 | int path; | |
800eeca4 JW |
10139 | { |
10140 | int i; | |
10141 | valueT mask; | |
10142 | ||
10143 | if (p1 != p2) | |
10144 | { | |
542d6675 KH |
10145 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
10146 | for (i = 0; i < qp_mutexeslen; i++) | |
10147 | { | |
10148 | if (qp_mutexes[i].path >= path | |
10149 | && (qp_mutexes[i].prmask & mask) == mask) | |
10150 | return 1; | |
10151 | } | |
800eeca4 JW |
10152 | } |
10153 | return 0; | |
10154 | } | |
10155 | ||
10156 | /* Return whether the given resource is in the given insn's list of chks | |
10157 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
10158 | conflict. */ |
10159 | ||
800eeca4 JW |
10160 | static int |
10161 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
10162 | struct rsrc *rs; |
10163 | struct ia64_opcode *idesc; | |
10164 | int note; | |
10165 | int qp_regno; | |
10166 | int path; | |
800eeca4 JW |
10167 | { |
10168 | struct rsrc specs[MAX_SPECS]; | |
10169 | int count; | |
10170 | ||
10171 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
10172 | we don't need to check. One exception is note 11, which indicates that | |
10173 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 10174 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
10175 | && note != 11) |
10176 | return 0; | |
10177 | ||
10178 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
10179 | while (count-- > 0) | |
10180 | { | |
10181 | /* UNAT checking is a bit more specific than other resources */ | |
10182 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
10183 | && specs[count].mem_offset.hint |
10184 | && rs->mem_offset.hint) | |
10185 | { | |
10186 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
10187 | { | |
10188 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
10189 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
10190 | return 1; | |
10191 | else | |
10192 | continue; | |
10193 | } | |
10194 | } | |
800eeca4 | 10195 | |
7484b8e6 | 10196 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 10197 | writes are an OR. */ |
7484b8e6 | 10198 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 10199 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
10200 | || rs->dependency->specifier == IA64_RS_PR63) |
10201 | { | |
10202 | if (specs[count].cmp_type != CMP_NONE | |
10203 | && specs[count].cmp_type == rs->cmp_type) | |
10204 | { | |
10205 | if (md.debug_dv) | |
10206 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10207 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10208 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10209 | specs[count].index : 63); |
10210 | continue; | |
10211 | } | |
10212 | if (md.debug_dv) | |
4a4f25cf | 10213 | fprintf (stderr, |
7484b8e6 TW |
10214 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10215 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10216 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10217 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10218 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10219 | specs[count].index : 63); |
4a4f25cf | 10220 | |
7484b8e6 TW |
10221 | } |
10222 | ||
800eeca4 | 10223 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10224 | */ |
800eeca4 | 10225 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10226 | return 2; |
800eeca4 | 10227 | else if (specs[count].index == rs->index) |
542d6675 | 10228 | return 1; |
800eeca4 | 10229 | } |
800eeca4 JW |
10230 | |
10231 | return 0; | |
10232 | } | |
10233 | ||
10234 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10235 | insert a stop to create the break. Update all resource dependencies | |
10236 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10237 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10238 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10239 | instruction. */ |
800eeca4 JW |
10240 | |
10241 | static void | |
10242 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
10243 | int insert_stop; |
10244 | int qp_regno; | |
10245 | int save_current; | |
800eeca4 JW |
10246 | { |
10247 | int i; | |
10248 | ||
10249 | if (insert_stop && md.num_slots_in_use > 0) | |
10250 | PREV_SLOT.end_of_insn_group = 1; | |
10251 | ||
10252 | if (md.debug_dv) | |
10253 | { | |
197865e8 | 10254 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10255 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10256 | if (qp_regno != 0) |
542d6675 | 10257 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10258 | fprintf (stderr, "\n"); |
10259 | } | |
10260 | ||
10261 | i = 0; | |
10262 | while (i < regdepslen) | |
10263 | { | |
10264 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10265 | ||
10266 | if (qp_regno != 0 | |
542d6675 KH |
10267 | && regdeps[i].qp_regno != qp_regno) |
10268 | { | |
10269 | ++i; | |
10270 | continue; | |
10271 | } | |
800eeca4 JW |
10272 | |
10273 | if (save_current | |
542d6675 KH |
10274 | && CURR_SLOT.src_file == regdeps[i].file |
10275 | && CURR_SLOT.src_line == regdeps[i].line) | |
10276 | { | |
10277 | ++i; | |
10278 | continue; | |
10279 | } | |
800eeca4 JW |
10280 | |
10281 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10282 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10283 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10284 | || dep->semantics == IA64_DVS_IMPLIEDF |
10285 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10286 | { | |
10287 | print_dependency ("Removing", i); | |
10288 | regdeps[i] = regdeps[--regdepslen]; | |
10289 | } | |
800eeca4 | 10290 | else |
542d6675 KH |
10291 | { |
10292 | if (dep->semantics == IA64_DVS_DATA | |
10293 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10294 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10295 | { |
10296 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10297 | regdeps[i].insn_srlz = STATE_STOP; | |
10298 | if (regdeps[i].data_srlz == STATE_NONE) | |
10299 | regdeps[i].data_srlz = STATE_STOP; | |
10300 | } | |
10301 | ++i; | |
10302 | } | |
800eeca4 JW |
10303 | } |
10304 | } | |
10305 | ||
542d6675 KH |
10306 | /* Add the given resource usage spec to the list of active dependencies. */ |
10307 | ||
197865e8 | 10308 | static void |
800eeca4 | 10309 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
10310 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
10311 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
10312 | struct rsrc *spec; |
10313 | int depind; | |
10314 | int path; | |
800eeca4 JW |
10315 | { |
10316 | if (regdepslen == regdepstotlen) | |
10317 | { | |
10318 | regdepstotlen += 20; | |
10319 | regdeps = (struct rsrc *) | |
542d6675 | 10320 | xrealloc ((void *) regdeps, |
bc805888 | 10321 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10322 | } |
10323 | ||
10324 | regdeps[regdepslen] = *spec; | |
10325 | regdeps[regdepslen].depind = depind; | |
10326 | regdeps[regdepslen].path = path; | |
10327 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10328 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10329 | ||
10330 | print_dependency ("Adding", regdepslen); | |
10331 | ||
10332 | ++regdepslen; | |
10333 | } | |
10334 | ||
10335 | static void | |
10336 | print_dependency (action, depind) | |
542d6675 KH |
10337 | const char *action; |
10338 | int depind; | |
800eeca4 JW |
10339 | { |
10340 | if (md.debug_dv) | |
10341 | { | |
197865e8 | 10342 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10343 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10344 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10345 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10346 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10347 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10348 | { |
10349 | fputs (" ", stderr); | |
10350 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10351 | fputs ("+", stderr); | |
10352 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10353 | } | |
800eeca4 JW |
10354 | fprintf (stderr, "\n"); |
10355 | } | |
10356 | } | |
10357 | ||
10358 | static void | |
10359 | instruction_serialization () | |
10360 | { | |
10361 | int i; | |
10362 | if (md.debug_dv) | |
10363 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10364 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10365 | if (regdeps[i].insn_srlz == STATE_STOP) |
10366 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10367 | } | |
10368 | ||
10369 | static void | |
10370 | data_serialization () | |
10371 | { | |
10372 | int i = 0; | |
10373 | if (md.debug_dv) | |
10374 | fprintf (stderr, " Data serialization\n"); | |
10375 | while (i < regdepslen) | |
10376 | { | |
10377 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10378 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10379 | data serialization. This might change with new tables */ | |
10380 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10381 | { | |
10382 | print_dependency ("Removing", i); | |
10383 | regdeps[i] = regdeps[--regdepslen]; | |
10384 | } | |
800eeca4 | 10385 | else |
542d6675 | 10386 | ++i; |
800eeca4 JW |
10387 | } |
10388 | } | |
10389 | ||
542d6675 KH |
10390 | /* Insert stops and serializations as needed to avoid DVs. */ |
10391 | ||
800eeca4 JW |
10392 | static void |
10393 | remove_marked_resource (rs) | |
542d6675 | 10394 | struct rsrc *rs; |
800eeca4 JW |
10395 | { |
10396 | switch (rs->dependency->semantics) | |
10397 | { | |
10398 | case IA64_DVS_SPECIFIC: | |
10399 | if (md.debug_dv) | |
10400 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10401 | /* ...fall through... */ |
800eeca4 JW |
10402 | case IA64_DVS_INSTR: |
10403 | if (md.debug_dv) | |
542d6675 | 10404 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10405 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10406 | insn_group_break (1, 0, 0); |
800eeca4 | 10407 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10408 | { |
888a75be | 10409 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10410 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10411 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10412 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10413 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10414 | instruction_serialization (); | |
10415 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10416 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10417 | emit_one_bundle (); | |
888a75be | 10418 | CURR_SLOT = oldslot; |
542d6675 | 10419 | } |
800eeca4 JW |
10420 | insn_group_break (1, 0, 0); |
10421 | break; | |
10422 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10423 | "other" types of DV are eliminated |
10424 | by a data serialization */ | |
800eeca4 JW |
10425 | case IA64_DVS_DATA: |
10426 | if (md.debug_dv) | |
542d6675 | 10427 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10428 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10429 | insn_group_break (1, 0, 0); |
800eeca4 | 10430 | { |
888a75be | 10431 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10432 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10433 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10434 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10435 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10436 | data_serialization (); | |
10437 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10438 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10439 | emit_one_bundle (); | |
888a75be | 10440 | CURR_SLOT = oldslot; |
800eeca4 JW |
10441 | } |
10442 | break; | |
10443 | case IA64_DVS_IMPLIED: | |
10444 | case IA64_DVS_IMPLIEDF: | |
10445 | if (md.debug_dv) | |
542d6675 | 10446 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10447 | insn_group_break (1, 0, 0); |
10448 | break; | |
10449 | default: | |
10450 | break; | |
10451 | } | |
10452 | } | |
10453 | ||
10454 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10455 | list. |
800eeca4 JW |
10456 | |
10457 | The check is run once for each execution path encountered. In this case, | |
10458 | a unique execution path is the sequence of instructions following a code | |
10459 | entry point, e.g. the following has three execution paths, one starting | |
10460 | at L0, one at L1, and one at L2. | |
197865e8 | 10461 | |
800eeca4 JW |
10462 | L0: nop |
10463 | L1: add | |
10464 | L2: add | |
197865e8 | 10465 | br.ret |
800eeca4 | 10466 | */ |
542d6675 | 10467 | |
800eeca4 JW |
10468 | static void |
10469 | check_dependencies (idesc) | |
542d6675 | 10470 | struct ia64_opcode *idesc; |
800eeca4 JW |
10471 | { |
10472 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10473 | int path; | |
10474 | int i; | |
10475 | ||
10476 | /* Note that the number of marked resources may change within the | |
197865e8 | 10477 | loop if in auto mode. */ |
800eeca4 JW |
10478 | i = 0; |
10479 | while (i < regdepslen) | |
10480 | { | |
10481 | struct rsrc *rs = ®deps[i]; | |
10482 | const struct ia64_dependency *dep = rs->dependency; | |
10483 | int chkind; | |
10484 | int note; | |
10485 | int start_over = 0; | |
10486 | ||
10487 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10488 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10489 | { | |
10490 | ++i; | |
10491 | continue; | |
10492 | } | |
10493 | ||
10494 | note = NOTE (opdeps->chks[chkind]); | |
10495 | ||
10496 | /* Check this resource against each execution path seen thus far. */ | |
10497 | for (path = 0; path <= md.path; path++) | |
10498 | { | |
10499 | int matchtype; | |
10500 | ||
10501 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10502 | if (rs->path < path) | |
10503 | continue; | |
10504 | ||
10505 | /* If the QP for this insn implies a QP which has branched, don't | |
10506 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10507 | useful; what's the point of generating code which will only be | |
10508 | reached if its QP is zero? | |
10509 | This code was specifically inserted to handle the following code, | |
10510 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10511 | ||
10512 | mov r4 = 2 | |
10513 | (p2) br.cond L | |
10514 | (p1) mov r4 = 7 | |
10515 | */ | |
10516 | if (CURR_SLOT.qp_regno != 0) | |
10517 | { | |
10518 | int skip = 0; | |
10519 | int implies; | |
10520 | for (implies = 0; implies < qp_implieslen; implies++) | |
10521 | { | |
10522 | if (qp_implies[implies].path >= path | |
10523 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10524 | && qp_implies[implies].p2_branched) | |
10525 | { | |
10526 | skip = 1; | |
10527 | break; | |
10528 | } | |
10529 | } | |
10530 | if (skip) | |
10531 | continue; | |
10532 | } | |
10533 | ||
10534 | if ((matchtype = resources_match (rs, idesc, note, | |
10535 | CURR_SLOT.qp_regno, path)) != 0) | |
10536 | { | |
10537 | char msg[1024]; | |
10538 | char pathmsg[256] = ""; | |
10539 | char indexmsg[256] = ""; | |
10540 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10541 | ||
10542 | if (path != 0) | |
f9f21a03 L |
10543 | snprintf (pathmsg, sizeof (pathmsg), |
10544 | " when entry is at label '%s'", | |
542d6675 | 10545 | md.entry_labels[path - 1]); |
a66d2bb7 | 10546 | if (matchtype == 1 && rs->index >= 0) |
f9f21a03 L |
10547 | snprintf (indexmsg, sizeof (indexmsg), |
10548 | ", specific resource number is %d", | |
542d6675 | 10549 | rs->index); |
f9f21a03 L |
10550 | snprintf (msg, sizeof (msg), |
10551 | "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
542d6675 KH |
10552 | idesc->name, |
10553 | (certain ? "violates" : "may violate"), | |
10554 | dv_mode[dep->mode], dep->name, | |
10555 | dv_sem[dep->semantics], | |
10556 | pathmsg, indexmsg); | |
10557 | ||
10558 | if (md.explicit_mode) | |
10559 | { | |
10560 | as_warn ("%s", msg); | |
10561 | if (path < md.path) | |
ad4b42b4 | 10562 | as_warn (_("Only the first path encountering the conflict is reported")); |
542d6675 | 10563 | as_warn_where (rs->file, rs->line, |
ad4b42b4 | 10564 | _("This is the location of the conflicting usage")); |
542d6675 KH |
10565 | /* Don't bother checking other paths, to avoid duplicating |
10566 | the same warning */ | |
10567 | break; | |
10568 | } | |
10569 | else | |
10570 | { | |
10571 | if (md.debug_dv) | |
10572 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10573 | ||
10574 | remove_marked_resource (rs); | |
10575 | ||
10576 | /* since the set of dependencies has changed, start over */ | |
10577 | /* FIXME -- since we're removing dvs as we go, we | |
10578 | probably don't really need to start over... */ | |
10579 | start_over = 1; | |
10580 | break; | |
10581 | } | |
10582 | } | |
10583 | } | |
800eeca4 | 10584 | if (start_over) |
542d6675 | 10585 | i = 0; |
800eeca4 | 10586 | else |
542d6675 | 10587 | ++i; |
800eeca4 JW |
10588 | } |
10589 | } | |
10590 | ||
542d6675 KH |
10591 | /* Register new dependencies based on the given opcode. */ |
10592 | ||
800eeca4 JW |
10593 | static void |
10594 | mark_resources (idesc) | |
542d6675 | 10595 | struct ia64_opcode *idesc; |
800eeca4 JW |
10596 | { |
10597 | int i; | |
10598 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10599 | int add_only_qp_reads = 0; | |
10600 | ||
10601 | /* A conditional branch only uses its resources if it is taken; if it is | |
10602 | taken, we stop following that path. The other branch types effectively | |
10603 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10604 | reads. */ |
800eeca4 JW |
10605 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10606 | { | |
10607 | add_only_qp_reads = 1; | |
10608 | } | |
10609 | ||
10610 | if (md.debug_dv) | |
10611 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10612 | ||
542d6675 | 10613 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10614 | { |
10615 | const struct ia64_dependency *dep; | |
10616 | struct rsrc specs[MAX_SPECS]; | |
10617 | int note; | |
10618 | int path; | |
10619 | int count; | |
197865e8 | 10620 | |
800eeca4 | 10621 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10622 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10623 | |
10624 | if (add_only_qp_reads | |
542d6675 KH |
10625 | && !(dep->mode == IA64_DV_WAR |
10626 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10627 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10628 | || dep->specifier == IA64_RS_PR63))) |
10629 | continue; | |
800eeca4 JW |
10630 | |
10631 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10632 | ||
800eeca4 | 10633 | while (count-- > 0) |
542d6675 KH |
10634 | { |
10635 | mark_resource (idesc, dep, &specs[count], | |
10636 | DEP (opdeps->regs[i]), md.path); | |
10637 | } | |
800eeca4 JW |
10638 | |
10639 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10640 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10641 | switch (dep->specifier) |
542d6675 KH |
10642 | { |
10643 | default: | |
10644 | break; | |
10645 | case IA64_RS_CPUID: | |
10646 | case IA64_RS_DBR: | |
10647 | case IA64_RS_IBR: | |
800eeca4 | 10648 | case IA64_RS_MSR: |
542d6675 KH |
10649 | case IA64_RS_PKR: |
10650 | case IA64_RS_PMC: | |
10651 | case IA64_RS_PMD: | |
10652 | case IA64_RS_RR: | |
10653 | for (path = 0; path < md.path; path++) | |
10654 | { | |
10655 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10656 | while (count-- > 0) | |
10657 | mark_resource (idesc, dep, &specs[count], | |
10658 | DEP (opdeps->regs[i]), path); | |
10659 | } | |
10660 | break; | |
10661 | } | |
10662 | } | |
10663 | } | |
10664 | ||
10665 | /* Remove dependencies when they no longer apply. */ | |
10666 | ||
800eeca4 JW |
10667 | static void |
10668 | update_dependencies (idesc) | |
542d6675 | 10669 | struct ia64_opcode *idesc; |
800eeca4 JW |
10670 | { |
10671 | int i; | |
10672 | ||
10673 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10674 | { | |
10675 | instruction_serialization (); | |
10676 | } | |
10677 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10678 | { | |
10679 | data_serialization (); | |
10680 | } | |
10681 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10682 | || is_taken_branch (idesc)) |
800eeca4 | 10683 | { |
542d6675 KH |
10684 | /* Although technically the taken branch doesn't clear dependencies |
10685 | which require a srlz.[id], we don't follow the branch; the next | |
10686 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10687 | regdepslen = 0; |
800eeca4 JW |
10688 | md.path = 0; |
10689 | } | |
10690 | else if (is_conditional_branch (idesc) | |
542d6675 | 10691 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10692 | { |
10693 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10694 | ||
542d6675 KH |
10695 | for (i = 0; i < qp_implieslen; i++) |
10696 | { | |
10697 | /* If the conditional branch's predicate is implied by the predicate | |
10698 | in an existing dependency, remove that dependency. */ | |
10699 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10700 | { | |
10701 | int depind = 0; | |
10702 | /* Note that this implied predicate takes a branch so that if | |
10703 | a later insn generates a DV but its predicate implies this | |
10704 | one, we can avoid the false DV warning. */ | |
10705 | qp_implies[i].p2_branched = 1; | |
10706 | while (depind < regdepslen) | |
10707 | { | |
10708 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10709 | { | |
10710 | print_dependency ("Removing", depind); | |
10711 | regdeps[depind] = regdeps[--regdepslen]; | |
10712 | } | |
10713 | else | |
10714 | ++depind; | |
10715 | } | |
10716 | } | |
10717 | } | |
800eeca4 | 10718 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10719 | cleared, provided that the QP hasn't been modified between the |
10720 | marking instruction and the branch. */ | |
800eeca4 | 10721 | if (is_call) |
542d6675 KH |
10722 | { |
10723 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10724 | } | |
800eeca4 | 10725 | else |
542d6675 KH |
10726 | { |
10727 | i = 0; | |
10728 | while (i < regdepslen) | |
10729 | { | |
10730 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10731 | && regdeps[i].link_to_qp_branch | |
10732 | && (regdeps[i].file != CURR_SLOT.src_file | |
10733 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10734 | { | |
10735 | /* Treat like a taken branch */ | |
10736 | print_dependency ("Removing", i); | |
10737 | regdeps[i] = regdeps[--regdepslen]; | |
10738 | } | |
10739 | else | |
10740 | ++i; | |
10741 | } | |
10742 | } | |
800eeca4 JW |
10743 | } |
10744 | } | |
10745 | ||
10746 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10747 | |
800eeca4 JW |
10748 | static int |
10749 | check_dv (idesc) | |
542d6675 | 10750 | struct ia64_opcode *idesc; |
800eeca4 JW |
10751 | { |
10752 | if (md.debug_dv) | |
10753 | { | |
197865e8 | 10754 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10755 | idesc->name, CURR_SLOT.src_line, |
10756 | idesc->dependencies->nchks, | |
10757 | idesc->dependencies->nregs); | |
800eeca4 JW |
10758 | } |
10759 | ||
197865e8 | 10760 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10761 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10762 | check against the specific resources used. */ |
800eeca4 JW |
10763 | check_dependencies (idesc); |
10764 | ||
542d6675 KH |
10765 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10766 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10767 | mark_resources (idesc); |
10768 | ||
10769 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10770 | requirements for being cleared |
10771 | ||
800eeca4 JW |
10772 | Instruction serialization (insns separated by interruption, rfi, or |
10773 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10774 | ||
10775 | Data serialization (instruction serialization, or writer + srlz.d + | |
10776 | reader, where writer and srlz.d are in separate groups) clears | |
10777 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10778 | always be the case). | |
10779 | ||
10780 | Instruction group break (groups separated by stop, taken branch, | |
10781 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10782 | */ | |
10783 | update_dependencies (idesc); | |
10784 | ||
10785 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10786 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10787 | note_register_values (idesc); |
10788 | ||
197865e8 | 10789 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10790 | md.mem_offset.hint = 0; |
10791 | ||
10792 | return 0; | |
10793 | } | |
10794 | ||
10795 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10796 | here. */ | |
10797 | void | |
10798 | md_assemble (str) | |
10799 | char *str; | |
10800 | { | |
10801 | char *saved_input_line_pointer, *mnemonic; | |
10802 | const struct pseudo_opcode *pdesc; | |
10803 | struct ia64_opcode *idesc; | |
10804 | unsigned char qp_regno; | |
10805 | unsigned int flags; | |
10806 | int ch; | |
10807 | ||
10808 | saved_input_line_pointer = input_line_pointer; | |
10809 | input_line_pointer = str; | |
10810 | ||
542d6675 | 10811 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10812 | |
10813 | mnemonic = input_line_pointer; | |
10814 | ch = get_symbol_end (); | |
10815 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10816 | if (pdesc) | |
10817 | { | |
10818 | *input_line_pointer = ch; | |
10819 | (*pdesc->handler) (pdesc->arg); | |
10820 | goto done; | |
10821 | } | |
10822 | ||
542d6675 | 10823 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10824 | |
10825 | idesc = ia64_find_opcode (mnemonic); | |
10826 | *input_line_pointer = ch; | |
10827 | if (!idesc) | |
10828 | { | |
ad4b42b4 | 10829 | as_bad (_("Unknown opcode `%s'"), mnemonic); |
800eeca4 JW |
10830 | goto done; |
10831 | } | |
10832 | ||
10833 | idesc = parse_operands (idesc); | |
10834 | if (!idesc) | |
10835 | goto done; | |
10836 | ||
542d6675 | 10837 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10838 | if (idesc->type == IA64_TYPE_DYN) |
10839 | { | |
10840 | if (strcmp (idesc->name, "add") == 0) | |
10841 | { | |
10842 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10843 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10844 | mnemonic = "addl"; | |
10845 | else | |
10846 | mnemonic = "adds"; | |
3d56ab85 | 10847 | ia64_free_opcode (idesc); |
800eeca4 | 10848 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10849 | } |
10850 | else if (strcmp (idesc->name, "mov") == 0) | |
10851 | { | |
10852 | enum ia64_opnd opnd1, opnd2; | |
10853 | int rop; | |
10854 | ||
10855 | opnd1 = idesc->operands[0]; | |
10856 | opnd2 = idesc->operands[1]; | |
10857 | if (opnd1 == IA64_OPND_AR3) | |
10858 | rop = 0; | |
10859 | else if (opnd2 == IA64_OPND_AR3) | |
10860 | rop = 1; | |
10861 | else | |
10862 | abort (); | |
652ca075 L |
10863 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10864 | { | |
10865 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10866 | mnemonic = "mov.i"; | |
97762d08 | 10867 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10868 | mnemonic = "mov.m"; |
97762d08 JB |
10869 | else |
10870 | rop = -1; | |
652ca075 | 10871 | } |
800eeca4 | 10872 | else |
652ca075 | 10873 | abort (); |
97762d08 JB |
10874 | if (rop >= 0) |
10875 | { | |
10876 | ia64_free_opcode (idesc); | |
10877 | idesc = ia64_find_opcode (mnemonic); | |
10878 | while (idesc != NULL | |
10879 | && (idesc->operands[0] != opnd1 | |
10880 | || idesc->operands[1] != opnd2)) | |
10881 | idesc = get_next_opcode (idesc); | |
10882 | } | |
800eeca4 JW |
10883 | } |
10884 | } | |
652ca075 L |
10885 | else if (strcmp (idesc->name, "mov.i") == 0 |
10886 | || strcmp (idesc->name, "mov.m") == 0) | |
10887 | { | |
10888 | enum ia64_opnd opnd1, opnd2; | |
10889 | int rop; | |
10890 | ||
10891 | opnd1 = idesc->operands[0]; | |
10892 | opnd2 = idesc->operands[1]; | |
10893 | if (opnd1 == IA64_OPND_AR3) | |
10894 | rop = 0; | |
10895 | else if (opnd2 == IA64_OPND_AR3) | |
10896 | rop = 1; | |
10897 | else | |
10898 | abort (); | |
10899 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10900 | { | |
10901 | char unit = 'a'; | |
10902 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10903 | unit = 'i'; | |
10904 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10905 | unit = 'm'; | |
10906 | if (unit != 'a' && unit != idesc->name [4]) | |
ad4b42b4 | 10907 | as_bad (_("AR %d can only be accessed by %c-unit"), |
652ca075 L |
10908 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10909 | TOUPPER (unit)); | |
10910 | } | |
10911 | } | |
91d777ee L |
10912 | else if (strcmp (idesc->name, "hint.b") == 0) |
10913 | { | |
10914 | switch (md.hint_b) | |
10915 | { | |
10916 | case hint_b_ok: | |
10917 | break; | |
10918 | case hint_b_warning: | |
ad4b42b4 | 10919 | as_warn (_("hint.b may be treated as nop")); |
91d777ee L |
10920 | break; |
10921 | case hint_b_error: | |
ad4b42b4 | 10922 | as_bad (_("hint.b shouldn't be used")); |
91d777ee L |
10923 | break; |
10924 | } | |
10925 | } | |
800eeca4 JW |
10926 | |
10927 | qp_regno = 0; | |
10928 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10929 | { |
10930 | qp_regno = md.qp.X_add_number - REG_P; | |
10931 | md.qp.X_op = O_absent; | |
10932 | } | |
800eeca4 JW |
10933 | |
10934 | flags = idesc->flags; | |
10935 | ||
10936 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10937 | { |
10938 | /* The alignment frag has to end with a stop bit only if the | |
10939 | next instruction after the alignment directive has to be | |
10940 | the first instruction in an instruction group. */ | |
10941 | if (align_frag) | |
10942 | { | |
10943 | while (align_frag->fr_type != rs_align_code) | |
10944 | { | |
10945 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10946 | if (!align_frag) |
10947 | break; | |
9545c4ce | 10948 | } |
bae25f19 L |
10949 | /* align_frag can be NULL if there are directives in |
10950 | between. */ | |
10951 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10952 | align_frag->tc_frag_data = 1; |
10953 | } | |
10954 | ||
10955 | insn_group_break (1, 0, 0); | |
10956 | } | |
10957 | align_frag = NULL; | |
800eeca4 JW |
10958 | |
10959 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10960 | { | |
ad4b42b4 | 10961 | as_bad (_("`%s' cannot be predicated"), idesc->name); |
800eeca4 JW |
10962 | goto done; |
10963 | } | |
10964 | ||
542d6675 | 10965 | /* Build the instruction. */ |
800eeca4 JW |
10966 | CURR_SLOT.qp_regno = qp_regno; |
10967 | CURR_SLOT.idesc = idesc; | |
10968 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10969 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 | 10970 | |
ba825241 | 10971 | /* Add unwind entries, if there are any. */ |
e0c9811a | 10972 | if (unwind.current_entry) |
800eeca4 | 10973 | { |
e0c9811a JW |
10974 | CURR_SLOT.unwind_record = unwind.current_entry; |
10975 | unwind.current_entry = NULL; | |
800eeca4 | 10976 | } |
ba825241 JB |
10977 | if (unwind.pending_saves) |
10978 | { | |
10979 | if (unwind.pending_saves->next) | |
10980 | { | |
10981 | /* Attach the next pending save to the next slot so that its | |
10982 | slot number will get set correctly. */ | |
10983 | add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); | |
10984 | unwind.pending_saves = &unwind.pending_saves->next->r.record.p; | |
10985 | } | |
10986 | else | |
10987 | unwind.pending_saves = NULL; | |
10988 | } | |
5656b6b8 | 10989 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10990 | unwind.insn = 1; |
800eeca4 | 10991 | |
542d6675 | 10992 | /* Check for dependency violations. */ |
800eeca4 | 10993 | if (md.detect_dv) |
542d6675 | 10994 | check_dv (idesc); |
800eeca4 JW |
10995 | |
10996 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10997 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10998 | emit_one_bundle (); | |
10999 | ||
11000 | if ((flags & IA64_OPCODE_LAST) != 0) | |
11001 | insn_group_break (1, 0, 0); | |
11002 | ||
11003 | md.last_text_seg = now_seg; | |
11004 | ||
11005 | done: | |
11006 | input_line_pointer = saved_input_line_pointer; | |
11007 | } | |
11008 | ||
11009 | /* Called when symbol NAME cannot be found in the symbol table. | |
11010 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
11011 | |
11012 | symbolS * | |
800eeca4 | 11013 | md_undefined_symbol (name) |
2434f565 | 11014 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
11015 | { |
11016 | return 0; | |
11017 | } | |
11018 | ||
11019 | /* Called for any expression that can not be recognized. When the | |
11020 | function is called, `input_line_pointer' will point to the start of | |
11021 | the expression. */ | |
542d6675 | 11022 | |
800eeca4 JW |
11023 | void |
11024 | md_operand (e) | |
11025 | expressionS *e; | |
11026 | { | |
800eeca4 JW |
11027 | switch (*input_line_pointer) |
11028 | { | |
800eeca4 JW |
11029 | case '[': |
11030 | ++input_line_pointer; | |
60d11e55 | 11031 | expression_and_evaluate (e); |
800eeca4 JW |
11032 | if (*input_line_pointer != ']') |
11033 | { | |
ad4b42b4 | 11034 | as_bad (_("Closing bracket missing")); |
800eeca4 JW |
11035 | goto err; |
11036 | } | |
11037 | else | |
11038 | { | |
6a2375c6 JB |
11039 | if (e->X_op != O_register |
11040 | || e->X_add_number < REG_GR | |
11041 | || e->X_add_number > REG_GR + 127) | |
11042 | { | |
ad4b42b4 | 11043 | as_bad (_("Index must be a general register")); |
6a2375c6 JB |
11044 | e->X_add_number = REG_GR; |
11045 | } | |
800eeca4 JW |
11046 | |
11047 | ++input_line_pointer; | |
11048 | e->X_op = O_index; | |
11049 | } | |
11050 | break; | |
11051 | ||
11052 | default: | |
11053 | break; | |
11054 | } | |
11055 | return; | |
11056 | ||
11057 | err: | |
11058 | ignore_rest_of_line (); | |
11059 | } | |
11060 | ||
11061 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
11062 | a section symbol plus some offset. For relocs involving @fptr(), | |
11063 | directives we don't want such adjustments since we need to have the | |
11064 | original symbol's name in the reloc. */ | |
11065 | int | |
11066 | ia64_fix_adjustable (fix) | |
11067 | fixS *fix; | |
11068 | { | |
11069 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 11070 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
11071 | return 0; |
11072 | ||
11073 | switch (fix->fx_r_type) | |
11074 | { | |
11075 | case BFD_RELOC_IA64_FPTR64I: | |
11076 | case BFD_RELOC_IA64_FPTR32MSB: | |
11077 | case BFD_RELOC_IA64_FPTR32LSB: | |
11078 | case BFD_RELOC_IA64_FPTR64MSB: | |
11079 | case BFD_RELOC_IA64_FPTR64LSB: | |
11080 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11081 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11082 | return 0; | |
11083 | default: | |
11084 | break; | |
11085 | } | |
11086 | ||
11087 | return 1; | |
11088 | } | |
11089 | ||
11090 | int | |
11091 | ia64_force_relocation (fix) | |
11092 | fixS *fix; | |
11093 | { | |
11094 | switch (fix->fx_r_type) | |
11095 | { | |
11096 | case BFD_RELOC_IA64_FPTR64I: | |
11097 | case BFD_RELOC_IA64_FPTR32MSB: | |
11098 | case BFD_RELOC_IA64_FPTR32LSB: | |
11099 | case BFD_RELOC_IA64_FPTR64MSB: | |
11100 | case BFD_RELOC_IA64_FPTR64LSB: | |
11101 | ||
11102 | case BFD_RELOC_IA64_LTOFF22: | |
11103 | case BFD_RELOC_IA64_LTOFF64I: | |
11104 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11105 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11106 | case BFD_RELOC_IA64_PLTOFF22: | |
11107 | case BFD_RELOC_IA64_PLTOFF64I: | |
11108 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
11109 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
11110 | |
11111 | case BFD_RELOC_IA64_LTOFF22X: | |
11112 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
11113 | return 1; |
11114 | ||
11115 | default: | |
a161fe53 | 11116 | break; |
800eeca4 | 11117 | } |
a161fe53 | 11118 | |
ae6063d4 | 11119 | return generic_force_reloc (fix); |
800eeca4 JW |
11120 | } |
11121 | ||
11122 | /* Decide from what point a pc-relative relocation is relative to, | |
11123 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
11124 | long | |
11125 | ia64_pcrel_from_section (fix, sec) | |
11126 | fixS *fix; | |
11127 | segT sec; | |
11128 | { | |
11129 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 11130 | |
800eeca4 JW |
11131 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
11132 | off &= ~0xfUL; | |
11133 | ||
11134 | return off; | |
11135 | } | |
11136 | ||
6174d9c8 RH |
11137 | |
11138 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
11139 | void | |
11140 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
11141 | { | |
11142 | expressionS expr; | |
11143 | ||
11144 | expr.X_op = O_pseudo_fixup; | |
11145 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
11146 | expr.X_add_number = 0; | |
11147 | expr.X_add_symbol = symbol; | |
11148 | emit_expr (&expr, size); | |
11149 | } | |
11150 | ||
800eeca4 JW |
11151 | /* This is called whenever some data item (not an instruction) needs a |
11152 | fixup. We pick the right reloc code depending on the byteorder | |
11153 | currently in effect. */ | |
11154 | void | |
11155 | ia64_cons_fix_new (f, where, nbytes, exp) | |
11156 | fragS *f; | |
11157 | int where; | |
11158 | int nbytes; | |
11159 | expressionS *exp; | |
11160 | { | |
11161 | bfd_reloc_code_real_type code; | |
11162 | fixS *fix; | |
11163 | ||
11164 | switch (nbytes) | |
11165 | { | |
11166 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
11167 | them here since they will work fine as long as the expression | |
11168 | is fully defined at the end of the pass over the source file. */ | |
11169 | case 1: code = BFD_RELOC_8; break; | |
11170 | case 2: code = BFD_RELOC_16; break; | |
11171 | case 4: | |
11172 | if (target_big_endian) | |
11173 | code = BFD_RELOC_IA64_DIR32MSB; | |
11174 | else | |
11175 | code = BFD_RELOC_IA64_DIR32LSB; | |
11176 | break; | |
11177 | ||
11178 | case 8: | |
40449e9f | 11179 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 11180 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
11181 | && exp->X_op_symbol |
11182 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
11183 | && !(md.flags & EF_IA_64_ABI64)) | |
11184 | { | |
11185 | if (target_big_endian) | |
11186 | code = BFD_RELOC_IA64_IPLTMSB; | |
11187 | else | |
11188 | code = BFD_RELOC_IA64_IPLTLSB; | |
11189 | exp->X_op = O_symbol; | |
11190 | break; | |
11191 | } | |
11192 | else | |
11193 | { | |
11194 | if (target_big_endian) | |
11195 | code = BFD_RELOC_IA64_DIR64MSB; | |
11196 | else | |
11197 | code = BFD_RELOC_IA64_DIR64LSB; | |
11198 | break; | |
11199 | } | |
800eeca4 | 11200 | |
3969b680 RH |
11201 | case 16: |
11202 | if (exp->X_op == O_pseudo_fixup | |
11203 | && exp->X_op_symbol | |
11204 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
11205 | { | |
11206 | if (target_big_endian) | |
11207 | code = BFD_RELOC_IA64_IPLTMSB; | |
11208 | else | |
11209 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
11210 | exp->X_op = O_symbol; |
11211 | break; | |
11212 | } | |
11213 | /* FALLTHRU */ | |
11214 | ||
800eeca4 | 11215 | default: |
ad4b42b4 | 11216 | as_bad (_("Unsupported fixup size %d"), nbytes); |
800eeca4 JW |
11217 | ignore_rest_of_line (); |
11218 | return; | |
11219 | } | |
6174d9c8 | 11220 | |
800eeca4 JW |
11221 | if (exp->X_op == O_pseudo_fixup) |
11222 | { | |
800eeca4 JW |
11223 | exp->X_op = O_symbol; |
11224 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11225 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11226 | } |
3969b680 | 11227 | |
800eeca4 JW |
11228 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11229 | /* We need to store the byte order in effect in case we're going | |
11230 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 11231 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
11232 | fix->tc_fix_data.bigendian = target_big_endian; |
11233 | } | |
11234 | ||
11235 | /* Return the actual relocation we wish to associate with the pseudo | |
11236 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11237 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11238 | |
11239 | static bfd_reloc_code_real_type | |
11240 | ia64_gen_real_reloc_type (sym, r_type) | |
11241 | struct symbol *sym; | |
11242 | bfd_reloc_code_real_type r_type; | |
11243 | { | |
11244 | bfd_reloc_code_real_type new = 0; | |
0ca3e455 | 11245 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11246 | |
11247 | if (sym == NULL) | |
11248 | { | |
11249 | return r_type; | |
11250 | } | |
11251 | ||
11252 | switch (S_GET_VALUE (sym)) | |
11253 | { | |
11254 | case FUNC_FPTR_RELATIVE: | |
11255 | switch (r_type) | |
11256 | { | |
11257 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
11258 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
11259 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
11260 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
11261 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11262 | default: type = "FPTR"; break; |
800eeca4 JW |
11263 | } |
11264 | break; | |
11265 | ||
11266 | case FUNC_GP_RELATIVE: | |
11267 | switch (r_type) | |
11268 | { | |
11269 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
11270 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
11271 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
11272 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
11273 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
11274 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11275 | default: type = "GPREL"; break; |
800eeca4 JW |
11276 | } |
11277 | break; | |
11278 | ||
11279 | case FUNC_LT_RELATIVE: | |
11280 | switch (r_type) | |
11281 | { | |
11282 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
11283 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11284 | default: type = "LTOFF"; break; |
800eeca4 JW |
11285 | } |
11286 | break; | |
11287 | ||
fa2c7eff RH |
11288 | case FUNC_LT_RELATIVE_X: |
11289 | switch (r_type) | |
11290 | { | |
11291 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
0ca3e455 | 11292 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11293 | } |
11294 | break; | |
11295 | ||
c67e42c9 RH |
11296 | case FUNC_PC_RELATIVE: |
11297 | switch (r_type) | |
11298 | { | |
11299 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
11300 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
11301 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
11302 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
11303 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
11304 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11305 | default: type = "PCREL"; break; |
c67e42c9 RH |
11306 | } |
11307 | break; | |
11308 | ||
800eeca4 JW |
11309 | case FUNC_PLT_RELATIVE: |
11310 | switch (r_type) | |
11311 | { | |
11312 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
11313 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
11314 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11315 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11316 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11317 | } |
11318 | break; | |
11319 | ||
11320 | case FUNC_SEC_RELATIVE: | |
11321 | switch (r_type) | |
11322 | { | |
11323 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
11324 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
11325 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
11326 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11327 | default: type = "SECREL"; break; |
800eeca4 JW |
11328 | } |
11329 | break; | |
11330 | ||
11331 | case FUNC_SEG_RELATIVE: | |
11332 | switch (r_type) | |
11333 | { | |
11334 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
11335 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11336 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11337 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11338 | default: type = "SEGREL"; break; |
800eeca4 JW |
11339 | } |
11340 | break; | |
11341 | ||
11342 | case FUNC_LTV_RELATIVE: | |
11343 | switch (r_type) | |
11344 | { | |
11345 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
11346 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
11347 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
11348 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11349 | default: type = "LTV"; break; |
800eeca4 JW |
11350 | } |
11351 | break; | |
11352 | ||
11353 | case FUNC_LT_FPTR_RELATIVE: | |
11354 | switch (r_type) | |
11355 | { | |
11356 | case BFD_RELOC_IA64_IMM22: | |
11357 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
11358 | case BFD_RELOC_IA64_IMM64: | |
11359 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
0ca3e455 JB |
11360 | case BFD_RELOC_IA64_DIR32MSB: |
11361 | new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; | |
11362 | case BFD_RELOC_IA64_DIR32LSB: | |
11363 | new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; | |
11364 | case BFD_RELOC_IA64_DIR64MSB: | |
11365 | new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; | |
11366 | case BFD_RELOC_IA64_DIR64LSB: | |
11367 | new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; | |
800eeca4 | 11368 | default: |
0ca3e455 | 11369 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11370 | } |
11371 | break; | |
3969b680 | 11372 | |
13ae64f3 JJ |
11373 | case FUNC_TP_RELATIVE: |
11374 | switch (r_type) | |
11375 | { | |
0ca3e455 JB |
11376 | case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; |
11377 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; | |
11378 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; | |
11379 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; | |
11380 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; | |
11381 | default: type = "TPREL"; break; | |
13ae64f3 JJ |
11382 | } |
11383 | break; | |
11384 | ||
11385 | case FUNC_LT_TP_RELATIVE: | |
11386 | switch (r_type) | |
11387 | { | |
11388 | case BFD_RELOC_IA64_IMM22: | |
11389 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
11390 | default: | |
0ca3e455 JB |
11391 | type = "LTOFF_TPREL"; break; |
11392 | } | |
11393 | break; | |
11394 | ||
11395 | case FUNC_DTP_MODULE: | |
11396 | switch (r_type) | |
11397 | { | |
11398 | case BFD_RELOC_IA64_DIR64MSB: | |
11399 | new = BFD_RELOC_IA64_DTPMOD64MSB; break; | |
11400 | case BFD_RELOC_IA64_DIR64LSB: | |
11401 | new = BFD_RELOC_IA64_DTPMOD64LSB; break; | |
11402 | default: | |
11403 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11404 | } |
11405 | break; | |
11406 | ||
11407 | case FUNC_LT_DTP_MODULE: | |
11408 | switch (r_type) | |
11409 | { | |
11410 | case BFD_RELOC_IA64_IMM22: | |
11411 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
11412 | default: | |
0ca3e455 | 11413 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11414 | } |
11415 | break; | |
11416 | ||
11417 | case FUNC_DTP_RELATIVE: | |
11418 | switch (r_type) | |
11419 | { | |
0ca3e455 JB |
11420 | case BFD_RELOC_IA64_DIR32MSB: |
11421 | new = BFD_RELOC_IA64_DTPREL32MSB; break; | |
11422 | case BFD_RELOC_IA64_DIR32LSB: | |
11423 | new = BFD_RELOC_IA64_DTPREL32LSB; break; | |
6174d9c8 RH |
11424 | case BFD_RELOC_IA64_DIR64MSB: |
11425 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
11426 | case BFD_RELOC_IA64_DIR64LSB: | |
11427 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
11428 | case BFD_RELOC_IA64_IMM14: |
11429 | new = BFD_RELOC_IA64_DTPREL14; break; | |
11430 | case BFD_RELOC_IA64_IMM22: | |
11431 | new = BFD_RELOC_IA64_DTPREL22; break; | |
11432 | case BFD_RELOC_IA64_IMM64: | |
11433 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
11434 | default: | |
0ca3e455 | 11435 | type = "DTPREL"; break; |
13ae64f3 JJ |
11436 | } |
11437 | break; | |
11438 | ||
11439 | case FUNC_LT_DTP_RELATIVE: | |
11440 | switch (r_type) | |
11441 | { | |
11442 | case BFD_RELOC_IA64_IMM22: | |
11443 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
11444 | default: | |
0ca3e455 | 11445 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11446 | } |
11447 | break; | |
11448 | ||
40449e9f | 11449 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11450 | switch (r_type) |
11451 | { | |
11452 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11453 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11454 | default: type = "IPLT"; break; | |
11455 | } | |
40449e9f | 11456 | break; |
1cd8ff38 | 11457 | |
800eeca4 JW |
11458 | default: |
11459 | abort (); | |
11460 | } | |
6174d9c8 | 11461 | |
800eeca4 JW |
11462 | if (new) |
11463 | return new; | |
11464 | else | |
0ca3e455 JB |
11465 | { |
11466 | int width; | |
11467 | ||
11468 | if (!type) | |
11469 | abort (); | |
11470 | switch (r_type) | |
11471 | { | |
11472 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11473 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11474 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11475 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11476 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11477 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11478 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11479 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11480 | default: abort (); | |
11481 | } | |
11482 | ||
11483 | /* This should be an error, but since previously there wasn't any | |
ad4b42b4 NC |
11484 | diagnostic here, don't make it fail because of this for now. */ |
11485 | as_warn (_("Cannot express %s%d%s relocation"), type, width, suffix); | |
0ca3e455 JB |
11486 | return r_type; |
11487 | } | |
800eeca4 JW |
11488 | } |
11489 | ||
11490 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11491 | functions. */ | |
11492 | void | |
11493 | ia64_validate_fix (fix) | |
11494 | fixS *fix; | |
11495 | { | |
11496 | switch (fix->fx_r_type) | |
11497 | { | |
11498 | case BFD_RELOC_IA64_FPTR64I: | |
11499 | case BFD_RELOC_IA64_FPTR32MSB: | |
11500 | case BFD_RELOC_IA64_FPTR64LSB: | |
11501 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11502 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11503 | if (fix->fx_offset != 0) | |
11504 | as_bad_where (fix->fx_file, fix->fx_line, | |
ad4b42b4 | 11505 | _("No addend allowed in @fptr() relocation")); |
800eeca4 JW |
11506 | break; |
11507 | default: | |
11508 | break; | |
11509 | } | |
800eeca4 JW |
11510 | } |
11511 | ||
11512 | static void | |
11513 | fix_insn (fix, odesc, value) | |
11514 | fixS *fix; | |
11515 | const struct ia64_operand *odesc; | |
11516 | valueT value; | |
11517 | { | |
11518 | bfd_vma insn[3], t0, t1, control_bits; | |
11519 | const char *err; | |
11520 | char *fixpos; | |
11521 | long slot; | |
11522 | ||
11523 | slot = fix->fx_where & 0x3; | |
11524 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11525 | ||
c67e42c9 | 11526 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11527 | t0 = bfd_getl64 (fixpos); |
11528 | t1 = bfd_getl64 (fixpos + 8); | |
11529 | control_bits = t0 & 0x1f; | |
11530 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11531 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11532 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11533 | ||
c67e42c9 RH |
11534 | err = NULL; |
11535 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11536 | { |
c67e42c9 RH |
11537 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11538 | insn[2] |= (((value & 0x7f) << 13) | |
11539 | | (((value >> 7) & 0x1ff) << 27) | |
11540 | | (((value >> 16) & 0x1f) << 22) | |
11541 | | (((value >> 21) & 0x1) << 21) | |
11542 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11543 | } |
c67e42c9 RH |
11544 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11545 | { | |
11546 | if (value & ~0x3fffffffffffffffULL) | |
11547 | err = "integer operand out of range"; | |
11548 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
11549 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11550 | } | |
11551 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11552 | { | |
11553 | value >>= 4; | |
11554 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11555 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11556 | | (((value >> 0) & 0xfffff) << 13)); | |
11557 | } | |
11558 | else | |
11559 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11560 | ||
11561 | if (err) | |
11562 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
11563 | |
11564 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11565 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11566 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11567 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11568 | } |
11569 | ||
11570 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11571 | ignored; perhaps it was once meaningful, but now it is historical. | |
11572 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11573 | ||
11574 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11575 | (if possible). */ |
94f592af NC |
11576 | |
11577 | void | |
55cf6793 | 11578 | md_apply_fix (fix, valP, seg) |
800eeca4 | 11579 | fixS *fix; |
40449e9f | 11580 | valueT *valP; |
2434f565 | 11581 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
11582 | { |
11583 | char *fixpos; | |
40449e9f | 11584 | valueT value = *valP; |
800eeca4 JW |
11585 | |
11586 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11587 | ||
11588 | if (fix->fx_pcrel) | |
11589 | { | |
7b347e43 JB |
11590 | switch (fix->fx_r_type) |
11591 | { | |
11592 | case BFD_RELOC_IA64_PCREL21B: break; | |
11593 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11594 | case BFD_RELOC_IA64_PCREL21F: break; | |
11595 | case BFD_RELOC_IA64_PCREL21M: break; | |
11596 | case BFD_RELOC_IA64_PCREL60B: break; | |
11597 | case BFD_RELOC_IA64_PCREL22: break; | |
11598 | case BFD_RELOC_IA64_PCREL64I: break; | |
11599 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11600 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11601 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11602 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11603 | default: | |
11604 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11605 | fix->fx_r_type); | |
11606 | break; | |
11607 | } | |
800eeca4 JW |
11608 | } |
11609 | if (fix->fx_addsy) | |
11610 | { | |
00f7efb6 | 11611 | switch (fix->fx_r_type) |
800eeca4 | 11612 | { |
00f7efb6 | 11613 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11614 | /* This must be a TAG13 or TAG13b operand. There are no external |
11615 | relocs defined for them, so we must give an error. */ | |
800eeca4 | 11616 | as_bad_where (fix->fx_file, fix->fx_line, |
ad4b42b4 | 11617 | _("%s must have a constant value"), |
800eeca4 | 11618 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); |
fa1cb89c | 11619 | fix->fx_done = 1; |
94f592af | 11620 | return; |
00f7efb6 JJ |
11621 | |
11622 | case BFD_RELOC_IA64_TPREL14: | |
11623 | case BFD_RELOC_IA64_TPREL22: | |
11624 | case BFD_RELOC_IA64_TPREL64I: | |
11625 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11626 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11627 | case BFD_RELOC_IA64_DTPREL14: | |
11628 | case BFD_RELOC_IA64_DTPREL22: | |
11629 | case BFD_RELOC_IA64_DTPREL64I: | |
11630 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11631 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11632 | break; | |
7925dd68 JJ |
11633 | |
11634 | default: | |
11635 | break; | |
800eeca4 | 11636 | } |
800eeca4 JW |
11637 | } |
11638 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11639 | { | |
11640 | if (fix->tc_fix_data.bigendian) | |
11641 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11642 | else | |
11643 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11644 | fix->fx_done = 1; | |
800eeca4 JW |
11645 | } |
11646 | else | |
11647 | { | |
11648 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11649 | fix->fx_done = 1; | |
800eeca4 | 11650 | } |
800eeca4 JW |
11651 | } |
11652 | ||
11653 | /* Generate the BFD reloc to be stuck in the object file from the | |
11654 | fixup used internally in the assembler. */ | |
542d6675 KH |
11655 | |
11656 | arelent * | |
800eeca4 | 11657 | tc_gen_reloc (sec, fixp) |
2434f565 | 11658 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
11659 | fixS *fixp; |
11660 | { | |
11661 | arelent *reloc; | |
11662 | ||
11663 | reloc = xmalloc (sizeof (*reloc)); | |
11664 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11665 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11666 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11667 | reloc->addend = fixp->fx_offset; | |
11668 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11669 | ||
11670 | if (!reloc->howto) | |
11671 | { | |
11672 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ad4b42b4 | 11673 | _("Cannot represent %s relocation in object file"), |
800eeca4 | 11674 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
cf738528 AS |
11675 | free (reloc); |
11676 | return NULL; | |
800eeca4 JW |
11677 | } |
11678 | return reloc; | |
11679 | } | |
11680 | ||
11681 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11682 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11683 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11684 | returned, or NULL on OK. */ |
11685 | ||
11686 | #define MAX_LITTLENUMS 5 | |
11687 | ||
542d6675 | 11688 | char * |
800eeca4 JW |
11689 | md_atof (type, lit, size) |
11690 | int type; | |
11691 | char *lit; | |
11692 | int *size; | |
11693 | { | |
11694 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11695 | char *t; |
11696 | int prec; | |
11697 | ||
11698 | switch (type) | |
11699 | { | |
11700 | /* IEEE floats */ | |
11701 | case 'f': | |
11702 | case 'F': | |
11703 | case 's': | |
11704 | case 'S': | |
11705 | prec = 2; | |
11706 | break; | |
11707 | ||
11708 | case 'd': | |
11709 | case 'D': | |
11710 | case 'r': | |
11711 | case 'R': | |
11712 | prec = 4; | |
11713 | break; | |
11714 | ||
11715 | case 'x': | |
11716 | case 'X': | |
11717 | case 'p': | |
11718 | case 'P': | |
11719 | prec = 5; | |
11720 | break; | |
11721 | ||
11722 | default: | |
11723 | *size = 0; | |
11724 | return "Bad call to MD_ATOF()"; | |
11725 | } | |
11726 | t = atof_ieee (input_line_pointer, type, words); | |
11727 | if (t) | |
11728 | input_line_pointer = t; | |
800eeca4 | 11729 | |
10a98291 L |
11730 | (*ia64_float_to_chars) (lit, words, prec); |
11731 | ||
165a7f90 L |
11732 | if (type == 'X') |
11733 | { | |
11734 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11735 | memset (&lit [10], 0, 6); |
165a7f90 L |
11736 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11737 | } | |
10a98291 L |
11738 | else |
11739 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11740 | ||
800eeca4 JW |
11741 | return 0; |
11742 | } | |
11743 | ||
800eeca4 JW |
11744 | /* Handle ia64 specific semantics of the align directive. */ |
11745 | ||
0a9ef439 | 11746 | void |
800eeca4 | 11747 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
11748 | int n ATTRIBUTE_UNUSED; |
11749 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 11750 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 11751 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 11752 | { |
0a9ef439 | 11753 | if (subseg_text_p (now_seg)) |
800eeca4 | 11754 | ia64_flush_insns (); |
0a9ef439 | 11755 | } |
800eeca4 | 11756 | |
0a9ef439 RH |
11757 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11758 | of an rs_align_code fragment. */ | |
800eeca4 | 11759 | |
0a9ef439 RH |
11760 | void |
11761 | ia64_handle_align (fragp) | |
11762 | fragS *fragp; | |
11763 | { | |
0a9ef439 RH |
11764 | int bytes; |
11765 | char *p; | |
9545c4ce | 11766 | const unsigned char *nop; |
0a9ef439 RH |
11767 | |
11768 | if (fragp->fr_type != rs_align_code) | |
11769 | return; | |
11770 | ||
9545c4ce L |
11771 | /* Check if this frag has to end with a stop bit. */ |
11772 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11773 | ||
0a9ef439 RH |
11774 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11775 | p = fragp->fr_literal + fragp->fr_fix; | |
11776 | ||
d9201763 L |
11777 | /* If no paddings are needed, we check if we need a stop bit. */ |
11778 | if (!bytes && fragp->tc_frag_data) | |
11779 | { | |
11780 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11781 | #if 1 |
11782 | /* FIXME: It won't work with | |
11783 | .align 16 | |
11784 | alloc r32=ar.pfs,1,2,4,0 | |
11785 | */ | |
11786 | ; | |
11787 | #else | |
d9201763 L |
11788 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11789 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11790 | #endif |
d9201763 L |
11791 | else |
11792 | /* Bundles are always in little-endian byte order. Make sure | |
11793 | the previous bundle has the stop bit. */ | |
11794 | *(p - 16) |= 1; | |
11795 | } | |
11796 | ||
0a9ef439 RH |
11797 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11798 | putting data into a text section. */ | |
11799 | if (bytes & 15) | |
11800 | { | |
11801 | int fix = bytes & 15; | |
11802 | memset (p, 0, fix); | |
11803 | p += fix; | |
11804 | bytes -= fix; | |
11805 | fragp->fr_fix += fix; | |
800eeca4 JW |
11806 | } |
11807 | ||
012a452b | 11808 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11809 | memcpy (p, nop, 16); |
0a9ef439 | 11810 | fragp->fr_var = 16; |
800eeca4 | 11811 | } |
10a98291 L |
11812 | |
11813 | static void | |
11814 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11815 | int prec) | |
11816 | { | |
11817 | while (prec--) | |
11818 | { | |
11819 | number_to_chars_bigendian (lit, (long) (*words++), | |
11820 | sizeof (LITTLENUM_TYPE)); | |
11821 | lit += sizeof (LITTLENUM_TYPE); | |
11822 | } | |
11823 | } | |
11824 | ||
11825 | static void | |
11826 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11827 | int prec) | |
11828 | { | |
11829 | while (prec--) | |
11830 | { | |
11831 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11832 | sizeof (LITTLENUM_TYPE)); | |
11833 | lit += sizeof (LITTLENUM_TYPE); | |
11834 | } | |
11835 | } | |
11836 | ||
11837 | void | |
11838 | ia64_elf_section_change_hook (void) | |
11839 | { | |
38ce5b11 L |
11840 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11841 | && elf_linked_to_section (now_seg) == NULL) | |
11842 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11843 | dot_byteorder (-1); |
11844 | } | |
a645d1eb L |
11845 | |
11846 | /* Check if a label should be made global. */ | |
11847 | void | |
11848 | ia64_check_label (symbolS *label) | |
11849 | { | |
11850 | if (*input_line_pointer == ':') | |
11851 | { | |
11852 | S_SET_EXTERNAL (label); | |
11853 | input_line_pointer++; | |
11854 | } | |
11855 | } | |
35f5df7f L |
11856 | |
11857 | /* Used to remember where .alias and .secalias directives are seen. We | |
11858 | will rename symbol and section names when we are about to output | |
11859 | the relocatable file. */ | |
11860 | struct alias | |
11861 | { | |
11862 | char *file; /* The file where the directive is seen. */ | |
11863 | unsigned int line; /* The line number the directive is at. */ | |
708587a4 | 11864 | const char *name; /* The original name of the symbol. */ |
35f5df7f L |
11865 | }; |
11866 | ||
11867 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11868 | .secalias. Otherwise, it is .alias. */ | |
11869 | static void | |
11870 | dot_alias (int section) | |
11871 | { | |
11872 | char *name, *alias; | |
11873 | char delim; | |
11874 | char *end_name; | |
11875 | int len; | |
11876 | const char *error_string; | |
11877 | struct alias *h; | |
11878 | const char *a; | |
11879 | struct hash_control *ahash, *nhash; | |
11880 | const char *kind; | |
11881 | ||
11882 | name = input_line_pointer; | |
11883 | delim = get_symbol_end (); | |
11884 | end_name = input_line_pointer; | |
11885 | *end_name = delim; | |
11886 | ||
11887 | if (name == end_name) | |
11888 | { | |
11889 | as_bad (_("expected symbol name")); | |
e4e8248d | 11890 | ignore_rest_of_line (); |
35f5df7f L |
11891 | return; |
11892 | } | |
11893 | ||
11894 | SKIP_WHITESPACE (); | |
11895 | ||
11896 | if (*input_line_pointer != ',') | |
11897 | { | |
11898 | *end_name = 0; | |
11899 | as_bad (_("expected comma after \"%s\""), name); | |
11900 | *end_name = delim; | |
11901 | ignore_rest_of_line (); | |
11902 | return; | |
11903 | } | |
11904 | ||
11905 | input_line_pointer++; | |
11906 | *end_name = 0; | |
20b36a95 | 11907 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11908 | |
11909 | /* We call demand_copy_C_string to check if alias string is valid. | |
11910 | There should be a closing `"' and no `\0' in the string. */ | |
11911 | alias = demand_copy_C_string (&len); | |
11912 | if (alias == NULL) | |
11913 | { | |
11914 | ignore_rest_of_line (); | |
11915 | return; | |
11916 | } | |
11917 | ||
11918 | /* Make a copy of name string. */ | |
11919 | len = strlen (name) + 1; | |
11920 | obstack_grow (¬es, name, len); | |
11921 | name = obstack_finish (¬es); | |
11922 | ||
11923 | if (section) | |
11924 | { | |
11925 | kind = "section"; | |
11926 | ahash = secalias_hash; | |
11927 | nhash = secalias_name_hash; | |
11928 | } | |
11929 | else | |
11930 | { | |
11931 | kind = "symbol"; | |
11932 | ahash = alias_hash; | |
11933 | nhash = alias_name_hash; | |
11934 | } | |
11935 | ||
11936 | /* Check if alias has been used before. */ | |
11937 | h = (struct alias *) hash_find (ahash, alias); | |
11938 | if (h) | |
11939 | { | |
11940 | if (strcmp (h->name, name)) | |
11941 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11942 | alias, kind, h->name); | |
11943 | goto out; | |
11944 | } | |
11945 | ||
11946 | /* Check if name already has an alias. */ | |
11947 | a = (const char *) hash_find (nhash, name); | |
11948 | if (a) | |
11949 | { | |
11950 | if (strcmp (a, alias)) | |
11951 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11952 | goto out; | |
11953 | } | |
11954 | ||
11955 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11956 | as_where (&h->file, &h->line); | |
11957 | h->name = name; | |
11958 | ||
11959 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11960 | if (error_string) | |
11961 | { | |
11962 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11963 | alias, kind, error_string); | |
11964 | goto out; | |
11965 | } | |
11966 | ||
11967 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11968 | if (error_string) | |
11969 | { | |
11970 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11971 | alias, kind, error_string); | |
11972 | out: | |
11973 | obstack_free (¬es, name); | |
11974 | obstack_free (¬es, alias); | |
11975 | } | |
11976 | ||
11977 | demand_empty_rest_of_line (); | |
11978 | } | |
11979 | ||
11980 | /* It renames the original symbol name to its alias. */ | |
11981 | static void | |
11982 | do_alias (const char *alias, PTR value) | |
11983 | { | |
11984 | struct alias *h = (struct alias *) value; | |
11985 | symbolS *sym = symbol_find (h->name); | |
11986 | ||
11987 | if (sym == NULL) | |
11988 | as_warn_where (h->file, h->line, | |
11989 | _("symbol `%s' aliased to `%s' is not used"), | |
11990 | h->name, alias); | |
11991 | else | |
11992 | S_SET_NAME (sym, (char *) alias); | |
11993 | } | |
11994 | ||
11995 | /* Called from write_object_file. */ | |
11996 | void | |
11997 | ia64_adjust_symtab (void) | |
11998 | { | |
11999 | hash_traverse (alias_hash, do_alias); | |
12000 | } | |
12001 | ||
12002 | /* It renames the original section name to its alias. */ | |
12003 | static void | |
12004 | do_secalias (const char *alias, PTR value) | |
12005 | { | |
12006 | struct alias *h = (struct alias *) value; | |
12007 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
12008 | ||
12009 | if (sec == NULL) | |
12010 | as_warn_where (h->file, h->line, | |
12011 | _("section `%s' aliased to `%s' is not used"), | |
12012 | h->name, alias); | |
12013 | else | |
12014 | sec->name = alias; | |
12015 | } | |
12016 | ||
12017 | /* Called from write_object_file. */ | |
12018 | void | |
12019 | ia64_frob_file (void) | |
12020 | { | |
12021 | hash_traverse (secalias_hash, do_secalias); | |
12022 | } |